How it Works
Acer
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E5-772
Schematic
70 pgs7.43 Mb0
Schematic
70 pgs11.78 Mb0

Acer E5-772 Schematic

5
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Wistron Confidential document, Anyone can not Duplicate, Modify, Forward or any other purpose
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A A
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev A4
A4
5
4
3
A4
Date: Sheet
Date: Sheet
Date: Sheet of
application without get Wistron permission
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
Cover Page
Cover Page
Cover Page
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Wednesday, February 04, 2015
Wednesday, February 04, 2015
Wednesday, February 04, 2015
2
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of
1 106
1
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-1M
-1M
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1
D3ACP@C 3?AJ<<<:
BROOK ULT Board Block Diagram
Project code : 4PD04X010001 PCB P/N : 14276 Revision : -1M
NF?46!
+D/A6E46
!L!6@M*+DQ+D
E46?46!
C679;9/
D D
LCD
CRT PORT
VRAM
DDR3 1500 4Gb
97
4
I>HI:
DDR3
Touch Panel
DP TO VGA
HDMI 1.4b
GPU
C C
N16S-GT-B-A2
;7HIJ
PCIE TO USB UPD720202
8;
PCIe x 4, DDI
PCIE x 1
99
USB2.0x1
97
9;
eDPx4
I2C x1
DP
HDMI
Intel CPU
Haswell/Broadwell U 15W/28W, GT2/GT3
USB 3.0/2.0 ports (6) ETHERNET (10/100/1000Mb) High Definition Audio SATA ports (3) PCIe ports (6) LPC I/F
DDR3L 1333/1600 Channel A
DDR3L 1333/1600 Channel B
USB2.0 x 2
USB3.0 x 1
USB3.0 x 1
PCIe / USB2.0
PCIe x 1
DIM1
DIM2
USB3.0 x 1
USB3.0 x 1
WLAN + BT (NGFF)
LAN
RTL8111G(S)
><
>8
USB2.0 x 2
89
89
7>
8>
79
USB Charger
TPS2544
RJ45
87
8<
NF?46!
+D/A6E46
D?4*+DQ+D C679;9/
NF?46!
+D/A6E46
!L!6@M*+DQ+D 6?!9>;>7
NF?46!
+D/A6E46
!L!6@M*+DQ+D C6I<8>
NF?46!
+D/A6E46
!L!6@M*5+E !>88=J+>9
NF?46!
8+8K2!9
E46?46!
9K2!9
8+8K2!9
E46?46!
KDD2DEC@
E46?46!
>+J9K2!J
E46?46!
>+89K2!8
E46?46!
>+8K2!9
::
/6O
:9
:7H:;
:I
:=
9>
SATA/ PCIe x 4
3D Camera (optional)
B B
!?@AB@C
<=
8I
DMIC
<=
DMIC
<=
DEF/E*GADB
A A
<=
USB Redrvier TPS2544RTER
CardReader
RTS5170
HD Audio Codec
ALC255
8I
78
<;
USB3.0 x 1
USB2.0 x1
SPI Flash
8MB
SATA x 2
HDA
SPI
TPM
NPCT650
LPC BUS
=>
LPC debug port
KBC
<9
KB9028QA
<:
I2C/PS2
7I
SMBus
Charger
HPA02224
Keyboard
79
25
FAN
5
4
3
mSATA (NGFF)
HDD
SATA3.0
ODD
Touch PAD (PTP)
::
78
7:
7:
79
Wistron Confidential document, Anyone can not Duplicate, Modify, Forward or any other purpose
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Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
application without get Wistron permission
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Block Diagram
Block Diagram
Block Diagram
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Wednesday, February 04, 2015
Wednesday, February 04, 2015
Wednesday, February 04, 2015
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2 106
2 106
2 106
1
-1M
-1M
-1M
5
D
C
B
A
Dr-Bios.com
4
3
2
1
D
H_CPUPWRGD
12
EC401
EC401 AZ5325-01FDR7G-GP
AZ5325-01FDR7G-GP
DY
DY
C
DDR3_DRAMRST#12,13
1D35V_CPU_VDDQ_S3
R420
R420
1 2
470R2F-GP
470R2F-GP
1 2
0R0402-PAD-1-GP
0R0402-PAD-1-GP
R402
R402
PECI_EC24
R413
PROCHOT#_CPU24,44,46
H_CPUPWRGD89
1 2
R406 200R2F-L1-GPR406 200R2F-L1-GP
1 2
R407 120R2F-GPR407 120R2F-GP
1 2
R408 100R2F-L1-GP-UR408 100R2F-L1-GP-U
1 2
DDR_PG_CTRL12
R413
56R2J-L1-GP
56R2J-L1-GP
R403
R403
10KR2J-L-GP
10KR2J-L-GP
PROCHOT#_CPU_R
12
SM_RCOMP_0 SM_RCOMP_1 SM_RCOMP_2 SM_DRAMRST#
Layout Note:
1. SM_RCOMP trace width=12~15mil
CPU1B
CPU1B
D61
PROC_DETECT#
K61
CATERR#
N62
PECI
K63
PROCHOT#
C61
PROCPWRGD
AU60
SM_RCOMP0
AV60
SM_RCOMP1
AU61
SM_RCOMP2
AV15
SM_DRAMRST#
AV61
SM_PG_CNTL1
HASWELL-6-GP-U
HASWELL-6-GP-U
MISC
MISC
THERMAL
THERMAL
PWR
PWR
DDR3L
DDR3L
HSW_ULT_DDR3L
HSW_ULT_DDR3L
JTAG
JTAG
2 OF 19
2 OF 19
PRDY#
PREQ#
PROC_TCK
PROC_TMS
PROC_TRST#
PROC_TDI
PROC_TDO
BPM#0 BPM#1 BPM#2 BPM#3 BPM#4 BPM#5 BPM#6 BPM#7
J62 K62 E60 E61 E59 F63 F62
J60 H60 H61 H62 K59 H63 K60 J61
2. Isolation Spacing: 20mil
EC404
TVL-0402-01-AB1-1-GP
TVL-0402-01-AB1-1-GP
EC404
1 2
3. Total trace length<500mil
B
1D05V_S0
1 2
R401
R401 62R2J-GP
62R2J-GP
12
C402
C402 SC47P50V2JN-3GP
SC47P50V2JN-3GP
PROCHOT#_CPU
A
Wistron Confidential document, Anyone can not Duplicate, Modify, Forward or any other purpose
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Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev A4
A4
A4
Date: Sheet of
Date: Sheet of
Date: Sheet of
application without get Wistron permission
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
CPU (THERMAL/CLOCK/PM)
CPU (THERMAL/CLOCK/PM)
CPU (THERMAL/CLOCK/PM)
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Wednesday, February 04, 2015
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Wednesday, February 04, 2015
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4 106
4 106
-1M
-1M
-1M
5
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2
1
!!N+*R*D?4
HSW_ULT_DDR3L
CPU1C
CPU1C
M_A_DQ[15:0]12
D D
M_B_DQ[15:0]13
C C
M_A_DQ[31:16]12
M_B_DQ[31:16]13
B B
A A
M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31
5
AH63 AH62
AK63
AK62 AH61 AH60
AK61
AK60 AM63 AM62
AP63
AP62 AM61 AM60
AP61
AP60
AP58 AR58 AM57
AK57
AL58
AK58 AR57 AN57
AP55 AR55 AM54
AK54
AL55
AK55 AR54 AN54
AY58 AW58
AY56 AW56
AV58 AU58
AV56 AU56
AY54 AW54
AY52 AW52
AV54 AU54
AV52 AU52
AK40
AK42 AM43 AM45
AK45
AK43 AM40 AM42 AM46
AK46 AM49
AK49 AM48
AK48 AM51
AK51
SA_DQ0 SA_DQ1 SA_DQ2 SA_DQ3 SA_DQ4 SA_DQ5 SA_DQ6 SA_DQ7 SA_DQ8 SA_DQ9 SA_DQ10 SA_DQ11 SA_DQ12 SA_DQ13 SA_DQ14 SA_DQ15 SA_DQ16 SA_DQ17 SA_DQ18 SA_DQ19 SA_DQ20 SA_DQ21 SA_DQ22 SA_DQ23 SA_DQ24 SA_DQ25 SA_DQ26 SA_DQ27 SA_DQ28 SA_DQ29 SA_DQ30 SA_DQ31 SA_DQ32 SA_DQ33 SA_DQ34 SA_DQ35 SA_DQ36 SA_DQ37 SA_DQ38 SA_DQ39 SA_DQ40 SA_DQ41 SA_DQ42 SA_DQ43 SA_DQ44 SA_DQ45 SA_DQ46 SA_DQ47 SA_DQ48 SA_DQ49 SA_DQ50 SA_DQ51 SA_DQ52 SA_DQ53 SA_DQ54 SA_DQ55 SA_DQ56 SA_DQ57 SA_DQ58 SA_DQ59 SA_DQ60 SA_DQ61 SA_DQ62 SA_DQ63
HASWELL-6-GP-U
HASWELL-6-GP-U
HSW_ULT_DDR3L
DDR CHANNEL A
DDR CHANNEL A
SA_DQSN0 SA_DQSN1 SA_DQSN2 SA_DQSN3 SA_DQSN4 SA_DQSN5 SA_DQSN6 SA_DQSN7
SA_DQSP0 SA_DQSP1 SA_DQSP2 SA_DQSP3 SA_DQSP4 SA_DQSP5 SA_DQSP6 SA_DQSP7
SM_VREF_CA SM_VREF_DQ0 SM_VREF_DQ1
4
3 OF 19
3 OF 19
SA_CLK#0
SA_CLK0
SA_CLK#1
SA_CLK1
SA_CKE0 SA_CKE1 SA_CKE2 SA_CKE3
SA_CS#0 SA_CS#1
SA_ODT0
SA_RAS#
SA_WE#
SA_CAS#
SA_BA0 SA_BA1 SA_BA2
SA_MA0 SA_MA1 SA_MA2 SA_MA3 SA_MA4 SA_MA5 SA_MA6 SA_MA7 SA_MA8
SA_MA9 SA_MA10 SA_MA11 SA_MA12 SA_MA13 SA_MA14 SA_MA15
AU37 AV37 AW36 AY36
AU43 AW43 AY42 AY43
AP33 AR32
AP32
AY34 AW34 AU34
AU35 AV35 AY41
AU36 AY37 AR38 AP36 AU39 AR36 AV40 AW39 AY39 AU40 AP35 AW41 AU41 AR35 AV42 AU42
AJ61 AN62 AM58 AM55 AV57 AV53 AL43 AL48
AJ62 AN61 AN58 AN55 AW57 AW53 AL42 AL49
AP49 AR51 AP51
M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15
M_A_DQS_DN0 M_A_DQS_DN1 M_B_DQS_DN0 M_B_DQS_DN1 M_A_DQS_DN2 M_A_DQS_DN3 M_B_DQS_DN2 M_B_DQS_DN3
M_A_DQS_DP0 M_A_DQS_DP1 M_B_DQS_DP0 M_B_DQS_DP1 M_A_DQS_DP2 M_A_DQS_DP3 M_B_DQS_DP2 M_B_DQS_DP3
V_SM_VREF_CNT
VREF_CA12,13
M_A_CLK#0 12 M_A_CLK0 12 M_A_CLK#1 12 M_A_CLK1 12
M_A_CKE0 12 M_A_CKE1 12
M_A_CS#0 12 M_A_CS#1 12
M_A_RAS# 12 M_A_WE# 12 M_A_CAS# 12
M_A_BS0 12 M_A_BS1 12 M_A_BS2 12
M_VREF_DQ_DIM0 12 M_VREF_DQ_DIM1 13
1D35V_S3
M_A_A[15:0] 12
M_A_DQS_DP[7:0] 12
M_B_DQS_DP[7:0] 13
M_A_DQS_DN[7:0] 12
M_B_DQS_DN[7:0] 13
12
R512
R512 1K8R2F-GP
1K8R2F-GP
12
R516
R516 1K8R2F-GP
1K8R2F-GP
3
R503
R503
1 2
2R2J-2-GP
2R2J-2-GP
M_A_DQ[47:32]12
M_B_DQ[47:32]13
M_A_DQ[63:48]12
M_B_DQ[63:48]13
12
VREF_RC
12
V_SM_VREF_CNT
C504
C504
SCD022U16V2KX-3GP
SCD022U16V2KX-3GP
R518
R518 24D9R2F-L-GP
24D9R2F-L-GP
M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63
AY31
AW31
AY29
AW29
AV31 AU31 AV29 AU29 AY27
AW27
AY25
AW25
AV27 AU27 AV25 AU25
AM29
AK29 AL28 AK28 AR29 AN29 AR28 AP28 AN26 AR26 AR25 AP25 AK26
AM26
AK25 AL25 AY23
AW23
AY21
AW21
AV23 AU23 AV21 AU21 AY19
AW19
AY17
AW17
AV19 AU19 AV17 AU17 AR21 AR22 AL21
AM22
AN22 AP21 AK21 AK22 AN20 AR20 AK18 AL18 AK20
AM20
AR18 AP18
CPU1D
CPU1D
SB_DQ0 SB_DQ1 SB_DQ2 SB_DQ3 SB_DQ4 SB_DQ5 SB_DQ6 SB_DQ7 SB_DQ8 SB_DQ9 SB_DQ10 SB_DQ11 SB_DQ12 SB_DQ13 SB_DQ14 SB_DQ15 SB_DQ16 SB_DQ17 SB_DQ18 SB_DQ19 SB_DQ20 SB_DQ21 SB_DQ22 SB_DQ23 SB_DQ24 SB_DQ25 SB_DQ26 SB_DQ27 SB_DQ28 SB_DQ29 SB_DQ30 SB_DQ31 SB_DQ32 SB_DQ33 SB_DQ34 SB_DQ35 SB_DQ36 SB_DQ37 SB_DQ38 SB_DQ39 SB_DQ40 SB_DQ41 SB_DQ42 SB_DQ43 SB_DQ44 SB_DQ45 SB_DQ46 SB_DQ47 SB_DQ48 SB_DQ49 SB_DQ50 SB_DQ51 SB_DQ52 SB_DQ53 SB_DQ54 SB_DQ55 SB_DQ56 SB_DQ57 SB_DQ58 SB_DQ59 SB_DQ60 SB_DQ61 SB_DQ62 SB_DQ63
HASWELL-6-GP-U
HASWELL-6-GP-U
2
HSW_ULT_DDR3L
HSW_ULT_DDR3L
DDR CHANNEL B
DDR CHANNEL B
4 OF 19
4 OF 19
AM38
SB_CK#0
AN38
SB_CK0
AK38
SB_CK#1
AL38
SB_CK1
AY49
SB_CKE0
AU50
SB_CKE1
AW49
SB_CKE2
AV50
SB_CKE3
AM32
SB_CS#0
AK32
SB_CS#1
AL32
SB_ODT0
AM35
SB_RAS#
AK35
SB_WE#
AM33
SB_CAS#
AL35
SB_BA0
AM36
SB_BA1
AU49
SB_BA2
SB_MA0 SB_MA1 SB_MA2 SB_MA3 SB_MA4 SB_MA5 SB_MA6 SB_MA7 SB_MA8
SB_MA9 SB_MA10 SB_MA11 SB_MA12 SB_MA13 SB_MA14 SB_MA15
SB_DQSN0 SB_DQSN1 SB_DQSN2 SB_DQSN3 SB_DQSN4 SB_DQSN5 SB_DQSN6 SB_DQSN7
SB_DQSP0 SB_DQSP1 SB_DQSP2 SB_DQSP3 SB_DQSP4 SB_DQSP5 SB_DQSP6 SB_DQSP7
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Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev Custom
Custom
Custom
Wednesday, February 04, 2015
Wednesday, February 04, 2015
Wednesday, February 04, 2015
Date: Sheet of
Date: Sheet of
Date: Sheet of
M_B_A0
AP40
M_B_A1
AR40
M_B_A2
AP42
M_B_A3
AR42
M_B_A4
AR45
M_B_A5
AP45
M_B_A6
AW46
M_B_A7
AY46
M_B_A8
AY47
M_B_A9
AU46
M_B_A10
AK36
M_B_A11
AV47
M_B_A12
AU47
M_B_A13
AK33
M_B_A14
AR46
M_B_A15
AP46
M_A_DQS_DN4
AW30
M_A_DQS_DN5
AV26
M_B_DQS_DN4
AN28
M_B_DQS_DN5
AN25
M_A_DQS_DN6
AW22
M_A_DQS_DN7
AV18
M_B_DQS_DN6
AN21
M_B_DQS_DN7
AN18
M_A_DQS_DP4
AV30
M_A_DQS_DP5
AW26
M_B_DQS_DP4
AM28
M_B_DQS_DP5
AM25
M_A_DQS_DP6
AV22
M_A_DQS_DP7
AW18
M_B_DQS_DP6
AM21
M_B_DQS_DP7
AM18
Wistron Confidential document, Anyone can not Duplicate, Modify, Forward or any other purpose application without get Wistron permission
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
CPU (DDR)
CPU (DDR)
CPU (DDR)
Brook_BH
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1
M_B_CLK#0 13 M_B_CLK0 13 M_B_CLK#1 13 M_B_CLK1 13
M_B_CKE0 13 M_B_CKE1 13
M_B_CS#0 13 M_B_CS#1 13
M_B_RAS# 13 M_B_WE# 13 M_B_CAS# 13
M_B_BS0 13 M_B_BS1 13 M_B_BS2 13
M_B_A[15:0] 13
5 106
5 106
5 106
-1M
-1M
-1M
!!N+*R*D?4
Dr-Bios.com
5
4
3
2
1
D D
CPU1S
CPU1S
HSW_ULT_DDR3L
HSW_ULT_DDR3L
19 OF 19
19 OF 19
eDP Enable
CFG4
C C
B B
1:Disable
0:Enable
12
R603
R603 1KR2J-L2-GP
1KR2J-L2-GP
CFG4
R607
R607
49D9R2F-GP
49D9R2F-GP
R606
R606
1 2
8K2R2J-3-GP
8K2R2J-3-GP
12
CFG4
CFG_RCOMP
TD_IREF
AC60 AC62 AC63 AA63 AA60
Y62 Y61 Y60 V62 V61 V60 U60 T63 T62 T61 T60
AA62
U63
AA61
U62
V63
H18 B12
J20
A5
E1
D1
CFG0 CFG1 CFG2 CFG3 CFG4 CFG5 CFG6 CFG7 CFG8 CFG9 CFG10 CFG11 CFG12 CFG13 CFG14 CFG15
CFG16 CFG18 CFG17 CFG19
CFG_RCOMP
RSVD#A5
RSVD#E1 RSVD#D1 RSVD#J20 RSVD#H18 TD_IREF
RESERVED
RESERVED
RSVD_TP#AV63
RSVD_TP#AU63
RSVD_TP#C63 RSVD_TP#C62
RSVD#B43
RSVD_TP#A51 RSVD_TP#B51
RSVD_TP#L60
RSVD#N60
RSVD#W23
RSVD#Y22
PROC_OPI_RCOMP
RSVD#AV62
RSVD#D58
RSVD#P20 RSVD#R20
VSS VSS
AV63 AU63
C63 C62 B43
A51 B51
L60
N60
W23 Y22 AY15
AV62 D58
P22 N21
P20 R20
OPI_COMP3 OPI_COMP1
20141216 -1
DY
DY
R611 49D9R2F-GP
R611 49D9R2F-GP
12
R610 49D9R2F-GPR610 49D9R2F-GP
12
Wistron Confidential document, Anyone can not Duplicate, Modify, Forward or any other purpose
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A A
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
application without get Wistron permission
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221 , Taiwan, R.O.C.
Taipei Hsien 221 , Taiwan, R.O.C.
Taipei Hsien 221 , Taiwan, R.O.C.
CPU (CFG)
CPU (CFG)
CPU (CFG)
Brook_BH
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Wednesday, F ebruary 04, 2015
Wednesday, F ebruary 04, 2015
Wednesday, F ebruary 04, 2015
Brook_BH
6 106
6 106
6 106
1
-1M
-1M
-1M
5
Dr-Bios.com
4
3
2
1
!!N+*R*D?4
D D
1D05V_S0
130R2F-1-GP
130R2F-1-GP
75R2F-2-GP
75R2F-2-GP
C C
DT,)$*',*D?4
R703
R703
1 2
R704
R704
1 2
VIDSOUT_CPU
VIDALERT#_CPU
1D35V_S3
C;J>*"T,)$*',*D?4
RN701
RN701
1 2 3
SRN100J-3-GP
SRN100J-3-GP
1V_CPU_CORE
1D05V_S0_PW RGD40,48,51
IMVP_PWRGD26,40,46
TVL-0402-01-AB1 -1-GP
TVL-0402-01-AB1 -1-GP
B B
1D05V_S0
ET701
ET701
12
4
1 2 3
ET702
ET702
1 2
TVL-0402-01-AB1-1-GP
TVL-0402-01-AB1-1-GP
VSS_SENSE VCC_SENSE
RN702
RN702
4
SRN10KJ-L-GP
SRN10KJ-L-GP
5K1R2-GP
5K1R2-GP
R707
R707
VSS_SENSE 23,46
VCCST_GD_CPU
12
12
IMVP_PWRGD_R
R708
R708 5K1R2-GP
5K1R2-GP
D;J8SD;>9*"T,)$*',*D?4 ?NF*AD<<*A@<<*A@<8
DY
12
C703
C703
A A
DY
12
C715
C715
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
5
1D35V_CPU_VDDQ_S 3
PG701
PG701
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
PG702
PG702
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
PG703
PG703
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
PG704
PG704
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
PG705
PG705
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
PG706
PG706
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
VIDALERT#_CPU46
VIDSCK_CPU46
VIDSOUT_CPU46
H_VR_EN46
1D05V_S0
4
1V_VCOMP_OUT
VCCST_GD_CPU
R706
R706
1 2
150R2F-4-L-GP
150R2F-4-L-GP
U,TT,V*N.'$T*DC/
VCC_SENSE46
R705
R705 43R2J-GP
43R2J-GP
1D35V_CPU_VDDQ_S 3
1V_CPU_CORE
12
1V_CPU_CORE
VCC_SENSE
VIDALERT#_CPU_R
IMVP_PWRGD_R
PWR_DEBUG
1D05V_S0
HSW_ULT_DDR3L
CPU1L
CPU1L
L59
RSVD#L59
J58
RSVD#J58
AH26
VDDQ
AJ31
VDDQ
AJ33
VDDQ
AJ37
VDDQ
AN33
VDDQ
AP43
VDDQ
AR48
VDDQ
AY35
VDDQ
AY40
VDDQ
AY44
VDDQ
AY50
VDDQ
F59
VCC
N58
RSVD#N58
AC58
RSVD#AC58
E63
VCC_SENSE
AB23
RSVD#AB23
A59
VCCIO_OUT
E20
VCCIOA_OUT
AD23
RSVD#AD23
AA23
RSVD#AA23
AE59
RSVD#AE59
L62
VIDALERT#
N63
VIDSCLK
L63
VIDSOUT
B59
VCCST_PWRGD
F60
VR_EN
C59
VR_READY
D63
VSS
H59
PWR_DEBUG#
P62
VSS
P60
RSVD_TP#P60
P61
RSVD_TP#P61
N59
RSVD_TP#N59
N61
RSVD_TP#N61
T59
RSVD#T59
AD60
RSVD#AD60
AD59
RSVD#AD59
AA59
RSVD#AA59
AE60
RSVD#AE60
AC59
RSVD#AC59
AG58
RSVD#AG58
U59
RSVD#U59
V59
RSVD#V59
AC22
VCCST
AE22
VCCST
AE23
VCCST
AB57
VCC
AD57
VCC
AG57
VCC
C24
VCC
C28
VCC
C32
VCC
HASWELL-6-GP-U
HASWELL-6-GP-U
3
HSW_ULT_DDR3L
HSW ULT POWER
HSW ULT POWER
2
12 OF 19
12 OF 19
VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC
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Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
1V_CPU_CORE
C36 C40 C44 C48 C52 C56 E23 E25 E27 E29 E31 E33 E35 E37 E39 E41 E43 E45 E47 E49 E51 E53 E55 E57 F24 F28 F32 F36 F40 F44 F48 F52 F56 G23 G25 G27 G29 G31 G33 G35 G37 G39 G41 G43 G45 G47 G49 G51 G53 G55 G57 H23 J23 K23 K57 L22 M23 M57 P57 U57 W57
Wistron Confidential document, Anyone can not Duplicate, Modify, Forward or any other purpose application without get Wistron permission
Wistron Corporation
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Wistron Corporation
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221 , Taiwan, R.O.C.
Taipei Hsien 221 , Taiwan, R.O.C.
Taipei Hsien 221 , Taiwan, R.O.C.
CPU (VCC_CORE)
CPU (VCC_CORE)
CPU (VCC_CORE)
Brook_BH
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Wednesday, F ebruary 04, 2015
Wednesday, F ebruary 04, 2015
Wednesday, F ebruary 04, 2015
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3
2
1
!!N+*R*D?4
D D
HSW_ULT_DDR3L
CPU1A
CPU1A
HSW_ULT_DDR3L
1 OF 19
1 OF 19
C54
DDI1_TXN0
HDMI_DATA_CPU_P257 HDMI_DATA_CPU_N157
3+MN
C C
HDMI_DATA_CPU_P157 HDMI_DATA_CPU_N057 HDMI_DATA_CPU_P057 HDMI_DATA_CPU_N357 HDMI_DATA_CPU_P357
DDI_VGA_DATA_CPU_N056 DDI_VGA_DATA_CPU_P056 DDI_VGA_DATA_CPU_N156 DDI_VGA_DATA_CPU_P156
+?*',*+()YT&Z*?,0'
C55 B58 C58 B55 A55 A57 B57
C51 C50 C53 B54 C49 B50 A53 B53
DDI1_TXP0
DDI1_TXN1
DDI1_TXP1
DDI1_TXN2
DDI1_TXP2
DDI1_TXN3
DDI1_TXP3
DDI2_TXN0
DDI2_TXP0
DDI2_TXN1
DDI2_TXP1
DDI2_TXN2
DDI2_TXP2
DDI2_TXN3
DDI2_TXP3
EDPDDI
EDPDDI
EDP_TXN0 EDP_TXP0 EDP_TXN1 EDP_TXP1
EDP_TXN2 EDP_TXP2 EDP_TXN3 EDP_TXP3
EDP_AUXN EDP_AUXP
EDP_RCOMP
EDP_DISP_UTIL
C45 B46 A47 B47
C47 C46 A49 B49
A45 B45
D20 A43
EDP_RCOMP
eDP_TX_CPU_N0 55HDMI_DATA_CPU_N257 eDP_TX_CPU_P0 55 eDP_TX_CPU_N1 55 eDP_TX_CPU_P1 55
eDP_TX_CPU_N2 55 eDP_TX_CPU_P2 55 eDP_TX_CPU_N3 55 eDP_TX_CPU_P3 55
eDP_AUX_CPU_N 55 eDP_AUX_CPU_P 55
$+?
$+?*W:*0$)$0X$
R801
R801 24D9R2F-L-GP
24D9R2F-L-GP
1V_VCOMP_OUT
12
Layout Note:
HASWELL-6-GP-U
HASWELL-6-GP-U
B B
Design Guideline: EDP_COMP keep routing length max 100 mils. Trace Width:20 mils.
Wistron Confidential document, Anyone can not Duplicate, Modify, Forward or any other purpose
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Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev A4
A4
5
4
3
A4
Date: Sheet
Date: Sheet
Date: Sheet of
application without get Wistron permission
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
CPU (DDI/EDP)
CPU (DDI/EDP)
CPU (DDI/EDP)
Brook_BH
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Wednesday, February 04, 2015
Wednesday, February 04, 2015
Wednesday, February 04, 2015
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1D35V_CPU_VDDQ_S3
D D
12
EC1006
EC1006
C C
Power current=3A
12
SC2D2U10V3KX-L-GP
SC2D2U10V3KX-L-GP
C1040
C1040
SC10U6D3V3MX-L-GP
SC10U6D3V3MX-L-GP
12
12
DY
DY
EC1007
EC1007
SC2D2U10V3KX-L-GP
SC2D2U10V3KX-L-GP
C1035
C1035
SC10U6D3V3MX-L-GP
SC10U6D3V3MX-L-GP
12
12
C1036
C1036
EC1008
EC1008
SC2D2U10V3KX-L-GP
SC2D2U10V3KX-L-GP
C1037
C1037
SC10U6D3V3MX-L-GP
SC10U6D3V3MX-L-GP
EC1009
EC1009
SC2D2U10V3KX-L-GP
SC2D2U10V3KX-L-GP
12
C1038
C1038
SC10U6D3V3MX-L-GP
SC10U6D3V3MX-L-GP
12
SC10U6D3V3MX-L-GP
SC10U6D3V3MX-L-GP
12
12
C1039
C1039
SC10U6D3V3MX-L-GP
SC10U6D3V3MX-L-GP
1V_CPU_CORE
12
PC1020
PC1020
Power current=40A
12
PC1017
PC1017
12
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
PC1007
PC1007
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
12
PC1016
PC1016
12
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
PC1006
PC1006
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
12
PC1015
PC1015
12
PC1005
PC1005
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
12
PC1013
PC1013
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
12
PC1012
PC1012
12
PC1002
PC1002
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
PC1010
PC1010
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
12
PC1019
PC1019
12
PC1009
PC1009
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
12
PC1018
PC1018
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
12
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
U,0*N.'$T*C$",%%$.[ @@*?&0'
1V_CPU_CORE
DY
DY
DY
DY
DY
B B
DY
12
EC1001
EC1001
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
DY
12
EC1002
EC1002
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
12
DY
EC1003
EC1003
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
DY
12
EC1004
EC1004
DY
12
EC1005
EC1005
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
DY
DY
12
EC1016
EC1016
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
1V_CPU_CORE 1V_CPU_CORE
15WDY/28W
15WDY/28W
12
PT1001
PT1001 ST220U2VDM-8-GP
ST220U2VDM-8-GP
12
C1002
C1002
C1003
C1003
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
12
C1004
C1004
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
12
C1005
C1005
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
12
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
U,0*N.'$T*C$",%%$.[
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A A
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev A4
A4
A4
5
4
3
Date: Sheet of
Date: Sheet of
Date: Sheet of
@@*?&0'
Wistron Confidential document, Anyone can not Duplicate, Modify, Forward or any other purpose application without get Wistron permission
CPU (Power CAP1)
CPU (Power CAP1)
CPU (Power CAP1)
Brook_BH
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Wednesday, February 04, 2015
Wednesday, February 04, 2015
Wednesday, February 04, 2015
2
Brook_BH
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
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Page 21,
MA\]*8^J;:A
D D
1D05V_S 0
12
C1102
C1102
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
12
C1103
C1103
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
C1102;C1103
pin K9 L10
1D05V_S 0
L1101
L1101
1 2
IND-2D2UH-1 96-GP
IND-2D2UH-1 96-GP
12
C1108
C1108
SC4D7U6D3V3KX-L-GP
SC4D7U6D3V3KX-L-GP
DY
DY
12
C1109
C1109
SC10U6D3V3MX-L-GP
SC10U6D3V3MX-L-GP
C1108;C1109
pin B18
1D05V_S 0
L1102
L1102
1 2
IND-2D2UH-1 96-GP
IND-2D2UH-1 96-GP
12
C1104
C1104
SC4D7U6D3V3KX-L-GP
SC4D7U6D3V3KX-L-GP
DY
DY
1D05V_V CCSATA3PLL_S 01D05V_V CCUSB3PLL_S0
12
C1106
C1106
SC10U6D3V3MX-L-GP
SC10U6D3V3MX-L-GP
C1104;C1106
pin B11
3D3V_RT C_AUX
C1135
C1135
12
C1135;C1136
C1136
C1136
SCD1U25V2KX-L-GP
SCD1U25V2KX-L-GP
pin AG10
12
3D3V_SU S
12
C1116
C1116
C1116
pin AC9
SC10U6D 3V3MX-L-GP
SC10U6D 3V3MX-L-GP
C C
MA\]*J^<I9A
3D3V_S0
12
12
C1119
C1119
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
B B
1D05V_S 0
12
C1144
C1144
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
A A
C1101 pin V8
C1101
C1101
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
C1119 pin K14
!""##
$%&'$()*
5
1D05V_S 0
L1104
L1104
1 2
IND-2D2UH-1 96-GP
IND-2D2UH-1 96-GP
12
1D05V_S 0 1D05V_S 0
12
12
12
C1134
C1134
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
4
C1141
C1141
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
DY
DY
C1110
C1110
1D05V_V CCACLKPLL_S0 1D05V_V CCCLK_S0
C1118;C1120
12
C1120
C1120
C1118
C1118
SC10U6D3V3MX-L-GP
SC10U6D3V3MX-L-GP
SC4D7U6D3V3KX-L-GP
SC4D7U6D3V3KX-L-GP
DY
DY
!"""+,!""-#$$ $%&'$.""
SC22U6D3V5MX-L3-GP
SC22U6D3V5MX-L3-GP
!""#"$ $%&'$()/
pin A20
1D05V_S 0
12
L1103
L1103
1 2
IND-2D2UH-1 96-GP
IND-2D2UH-1 96-GP
12
C1122
C1122
C1123
C1123
SC4D7U6D3V3KX-L-GP
SC4D7U6D3V3KX-L-GP
SC10U6D3V3MX-L-GP
SC10U6D3V3MX-L-GP
DY
DY
3
C1122;C1123
pin AA21
12
C1111
C1111
SC4D7U6D3V3KX-L-GP
SC4D7U6D3V3KX-L-GP
MA\]*8^9>A
C1111;C1115
C1115
C1115
12
SC10U6D3V3MX-L-GP
SC10U6D3V3MX-L-GP
DY
DY
pin J18
SC1U6D3V3KX-L1-GP
SC1U6D3V3KX-L1-GP
Wistron Confidential document, Anyone can not Duplicate, Modify, Forward or any other purpose
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Title
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Size Document N umber Rev
Size Document N umber Rev Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
application without get Wistron permission
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
CPU (Power CAP2)
CPU (Power CAP2)
CPU (Power CAP2)
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Wednesd ay, February 04, 2015
Wednesd ay, February 04, 2015
Wednesd ay, February 04, 2015
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SSID = MEMORY
DM2
D D
C C
B B
DT,)$*CAM>*DA*_*+`*Y(.
VREF_CA
12
C1217
C1217
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
A A
VREF_DQ0
12
C1218
C1218
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
5
M_A_A[15:0]5
M_A_BS25
M_A_BS05 M_A_BS15
M_A_DQ[15:0]5
M_A_DQ[31:16]5
M_A_DQ[47:32]5
M_A_DQ[63:48]5
M_A_DQS_DN[7: 0]5
M_A_DQS_DP[7:0]5
VREF_CA5,13
DDR3_DR AMRST#4,13
M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63
M_A_DQS_DN0 M_A_DQS_DN1 M_A_DQS_DN2 M_A_DQS_DN3 M_A_DQS_DN4 M_A_DQS_DN5 M_A_DQS_DN6 M_A_DQS_DN7
M_A_DQS_DP0 M_A_DQS_DP1 M_A_DQS_DP2 M_A_DQS_DP3 M_A_DQS_DP4 M_A_DQS_DP5 M_A_DQS_DP6 M_A_DQS_DP7
M_A_DIM0_ODT0 M_A_DIM0_ODT1
VREF_CA VREF_DQ0
0D675V_VREF_S0
M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15
DM2
98
A0
97
A1
96
A2
95
A3
92
A4
91
A5
90
A6
86
A7
89
A8
85
A9
107
A10/AP
84
A11
83
A12
119
A13
80
A14
78
A15
79
A16/BA2
109
BA0
108
BA1
5
DQ0
7
DQ1
15
DQ2
17
DQ3
4
DQ4
6
DQ5
16
DQ6
18
DQ7
21
DQ8
23
DQ9
33
DQ10
35
DQ11
22
DQ12
24
DQ13
34
DQ14
36
DQ15
39
DQ16
41
DQ17
51
DQ18
53
DQ19
40
DQ20
42
DQ21
50
DQ22
52
DQ23
57
DQ24
59
DQ25
67
DQ26
69
DQ27
56
DQ28
58
DQ29
68
DQ30
70
DQ31
129
DQ32
131
DQ33
141
DQ34
143
DQ35
130
DQ36
132
DQ37
140
DQ38
142
DQ39
147
DQ40
149
DQ41
157
DQ42
159
DQ43
146
DQ44
148
DQ45
158
DQ46
160
DQ47
163
DQ48
165
DQ49
175
DQ50
177
DQ51
164
DQ52
166
DQ53
174
DQ54
176
DQ55
181
DQ56
183
DQ57
191
DQ58
193
DQ59
180
DQ60
182
DQ61
192
DQ62
194
DQ63
10
DQS0#
27
DQS1#
45
DQS2#
62
DQS3#
135
DQS4#
152
DQS5#
169
DQS6#
186
DQS7#
12
DQS0
29
DQS1
47
DQS2
64
DQS3
137
DQS4
154
DQS5
171
DQS6
188
DQS7
116
ODT0
120
ODT1
126
VREF_CA
1
VREF_DQ
30
RESET#
203
VTT1
204
VTT2
SKT_DDR 204P SMD
SKT_DDR 204P SMD
DDR3-204P- 263-GP-U
DDR3-204P- 263-GP-U
62.10024.S61
62.10024.S61
2ND = 62.10024.M51
2ND = 62.10024.M51
3RD = 62.10024.Q71
3RD = 62.10024.Q71
4TH = 62.10017.I21
4TH = 62.10017.I21
RAS#
CAS#
CS0# CS1#
CKE0 CKE1
CK0#
CK1#
EVENT#
VDDSPD
NC#1 NC#2
NC#/TEST
VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8
VDD9 VDD10 VDD11 VDD12 VDD13 VDD14 VDD15 VDD16 VDD17 VDD18
4
NP1
NP1
NP2
NP2
110 113
WE#
115
114 121
73 74
101
CK0
103
102
CK1
104
11
DM0
28
DM1
46
DM2
63
DM3
136
DM4
153
DM5
170
DM6
187
DM7
200
SDA
202
SCL
SA0 SA1
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
TS#_DIMM1_1
198
199
197 201
77 122
1D35V_S3
125
75 76 81 82 87 88 93 94 99 100 105 106 111 112 117 118 123 124
2 3 8 9 13 14 19 20 25 26 31 32 37 38 43 44 48 49 54 55 60 61 65 66 71 72 127 128 133 134 138 139 144 145 150 151 155 156 161 162 167 168 172 173 178 179 184 185 189 190 195 196 205 206
1D35V_S3
12
12
C1223
C1223
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
0D675V_VREF_S0
12
C1214
C1214
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
DY
DY
M_A_RAS# 5 M_A_WE# 5 M_A_CAS# 5
M_A_CS#0 5 M_A_CS#1 5
M_A_CKE0 5 M_A_CKE1 5
M_A_CLK0 5 M_A_CLK#0 5
M_A_CLK1 5 M_A_CLK#1 5
SMB_DATA 13,18 SMB_CLK 13,18
TS#_DIMM1_1 13
DDR3_DR AMRST#
DDR3_DR AMRST#
5&Z,-'*F,'$] ?T&"$*'#$)$*D&Y)*.$&0 !EH+NMMA^
!E+NMM*A*+@DE4?5NFP
12
12
C1208
C1208
C1207
C1207
C1206
C1206
SC10U6D3V3MX-L-GP
SC10U6D3V3MX-L-GP
12
C1222
C1222
12
C1215
C1215
SC10U6D3V3MX-L-GP
SC10U6D3V3MX-L-GP
SC10U6D3V3MX-L-GP
SC10U6D3V3MX-L-GP
DY
DY
12
12
C1221
C1221
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
?T&"$*'#$)$*"&Y) "T,)$*',*K66>*&.[*K66<^
12
12
C1219
C1219
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
DY
DY
3D3V_S0
C1203
C1203
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
12
DY
DY
ET1201
ET1201
12
TVL-0402-01-AB1- 1-GP
TVL-0402-01-AB1- 1-GP
ET1202
ET1202
TVL-0402-01-AB1- 1-GP
TVL-0402-01-AB1- 1-GP
12
C1209
C1209
SC10U6D3V3MX-L-GP
SC10U6D3V3MX-L-GP
DY
DY
C1220
C1220
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
C1216
C1216
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
12
12
C1210
C1210
SC10U6D3V3MX-L-GP
SC10U6D3V3MX-L-GP
Note: If SA0 DIM0 = 0, SA1_DIM0 = 0 SO-DIMMA SPD Address is 0xA0 SO-DIMMA TS Address is 0x30
If SA0 DIM0 = 1, SA1_DIM0 = 0 SO-DIMMA SPD Address is 0xA2 SO-DIMMA TS Address is 0x32
DDR_PG_C TRL4
3
SODIMM Memory Connectivity and Topology ODT Signal Connectivity and Support For DDR3L SODIMM designs, Intel recommends ODT signals not to be routed between CPU and DIMM on platform, leave ODT at CPU as no-connect (open), and tie DIMM ODT to VDDQ through FET and resistor. The reason for this additional ODT-control circuitry on the platform is to save power dissipation by turning off VDDQ to VTT path during low power states, as ODT signal is terminated to VTT through RTT on SODIMM. The ODT value for DDR3L SODIMM 1-DPC platform will be encoded in the write command and use RTT_NOM = Off and RTT_WR = (60,120) Ohm.
CPU ODT output would be NOCON SODIMM ODT input should be tied to VDDQ through a FET and a resistor to
support low power states.
1D35V_S3
DS
Q1203
Q1203 DMN5L06K-7-G P
1D35V_S3
Q1202
Q1202 DMN5L06K-7-G P
DMN5L06K-7-G P
84.05067.031
84.05067.031
`><J<*`><J8 I:^J9J7;^J8>
3D3V_S0
12
R1212
G
R1212 220KR2J-L2-GP
220KR2J-L2-GP
DS
K'# >K
M_VREF_DQ_D IM05
12
C1202
C1202
SCD022U16V2KX-3GP
SCD022U16V2KX-3GP
VREF_DIMM0
R1206
R1206 24D9R2F-L-G P
24D9R2F-L-G P
1 2
R1205
R1205
1 2
2R2J-2-GP
2R2J-2-GP
1D35V_S3
12
12
G
R1203
R1203 1K8R2F-GP
1K8R2F-GP
R1202
R1202 1K8R2F-GP
1K8R2F-GP
DMN5L06K-7-G P
84.05067.031
84.05067.031
M_A_B_DIM_ODT
DDR_PG_OU T 49
VREF_DQ0
U,0*N.'$T*C$",%%$.[*DT,)$*',*+NMM
2
E+6*0$)()',0*%-)'*a$*77^9*,#%
R1208
R1208
M_A_DIM0_ODT0
1 2
66D5R2F-GP
66D5R2F-GP
R1209
R1209
M_A_DIM0_ODT1
1 2
66D5R2F-GP
66D5R2F-GP
R1210
R1210
1 2
66D5R2F-GP
66D5R2F-GP
R1211
R1211
1 2
66D5R2F-GP
66D5R2F-GP
Wistron Confidential document, Anyone can not Duplicate, Modify, Forward or any other purpose application without get Wistron permission
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Title
Title
Title
DDR3-SODIMM1
DDR3-SODIMM1
DDR3-SODIMM1
Size Document Num ber Rev
Size Document Num ber Rev
Size Document Num ber Rev A2
A2
A2
Wednesd ay, February 04, 2015
Wednesd ay, February 04, 2015
Wednesd ay, February 04, 2015 Date: Sheet of
Date: Sheet of
Date: Sheet of
M_B_DIM0_ODT0 13
M_B_DIM0_ODT1 13
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,
21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,
21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih, Taipei Hsie n 221, Taiwan, R.O.C.
Taipei Hsie n 221, Taiwan, R.O.C.
Taipei Hsie n 221, Taiwan, R.O.C.
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1
12 106
12 106
12 106
-1M
-1M
-1M
5
Dr-Bios.com
4
3
2
1
SSID = MEMORY
DM1
M_B_A[15:0]5
D D
M_B_BS25
M_B_BS05 M_B_BS15
M_B_DQ[15:0]5
M_B_DQ[31:16]5
C C
M_B_DQ[47:32]5
M_B_DQ[63:48]5
B B
M_B_DQS_DN[7:0]5
DDR3_DRAMRST#
12
EC1301
EC1301
AZ5325-01FDR7G-GP
DY
DY
AZ5325-01FDR7G-GP
M_B_DQS_DP[7:0]5
Reserve for EMC
M_B_DIM0_ODT012 M_B_DIM0_ODT112
DT,)$*CAM8*DA*_*+`*Y(.
12
C1302
C1302
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
A A
VREF_DQ1VREF_CA
12
C1304
C1304
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
VREF_CA5,12
DDR3_DRAMRST#4,12
0D675V_VREF_S0
M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15
M_B_DQ23 M_B_DQ17 M_B_DQ20 M_B_DQ19 M_B_DQ22 M_B_DQ16 M_B_DQ21 M_B_DQ18 M_B_DQ5 M_B_DQ4 M_B_DQ7 M_B_DQ6 M_B_DQ3 M_B_DQ2 M_B_DQ0 M_B_DQ1 M_B_DQ9 M_B_DQ14 M_B_DQ11 M_B_DQ13 M_B_DQ12 M_B_DQ8 M_B_DQ15 M_B_DQ10 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ31 M_B_DQ29 M_B_DQ30 M_B_DQ28 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ38 M_B_DQ32 M_B_DQ33 M_B_DQ37 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63
M_B_DQS_DN2 M_B_DQS_DN0 M_B_DQS_DN1 M_B_DQS_DN3 M_B_DQS_DN4 M_B_DQS_DN5 M_B_DQS_DN6 M_B_DQS_DN7
M_B_DQS_DP2 M_B_DQS_DP0 M_B_DQS_DP1 M_B_DQS_DP3 M_B_DQS_DP4 M_B_DQS_DP5 M_B_DQS_DP6 M_B_DQS_DP7
VREF_CA VREF_DQ1
5
4
DM1
98
A0
97
A1
96
A2
95
A3
92
A4
91
A5
90
A6
86
A7
89
A8
85
A9
107
A10/AP
84
A11
83
A12
119
A13
80
A14
78
A15
79
A16/BA2
109
BA0
108
BA1
5
DQ0
7
DQ1
15
DQ2
17
DQ3
4
DQ4
6
DQ5
16
DQ6
18
DQ7
21
DQ8
23
DQ9
33
DQ10
35
DQ11
22
DQ12
24
DQ13
34
DQ14
36
DQ15
39
DQ16
41
DQ17
51
DQ18
53
DQ19
40
DQ20
42
DQ21
50
DQ22
52
DQ23
57
DQ24
59
DQ25
67
DQ26
69
DQ27
56
DQ28
58
DQ29
68
DQ30
70
DQ31
129
DQ32
131
DQ33
141
DQ34
143
DQ35
130
DQ36
132
DQ37
140
DQ38
142
DQ39
147
DQ40
149
DQ41
157
DQ42
159
DQ43
146
DQ44
148
DQ45
158
DQ46
160
DQ47
163
DQ48
165
DQ49
175
DQ50
177
DQ51
164
DQ52
166
DQ53
174
DQ54
176
DQ55
181
DQ56
183
DQ57
191
DQ58
193
DQ59
180
DQ60
182
DQ61
192
DQ62
194
DQ63
10
DQS0#
27
DQS1#
45
DQS2#
62
DQS3#
135
DQS4#
152
DQS5#
169
DQS6#
186
DQS7#
12
DQS0
29
DQS1
47
DQS2
64
DQS3
137
DQS4
154
DQS5
171
DQS6
188
DQS7
116
ODT0
120
ODT1
126
VREF_CA
1
VREF_DQ
30
RESET#
203
VTT1
204
VTT2
SKT_DDR 204P SMD
SKT_DDR 204P SMD
DDR3-204P-262-GP-U
DDR3-204P-262-GP-U
62.10024.S21
62.10024.S21
2ND = 62.10024.M31
2ND = 62.10024.M31
3RD = 62.10024.Q61
3RD = 62.10024.Q61
4TH = 62.10017.I31
4TH = 62.10017.I31
RAS#
CAS#
CS0# CS1#
CKE0 CKE1
CK0#
CK1#
EVENT#
VDDSPD
NC#1 NC#2
NC#/TEST
VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8
VDD9 VDD10 VDD11 VDD12 VDD13 VDD14 VDD15 VDD16 VDD17 VDD18
WE#
DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7
NP1
NP1
NP2
NP2
110 113 115
114 121
73 74
101
CK0
103
102
CK1
104
11 28 46 63 136 153 170 187
200
SDA
202
SCL
SA0 SA1
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
TS#_DIMM1_1
198
199
197
SA1_DIM1
201
77 122
1D35V_S3
125
75 76 81 82 87 88 93 94 99 100 105 106 111 112 117 118 123 124
2 3 8 9 13 14 19 20 25 26 31 32 37 38 43 44 48 49 54 55 60 61 65 66 71 72 127 128 133 134 138 139 144 145 150 151 155 156 161 162 167 168 172 173 178 179 184 185 189 190 195 196 205 206
1D35V_S3
0D675V_VREF_S0
12
C1314
C1314
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
3
M_B_RAS# 5 M_B_WE# 5 M_B_CAS# 5
M_B_CS#0 5 M_B_CS#1 5
M_B_CKE0 5 M_B_CKE1 5
M_B_CLK0 5 M_B_CLK#0 5
M_B_CLK1 5 M_B_CLK#1 5
SMB_DATA 12,18 SMB_CLK 12,18
3D3V_S0
12
C1303
C1303
DY
DY
Layout Note: Place these Caps near SO-DIMMB.
SODIMM B DECOUPLING
12
12
C1305
C1305
SC5D6P50V2CN-1GP
SC5D6P50V2CN-1GP
12
C1320
C1320
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
?T&"$*'#$)$*"&Y)*"T,)$*', K66>*&.[*K66<^
12
C1315
C1315
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
12
C1306
C1306
SC56P50V2JN-2GP
SC56P50V2JN-2GP
12
12
C1321
C1321
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
DY
DY
12
C1316
C1316
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
C1307
C1307
C1318
C1318
12
Note: SO-DIMMB SPD Address is 0xA4 SO-DIMMB TS Address is 0x34
SO-DIMMB is placed farther from the Processor than SO-DIMMA
Thermal EVENT
12
DY
DY
C1310
C1310
SC10U6D3V3MX-L-GP
SC10U6D3V3MX-L-GP
SA1_DIM1
TS#_DIMM1_1
TS#_DIMM1_112
DY
DY
DY
DY
12
12
C1308
C1308
C1309
C1309 SC10U6D3V3MX-L-GP
SC10U6D3V3MX-L-GP
SC10U6D3V3MX-L-GP
SC10U6D3V3MX-L-GP
SC10U6D3V3MX-L-GP
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
SC10U6D3V3MX-L-GP
12
C1319
C1319
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
RN1314
RN1314
1 2 3
SRN10KJ-L-GP
SRN10KJ-L-GP
M_VREF_DQ_DIM15
3D3V_S0
4
12
C1311
C1311
SCD022U16V2KX-3GP
SCD022U16V2KX-3GP
VREF_DIMM1
R1307
R1307 24D9R2F-L-GP
24D9R2F-L-GP
1 2
R1306
R1306
1 2
2R2J-2-GP
2R2J-2-GP
1D35V_S3
12
12
R1304
R1304 1K8R2F-GP
1K8R2F-GP
R1303
R1303 1K8R2F-GP
1K8R2F-GP
VREF_DQ1
U,0*N.'$T*C$",%%$.[*DT,)$*',*+NMM
DY
DY
C1317
C1317
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
Wistron Confidential document, Anyone can not Duplicate, Modify, Forward or any other purpose application without get Wistron permission
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Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
DDR3-SODIMM2
DDR3-SODIMM2
DDR3-SODIMM2
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev Custom
Custom
Custom
Wednesday, February 04, 2015
Wednesday, February 04, 2015
Wednesday, February 04, 2015 Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Taipei Hsien 221, Taiwan, R.O.C.
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1
13 106
13 106
13 106
-1M
-1M
-1M
5
Dr-Bios.com
3D3V_S0
D D
R1533
R1533
12
8K2R2J-3-GP
RN1504
RN1504 SRN10KJ-6-GP
SRN10KJ-6-GP
1 2 3 4 5
RN1505
RN1505 SRN10KJ-L-GP
SRN10KJ-L-GP
1 2 3
C C
8 7 6
4
8K2R2J-3-GP
INT_PIRQC#
WLAN_CLKREQ_CPU#
INT_PIRQB# INT_PIRQD#
20141014 Rober
PSW_CLR# LAN_DIS#
eDP_BLCTRL_CPU55
eDP_BLEN_CPU24
eDP_VDDEN_CPU55
INT_PIRQA#20
DGPU_HOLD_RST#76,79
DGPU_PWR_EN#86,87
TP_IN#20,65
DGPU_PWROK24,85,86
WLAN_CLKREQ_CPU# 18,61,89
LAN_DIS# 20
INT_PIRQA# INT_PIRQB# INT_PIRQC# INT_PIRQD#
PSW_CLR#
4
PEG_CLKREQ_CPU# 18,76
CPU1I
CPU1I
B8
EDP_BKLCTL
A9
EDP_BKLEN
C6
EDP_VDDEN
U6
PIRQA#/GPIO77
P4
PIRQB#/GPIO78
N4
PIRQC#/GPIO79
N2
PIRQD#/GPIO80
AD4
PME#
U7
GPIO55
L1
GPIO52
L3
GPIO54
R5
GPIO51
L4
GPIO53
eDP SIDEBAND
eDP SIDEBAND
PCIE
PCIE
3
HSW_ULT_DDR3L
HSW_ULT_DDR3L
DISPLAY
DISPLAY
9 OF 19
9 OF 19
DDPB_CTRLCLK
DDPB_CTRLDATA
DDPC_CTRLCLK
DDPC_CTRLDATA
DDPB_AUXN DDPC_AUXN DDPB_AUXP DDPC_AUXP
DDPB_HPD
DDPC_HPD
EDP_HPD
B9 C9 D9 D11
2
3D3V_S0
4
1
2 3
RN1506
RN1506 SRN2K2J-5-GP
SRN2K2J-5-GP
HDMI_CLK_CPU 57 HDMI_DATA_CPU 57
DP_CLK_CPU DP_CLK_DATA
1
3D3V_S0
23
1
4
11/19 pull high DDPCCTRLCLK & DATA
C5 B6 B5 A6
C8 A8 D6
HDMI_DET_CPU 57
eDP_HPD_CPU 55
PCH_DPC_AUXN 56
PCH_DPC_AUXP 56
CRT_PCH_HPD 56
RN1509
RN1509 SRN2K2J-5-GP
SRN2K2J-5-GP
HASWELL-6-GP-U
B B
eDP_BLEN_CPU
R1501
R1501 100KR2J-4-GP
100KR2J-4-GP
1 2
RN1503
RN1503 SRN10KJ-L-GP
DGPU_PWR_EN#
DGPU_HOLD_RST#
A A
SRN10KJ-L-GP
1 2 3
4
5
4
HASWELL-6-GP-U
PSW_CLR#
21
Pass Word Clear
G1501
G1501 GAP-OPEN
GAP-OPEN
Wistron Confidential document, Anyone can not Duplicate, Modify, Forward or any other purpose
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
CPU(EDP SIDEBAND/GPIO/DDI)
CPU(EDP SIDEBAND/GPIO/DDI)
CPU(EDP SIDEBAND/GPIO/DDI)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev A4
A4
A4
Date: Sheet
Date: Sheet
3
Date: Sheet of
application without get Wistron permission
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
Brook_BH
Brook_BH
Wednesday, February 04, 2015
Wednesday, February 04, 2015
Wednesday, February 04, 2015
2
Brook_BH
15 106
of
15 106
of
15 106
1
-1M
-1M
-1M
5
Dr-Bios.com
4
3
2
1
4!/*6&aT$
CPU1K
CPU1K
P?4*?@P*/4!
D D
5AF*
C C
c5AF
b,0*3&)V$TT*8+*D&%$0&
PEG_RX_ CPU_N076 PEG_RX_ CPU_P076
PEG_TX_ CON_N076 PEG_TX_ CON_P076
PEG_RX_ CPU_N176 PEG_RX_ CPU_P176
PEG_TX_ CON_N176 PEG_TX_ CON_P176
PEG_RX_ CPU_N276 PEG_RX_ CPU_P276
PEG_TX_ CON_N276 PEG_TX_ CON_P276
PEG_RX_ CPU_N376 PEG_RX_ CPU_P376
PEG_TX_ CON_N376 PEG_TX_ CON_P376
PCIE_RX_C PU_N331 PCIE_RX_C PU_P331
PCIE_TX_L AN_N331 PCIE_TX_L AN_P331
PCIE_RX_C PU_N461,8 9 PCIE_RX_C PU_P46 1,89
PCIE_TX_W LAN_N461,89 PCIE_TX_W LAN_P461,89
b,0*/0,&[V$TT*8+*D&%$0&
PCIE_RX_C PU_N237 PCIE_RX_C PU_P237
PCIE_TX_U SB_N237 PCIE_TX_U SB_P237
PX
PX
C1605 SCD1U16 V2KX-L-GP
C1605 SCD1U16 V2KX-L-GP
1 2
C1606 SCD1U16 V2KX-L-GP
C1606 SCD1U16 V2KX-L-GP
1 2
PX
PX
PX
PX
C1607 SCD1U16 V2KX-L-GP
C1607 SCD1U16 V2KX-L-GP
1 2
C1608 SCD1U16 V2KX-L-GP
C1608 SCD1U16 V2KX-L-GP
1 2
PX
PX
PX
PX
C1613 SCD1U16 V2KX-L-GP
C1613 SCD1U16 V2KX-L-GP
1 2
C1614 SCD1U16 V2KX-L-GP
C1614 SCD1U16 V2KX-L-GP
1 2
PX
PX
PX
PX
C1615 SCD1U16 V2KX-L-GP
C1615 SCD1U16 V2KX-L-GP
1 2
C1616 SCD1U16 V2KX-L-GP
C1616 SCD1U16 V2KX-L-GP
1 2
PX
PX
C1621 SCD1U16 V2KX-L-GPC1621 SCD1U16 V2KX-L-GP
1 2
C1622 SCD1U16 V2KX-L-GPC1622 SCD1U16 V2KX-L-GP
1 2
C1619 SCD1U16 V2KX-L-GPC1619 SCD1U16 V2KX-L-GP
1 2
C1620 SCD1U16 V2KX-L-GPC1620 SCD1U16 V2KX-L-GP
1 2
USB30_R X_CPU_N338 USB30_R X_CPU_P338
USB30_T X_CPU_N338 USB30_T X_CPU_P33 8
C1623 SCD1U16 V2KX-L-GP
C1623 SCD1U16 V2KX-L-GP
1 2
C1624 SCD1U16 V2KX-L-GP
C1624 SCD1U16 V2KX-L-GP
1 2
1D05V_V CCUSB3PLL_S0
HW_3D
HW_3D HW_3D
HW_3D
R1601
R1601 3K01R2F -3-GP
3K01R2F -3-GP
1 2
PEG_TX_ CPU_N0 PEG_TX_ CPU_P0
PEG_TX_ CPU_N1 PEG_TX_ CPU_P1
PEG_TX_ CPU_N2 PEG_TX_ CPU_P2
PEG_TX_ CPU_N3 PEG_TX_ CPU_P3
PCIE_TX_C PU_N3 PCIE_TX_C PU_P3
PCIE_TX_C PU_N4 PCIE_TX_C PU_P4
PCIE_TX_C PU_N2 PCIE_TX_C PU_P2
PCIE_COMP
F10
PERN5_L0
E10
PERP5_L0
C23
PETN5_L0
C22
PETP5_L0
F8
PERN5_L1
E8
PERP5_L1
B23
PETN5_L1
A23
PETP5_L1
H10
PERN5_L2
G10
PERP5_L2
B21
PETN5_L2
C21
PETP5_L2
E6
PERN5_L3
F6
PERP5_L3
B22
PETN5_L3
A21
PETP5_L3
G11
PERN3
F11
PERP3
C29
PETN3
B30
PETP3
F13
PERN4
G13
PERP4
B29
PETN4
A29
PETP4
G17
PERN1/USB3RN3
F17
PERP1/USB3RP3
C30
PETN1/USB3TN3
C31
PETP1/USB3TP3
F15
PERN2/USB3RN4
G15
PERP2/USB3RP4
B31
PETN2/USB3TN4
A31
PETP2/USB3TP4
E15
RSVD#E15
E13
RSVD#E13
A27
PCIE_RCOMP
B27
PCIE_IREF
HSW_ULT_DDR3L
PCIE USB
PCIE USB
11 OF 19
11 OF 19
USB2N0 USB2P0
USB2N1 USB2P1
USB2N2 USB2P2
USB2N3 USB2P3
USB2N4 USB2P4
USB2N5 USB2P5
USB2N6 USB2P6
USB2N7 USB2P7
USB3RN1 USB3RP1
USB3TN1 USB3TP1
USB3RN2 USB3RP2
USB3TN2 USB3TP2
USBRBIAS#
USBRBIAS RSVD#AN10 RSVD#AM10
OC0/GPIO40# OC1/GPIO41# OC2/GPIO42# OC3/GPIO43#
AN8 AM8
AR7 AT7
AR8 AP8
AR10 AT10
AM15 AL15
AM13 AN13
AP11 AN11
AR13 AP13
G20 H20
C33 B34
E18 F18
B33 A33
AJ10 AJ11 AN10 AM10
AL3 AT1 AH2 AV3
USB_RBIAS
USB_OC#
USB_CPU _PN0 36 USB_CPU _PP0 36
USB_CPU _PN1 35 USB_CPU _PP1 35
USB_CPU _PN2 66 USB_CPU _PP2 6 6
USB_CPU _PN3 66 USB_CPU _PP3 6 6
USB_CPU _PN4 61,89 USB_CPU _PP4 61,89
USB_CPU _PN5 55 USB_CPU _PP5 55
USB_CPU _PN6 55 USB_CPU _PP6 5 5
USB_CPU _PN7 33 USB_CPU _PP7 33
USB30_R X_CPU_N1 35,8 9 USB30_R X_CPU_P1 35,89
USB30_T X_CPU_N1 3 5 USB30_T X_CPU_P1 35
USB30_R X_CPU_N2 35,8 9 USB30_R X_CPU_P2 35,89
USB30_T X_CPU_N2 3 5 USB30_T X_CPU_P2 35
R1611
R1611 22D6R2F -L1-GP
22D6R2F -L1-GP
1 2
3D3V_SU S
R1602
R1602 10KR2J-L -GP
10KR2J-L -GP
1 2
0 1
4!/*Y,0'J
4!/*Y,0'>
4!/*Y,0'<
4!/*Y,0'8 /6
2 3 4 5 6 7
6E4D3*!DC@@F
DD+
D&0[*C$&[$0
4!/*8^J*Y,0'J
4!/*8^J*Y,0'>
Layout Note:
1. USB_COMP usi ng 50 ohm singl e-ended impeda nce
2. Isolation Sp acing :15mil
3. Total trace length<500mil
HSW_ULT_DDR3L
Pair
Device
4!/8^J*?,0'J
4!/8^J*?,0'>
4!/8^J*?,0'<
4!/8^J*?,0'8
/6
6E4D3*!DC@@F
DD+
D&0[*C$&[$0
HASW ELL-6-GP-U
B B
A A
Layout Note:
1. PCIE_RCOMP/ PCIE_IREF trace width=12~15mi l
2. Isolation Sp acing: 12mil
3. Total trace length<500mil
5
4
HASW ELL-6-GP-U
Wistron Confidential document, Anyone can not Duplicate, Modify, Forward or any other purpose
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Title
Title
Title
Size Document N umber Rev
Size Document N umber Rev
Size Document N umber Rev A3
A3
A3
Date: Sheet of
Date: Sheet of
3
2
Date: Sheet of
application without get Wistron permission
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
CPU (PCI/USB)
CPU (PCI/USB)
CPU (PCI/USB)
Brook_BH
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Wednesd ay, February 04, 2015
Wednesd ay, February 04, 2015
Wednesd ay, February 04, 2015
Brook_BH
16 106
16 106
16 106
1
-1M
-1M
-1M
5
Dr-Bios.com
4
3
2
1
DSWODVREN - On Die DSW VR Enable
R1728
SYS_PW ROK24
PLTRST# _PCH24,31,37,4 0,61,63,68,89,91
1 2
1 2 3 4 5
PCH_PW ROK40
PCH_PW ROK
EC1701
EC1701
R1728 10KR2J-L -GP
10KR2J-L -GP
RN1712
RN1712
8 7 6
SRN10KJ -6-GP
SRN10KJ -6-GP
20141216 -1
12
PM_SUS_ STAT#
MSATA_P EDET2 SYS_RESET #
MSATA_P EDET1
R1724 0R0402-PAD-1-GPR1724 0R0402-PAD-1-GP
1 2
DY
DY
MSATA_P EDET2 19
MSATA_P EDET1 19
PM_SUSW ARN#24
PM_PW RBTN#20,24,89
AC_PRES ENT24
R1727
R1727 10KR2J-L -GP
10KR2J-L -GP
1 2
HSW_ULT_DDR3L
CPU1H
CPU1H
PM_SUSA CK#24
BATLOW #20
PM_SUSA CK# SYS_RESET # SYS_PW ROK_R
PM_RSMR ST# PM_SUSW ARN#
BATLOW #
AK2
SUSACK#
AC3
SYS_RESET#
AG2
SYS_PWROK
AY7
PCH_PWROK
AB5
APWROK
AG7
PLTRST#
AW6
RSMRST#
AV4
SUSWARN#/SUSPWRDNACK#/GPIO30
AL7
PWRBTN#
AJ8
ACPRESENT/GPIO31
AN4
BATLOW#/GPIO72
AF3
SLP_S0#
AM5
SLP_WLAN#/GPIO29
HSW_ULT_DDR3L
SYSTEM POWER MANAGEMENT
SYSTEM POWER MANAGEMENT
SUS_STAT#/GPIO61
8 OF 19
8 OF 19
DSWVRMEN
DPWROK
WAKE#
CLKRUN#/GPIO32
SUSCLK/GPIO62
SLP_S5#/GPIO63
SLP_S4# SLP_S3#
SLP_A# SLP_SUS# SLP_LAN#
AW7 AV5 AJ5
V5 AG4 AE6 AP5
AJ6 AT4 AL5 AP4 AJ7
DSWO DVREN PCH_DPW ROK
SUS_CLK _CPU
PM_SLP_ SUS#
R1739
R1739
1 2
0R0402-P AD-1-GP
0R0402-P AD-1-GP
D D
3D3V_SU S
3D3V_S0
C C
AZ5325-0 1FDR7G-GP
AZ5325-0 1FDR7G-GP
HIGH Enabled (DEFAULT)
LOW Disabled
3D3V_RT C_AUX
R1717
R1717
1 2
330KR2J -L-GP
330KR2J -L-GP
DSWO DVREN
PM_RSMR ST#
PCH_PCIE_ WAKE# 24,31,61,63
PM_CLKR UN#_EC 24,9 1
PM_SUS_ STAT# 91
SUS_CLK _CPU 61,63
PM_SLP_ S4# 24,49 PM_SLP_ S3# 24,40,4 8,51
PM_SLP_ SUS# 2 4,39
PLTRST# _PCH
12
EC1702
AZ5325-0 1FDR7G-GP
AZ5325-0 1FDR7G-GP
B B
EC1702
DY
DY
Cloes to CPU
3D3V_S5
A A
RN1701
RN1701 SRN10KJ -6-GP
SRN10KJ -6-GP
1 2 3 4 5
8
AC_PRES ENT
7
RTC_DET #
6
PCH_PCIE_ WAKE#
MCP_GPIO1 2 20
RTC_DET # 20,2 5
PCH_PCIE_ WAKE# 24,31,61,63
DY
DY
R1738
R1738 0R2J-L-GP
0R2J-L-GP
1 2
PM_SUSA CK#PM_SUSW ARN#
3D3V_AU X_S5
R1716
R1716 10KR2J-L -GP
10KR2J-L -GP
1 2
3V_5V_P OK_#
5
4
HASW ELL-6-GP-U
HASW ELL-6-GP-U
Non_DS3
Non_DS3
R1709
R1709 100KR2J -4-GP
100KR2J -4-GP
1 2
5
6
Q1701
Q1701
34
2
1
2N7002K DW-GP
2N7002K DW-GP
84.2N702.A3F
84.2N702.A3F
2nd = 75.00601.07C
2nd = 75.00601.07C
3rd = 84.2N702.F3F
3rd = 84.2N702.F3F
3
PM_RSMR ST#
3V_5V_P OK_C
R1712
R1712 1KR2J-L2 -GP
1KR2J-L2 -GP
12
R1740
R1740
1 2
0R0402-P AD-1-GP
0R0402-P AD-1-GP
DY_DS3
DY_DS3
R1721
R1721 0R2J-L-GP
0R2J-L-GP
1 2
PM_SLP_ SUS#
PCH_DPW ROK
RSMRST# _KBC 24
3V_5V_P OK 45
2
DY_DS3
DY_DS3
R1737
R1737
1 2
0R2J-L-GP
0R2J-L-GP
DY_DS3
DY_DS3
R1732
R1732 10KR2J-L -GP
10KR2J-L -GP
1 2
PM_SUSW ARN#
PM_CLKR UN#_EC24,91
Brook_BH
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Title
Title
Title
Size Document N umber Rev
Size Document N umber Rev
Size Document N umber Rev A3
A3
A3
Wednesd ay, February 04, 2015
Wednesd ay, February 04, 2015
Wednesd ay, February 04, 2015
Date: Sheet of
Date: Sheet of
Date: Sheet of
PM_CLKR UN#_EC
Wistron Confidential document, Anyone can not Duplicate, Modify, Forward or any other purpose application without get Wistron permission
CPU (DMI/FDI/PM)
CPU (DMI/FDI/PM)
CPU (DMI/FDI/PM)
Brook_BH
Brook_BH
Brook_BH
KBC_DPW ROK 24
R1702
R1702 1KR2J-L2 -GP
1KR2J-L2 -GP
R1719
R1719 10KR2J-L -GP
10KR2J-L -GP
1 2
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
1
3D3V_SU S
12
3D3V_S0
17 106
17 106
17 106
-1M
-1M
-1M
5
Dr-Bios.com
"T,)$*',*?D3
3D3V_S0
RN1808
RN1808
1 2 3 4 5
SRN10KJ -6-GP
SRN10KJ -6-GP RN1806
RN1806
1 2
D D
3 4 5
SRN10KJ -6-GP
SRN10KJ -6-GP
P?4*?@P*/4!
C C
LAN_CLK REQ_CPU#
8 7
CK_REQ
6
USB_CLKREQ_CPU#
SATA_OD D_DA#
8
MSATA_C LKREQ_CPU#
7
SATA_OD D_PRSNT#
6
20141216 -1
5AF
c5AF
FPUU
H_RCIN#
MSATA_C LKREQ_CPU#63
H_RCIN# 20,24
SATA_OD D_DA# 20 ,60
SATA_OD D_PRSNT# 19,60
USB_CLK _CPU37 USB_CLK _CPU#37 USB_CLK REQ_CPU#37
CK_REQ
LAN_CLK _CPU#31
LAN_CLK _CPU31
LAN_CLK REQ_CPU#3 1
WLA N_CLK_CPU#61,89
WLA N_CLK_CPU61,89
WLA N_CLKREQ_CPU#15,61,89
PEG_CLK _CPU#76
PEG_CLK _CPU76
PEG_CLK REQ_CPU#15,76
MSATA_C LK_CPU#63
MSATA_C LK_CPU63
4
CPU1F
CPU1F
C43
CLKOUT_PCIE_N0
C42
CLKOUT_PCIE_P0
U2
PCIECLKRQ0#/GPIO18
B41
CLKOUT_PCIE_N1
A41
CLKOUT_PCIE_P1
Y5
PCIECLKRQ1#/GPIO19
C41
CLKOUT_PCIE_N2
B42
CLKOUT_PCIE_P2
AD1
PCIECLKRQ2#/GPIO20
B38
CLKOUT_PCIE_N3
C37
CLKOUT_PCIE_P3
N1
PCIECLKRQ3#/GPIO21
A39
CLKOUT_PCIE_N4
B39
CLKOUT_PCIE_P4
U5
PCIECLKRQ4#/GPIO22
B37
CLKOUT_PCIE_N5
A37
CLKOUT_PCIE_P5
T2
PCIECLKRQ5#/GPIO23
HASW ELL-6-GP-U
HASW ELL-6-GP-U
HSW_ULT_DDR3L
HSW_ULT_DDR3L
CLOCK
CLOCK
SIGNALS
SIGNALS
3
6 OF 19
6 OF 19
XTAL24_IN
XTAL24_OUT
RSVD#K21
RSVD#M21
DIFFCLK_BIASREF
TESTLOW_C35 TESTLOW_C34 TESTLOW_AK8 TESTLOW_AL8
CLKOUT_LPC_0 CLKOUT_LPC_1
CLKOUT_ITPXDP#
CLKOUT_ITPXDP_P
CPU_XTA L_24M_IN
A25
CPU_XTA L_24M_OUT
B25
K21 M21
DIFFCLK_B IAS
C26
CLK_BUF _CKSSCD_N
C35
CLK_BUF _CKSSCD_P
C34
CLK_BUF _DOT96_P
AK8
CLK_BUF _DOT96_N
AL8
LPC_CLK _CPU_P0
AN15
LPC_CLK _CPU_P1
AP15
B35 A35
CPU_XTA L_24M_IN
CPU_XTA L_24M_OUT
R1802 22R2J-2-GPR1802 22R2J-2-GP
R1807
R1807 1MR2J-L3 -GP
1MR2J-L3 -GP
1 2
R1801
R1801
1 2
3K01R2F -3-GP
3K01R2F -3-GP
R1804
R1804
22R2J-2-G P
22R2J-2-G P
R1803
R1803
22R2J-2-G P
22R2J-2-G P
12
X1801
X1801
2 3
XTAL-24M HZ-81-GP
XTAL-24M HZ-81-GP
82.30004.841
82.30004.841
2
1D05V_V CCACLKPLL_S0
12
12
41
LPC_CLK _DBG 6 8
LPC_CLK _KBC 2 4 LPC_CLK _TPM 9 1
C1808
C1808 SC15P50 V2JN-L-GP
SC15P50 V2JN-L-GP
12
C1807
C1807 SC15P50 V2JN-L-GP
SC15P50 V2JN-L-GP
12
F$$[*X$0Z*"T,)$*',*?D3
CLK_BUF _CKSSCD_N CLK_BUF _CKSSCD_P
CLK_BUF _DOT96_P CLK_BUF _DOT96_N
2 3 1
2 3 1
1
RN1810
RN1810
SRN10KJ -L-GP
SRN10KJ -L-GP
RN1811
RN1811
SRN10KJ -L-GP
SRN10KJ -L-GP
4
4
HSW_ULT_DDR3L
CPU1G
CPU1G
LPC_AD_ CPU_P02 4,68,91 LPC_AD_ CPU_P12 4,68,91 LPC_AD_ CPU_P22 4,68,91 LPC_AD_ CPU_P32 4,68,91
LPC_FRA ME#_CPU24,6 8,91
SPI_CLK_C PU24,25
B B
A A
SPI_CS_CP U_N024,25
SPI_SI_CPU24,2 5
SPI_SO_CP U24,25
SPI_WP _CPU25
SPI_HOLD_ CPU25
AU14
AW12
AY12
AW11
AV12
AA3
AC2
AA2 AA4
AF1
Y7 Y4
Y6
LAD0 LAD1 LAD2 LAD3 LFRAME#
SPI_CLK SPI_CS0# SPI_CS1# SPI_CS2# SPI_MOSI SPI_MISO SPI_IO2 SPI_IO3
HASW ELL-6-GP-U
HASW ELL-6-GP-U
HSW_ULT_DDR3L
LPC
LPC
SMBALERT#/GPIO11
SMBUS
SMBUS
C-LINKSPI
C-LINKSPI
SML0ALERT#/GPIO60
SML1ALERT#/PCHHOT#/GPIO73
5
4
7 OF 19
7 OF 19
SMBCLK
SMBDATA
SML0CLK
SML0DATA
SML1CLK/GPIO75
SML1DATA/GPIO74
CL_CLK
CL_DATA
CL_RST#
MCP_GPIO1 1
AN2
SMB_CLK _CPU
AP2
SMB_DAT A_CPU
AH1
MCP_GPIO6 0
AL2 AN1 AK1
MCP_GPIO7 3
AU4 AU3 AH3
AF2 AD2 AF4
SMB_DAT A_CPU
SMB_CLK _CPU
3
3D3V_S0
SML0_DA TA_CPU 69
SML1_CL K 24,79 SML1_DA TA 24,79
@D*Q*6#$0%&Q*KPA
RN1807
RN1807
1
4
2 3
SRN2K2J -5-GP
SRN2K2J -5-GP
Q1801
Q1801
1
6
2
5
34
2N7002K DW-GP
2N7002K DW-GP
84.2N702.A3F
84.2N702.A3F
2nd = 75.00601.07C
2nd = 75.00601.07C
3rd = 84.2N702.F3F
3rd = 84.2N702.F3F
SML0_CL K_CPU 6 9
MCP_GPIO7 3 20
SMB_DAT A 12,13
SMB_CLK 12,13
2
3D3V_SU S
RN1803
SMB_CLK _CPU SMB_DAT A_CPU
SML1_DA TA
SML0_DA TA_CPU
MCP_GPIO820
MCP_GPIO1 32 0
Brook_BH
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Title
Title
Title
Size Document N umber Rev
Size Document N umber Rev
Size Document N umber Rev A3
A3
A3
Date: Sheet of
Date: Sheet of
Date: Sheet of
MCP_GPIO8
SML1_CL K
MCP_GPIO6 0
SML0_CL K_CPU
MCP_GPIO1 1
MCP_GPIO1 3
Wistron Confidential document, Anyone can not Duplicate, Modify, Forward or any other purpose application without get Wistron permission
CPU (PCI-E/SMBUS/CLOCK/CL)
CPU (PCI-E/SMBUS/CLOCK/CL)
CPU (PCI-E/SMBUS/CLOCK/CL)
Brook_BH
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Wednesd ay, February 04, 2015
Wednesd ay, February 04, 2015
Wednesd ay, February 04, 2015
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RN1803
1
4
23
SRN2K2J -5-GP
SRN2K2J -5-GP
RN1805
RN1805
1
4
23
SRN2K2J -5-GP
SRN2K2J -5-GP
RN1809
RN1809
1
4
23
SRN2K2J -5-GP
SRN2K2J -5-GP
3D3V_SU S
RN1804
RN1804
8 7 6
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
1 2 3 45
SRN10KJ -6-GP
SRN10KJ -6-GP
18 106
18 106
18 106
1
-1M
-1M
-1M
5
Dr-Bios.com
4
3
2
1
3D3V_RTC_AUX
R1928
12
EC1901
EC1901
C1901
C1901
SC5P50V2CN-2GP
SC5P50V2CN-2GP
R1928
1 2
20KR2F-L3-GP
20KR2F-L3-GP
R1927
R1927
1 2
20KR2F-L3-GP
20KR2F-L3-GP
12
DY
DY
R1932
R1932
10KR2J-L-GP
10KR2J-L-GP
R1929
R1929
10KR2J-L-GP
10KR2J-L-GP
R1901
R1901
1 2
10MR2J-L-GP
10MR2J-L-GP
X1901
X1901
1
2 3
XTAL-32D768KHZ-64-G P
XTAL-32D768KHZ-64-G P
82.30001.661
82.30001.661
2nd = 82.30001.B21
2nd = 82.30001.B21
C1904
C1904
12
12
SC1U6D3V3KX-L1-GP
SC1U6D3V3KX-L1-GP
4
12
C1903
C1903
21
C6D*C$)$'*
SC1U6D3V3KX-L1-GP
SC1U6D3V3KX-L1-GP
12
G1901
G1901 GAP-OPEN
GAP-OPEN
MCP_GPIO34
CPU_XTAL_32K_X1
CPU_XTAL_32K_X2
12
EC1902
EC1902
AZ5325-01FDR7G-GP
AZ5325-01FDR7G-GP
HDA_SDIN0_CPU27
ME_UNLOCK24
INT_SERIRQ 20, 24,91
C1902
C1902
SC5P50V2CN-2GP
SC5P50V2CN-2GP
D D
AZ5325-01FDR7G-GP
AZ5325-01FDR7G-GP
Cloes to CPU
C C
3D3V_S0
B B
INTVRMEN- Integrated SUS
1.05V VRM Enable High - Enable internal VRs Low - Enable external VRs
12
3D3V_RTC_AUX
DY
DY
R1904 1M1R2J-GPR1904 1M1R2J-GP
12
R1905 330KR2F-L-GPR1905 330KR2F-L-G P
1 2
R1908
R1908
1KR2J-L2-GP
1KR2J-L2-GP
12
HDA_SDOUT_CODEC27 HDA_SYNC_CODEC27
HDA_RST#_CODEC27
HDA_BITCLK_CODEC27
CPU_XTAL_32K_X1 CPU_XTAL_32K_X2 SM_INTRUDER# PCH_INTVRMEN SRTC_RST# RTC_RST#
HDA_BITCLK_CPU HDA_SYNC_CPU HDA_RST#_CPU
HDA_SDOUT_CPU
RTCRST_ON24
AW5
AW8
AV11
AY10 AU12 AU11
AW10
AV10
AU62 AE62 AD61 AE61 AD62
AL11
AE63
RN1901
RN1901
1 2 3
SRN33J-5-GP- U
SRN33J-5-GP- U
RN1903
RN1903
1 2 3
SRN33J-5-GP- U
SRN33J-5-GP- U
12
R1918
R1918 100KR2J-4-GP
100KR2J-4-GP
CPU1E
CPU1E
RTCX1
AY5
RTCX2
AU6
INTRUDER#
AV7
INTVRMEN
AV6
SRTCRST#
AU7
RTCRST#
HDA_BCLK/I2S0_SCLK HDA_SYNC/I2S0_SFRM
AU8
HDA_RST#/I2S_MCLK# HDA_SDI0/I2S0_RXD HDA_SDI1/I2S1_RXD HDA_SDO/I2S0_TXD HDA_DOCK_EN#/I2S1_TXD# HDA_DOCK_RST#/I2S1_SFRM#
AY8
I2S1_SCLK
PCH_TRST# PCH_TCK PCH_TDI PCH_TDO PCH_TMS RSVD#AL11
AC4
RSVD#AC4 JTAGX
AV2
RSVD#AV2
HASWE LL-6-GP-U
HASWE LL-6-GP-U
HDA_SDOUT_CPU
4
HDA_SYNC_CPU
HDA_RST#_CPU
4
HDA_BITCLK_CPU
U,0*AUC
RTC_RST#_R
12
R1921
R1921 2K2R2J-L1-GP
2K2R2J-L1-GP
HSW_ULT_DDR3L
HSW_ULT_DDR3L
RTC
RTC
AUDIO SATA
AUDIO SATA
JTAG
JTAG
RTC_RST#
D
Q1903
Q1903 2N7002K-2-GP
2N7002K-2-GP
84.2N702.J31
84.2N702.J31
2ND = 84.2N702.031
2ND = 84.2N702.031
3rd = 84.2N702.W31
3rd = 84.2N702.W31
S
G
5 OF 19
5 OF 19
SATA_RN0/PERN6_L3
SATA_RP0/PERP6_L3 SATA_TN0/PETN6_L3
SATA_TP0/PETP6_L3
SATA_RN1/PERN6_L2
SATA_RP1/PERP6_L2 SATA_TN1/PETN6_L2
SATA_TP1/PETP6_L2
SATA_RN2/PERN6_L1
SATA_RP2/PERP6_L1 SATA_TN2/PETN6_L1
SATA_TP2/PETP6_L1
SATA_RN3/PERN6_L0
SATA_RP3/PERP6_L0 SATA_TN3/PETN6_L0
SATA_TP3/PETP6_L0
SATA0GP/GPIO34 SATA1GP/GPIO35 SATA2GP/GPIO36 SATA3GP/GPIO37
SATA_IREF
RSVD#L11 RSVD#K10
SATA_RCOMP
SATALED#
J5 H5 B15 A15
J8 H8 A17 B17
J6 H6 B14 C15
F5 E5 C17 D17
MCP_GPIO34
V1 U1
MSATA_PEDET1
V6
MSATA_PEDET2
AC1
A12 L11 K10
SATA_RCOMP
C12 U3
M.2 auto detection
SATA_RX_CPU_N0 60 SATA_RX_CPU_P0 60 SATA_TX_CPU_N0 60 SATA_TX_CPU_P0 60
SATA_RX_CPU_N1 60 SATA_RX_CPU_P1 60 SATA_TX_CPU_N1 60 SATA_TX_CPU_P1 60
PCIE_RX_CPU_N6 63 PCIE_RX_CPU_P6 63
PCIE_TX_CPU_N6 63
PCIE_TX_CPU_P6 63
SATA_RX_CPU_N3 63 SATA_RX_CPU_P3 63 SATA_TX_CPU_N3 63 SATA_TX_CPU_P3 63
SATA_ODD_PRSNT# 18, 60 MSATA_PEDET1 17 MSATA_PEDET2 17
R1926
R1926
1 2
3K01R2F-3-GP
3K01R2F-3-GP
MSATA_PEDET63 MSATA_PEDET 63
MSATA_PEDET2
5
6
1D05V_VCCSATA3PLL_S0
Q1902
Q1902
MSATA_PEDET1
34
2
1
2N7002KDW -GP
2N7002KDW -GP
84.2N702.A3F
84.2N702.A3F
2nd = 75.00601.07C
2nd = 75.00601.07C
Baseline
Baseline
!A6A*3++
!A6A*E++
FPUU*!!+
A A
5
4
3
2
Wistron Confidential document, Anyone can not Duplicate, Modify, Forward or any other purpose
Brook_BH
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application without get Wistron permission
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, H sin Tai Wu Rd., Hsich ih,
21F, 88, Sec.1, H sin Tai Wu Rd., Hsich ih,
21F, 88, Sec.1, H sin Tai Wu Rd., Hsich ih, Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
CPU (RTC/LPC/SATA/HDA)
CPU (RTC/LPC/SATA/HDA)
CPU (RTC/LPC/SATA/HDA)
Size Document Num ber Rev
Size Document Num ber Rev
Size Document Num ber Rev Custom
Custom
Custom
Wednesday, February 04, 2015
Wednesday, February 04, 2015
Wednesday, February 04, 2015
Date: Sheet of
Date: Sheet of
Date: Sheet of
Taipei Hsien 221, Taiwan, R.O.C.
Brook_BH
Brook_BH
Brook_BH
1
19 106
19 106
19 106
-1M
-1M
-1M
5
Dr-Bios.com
3D3V_SU S
RN2004
RN2004
1
3D3V_S5
3D3V_S0
3D3V_SU S
2 3
SRN10KJ -L-GP
SRN10KJ -L-GP
RN2005
RN2005
1 2 3 4 5
SRN10KJ -6-GP
SRN10KJ -6-GP
DY
DY
R2058
R2058
1 2
10KR2J-L -GP
10KR2J-L -GP
DY
DY
R2001
R2001
10KR2J-L -GP
10KR2J-L -GP
RN2010
RN2010 SRN10KJ -6-GP
SRN10KJ -6-GP
1 2 3 4 5
R2030
R2030
1 2
4K7R2J-L -GP
4K7R2J-L -GP
RN2001
RN2001
1 2 3
SRN10KJ -L-GP
SRN10KJ -L-GP
R2004
R2004
1KR2J-L2 -GP
1KR2J-L2 -GP
R2015
R2015
10KR2J-L -GP
10KR2J-L -GP
D D
C C
B B
A A
4
8 7 6
12
8 7 6
4
12
12
MCP_GPIO7 3 MCP_GPIO4 5
EC_SMI# EC_SCI# MCP_GPIO1 4 MCP_GPIO2 6
MCP_GPIO2 4
MCP_GPIO1 5
PM_PW RBTN# BATLOW # MCP_GPIO2 7
MCP_GPIO7 6
AMIC_DMIC# GPU_EVE NT#
MCP_GPIO4 6
MCP_GPIO7 0
MCP_GPIO7 3 18
PM_PW RBTN# 17,24,89 BATLOW # 17 MCP_GPIO2 7
MCP_GPIO2 5
TOUCH_INT #55
3D3V_S0
12
Dual rank
Dual rank
R2016
R2016 10KR2J-L -GP
10KR2J-L -GP
12
Single rank
Single rank
R2017
R2017 10KR2J-L -GP
10KR2J-L -GP
3D3V_S0
12
Dual rank
Dual rank
R2021
R2021 10KR2J-L -GP
10KR2J-L -GP
12
Single rank
Single rank
R2022
R2022 10KR2J-L -GP
10KR2J-L -GP
MCP_GPIO818
SATA_OD D_DA#18,60
MCP_GPIO2 7
GPU_EVE NT#79
RTC_DET #17,25
GC6_FB_ EN7 9,86
EC_SMI#24
GSENSOR _INT169
MCP_GPIO1 318
EC_SCI#24
HDA_SPK R27
DGPU_DUAL1 "For N16V-GM VB IOS loading dep endence H: Daul rank L: Single rank"
DGPU_DU AL1
DGPU_DUAL2 For N16S-GT VBI OS loading depe ndence H: Daul rank L: Single rank"
DGPU_DU AL2
5
4
MCP_GPIO1 217
MCP_GPIO2 7
R2020
R2020
1 2
0R0402-P AD-1-GP
0R0402-P AD-1-GP
20141014 Rober
MCP_GPIO2 5
DEVSLP17,24,31,6 1
LAN_DIS#1 5
!!!!
4
MCP_GPIO7 6
MCP_GPIO1 5 AMIC_DMIC#
MCP_GPIO2 4
MCP_GPIO2 6
RTC_DET #
GC6_FB_ EN_MCP
DGPU_TYPE 2
MCP_GPIO1 4
MCP_GPIO4 5 MCP_GPIO4 6
MCP_GPIO7 0 LAN_DIS#
CPU1J
CPU1J
P1
BMBUSY#/GPIO76
AU2
GPIO8
AM7
LAN_PHY_PWR_CTRL/GPIO12
AD6
GPIO15
Y1
GPIO16
T3
GPIO17
AD5
GPIO24
AN5
GPIO27
AD7
GPIO28
AN3
GPIO26
AG6
GPIO56
AP1
GPIO57
AL4
GPIO58
AT5
GPIO59
AK4
GPIO44
AB6
GPIO47
U4
GPIO48
Y3
GPIO49
P3
GPIO50
Y2
HSIOPC/GPIO71
AT3
GPIO13
AH4
GPIO14
AM4
GPIO25
AG5
GPIO45
AG3
GPIO46
AM3
GPIO9
AM2
GPIO10
P2
DEVSLP0/GPIO33
C4
SDIO_POWER_EN/GPIO70
L2
DEVSLP1/GPIO38
N5
DEVSLP2/GPIO39
V2
SPKR/GPIO81
HASW ELL-6-GP-U
HASW ELL-6-GP-U
3D3V_S0
12
SINGLE
SINGLE
R2018
R2018 10KR2J-L -GP
10KR2J-L -GP
12
DUAL
DUAL
R2019
R2019 10KR2J-L -GP
10KR2J-L -GP
3
HSW_ULT_DDR3L
HSW_ULT_DDR3L
GPIO
GPIO
MIC_DET
3
CPU/
CPU/ MISC
MISC
GSPI0_CS#/GPIO83
GSPI0_CLK/GPIO84 GSPI0_MISO/GPIO85 GSPI0_MOSI/GPIO86
GSPI1_CS#/GPIO87
GSPI1_CLK/GPIO88 GSPI1_MISO/GPIO89
GSPI_MOSI/GPIO90
UART0_RXD/GPIO91 UART0_TXD/GPIO92
UART0_RTS#/GPIO93
SERIAL IO
SERIAL IO
UART0_CTS#/GPIO94
UART1_RXD/GPIO0
UART1_RST#/GPIO2 UART1_CTS#/GPIO3
SDIO_CMD/GPIO65
MIC_DET H: Single MIC L: Dual MIC
10 OF 19
10 OF 19
THRMTRIP#
RCIN#/GPIO82
SERIRQ
PCH_OPI_RCOMP
RSVD#AF20
RSVD#AB21
UART1_TXD/GPIO1
I2C0_SDA/GPIO4
I2C0_SCL/GPIO5 I2C1_SDA/GPIO6 I2C1_SCL/GPIO7
SDIO_CLK/GPIO64
SDIO_D0/GPIO66 SDIO_D1/GPIO67 SDIO_D2/GPIO68 SDIO_D3/GPIO69
D60 V4 T4 AW15 AF20 AB21
R6 L6 N6 L8 R7 L5 N7 K2 J1 K3 J2 G1 K4 G2 J3 J4 F2 F3 G4 F1 E3 F4 D3 E4 C3 E2
3D3V_S0
THERMTR IP#_PCH
OPI_COMP2
MCP_GPIO8 3 MCP_GPIO8 4
ODD_PW R_EN_N MCP_GPIO8 6 MCP_GPIO8 7
MIC_DET DGPU_DU AL1
DGPU_DU AL2
CCD_PW R_ENR
12
UMA
UMA
R2012
R2012 10KR2J-L -GP
10KR2J-L -GP
DGPU_TYPE 2
12
PX
PX
R2010
R2010 10KR2J-L -GP
10KR2J-L -GP
2
1 2
0R0402-P AD-1-GP
0R0402-P AD-1-GP
R2042
R2042
1 2
0R0402-P AD-1-GP
0R0402-P AD-1-GP
R2041
R2041
1 2
0R0402-P AD-1-GP
0R0402-P AD-1-GP
I2C0_DATA _CPU 55
2
R2039
R2039
INT_SERIRQ 19,24 ,91
I2C0_CLK_ CPU 55
DGPU_TYPE2 H:UMA L:OPTIMUS
Brook_BH
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Title
Title
Title
Size Document N umber Rev
Size Document N umber Rev
Size Document N umber Rev A3
A3
A3
Date: Sheet of
Date: Sheet of
Date: Sheet of
THERMTR IP#_PCH
12
EC2001
AZ5325-0 1FDR7G-GP
AZ5325-0 1FDR7G-GP
H_THERM TRIP# 40 H_RCIN# 18,24
ODD_PW R_EN 24 ,60
TOUCH_D ET# 55 TOUCH_S _RST# 5 5 CCD_PW R_EN# 38
FW_ GPIO 38
I2C1_DATA _CPU 65
I2C1_CLK_ CPU 65
EC2001
DY
DY
OPI_COMP2
MCP_GPIO8 7 TOUCH_D ET#
TOUCH_S _RST#
20141216 -1
INT_PIRQA#15
TP_IN#15,6 5
INT_PIRQA#
MCP_GPIO8 3 MCP_GPIO8 4
I2C0_CLK_ CPU I2C0_DATA _CPU I2C1_DATA _CPU I2C1_CLK_ CPU
P!?NJ2ME!N2//!J2Cd!!+2?cCe
?4
C@!@CK@+
?+
!?N****/4!
MCP_GPIO8 6
Wistron Confidential document, Anyone can not Duplicate, Modify, Forward or any other purpose application without get Wistron permission
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
CPU (GPIO/MISC)
CPU (GPIO/MISC)
CPU (GPIO/MISC)
Brook_BH
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Wednesd ay, February 04, 2015
Wednesd ay, February 04, 2015
Wednesd ay, February 04, 2015
Brook_BH
1
TP_IN#
1
R2011
R2011
1 2
49D9R2F -GP
49D9R2F -GP
3D3V_S0
RN2014
RN2014 SRN10KJ -6-GP
SRN10KJ -6-GP
1
8
2
7
3
6
4 5
RN2007
RN2007
1
8
2
7
3
6
45
SRN10KJ -6-GP
SRN10KJ -6-GP
RN2008
RN2008
R2040
R2040
1KR2J-L2 -GP
1KR2J-L2 -GP
12
1 2 3 45
3D3V_S0
SRN2K2J -4-GP
SRN2K2J -4-GP
8 7 6
20 106
20 106
20 106
-1M
-1M
-1M
5
Dr-Bios.com
D D
1D05V_S 0
12
C2101
C2101
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
C C
3D3V_SU S
12
C2103
C2103
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
B B
1D05V_V CCCLK_S0
C2104
C2104
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
12
1D05V_V CCUSB3PLL_S0 1D05V_V CCSATA3PLL_S 0
C2107
C2107
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
12
4
1D05V_S 0
1D05V_S 0
3D3V_SU S
3D3V_S5
3D3V_S0
1D05V_V CCCLK_S0
1D05V_V CCACLKPLL_S0
3D3V_SU S
AA21
W21
AH14
AH13
AC9 AA9
AH10
R21
M20
AE20 AE21
L10
B18 B11
Y20
J13
W9
J18 K19 A20 J17
T21 K18
V21
K9
M9
N8 P9
V8
CPU1M
CPU1M
VCCHSIO VCCHSIO VCCHSIO VCC1_05 VCC1_05 VCCUSB3PLL VCCSATA3PLL
RSVD#Y20 VCCAPLL VCCAPLL
DCPSUS3
VCCHDA
DCPSUS2
VCCSUS3_3 VCCSUS3_3 VCCDSW3_3 VCC3_3 VCC3_3
VCCCLK VCCCLK VCCACLKPLL VCCCLK VCCCLK VCCCLK RSVD#K18 RSVD#M20 RSVD#V21 VCCSUS3_3 VCCSUS3_3
HASW ELL-6-GP-U
HASW ELL-6-GP-U
HSIO
HSIO
USB3
USB3
HDA
HDA
VRM
VRM
GPIO/LPC
GPIO/LPC
LPT LP POWER
LPT LP POWER
HSW_ULT_DDR3L
HSW_ULT_DDR3L
OPI
OPI
3
THERMAL SENSOR
THERMAL SENSOR
SUS OSCILLATOR
SUS OSCILLATOR
RTC
RTC
SPI
SPI
CORE
CORE
SERIAL IO
SERIAL IO
USB2
USB2
13 OF 19
13 OF 19
VCCSUS3_3
VCCRTC DCPRTC
VCCSPI
VCCASW VCCASW
VCC1_05 VCC1_05 VCC1_05 VCC1_05
VCC1_05 DCPSUSBYP#AG19 DCPSUSBYP#AG20
VCCASW VCCASW VCCASW
DCPSUS1#AD10
DCPSUS1#AD8
VCCTS1_5
VCC3_3 VCC3_3
VCCSDIO VCCSDIO
DCPSUS4
RSVD#AC20
VCC1_05
VCC1_05
AH11 AG10 AE7
Y8
AG14 AG13
J11 H11 H15 AE8 AF22 AG19 AG20 AE9 AF9 AG8 AD10 AD8
J15 K14 K16
U8 T9
AB8
AC20 AG16 AG17
3D3V_SU S
3D3V_DC PRTC
3D3V_VC CSPI_S5
1D05V_S 0
1D05V_S 0
DCPSUSYP
1D05V_S 0
3D3V_S0
2
12
C2108
C2108
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
C2109 SCD1U16 V2KX-L-GPC210 9 SCD1 U16V2KX-L-GP
1 2
R2103
R2103
1 2
0R0402-P AD-1-GP
0R0402-P AD-1-GP
C2110 SCD1U1 6V2KX-L-GPC2110 SCD1U16 V2KX-L-GP
1 2
R2120
R2120
DCPSUSYP_ R
5D1R2F-G P
5D1R2F-G P
1 2
C2117 SCD47U 25V3KX-1GPC 2117 SCD47U25V3KX -1GP
1 2
3D3V_RT C_AUX
3D3V_S5
C2111 SC1U10 V2KX-L1-GPC 2111 SC1U10V2KX-L1 -GP
1 2
3D3V_S5
1D5V_S0
12
C2116
C2116
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
1D05V_S 0
12
C2102
C2102
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
3D3V_S0
12
C2105
C2105
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
1
Wistron Confidential document, Anyone can not Duplicate, Modify, Forward or any other purpose
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A A
5
4
3
2
Brook_BH
Title
Title
Title
Size Document N umber Rev
Size Document N umber Rev
Size Document N umber Rev A3
A3
A3
Date: Sheet of
Date: Sheet of
Date: Sheet of
application without get Wistron permission
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
CPU (POWER1)
CPU (POWER1)
CPU (POWER1)
Brook_BH
Brook_BH
Wednesd ay, February 04, 2015
Wednesd ay, February 04, 2015
Wednesd ay, February 04, 2015
Brook_BH
21 106
21 106
21 106
1
-1M
-1M
-1M
5
Dr-Bios.com
D D
4
HSW_ULT_DDR3L
CPU1Q
CPU1Q
HSW_ULT_DDR3L
3
17 OF 19
17 OF 19
2
1
DC_AY2_AW2 DC_AY3_AW3 DC_AY60
TP2212TP2212
TP2213TP2213
C C
B B
1
1
DC_AY61_AW61 DC_AY62_AW62 DC_B2 DC_A3_B3 DC_A61_B61 DC_B62_B63
DC_C1_C2
AY2
DAISY_CHAIN_NCTF_AY2
AY3
DAISY_CHAIN_NCTF_AY3
AY60
DAISY_CHAIN_NCTF_AY60
AY61
DAISY_CHAIN_NCTF_AY61
AY62
DAISY_CHAIN_NCTF_AY62
B2
DAISY_CHAIN_NCTF_B2
B3
DAISY_CHAIN_NCTF_B3
B61
DAISY_CHAIN_NCTF_B61
B62
DAISY_CHAIN_NCTF_B62
B63
DAISY_CHAIN_NCTF_B63
C1
DAISY_CHAIN_NCTF_C1
C2
DAISY_CHAIN_NCTF_C2
HASWELL-6-GP-U
HASWELL-6-GP-U
CPU1R
CPU1R
AT2
RSVD#AT2
AU44
RSVD#AU44
AV44
RSVD#AV44
D15
RSVD#D15
F22
RSVD#F22
H22
RSVD#H22
J21
RSVD#J21
HASWELL-6-GP-U
HASWELL-6-GP-U
HSW_ULT_DDR3L
HSW_ULT_DDR3L
DAISY_CHAIN_NCTF_A3 DAISY_CHAIN_NCTF_A4
DAISY_CHAIN_NCTF_A60 DAISY_CHAIN_NCTF_A61 DAISY_CHAIN_NCTF_A62
DAISY_CHAIN_NCTF_AV1 DAISY_CHAIN_NCTF_AW1 DAISY_CHAIN_NCTF_AW2 DAISY_CHAIN_NCTF_AW3
DAISY_CHAIN_NCTF_AW61 DAISY_CHAIN_NCTF_AW62 DAISY_CHAIN_NCTF_AW63
18 OF 19
18 OF 19
RSVD#N23 RSVD#R23
RSVD#T23
RSVD#U10
RSVD#AL1
RSVD#AM11
RSVD#AP7 RSVD#AU10 RSVD#AU15
RSVD#AW14
RSVD#AY14
A3 A4
A60 A61 A62 AV1 AW1 AW2 AW3 AW61 AW62 AW63
N23 R23 T23 U10
AL1 AM11 AP7 AU10 AU15 AW14 AY14
DC_A3_B3 DC_A4
DC_A60 DC_A61_B61 DC_A62 DC_AV1 DC_AW1 DC_AY2_AW2 DC_AY3_AW3 DC_AY61_AW61 DC_AY62_AW62 DC_AW63
1
TP2219TP2219
1
TP2218TP2218
1
TP2217TP2217
1
TP2215TP2215
1
TP2216TP2216
1
TP2214TP2214
Wistron Confidential document, Anyone can not Duplicate, Modify, Forward or any other purpose
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A A
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev Custom
Custom
5
4
3
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
application without get Wistron permission
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
CPU (RSVD)
CPU (RSVD)
CPU (RSVD)
Brook_BH
Brook_BH
Wednesday, February 04, 2015
Wednesday, February 04, 2015
Wednesday, February 04, 2015
2
Brook_BH
22 106
22 106
22 106
1
-1M
-1M
-1M
5
Dr-Bios.com
HSW_ULT_DDR3L
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
HSW_ULT_DDR3L
CPU1N
CPU1N
A11 A14 A18 A24 A28
D D
C C
B B
A32 A36 A40 A44 A48 A52 A56
AA1 AA58 AB10 AB20 AB22
AB7
AC61 AD21
AD3
AD63
AE10
AE5 AE58 AF11 AF12 AF14 AF15 AF17 AF18
AG1 AG11 AG21 AG23 AG60 AG61 AG62 AG63 AH17 AH19 AH20 AH22 AH24 AH28 AH30 AH32 AH34 AH36 AH38 AH40 AH42 AH44 AH49 AH51 AH53 AH55 AH57
AJ13 AJ14 AJ23 AJ25 AJ27 AJ29
HASW ELL-6-GP-U
HASW ELL-6-GP-U
14 OF 19
14 OF 19
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
AJ35 AJ39 AJ41 AJ43 AJ45 AJ47 AJ50 AJ52 AJ54 AJ56 AJ58 AJ60 AJ63 AK23 AK3 AK52 AL10 AL13 AL17 AL20 AL22 AL23 AL26 AL29 AL31 AL33 AL36 AL39 AL40 AL45 AL46 AL51 AL52 AL54 AL57 AL60 AL61 AM1 AM17 AM23 AM31 AM52 AN17 AN23 AN31 AN32 AN35 AN36 AN39 AN40 AN42 AN43 AN45 AN46 AN48 AN49 AN51 AN52 AN60 AN63 AN7 AP10 AP17 AP20
CPU1O
CPU1O
AP22 AP23 AP26 AP29
AP3 AP31 AP38 AP39 AP48 AP52 AP54 AP57 AR11 AR15 AR17 AR23 AR31 AR33 AR39 AR43 AR49
AR5 AR52 AT13 AT35 AT37 AT40 AT42 AT43 AT46 AT49 AT61 AT62 AT63
AU1 AU16 AU18 AU20 AU22 AU24 AU26 AU28 AU30 AU33 AU51 AU53 AU55 AU57 AU59 AV14 AV16 AV20 AV24 AV28 AV33 AV34 AV36 AV39 AV41 AV43 AV46 AV49 AV51 AV55
HASW ELL-6-GP-U
HASW ELL-6-GP-U
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
4
HSW_ULT_DDR3L
HSW_ULT_DDR3L
15 OF 19
15 OF 19
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
AV59 AV8 AW16 AW24 AW33 AW35 AW37 AW4 AW40 AW42 AW44 AW47 AW50 AW51 AW59 AW60 AY11 AY16 AY18 AY22 AY24 AY26 AY30 AY33 AY4 AY51 AY53 AY57 AY59 AY6 B20 B24 B26 B28 B32 B36 B4 B40 B44 B48 B52 B56 B60 C11 C14 C18 C20 C25 C27 C38 C39 C57 D12 D14 D18 D2 D21 D23 D25 D26 D27 D29 D30 D31
3
HSW_ULT_DDR3L
CPU1P
CPU1P
D33
VSS
D34
VSS
D35
VSS
D37
VSS
D38
VSS
D39
VSS
D41
VSS
D42
VSS
D43
VSS
D45
VSS
D46
VSS
D47
VSS
D49
VSS
D5
VSS
D50
VSS
D51
VSS
D53
VSS
D54
VSS
D55
VSS
D57
VSS
D59
VSS
D62
VSS
D8
VSS
E11
VSS
E17
VSS
F20
VSS
F26
VSS
F30
VSS
F34
VSS
F38
VSS
F42
VSS
F46
VSS
F50
VSS
F54
VSS
F58
VSS
F61
VSS
G18
VSS
G22
VSS
G3
VSS
G5
VSS
G6
VSS
G8
VSS
H13
VSS
HASW ELL-6-GP-U
HASW ELL-6-GP-U
HSW_ULT_DDR3L
16 OF 19
16 OF 19
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
VSS VSS VSS
VSS_SENSE
VSS
H17 H57 J10 J22 J59 J63 K1 K12 L13 L15 L17 L18 L20 L58 L61 L7 M22 N10 N3 P59 P63 R10 R22 R8 T1 T58 U20 U22 U61 U9 V10 V3 V7 W20 W22 Y10 Y59 Y63
V58 AH46 V23 E62 AH16
2
VSS_SEN SE 7 ,46
1
Wistron Confidential document, Anyone can not Duplicate, Modify, Forward or any other purpose
A A
5
4
3
2
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Title
Title
Title
Size Document N umber Rev
Size Document N umber Rev
Size Document N umber Rev A3
A3
A3
Date: Sheet of
Date: Sheet of
Date: Sheet of
application without get Wistron permission
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
CPU (VSS)
CPU (VSS)
CPU (VSS)
Brook_BH
Brook_BH
Wednesd ay, February 04, 2015
Wednesd ay, February 04, 2015
Wednesd ay, February 04, 2015
Brook_BH
23 106
23 106
23 106
1
-1M
-1M
-1M
3D3V_AUX_KBC
Dr-Bios.com
8 7 6
1 2
R2452
R2452
RN2412
RN2412 SRN10KJ-6-G P
SRN10KJ-6-G P
20141216 -1
5
AZ5325-01FDR 7G-GP
AZ5325-01FDR 7G-GP
R2466
R2466
1 2
0R0402-PAD-1- GP
0R0402-PAD-1- GP
R24650R 2J-L-GPDYR24650R 2J-L-GP
DY
PM_CLKRUN #_EC17,91
5V_CHARGER _EN#45 USB_CHARG ER_EN36
PCH_PCIE_W AKE#17,31,61,63
3D3V_S0
R2417
R2417
1KR2J-L2-GP
1KR2J-L2-GP
12
8 7 6
PLTRST#_PCH
EC2401
EC2401
12
E51_TXD61 E51_RXD61
KBC_BEEP27 KB_BL_PWM65
FAN_TACH 126
12
DY
DY
ECSCI#_KBC ECSCI#_KBCECSCI#_KBC
AC_IN#44
VCC_LPC(Pin9)
LPC_FRAME#_C PU18,6 8,91
LPC_AD_CPU _P318,68,91
LPC_AD_CPU _P218,68,91 LPC_AD_CPU _P118,68,91 LPC_AD_CPU _P018,68,91
ECSCI#_KBC
PWRLED64
STDBY_LED64
H_RCIN#18,20
INT_SERIRQ19,20,91
KB_BL_DET65
LPC_CLK_KBC18 PLTRST#_PCH17,31,37,40,61,63,68,89,91
3D3V_RTC_AU X
3D3V_AUX_KBC
LID_CLOSE#67
PM_SLP_S3#17,40,48,51
PM_SLP_S4#17,49
R2408
R2408
1 2
0R0402-PAD-1- GP
0R0402-PAD-1- GP
KCOL[0..7]65,89
KROW[0..17]65,89
R2438
R2438
1 2
0R0402-PAD-1- GP
0R0402-PAD-1- GP
PM_PWRBT N#17,20, 89
R2435
R2435 0R0402-PAD-1- GP
0R0402-PAD-1- GP
1 2
3D3V_AUX_KBC
3D3V_RTC_AU X_R
KBC_PWR BTN#_R
VCC_LPC
ECRST#
KB_BL_PWMR
KROW0 KROW1 KROW2 KROW3 KROW4 KROW5 KROW6 KROW7 KROW8
KROW9 KROW10 KROW11 KROW12 KROW13 KROW14 KROW15
KROW16 KROW17
!!N+*R*B/D
PLTRST#_PCH
12
R2488
R2488
47KR2J-L2-GP
47KR2J-L2-GP
Close to the EC
D D
EC_SMI#20
EC_SCI#20
RN2404
AD_OFF
FUN_OFF#
KB_BL_PWM 5V_CHARGER _EN# S5_ENABLE#
RN2404
1 2 3 4 5
SRN100KJ-L-G P
SRN100KJ-L-G P
10KR2F-L1-GP
10KR2F-L1-GP
1 2 3 4 5
BAT_IN# ECRST# CHG_ON#
C C
PROCHOT #_EC
20141216 -1
11/18 RN7904 to RN2404
FAN_TACH 1
B B
3D3V_AUX_KBC
12
R2431
R2431
20KR2F-L3-GP
MODEL_ID
MODEL_ID
MODEL_ID_AD
A A
PCB_VER_AD
20KR2F-L3-GP
12
R2436
R2436 100KR2F-L3-GP
100KR2F-L3-GP
EC_AGND
3D3V_AUX_KBC
12
R2424
R2424
20KR2F-L3-GP
20KR2F-L3-GP
DY
DY
12
12
C2417
C2417
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
R2426
R2426 100KR2F-L3-GP
100KR2F-L3-GP
EC_AGND
5
KBC1
KBC1
9
VCC_LPC
1
GPIO00/GA20/ESPI_GPIO
2
GPIO01/KBRST#/ESPI_ALERT#
3
GPIO02/SERIRQ/ESPI_GPIO
4
LFRAME#/ESPI_CS#
5
LAD3/ESPI_IO3
6
GPIO04/ESPI_CS2#/ESPI_GPIO
7
LAD2/ESPI_IO2
8
LAD1/ESPI_IO1
10
LAD0/ESPI_IO0
12
PCICLK/ESPICLK
13
GPIO05/PCIRST#/WP2/ESPI_GPIO
14
GPIO07/I_CLK_EHB/ESPI_RST#
22
VCC2
33
VCC2
16
GPIO0A/OWM/RLC_RX2
20
GPIO0E/SCI#
32
GPIO18/POWER_FAIL1
36
GPIO1A/NUMLED#
37
ECRST#
38
GPIO1D/CLKRUN#
30
GPIO16/TXD/SER_TXD/LPC_TXD
31
GPIO17/RXD/SER_CLK/LPC_CLK/PBOUT
21
GPIO0F/PWM0
23
GPIO10/PWM1
25
GPIO11/PWM2
34
GPIO19/PWM3/WDT_LED_ALT
26
GPIO12/FANPWM0
27
GPIO13/FANPWM1
28
GPIO14/FANFB0
29
GPIO15/FANFB1
KCOL0
55
GPIO30/KSI0/SER_TXD/TRAP2
KCOL1
56
GPIO31/KSI1
KCOL2
57
GPIO32/KSI2
KCOL3
58
GPIO33/KSI3
KCOL4
59
GPIO34/KSI4/EDICS
KCOL5
60
GPIO35/KSI5/EDICLK
KCOL6
61
GPIO36/KSI6/EDIDI
KCOL7
62
GPIO37/KSI7/EDIDO
39
GPIO20/KSO0/TRAP_TCK
40
GPIO21/KSO1/TRAP0
41
GPIO22/KSO2/TRAP1
42
GPIO23/KSO3/TRAP_EN
43
GPIO24/KSO4
44
GPIO25/KSO5
45
GPIO26/KSO6
46
GPIO27/KSO7
47
GPIO28/KSO8
48
GPIO29/KSO9
49
GPIO2A/KSO10
50
GPIO2B/KSO11
51
GPIO2C/KSO12
52
GPIO2D/KSO13
53
GPIO2E/KSO14
54
GPIO2F/KSO15
81
GPIO48/KSO16
82
GPIO49/KSO17
111
VCC0
110
GPIO79/AC_IN#
112
GPIO7A/GPXIOD02/EC_EN#
114
GPIO7B/PBIN/PWRBTN#
115
GPIO7C/GPXIOD04
KB9038QA-GP-U 1
KB9038QA-GP-U 1
4
94
R2405
R2405
GND
EC_AGND
VCC_LPC(Pin9)
GPIO08/I_CLK_EPB/PROCHOT2#/SCL4
GPIO46/IEDI_SCL/SCL1_BATMGR
GPIO47/IEDI_SDA/SDA1_BATMGR
GPIO4A/SMBD_CLK/PSCLK1/SCL2
GPIO4B/SMBD_DAT/PSDAT1/SDA2
GPIO66/PROCHOT#/VCOUT1
GPIO63/POWER_FAIL0/FANFB2
GPIO57/XCLK32K/MOSI_ROM_EXPD
GPIO5D/XCLKI/MISO_ROM_EXPD
GPIO5E/XCLKO/SPICS#_ROM_EXPD
GPIO59/SPICLK_ROM_EXPD
AGND69GND11GND24GND35GND
1.8_3.3V
1.8_3.3V
GPIO41/CIR_RLC_TX/AD7
GPIO0D/RLC_TX2/SDA4
GPIO0C/ESBDAT/SDA5
1.8_3.3V
1.8_3.3V
GPIO4D/PSDAT2/SDA3 GPIO4E/PSCLK3/KSO18 GPIO4F/PSDAT3/KSO19
GPIO78/ADC8/VCIN0/SHIDI
GPIO68/IO2_SHR_ROM GPIO6A/IO3_SHR_ROM
1.8_3.3V
1.8_3.3V
GPIO5B/MISO_SHR_ROM
GPIO5C/MOSI_SHR_ROM GPIO58/SPICLK_SHR_ROM GPIO5A/SPICS#_SHR_ROM
GPIO7D/IO2_ROM_EXPD
GPIO7E/IO3_ROM_EXPD
1.8_3.3V
1.8_3.3V
1.8_3.3V
1.8_3.3V
1.8_3.3V
1.8_3.3V
113
1 2
0R0402-PAD-1- GP
0R0402-PAD-1- GP
4
AVCC
GPIO38/AD0 GPIO39/AD1 GPIO3A/AD2 GPIO3B/AD3 GPIO42/AD4 GPIO43/AD5
GPIO40/CIR_RX/AD6
GPIO3C/DA0
GPIO3D/OPMODE/DA1
GPIO3E/DA2 GPIO3F/DA3
GPIO0B/ESBCLK/SCL5
VCC3
GPIO44/SCL0 GPIO45/SDA0
GPIO4C/PSCLK2/SCL3
GPIO52/WP#/KSO20
GPIO60/SHICS# GPIO61/SHICLK
GPIO62/SHIDO
GPIO67/VCOUT0
GPIO65/ADC9/VCIN1
GPIO50/LOCK#
GPIO53/CAPSLED#
GPIO54/WDT_LED
GPIO55/SCROLED#
GPIO56/RSMRST#
GPIO64/FANFB3
GPIO69
GPIO6B/GWG
VCC_IO2
GPIO7F/PECI
3
For EC power consumption reser ver
3D3V_AUX_KBC 3D3V_AUX_S5
67
63
PCB_VER_AD
64
ADT_TYPE_AD
65
MODEL_ID_AD
66 75
PM_SUSWA RN#_R
76 73 74
68
OPMODE
70 71 72
15
PM_SUSACK#_R
19 17 18
96
77 78 79 80
83 84
ODD_PW R_EN_R
85 86 87 88
90
97 98 99
109 104 102 103
89 91 92 93 95 100 101
106 108
105 107
124
SPI_SO_KBC
119
SPI_SI_KBC
120
SPI_CLK_KBC
126
SPI_CS_KBC_N0
128
116 117
121 122 123 127
118
125
VCC
ADT_TYPE_AD
PM_SUSWA RN#_R
PM_SLP_SUS#_R
DY
DY
PROCHOT #_EC
H_PECI_KBC
3D3V_AUX_KBC
12
R2425
R2425 100KR2F-L3-GP
100KR2F-L3-GP
45W
45W
12
R2430
R2430 100KR2F-L3-GP
100KR2F-L3-GP
90W/45W
90W/45W
EC_AGND
R2409
R2409
1 2
0R0603-PAD
0R0603-PAD
AD_IA 44
DGPU_PW ROK 15,85,86
R2410 0R2J -L-GP
R2410 0R2J -L-GP
ALL_SYS_PWRG D 40
FAN1_DAC 26
WLAN_PW R_EN# 61
PTP_PWR _EN# 65
DGPUHOT 79
WLAN_PC IE_WAKE# 61 LAN_PCIE_WA KE# 31
SML1_CLK 18,79 SML1_DATA 18,79 BAT_SCL 43,44,89 BAT_SDA 43,44,89
FUN_OFF# 65
EC_TP_IN# 65 ODD_PW R_EN 20,6 0
12
R2448 0R2J -L-GP
R2448 0R2J -L-GP
EC_TPCLK 65
EC_TPDATA 65
ME_UNLOCK 19
RTCRST_O N 19
BLON_OUT 55
AD_OFF 43
VD_IN1 26
VD_OUT1 26
VD_IN2 26
BAT_IN# 43,44,89 CHARGE_LED 64 DC_BATFU LL 64 RSMRST#_KBC 17
AMP_MUTE# 27
S5_ENABLE# 40,89
SYS_PWROK 17 DC_Protect_EC 4 4
eDP_BLEN_CPU 15
AC_PRESENT 17
R2402 0R0402-PAD- 1-GPR2402 0R0402-PAD -1-GP
1 2
R2403 0R0402-PAD-1- GPR2403 0R0402-PAD- 1-GP
1 2
R2407 0R0402-PAD- 1-GPR2407 0R0402-PAD -1-GP
1 2
R2412 0R0402-PAD- 1-GPR2412 0R0402-PAD -1-GP
1 2
KBC_DPW ROK 17
WIFI_RF_EN 6 1
BLUETOOTH _EN 61 USB_PWR _EN# 35,66 USB_CHAR _CT1 36
CHG_ON# 44
R2429 43R2J -GPR2429 43R 2J-GP
1 2
3D3V_AUX_KBC
DY_DS3
DY_DS3
12
R2437
R2437
1 2
3
R2411
R2411
0R2J-L-GP
0R2J-L-GP
12
PM_SUSWA RN# 17
DY_DS3
DY_DS3
DY_DS3
DY_DS3
PM_SLP_SUS# 17,39
USB_CHAR_ SEL 36
R2447
R2447
1 2
0R0402-PAD-1- GP
0R0402-PAD-1- GP
0R0402-PAD-1- GP
0R0402-PAD-1- GP
R2434 0R2J- L-GP
R2434 0R2J- L-GP
1 2
< ---CPU/GPU
< ---BATTER /CHARGER
20141014 Rober
Charger_Boos t_Status#
OPMODE (Pin70)
OPMODE
3D3V_AUX_KBC
Rober change 11/17
SPI_SO_CPU 18 ,25
SPI_SI_CPU 18,25 SPI_CLK_CPU 18,25 SPI_CS_CPU_N0 18,25
PECI_EC 4
2
12
C2418
C2418
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
EC_AGND
PM_SUSACK# 17
C2423
C2423
1 2
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
R2455
R2455 6K2R2F-GP
6K2R2F-GP
LPC
LPC
PWR_CH G_BM# 44
< ---Touch Pad
12
2
3D3V_AUX_KBC _AVCC
12
C2419
C2419
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
12
C2431
C2431
DY
DY
P?NEJ**3(f#*A"'(X$
ECRST#
C2415
C2415
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
12
L2406
L2406
BLM15AG121SN-1G P
BLM15AG121SN-1G P
12
C2432
C2432
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
DY
DY
KBC_PWR BTN#_R
PROCHOT #_EC
3D3V_AUX_KBC
12
12
C2433
C2433
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
R2404
R2404
1 2
470R2J-2-GP
470R2J-2-GP
E
C
SML1_CLK SML1_DATA
AZ5125-02S-R7G -GP
AZ5125-02S-R7G -GP
75.05125.07D
75.05125.07D
2nd = 75.08212.07D
2nd = 75.08212.07D
3D3V_AUX_KBC
12
12
C2434
C2434
G
S
Q2401
Q2401 MMBT3906-4-GP
MMBT3906-4-GP
84.T3906.A11
84.T3906.A11
2ND = 84.T3906.E11
2ND = 84.T3906.E11
B
12
C2413
C2413
C2414
C2414
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
3D3V_AUX_KBC
R2401
R2401 330KR2J-L-GP
330KR2J-L-GP
1 2
G2401
G2401 GAP-OPEN
GAP-OPEN
2 1
Q2402
Q2402
D
2N7002K-2-GP
2N7002K-2-GP
84.2N702.J31
84.2N702.J31
2ND = 84.2N702.031
2ND = 84.2N702.031
3rd = 84.2N702.W31
3rd = 84.2N702.W31
3D3V_AUX_KBC
ECRST#_Q
20141216 -1
Wistron Confidential document, Anyone can not Duplicate, Modify, Forward or any other purpose application without get Wistron permission
Brook_BH
Brook_BH
Brook_BH
Title
Title
Title
Size Document Numb er Rev
Size Document Numb er Rev
Size Document Numb er Rev A2
A2
A2
Date: Sheet of
Date: Sheet of
Date: Sheet of
2
D2401
D2401
swap D2401 1/29
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
KBC_PWR BTN# 6 4,65,89
PROCHOT #_CPU 4,44,46
RN2413
RN2413
1
4
2 3
SRN10KJ-L-G P
SRN10KJ-L-G P
KBC_KB9038
KBC_KB9038
KBC_KB9038
Brook_BH
Brook_BH
Brook_BH
Thursday, Feb ruary 12, 2015
Thursday, Feb ruary 12, 2015
Thursday, Feb ruary 12, 2015
1
1
3
DY
DY
PURE_HW _SHUTDOW N# 26,40
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., H sichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., H sichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., H sichih, Taipei Hsie n 221, Taiwan, R.O.C.
Taipei Hsie n 221, Taiwan, R.O.C.
Taipei Hsie n 221, Taiwan, R.O.C.
24 106
24 106
24 106
1
-1M
-1M
-1M
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