Acer D725 Schematics

5

HM40-MV Block Diagram

HM40-MV Block Diagram

HM40-MV Block DiagramHM40-MV Block Diagram

4

3

2

1

Project code: 91.4BW01.001
PCB P/N : 48.4BW01.0SB
REVISION : 08242-SB

D D

CLK GEN.

ICS 9LPRS365BKLFT (71.09365.A03)
SILEGO SLG8SP513VTR(71.08513.003)

3

DDR2 DIMM1

667/800 MHz

16

667/800MHz

DDR2 DIMM2

667/800 MHz

17

C C

Codec

CX20561

MIC In

28

28

B B

INT.SPKR

28

Line Out
(NO SPDIF)

A A

OP AMP

G1454

HDD SATA

ODD SATA

5

667/800MHz

AZALIA

26

27

SATA

20

SATA

21

Mobile CPU

Penryn 479

4, 5

HOST BUS 667/800/1067MHz@1.05V

Cantiga

AGTL+ CPU I/F

DDR Memory I/F

INTEGRATED GRAHPICS

LVDS, CRT I/F

6,7,8,9,10,11

X4 DMI
400MHz

C-Link0

ICH9M

6 PCIe ports

PCI/PCI BRIDGE

ACPI 2.0

4 SATA

12 USB 2.0/1.1 ports

ETHERNET (10/100/1000MbE)

High Definition Audio

LPC I/F

Serial Peripheral I/F

Matrix Storage Technology(DO)

Active Managemnet Technology(DO)

12,13,14,15

Blue Tooth
(USB)

USB
2 Port

4

22

23

PCIex1

PCIex1

LPC BUS

USB

Camera
(USB)

USB

THERMAL EMC2102

32

CRT

19

LCD

18

18

LAN

Atheros

AR8114
AR8132

Mini Card

Kedron

a/b/g/n

KBC

KBC773L

Touch
Pad

CardReader
Realtek
RTS5159

INT.
KB

35 33

3

24

33

30

TXFM RJ45

31

BIOS

Winbond
W25X16
16M Bits

MS/MS Pro/xD
/MMC/SD

5 in 1

25 25

LPC

DEBUG

34

CONN.

30

Power Board

TOP

VCC

S

S

GND

BOTTOM

34

2

PCB STACKUP

36

SYSTEM DC/DC

TPS51125

INPUTS

DCBATOUT

OUTPUTS

5V_S5

3D3V_S5

SYSTEM DC/DC

TPS51124

INPUTS OUTPUTS

DCBATOUT

RT9026

1D8V_S3

RT9018A

1D8V_S3 1D5V_S0

1D05V_S0

1D8V_S3

DDR_VREF_S0

DDR_VREF_S3

CPU DC/DC

ISL6266A

1 51Monday, November 24, 2 008

1 51Monday, November 24, 2 008

1 51Monday, November 24, 2 008

1

OUTPUTS

VCC_CORE_S0

0.35~1.5V

OUTPUTSINPUTS

BT+

DCBATOUT

INPUTS

DCBATOUT

CHARGER

BQ24745

DCBATOUT

UMA Two P hase 2

UMA Two P hase 2

UMA Two P hase 2

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

Size Document N umber Rev

Size Document N umber Rev

Size Document N umber Rev
A3

A3

A3

Date: Sheet of

Date: Sheet of

Date: Sheet of

BLOCK DIAGRAM

BLOCK DIAGRAM

BLOCK DIAGRAM

Taipei Hsien 221, Taiwan, R.O.C.

HM40-MV

HM40-MV

HM40-MV

42

44

43

43

41

46

SB

SB

SB

A

ICH9M Functional Strap Definitions

Signal

HDA_SDOUT

HDA_SYNC

4 4

GNT2#/
GPIO53

GPIO20

GNT1#/
GPIO51

GNT3#/
GPIO55

GNT0#:
SPI_CS1#/
GPIO58

SPI_MOSI

3 3

GPIO49

SATALED#

SPKR

TP3

GPIO33/
HDA_DOCK
_EN#

Usage/When Sampled

XOR Chain Entrance/
PCIE Port Config1 bit1,
Rising Edge of PWROK

PCIE config1 bit0,
Rising Edge of PWROK.

PCIE config2 bi t2,
Rising Edge of PWROK.

Reserved

ESI Strap (Server Only)
Rising Edge of PWROK

Top-Block
Swap Override.
Rising Edge of PWROK.

Boot BIOS Destination
Selection 0:1.
Rising Edge of PWROK.

Integrated TPM Enable,
Rising Edge of CLPWROK

DMI Termination Voltage,
Rising Edge of PWROK.

PCI Express Lane
Reversal. Rising Edge
of PWROK.

No Reboot.
Rising Edge of PWROK.

XOR Chain Entrance.
Rising Edge of PWROK.

Flash Descriptor
Security Override Strap
Rising Edge of PWROK

Allows entrance to XOR Chain testing when TP3
pulled low.When TP3 not pulled low at rising edge
of PWROK,sets bit1 of RPC.PC(Config Registers:
offset 224h). This signal has weak internal pull-down

This signal has a weak internal pull-down.
Sets bit0 of RP C.PC(Config Reg isters:Offset 2 24h)

This signal has a weak internal pull-up.
Sets bit2 of RP C.PC2(Config Re gisters:Offset 0224h)

This signal should not be pulled high.

ESI compatible mode is for server platforms only.
This signal should not be pulled low for desttop
and mobile.

Sampled low:Top-Block Swap mode(inverts A16 for
all cycles targeting FWH BIOS space).
Note: Software will not be able to clear the
Top-Swap bit until the system is rebooted
without GNT3# being pulled down.

Controllable via Boot BIOS Destination bit
(Config Registers:Offset 3410h:bit 11:10).
GNT0# is MSB, 01-SPI, 10-PCI, 11-LPC.

Sample low: the Integrated TPM will be disabled.
Sample high: the MCH TPM enable strap is sampled
low and the TPM Disable bit is clear, the
Integrated TPM will be enable.

The signal is required to be low for desktop
applications and required to be high for
mobile applications.

Signal has weak internal pull-up. Sets bit 27
of MPC.LR(Device 28:Function 0:Offset D8)

If sampled high, the system is strapped to the
"No Reboot" mode(ICH9 will disable the TCO Timer
system reboot feature). The status is readable
via the NO REBOOT bit.

This signal should not be pull low unless using
XOR Chain testing.

Sampled low:the Flash Descriptor Security will be
overridden. If high,the security measures will be
in effect.This should only be enabled in manufacturing
environments using an external pull-up resister.

ICH9 EDS 642879 Rev.1.5

Comment

2 2

B

ICH9M Integrated Pull-up

page 92

and Pull-down Resistors

SIGNAL Resistor Type/Value

CL_CLK[1:0]

CL_DATA[1:0]

CL_RST0#

DPRSLPVR/GPIO16

ENERGY_DETECT

HDA_BIT_CLK

HDA_DOCK_EN#/GPIO33

HDA_RST#

HDA_SDIN[3:0]

HDA_SDOUT

HDA_SYNC

GLAN_DOCK#

GNT[3:0]#/GPIO[ 55,53,51]

GPIO[20]

GPIO[49]

LDA[3:0]#/FHW[3:0]#

LAN_RXD[2:0]

LDRQ[0]

LDRQ[1]/GPIO23

PME#

PWRBTN#

SATALED#

SPI_CS1#/GPIO58 /CLGPIO6

SPI_MOSI

SPI_MISO

SPKR

TACH_[3:0]

TP[3]

USB[11:0][P,N]

C

Cantiga chipset and ICH9M I/O controller
Hub strapping configuration

ICH9 EDS 642879 Rev.1.5

PULL-UP 20K

PULL-UP 20K

PULL-UP 20K

PULL-DOWN 20K

PULL-UP 20K

PULL-DOWN 20K

PULL-UP 20K

PULL-DOWN 20K

PULL-DOWN 20K

PULL-DOWN 20K

The pull-up or pull-down active when configured for native
GLAN_DOCK# functionality and determined by LAN controller

PULL-DOWN 20K

PULL-UP 20K

PULL-DOWN 20K

PULL-UP 20K

PULL-UP 20K

PULL-UP 20K

PULL-UP 20K

PULL-UP 20K

PULL-UP 20K

PULL-UP 20K

PULL-UP 15K

PULL-UP 20K

PULL-DOWN 20K

PULL-UP 20K

PULL-DOWN 20K

PULL-UP 20K

PULL-UP 20K

PULL-DOWN 15K

D

Montevina Platform Design guide 22339 0.5

Pin Name

CFG[2:0]

CFG[4:3]
CFG8
CFG[15:14]
CFG[18:17]

CFG5

CFG6

CFG7

CFG9

CFG10 PCIE Loopback enable

CFG[13:12]

CFG16

CFG19

CFG20

SDVO_CTRLDATA

NOTE:

1. All strap signals are sampled with respect to the leading edge of
the (G)MCH Power OK (PWROK) signal.

2. iTPM can be disabled by a 'Soft-Strap' option in the
Flash-decriptor section of the Firmware. This 'Soft-Strap' is
activated only after enabling iTPM via CFG6.
Only one of the CFG10/CFG/12/CFG13 straps can be enabled at any time.

Strap Description

FSB Frequency
Select

Reserved

DMI x2 Select

iTPM Host
Interface

Intel Managemen t
engine Crypto s trap

PCIE Graphics Lane

XOR/ALL

FSB Dynamic ODT

DMI Lane Reversal

1 = Reverse Lanes
DMI x4 mode[MCH -> ICH]:(3->0,2->1,1->2and0->3)
DMI x2 mode[MCH -> ICH]:(3->0,2->1)

Digital Display Port
(SDVO/DP/iHDMI)
Concurrent with PCIe

SDVO Present

Local Flat Panel
(LFP) Present

1=The iTPM Host Interface is d isalbed(default )

Configuration

000 = FSB1067
011 = FSB667
010 = FSB800
others = Reserved

0 = DMI x2

1 = DMI x4

0= The iTPM Host Interface is enabled(Note2)

0 = Transport L ayer Security ( TLS) cipher
suite with n o confidentiali ty

1 = TLS cipher suite with
confidentia lity (default)

0 = Reverse Lanes,15->0,14->1 ect..

1= Normal opera tion(Default):L ane
Numbered in order

0 = Enable (Note 3)

1= Disabled (de fault)

00 = Reserve
10 = XOR mode Enabled
01 = ALLZ mode Enabled (Note 3)

11 = Disabled (default)

0 = Dynamic ODT Disabled

1 = Dynamic ODT Enabled

0 = Normal oper ation(Default):
Lane Number ed in Order

0 = Only Digital Display Port
or PCIE is operational (Default)

1 =Digital display Port and PCIe are
operting simulataneously via the PEG port

0 =No SDVO Card Present (Default)

1 = SDVO Card Present

0 = LFP Disabled (Default)

1= LFP Card Present; PCIE disabledL_DDC_DATA

E

page 218

(Default)

(Default)

SMBus

EMC2102

Thermal

USB Table

USB

PCIE Routing

LANE1

LANE2

LANE3

LANE4

LANE5

LANE6

1 1

LAN Atheros AR8114A

MiniCard WLAN

NC

NC

NC

NC

Pair

Device

USB1

0

NC

1

NC

2

MINIC1

3

WEBCAM

4

5

NC

NC

6

Bluetooth

7

8

NC

USB2(High speed)

9

1011NC

CardReader

KBC

ICH9M

BAT_SCL

SMBC_ICH

BATTERY

9LPRS365BKLFT

DDR

UMA Two P hase 2

UMA Two P hase 2

UMA Two P hase 2

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

Size Document N umber Rev

Size Document N umber Rev

Size Document N umber Rev
A3

A3

A3

Date: Sheet of

Date: Sheet of

Date: Sheet of

Reference

Reference

Reference

Taipei Hsien 221, Taiwan, R.O.C.

HM40-MV

HM40-MV

HM40-MV

2 51Monday, November 24, 2 008

2 51Monday, November 24, 2 008

2 51Monday, November 24, 2 008

SB

SB

SB

A

3D3V_S0

R95

R95

1 2

0R2J-2-GP

0R2J-2-GP

4 4

PCIE_REQ_ MINI#31

DY

DY

PCIE_REQ_ LAN#2 4

SATACLK REQ#13

CLK_MCH _OE#7

CL=20pF±0.2pF

C229

C229

SC33P50 V2JN-3GP

SC33P50 V2JN-3GP

1 2

12

2nd = 82.30005.95 1

2nd = 82.30005.95 1

GEN_XTA L_OUT_R

1 2

C230

C230

SC33P50 V2JN-3GP

3 3

2 2

SC33P50 V2JN-3GP

CPU_SEL 24,7

12

12

C221

C221

Do Not Stuff

Do Not Stuff

SB

SB

SB

GEN_XTA L_IN

X4

X4
X-14D318 18M-35GP

X-14D318 18M-35GP

82.30005.891

82.30005.891

3D3V_S0

678

RN28

RN28

SRN10KJ -6-GP

SRN10KJ -6-GP

123

4 5

C227

C227

SC1U16V3ZY-GP

SC1U16V3ZY-GP

SRN10KJ -6-GP

SRN10KJ -6-GP

RN62

RN62

8
7
6

SRN470J -3-GP

SRN470J -3-GP

PCIE_REQ_ LAN#_R
PCLKCLK 0

PCIE_REQ_ MINI#_R

PCLKCLK 1

1
2
3
4 5

1120 add RN61 and RN62

1120 modify RN61 and RN62

1126 modify RN61 and RN62

PCLKCLK 2

CPU_SEL 2_R

PCLKCLK 4
PCLKCLK 5

RN61

RN61

3D3V_S0

123

45

678

SB

1127 swap the nets of RN61 and RN62

R91

R91
0R2J-2-GP

0R2J-2-GP

12

CLK48_5 15930
CLK48_ICH13

CPU_SEL 04,7

3D3V_S0

CLK_ICH1413

PCLK_KB C33
PCLK_ICH13

CPU_SEL 14,7

PCLK_FW H34

ICS9LPRS365BKLFT setting table

PIN NAME DESCRIPTION

Byte 5, bit 7
0 = PCI0 enabled (default)

PCI0/CR#_A

PCI1/CR#_B

PCI2/TME

PCI3

1 1

PCI4/27M_SEL

PCI_F5/ITP_EN

SRCT3/CR#_C

1= CR#_A enabled. Byte 5, bit 6 controls whether CR#_A controls SRC0 or SRC2 pair
Byte 5, bit 6
0 = CR#_A controls SRC0 pair (default),
1= CR#_A controls SRC2 pair

Byte 5, bit 5
0 = PCI1 enabled (default)
1= CR#_B enabled. Byte 5, bit 6 controls whether CR#_B controls SRC1 or SRC4 pair
Byte 5, bit 4
0 = CR#_B controls SRC1 pair (default)
1= CR#_B controls SRC4 pair

0 = Overclocking of CPU and SRC Allowed
1 = Overclocking of CPU and SRC NOT allowed

3.3V PCI clock output

0 = Pin24 as SRC-1, Pin25 as SRC-1#, Pin20 as DOT96, Pin21 as DOT96#
1 = Pin24 as 27MHz, Pin25 as 27MHz_SS, Pin20 as SRC-0, Pin21 as SRC-0#

0 =SRC8/SRC8#
1 = ITP/ITP#

Byte 5, bit 3
0 = SRC3 enabled (default)
1= CR#_C enabled. Byte 5, bit 2 controls whether CR#_C controls SRC0 or SRC2 pair
Byte 5, bit 2
0 = CR#_C controls SRC0 pair (default),
1= CR#_C controls SRC2 pair

A

B

SB

1124 add R302

3D3V_CL KPLL_S0

12

12

C165

C165

C149

C149

Do Not Stuff

Do Not Stuff

SC4D7U10V5ZY-3GP

SC4D7U10V5ZY-3GP

DY

DY

GEN_XTA L_OUT

RN20

RN20

1
2 3

SRN22-3-G P

SRN22-3-G P

R88 2K2R2J-2 -GPR88 2K2R2J-2 -GP

PM_STPP CI#13

PM_STPC PU#13

SMBC_ICH15,16,17
SMBD_ICH15,16,17

CLK_PW RGD1 3

12

DY

DY

R89 Do Not Stuff

R89 Do Not Stuff

RN23

RN23

1
2
3
4 5

SRN33J-7 -GP

SRN33J-7 -GP

ER5 Do Not Stuff

ER5 Do Not Stuff

DY

1014 add ER5 for EMI deamnd

DY

B

12

C176

C176

4

12

CPU_SEL 2_R

8
7

PCLKCLK 4

6

PCLKCLK 5

PCLKCLK 3

12

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

1D05V_S 0

C

DY

DY

R302

R302

1 2

Do Not Stuff

Do Not Stuff

12

12

C156

C156

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

DY

DY

PCLKCLK 0
PCLKCLK 1
PCLKCLK 2

PCLKCLK 3

CPU_SEL 2_R

2nd = 71.08513.00 3

2nd = 71.08513.00 3

12

C196

C196

C173

C173

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff

DY

DY

3D3V_48 MPWR_S0

U14

U14

3

X1

2

X2

CLK48

17

USB_48MHZ/FSLA

45

PCI_STOP#

44

CPU_STOP#

7

SCLK

6

SDATA

63

CK_PWRGD/PD#

8

PCI0/CR#_A

10

PCI1/CR#_B

11

PCI2/TME

12

PCI3

13

PCI4/27_SELECT

14

PCI_F5/ITP_EN

64

FSLB/TEST_MODE

5

REF0/FSLC/TEST_SEL

55

NC#55

ICS9LPRS3 65BKLFT-GP-U

ICS9LPRS3 65BKLFT-GP-U

71.09365.A03

71.09365.A03

R80

R80

1 2

0R2J-2-GP

0R2J-2-GP

3D3V_S0

DY

DY

3D3V_CL KGEN_S0

4

9

16

46

62

VDD48

VDDPCI

VDDREF

VDDSRC

VDDCPU

GNDREF

GNDPCI

GND48

1

15

18

PIN NAME DESCRIPTION

Byte 5, bit 1
0 = SRC3 enabled (default)

SRCC3/CR#_D

SRCC7/CR#_E

SRCT7/CR#_F

SRCC11/CR#_G

SRCT11/CR#_H

1= CR#_D enabled. Byte 5, bit 0 controls whether CR#_D controls SRC1 or SRC4 pair
Byte 5, bit 0
0 = CR#_D controls SRC1 pair (default)
1= CR#_D controls SRC4 pair

Byte 6, bit 7
0 = SRC7# enabled (default)
1= CR#_F controls SRC6

Byte 6, bit 6
0 = SRC7 enabled (default)
1= CR#_F controls SRC8

Byte 6, bit 5
0 = SRC11# enabled (default)
1= CR#_G controls SRC9

Byte 6, bit 4
0 = SRC11 enabled (default)
1= CR#_H controls SRC10

C

1015 modify component size of R80

12

C204

12

C152

C152

Do Not Stuff

Do Not Stuff

3D3V_CL KPLL_S0

19

23

27

33

43

52

56

VDDPLL3

VDD96_IO

VDDSRC_IO

VDDSRC_IO

VDDSRC_IO

VDDCPU_IO

VDDPLL3_IO

27MHZ_NONSS/SRCT1/SE1

27MHZ_SS/SRCC1/SE2

GND

GND

GNDSRC

GNDSRC

GNDSRC

GNDCPU

GND

22

26

30

36

49

59

65

C204

DY

DY

CPUT0
CPUC0

CPUT1_F
CPUC1_F

CPUT2_ITP/SRCT8

CPUC2_ITP/SRCC8

SRCT7/CR#_F

SRCC7/CR#_E

SRCT6
SRCC6

SRCT10
SRCC10

SRCT11/CR#_H

SRCC11/CR#_G

SRCT9
SRCC9

SRCT4
SRCC4

SRCT3/CR#_C

SRCC3/CR#_D

SRCT2/SATAT

SRCC2/SATAC

SRCT0/DOTT_96

SRCC0/DOTC_96

Do Not Stuff

Do Not Stuff

61
60

58
57

54
53

51
50

48
47

41
42

40
39

37
38

34
35

31
32

28
29

24
25

20
21

D

12

C179

C179

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

Do Not Stuff

Do Not Stuff

12

PCIE_REQ_ LAN#_R

PCIE_REQ_ MINI#_R

D

1015 modify component size of R871015 modify component size of R95

12

C226

C226

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

0915 add EC34 for EMI demand

12

Do Not Stuff

Do Not Stuff

EC62

EC31

EC31

DY

DY

EC62

DY

DY

CLK_CPU _BCLK 4
CLK_CPU _BCLK# 4

CLK_MCH _BCLK 6
CLK_MCH _BCLK# 6

CLK_PCIE_ LAN 24
CLK_PCIE_ LAN# 24

SB

CLK_PCIE_ ICH 13
CLK_PCIE_ ICH# 13

SB

SB

CLK_PCIE_ MINI1 31
CLK_PCIE_ MINI1# 31

CLK_MCH _3GPLL 7
CLK_MCH _3GPLL# 7

SB

CLK_PCIE_ SATA 12
CLK_PCIE_ SATA# 12

DREFSSC LK 7
DREFSSC LK# 7

DREFCLK 7
DREFCLK # 7

SEL2
FSC

1
0
0 1
0
0 0 0

UMA Two P hase 2

UMA Two P hase 2

UMA Two P hase 2

Title

Title

Title

Size Document N umber Rev

Size Document N umber Rev

Size Document N umber Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

E

3D3V_S0

3D3V_CL KGEN_S03D3V_48 MPWR_S0

12

C224

C224

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

CLK48_ICHPCLK_ICHPCLK_KBCCLK_ICH14

12

Do Not Stuff

Do Not Stuff

EC66

EC66

DY

DY

12

Do Not Stuff

Do Not Stuff

1 2

C155

C155

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

R87

R87

0R2J-2-GP

0R2J-2-GP

12

EC33

EC33

DY

DY

12

DY

DY

CLK48_5 159

PCLK_FW H

C205

C205

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff

CPU

DY

NB

DY

LAN

1126 add the net(PCIE_REQ_LAN#)

SB DMI

1120 swap these
nets(CLK_MCH_3GPLL,CLK_MCH_3GPLL#,
CLK_PCIE_MINI1,CLK_PCIE_MINI1#)

1126 add the net(PCIE_REQ_MINI#)

MINI1

NB CLK

1120 move these nets
(CLK_PCIE_MINI1,CLK_PCIE_MINI1#)

SB SATA

NB CLK
NB CLK

(96 MHz)

SEL1
FSB

SEL0
FSA

0 1
0 1

CPU

100M
133M

1
01

166M
200M

1066M266M

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Clock Generator

Clock Generator

Clock Generator

HM40-MV

HM40-MV

HM40-MV

3 51Monday, December 0 1, 2008

3 51Monday, December 0 1, 2008

3 51Monday, December 0 1, 2008

E

12

EC34

EC34

DY

DY

12

EC25

EC25

FSB

X
533M
667M
800M

SB

SB

SB

A

B

C

D

E

H_A#[35..3 ]6

4 4

H_ADSTB #06
H_REQ#[4 ..0]6

3 3

Side Band
Non GTL

H_ADSTB #16

H_A20M#12

H_FERR#12

H_IGNNE#12

H_STPCL K#12

H_INTR12
H_NMI12
H_SMI#12

2 2

TP20Do Not Stu ff TP20Do Not S tuff

XDP_TMS

XDP_TDI

XDP_BPM #5

H_CPURS T#

XDP_TCK

1 1

XDP_TRS T#

H_A#[35..3 ]

1 OF 4

1 OF 4

U33A

U33A

H_A#3

J4

H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35

1

A3#

L5

A4#

L4

A5#

K5

A6#

M3

A7#

N2

A8#

J1

A9#

N3

A10#

P5

A11#

P2

A12#

L2

A13#

P4

A14#

P1

A15#

R1

A16#

M1

ADSTB0#

K3

REQ0#

H2

REQ1#

K2

REQ2#

J3

REQ3#

L1

REQ4#

Y2

A17#

U5

A18#

R3

A19#

W6

A20#

U4

A21#

Y5

A22#

U1

A23#

R4

A24#

T5

A25#

T3

A26#

W2

A27#

W5

A28#

Y4

A29#

U2

A30#

V4

A31#

W3

A32#

AA4

A33#

AB2

A34#

AA3

A35#

V1

ADSTB1#

A6

A20M#

A5

FERR#

C4

IGNNE#

D5

STPCLK#

C6

LINT0

B4

LINT1

A3

SMI#

M4

RSVD#M4

N5

RSVD#N5

T2

RSVD#T2

V3

RSVD#V3

B2

RSVD#B2

C3

RSVD#C3

D2

RSVD#D2

D22

RSVD#D22

D3

RSVD#D3

F6

RSVD#F6

B1

KEY_NC

BGA479-S KT6-GPU7

BGA479-S KT6-GPU7

62.10079.001

62.10079.001

2nd: 62.10053.401

R50 5 4D9R2F-L1-GPR50 54D9R 2F-L1-GP

1 2

R48 5 4D9R2F-L1-GPR48 54D9R 2F-L1-GP

1 2

R43 5 4D9R2F-L1-GPR43 54D9R 2F-L1-GP

1 2

R213 Do Not Stuff

R213 Do Not Stuff

1 2

DY

DY

R41 5 4D9R2F-L1-GPR41 54D9R 2F-L1-GP

1 2

R42 5 4D9R2F-L1-GPR42 54D9R 2F-L1-GP

All place within 2" to CPU

1 2

A

ADDR GROUP 0

ADDR GROUP 0

ADDR GROUP 1

ADDR GROUP 1

ICH

ICH

RESERVED

RESERVED

1D05V_S 0

DEFER#

DRDY#
DBSY#

IERR#

LOCK#

RESET#

TRDY#

HITM#

BPM0#
BPM1#
BPM2#
BPM3#
PRDY#
PREQ#

TRST#

XDP/ITP SIGNALS CONTROL

XDP/ITP SIGNALS CONTROL
THERMAL

THERMAL

PROCHOT#

THRMDA
THRMDC

THERMTRIP#

HCLK

HCLK

BCLK0
BCLK1

ADS#
BNR#
BPRI#

BR0#

INIT#

RS0#

RS1#

RS2#

HIT#

TCK

TDI
TDO
TMS

DBR#

H1
E2
G5

H5
F21
E1

F1

D20
B3

H4

C1

H_RS#0

F3

H_RS#1

F4

H_RS#2

G3
G2

G6
E4

AD4
AD3
AD1
AC4
AC2

XDP_BPM #5

AC1

XDP_TCK

AC5

XDP_TDI

AA6

XDP_TDO

AB3

XDP_TMS

AB5

XDP_TRS T#

AB6

XDP_DBR ESET#

C20

CPU_PRO CHOT#

D21
A24
B25

C7

A22
A21

1

PM_THRMTRIP#
should connect to
ICH9 and MCH
without T-ing

( No stub)

B

TP11 Do N ot StuffTP 11 Do Not Stuff

H_ADS# 6
H_BNR# 6

H_BPRI# 6

H_DEFER # 6
H_DRDY# 6
H_DBSY# 6

H_BREQ# 0 6

H_IERR#

H_INIT# 12

H_LOCK# 6

H_CPURS T# 6,4 8

H_TRDY# 6

H_HIT# 6
H_HITM# 6

H_THERM DA 32
H_THERM DC 32

PM_THRM TRIP-A# 7,12,39

CLK_CPU _BCLK 3
CLK_CPU _BCLK# 3

1D05V_S 0

12

R64

R64
56R2J-4-G P

56R2J-4-G P

H_RS#[2..0 ] 6

1D05V_S 0

Layout Note:
"CPU_GTLREF0"

0.5" max length.

12

R63

R63
68R2-GP

68R2-GP

DY

DY

1 2

R62

R62

Do Not Stuff

Do Not Stuff

Place testpoint on
H_IERR# with a GND

0.1" away

Follow Demo Circuit

1 2

R65 Do Not Stuff

R65 Do Not Stuff

1 2

R215 Do Not Stuff

R215 Do Not Stuff

C343 Do Not Stuff

C343 Do Not Stuff

XDP_DBR ESET#

XDP_TDO

R60 D o Not Stuff

R60 D o Not Stuff

R47 D o Not Stuff

R47 D o Not Stuff

H_THERM DA

H_THERM DC

1KR2F-3-G P

1KR2F-3-G P

2KR2F-3-G P

2KR2F-3-G P

DY

DY

DY

DY

12

DY

DY

1 2

DY

DY

1 2

DY

DY

12

C438

C438

DY

DY

Do Not Stuff

Do Not Stuff

CPU_PRO CHOT#_R 4 1

1D05V_S 0

R179

R179

1 2

12

R181

R181

TEST1

TEST2

TEST4

C

12

DY

DY

3D3V_S0

1D05V_S 0

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8

H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14

H_DSTBN #06
H_DSTBP #06
H_DINV#06

H_DSTBN #16
H_DSTBP #16
H_DINV#16

CPU_GTL REF0

C352

C352

Do Not Stuff

Do Not Stuff

TP18D o Not Stuff TP18Do Not Stuff

TP44D o Not Stuff TP44Do Not Stuff
TP60D o Not Stuff TP60Do Not Stuff

CPU_SEL 03,7
CPU_SEL 13,7
CPU_SEL 23,7

Net "TEST4" as short as possible,
make sure "TEST4" routing is
reference to GND and away other
noisy signals

H_D#15

H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31

TEST1
TEST2
RSVD_CP U_12

1

TEST4
RSVD_CP U_13

1

RSVD_CP U_14RSVD_CP U_11

1

AD26

AF26

U33B

U33B

E22

D0#

F24

D1#

E26

D2#

G22

D3#

F23

D4#

G25

D5#

E25

D6#

E23

D7#

K24

D8#

G24

D9#

J24

D10#

J23

D11#

H22

D12#

F26

D13#

K22

D14#

H23

D15#

J26

DSTBN0#

H26

DSTBP0#

H25

DINV0#

N22

D16#

K25

D17#

P26

D18#

R23

D19#

L23

D20#

M24

D21#

L22

D22#

M23

D23#

P25

D24#

P23

D25#

P22

D26#

T24

D27#

R24

D28#

L25

D29#

T25

D30#

N25

D31#

L26

DSTBN1#

M26

DSTBP1#

N24

DINV1#

GTLREF

C23

TEST1

D25

TEST2

C24

TEST3
TEST4

AF1

TEST5

A26

TEST6

B22

BSEL0

B23

BSEL1

C21

BSEL2

BGA479-S KT6-GPU7

BGA479-S KT6-GPU7

62.10079.001

62.10079.001

2 OF 4

2 OF 4

D

DATA GRP0 DATA GRP1

DATA GRP0 DATA GRP1

MISC

MISC

H_DINV#[3..0]

H_DSTBN #[3..0]

H_DSTBP #[3..0]

H_D#[63..0 ]

H_D#32

Y22

D32#
D33#
D34#
D35#
D36#
D37#
D38#
D39#
D40#
D41#
D42#

DATA GRP2DATA GRP3

DATA GRP2DATA GRP3

D43#
D44#
D45#
D46#
D47#

DSTBN2#

DSTBP2#

DINV2#

D48#
D49#
D50#
D51#
D52#
D53#
D54#
D55#
D56#
D57#
D58#
D59#
D60#
D61#
D62#
D63#

DSTBN3#

DSTBP3#

DINV3#

COMP0

COMP1
COMP2
COMP3

DPRSTP#

DPSLP#

DPWR#

PWRGOOD

SLP#

PSI#

UMA Two P hase 2

UMA Two P hase 2

UMA Two P hase 2

Title

Title

Title

Size Document N umber Rev

Size Document N umber Rev

Size Document N umber Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

AB24
V24
V26
V23
T22
U25
U23
Y25
W22
Y23
W24
W25
AA23
AA24
AB25
Y26
AA26
U22

AE24
AD24
AA21
AB22
AB21
AC26
AD20
AE22
AF23
AC25
AE21
AD21
AC22
AD23
AF22
AC23
AE25
AF24
AC20

R26
U26
AA1
Y1

E5
B5
D24
D6
D7
AE6

H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47

H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

COMP0
COMP1
COMP2
COMP3

H_DINV#[3..0] 6

H_DSTBN #[3..0] 6

H_DSTBP #[3..0] 6

H_D#[63..0 ] 6

H_DSTBN #2 6
H_DSTBP #2 6
H_DINV#2 6

H_DSTBN #3 6
H_DSTBP #3 6
H_DINV#3 6

R53 2 7D4R2F-L1-GPR53 27D4R 2F-L1-GP

1 2

R51 5 4D9R2F-L1-GPR51 54D9R 2F-L1-GP

1 2

R45 2 7D4R2F-L1-GPR45 27D4R 2F-L1-GP

1 2

R44 5 4D9R2F-L1-GPR44 54D9R 2F-L1-GP

1 2

H_DPRST P# 7,12,41
H_DPSLP # 12
H_DPW R# 6
H_PW RGD 12 ,39,48
H_CPUSL P# 6
PSI# 41

Layout Note:
Comp0, 2 connect with Zo=27.4 ohm, make
trace length shorter than 0.5" .
Comp1, 3 connect with Zo=55 ohm, make
trace length shorter than 0.5" .

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

CPU (1 of 2)

CPU (1 of 2)

CPU (1 of 2)

HM40-MV

HM40-MV

HM40-MV

E

SB

SB

4 51Monday, December 0 1, 2008

4 51Monday, December 0 1, 2008

4 51Monday, December 0 1, 2008

SB

A

VCC_COR E

AB20
AB7
AC7
AC9
AC12
AC13
AC15
AC17
AC18
AD7
AD9
AD10
AD12
AD14
AD15
AD17
AD18
AE9
AE10
AE12
AE13
AE15
AE17
AE18
AE20
AF9
AF10
AF12
AF14
AF15
AF17
AF18
AF20

G21
V6
J6
K6
M6
J21
K21
M21
N21
N6
R21
R6
T21
T6
V21
W21

B26
C26

AD6
AF5
AE5
AF4
AE3
AF3
AE2

AF7

AE7

VCC_COR E

H_VID0
H_VID1
H_VID2
H_VID3
H_VID4
H_VID5
H_VID6

12

C84

C84

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

VCC_COR E

VCC_COR E

CAP

CAP

DY

DY

H_VID[6..0] 41

12

R38

R38
100R2F-L 1-GP-U

100R2F-L 1-GP-U

12

R39

R39
100R2F-L 1-GP-U

100R2F-L 1-GP-U

VCC_COR E

4 4

3 3

AA10
AA12

2 2

1 1

AA13
AA15
AA17
AA18
AA20

AC10
AB10
AB12
AB14
AB15
AB17
AB18

U33C

U33C

A7

VCC

A9

VCC

A10

VCC

A12

VCC

A13

VCC

A15

VCC

A17

VCC

A18

VCC

A20

VCC

B7

VCC

B9

VCC

B10

VCC

B12

VCC

B14

VCC

B15

VCC

B17

VCC

B18

VCC

B20

VCC

C9

VCC

C10

VCC

C12

VCC

C13

VCC

C15

VCC

C17

VCC

C18

VCC

D9

VCC

D10

VCC

D12

VCC

D14

VCC

D15

VCC

D17

VCC

D18

VCC

E7

VCC

E9

VCC

E10

VCC

E12

VCC

E13

VCC

E15

VCC

E17

VCC

E18

VCC

E20

VCC

F7

VCC

F9

VCC

F10

VCC

F12

VCC

F14

VCC

F15

VCC

F17

VCC

F18

VCC

F20

VCC

AA7

VCC

AA9

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

AB9

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

BGA479-S KT6-GPU7

BGA479-S KT6-GPU7

62.10079.001

62.10079.001

3 OF 4

3 OF 4

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP

VCCA
VCCA

VID0
VID1
VID2
VID3
VID4
VID5
VID6

VCCSENSE

VSSSENSE

DY

DY

12

C68

C68

12

12

B

12

12

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff

DY

DY

CAP

CAP

12

12

C420

C420

12

C91

C91

C53

C53

Do Not Stuff

Do Not Stuff

DY

DY

12

C90

C90

C61

C61

Do Not Stuff

Do Not Stuff

CAP

CAP

12

C429

C429

Do Not Stuff

Do Not Stuff

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

VCC_SEN SE 41

VSS_SEN SE 41

C97

C97

C54

C54

Do Not Stuff

Do Not Stuff

DY

DY

12

C92

C92

C70

C70

Do Not Stuff

Do Not Stuff

CAP

CAP

1D05V_S 0

Do Not Stuff

Do Not Stuff

layout note: "1D5V_VCCA_S0"
as short as possible

1D5V_VC CA_S0

DY

DY

Layout Note:

VCCSENSE and VSSSENSE lines
should be of equal length.

Layout Note:
Provide a test point (with
no stub) to connect a
differential probe
between VCCSENSE and
VSSSENSE at the location
where the two 54.9ohm
resistors terminate the
55 ohm transmission line.

VCC_COR E

12

C59

C59

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff

DY

DY

12

12

C383

C383

C382

C382

Do Not Stuff

Do Not Stuff

CAP

CAP

CAP

CAP

L10

L10

1 2

PBY160808 T-121Y-GP

PBY160808 T-121Y-GP

68.00206.021

68.00206.021

2nd = 68.00230.041

2nd = 68.00230.041

C

VCC_COR E

12

12

C93

C93

Do Not Stuff

Do Not Stuff

DY

DY

12

C384

C384

Do Not Stuff

Do Not Stuff

1D5V_S0

12

C96

C96

C52

C52

Do Not Stuff

Do Not Stuff

Do Not Stuff

DY

DY

SB

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

Do Not Stuff

DY

DY

1126 add C48,C49,C71,C79...

12

12

C48

C48

C381

C381

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

1D05V_S 0

12

12

C80

C80

C62

C62

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

12

12

C69

C69

C78

C78

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

12

TC6

TC6

ST900U2 D5VM-1-GP

ST900U2 D5VM-1-GP

NEC

NEC

3 4

77.E9071.011

77.E9071.011

12

12

C49

C49

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

12

C81

C81

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

12

C71

C71

C79

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

C79

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

12

12

C82

C82

C83

C83

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

12

12

C65

C65

C63

C63

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

Do Not Stuff

Do Not Stuff

DY

DY

D

4 OF 4

4 OF 4

U33D

U33D

A4

VSS

A8

VSS

A11

VSS

A14

VSS

A16

VSS

A19

VSS

A23

1

TP46D o Not Stuff TP46Do Not Stuff

12

12

C66

C66

C446

C446

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

Do Not Stuff

Do Not Stuff

DY

DY

VSS

AF2

VSS

B6

VSS

B8

VSS

B11

VSS

B13

VSS

B16

VSS

B19

VSS

B21

VSS

B24

VSS

C5

VSS

C8

VSS

C11

VSS

C14

VSS

C16

VSS

C19

VSS

C2

VSS

C22

VSS

C25

VSS

D1

VSS

D4

VSS

D8

VSS

D11

VSS

D13

VSS

D16

VSS

D19

VSS

D23

VSS

D26

VSS

E3

VSS

E6

VSS

E8

VSS

E11

VSS

E14

VSS

E16

VSS

E19

VSS

E21

VSS

E24

VSS

F5

VSS

F8

VSS

F11

VSS

F13

VSS

F16

VSS

F19

VSS

F2

VSS

F22

VSS

F25

VSS

G4

VSS

G1

VSS

G23

VSS

G26

VSS

H3

VSS

H6

VSS

H21

VSS

H24

VSS

J2

VSS

J5

VSS

J22

VSS

J25

VSS

K1

VSS

K4

VSS

K23

VSS

K26

VSS

L3

VSS

L6

VSS

L21

VSS

L24

VSS

M2

VSS

M5

VSS

M22

VSS

M25

VSS

N1

VSS

N4

VSS

N23

VSS

N26

VSS

P3

VSS

BGA479-S KT6-GPU7

BGA479-S KT6-GPU7

62.10079.001

62.10079.001

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

P6
P21
P24
R2
R5
R22
R25
T1
T4
T23
T26
U3
U6
U21
U24
V2
V5
V22
V25
W1
W4
W23
W26
Y3
Y6
Y21
Y24
AA2
AA5
AA8
AA11
AA14
AA16
AA19
AA22
AA25
AB1
AB4
AB8
AB11
AB13
AB16
AB19
AB23
AB26
AC3
AC6
AC8
AC11
AC14
AC16
AC19
AC21
AC24
AD2
AD5
AD8
AD11
AD13
AD16
AD19
AD22
AD25
AE1
AE4
AE8
AE11
AE14
AE16
AE19
AE23
AE26
A2
AF6
AF8
AF11
AF13
AF16
AF19
AF21
A25
AF25

E

1

1
1

1
1

TP45Do Not Stu ff TP45Do Not S tuff

TP48Do Not Stu ff TP48Do Not S tuff
TP21Do Not Stu ff TP21Do Not S tuff

TP61Do Not Stu ff TP61Do Not S tuff
TP43Do Not Stu ff TP43Do Not S tuff

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

Size Document N umber Rev

Size Document N umber Rev

Size Document N umber Rev

Date: Sheet of

Date: Sheet of

A

B

C

D

Date: Sheet of

HM40-MV

HM40-MV

HM40-MV

Taipei Hsien 221, Taiwan, R.O.C.

CPU (2 of 2)

CPU (2 of 2)

CPU (2 of 2)

E

SB

SB

5 51Monday, December 0 1, 2008

5 51Monday, December 0 1, 2008

5 51Monday, December 0 1, 2008

SB

5

H_SW ING

1D05V_S 0

12

R239

R239
221R2F-2 -GP

221R2F-2 -GP

12

R238

R238
100R2F-L 1-GP-U

100R2F-L 1-GP-U

H_RCOMP

D D

H_SWING routing Trace width and
Spacing use 10 / 20 mil

H_SWING Resistors and
Capacitors close MCH
500 mil ( MAX )

12

C478

SCD1U10 V2KX-4GP

SCD1U10 V2KX-4GP

C C

H_RCOMP routing Trace width and
Spacing use 10 / 20 mil

C478

1 2

R226

R226

24D9R2F -L-GP

24D9R2F -L-GP

Place them near to the chip ( < 0.5")

B B

H_D#[63..0 ]4

1D05V_S 0

1 2

12

4

R241

R241
1KR2F-3-G P

1KR2F-3-G P

H_AVREF

R240

R240
2KR2F-3-G P

2KR2F-3-G P

H_D#[63..0 ]

H_CPURS T#4,48
H_CPUSL P#4

12

C479

C479
SCD1U16 V2ZY-2GP

SCD1U16 V2ZY-2GP

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

H_SW ING
H_RCOMP

U35A

U35A

F2

H_D#_0

G8

H_D#_1

F8

H_D#_2

E6

H_D#_3

G2

H_D#_4

H6

H_D#_5

H2

H_D#_6

F6

H_D#_7

D4

H_D#_8

H3

H_D#_9

M9

H_D#_10

M11

H_D#_11

J1

H_D#_12

J2

H_D#_13

N12

H_D#_14

J6

H_D#_15

P2

H_D#_16

L2

H_D#_17

R2

H_D#_18

N9

H_D#_19

L6

H_D#_20

M5

H_D#_21

J3

H_D#_22

N2

H_D#_23

R1

H_D#_24

N5

H_D#_25

N6

H_D#_26

P13

H_D#_27

N8

H_D#_28

L7

H_D#_29

N10

H_D#_30

M3

H_D#_31

Y3

H_D#_32

AD14

H_D#_33

Y6

H_D#_34

Y10

H_D#_35

Y12

H_D#_36

Y14

H_D#_37

Y7

H_D#_38

W2

H_D#_39

AA8

H_D#_40

Y9

H_D#_41

AA13

H_D#_42

AA9

H_D#_43

AA11

H_D#_44

AD11

H_D#_45

AD10

H_D#_46

AD13

H_D#_47

AE12

H_D#_48

AE9

H_D#_49

AA2

H_D#_50

AD8

H_D#_51

AA3

H_D#_52

AD3

H_D#_53

AD7

H_D#_54

AE14

H_D#_55

AF3

H_D#_56

AC1

H_D#_57

AE3

H_D#_58

AC3

H_D#_59

AE11

H_D#_60

AE8

H_D#_61

AG2

H_D#_62

AD6

H_D#_63

C5

H_SWING

E3

H_RCOMP

C12

H_CPURST#

E11

H_CPUSLP#

A11

H_AVREF

B11

H_DVREF

CANTIGA-GM-G P-U-NF

CANTIGA-GM-G P-U-NF

71.CNTIG.00U

71.CNTIG.00U

3

1 OF 10

1 OF 10

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35

H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3

H_DSTBN #0
H_DSTBN #1
H_DSTBN #2
H_DSTBN #3

H_DSTBP #0
H_DSTBP #1
H_DSTBP #2
H_DSTBP #3

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

H_RS#0
H_RS#1
H_RS#2

HOST

HOST

H_A#_3
H_A#_4
H_A#_5
H_A#_6
H_A#_7
H_A#_8

H_A#_9
H_A#_10
H_A#_11
H_A#_12
H_A#_13
H_A#_14
H_A#_15
H_A#_16
H_A#_17
H_A#_18
H_A#_19
H_A#_20
H_A#_21
H_A#_22
H_A#_23
H_A#_24
H_A#_25
H_A#_26
H_A#_27
H_A#_28
H_A#_29
H_A#_30
H_A#_31
H_A#_32
H_A#_33
H_A#_34
H_A#_35

H_ADS#
H_ADSTB#_0
H_ADSTB#_1

H_BNR#

H_BPRI#

H_BREQ#

H_DEFER#

H_DBSY#

HPLL_CLK

HPLL_CLK#

H_DPWR#

H_DRDY#

H_HIT#

H_HITM#
H_LOCK#
H_TRDY#

H_DINV#_0
H_DINV#_1
H_DINV#_2
H_DINV#_3

H_DSTBN#_0
H_DSTBN#_1
H_DSTBN#_2
H_DSTBN#_3

H_DSTBP#_0
H_DSTBP#_1
H_DSTBP#_2
H_DSTBP#_3

H_REQ#_0
H_REQ#_1

H_REQ#_2
H_REQ#_3

H_REQ#_4

H_RS#_0
H_RS#_1
H_RS#_2

A14
C15
F16
H13
C18
M16
J13
P16
R16
N17
M13
E17
P17
F17
G20
B19
J16
E20
H16
J20
L17
A17
B17
L16
C21
J17
H20
B18
K17
B20
F21
K21
L20

H12
B16
G17
A9
F11
G12
E9
B10
AH7
AH6
J11
F9
H9
E12
H11
C9

J8
L3
Y13
Y1

L10
M7
AA5
AE6

L9
M8
AA6
AE5

B15
K13
F13
B13
B14

B6
F12
C8

2

H_A#[35..3 ]

H_ADS# 4
H_ADSTB #0 4
H_ADSTB #1 4
H_BNR# 4

H_BPRI# 4

H_BREQ# 0 4

H_DEFER # 4

H_DBSY# 4

CLK_MCH _BCLK 3
CLK_MCH _BCLK# 3

H_DPW R# 4
H_DRDY# 4
H_HIT# 4
H_HITM# 4

H_LOCK# 4

H_TRDY# 4

H_DINV#[3..0]

H_DSTBN #[3..0]

H_DSTBP #[3..0]

H_REQ#[4 ..0]

H_RS#[2..0 ]

1

H_A#[35..3 ] 4

H_DINV#[3..0] 4

H_DSTBN #[3..0] 4

H_DSTBP #[3..0] 4

H_REQ#[4 ..0] 4

H_RS#[2..0 ] 4

A A

5

4

3

2

UMA Two P hase 2

UMA Two P hase 2

UMA Two P hase 2

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

Cantiga (1 of 6)_HOST

Cantiga (1 of 6)_HOST

Size Document N umber Rev

Size Document N umber Rev

Size Document N umber Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Cantiga (1 of 6)_HOST

HM40-MV

HM40-MV

HM40-MV

Taipei Hsien 221, Taiwan, R.O.C.

6 51Wednesd ay, November 26, 200 8

6 51Wednesd ay, November 26, 200 8

6 51Wednesd ay, November 26, 200 8

1

SB

SB

SB

5

1D8V_S3

12

R251

R251
1KR2F-3-GP

1KR2F-3-GP

SM_RCOMP_VOH

12

C489

C489

SC2D2U6D3V 3MX-1-GP

SC2D2U6D3V 3MX-1-GP

SM_RCOMP_VOL

12

C483

C483

SC2D2U6D3V 3MX-1-GP

SC2D2U6D3V 3MX-1-GP

R250

R250
3K01R2F-3-GP

3K01R2F-3-GP

R248

R248
1KR2F-3-GP

1KR2F-3-GP

12

C487

C487
SCD01U16V2KX- 3GP

SCD01U16V2KX- 3GP

12

C484

C484
SCD01U16V2KX- 3GP

SCD01U16V2KX- 3GP

D D

12

12

layout take note

1D8V_S3

12

R247

R247
80D6R2F-L-G P

80D6R2F-L-G P

M_RCOMPP

M_RCOMPN

12

R246

R246
80D6R2F-L-G P

C C

B B

PM_EXTTS#0
PM_EXTTS#1

80D6R2F-L-G P

RN29

RN29

4

SRN10KJ-5-G P

SRN10KJ-5-G P

1
23

3D3V_S0

3D3V_S0

PM_SYNC#13

H_DPRSTP#4,12,41

PWROK13,39

PLT_RST1#13,24,30,31,33,34

PM_THRMTR IP-A#4,12,39

PM_DPRSLPVR13,41

R110 Do Not StuffR110 Do Not Stuff

1 2

R211 100R2J-2-GPR211 100R2J-2-GP

CPU_SEL03,4
CPU_SEL13,4
CPU_SEL23,4

R98 Do Not Stuff

R98 Do Not Stuff

1 2

12

C147

C147

Do Not Stuff

Do Not Stuff

DY

DY

12

DY

DY

PM_SYNC#
H_DPRSTP#
PM_EXTTS#0
PM_EXTTS#1
PWROK_G D
RSTIN#
PM_THRMTR IP-A#
PM_DPRSLPVR

Pin Name Strap Description Configuration

A A

CFG20

Digital DisplayPort
(SDVO/DP/HDMI)
Concurrent with
PCIE

5

Low = Only digital DisplayPort
(SDVO/DP/HDMI) or
PCIE is operational (default)

High = Digital DisplayPort
(SDVO/DP/HDMI) and
PCIE are operating simultaneously via the PEG port

CFG20

U35B

U35B

M36

RESERVED#M36

N36

RESERVED#N36

R33

RESERVED#R33

T33

RESERVED#T33

AH9

RESERVED#AH9

AH10

RESERVED#AH10

AH12

RESERVED#AH12

AH13

RESERVED#AH13

K12

RESERVED#K12

AL34

RESERVED#AL34

AK34

RESERVED#AK34

AN35

RESERVED#AN35

AM35

RESERVED#AM35

T24

RESERVED#T24

B31

RESERVED#B31

B2

RESERVED#B2

M1

RESERVED#M1

AY21

RESERVED#AY21

BG23

RESERVED#BG23

BF23

RESERVED#BF23

BH18

RESERVED#BH18

BF18

RESERVED#BF18

T25

CFG_0

R25

CFG_1

P25

CFG_2

P20

CFG_3

P24

CFG_4

C25

CFG_5

N24

CFG_6

M24

CFG_7

E21

CFG_8

C23

CFG_9

C24

CFG_10

N21

CFG_11

P21

CFG_12

T21

CFG_13

R20

CFG_14

M20

CFG_15

L21

CFG_16

H21

CFG_17

P29

CFG_18

R28

CFG_19

T28

CFG_20

R29

PM_SYNC#

B7

PM_DPRSTP#

N33

PM_EXT_TS#_0

P32

PM_EXT_TS#_1

AT40

PWROK

AT11

RSTIN#

T20

THERMTRIP#

R32

DPRSLPVR

BG48

NC#BG48

BF48

NC#BF48

BD48

NC#BD48

BC48

NC#BC48

BH47

NC#BH47

BG47

NC#BG47

BE47

NC#BE47

BH46

NC#BH46

BF46

NC#BF46

BG45

NC#BG45

BH44

NC#BH44

BH43

NC#BH43

BH6

NC#BH6

BH5

NC#BH5

BG4

NC#BG4

BH3

NC#BH3

BF3

NC#BF3

BH2

NC#BH2

BG2

NC#BG2

BE2

NC#BE2

BG1

NC#BG1

BF1

NC#BF1

BD1

NC#BD1

BC1

NC#BC1

F1

NC#F1

A47

NC#A47

CANTIGA-GM- GP-U-NF

CANTIGA-GM- GP-U-NF

71.CNTIG.00U

71.CNTIG.00U

4

2 OF 10

2 OF 10

AP24

SA_CK_0

AT21

SA_CK_1

AV24

SB_CK_0

AU20

SB_CK_1

AR24

SA_CK#_0

AR21

SA_CK#_1

AU24

SB_CK#_0

AV20

SB_CK#_1

BC28

SA_CKE_0

AY28

SA_CKE_1

AY36

SB_CKE_0
SB_CKE_1

SA_CS#_0
SA_CS#_1
SB_CS#_0
SB_CS#_1

SA_ODT_0
SA_ODT_1
SB_ODT_0
SB_ODT_1

SM_RCOMP

SM_RCOMP#

SM_VREF

SM_PWROK

SM_REXT

PEG_CLK

PEG_CLK#

DMI_RXN_0
DMI_RXN_1
DMI_RXN_2
DMI_RXN_3

DMI_RXP_0
DMI_RXP_1
DMI_RXP_2
DMI_RXP_3

DMI_TXN_0
DMI_TXN_1
DMI_TXN_2
DMI_TXN_3

DMI_TXP_0
DMI_TXP_1
DMI_TXP_2
DMI_TXP_3

GFX_VID_0
GFX_VID_1
GFX_VID_2
GFX_VID_3
GFX_VID_4

GFX_VR_EN

CL_CLK

CL_DATA

CL_PWROK

CL_RST#

CL_VREF

CLKREQ#

ICH_SYNC#

TSATN#

HDA_BCLK
HDA_RST#

HDA_SDI

HDA_SDO

HDA_SYNC

BB36

BA17
AY16
AV16
AR13

BD17
AY17
BF15
AY13

BG22
BH21

BF28
BH28

AV42
AR36
BF17
BC36

B38
A38
E41
F41

F43
E43

AE41
AE37
AE47
AH39

AE40
AE38
AE48
AH40

AE35
AE43
AE46
AH42

AD35
AE44
AF46
AH43

B33
B32
G33
F33
E33

C34

AH37
AH36
AN36
AJ35
AH34

N28
M28
G36
E36
K36
H36

B12

B28
B30
B29
C29
A28

M_RCOMPP
M_RCOMPN

SM_RCOMP_VOH
SM_RCOMP_VOL

SM_REXT
TP_SM_DRAMR ST#

DREFCLK
DREFCLK#
DREFSSCLK
DREFSSCLK #

DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3

DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_TXP3

DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3

DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3

CLPWRO K_MCH

MCH_CLVRE F

1

MCH_TSATN #

RSVD

RSVD

SM_RCOMP_VOH
SM_RCOMP_VOL

SM_DRAMRST#

DDR CLK/ CONTROL/COMPENSATION

DDR CLK/ CONTROL/COMPENSATION

DPLL_REF_CLK

DPLL_REF_CLK#

DPLL_REF_SSCLK

DPLL_REF_SSCLK#

CLK

CLK

CFG

CFG

DMI

DMI

PM

PM

GRAPHICS VID

GRAPHICS VID

MEHDA

MEHDA

DDPC_CTRLCLK

DDPC_CTRLDATA

NC

NC

SDVO_CTRLCLK

SDVO_CTRLDATA

MISC

MISC

4

M_CLK_DDR0 1 7
M_CLK_DDR1 1 7
M_CLK_DDR2 1 6
M_CLK_DDR3 1 6

M_CLK_DDR#0 17
M_CLK_DDR#1 17
M_CLK_DDR#2 16
M_CLK_DDR#3 16

M_CKE0 17
M_CKE1 17
M_CKE2 16
M_CKE3 16

M_CS0# 17
M_CS1# 17
M_CS2# 16
M_CS3# 16

M_ODT0 17
M_ODT1 17
M_ODT2 16
M_ODT3 16

R243

R243

1 2

TP36Do Not StuffTP36Do Not Stuff

DREFCLK 3

DREFCLK# 3

DREFSSCLK 3

DREFSSCLK # 3

CLK_MCH_3GPL L 3

CLK_MCH_3GPL L# 3

DMI_TXN0 13
DMI_TXN1 13
DMI_TXN2 13
DMI_TXN3 13

DMI_TXP0 13
DMI_TXP1 13
DMI_TXP2 13
DMI_TXP3 13

DMI_RXN0 13
DMI_RXN1 13
DMI_RXN2 13
DMI_RXN3 13

DMI_RXP0 13
DMI_RXP1 13
DMI_RXP2 13
DMI_RXP3 13

R111

R111
Do Not Stuff

Do Not Stuff

CLK_MCH_OE# 3

MCH_ICH_SYNC # 13

R242

R242

12

56R2J-4-GP

56R2J-4-GP

499R2F-2-GP

499R2F-2-GP

12

TP34Do Not Stuff TP34Do Not Stuff

1D05V_S0

3

DDR_VREF _S3

12

C250

C250

1D05V_S0

CL_CLK0 13

CL_DATA0 13
PWROK 13,39
CL_RST#0 13

C231

C231

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

3

0912 delete GMCH_TXB*

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

GMCH_BLUE19

GMCH_GREE N19

GMCH_RED19

GMCH_DDC CLK19
GMCH_DDC DATA19

GMCH_HSYNC19
GMCH_VSYNC19

R93

R93
1KR2F-3-GP

1KR2F-3-GP

1 2

12

12

R92

R92
511R2F-2-GP

511R2F-2-GP

FOR Cantiga:500 ohm
Teenah: 392 ohm

L_BKLTCTL18

GMCH_BL_ON33

CLK_DDC_ED ID18
DAT_DDC _EDID18

GMCH_LCDV DD_ON18

TP73 D o Not StuffTP73 Do Not S tuff

GMCH_TXAC LK-18
GMCH_TXAC LK+18

GMCH_TXAOU T0-18
GMCH_TXAOU T1-18
GMCH_TXAOU T2-18

GMCH_TXAOU T0+18
GMCH_TXAOU T1+18
GMCH_TXAOU T2+18

GMCH_BLUE

GMCH_GREE N

GMCH_RED

GMCH_DDC CLK

L_BKLTCTL
GMCH_BL_ON
LCTLA_CLK

LCTLB_DATA
CLK_DDC_ED ID
DAT_DDC _EDID

GMCH_LCDV DD_ON

LIBG
L_LVBG

1

TVA_DAC
TVB_DAC
TVC_DAC

GMCH_DDC DATA
GMCH_HS

2 3
1

4

GMCH_VS

RN21

RN21

SRN33J-5-G P-U

SRN33J-5-G P-U

CRT_IREF

1 2

R253 1K02R 2F-1-GPR2 53 1K02R2F-1-G P

FOR Cantiga: 1.02k_1% ohm
Teenah: 1.3k ohm

CRT_IREF routing Trace
width use 20 mil

U35C

U35C

L32

L_BKLT_CTRL

G32

L_BKLT_EN

M32

L_CTRL_CLK

M33

L_CTRL_DATA

K33

L_DDC_CLK

J33

L_DDC_DATA

M29

L_VDD_EN

C44

LVDS_IBG

B43

LVDS_VBG

E37

LVDS_VREFH

E38

LVDS_VREFL

C41

LVDSA_CLK#

C40

LVDSA_CLK

B37

LVDSB_CLK#

A37

LVDSB_CLK

H47

LVDSA_DATA#_0

E46

LVDSA_DATA#_1

G40

LVDSA_DATA#_2

A40

LVDSA_DATA#_3

H48

LVDSA_DATA_0

D45

LVDSA_DATA_1

F40

LVDSA_DATA_2

B40

LVDSA_DATA_3

A41

LVDSB_DATA#_0

H38

LVDSB_DATA#_1

G37

LVDSB_DATA#_2

J37

LVDSB_DATA#_3

B42

LVDSB_DATA_0

G38

LVDSB_DATA_1

F37

LVDSB_DATA_2

K37

LVDSB_DATA_3

F25

TVA_DAC

H25

TVB_DAC

K25

TVC_DAC

H24

TV_RTN

C31

TV_DCONSEL_0

E32

TV_DCONSEL_1

E28

CRT_BLUE

G28

CRT_GREEN

J28

CRT_RED

G29

CRT_IRTN

H32

CRT_DDC_CLK

J32

CRT_DDC_DATA

J29

CRT_HSYNC

E29

CRT_TVO_IREF

L29

CRT_VSYNC

CANTIGA-GM- GP-U-NF

CANTIGA-GM- GP-U-NF

71.CNTIG.00U

71.CNTIG.00U

2

PEG_COMPI

PEG_COMPO

PEG_RX#_0
PEG_RX#_1
PEG_RX#_2
PEG_RX#_3
PEG_RX#_4
PEG_RX#_5
PEG_RX#_6
PEG_RX#_7
PEG_RX#_8

PEG_RX#_9
PEG_RX#_10
PEG_RX#_11

LVDS

LVDS

PEG_RX#_12
PEG_RX#_13
PEG_RX#_14
PEG_RX#_15

PEG_RX_0
PEG_RX_1
PEG_RX_2
PEG_RX_3
PEG_RX_4
PEG_RX_5
PEG_RX_6
PEG_RX_7
PEG_RX_8

PEG_RX_9
PEG_RX_10
PEG_RX_11
PEG_RX_12
PEG_RX_13
PEG_RX_14
PEG_RX_15

PEG_TX#_0
PEG_TX#_1
PEG_TX#_2
PEG_TX#_3
PEG_TX#_4
PEG_TX#_5

TV VGA

TV VGA

PEG_TX#_6
PEG_TX#_7
PEG_TX#_8
PEG_TX#_9

PEG_TX#_10
PEG_TX#_11
PEG_TX#_12

PCI-EXPRESS GRAPHICS

PCI-EXPRESS GRAPHICS

PEG_TX#_13
PEG_TX#_14
PEG_TX#_15

PEG_TX_0

PEG_TX_1

PEG_TX_2

PEG_TX_3

PEG_TX_4

PEG_TX_5

PEG_TX_6

PEG_TX_7

PEG_TX_8

PEG_TX_9
PEG_TX_10
PEG_TX_11
PEG_TX_12
PEG_TX_13
PEG_TX_14
PEG_TX_15

1014 swap these nets

GMCH_BLUE

GMCH_GREE N
GMCH_RED

TVA_DAC
TVB_DAC
TVC_DAC

LCTLB_DATA
LCTLA_CLK
CLK_MCH_OE#

GMCH_LCDV DD_ON
GMCH_BL_ON

LIBG

2

RN14

RN14

1
2
3
4 5

SRN150F-1-G P

SRN150F-1-G P

RN15

RN15

1
2
3
4 5

SRN75J-1-G P

SRN75J-1-G P

RN32

RN32

6
7
8

SRN10KJ-6-G P

SRN10KJ-6-G P

RN22

RN22

1
2
3
4 5

SRN100KJ-8-G P-U

SRN100KJ-8-G P-U
R103

R103

1 2

2K37R2F-GP

2K37R2F-GP

3 OF 10

3 OF 10

8
7
6

8
7
6

45
3
2
1

8
7
6

1D05V_S0

R99

R99

PEG_CMP

3D3V_S0

T37
T36

H44
J46
L44
L40
N41
P48
N44
T43
U43
Y43
Y48
Y36
AA43
AD37
AC47
AD39

H43
J44
L43
L41
N40
P47
N43
T42
U42
Y42
W47
Y37
AA42
AD36
AC48
AD40

J41
M46
M47
M40
M42
R48
N38
T40
U37
U40
Y40
AA46
AA37
AA40
AD43
AC46

J42
L46
M48
M39
M43
R47
N37
T39
U36
U39
Y39
Y46
AA36
AA39
AD42
AD46

12

49D9R2F-GP

49D9R2F-GP

Close to GMCH as 500 mils.

0912 add these parts for EMI d emand

1017 delete these parts(EC208~ EC210)

Title

Title

Title

Size Document N umber Rev

Size Document N umber Rev

Size Document N umber Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,

21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,

21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,
Taipei Hsie n 221, Taiwan, R.O.C.

Taipei Hsie n 221, Taiwan, R.O.C.

Taipei Hsie n 221, Taiwan, R.O.C.

Cantiga (2 of 6)_DMI/PM/CFG

Cantiga (2 of 6)_DMI/PM/CFG

Cantiga (2 of 6)_DMI/PM/CFG

HM40-MV

HM40-MV

HM40-MV

1

7 51Monday, Decemb er 01, 2008

7 51Monday, Decemb er 01, 2008

7 51Monday, Decemb er 01, 2008

SB

SB

SB

5

U35D

M_A_DQ[6 3..0]17

D D

C C

B B

M_A_DQ[6 3..0]

M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ1 0
M_A_DQ1 1
M_A_DQ1 2
M_A_DQ1 3
M_A_DQ1 4
M_A_DQ1 5
M_A_DQ1 6
M_A_DQ1 7
M_A_DQ1 8
M_A_DQ1 9
M_A_DQ2 0
M_A_DQ2 1
M_A_DQ2 2
M_A_DQ2 3
M_A_DQ2 4
M_A_DQ2 5
M_A_DQ2 6
M_A_DQ2 7
M_A_DQ2 8
M_A_DQ2 9
M_A_DQ3 0
M_A_DQ3 1
M_A_DQ3 2
M_A_DQ3 3
M_A_DQ3 4
M_A_DQ3 5
M_A_DQ3 6
M_A_DQ3 7
M_A_DQ3 8
M_A_DQ3 9
M_A_DQ4 0
M_A_DQ4 1
M_A_DQ4 2
M_A_DQ4 3
M_A_DQ4 4
M_A_DQ4 5
M_A_DQ4 6
M_A_DQ4 7
M_A_DQ4 8
M_A_DQ4 9
M_A_DQ5 0
M_A_DQ5 1
M_A_DQ5 2
M_A_DQ5 3
M_A_DQ5 4
M_A_DQ5 5
M_A_DQ5 6
M_A_DQ5 7
M_A_DQ5 8
M_A_DQ5 9
M_A_DQ6 0
M_A_DQ6 1
M_A_DQ6 2
M_A_DQ6 3

U35D

AJ38

SA_DQ_0

AJ41

SA_DQ_1

AN38

SA_DQ_2

AM38

SA_DQ_3

AJ36

SA_DQ_4

AJ40

SA_DQ_5

AM44

SA_DQ_6

AM42

SA_DQ_7

AN43

SA_DQ_8

AN44

SA_DQ_9

AU40

SA_DQ_10

AT38

SA_DQ_11

AN41

SA_DQ_12

AN39

SA_DQ_13

AU44

SA_DQ_14

AU42

SA_DQ_15

AV39

SA_DQ_16

AY44

SA_DQ_17

BA40

SA_DQ_18

BD43

SA_DQ_19

AV41

SA_DQ_20

AY43

SA_DQ_21

BB41

SA_DQ_22

BC40

SA_DQ_23

AY37

SA_DQ_24

BD38

SA_DQ_25

AV37

SA_DQ_26

AT36

SA_DQ_27

AY38

SA_DQ_28

BB38

SA_DQ_29

AV36

SA_DQ_30

AW36

SA_DQ_31

BD13

SA_DQ_32

AU11

SA_DQ_33

BC11

SA_DQ_34

BA12

SA_DQ_35

AU13

SA_DQ_36

AV13

SA_DQ_37

BD12

SA_DQ_38

BC12

SA_DQ_39

BB9

SA_DQ_40

BA9

SA_DQ_41

AU10

SA_DQ_42

AV9

SA_DQ_43

BA11

SA_DQ_44

BD9

SA_DQ_45

AY8

SA_DQ_46

BA6

SA_DQ_47

AV5

SA_DQ_48

AV7

SA_DQ_49

AT9

SA_DQ_50

AN8

SA_DQ_51

AU5

SA_DQ_52

AU6

SA_DQ_53

AT5

SA_DQ_54

AN10

SA_DQ_55

AM11

SA_DQ_56

AM5

SA_DQ_57

AJ9

SA_DQ_58

AJ8

SA_DQ_59

AN12

SA_DQ_60

AM13

SA_DQ_61

AJ11

SA_DQ_62

AJ12

SA_DQ_63

CANTIGA-GM-G P-U-NF

CANTIGA-GM-G P-U-NF

71.CNTIG.00U

71.CNTIG.00U

DDR SYSTEM MEMORY A

DDR SYSTEM MEMORY A

4 OF 10

4 OF 10

SA_BS_0
SA_BS_1
SA_BS_2

SA_RAS#
SA_CAS#

SA_WE#

SA_DM_0
SA_DM_1
SA_DM_2
SA_DM_3
SA_DM_4
SA_DM_5
SA_DM_6
SA_DM_7

SA_DQS_0
SA_DQS_1
SA_DQS_2
SA_DQS_3
SA_DQS_4
SA_DQS_5
SA_DQS_6

SA_DQS_7
SA_DQS#_0
SA_DQS#_1
SA_DQS#_2
SA_DQS#_3
SA_DQS#_4
SA_DQS#_5
SA_DQS#_6
SA_DQS#_7

SA_MA_0
SA_MA_1
SA_MA_2
SA_MA_3
SA_MA_4
SA_MA_5
SA_MA_6
SA_MA_7
SA_MA_8

SA_MA_9
SA_MA_10
SA_MA_11
SA_MA_12
SA_MA_13
SA_MA_14

4

BD21
BG18
AT25

BB20
BD20
AY20

AM37
AT41
AY41
AU39
BB12
AY6
AT7
AJ5

AJ44
AT44
BA43
BC37
AW12
BC8
AU8
AM7
AJ43
AT43
BA44
BD37
AY12
BD8
AU9
AM8

BA21
BC24
BG24
BH24
BG25
BA24
BD24
BG27
BF25
AW24
BC21
BG26
BH26
BH17
AY25

M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7

M_A_DQS 0
M_A_DQS 1
M_A_DQS 2
M_A_DQS 3
M_A_DQS 4
M_A_DQS 5
M_A_DQS 6
M_A_DQS 7

M_A_DQS #0
M_A_DQS #1
M_A_DQS #2
M_A_DQS #3
M_A_DQS #4
M_A_DQS #5
M_A_DQS #6
M_A_DQS #7

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14

M_A_DM[7 ..0]

M_A_DQS [7..0]

M_A_DQS #[7..0]

M_A_A[14 ..0]

M_A_BS# 0 17
M_A_BS# 1 17
M_A_BS# 2 17

M_A_RAS # 17
M_A_CAS # 17
M_A_W E# 17

M_A_DM[7 ..0] 17

M_A_DQS [7..0] 17

M_A_DQS #[7..0] 17

M_A_A[14 ..0] 17

3

U35E

M_B_DQ[6 3..0]16

M_B_DQ[6 3..0]

M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ1 0
M_B_DQ1 1
M_B_DQ1 2
M_B_DQ1 3
M_B_DQ1 4
M_B_DQ1 5
M_B_DQ1 6
M_B_DQ1 7
M_B_DQ1 8
M_B_DQ1 9
M_B_DQ2 0
M_B_DQ2 1
M_B_DQ2 2
M_B_DQ2 3
M_B_DQ2 4
M_B_DQ2 5
M_B_DQ2 6
M_B_DQ2 7
M_B_DQ2 8
M_B_DQ2 9
M_B_DQ3 0
M_B_DQ3 1
M_B_DQ3 2
M_B_DQ3 3
M_B_DQ3 4
M_B_DQ3 5
M_B_DQ3 6
M_B_DQ3 7
M_B_DQ3 8
M_B_DQ3 9
M_B_DQ4 0
M_B_DQ4 1
M_B_DQ4 2
M_B_DQ4 3
M_B_DQ4 4
M_B_DQ4 5
M_B_DQ4 6
M_B_DQ4 7
M_B_DQ4 8
M_B_DQ4 9
M_B_DQ5 0
M_B_DQ5 1
M_B_DQ5 2
M_B_DQ5 3
M_B_DQ5 4
M_B_DQ5 5
M_B_DQ5 6
M_B_DQ5 7
M_B_DQ5 8
M_B_DQ5 9
M_B_DQ6 0
M_B_DQ6 1
M_B_DQ6 2
M_B_DQ6 3

U35E

AK47

SB_DQ_0

AH46

SB_DQ_1

AP47

SB_DQ_2

AP46

SB_DQ_3

AJ46

SB_DQ_4

AJ48

SB_DQ_5

AM48

SB_DQ_6

AP48

SB_DQ_7

AU47

SB_DQ_8

AU46

SB_DQ_9

BA48

SB_DQ_10

AY48

SB_DQ_11

AT47

SB_DQ_12

AR47

SB_DQ_13

BA47

SB_DQ_14

BC47

SB_DQ_15

BC46

SB_DQ_16

BC44

SB_DQ_17

BG43

SB_DQ_18

BF43

SB_DQ_19

BE45

SB_DQ_20

BC41

SB_DQ_21

BF40

SB_DQ_22

BF41

SB_DQ_23

BG38

SB_DQ_24

BF38

SB_DQ_25

BH35

SB_DQ_26

BG35

SB_DQ_27

BH40

SB_DQ_28

BG39

SB_DQ_29

BG34

SB_DQ_30

BH34

SB_DQ_31

BH14

SB_DQ_32

BG12

SB_DQ_33

BH11

SB_DQ_34

BG8

SB_DQ_35

BH12

SB_DQ_36

BF11

SB_DQ_37

BF8

SB_DQ_38

BG7

SB_DQ_39

BC5

SB_DQ_40

BC6

SB_DQ_41

AY3

SB_DQ_42

AY1

SB_DQ_43

BF6

SB_DQ_44

BF5

SB_DQ_45

BA1

SB_DQ_46

BD3

SB_DQ_47

AV2

SB_DQ_48

AU3

SB_DQ_49

AR3

SB_DQ_50

AN2

SB_DQ_51

AY2

SB_DQ_52

AV1

SB_DQ_53

AP3

SB_DQ_54

AR1

SB_DQ_55

AL1

SB_DQ_56

AL2

SB_DQ_57

AJ1

SB_DQ_58

AH1

SB_DQ_59

AM2

SB_DQ_60

AM3

SB_DQ_61

AH3

SB_DQ_62

AJ3

SB_DQ_63

CANTIGA-GM-G P-U-NF

CANTIGA-GM-G P-U-NF

71.CNTIG.00U

71.CNTIG.00U

2

5 OF 10

5 OF 10

BC16

SB_BS_0

BB17

SB_BS_1

BB33

SB_BS_2

AU17

SB_RAS#

BG16

SB_CAS#

BF14

SB_WE#

M_B_DM[7 ..0]

M_B_DQS [7..0]

M_B_DQS #[7..0]

M_B_A[14 ..0]

DDR SYSTEM MEMORY B

DDR SYSTEM MEMORY B

SB_DM_0
SB_DM_1
SB_DM_2
SB_DM_3
SB_DM_4
SB_DM_5
SB_DM_6
SB_DM_7

SB_DQS_0
SB_DQS_1
SB_DQS_2
SB_DQS_3
SB_DQS_4
SB_DQS_5
SB_DQS_6

SB_DQS_7
SB_DQS#_0
SB_DQS#_1
SB_DQS#_2
SB_DQS#_3
SB_DQS#_4
SB_DQS#_5
SB_DQS#_6
SB_DQS#_7

SB_MA_0
SB_MA_1
SB_MA_2
SB_MA_3
SB_MA_4
SB_MA_5
SB_MA_6
SB_MA_7
SB_MA_8

SB_MA_9
SB_MA_10
SB_MA_11
SB_MA_12
SB_MA_13
SB_MA_14

AM47
AY47
BD40
BF35
BG11
BA3
AP1
AK2

AL47
AV48
BG41
BG37
BH9
BB2
AU1
AN6
AL46
AV47
BH41
BH37
BG9
BC2
AT2
AN5

AV17
BA25
BC25
AU25
AW25
BB28
AU28
AW28
AT33
BD33
BB16
AW33
AY33
BH15
AU33

M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7

M_B_DQS 0
M_B_DQS 1
M_B_DQS 2
M_B_DQS 3
M_B_DQS 4
M_B_DQS 5
M_B_DQS 6
M_B_DQS 7
M_B_DQS #0
M_B_DQS #1
M_B_DQS #2
M_B_DQS #3
M_B_DQS #4
M_B_DQS #5
M_B_DQS #6
M_B_DQS #7

M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14

1

M_B_BS# 0 16
M_B_BS# 1 16
M_B_BS# 2 16

M_B_RAS # 16
M_B_CAS # 16
M_B_W E# 16

M_B_DQS [7..0] 16

M_B_DQS #[7..0] 16

M_B_A[14 ..0] 16

M_B_DM[7 ..0] 16

A A

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

Cantiga (3 of 6)_DDR

Cantiga (3 of 6)_DDR

Size Document N umber Rev

Size Document N umber Rev

Size Document N umber Rev

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

Cantiga (3 of 6)_DDR

HM40-MV

HM40-MV

HM40-MV

Taipei Hsien 221, Taiwan, R.O.C.

8 51Wednesd ay, November 26, 200 8

8 51Wednesd ay, November 26, 200 8

8 51Wednesd ay, November 26, 200 8

1

SB

SB

SB

5

4

3

2

1

SM_LF1_GMCH
SM_LF2_GMCH
SM_LF3_GMCH
SM_LF4_GMCH
SM_LF5_GMCH
SM_LF6_GMCH
SM_LF7_GMCH

1D05V_S0

12

12

12

C136

C136

C140

C140

C153

C153

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

place near Cantiga

Do Not Stuff

Do Not Stuff

1D05V_S0

12

DY

DY

TC21

TC21

Place CAP where
LVDS and DDR2 taps

12

C207

C207

Do Not Stuff

Do Not Stuff

DY

DY

12

12

12

C162

C162

C183

C183

C163

C163

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

Do Not Stuff

Do Not Stuff

DY

DY

12

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

DY

DY

Place on the Edge Coupling CAP

FOR VCC SM

12

C203

C203

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

C202

C202

C225

C225

Do Not Stuff

Do Not Stuff

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

DY

DY

12

12

12

C208

C208

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

1D05V_S0

C112

C112

C111

C455

C455

Do Not Stuff

Do Not Stuff

12

DY

DY

12

12

C164

C164

C194

C194

Do Not Stuff

Do Not Stuff

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

12

C210

C210

Do Not Stuff

Do Not Stuff

DY

DY

12

C175

C175

12

C211

C211

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

12

C193

C193

C177

1D8V_S3

C177

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SC1U10V3ZY-6GP

SC1U10V3ZY-6GP

C111

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff

12

12

DY

DY

DY

DY

C145

C145

C144

C144

Do Not Stuff

Do Not Stuff

12

12

DY

DY

Coupling CAP 370 mils from the Edge

12

12

C456

C456

C450

C450

Do Not Stuff

Do Not Stuff

Do Not Stuff

DY

DY

Coupling CAP

Do Not Stuff

DY

DY

G9

1 2

Do Not StuffG9Do Not Stuff

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

VCC_GMCH _35

AG34
AC34
AB34
AA34

AM33
AK33

AG33

AE33
AC33
AA33

AH28

AC28
AA28

AG26
AE26
AC26
AH25
AG25

AG24

AH23

U35F

U35F

VCC
VCC
VCC
VCC

Y34

VCC

V34

VCC

U34

VCC
VCC
VCC

AJ33

VCC
VCC

AF33

VCC

VCC
VCC
VCC

Y33

VCC

W33

VCC

V33

VCC

U33

VCC
VCC

AF28

AJ26

AF25

AJ23

AF23

T32

VCC CORE

VCC CORE

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

VCC

Place on the Edge

CANTIGA-GM- GP-U-NF

1118 delete TC27

SB

12

12

12

C172

C172

SCD22U10V2KX-1GP

SCD22U10V2KX-1GP

SCD22U10V2KX-1GP

SCD22U10V2KX-1GP

12

C246

C246

C235

C235

C253

C253

SCD47U16V3ZY-3GP

SCD47U16V3ZY-3GP

SC1U10V3KX-3GP

SC1U10V3KX-3GP

SC1U10V3KX-3GP

SC1U10V3KX-3GP

CANTIGA-GM- GP-U-NF

71.CNTIG.00U

71.CNTIG.00U

6 OF 10

6 OF 10

1D05V_S0

AM32

VCC_NCTF

AL32

VCC_NCTF

AK32

VCC_NCTF

AJ32

VCC_NCTF

POWER

POWER

VCC NCTF

VCC NCTF

VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF

AH32
AG32
AE32
AC32
AA32
Y32
W32
U32
AM30
AL30
AK30
AH30
AG30
AF30
AE30
AC30
AB30
AA30
Y30
W30
V30
U30
AL29
AK29
AJ29
AH29
AG29
AE29
AC29
AA29
Y29
W29
V29
AL28
AK28
AL26
AK26
AK25
AK24
AK23

7 OF 10

VCC GFX NCTF

VCC GFX NCTF

7 OF 10

VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF

VCC_SM_LF
VCC_SM_LF
VCC_SM_LF
VCC_SM_LF
VCC_SM_LF
VCC_SM_LF
VCC_SM_LF

VCC SM LF

VCC SM LF

W28
V28
W26
V26
W25
V25
W24
V24
W23
V23
AM21
AL21
AK21
W21
V21
U21
AM20
AK20
W20
U20
AM19
AL19
AK19
AJ19
AH19
AG19
AF19
AE19
AB19
AA19
Y19
W19
V19
U19
AM17
AK17
AH17
AG17
AF17
AE17
AC17
AB17
Y17
W17
V17
AM16
AL16
AK16
AJ16
AH16
AG16
AF16
AE16
AC16
AB16
AA16
Y16
W16
V16
U16

AV44
BA37
AM40
AV21
AY5
AM10
BB13

1D8V_S3

667MTS 2400mA
800MTS 3000mA

D D

1D05V_S0

C C

B B

TP33 D o Not StuffTP33 Do Not S tuff
TP32 D o Not StuffTP32 Do Not S tuff

1
1

U35G

U35G

AP33

VCC_SM

AN33

VCC_SM

BH32

VCC_SM

BG32

VCC_SM

BF32

VCC_SM

BD32

VCC_SM

BC32

VCC_SM

BB32

VCC_SM

BA32

VCC_SM

AY32

VCC_SM

AW32

VCC_SM

AV32

VCC_SM

AU32

VCC_SM

AT32

VCC_SM

AR32

VCC_SM

AP32

VCC_SM

AN32

VCC_SM

BH31

VCC_SM

BG31

VCC_SM

BF31

VCC_SM

BG30

VCC_SM

BH29

VCC_SM

BG29

VCC_SM

BF29

VCC_SM

BD29

VCC_SM

BC29

VCC_SM

BB29

VCC_SM

BA29

VCC_SM

AY29

VCC_SM

AW29

VCC_SM

AV29

VCC_SM

AU29

VCC_SM

AT29

VCC_SM

AR29

VCC_SM

AP29

VCC_SM

BA36

VCC_SM/NC

BB24

VCC_SM/NC

BD16

VCC_SM/NC

BB21

VCC_SM/NC

AW16

VCC_SM/NC

AW13

VCC_SM/NC

AT13

VCC_SM/NC

Y26

VCC_AXG

AE25

VCC_AXG

AB25

VCC_AXG

AA25

VCC_AXG

AE24

VCC_AXG

AC24

VCC_AXG

AA24

VCC_AXG

Y24

VCC_AXG

AE23

VCC_AXG

AC23

VCC_AXG

AB23

VCC_AXG

AA23

VCC_AXG

AJ21

VCC_AXG

AG21

VCC_AXG

AE21

VCC_AXG

AC21

VCC_AXG

AA21

VCC_AXG

Y21

VCC_AXG

AH20

VCC_AXG

AF20

VCC_AXG

AE20

VCC_AXG

AC20

VCC_AXG

AB20

VCC_AXG

AA20

VCC_AXG

T17

VCC_AXG

T16

VCC_AXG

AM15

VCC_AXG

AL15

VCC_AXG

AE15

VCC_AXG

AJ15

VCC_AXG

AH15

VCC_AXG

AG15

VCC_AXG

AF15

VCC_AXG

AB15

VCC_AXG

AA15

VCC_AXG

Y15

VCC_AXG

V15

VCC_AXG

U15

VCC_AXG

AN14

VCC_AXG

AM14

VCC_AXG

U14

VCC_AXG

T14

VCC_AXG

AJ14

VCC_AXG_SENSE

AH14

VSS_AXG_SENSE

CANTIGA-GM- GP-U-NF

CANTIGA-GM- GP-U-NF

71.CNTIG.00U

71.CNTIG.00U

POWER

POWER

VCC SMVCC GFX

VCC SMVCC GFX

A A

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,

21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,

21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,
Taipei Hsie n 221, Taiwan, R.O.C.

Taipei Hsie n 221, Taiwan, R.O.C.

Title

Title

Title

Size Documen t Number Rev

Size Documen t Number Rev

Size Documen t Number Rev

Date: Sheet

Date: Sheet of

5

4

3

2

Date: Sheet of

Taipei Hsie n 221, Taiwan, R.O.C.

Cantiga (4 of 6)_POWER

Cantiga (4 of 6)_POWER

Cantiga (4 of 6)_POWER

HM40-MV

HM40-MV

HM40-MV

1

of

9 51Monday, Decemb er 01, 2008

9 51Monday, Decemb er 01, 2008

9 51Monday, Decemb er 01, 2008

SB

SB

SB

5

1120 modify EC78SB

5V_S0

12

D D

SB

1113 modify 2nd of U19

1D05V_S 0

R108

R108

1 2

Do Not Stuff

Do Not Stuff

R116

R116

1 2

Do Not Stuff

Do Not Stuff

C C

1D05V_S 0

120ohm 100MHz

1 2

SBK1608 08T-121Y-N-GP

SBK1608 08T-121Y-N-GP

68.00119.101

68.00119.101

2nd = 68.00217.161

2nd = 68.00217.161

1 2

SBK1608 08T-121Y-N-GP

SBK1608 08T-121Y-N-GP

68.00119.101

68.00119.101

2nd = 68.00217.161

2nd = 68.00217.161

120ohm 100MHz

1D05V_S 0

B B

L5

L5

1 2

SBK1608 08T-221Y-N-GP

SBK1608 08T-221Y-N-GP

68.00119.111

68.00119.111

2nd = 68.00217.521

2nd = 68.00217.521

Imax = 300 mA

U44

U44

1

VIN

2

GND
EN3NC#4

G9091-33 0T11U-GP

G9091-33 0T11U-GP

EC78

EC78

2nd = 74.09198.Q7 F

2nd = 74.09198.Q7 F

SC4D7U1 0V3KX-GP

SC4D7U1 0V3KX-GP

L12

L12

L13

L13

VOUT

74.09091.J3F

74.09091.J3F

12

C263

C263

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

12

C267

C267

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

12

C464

C464

12

Do Not Stuff

Do Not Stuff

DY

DY

C463

C463

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

5

4

65mA

M_VCCA_ DPLLA

12

65mA

M_VCCA_ DPLLB

12

12

12

12

3D3V_S0 _DAC

12

EC77

EC77

Do Not Stuff

Do Not Stuff

DY

DY

C258

C258
Do Not Stuff

Do Not Stuff

DY

DY

C265

C265

Do Not Stuff

Do Not Stuff

DY

DY

24mA

M_VCCA_ HPLL

C469

C469
Do Not Stuff

Do Not Stuff

DY

DY

139.2mA

M_VCCA_ MPLL

C468

C468
SCD1U10 V2KX-4GP

SCD1U10 V2KX-4GP

50mA

1D05V_R UN_PEGPLL

C260

C260
SCD1U10 V2KX-4GP

SCD1U10 V2KX-4GP

12

3D3V_S0 _DAC

1015 modify component size of R252

3D3V_S0 _DAC

1 2

0R2J-2-GP

0R2J-2-GP

C485

C485
SC22U16 V0KX-1GP

SC22U16 V0KX-1GP

R249

R249

1 2

HFB1608 VF-102-GP

HFB1608 VF-102-GP

68.00331.011

68.00331.011

2nd = 68.00084.A01

2nd = 68.00084.A01

1D05V_S 0

3D3V_S0 _DAC

220ohm 100MHz

1D5V_S0

L4

L4

1 2

PBY160808 T-181Y-GP

PBY160808 T-181Y-GP

68.00206.041

68.00206.041

180ohm 100MHz

A A

2nd = 68.00214.051

2nd = 68.00214.051

5

1D5VRUN _QDAC

12

C201

C201
SCD1U10 V2KX-4GP

SCD1U10 V2KX-4GP

R252

R252

5mA

1D05V_S 0

4

12

C490

C490
SCD1U10 V2KX-4GP

SCD1U10 V2KX-4GP

720mA

C169

C169

12

12

C178

C178

DY

DY

1D05V_S 0

12

C134

C134

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

4

C492

C492

SCD01U16V2KX-3GP

SCD01U16V2KX-3GP

12

12

1D8V_TX LVDS_S3

1D5V_S0

12

C256

C256
SCD1U10 V2KX-4GP

SCD1U10 V2KX-4GP

C161

C161

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

Do Not Stuff

Do Not Stuff

12

DY

DY

12

C184

C184

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff

DY

DY

SCD1U10 V2KX-4GP

SCD1U10 V2KX-4GP

157.2mA

3D3V_CR TDAC_S0

C494

C494
SCD1U10 V2KX-4GP

SCD1U10 V2KX-4GP

1D8V_TX LVDS_S3

1D05V_R UN_PEGPLL

C157

C157

SC1U10V3KX-3GP

SC1U10V3KX-3GP

12

26mA

12

C180

C180

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

79mA

12

C482

C482
SCD01U1 6V2KX-3GP

SCD01U1 6V2KX-3GP

50mA

1D5V_S0

C181

C181

12

1D5VRUN _QDAC

1D05V_R UN_PEGPLL

12

C261

C261

SCD1U10 V2KX-4GP

SCD1U10 V2KX-4GP

1D8V_S3

60.3mA

12

C239

C239

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

M_VCCA_ DAC_BG

M_VCCA_ DPLLA

M_VCCA_ DPLLB

M_VCCA_ HPLL

M_VCCA_ MPLL

13.2mA

C160

C160

SC1U10V3KX-3GP

SC1U10V3KX-3GP

12

35mA

12

C244

C244
SC10U6D 3V5MX-3GP

SC10U6D 3V5MX-3GP

U35H

U35H

B27

VCCA_CRT_DAC

A26

VCCA_CRT_DAC

A25

VCCA_DAC_BG

B25

VSSA_DAC_BG

F47

VCCA_DPLLA

L48

VCCA_DPLLB

AD1

VCCA_HPLL

AE1

VCCA_MPLL

J48

VCCA_LVDS

J47

VSSA_LVDS

AD48

VCCA_PEG_BG

AA48

VCCA_PEG_PLL

AR20

VCCA_SM

AP20

VCCA_SM

AN20

VCCA_SM

AR17

VCCA_SM

AP17

VCCA_SM

AN17

VCCA_SM

AT16

VCCA_SM

AR16

VCCA_SM

AP16

VCCA_SM

AP28

VCCA_SM_CK

AN28

VCCA_SM_CK

AP25

VCCA_SM_CK

AN25

VCCA_SM_CK

AN24

VCCA_SM_CK

AM28

VCCA_SM_CK_NCTF

AM26

VCCA_SM_CK_NCTF

AM25

VCCA_SM_CK_NCTF

AL25

VCCA_SM_CK_NCTF

AM24

VCCA_SM_CK_NCTF

AL24

VCCA_SM_CK_NCTF

AM23

VCCA_SM_CK_NCTF

AL23

VCCA_SM_CK_NCTF

B24

VCCA_TV_DAC

A24

VCCA_TV_DAC

A32

VCC_HDA

M25

VCCD_TVDAC

L28

VCCD_QDAC

AF1

VCCD_HPLL

AA47

VCCD_PEG_PLL

M38

VCCD_LVDS

L37

VCCD_LVDS

CANTIGA-GM-G P-U-NF

CANTIGA-GM-G P-U-NF

71.CNTIG.00U

71.CNTIG.00U

3

3

CRTPLLA PEGA SM

CRTPLLA PEGA SM

A LVDS

A LVDS

POWER

POWER

A CK

A CK

TV

TV

HDA

HDA

D TV/CRT

D TV/CRT

LVDS

LVDS

AXF

AXF

VCC_SM_CK
VCC_SM_CK
VCC_SM_CK
VCC_SM_CK

SM CK

SM CK

VCC_TX_LVDS

HV

HV

PEG

PEG

DMI

DMI

VTTLF

VTTLF

8 OF 10

8 OF 10

U13

VTT

T13

VTT

U12

VTT

T12

VTT

U11

VTT

T11

VTT

U10

VTT

T10

VTT

U9

VTT

T9

VTT

U8

VTT

T8

VTT

U7

VTT

T7

VTT

U6

VTT

VTT

VTT

T6

VTT

U5

VTT

T5

VTT

V3

VTT

U3

VTT

V2

VTT

U2

VTT

T2

VTT

V1

VTT

U1

VTT

B22

VCC_AXF

B21

VCC_AXF

A21

VCC_AXF

BF21
BH20
BG20
BF20

K47

C35

VCC_HV

B35

VCC_HV

A35

VCC_HV

V48

VCC_PEG

U48

VCC_PEG

V47

VCC_PEG

U47

VCC_PEG

U46

VCC_PEG

AH48

VCC_DMI

AF48

VCC_DMI

AH47

VCC_DMI

AG47

VCC_DMI

A8

VTTLF

L1

VTTLF

AB2

VTTLF

SCD47U6 D3V2KX-GP

SCD47U6 D3V2KX-GP

106mA

1782mA

456mA

VTTLF1
VTTLF2
VTTLF3

C467

C467

1

1

2

2

12

C209

C209

2

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

C481

C481

12

3D3V_HV _S0

12

C466

C466

DY

DY

C133

C133

1

1

SCD47U6D3V2KX-GP

SCD47U6D3V2KX-GP

2

2

2

12

C220

C220

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

SC1U10V3KX-3GP

SC1U10V3KX-3GP

12

C166

C166
SCD1U10 V2KX-4GP

SCD1U10 V2KX-4GP

SC1KP50 V2KX-1GP

SC1KP50 V2KX-1GP

Do Not Stuff

Do Not Stuff

C139

C139

1

1

2

2

1

1D05V_S 0

852mA73mA

12

C213

C213

SC2D2U6D3V3MX-1-GP

SC2D2U6D3V3MX-1-GP

1D05V_S 0

12

C214

C214

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

D18

D18

1

2

BAT54-5-G P

BAT54-5-G P

83.BAT54 .D81

83.BAT54 .D81

2nd = 83.B AT54.X81

2nd = 83.B AT54.X81
3rd = 83.00 054.Z81

3rd = 83.00 054.Z81

1

1

C135

C135

DY

DY

2

2

3

1D05V_S 0

12

Do Not Stuff

Do Not Stuff

1D05V_H V_S0

C138

C138
Do Not Stuff

Do Not Stuff

DY

DY

1 2

R255

R255
10R2F-L-G P

10R2F-L-G P

3D3V_S0 3D3V_HV_S0

322mA

C480

C480

12

Do Not Stuff

Do Not Stuff

DY

DY

R81

R81

1 2

Do Not Stuff

Do Not Stuff

1D8V_SU S_SM_CK_RC

R82

R82

1 2

1D8V_TX LVDS_S3

124mA

1R2F-GP

1R2F-GP

119mA

C457

C457

DY

DY

C198

C198

12

C254

C254
SC1U10V 3KX-3GP

SC1U10V 3KX-3GP

12

C460

C460

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff

DY

DY

12

C462

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

C462
SC10U6D 3V5MX-3GP

SC10U6D 3V5MX-3GP

Cantiga (5 of 6)_POWER

Cantiga (5 of 6)_POWER

Cantiga (5 of 6)_POWER

HM40-MV

HM40-MV

HM40-MV

12

C262

C262

1D05V_S 0

12

12

SCD47U6D3V2KX-GP

SCD47U6D3V2KX-GP

12

C222

C222

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

12

C218

C218

Do Not Stuff

Do Not Stuff

DY

DY

Title

Title

Title

Size Document N umber Rev

Size Document N umber Rev

Size Document N umber Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

1D8V_S31D8V_SU S_SM_CK

1 2

C159

C159
SC10U6D 3V5MX-3GP

SC10U6D 3V5MX-3GP

1D8V_S3

R104

R104

1 2

Do Not Stuff

Do Not Stuff

1D05V_S 0

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

1

R254

R254

Do Not Stuff

Do Not Stuff

10 51Monday, December 01, 2008

10 51Monday, December 01, 2008

10 51Monday, December 01, 2008

12

12

C497

C497

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SB

SB

SB

5

U35I

U35I

AU48

VSS

AR48

VSS

AL48

VSS

BB47

VSS

AW47

VSS

AN47

VSS

AJ47

VSS

D D

C C

B B

A A

5

AF47

VSS

AD47

VSS

AB47

VSS

Y47

VSS

T47

VSS

N47

VSS

L47

VSS

G47

VSS

BD46

VSS

BA46

VSS

AY46

VSS

AV46

VSS

AR46

VSS

AM46

VSS

V46

VSS

R46

VSS

P46

VSS

H46

VSS

F46

VSS

BF44

VSS

AH44

VSS

AD44

VSS

AA44

VSS

Y44

VSS

U44

VSS

T44

VSS

M44

VSS

F44

VSS

BC43

VSS

AV43

VSS

AU43

VSS

AM43

VSS

J43

VSS

C43

VSS

BG42

VSS

AY42

VSS

AT42

VSS

AN42

VSS

AJ42

VSS

AE42

VSS

N42

VSS

L42

VSS

BD41

VSS

AU41

VSS

AM41

VSS

AH41

VSS

AD41

VSS

AA41

VSS

Y41

VSS

U41

VSS

T41

VSS

M41

VSS

G41

VSS

B41

VSS

BG40

VSS

BB40

VSS

AV40

VSS

AN40

VSS

H40

VSS

E40

VSS

AT39

VSS

AM39

VSS

AJ39

VSS

AE39

VSS

N39

VSS

L39

VSS

B39

VSS

BH38

VSS

BC38

VSS

BA38

VSS

AU38

VSS

AH38

VSS

AD38

VSS

AA38

VSS

Y38

VSS

U38

VSS

T38

VSS

J38

VSS

F38

VSS

C38

VSS

BF37

VSS

BB37

VSS

AW37

VSS

AT37

VSS

AN37

VSS

AJ37

VSS

H37

VSS

C37

VSS

BG36

VSS

BD36

VSS

AK15

VSS

AU36

VSS

CANTIGA-GM-G P-U-NF

CANTIGA-GM-G P-U-NF

71.CNTIG.00U

71.CNTIG.00U

VSS

VSS

9 OF 10

9 OF 10

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

4

AM36
AE36
P36
L36
J36
F36
B36
AH35
AA35
Y35
U35
T35
BF34
AM34
AJ34
AF34
AE34
W34
B34
A34
BG33
BC33
BA33
AV33
AR33
AL33
AH33
AB33
P33
L33
H33
N32
K32
F32
C32
A31
AN29
T29
N29
K29
H29
F29
A29
BG28
BD28
BA28
AV28
AT28
AR28
AJ28
AG28
AE28
AB28
Y28
P28
K28
H28
F28
C28
BF26
AH26
AF26
AB26
AA26
C26
B26
BH25
BD25
BB25
AV25
AR25
AJ25
AC25
Y25
N25
L25
J25
G25
E25
BF24
AD12
AY24
AT24
AJ24
AH24
AF24
AB24
R24
L24
K24
J24
G24
F24
E24
BH23
AG23
Y23
B23
A23
AJ6

4

3

U35J

U35J

BG21

VSS

L12

VSS

AW21

VSS

AU21

VSS

AP21

VSS

AN21

VSS

AH21

VSS

AF21

VSS

AB21

VSS

R21

VSS

M21

VSS

J21

VSS

G21

VSS

BC20

VSS

BA20

VSS

AW20

VSS

AT20

VSS

AJ20

VSS

AG20

VSS

Y20

VSS

N20

VSS

K20

VSS

F20

VSS

C20

VSS

A20

VSS

BG19

VSS

A18

VSS

BG17

VSS

BC17

VSS

AW17

VSS

AT17

VSS

R17
M17
H17
C17

BA16

AU16
AN16

N16
K16
G16

E16
BG15
AC15

W15

A15
BG14
AA14

C14
BG13
BC13
BA13

AN13

AJ13

AE13

N13

L13
G13
E13

BF12

AV12

AT12
AM12
AA12

J12

A12
BD11
BB11
AY11
AN11
AH11

Y11

N11

G11

C11
BG10
AV10

AT10

AJ10
AE10
AA10

M10
BF9
BC9
AN9

AM9

AD9

G9

B9
BH8
BB8
AV8
AT8

CANTIGA-GM-G P-U-NF

CANTIGA-GM-G P-U-NF

71.CNTIG.00U

71.CNTIG.00U

3

VSS
VSS
VSS
VSS

VSS

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSS

VSS

NCTF_VSS_SCB#BH48

NCTF_VSS_SCB#BH1

NCTF_VSS_SCB#A48

NCTF_VSS_SCB#C1
NCTF_VSS_SCB#A3

NCTF TEST PIN:

A3,C1,A48,BH1,BH48

NCTF TEST PIN:

A3,C1,A48,BH1,BH48

VSS SCB

VSS SCB

VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF

VSS NCTF

VSS NCTF

VSS_NCTF
VSS_NCTF

NC

NC

10 OF 10

10 OF 10

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSS
VSS
VSS
VSS

NC#E1
NC#D2
NC#C3
NC#B4
NC#A5

NC#A6
NC#A43
NC#A44
NC#B45
NC#C46
NC#D47
NC#B47
NC#A46

NC#F48
NC#E48
NC#C48
NC#B48

2

AH8
Y8
L8
E8
B8
AY7
AU7
AN7
AJ7
AE7
AA7
N7
J7
BG6
BD6
AV6
AT6
AM6
M6
C6
BA5
AH5
AD5
Y5
L5
J5
H5
F5
BE4

BC3
AV3
AL3
R3
P3
F3
BA2
AW2
AU2
AR2
AP2
AJ2
AH2
AF2
AE2
AD2
AC2
Y2
M2
K2
AM1
AA1
P1
H1

U24
U28
U25
U29

AF32
AB32
V32
AJ30
AM29
AF29
AB29
U26
U23
AL20
V20
AC19
AL17
AJ17
AA17
U17

BH48
BH1
A48
C1
A3

E1
D2
C3
B4
A5
A6
A43
A44
B45
C46
D47
B47
A46
F48
E48
C48
B48

2

1

1
1
1
1
1

Title

Title

Title

Size Document N umber Rev

Size Document N umber Rev

Size Document N umber Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

TP71Do Not Stu ff TP71Do Not S tuff
TP67Do Not Stu ff TP67Do Not S tuff
TP74Do Not Stu ff TP74Do Not S tuff
TP65Do Not Stu ff TP65Do Not S tuff
TP66Do Not Stu ff TP66Do Not S tuff

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Cantiga (6 of 6)

Cantiga (6 of 6)

Cantiga (6 of 6)

HM40-MV

HM40-MV

HM40-MV

1

11 51Monday, December 01, 2008

11 51Monday, December 01, 2008

11 51Monday, December 01, 2008

SB

SB

SB

5

3D3V_AU X_S5

D16

D16

D D

RTC1

RTC1

1

PWR

2

GND

NP1

NP1

NP2

NP2

BAT-CON2 -1-GP-U

BAT-CON2 -1-GP-U

62.70001.011

62.70001.011

RTC_BAT

DY

DY

R121

R121

1 2

12

C281

C281
Do Not Stuff

Do Not Stuff

1KR2J-1-G P

1KR2J-1-G P

2

1

RTC_BAT_R

2nd = 83.R 2004.C81

2nd = 83.R 2004.C81

3

CH715FP T-GP

CH715FP T-GP

83.R0304.B81

83.R0304.B81

2 3
1

1 2

R193 1M R2J-1-GPR193 1MR2J -1-GP

SC1U16V 3ZY-GP

SC1U16V 3ZY-GP

1124 delete C540

C C

GLAN_COMP place within 500 mil of ICH9M

3D3V_S0

TP62 Do Not Stu ffTP62 Do Not Stuff

HDD

B B

ODD

RTC_AUX _S5 RTC _AUX_S5

DY

DY

12

12

R199

R199
330KR2F -L-GP

330KR2F -L-GP

R198

R198
Do Not Stuff

Do Not Stuff

5

integrated VccS us1_05,VccSus1_ 5,VccCL1_5

INTVRMEN

High=Enable Low=Disable

integrated VccL an1_05VccCL1_05

LAN100_SLP

High=Enable Low=Disable

12

R200

R200
330KR2F -L-GP

330KR2F -L-GP

INTVRMEN LAN100_SL P

12

R197

R197

DY

DY

Do Not Stuff

Do Not Stuff

A A

RTC_AUX _S5

12

C391

C391
SC1U16V 3ZY-GP

SC1U16V 3ZY-GP

RN51

RN51
SRN20KJ -GP-U

SRN20KJ -GP-U

4

C396

C396

MEDIA_LED #33,36

SATA_RX N020

SATA_RX P020
SATA_TX N020
SATA_TX P020

SATA_RX N121

SATA_RX P121
SATA_TX N121
SATA_TX P121

4

12

near DIMM door1119 add G84 and C540

1

4

C76

C76

1 2

SC12P50 V2JN-3GP

SC12P50 V2JN-3GP

X-32D768 KHZ-46GP

X-32D768 KHZ-46GP

82.30001.861

82.30001.861

2nd = 82.30001.69 1

2nd = 82.30001.69 1

C77

C77

1 2

SC12P50 V2JN-3GP

SC12P50 V2JN-3GP

12

C392

C392
SC1U16V 3ZY-GP

SC1U16V 3ZY-GP

1D5V_S0

GLAN_DO CK#1 3

HDA_DOC K_RST#

R228 Do Not S tuff

R228 Do Not S tuff

C55 SCD01U5 0V2KX-1GPC55 SCD01U5 0V2KX-1GP

1 2

C56 SCD01U5 0V2KX-1GPC56 SCD01U5 0V2KX-1GP

1 2

C58 SCD01U5 0V2KX-1GPC58 SCD01U5 0V2KX-1GP

1 2

C57 SCD01U5 0V2KX-1GPC57 SCD01U5 0V2KX-1GP

1 2

C285 SCD01U5 0V2KX-1GPC285 SCD01U5 0V2KX-1GP

1 2

C286 SCD01U5 0V2KX-1GPC286 SCD01U5 0V2KX-1GP

1 2

C289 SCD01U5 0V2KX-1GPC289 SCD01U5 0V2KX-1GP

1 2

C288 SCD01U5 0V2KX-1GPC288 SCD01U5 0V2KX-1GP

1 2

SB

1117 delete MDC function(R231, R237,R232,R234)

SB

1126 delete R23 0,R233,R235,R23 6 and RN63

ACZ_RST #_AUDIO26
ACZ_SDA TAOUT_AUDIO26
ACZ_SYNC_ AUDIO26

ACZ_BITCL K_AUDIO26

X2

X2

2 3

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff

2 1

R207

R207

1 2

ACZ_SDA TAIN026

1 2

DY

DY

G84

G84

4

1

RTC_X1

12

R57

R57
10MR2J-L -GP

10MR2J-L -GP

RTC_X2

RTC_RST #
SRTC_RS T#
INTRUDER#

INTVRMEN
LAN100_ SLP

LAN_RST YNC

TP50

TP50

GLAN_DO CK#

GLAN_CO MP

24D9R2F -L-GP

24D9R2F -L-GP

ACZ_BIT_C LK_R
ACZ_SYNC_ R

ACZ_RST #_R

ACZ_SDA TAOUT_R

HDA_DOC K_EN#

SATA_RX N0_C
SATA_RX P0_C
SATA_TX N0_C
SATA_TX P0_C

SATA_RX N1_C
SATA_RX P1_C
SATA_TX N1_C
SATA_TX P1_C

3

1016 modify X2

U16A

U16A

C23

RTCX1

C24

RTCX2

A25

RTCRST#

F20

SRTCRST#

C22

INTRUDER#

B22

INTVRMEN

A22

LAN100_SLP

E25

GLAN_CLK

C13

LAN_RSTSYNC

F14

LAN_RXD0

G13

LAN_RXD1

D14

LAN_RXD2

D13

LAN_TXD0

D12

LAN_TXD1

E13

LAN_TXD2

B10

GLAN_DOCK#/GPIO56

B28

GLAN_COMPI

B27

GLAN_COMPO

AF6

HDA_BIT_CLK

AH4

HDA_SYNC

AE7

HDA_RST#

AF4

HDA_SDIN0

AG4

HDA_SDIN1

AH3

HDA_SDIN2

AE5

HDA_SDIN3

AG5

HDA_SDOUT

AG7

HDA_DOCK_EN#/GPIO33

AE8

HDA_DOCK_RST#/GPIO34

AG8

SATALED#

AJ16

SATA0RXN

AH16

SATA0RXP

AF17

SATA0TXN

AG17

SATA0TXP

AH13

SATA1RXN

AJ13

SATA1RXP

AG14

SATA1TXN

AF14

SATA1TXP

ICH9M-GP-NF

ICH9M-GP-NF

71.ICH9M.00U

71.ICH9M.00U

RN63

RN63

SRN47J-4 -GP

SRN47J-4 -GP

3

1
2
3
45

8
7
6

ACZ_RST #_R
ACZ_SDA TAOUT_R
ACZ_SYNC_ R
ACZ_BIT_C LK_R

2

1 OF 6

1 OF 6

LPC_LAD 0

RTCLAN / GLAN

LPCCPU

RTCLAN / GLAN

LPCCPU

IHDA

IHDA

SATA

SATA

FWH0/LAD0
FWH1/LAD1
FWH2/LAD2
FWH3/LAD3

FWH4/LFRAME#

LDRQ1#/GPIO23

CPUPWRGD

THRMTRIP#

SATA4RXN

SATA5RXN

SATA_CLKN

SATA_CLKP

SATARBIAS#

SATARBIAS

LDRQ0#

A20GATE

A20M#

DPRSTP#

DPSLP#

FERR#

IGNNE#

INIT#
INTR

RCIN#

NMI

SMI#

STPCLK#

PECI

SATA4RXP
SATA4TXN
SATA4TXP

SATA5RXP
SATA5TXN
SATA5TXP

K5

LPC_LAD 1

K4

LPC_LAD 2

L6

LPC_LAD 3

K2

K3

LDRQ0#

J3

3D3V_LD RQ1_S0

J1

N7
AJ27

H_DPRST P#

AJ25
AE23

H_FERR# _R

AJ26

AD22

AF25

AE22
AG25
L3

AF23
AF24

AH27

H_THERM TRIP_R

AG26

ICH_TP8

AG27

AH11
AJ11
AG12
AF12

AH9
AJ9
AE10
AF10

AH18
AJ18

SATARBIAS

AJ7
AH7

Place within 50 0 mils of
ICH9 ball

0915 add EC73 for EMI demand

12

EC73

EC73
Do Not Stuff

Do Not Stuff

DY

DY

12

EC65

EC65
Do Not Stuff

Do Not Stuff

DY

DY

2

LPC_LAD [0..3]

LPC_LFR AME# 33,3 4

1
1

KA20GAT E 33
H_A20M# 4

H_DPRST P# 4,7,41
H_DPSLP # 4

H_PW RGD 4,3 9,48

H_IGNNE# 4

H_INIT# 4
H_INTR 4
KBRCIN# 3 3

H_NMI 4
H_SMI# 4

H_STPCL K# 4

TP25 Do N ot StuffTP 25 Do Not Stuff

1

CLK_PCIE_ SATA# 3

CLK_PCIE_ SATA 3

R227

R227

24D9R2F -L-GP

24D9R2F -L-GP

1

LPC_LAD [0..3] 33,34

TP58Do Not Stu ff TP58Do Not S tuff
TP12Do Not Stu ff TP12Do Not S tuff

H_THERM TRIP_R

H_FERR#4

1 2

DY

DY

R229

R229
Do Not Stuff

Do Not Stuff

12

1D05V_S 0 3D3V_S 0

DY

DY

RN55

RN55

Do Not Stuff

Do Not Stuff

H_INIT#_G

B

DY

DY

Q24

Q24

C

E

Do Not Stuff

Do Not Stuff

UMA Two P hase 2

UMA Two P hase 2

UMA Two P hase 2

Title

Title

Title

ICH9-M (1 of 4)_SATA/HDA/RTC

ICH9-M (1 of 4)_SATA/HDA/RTC

ICH9-M (1 of 4)_SATA/HDA/RTC

Size Document N umber Rev

Size Document N umber Rev

Size Document N umber Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

HM40-MV

HM40-MV

HM40-MV

1D05V_S 0

12

R223

R223

DY

DY

Do Not Stuff

Do Not Stuff

H_DPSLP #

1D05V_S 0

RN54

RN54

1
2
3
4 5

H_PW RGD

1

23

4

FWH _INIT#H_INIT#

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

8
7

H_FERR# _R

6

SRN56J-5 -GP

SRN56J-5 -GP

R222

R222
Do Not Stuff

Do Not Stuff

1 2

DY

DY

PM_THRM TRIP-A# 4,7,39

Layout note: R373 needs to placed
within 2" of ICH9, R379 must be
placed within 2" of R373 w/o stub

TP70 Do N ot StuffTP 70 Do Not Stuff

1

12 51Wednesday, November 26, 200 8

12 51Wednesday, November 26, 200 8

12 51Wednesday, November 26, 200 8

1

1D05V_S 0

SB

SB

SB

5

U16B

U16B

D11

AD0

C8
D9

E12

E9
C9

E10

B7
C7
C5

G11

D D

INT_PIRQA#
INT_PIRQB#
INT_PIRQC#
INT_PIRQD#

C C

PCI_PERR#
INT_PIRQE#
PCI_LOCK#
INT_PIRQA#

3D3V_S0

PCI_REQ#2
PCI_REQ#1
SDATAOUT1
PM_CLKRUN#

3D3V_S0

LAN

PCIE_RXN124

PCIE_RXP124
PCIE_TXN124
PCIE_TXP124

PCIE_RXN231

PCIE_RXP231
PCIE_TXN231
PCIE_TXP231

B B

A A

MINICARD1

F8

F11

E7
A3
D2

F10

D5

D10

B3
F7
C3
F3
F4

C1
G7
H7
D1
G5
H6
G1
H3

J5
E1

J6

RP5

RP5

1
2
3
4
5 6

SRN8K2J-2-GP-U

SRN8K2J-2-GP-U
RP3

RP3

1
2
3
4
5 6

SRN8K2J-2-GP-U

SRN8K2J-2-GP-U

C425 SCD1U10V2KX-5GPC425 SCD1U10V2KX-5GP
C430 SCD1U10V2KX-5GPC430 SCD1U10V2KX-5GP

C418 SCD1U10V2KX-5GPC418 SCD1U10V2KX-5GP
C416 SCD1U10V2KX-5GPC416 SCD1U10V2KX-5GP

USB_OC#023

5

PCI

PCI

AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

Interrupt I/F

Interrupt I/F

PIRQA#
PIRQB#
PIRQC#
PIRQD#C4PIRQH#/GPIO5

ICH9M-GP-NF

ICH9M-GP-NF

71.ICH9M.00U

71.ICH9M.00U

3D3V_S0

10

INT_PIRQH#

9

PCI_REQ#0

8

INT_PIRQC#

7

INT_PIRQB# ECSCI#_1

3D3V_S0

10

INT_SERIRQ

9

PCI_DEVSEL#

8

PCI_STOP#

7

PCI_FRAME#

R73

R73

12

22D6R2F-L1-GP

22D6R2F-L1-GP

REQ0#

GNT0#
REQ1#/GPIO50
GNT1#/GPIO51
REQ2#/GPIO52
GNT2#/GPIO53
REQ3#/GPIO54
GNT3#/GPIO55

C/BE0#
C/BE1#
C/BE2#
C/BE3#

IRDY#

PAR
PCIRST#
DEVSEL#

PERR#

PLOCK#

SERR#
STOP#
TRDY#

FRAME#

PLTRST#

PCICLK

PME#

PIRQE#/GPIO2

PIRQF#/GPIO3

PIRQG#/GPIO4

3D3V_S0

12
12

12
12

SPI_CS#1

USB_OC#0
USB_OC#1
USB_OC#2
USB_OC#3
USB_OC#4
USB_OC#5
USB_OC#6
USB_OC#7
USB_OC#8
USB_OC#9
USB_OC#10
USB_OC#11

USB_RBIAS_PN

2 OF 6

2 OF 6

F1
G4
B6
A7
F13
F12
E6
F6

D8
B4
D6
A5

D3
E3
R1
C6
E4
C2
J4
A4
F5
D7

C14
D4
R2

H4
K6
F2
G2

PCI_REQ#3
INT_PIRQF#
INT_PIRQG#
PCI_SERR#

TXN1
TXP1

TXN2
TXP2

AG2
AG1

PCI_REQ#0
PCI_GNT#0
PCI_REQ#1

PCI_REQ#2

PCI_REQ#3
PCI_GNT#3

PCI_IRDY#
PCI_PAR

PCI_DEVSEL#
PCI_PERR#
PCI_LOCK#
PCI_SERR#
PCI_STOP#
PCI_TRDY#
PCI_FRAME#

PLT_RST#_R

ICH_PME#

INT_PIRQE#
INT_PIRQF#
INT_PIRQG#
INT_PIRQH#

RP4

RP4

1
2
3
4
5 6

SRN8K2J-2-GP-U

SRN8K2J-2-GP-U

U16D

U16D

N29

PERN1

N28

PERP1

P27

PETN1

P26

PETP1

L29

PERN2

L28

PERP2

M27

PETN2

M26

PETP2

J29

PERN3

J28

PERP3

K27

PETN3

K26

PETP3

G29

PERN4

G28

PERP4

H27

PETN4

H26

PETP4

E29

PERN5

E28

PERP5

F27

PETN5

F26

PETP5

C29

PERN6/GLAN_RXN

C28

PERP6/GLAN_RXP

D27

PETN6/GLAN_TXN

D26

PETP6/GLAN_TXP

D23

SPI_CLK

D24

SPI_CS0#

F23

SPI_CS1#/GPIO58/CLGPIO6

D25

SPI_MOSI

E23

SPI_MISO

N4

OC0#/GPIO59

N5

OC1#/GPIO40

N6

OC2#/GPIO41

P6

OC3#/GPIO42

M1

OC4#/GPIO43

N2

OC5#/GPIO29

M4

OC6#/GPIO30

M3

OC7#/GPIO31

N3

OC8#/GPIO44

N1

OC9#/GPIO45

P5

OC10#/GPIO46

P3

OC11#/GPIO47

USBRBIAS
USBRBIAS#

ICH9M-GP-NF

ICH9M-GP-NF

71.ICH9M.00U

71.ICH9M.00U

1

R209

R209

0R2J-2-GP

0R2J-2-GP

1

USB

USB

4

TP55 Do Not StuffTP55 Do Not Stuff

C405

C405

DY

DY

Do Not Stuff

Do Not Stuff

1 2

12

TP22 Do Not StuffTP22 Do Not Stuff

PLT_RST1# 7,24,30,31,33,34
PCLK_ICH 3

SB

1120 add the net(SATACLKREQ#)

3D3V_S0

10

INT_PIRQD#

9

PCI_IRDY#

8

PCI_TRDY#

7

4 OF 6

4 OF 6

DMI0RXN
DMI0RXP
DMI0TXN
DMI0TXP

DMI1RXN
DMI1RXP
DMI1TXN
DMI1TXP

DMI2RXN
DMI2RXP
DMI2TXN
DMI2TXP

DMI3RXN
DMI3RXP
DMI3TXN
DMI3TXP

DMI_CLKN

PCI-Express

PCI-Express

DMI_CLKP

Direct Media Interface

Direct Media Interface

DMI_ZCOMP

DMI_IRCOMP

SPI

SPI

USBP10N
USBP10P
USBP11N
USBP11P

USBP0N

USBP0P

USBP1N

USBP1P

USBP2N

USBP2P

USBP3N

USBP3P

USBP4N

USBP4P

USBP5N

USBP5P

USBP6N

USBP6P

USBP7N

USBP7P

USBP8N

USBP8P

USBP9N

USBP9P

V27
V26
U29
U28

Y27
Y26
W29
W28

AB27
AB26
AA29
AA28

AD27
AD26
AC29
AC28

T26
T25

AF29
AF28

AC5
AC4
AD3
AD2
AC1
AC2
AA5
AA4
AB2
AB3
AA1
AA2
W5
W4
Y3
Y2
W1
W2
V2
V3
U5
U4
U1
U2

DMI_RXN0 7
DMI_RXP0 7
DMI_TXN0 7
DMI_TXP0 7

DMI_RXN1 7
DMI_RXP1 7
DMI_TXN1 7
DMI_TXP1 7

DMI_RXN2 7
DMI_RXP2 7
DMI_TXN2 7
DMI_TXP2 7

DMI_RXN3 7
DMI_RXP3 7
DMI_TXN3 7
DMI_TXP3 7

CLK_PCIE_ICH# 3
CLK_PCIE_ICH 3

DMI_IRCOMP_R

USBPN0 23

USBPP0 23

USBPN3 31
USBPP3 31
USBPN4 18
USBPP4 18

USBPN7 22
USBPP7 22

USBPN9 23
USBPP9 23

USBPN11 30
USBPP11 30

1017 modify USB signal connection

4

3D3V_S0

R225

R225

10KR2J-3-GP

10KR2J-3-GP

G61

G61

Do Not Stuff

Do Not Stuff

3

SMB_CLK15
SMB_DATA15

PM_SYNC#7

PM_STPPCI#3
PM_STPCPU#3

PM_CLKRUN#33

PCIE_WAKE#24

INT_SERIRQ33

THRM#32

VGATE_PWRGD32,41

12

EC_TMR33

ECSCI#_133

ECSWI#33

21

SATACLKREQ#3

TP68 Do Not StuffTP68 Do Not Stuff

ACZ_SPKR26

MCH_ICH_SYNC#7

TP51 Do Not StuffTP51 Do Not Stuff

GPIO49 should be pulled down to
GND only when using Teenah. When
using Cantiga, this ball should
be left as No Connect.

3D3V_S5

SATA0GP
SATA1GP

R224

R224
24D9R2F-L-GP

24D9R2F-L-GP

GPIO36
GPIO37

1D5V_S0

12

USB

Pair

Device

USB1

0

1

NC

NC

2

3

MINIC1

WEBCAM

4

5

NC

6

NC

Bluetooth

7

8

NC

9

USB2(High speed)

10

NC

11 CardReader

3

SMB_LINK_ALERT#
SMLINK0
SMLINK1

PM_RI#

PM_SUS_STAT#

1

DBRESET#

TP59Do Not Stuff TP59Do Not Stuff

SMB_ALERT#

ICH_TP7

R194

R194

1 2

Do Not Stuff

Do Not Stuff

DY

DY

TP64Do Not Stuff TP64Do Not Stuff

No Reboot Strap

SPKR LOW = Defaule

SRN10KJ-6-GP

SRN10KJ-6-GP

SB_GPIO1

1

GPIO12

1

SB_GPIO13

TP52Do Not Stuff TP52Do Not Stuff

PSW_CLR#
GPIO18

1

GPIO20

TP19Do Not Stuff TP19Do Not Stuff

1

GPIO22

TP63Do Not Stuff TP63Do Not Stuff

1

TP69Do Not Stuff TP69Do Not Stuff

SDATAOUT1
GPIO49

1

GPIO57

ICH_TP3

1

High=No Reboot

RN5

RN5

8
7
6

RP7

RP7

1
2
3
4
5 6

SRN10KJ-L3-GP

SRN10KJ-L3-GP

GNT0 and SPI_CS#1
have a weak internal pull up

1
2
3
45

SMLINK0
SMLINK1

RSMRST#_SB

10
9
8
7

PWROK

GPIO57

U16C

U16C

G16

SMBCLK

A13

SMBDATA

E17

LINKALERT#/GPIO60/CLG PIO4

C17

SMLINK0

B18

SMLINK1

F19

RI#

R4

SUS_STAT#/LPCPD#

G19

SYS_RESET#

M6

PMSYNC#/GPIO0

A17

SMBALERT#/GPIO11

A14

STP_PCI#

E19

STP_CPU#

L4

CLKRUN#

E20

WAKE#

M5

SERIRQ

AJ23

THRM#

D21

VRMPW RGD

A20

SST

AG19

TACH1/GPIO1

AH21

TACH2/GPIO6

AG21

TACH3/GPIO7

A21

GPIO8

C12

LAN_PHY_PW R_CTRL/GPIO12

C21

ENERGY_DETECT/G PIO13

AE18

TACH0/GPIO17

K1

GPIO18

AF8

GPIO20

AJ22

SCLOCK/GPIO22

A9

GPIO27

D19

GPIO28

L1

SATACLKREQ#/GPIO35

AE19

SLOAD/GPIO38

AG22

SDATAOUT0/GPIO39

AF21

SDATAOUT1/GPIO48

AH24

GPIO49

A8

GPIO57/CLGPIO5

M7

SPKR

AJ24

MCH_SYNC#

B21

TP3

AH20

PWM0

AJ20

PWM1

AJ21

PWM2

ICH9M-GP-NF

ICH9M-GP-NF

71.ICH9M.00U

71.ICH9M.00U

BOOT BIOS Strap

0 1 SPI

A16 swap override strap

PCI_GNT#3

PCI_GNT#0

SPI_CS#1

PCI_GNT#3

2

SATA

GPIO

SATA

GPIO

SMB

SMB

Clocks

Clocks

SYS GPIO

SYS GPIO

Power MGTController Link

Power MGTController Link

GPIO

GPIO

GPIO10/SUS_PW R_ACK

GPIO14/AC_PRESENT

MISC

MISC

RP1

USB_OC#1
PM_BATLOW#_R
ECSWI#
USB_OC#0 GPIO10

3D3V_S5

USB_OC#2
USB_OC#7
PM_RI#

3D3V_S5

RP1

1
2
3
4
5 6

SRN10KJ-L3-GP

SRN10KJ-L3-GP

RP2

RP2

1
2
3
4
5 6

SRN10KJ-L3-GP

SRN10KJ-L3-GP

3 OF 6

3 OF 6

SATA0GP/GPIO21
SATA1GP/GPIO19
SATA4GP/GPIO36
SATA5GP/GPIO37

CLK14
CLK48

SUSCLK

SLP_S3#
SLP_S4#
SLP_S5#

S4_STATE#/GPIO26

PWROK

DPRSLPVR/GPIO16

BATLOW #

PWRBTN #

LAN_RST#

RSMRST#

CK_PWR GD

CLPWRO K

SLP_M#

CL_CLK0
CL_CLK1

CL_DATA0
CL_DATA1

CL_VREF0
CL_VREF1

CL_RST0#
CL_RST1#

GPIO24/MEM_LED

GPIO9/W OL_EN

10

USB_OC#5

9

SMB_LINK_ALERT#

8
7

SMB_ALERT#

10

USB_OC#4

9

DBRESET#

8

USB_OC#3PCIE_WAKE#

7

USB_OC#6

SPI_CS#1 BOOT BIOS LocationPCI_GNT#0

01

PCI

11

LPC(Default)

low = A16 swap override enable
high = default

Do Not Stuff

Do Not Stuff

1 2

R210

R210

1 2

R212

R212

1 2

R208

R208

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff

DY

DY

DY

DY

DY

DY

2

1

SATA0GP

AH23

SATA1GP

AF19

GPIO36

AE21

GPIO37

AD20

H1
AF3

P1

C16
E16

SLPS5#

G17

S4_STATE#

C10

G20

PM_DPRSLPVR

M2

PM_BATLOW#_R

B13

PWRBTN#_ICH

R3

D20

RSMRST#_SB

D22

R5

R6

PM_SLP_M#

B16

F24
B19

F22
C19

CL_VREF0_ICH

C25

CL_VREF1_ICH

A19

F21
D18

GPIO24

A16

GPIO10

C18

GPIO14

C11

GPIO9

C20

3D3V_S5

3D3V_S5

3D3V_S5

RSMRST#_KBC33

UMA Two Phase 2

UMA Two Phase 2

UMA Two Phase 2

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

CLK_ICH14 3
CLK48_ICH 3

PM_SUS_CLK 32

PM_SLP_S3# 33,39,43,44

PM_SLP_S4# 33,43,44

1

TP57 Do Not StuffTP57 Do Not Stuff

1

TP53 Do Not StuffTP53 Do Not Stuff

PWROK 7,39

R216

R216

1 2

DY

DY

Do Not Stuff

Do Not Stuff

D17

D17

1

3

83.00016.B11

83.00016.B11

BAS16-1-GP

BAS16-1-GP

2

2nd = 83.00016.F11

2nd = 83.00016.F11

CLK_PWRGD 3

PWROK 7,39

1

TP4 Do Not StuffT P4 Do Not Stuff

CL_CLK0 7

CL_DATA0 7

CL_RST#0 7

Do Not Stuff

Do Not Stuff

1

TP3

TP3

Do Not Stuff

Do Not Stuff

1

TP54

TP54

C75

C75

DY

DY

USB_OC#8

1

USB_OC#9

2

USB_OC#10

3

USB_OC#11

4
5 6

DY

DY

BAT54-5-GP

BAT54-5-GP

2nd = 83.BAT54.X81

2nd = 83.BAT54.X81

3rd = 83.00054.Z81

3rd = 83.00054.Z81

ICH9-M (2 of 4)_PCIE/USB/DMI

ICH9-M (2 of 4)_PCIE/USB/DMI

ICH9-M (2 of 4)_PCIE/USB/DMI

3D3V_S5

12

R55

R55

Do Not Stuff

Do Not Stuff

DY

DY

12

RP6

RP6

SRN10KJ-L3-GP

SRN10KJ-L3-GP

3

83.BAT54.D81

83.BAT54.D81

HM40-MV

HM40-MV

HM40-MV

12

Do Not Stuff

Do Not Stuff

R195

R195

1 2

Do Not Stuff

Do Not Stuff

R56

R56
Do Not Stuff

Do Not Stuff

DY

DY

10

SB_GPIO13

9

GPIO14

8
7

D15

D15

1

2

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

1

PM_DPRSLPVR 7,41

PM_PWRBTN# 33

3D3V_S0

12

R204

R204

3K24R2F-GP

3K24R2F-GP

12

C390

C390

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

12

3D3V_S5

GLAN_DOCK# 12

RSMRST#_SB

12

R196

R196
100KR2J-1-GP

100KR2J-1-GP

13 51Monday, December 01, 2008

13 51Monday, December 01, 2008

13 51Monday, December 01, 2008

R205

R205
453R2F-1-GP

453R2F-1-GP

SB

SB

SB

5

1D5V_S0

646mA

D D

*Within a given well, 5VREF needs to be up before the
corresponding 3.3V rail

2mA

C C

V5REF_S0

Layout Note:
Place near ICH9

2mA

V5REF_S5 VccSus1_05

B B

3D3V_S0

C414

C414

D6

D6
RB751V-40-2-GP

RB751V-40-2-GP

83.R2004.B8F

83.R2004.B8F
2nd = 83.R0304.A8F

2nd = 83.R0304.A8F

K A

3rd = 83.R3004.A8F

3rd = 83.R3004.A8F

12

C72

C72
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

D7

D7
RB751V-40-2-GP

RB751V-40-2-GP

83.R2004.B8F

83.R2004.B8F
2nd = 83.R0304.A8F

2nd = 83.R0304.A8F

K A

3rd = 83.R3004.A8F

3rd = 83.R3004.A8F

12

C117

C117
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

Do Not Stuff

Do Not Stuff

5V_S0

5V_S53D3V_S5

12

12

C459

C459

Do Not Stuff

Do Not Stuff

DY

DY

DY

DY

1015 modify component size of C390,C419

12

R54

R54
100R2J-2-GP

100R2J-2-GP

12

R72

R72
100R2J-2-GP

100R2J-2-GP

1D5V_S0

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

C415

C415

12

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

1D5V_S0

C454

C454

RTC_AUX_S5

C389

C389

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

12

C443

C443

C453

C453

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

47mA

L14

L14

1 2

IND-1D2UH-10-GP

IND-1D2UH-10-GP

68.1R220.10D

68.1R220.10D

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

1.34A

12

C452

C452

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

C458

C458

USBPLL=11mA

12

19mA in S0;78mA in S3/S4/S5

12

C74

C74

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

A A

12

C409

C409

Do Not Stuff

Do Not Stuff

DY

DY

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

5

1D5V_S0

1D5V_S0

C397

C397

23mA

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

80mA

12

12

DY

DY

C385

C385

C408

C408
Do Not Stuff

Do Not Stuff

1

1

2

2

3D3V_S0

6uA in G3

12

12

C388

C388

Do Not Stuff

Do Not Stuff

DY

DY

12

C461

C461

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

1D5V_APLL_S01D5V_S03D3V_S0

C476

C476

12

C440

C440

SC1U16V3ZY-GP

SC1U16V3ZY-GP

12

C472

C472

Do Not Stuff

Do Not Stuff

DY

DY

12

C473

C473

Do Not Stuff

Do Not Stuff

DY

DY

C73

C73

12

C421

C421
Do Not Stuff

Do Not Stuff

DY

DY

1mA

4

12

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

12

C477

C477

SC1U16V3ZY-GP

SC1U16V3ZY-GP

12

C413

C413

Do Not Stuff

Do Not Stuff

DY

DY

12

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

12

C451

C451
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

12

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

4

12

V5REF_S0

V5REF_S5

VccLan1D05

AA24
AA25
AB24
AB25
AC24
AC25
AD24
AD25
AE25
AE26
AE27
AE28
AE29

W24
W25

AJ19

AC16
AD15
AD16
AE15
AF15

AG15

AH15

AJ15

AC11
AD11
AE11

AF11
AG10
AG11

AH10

AJ10

AC18

AC19

AC21

AC12

AC13

AC14

AE1

G25
H24
H25

K24
K25

M24
M25
N23
N24
N25
P24
P25
R24
R25
R26
R27

U24
U25
V24
V25
U23

K23

AC9

G10

AA7
AB6
AB7
AC6
AC7

B12

D28
D29
E26
E27

A23

A6

F25

J24
J25

L23
L24
L25

T24
T27
T28
T29

Y24
Y25

G9

AJ5

A10
A11

A12

A27

A26

U16F

U16F

VCCRTC

V5REF

V5REF_SUS

VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B

VCCSATAPLL

VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A

VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A

VCC1_5_A

VCC1_5_A
VCC1_5_A

VCC1_5_A

VCC1_5_A
VCC1_5_A

VCC1_5_A
VCC1_5_A
VCC1_5_A

VCCUSBPLL

VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A

VCCLAN1_05
VCCLAN1_05

VCCLAN3_3
VCCLAN3_3

VCCGLANPLL

VCCGLAN1_5
VCCGLAN1_5
VCCGLAN1_5
VCCGLAN1_5

VCCGLAN3_3

ICH9M-GP-NF

ICH9M-GP-NF

71.ICH9M.00U

71.ICH9M.00U

3

6 OF 6

6 OF 6

A15

VCC1_05

B15

VCC1_05

C15

VCC1_05

D15

VCC1_05

E15

VCC1_05

F15

VCC1_05

L11

VCC1_05

L12

VCC1_05

L14

VCC1_05

L16

VCC1_05

L17

VCC1_05

L18

VCC1_05

M11

VCC1_05

M18

VCC1_05

P11

VCC1_05

P18

VCC1_05

T11

VCC1_05

T18

VCC1_05

U11

VCC1_05

U18

VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05

VCCDMI
VCCDMI

V_CPU_IO
V_CPU_IO

VCC3_3

VCC3_3

VCC3_3

VCC3_3
VCC3_3
VCC3_3
VCC3_3

VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3

VCCHDA

VCCCL1_5

VCCCL3_3
VCCCL3_3

V11
V12
V14
V16
V17
V18

R29

1D05V_DMI_ICH_S0

W23
Y23

AB23
AC23

AG29

AJ6

AC10

AD19
AF20
AG24
AC20

B9
F9
G3
G6
J2
J7
K7

AJ4

AJ3

AC8
F17

AD8

1D5V_S5

F18

A18
D16
D17
E22

AF1

T1
T2
T3
T4
T5
T6
U6
U7
V6
V7
W6
W7
Y6
Y7
T7

VccSus1_05[3]

G22

VccSus1_5[3]

G23

A24
B24

DY

DY

C406

C406

Do Not Stuff

Do Not Stuff

12

DY

DY

12

12

C394

C394

12

C445

C445

1

CORE

CORE

VCCDMIPLL

VCCA3GP ATXARX USB CORE

VCCA3GP ATXARX USB CORE

VCCP_CORE

VCCP_CORE

PCI

PCI

VCCSUSHDA

VCCSUS1_05
VCCSUS1_05

VCCSUS1_5

VCCSUS1_5

VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3

VCCPSUSVCCPUSB

VCCPSUSVCCPUSB

VCCSUS3_3

VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3

VCCCL1_05

12

12

12

C439

C439

C434

C434

DY

DY

Do Not Stuff

Do Not Stuff

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

12

C444

C444

C474

C474
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

VCC3_3=308mA

3D3V_S0

12

12

C400

C400

C402

C402

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

C403

C403

1 2

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

C410

C410
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

12

C399

Do Not Stuff

Do Not Stuff

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

C399

12

C432

C432

TP56 Do Not StuffTP56 Do Not Stuff

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

DY

DY

Do Not Stuff

Do Not Stuff

DY

DY

3D3V_S0

12

12

C447

C447

12

12

2

Place near ICH9MLayout Note:

C422

C422

Do Not Stuff

Do Not Stuff

DY

DY

DY

DY

C465

C465
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

12

C412

C412

Do Not Stuff

Do Not Stuff

1D5V_S5

12

1.63A

12

C441

C441

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

1D5V_DMIPLL_ICH_S0

C431

C431

SCD01U16V2KX-3GP

SCD01U16V2KX-3GP

1 2

12

Do Not Stuff

Do Not Stuff

C448

C448
Do Not Stuff

Do Not Stuff

3D3V_S0

3D3V_S0

C471

C471

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

C401

C401
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

VCCSUS3_3=212mA

12

C437

C437
Do Not Stuff

Do Not Stuff

DY

DY

C411

C411

12

Do Not Stuff

Do Not Stuff

DY

DY

12

C423

C423

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

12

R221

R221

2mA

12

C475

C475
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

3D3V_S5

3D3V_S5

12

1 2

12

DY

DY

C435

C435
Do Not Stuff

Do Not Stuff

48mA

12

C436

C436

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

11mA

1D05V_S0

12

C395

C395

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

DY

DY

L11

L11

23mA

IND-1D2UH-10-GP

IND-1D2UH-10-GP

68.1R220.10D

68.1R220.10D

1D05V_S0

1D05V_S0

12

C417

C417

DY

DY

3D3V_S0

11mA

12

C470

C470
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

C407

C407

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff

3D3V_S5

1D5V_S0

12

12

C442

C442

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

C419

C419

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

1

12

C404

C404

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

19mA in S0;73mA in S3/S4/S5

GLAN POWER

GLAN POWER

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

ICH9-M (3 of 4)_POWER

ICH9-M (3 of 4)_POWER

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

3

2

Date: Sheet of

ICH9-M (3 of 4)_POWER

Taipei Hsien 221, Taiwan, R.O.C.

HM40-MV

HM40-MV

HM40-MV

SB

SB

14 51Monday, December 01, 2008

14 51Monday, December 01, 2008

14 51Monday, December 01, 2008

1

SB

A

U16E

U16E

AA26

VSS

AA27

VSS

AA3

VSS

AA6

VSS

AB1

VSS

AA23

VSS

AB28

VSS

AB29

VSS

AB4

VSS

AB5

VSS

AC17

VSS

4 4

3 3

2 2

1 1

A

AC26
AC27

AC3

AD1
AD10
AD12
AD13
AD14
AD17
AD18
AD21
AD28
AD29

AD4

AD5

AD6

AD7

AD9
AE12
AE13
AE14
AE16
AE17

AE2
AE20
AE24

AE3

AE4

AE6

AE9
AF13
AF16
AF18
AF22
AH26
AF26
AF27

AF5

AF7

AF9

AG13
AG16
AG18
AG20
AG23

AG3

AG6

AG9
AH12
AH14
AH17
AH19

AH2
AH22
AH25
AH28

AH5

AH8

AJ12
AJ14
AJ17

C26

C27

G12

G14

G18

G21

G24

G26

G27

H23

H28

H29

AJ8
B11
B14
B17

B20
B23

E11
E14
E18

E21
E24

F16
F28
F29

B2

B5
B8

E2

E5
E8

G8

H2

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

NCTF TEST PIN:

NCTF TEST PIN:

VSS
VSS
VSS

ICH9M-GP-NF

ICH9M-GP-NF

71.ICH9M.00U

71.ICH9M.00U

NCTF_VSS#A1
NCTF_VSS#A2

NCTF_VSS#B1
NCTF_VSS#A29
NCTF_VSS#A28
NCTF_VSS#B29
NCTF_VSS#AJ1
NCTF_VSS#AJ2

NCTF_VSS#AH1
NCTF_VSS#AJ28
NCTF_VSS#AJ29

A1,A2,B1,A28,A29,B29

AH1,AJ1,AJ2,AH29,AJ28,AJ29

A1,A2,B1,A28,A29,B29

AH1,AJ1,AJ2,AH29,AJ28,AJ29

NCTF_VSS#AH29

5 OF 6

5 OF 6

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

B

H5
J23
J26
J27
AC22
K28
K29
L13
L15
L2
L26
L27
L5
L7
M12
M13
M14
M15
M16
M17
M23
M28
M29
N11
N12
N13
N14
N15
N16
N17
N18
N26
N27
P12
P13
P14
P15
P16
P17
P2
P23
P28
P29
P4
P7
R11
R12
R13
R14
R15
R16
R17
R18
R28
T12
T13
T14
T15
T16
T17
T23
B26
U12
U13
U14
U15
U16
U17
AD23
U26
U27
U3
V1
V13
V15
V23
V28
V29
V4
V5
W26
W27
W3
Y1
Y28
Y29
Y4
Y5
AG28
AH6
AF2
B25

A1
A2
B1
A29
A28
B29
AJ1
AJ2
AH1
AJ28
AJ29
AH29

B

1
1
1
1
1
1
1
1
1
1
1
1

TP1Do Not Stuff TP1Do Not Stuff
TP2Do Not Stuff TP2Do Not Stuff
TP10Do Not Stu ff TP10Do Not S tuff
TP8Do Not Stuff TP8Do Not Stuff
TP7Do Not Stuff TP7Do Not Stuff
TP9Do Not Stuff TP9Do Not Stuff
TP30Do Not Stu ff TP30Do Not S tuff
TP31Do Not Stu ff TP31Do Not S tuff
TP28Do Not Stu ff TP28Do Not S tuff
TP29Do Not Stu ff TP29Do Not S tuff
TP27Do Not Stu ff TP27Do Not S tuff
TP26Do Not Stu ff TP26Do Not S tuff

C

SMB_CLK13

SMB_DAT A13

D

3D3V_S5 3D3V_S0

678

123

4 5

5V_S0

Q7

Q7

3 4

2

1

RN50

RN50
SRN2K2J -2-GP

SRN2K2J -2-GP

5

2N7002D W-1-GP

2N7002D W-1-GP

6

E

SMBC_ICH 3,16 ,17

SMBD_ICH 3,16 ,17

SMBUS

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

Size Document N umber Rev

Size Document N umber Rev

Size Document N umber Rev

Date: Sheet of

Date: Sheet of

C

D

Date: Sheet of

HM40-MV

HM40-MV

HM40-MV

Taipei Hsien 221, Taiwan, R.O.C.

ICH9-M (4 of 4)

ICH9-M (4 of 4)

ICH9-M (4 of 4)

E

SB

SB

15 51Monday, December 01, 2008

15 51Monday, December 01, 2008

15 51Monday, December 01, 2008

SB

A

4 4

3 3

DDR_VREF _S3

2 2

12

C219

C219

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

1 1

DDR_VREF _S3

RN19

RN19

M_B_BS#1

1

8

M_B_A0

2

7

M_B_A2

3

6

M_B_A4

45

SRN56J-5-G P

SRN56J-5-G P

RN31

RN31

M_CKE3

1

8

M_CKE2

2

7

M_B_A12

3

6

M_B_BS#2

45

SRN56J-5-G P

SRN56J-5-G P

RN26

RN26

M_B_A6

1

8

M_B_A9

2

7

M_B_A8

3

6

M_B_A5

45

SRN56J-5-G P

SRN56J-5-G P

RN18

RN18

M_B_A1

1

8

M_B_A3

2

7

M_B_A10

3

6

M_B_WE#

45

SRN56J-5-G P

SRN56J-5-G P

RN10

RN10

M_B_RAS#

1

8

M_CS2#

2

7

M_ODT2

3

6

M_B_A13

45

SRN56J-5-G P

SRN56J-5-G P

RN27

RN27

M_B_A14

1

8

M_B_A11

2

7

M_B_A7

3

6

45

SRN56J-5-G P

SRN56J-5-G P

RN13

RN13

M_B_BS#0

1

8

M_B_CAS#

2

7

M_CS3#

3

6

M_ODT3

45

SRN56J-5-G P

SRN56J-5-G P

Decoupling Capacitor

Put decap near p ower(0.9V)
and pull-up resisto r

12

12

C190

C190

C234

C234

Do Not Stuff

Do Not Stuff

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

DY

DY

12

12

C237

C237

C154

C154

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

Do Not Stuff

Do Not Stuff

DY

DY

PARALLEL TERMINATION

Put decap near power(0.9V) and pull-up resistor

12

12

12

C191

C191

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

12

C243

C243

C206

C206

Do Not Stuff

Do Not Stuff

SCD1U16V2ZY-2GP

DY

DY

SCD1U16V2ZY-2GP

12

C171

C171

C223

C223

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

DY

DY

B

M_B_A[14..0]8

TP37Do Not Stuff TP37Do N ot Stuff

M_B_BS#28

M_B_BS#08
M_B_BS#18

M_B_DQ[63..0]8

Do Not Stuff

Do Not Stuff

M_B_DQS#[7..0]8

M_B_DQS[7..0]8

DDR_VREF _S3_1

C292

C292

DY

DY

12

C217

C217

Do Not Stuff

Do Not Stuff

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

C

DM1

M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15

1

M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63

M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7

M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7

M_ODT27
M_ODT37

12

12

C290

C290

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

DM1

102

A0

101

A1

100

A2

99

A3

98

A4

97

A5

94

A6

92

A7

93

A8

91

A9

105

A10/AP

90

A11

89

A12

116

A13

86

A14

84

A15

85

A16/BA2

107

BA0

106

BA1

5

DQ0

7

DQ1

17

DQ2

19

DQ3

4

DQ4

6

DQ5

14

DQ6

16

DQ7

23

DQ8

25

DQ9

35

DQ10

37

DQ11

20

DQ12

22

DQ13

36

DQ14

38

DQ15

43

DQ16

45

DQ17

55

DQ18

57

DQ19

44

DQ20

46

DQ21

56

DQ22

58

DQ23

61

DQ24

63

DQ25

73

DQ26

75

DQ27

62

DQ28

64

DQ29

74

DQ30

76

DQ31

123

DQ32

125

DQ33

135

DQ34

137

DQ35

124

DQ36

126

DQ37

134

DQ38

136

DQ39

141

DQ40

143

DQ41

151

DQ42

153

DQ43

140

DQ44

142

DQ45

152

DQ46

154

DQ47

157

DQ48

159

DQ49

173

DQ50

175

DQ51

158

DQ52

160

DQ53

174

DQ54

176

DQ55

179

DQ56

181

DQ57

189

DQ58

191

DQ59

180

DQ60

182

DQ61

192

DQ62

194

DQ63

11

DQS0#

29

DQS1#

49

DQS2#

68

DQS3#

129

DQS4#

146

DQS5#

167

DQS6#

186

DQS7#

13

DQS0

31

DQS1

51

DQS2

70

DQS3

131

DQS4

148

DQS5

169

DQS6

188

DQS7

114

OTD0

119

OTD1

1

VREF

2

VSS

202

GND

MH1

MH1

DDR2-200P- 23-GP-U1

DDR2-200P- 23-GP-U1

2nd = 62.10017.B51

2nd = 62.10017.B51
3rd = 62.10017.K51

3rd = 62.10017.K51

62.10017.A71

62.10017.A71

RAS#

WE#

CAS#

CS0#
CS1#

CKE0
CKE1

CK0

CK0#

CK1

CK1#

DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7

SDA
SCL

VDDSPD

SA0
SA1

NC#50
NC#69
NC#83

NC#120

NC#163/TEST

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

REVERSE TYPE

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

GND

MH2

High 9.2mm

108
109
113

110
115

79
80

30
32

164
166

M_B_DM0

10

M_B_DM1

26

M_B_DM2

52

M_B_DM3

67

M_B_DM4

130

M_B_DM5

147

M_B_DM6

170

M_B_DM7

185

195
197

199

198
200

50
69
83
120
163

81
82
87
88
95
96
103
104
111
112
117
118

3
8
9
12
15
18
21
24
27
28
33
34
39
40
41
42
47
48
53
54
59
60
65
66
71
72
77
78
121
122
127
128
132
133
138
139
144
145
149
150
155
156
161
162
165
168
171
172
177
178
183
184
187
190
193
196

201

MH2

DDRB_SA0

M_B_RAS# 8
M_B_WE# 8
M_B_CAS# 8

M_CS2# 7
M_CS3# 7

M_CKE2 7
M_CKE3 7

M_CLK_DDR2 7
M_CLK_DDR#2 7

M_CLK_DDR3 7
M_CLK_DDR#3 7

SMBD_ICH 3,15,17
SMBC_ICH 3,15,17

R220

R220

10KR2J-3-GP

10KR2J-3-GP

1D8V_S3

M_B_DM[7..0] 8

12

1D8V_S3

D

3D3V_S0

DY

DY

12

C428

C428
Do Not Stuff

Do Not Stuff

12

C200

C200

SC2D2U6D3V3MX-1-GP

SC2D2U6D3V3MX-1-GP

12

C174

C174

Do Not Stuff

Do Not Stuff

DY

DY

Place these Caps near DM1

12

C488

C488

Do Not Stuff

Do Not Stuff

DY

DY

12

C195

C195

Do Not Stuff

Do Not Stuff

DY

DY

E

12

12

C502

C502

SC2D2U6D3V3MX-1-GP

SC2D2U6D3V3MX-1-GP

12

C499

C499

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

12

C503

C503

C496

C496

Do Not Stuff

Do Not Stuff

SC2D2U6D3V3MX-1-GP

SC2D2U6D3V3MX-1-GP

DY

DY

12

C493

C493

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,

21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,

21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,
Taipei Hsie n 221, Taiwan, R.O.C.

Taipei Hsie n 221, Taiwan, R.O.C.

Title

Title

Title

DDR2 Socket 0 (DM1)

DDR2 Socket 0 (DM1)

DDR2 Socket 0 (DM1)

Size Documen t Number Rev

Size Documen t Number Rev

Size Documen t Number Rev

Date: Sheet of

Date: Sheet of

A

B

C

D

Date: Sheet of

Taipei Hsie n 221, Taiwan, R.O.C.

HM40-MV

HM40-MV

HM40-MV

E

SB

SB

16 51Monday, Decemb er 01, 2008

16 51Monday, Decemb er 01, 2008

16 51Monday, Decemb er 01, 2008

SB