Acer Aspire Timeline 4810, Aspire Timeline 5810 Schematics

JM41 Discrete Block Diagram

JM41 Discrete Block DiagramJM41 Discrete Block Diagram

D D

CLK GEN.

ICS9LPRS365B

DDR3

800/1066 MHz

C C

DDR3

800/1066 MHz

INT.SPKR

1.5W

Int MIC

B B

Line Out

MIC In

HDD SATA

A A

ODD SATA

SSD/HDD SATA

SATA

Codec

Realtek ALC269Q

CRT BD

CARDREADER BD

17,18

Mini USB Blue Tooth

AZALIA

SATA

Intel CPU

Penryn SFF

4,5,6

HOST BUS 667/800/1066MHz@1.05V

Cantiga-GS SFF

AGTL+ CPU I/F DDR Memory I/F

INTEGRATED GRAHPICS

X4 DMI 400MHz

LVDS, CRT I/F

7,8,9,10,11,12

C-Link0

ICH9M SFF

6 PCIe ports

PCI/PCI BRIDGE

ACPI 2.0 4 SATA

12 USB 2.0/1.1 ports

ETHERNET (10/100/1000MbE)

High Definition Audio

LPC I/F

Serial Peripheral I/F

Matrix Storage Technology(DO)

Active Managemnet Technology(DO)

13,14,15,16

BDCRT

2 Port

POWER BD MINI BD

1 Port

2 Port

USB

BDCARDREADER

Thermal Sensor

SMSC

EMC2103

PCIe x 16

PCIe x1 *3port

LPC BUS

Camera

3 Port

VRAM(DDR3)

64Mbx16x4 (512MB)

ATI M92-S2

53,54,55,56

Winbond

WPCE773LA0DG

Touch Pad

KBC

INT. KB

30 28

LVDS

LCD

RGB CRT

CRT

HDMI

Giga LAN

Atheros AR8131

LAN

MINI BD

USB 3 Port

BIOS

SPI

(2MB)

MS/MS Pro/xD /MMC/SD

Project code: 91.4CQ01.001 PCB P/N : 48.4CQ01.0SA REVISION : 08274-SA

PCB STACKUP

TOP

VCC/GND

GND/VCC

BOTTOM

CRT

HDMI

TXFM RJ45

Mini 1 Card WLAN

Mini 2 Card 3G

LPC

DEBUG CONN.

SYSTEM DC/DC

TPS51125

INPUTS

DCBATOUT

Title

BLOCK DIAGRAM

Size Document Number Rev

Size Document Number Rev Custom

Custom

Custom Date: Sheet of

Date: Sheet of

RT8202

INPUTS OUTPUTS

DCBATOUT 1D05V_S0(10A)

RT8202

INPUTS OUTPUTS

DCBATOUT

RT9026

INPUTS OUTPUTS

5V_S5

CHARGER

MAX8731A

DCBATOUT

CPU DC/DC

ADP3207A

INPUTS

DCBATOUT

INPUTS

DCBATOUT

OUTPUTS VCC_CORE

VGA

ISL6263A

OUTPUTS

VCC_GFXCORE

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

JM41_Discrete

OUTPUTS

5V_S5(6A) 3D3V_S5(5A) 5V_AUX_S5 3D3V_AUX_S5

1D5V_S3(11A)

DDR_VREF_S3 (1.2A)

OUTPUTSINPUTS

CHG_PWR

18V 6.0A

0~1.3V 64A

(7A)

1 48Monday, March 02, 2009

ICH9M Functional Strap Definitions

Signal

HDA_SDOUT

HDA_SYNC

4 4

GNT2#/ GPIO53

GPIO20 GNT1#/

GPIO51

GNT3#/ GPIO55

GNT0#: SPI_CS1#/ GPIO58

SPI_MOSI

3 3

GPIO49

SATALED#

SPKR

TP3

GPIO33/ HDA_DOCK _EN#

Usage/When Sampled

XOR Chain Entrance/ PCIE Port Config1 bit1, Rising Edge of PWROK

PCIE config1 bit0, Rising Edge of PWROK.

PCIE config2 bit2, Rising Edge of PWROK.

Reserved ESI Strap (Server Only)

Rising Edge of PWROK

Top-Block Swap Override. Rising Edge of PWROK.

Boot BIOS Destination Selection 0:1. Rising Edge of PWROK.

Integrated TPM Enable, Rising Edge of CLPWROK

DMI Termination Voltage, Rising Edge of PWROK.

PCI Express Lane Reversal. Rising Edge of PWROK.

No Reboot. Rising Edge of PWROK.

XOR Chain Entrance. Rising Edge of PWROK.

Flash Descriptor Security Override Strap Rising Edge of PWROK

Allows entrance to XOR Chain testing when TP3 pulled low.When TP3 not pulled low at rising edge of PWROK,sets bit1 of RPC.PC(Config Registers: offset 224h). This signal has weak internal pull-down

This signal has a weak internal pull-down. Sets bit0 of RPC.PC(Config Registers:Offset 224h)

This signal has a weak internal pull-up. Sets bit2 of RPC.PC2(Config Registers:Offset 0224h) This signal should not be pulled high.

ESI compatible mode is for server platforms only. This signal should not be pulled low for desttop and mobile.

Sampled low:Top-Block Swap mode(inverts A16 for all cycles targeting FWH BIOS space). Note: Software will not be able to clear the Top-Swap bit until the system is rebooted without GNT3# being pulled down.

Controllable via Boot BIOS Destination bit (Config Registers:Offset 3410h:bit 11:10). GNT0# is MSB, 01-SPI, 10-PCI, 11-LPC.

Sample low: the Integrated TPM will be disabled. Sample high: the MCH TPM enable strap is sampled low and the TPM Disable bit is clear, the Integrated TPM will be enable.

The signal is required to be low for desktop applications and required to be high for mobile applications.

Signal has weak internal pull-up. Sets bit 27 of MPC.LR(Device 28:Function 0:Offset D8)

If sampled high, the system is strapped to the "No Reboot" mode(ICH9 will disable the TCO Timer system reboot feature). The status is readable via the NO REBOOT bit.

This signal should not be pull low unless using XOR Chain testing.

Sampled low:the Flash Descriptor Security will be overridden. If high,the security measures will be in effect.This should only be enabled in manufacturing environments using an external pull-up resister.

ICH9 EDS 642879 Rev.1.5

Comment

2 2

ICH9M Integrated Pull-up

page 92

and Pull-down Resistors

SIGNAL Resistor Type/Value

CL_CLK[1:0] CL_DATA[1:0] CL_RST0# DPRSLPVR/GPIO16 ENERGY_DETECT HDA_BIT_CLK HDA_DOCK_EN#/GPIO33 HDA_RST# HDA_SDIN[3:0] HDA_SDOUT HDA_SYNC GLAN_DOCK#

GNT[3:0]#/GPIO[55,53,51]

GPIO[20] GPIO[49] LDA[3:0]#/FHW[3:0]# LAN_RXD[2:0] LDRQ[0] LDRQ[1]/GPIO23 PME# PWRBTN# SATALED#

SPI_CS1#/GPIO58/CLGPIO6

SPI_MOSI SPI_MISO SPKR TACH_[3:0] TP[3] USB[11:0][P,N]

Cantiga chipset and ICH9M I/O controller Hub strapping configuration

ICH9 EDS 642879 Rev.1.5

PULL-UP 20K PULL-UP 20K PULL-UP 20K PULL-DOWN 20K PULL-UP 20K PULL-DOWN 20K PULL-UP 20K PULL-DOWN 20K PULL-DOWN 20K PULL-DOWN 20K

The pull-up or pull-down active when configured for native GLAN_DOCK# functionality and determined by LAN controller

PULL-DOWN 20K

PULL-UP 20K PULL-DOWN 20K PULL-UP 20K PULL-UP 20K PULL-UP 20K PULL-UP 20K PULL-UP 20K PULL-UP 20K PULL-UP 20K PULL-UP 15K PULL-UP 20K PULL-DOWN 20K PULL-UP 20K PULL-DOWN 20K PULL-UP 20K PULL-UP 20K PULL-DOWN 15K

Montevina Platform Design guide 22339 0.5

Pin Name

CFG[2:0]

CFG[4:3] CFG8 CFG[15:14] CFG[18:17]

CFG5 CFG6

CFG7

CFG9

CFG10 PCIE Loopback enable

CFG[13:12]

CFG16

CFG19

CFG20

SDVO_CTRLDATA

NOTE:

1. All strap signals are sampled with respect to the leading edge of the (G)MCH Power OK (PWROK) signal.

2. iTPM can be disabled by a 'Soft-Strap' option in the Flash-decriptor section of the Firmware. This 'Soft-Strap' is activated only after enabling iTPM via CFG6. Only one of the CFG10/CFG/12/CFG13 straps can be enabled at any time.

Strap Description

FSB Frequency Select

Reserved

DMI x2 Select iTPM Host

Interface

Intel Management engine Crypto strap

PCIE Graphics Lane

XOR/ALL

FSB Dynamic ODT

DMI Lane Reversal

1 = Reverse Lanes DMI x4 mode[MCH -> ICH]:(3->0,2->1,1->2and0->3) DMI x2 mode[MCH -> ICH]:(3->0,2->1)

Digital Display Port (SDVO/DP/iHDMI) Concurrent with PCIe

SDVO Present

Local Flat Panel (LFP) Present

Configuration

000 = FSB1067 011 = FSB667 010 = FSB800 others = Reserved

0 = DMI x2

1 = DMI x4

0= The iTPM Host Interface is enabled(Note2)

1=The iTPM Host Interface is disalbed(default)

0 = Transport Layer Security (TLS) cipher suite with no confidentiality

1 = TLS cipher suite with confidentiality (default)

0 = Reverse Lanes,15->0,14->1 ect..

1= Normal operation(Default):Lane Numbered in order

0 = Enable (Note 3)

1= Disabled (default)

00 = Reserve 10 = XOR mode Enabled 01 = ALLZ mode Enabled (Note 3)

11 = Disabled (default)

0 = Dynamic ODT Disabled

1 = Dynamic ODT Enabled 0 = Normal operation(Default):

Lane Numbered in Order

0 = Only Digital Display Port or PCIE is operational (Default)

1 =Digital display Port and PCIe are operting simulataneously via the PEG port

0 =No SDVO Card Present (Default)

1 = SDVO Card Present

0 = LFP Disabled (Default)

1= LFP Card Present; PCIE disabledL_DDC_DATA

page 218

(Default)

1 1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Size Document Number Rev A3

A3 Date: Sheet of

Date: Sheet of

Reference

Taipei Hsien 221, Taiwan, R.O.C.

JM41_Discrete

2 48Monday, March 02, 2009

3D3V_S0

R220

1 2

0R3-0-U-GP

3D3V_48MPWR_S0

C525

C523

C525

SC4D7U6D3V3KX-GP

1D05V_S0

SCD1U16V2KX-3GP

C541

SC1U10V3KX-3GP

R215

1 2

0R0603-PAD

C522

1D05V_CLK_S0

SCD1U16V2KX-3GP

C516

SCD1U16V2KX-3GP

C508

C512

C515

SCD1U16V2KX-3GP

C532

SCD1U16V2KX-3GP

C524

SC4D7U10V5ZY-3GP

3D3V_CLK_S0

SCD1U16V2KX-3GP

C507

C517

SC4D7U10V5ZY-3GP

SCD1U16V2KX-3GP

C526

C548

SCD1U16V2KX-3GP

C549

SCD1U16V2KX-3GP

R222

1 2

0R0603-PAD

3D3V_S0

4 4

C579

1 2

SC27P50V2JN-2-GP

CL=20pF±0.2pF

C542

1 2

SC27P50V2JN-2-GP

CLK48_ICH14

CPU_SEL04,8

CLK_ICH14 PCLK_ICH PCLK_KBC CLK48_ICH

X2 X-14D31818M-35GP

X-14D31818M-35GP

82.30005.891

1 2

R227 2K2R2J-2-GPR227 2K2R2J-2-GP

PM_STPPCI#14

PM_STPCPU#14

SMBC_ICH16,17,18 SMBD_ICH16,17,18

CLK_PW RGD14

CPU_SEL14,8

1 2

EC48 SC22P50V2JN-4GP

1 2

EC45 SC22P50V2JN-4GP

1 2

EC46 SC22P50V2JN-4GP

1 2

EC44 SC22P50V2JN-4GP

82.30005.951

R230

33R2F-3-GP

G81

GAP-CLOSE

1 2 1 2

GAP-CLOSE

G80

R210

RN24

1 2 3 4 5

SRN470J-3-GP

RN31

SRN10KJ-6-GP

RN32

CR#_G

8 7 6

CR#_D

CR#_C

CR#_H

CR#_E

1 2

PCLKCLK5 PCLKCLK4 PCLKCLK2 CPU_SEL2_R

CPU_SEL2_R

PCLKCLK2 PCLKCLK4 PCLKCLK5

VGA_CLK_REQ#43

CLK_MCH_OE#8 SATACLKREQ#14 LAN_CLKREQ#25 WLAN_CLKREQ#25

3 3

3D3V_S0

CPU_SEL24,8

PCLK_FW H29 PCLK_KBC28 PCLK_ICH14

2 2

1 2

1KR2J-1-GP

1 2 3 4 5

SRN33J-7-GP

ICS9LPRS365YGLFT setting table

R209

10KR2J-3-GP

3D3V_S0

678

3D3V_S0

123

RN25

RN25 SRN10KJ-6-GP

SRN10KJ-6-GP

EMI capacitor for Antenna team suggestion

GEN_XTAL_OUT GEN_XTAL_IN

3D3V_CLK_S0

CLK_48

SMBC_CKG SMBD_CKG

PCLKCLK2 PCLKCLK4

PCLKCLK5

CPU_SEL2_R

3D3V_48MPWR_S0

U35

USB_48MHZ/FSLA

PCI_STOP#

CPU_STOP#

SCLK

SDATA

CK_PWRGD/PD#

PCI0/CR#_A

PCI1/CR#_B

PCI2/TME

PCI3

PCI4/27_SELECT

PCI_F5/ITP_EN

FSLB/TEST_MODE

REF0/FSLC/TEST_SEL

NC#55

ICS9LPRS365BKLFT-GP-U

71.09365.A03

2nd = 71.08513.003

3RD = 71.00875.C03

1D05V_CLK_S0

VDD48

VDDPCI

VDDREF

GNDREF

GNDPCI

GND48

VDDSRC

VDDCPU

VDDPLL3

VDD96_IO

VDDSRC_IO

VDDCPU_IO

VDDPLL3_IO

27MHZ_NONSS/SRCT1/SE1

27MHZ_SS/SRCC1/SE2

GND

GNDSRC

GNDCPU

GND

CPUT0 CPUC0

CPUT1_F

CPUC1_F

CPUT2_ITP/SRCT8

CPUC2_ITP/SRCC8

SRCT7/CR#_F

SRCC7/CR#_E

SRCT6 SRCC6

SRCT10 SRCC10

SRCT11/CR#_H

SRCC11/CR#_G

SRCT9 SRCC9

SRCT4 SRCC4

SRCT3/CR#_C

SRCC3/CR#_D

SRCT2/SATAT

SRCC2/SATAC

SRCT0/DOTT_96

SRCC0/DOTC_96

60 58

57 54

CR#_E

50 48

47 41

CR#_H

CR#_G

39 37

38 34

CR#_C

CR#_D

28 29

24 25

20 21

CLK_CPU_BCLK 4 CLK_CPU_BCLK# 4

CLK_MCH_BCLK 7 CLK_MCH_BCLK# 7

CLK_PCIE_ICH 14 CLK_PCIE_ICH# 14

CLK_PCIE_MINI1 25 CLK_PCIE_MINI1# 25

CLK_PCIE_LAN 25 CLK_PCIE_LAN# 25

CLK_PCIE_VGA 42 CLK_PCIE_VGA# 42

CLK_MCH_3GPLL 8 CLK_MCH_3GPLL# 8

CLK_PCIE_SATA 13 CLK_PCIE_SATA# 13CLK_ICH1414

DREFSSCLK 8 DREFSSCLK# 8

DREFCLK 8 DREFCLK# 8

CPU NB SB DMI

Wireless

LAN

VGA NB CLK

SB SATA

NB CLK NB CLK

(96 MHz)

PIN NAME DESCRIPTION

Byte 5, bit 7 0 = PCI0 enabled (default)

PCI0/CR#_A

PCI1/CR#_B

PCI2/TME PCI3

1 1

PCI4/27M_SEL PCI_F5/ITP_EN

SRCT3/CR#_C

1= CR#_A enabled. Byte 5, bit 6 controls whether CR#_A controls SRC0 or SRC2 pair Byte 5, bit 6 0 = CR#_A controls SRC0 pair (default), 1= CR#_A controls SRC2 pair

Byte 5, bit 5 0 = PCI1 enabled (default) 1= CR#_B enabled. Byte 5, bit 6 controls whether CR#_B controls SRC1 or SRC4 pair Byte 5, bit 4 0 = CR#_B controls SRC1 pair (default) 1= CR#_B controls SRC4 pair

0 = Overclocking of CPU and SRC Allowed 1 = Overclocking of CPU and SRC NOT allowed

0 = Pin17 as SRC-1, Pin18 as SRC-1#, Pin13 as DOT96, Pin14 as DOT96# 1 = Pin17 as 27MHz, Pin 18 as 27MHz_SS, Pin13 as SRC-0, Pin14 as SRC-0#

0 =SRC8/SRC8# 1 = ITP/ITP#

Byte 5, bit 3 0 = SRC3 enabled (default) 1= CR#_C enabled. Byte 5, bit 2 controls whether CR#_C controls SRC0 or SRC2 pair Byte 5, bit 2 0 = CR#_C controls SRC0 pair (default), 1= CR#_C controls SRC2 pair

PIN NAME DESCRIPTION

Byte 5, bit 1 0 = SRC3 enabled (default)

SRCC3/CR#_D

SRCC7/CR#_E

SRCT7/CR#_F

SRCC11/CR#_G

SRCT11/CR#_H

1= CR#_D enabled. Byte 5, bit 0 controls whether CR#_D controls SRC1 or SRC4 pair Byte 5, bit 0 0 = CR#_D controls SRC1 pair (default) 1= CR#_D controls SRC4 pair

Byte 6, bit 7 0 = SRC7# enabled (default) 1= CR#_F controls SRC6

Byte 6, bit 6 0 = SRC7 enabled (default) 1= CR#_F controls SRC8

Byte 6, bit 5 0 = SRC11# enabled (default) 1= CR#_G controls SRC9

Byte 6, bit 4 0 = SRC11 enabled (default) 1= CR#_H controls SRC10

SEL2 FSC

Title

Size Document Number Rev

Date: Sheet of

SEL1 FSB

1 0

SEL0 FSA

0 1

0 1 0 1 0 0 0 0

Clock Generator

JM41_Discrete

CPU

FSB

100M 133M

1 01

166M 200M

533M 667M 800M

1067M266M

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

3 48Monday, March 02, 2009

H_A#[35..3]7

4 4

H_ADSTB#07 H_REQ#[4..0]7

3 3

H_ADSTB#17

H_A20M#13

H_FERR#13

H_IGNNE#13

H_STPCLK#13

2 2

H_FERR# H_STPCLK# H_IGNNE# H_INTR H_DPSLP# H_PWRGD H_A20M# H_SMI# H_NMI H_INIT#

1 1

H_A#[35..3]

H_DINV#[3..0]

1 OF 6

ADDR GROUP 0

CONTROL

ADDR GROUP 1

XDP/ITP SIGNALS

THERMAL

PROCHOT#

ICH

THERMTRIP#

H CLK

1 OF 6

ADS# BNR# BPRI#

DEFER#

DRDY#

DBSY#

BR0#

IERR#

INIT#

LOCK#

RESET#

RS0#

RS1#

RS2#

TRDY#

HIT#

HITM#

BPM0# BPM1# BPM2#

BPM3# PRDY# PREQ#

TCK

TDO TMS

TRST#

DBR#

THRMDA THRMDC

BCLK0

BCLK1

M4 J5 L5

N5 F38 J1

M2 B40

D8 N1 G5

K2 H4 K4 L1

H2 F2

AY8 BA7 BA5 AY2 AV10 AV2 AV4 AW7

TDI

AU1 AW5 AV8 J7

D38 BB34 BD34

B10

A35 C35

RESERVED

CPU1A

H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16

H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4

H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 H_A#32 H_A#33 H_A#34 H_A#35

H_INTR13 H_NMI13 H_SMI#13

1 2

C442 SC100P50V2JN-3GP

1 2

C97 SC100P50V2JN-3GP

1 2

C436 SC100P50V2JN-3GP

1 2

C439 SC100P50V2JN-3GP

1 2

C437 SC100P50V2JN-3GP

1 2

C429 SC100P50V2JN-3GP

1 2

C435 SC100P50V2JN-3GP

1 2

C430 SC100P50V2JN-3GP

1 2

C431 SC100P50V2JN-3GP

1 2

C428 SC100P50V2JN-3GP

CPU1A

A3#

A4#

A5#

A6#

AA1

A7#

AB4

A8#

A9#

AC5

A10#

AD2

A11#

AD4

A12#

AA5

A13#

AE5

A14#

AB2

A15#

AC1

A16#

ADSTB0#

REQ0#

REQ1#

REQ2#

REQ3#

REQ4#

AN1

A17#

AK4

A18#

AG1

A19#

AT4

A20#

AK2

A21#

AT2

A22#

AH2

A23#

AF4

A24#

AJ5

A25#

AH4

A26#

AM4

A27#

AP4

A28#

AR5

A29#

AJ1

A30#

AL1

A31#

AM2

A32#

AU5

A33#

AP2

A34#

AR1

A35#

AN5

ADSTB1#

A20M#

FERR#

F10

IGNNE#

STPCLK#

LINT0

LINT1

SMI#

RSVD#V2

RSVD#Y2

AG5

RSVD#AG5

AL5

RSVD#AL5

RSVD#J9

RSVD#F4

RSVD#H8

PENRYN-SFF-GP-U1-NF

H_RS#0 H_RS#1 H_RS#2

XDP_BPM#5 XDP_TCK XDP_TDI XDP_TDO XDP_TMS XDP_TRST# XDP_DBRESET#

XDP_TMS XDP_TDI XDP_BPM#5 XDP_TDO

XDP_DBRESET#

XDP_TCK XDP_TRST#

TP4 TPAD14-GPTP4 TPAD14-GP

H_ADS# 7 H_BNR# 7

H_BPRI# 7

H_DEFER# 7 H_DRDY# 7 H_DBSY# 7

H_BREQ#0 7

H_IERR#

H_INIT# 13 H_LOCK# 7

H_CPURST# 7

H_TRDY# 7 H_HIT# 7

H_HITM# 7

CPU_PROCHOT#_1

H_THERMDA 27 H_THERMDC 27

1D05V_S0

R178

R178 56R2F-1-GP

56R2F-1-GP

H_RS#[2..0] 7

1D05V_S0

PM_THRMTRIP-A# 8,13,32

CLK_CPU_BCLK 3 CLK_CPU_BCLK# 3

R140 51R2F-2-GPR140 51R2F-2-GP

1 2

R141 51R2F-2-GPR141 51R2F-2-GP

1 2

R143 51R2F-2-GPR143 51R2F-2-GP

1 2

R142 51R2F-2-GP

1 2

R37 1KR2J-1-GP

1 2

R145 51R2F-2-GPR145 51R2F-2-GP

1 2

R144 51R2F-2-GPR144 51R2F-2-GP

1 2

All place within 2" to CPU

R182

R182 56R2F-1-GP

56R2F-1-GP

PH @ page48

Layout Note: "CPU_GTLREF0"

0.5" max length.

Place testpoint on H_IERR# with a GND

0.1" away

H_THERMDA

H_THERMDC

Close to NB

should connect toPM_THRMTRIP# without T-ingICH9 and MCH

2KR2F-3-GP

1D05V_S0

3D3V_S0

C417

C417 SC2200P50V2KX-2GP

SC2200P50V2KX-2GP

1D05V_S0

1KR2F-3-GP

1KR2F-3-GP R152

R152

1 2 12

R153

1 2

R185 1KR2J-1-GP

1 2

R173 1KR2J-1-GP

C425

SCD1U10V2KX-4GP

CPU_GTLREF0

C422

SC1KP50V2KX-1GP

TEST1

TEST2

TEST4

CPU1B

H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9

H_D#10 H_D#11 H_D#12 H_D#13 H_D#14

H_DSTBN#07 H_DSTBP#07 H_DINV#07

H_DSTBN#17 H_DSTBP#17 H_DINV#17

TP63TPAD14-GP TP63TPAD14-GP TP2TPAD14-GP TP2TPAD14-GP

TP50TPAD14-GP TP50TPAD14-GP

CPU_SEL03,8 CPU_SEL13,8 CPU_SEL23,8

Net "TEST4" as short as possible, make sure "TEST4" routing is reference to GND and away other noisy signals

Place these TP on button-side, easy to measure.

H_D#15

H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31

TEST1 TEST2

RSVD_CPU_12

TEST4 RSVD_CPU_13

RSVD_CPU_14

H_DPRSTP# H_DPSLP# H_DPWR# H_PWRGD H_CPUSLP# H_INIT# H_CPURST#

CPU1B

F40

D0#

G43

D1#

E43

D2#

J43

D3#

H40

D4#

H44

D5#

G39

D6#

E41

D7#

L41

D8#

K44

D9#

N41

D10#

T40

D11#

M40

D12#

G41

D13#

M44

D14#

L43

D15#

K40

DSTBN0#

J41

DSTBP0#

P40

DINV0#

P44

D16#

V40

D17#

V44

D18#

AB44

D19#

R41

D20#

W41

D21#

N43

D22#

U41

D23#

AA41

D24#

AB40

D25#

AD40

D26#

AC41

D27#

AA43

D28#

Y40

D29#

Y44

D30#

T44

D31#

U43

DSTBN1#

W43

DSTBP1#

R43

DINV1#

AW43

GTLREF

E37

TEST1

D40

TEST2

C43

TEST3

AE41

TEST4

AY10

TEST5

AC43

TEST6

A37

BSEL0

C37

BSEL1

B38

BSEL2

PENRYN-SFF-GP-U1-NF

TP10 TPAD14-GPTP10 TPAD14-GP

TP69 TPAD14-GPTP69 TPAD14-GP

TP62 TPAD14-GPTP62 TPAD14-GP

TP12 TPAD14-GPTP12 TPAD14-GP

TP68 TPAD14-GPTP68 TPAD14-GP

TP13 TPAD14-GPTP13 TPAD14-GP

TP9 TPAD14-GPTP9 TPAD14-GP

2 OF 6

D32# D33# D34#

DATA GROUP 0

D35# D36# D37# D38# D39# D40# D41# D42# D43# D44# D45# D46#

DATA GROUP 2DATA GROUP 3

D47#

DSTBN2#

DSTBP2#

DINV2#

D48# D49# D50# D51#

DATA GROUP 1

D52# D53# D54# D55# D56# D57# D58# D59# D60# D61# D62# D63#

DSTBN3#

DSTBP3#

DINV3#

COMP0

MISC

COMP1 COMP2 COMP3

DPRSTP#

DPSLP# DPWR#

PWRGOOD

SLP#

PSI#

H_DSTBN#[3..0] H_DSTBP#[3..0] H_D#[63..0]

H_D#32

AP44

H_D#33

AR43

H_D#34

AH40

H_D#35

AF40

H_D#36

AJ43

H_D#37

AG41

H_D#38

AF44

H_D#39

AH44

H_D#40

AM44

H_D#41

AN43

H_D#42

AM40

H_D#43

AK40

H_D#44

AG43

H_D#45

AP40

H_D#46

AN41

H_D#47

AL41 AK44 AL43 AJ41

H_D#48

AV38

H_D#49

AT44

H_D#50

AV40

H_D#51

AU41

H_D#52

AW41

H_D#53

AR41

H_D#54

BA37

H_D#55

BB38

H_D#56

AY36

H_D#57

AT40

H_D#58

BC35

H_D#59

BC39

H_D#60

BA41

H_D#61

BB40

H_D#62

BA35

H_D#63

AU43 AY40 AY38 BC37

COMP0

AE43

COMP1

AD44

COMP2

AE1

COMP3

AF2 G7

B8 C41 E7 D10

PSI#

BD10

Comp0, 2 connect with Zo=27.4 ohm, make trace length shorter than 0.5" . Comp1, 3 connect with Zo=55 ohm, make trace length shorter than 0.5" .

TP3 TPAD14-GPTP3 TPAD14-GP

Layout Note:

Title

Size Document Number Rev

Date: Sheet of

H_DINV#[3..0] 7 H_DSTBN#[3..0] 7 H_DSTBP#[3..0] 7 H_D#[63..0] 7

H_DSTBN#2 7 H_DSTBP#2 7 H_DINV#2 7

H_DSTBN#3 7 H_DSTBP#3 7 H_DINV#3 7

R158 27D4R2F-L1-GPR158 27D4R2F-L1-GP

1 2

R160 54D9R2F-L1-GPR160 54D9R2F-L1-GP

1 2

R162 27D4R2F-L1-GPR162 27D4R2F-L1-GP

1 2

R161 54D9R2F-L1-GPR161 54D9R2F-L1-GP

1 2

H_DPRSTP# 8,13,34 H_DPSLP# 13 H_DPWR# 7

H_CPUSLP# 7

C117

SC100P50V2JN-3GP

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

CPU (1 of 3)

JM41_Discrete

H_PWRGD 13,32

4 48Monday, March 02, 2009

VCC_CORE

4 4

3 3

2 2

1 1

CPU1C

F32

VCC

G33

VCC

H32

VCC

J33

VCC

K32

VCC

L33

VCC

M32

VCC

N33

VCC

P32

VCC

R33

VCC

T32

VCC

U33

VCC

V32

VCC

W33

VCC

Y32

VCC

AA33

VCC

AB32

VCC

AC33

VCC

AD32

VCC

AE33

VCC

AF32

VCC

AG33

VCC

AH32

VCC

AJ33

VCC

AK32

VCC

AL33

VCC

AM32

VCC

AN33

VCC

AP32

VCC

AR33

VCC

AT34

VCC

AT32

VCC

AU33

VCC

AV32

VCC

AY32

VCC

BB32

VCC

BD32

VCC

B28

VCC

B30

VCC

B26

VCC

D28

VCC

D30

VCC

F30

VCC

F28

VCC

H30

VCC

H28

VCC

D26

VCC

F26

VCC

H26

VCC

K30

VCC

K28

VCC

M30

VCC

M28

VCC

K26

VCC

M26

VCC

P30

VCC

P28

VCC

T30

VCC

T28

VCC

V30

VCC

V28

VCC

P26

VCC

T26

VCC

V26

VCC

Y30

VCC

Y28

VCC

AB30

VCC

PENRYN-SFF-GP-U1-NF

3 OF 6

VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC

VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP

VCCA VCCA

VID0 VID1 VID2 VID3 VID4 VID5 VID6

VCCSENSE

VSSSENSE

AB28 AD30 AD28 Y26 AB26 AD26 AF30 AF28 AH30 AH28 AF26 AH26 AK30 AK28 AM30 AM28 AP30 AP28 AK26 AM26 AP26 AT30 AT28 AV30 AV28 AY30 AY28 AT26 AV26 AY26 BB30 BB28 BD30

J11 E11 G11 J37 K38 L37 N37 P38 R37 U37 V38 W37 AA37 AB38 AC37 AE37

B34 D34

BD8 BC7 BB10 BB8 BC5 BB4 AY4

BD12

BC13

VCC_CORE

H_VID0 H_VID1 H_VID2 H_VID3 H_VID4 H_VID5 H_VID6

C36

SCD1U10V2KX-4GP

RN13

2 3 1

SRN100J-3-GP

C47

SCD1U10V2KX-4GP

H_VID[6..0] 34

VCC_CORE

1D05V_S0

layout note: "1D5V_VCCA_S0" as short as possible

TC7

TC7 SE330U2D5VM-GP

SE330U2D5VM-GP

P_77.C3371.10L

1D5V_VCCA_S0

Layout Note:

VCCSENSE and VSSSENSE lines should be of equal length.

Layout Note: Provide a test point (with no stub) to connect a differential probe between VCCSENSE and VSSSENSE at the location where the two 54.9ohm resistors terminate the 55 ohm transmission line.

C453

4 OF 6

CPU1D

B42

VSS

F44

VSS

D42

VSS

F42

VSS

H42

VSS

K42

VSS

M42

VSS

P42

VSS

T42

VSS

V42

VSS

Y42

VSS

AB42

VSS

AD42

VSS

AF42

VSS

AH42

VSS

AK42

VSS

AM42

VSS

AP42

VSS

AV44

VSS

AT42

VSS

AV42

VSS

AY42

VSS

BA43

VSS

BB42

VSS

C39

VSS

E39

VSS

G37

VSS

H38

VSS

J39

VSS

L39

VSS

M38

VSS

N39

VSS

R39

VSS

T38

VSS

U39

VSS

W39

VSS

Y38

VSS

AA39

VSS

AC39

VSS

AD38

VSS

AE39

VSS

AG39

VSS

AH38

VSS

AJ39

VSS

AL39

VSS

AM38

VSS

AN39

VSS

AR39

VSS

AR37

VSS

AT38

VSS

AU39

1D5V_S0

R186

1 2

C455

0R0603-PAD

SCD01U16V2KX-3GP

SC10U6D3V5MX-3GP

VCORE_VCCSENSE 34

VCORE_VSSSENSE 34

VSS

AU37

VSS

AW39

VSS

AW37

VSS

BA39

VSS

BC41

VSS

BD38

VSS

B36

VSS

H34

VSS

D36

VSS

K34

VSS

M34

VSS

M36

VSS

P34

VSS

T34

VSS

V34

VSS

T36

VSS

Y34

VSS

AB34

VSS

AD34

VSS

Y36

VSS

AD36

VSS

AF34

VSS

AH34

VSS

AH36

VSS

AK34

VSS

AM34

VSS

AM36

VSS

AP34

VSS

AR35

VSS

PENRYN-SFF-GP-U1-NF

4 OF 6

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

AU35 AV34 AW35 AW33 AY34 AT36 AV36 BA33 BC33 BB36 BD36 C27 C29 C31 E29 E27 G29 G27 E31 G31 J29 J27 L29 L27 N29 N27 J31 L31 N31 R29 R27 U29 U27 R31 U31 W29 W27 W31 AA29 AA27 AC29 AC27 AA31 AC31 AE29 AE27 AG29 AG27 AJ29 AJ27 AE31 AG31 AJ31 AL29 AL27 AN29 AN27 AL31 AN31 AR29 AR27 AR31 AU29 AU27 AW29 AW27 AU31 AW31 BA29 BA27 BC29 BC27 BA31 BC31 C21 C23 C25 E25 E23 E21

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

CPU (2 of 3)

JM41_Discrete

5 48Monday, March 02, 2009

AL37 AN37 AP38 B32 C33 D32 E35 E33 F34 G35 F36 H36 J35 L35 N35 K36 R35 U35 P36 V36 W35 AA35 AC35 AB36 AE35 AG35 AJ35 AF36 AL35 AN35 AK36 AP36 B12 B14 C13 D12 D14 E13 F14 F12 G13 H14 H12 J13 K14 K12 L13 L11 M14 N13 N11 K10 P14 P12 R13 R11 T14 U13 U11 V14 V12 W13 W11 P10 V10 Y14 AA13 AA11 AB14 AB12 AC13 AC11 AD14 AB10 AE13 AE11 AF14 AF12 AG13 AG11 AH14 AJ13 AJ11 AF10 AK14 AK12 AL13 AL11 AN13 AN11 AP12 AR13 AR11 AK10 AP10 AU13 AU11 L9 L7 N9 N7 R9 R7 U9 U7 W9 W7 AA9 AA7 AC9 AC7 AE9 AE7 AG9 AG7 AJ9 AJ7 AL9 AL7 AN9 AN7 AR9 AR7 A33 A13

1D05V_S0

TP71 TPAD14-GPTP71 TPAD14-GP TP61 TPAD14-GPTP61 TPAD14-GP TP49 TPAD14-GPTP49 TPAD14-GP TP47 TPAD14-GPTP47 TPAD14-GP TP46 TPAD14-GPTP46 TPAD14-GP TP48 TPAD14-GPTP48 TPAD14-GP TP55 TPAD14-GPTP55 TPAD14-GP TP51 TPAD14-GPTP51 TPAD14-GP

VCC_CORE

1D05V_S0

CPU1F

BD28

VCC

BB26

VCC

BD26

VCC

B22

VCC

B24

VCC

D22

VCC

D24

VCC

F24

VCC

F22

VCC

H24

VCC

H22

VCC

K24

VCC

K22

VCC

M24

VCC

M22

VCC

P24

VCC

P22

VCC

T24

VCC

T22

VCC

V24

VCC

V22

VCC

Y24

VCC

Y22

VCC

AB24

VCC

AB22

VCC

AD24

VCC

AD22

VCC

AF24

VCC

AF22

VCC

AH24

VCC

AH22

VCC

AK24

VCC

AK22

VCC

AM24

VCC

AM22

VCC

AP24

VCC

AP22

VCC

AT24

VCC

AT22

VCC

AV24

VCC

AV22

VCC

AY24

VCC

AY22

VCC

BB24

VCC

BB22

VCC

BD24

VCC

BD22

VCC

B16

VCC

B18

VCC

B20

VCC

D16

VCC

D18

VCC

F18

VCC

F16

VCC

H18

VCC

H16

VCC

D20

VCC

F20

VCC

H20

VCC

K18

VCC

K16

VCC

M18

VCC

M16

VCC

K20

VCC

M20

VCC

P18

VCC

P16

VCC

T18

VCC

T16

VCC

V18

VCC

V16

VCC

P20

VCC

T20

VCC

V20

VCC

Y18

VCC

Y16

VCC

AB18

VCC

AB16

VCC

AD18

VCC

AD16

VCC

Y20

VCC

AB20

VCC

AD20

VCC

AF18

VCC

AF16

VCC

AH18

VCC

AH16

VCC

AF20

VCC

AH20

VCC

AK18

VCC

AK16

VCC

AM18

VCC

AM16

VCC

AP18

VCC

AP16

VCC

AK20

VCC

AM20

VCC

AP20

VCC

AT18

VCC

AT16

VCC

AV18

VCC

AV16

VCC

AY18

VCC

AY16

VCC

AT20

VCC

AV20

VCC

AY20

VCC

BB18

VCC

BB16

VCC

BD18

VCC

BD16

VCC

BB20

VCC

BD20

VCC

AM14

VCC

AP14

VCC

AT14

VCC

AV14

VCC

AY14

VCC

BB14

VCC

BD14

VCC

AF38

VCCP

AG37

VCCP

AJ37

VCCP

AK38

VCCP

PENRYN-SFF -GP-U1-N F

6 OF 6

VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP

CPU1E

5 OF 6

Place these inside socket cavity on L8(North side Secondary)

VCC_CORE

D D

VCC_CORE

C C

Place these inside socket cavity on L8(North side Secondary)

1D05V_S0

B B

A A

C410

SC10U6D3V3MX-GPC1SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

C59

C53

SC10U6D3V3MX-GP

C77

C91

SCD1U10V2KX-4GP

C72

C80

SCD1U10V2KX-4GP

C82

C63

SCD1U10V2KX-4GP

C409

SC10U6D3V3MX-GPC5SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GPC7SC10U6D3V3MX-GP

SC10U6D3V3MX-GPC8SC10U6D3V3MX-GP

C42

SC10U6D3V3MX-GPC4SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

C84

C102

SCD1U10V2KX-4GP

C67

C60

SCD1U10V2KX-4GP

C81

C113

SCD1U10V2KX-4GP

C23

C27

SC10U6D3V3MX-GP

C104

C112

SCD1U10V2KX-4GP

C74

C79

SCD1U10V2KX-4GP

C57

C50

SCD1U10V2KX-4GP

VCC_CORE

C25

SC10U6D3V3MX-GP

C24

SC10U6D3V3MX-GP

C101

SCD1U10V2KX-4GP

C71

SCD1U10V2KX-4GP

C412

SC10U6D3V3MX-GPC6SC10U6D3V3MX-GP

VCC_CORE

C66

SC10U6D3V3MX-GP

VCC_CORE

C83

SCD1U10V2KX-4GP

VCC_COREVCC_CORE

C85

SCD1U10V2KX-4GP

C412

C19

SC10U6D3V3MX-GP

C43

C48

SC10U6D3V3MX-GP

C58

C64

SCD1U10V2KX-4GP

C76

C69

SCD1U10V2KX-4GP

C38

C46

C32

SC10U6D3V3MX-GP

C413

C34

SC10U6D3V3MX-GPC3SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

C54

C41

C45

SCD1U10V2KX-4GP

C56

C115

C52

SCD1U10V2KX-4GP

C51

C37

C29

SC10U6D3V3MX-GP

C40

C411

SC10U6D3V3MX-GP

SC10U6D3V3MX-GPC2SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

C103

C107

C100

SCD1U10V2KX-4GP

C33

C99

C114

SCD1U10V2KX-4GP

AA25 AA23

AA21 AC25 AC23 AC21

AE25

AE23

AE21 AG25 AG23 AG21

AJ25

AJ23

AJ21

AL25

AL23

AL21 AN25 AN23 AN21 AR25 AR23 AR21 AU25 AU23 AU21 AW25 AW23 AW21

BA25

BA23

BA21 BC25 BC23 BC21

AA19

AA17 AC19 AC17

AE19

AE17 AG19 AG17

AJ19

AJ17

AL19

AL17 AN19 AN17 AR19 AR17 AU19 AU17 AW19 AW17

BA19

BA17 BC19 BC17

AA15 AC15 AD12

G25 G23 G21

J25 J23 J21 L25 L23

L21 N25 N23 N21 R25 R23 R21 U25 U23 U21 W25 W23 W21

C17 C19 E19 E17 G19 G17

J19

J17

L19

L17 N19 N17 R19 R17 U19 U17 W19 W17

C11 C15 E15 G15 H10 M12

J15

L15 N15 M10

T12 R15 U15 W15

T10 Y10 Y12

5 OF 6

NCTF_VSS#A5

VSS

NCTF_VSS#A41

VSS

NCTF_VSS#AY44

VSS

NCTF_VSS#BA1

NCTF_VSS#BD4

VSS VSS

NCTF_VSS#BD40

NCTF_VSS#D44

VSS

NCTF_VSS#E1

VSS VSS

PENRYN-SFF -GP-U1-N F

NCTF TEST PIN:

A5,A41,AY44,BA1,BD4,BD40,D44,E1

NCTF TEST PIN:

A5,A41,AY44,BA1,BD4,BD40,D44,E1

AD10

VSS

AH12

VSS

AE15

VSS

AG15

VSS

AJ15

VSS

AH10

VSS

AM12

VSS

AL15

VSS

AN15

VSS

AR15

VSS

AM10

VSS

AT12

VSS

AV12

VSS

AW13

VSS

AW11

VSS

AY12

VSS

AU15

VSS

AW15

VSS

AT10

VSS

BA13

VSS

BA11

VSS

BB12

VSS

BC11

VSS

BA15

VSS

BC15

VSS

AB8

VSS

AB6

VSS

AD8

VSS

AD6

VSS

AF8

VSS

AF6

VSS

AH8

VSS

AH6

VSS

AK8

VSS

AK6

VSS

AM8

VSS

AM6

VSS

AP8

VSS

AP6

VSS

AT8

VSS

AT6

VSS

AU9

VSS

AV6

VSS

AU7

VSS

AW9

VSS

AY6

VSS

BA9

VSS

BB6

VSS

BC9

VSS

BD6

VSS

AA3

VSS

AC3

VSS

AE3

VSS

AG3

VSS

AJ3

VSS

AL3

VSS

AN3

VSS

AR3

VSS

AU3

VSS

AW3

VSS

BA3

VSS

BC3

VSS

AW1

VSS

BB2

VSS

A39

VSS

A29

VSS

A27

VSS

A31

VSS

A25

VSS

A23

VSS

A21

VSS

A19

VSS

A17

VSS

A11

VSS

A15

VSS

NCTF_VSS#A 5

NCTF_VSS#A 41

A41

NCTF_VSS#A Y44

AY44

NCTF_VSS#B A1

BA1

NCTF_VSS#B D4

BD4

NCTF_VSS#B D40

BD40

NCTF_VSS#D 44

D44

NCTF_VSS#E 1

1 1 1 1 1 1 1 1

Wistron Corporation

21F, 88, Sec.1, Hsin T ai Wu Rd ., Hsichih,

21F, 88, Sec.1, Hsin T ai Wu Rd ., Hsichih, Taipei Hsie n 221, Taiwan, R.O .C.

Taipei Hsie n 221, Taiwan, R.O .C.

Title

Size Document Numb er Rev

Date: Sheet of

Taipei Hsie n 221, Taiwan, R.O .C.

CPU (3 of 3)

JM41_Discrete

6 48Monday, March 02, 2009

1 OF 10

NB1A

H_D#_0

H_D#_1

L11

H_D#_2

H_D#_3

H_D#_4

H_D#_5

K10

H_D#_6

K12

H_D#_7

H_D#_8

M10

H_D#_9

H_D#_10

N11

H_D#_11

H_D#_12

H_D#_13

H_D#_14

H_D#_15

H_D#_16

H_D#_17

H_D#_18

H_D#_19

P10

H_D#_20

H_D#_21

H_D#_22

H_D#_23

H_D#_24

H_D#_25

H_D#_26

H_D#_27

V10

H_D#_28

H_D#_29

W11

H_D#_30

U11

H_D#_31

AC11

H_D#_32

AC9

H_D#_33

H_D#_34

Y10

H_D#_35

AB6

H_D#_36

AA9

H_D#_37

AB10

H_D#_38

AA1

H_D#_39

AC3

H_D#_40

AC7

H_D#_41

AD12

H_D#_42

AB4

H_D#_43

H_D#_44

AD10

H_D#_45

AA11

H_D#_46

AB2

H_D#_47

AD4

H_D#_48

AE7

H_D#_49

AD2

H_D#_50

AD6

H_D#_51

AE3

H_D#_52

AG9

H_D#_53

AG7

H_D#_54

AE11

H_D#_55

AK6

H_D#_56

AF6

H_D#_57

AJ9

H_D#_58

AH6

H_D#_59

AF12

H_D#_60

AH4

H_D#_61

AJ7

H_D#_62

AE9

H_D#_63

H_SWING

H_RCOMP

J11

H_CPURST#

H_CPUSLP#

L17

H_AVREF

K18

H_DVREF

CANTIGA-GS-GP-NF

H_AVREF

H_D#[63..0]

H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63

H_SWING H_RCOMP

H_CPURST#4

H_CPUSLP#4

SC1KP50V2KX-1GP

C169

H_D#[63..0]4

H_SWING

C499

SCD1U10V2KX-4GP

H_RCOMP

1D05V_S0

R196

R196 221R2F-2-GP

221R2F-2-GP

R194

R194 100R2F-L1-GP-U

100R2F-L1-GP-U

D D

H_SWING routing Trace width and Spacing use 10 / 20 mil

H_SWING Resistors and Capacitors close MCH 500 mil ( MAX )

C C

H_RCOMP routing Trace width and Spacing use 10 / 20 mil

1 2

24D9R2F-L-GP

R190

Place them near to the chip ( < 0.5")

B B

1D05V_S0

R48

R48 1KR2F-3-GP

1KR2F-3-GP

1 2

R49

R49 2KR2F-3-GP

2KR2F-3-GP

1 OF 10

HOST

H_A#_3 H_A#_4 H_A#_5 H_A#_6 H_A#_7 H_A#_8

H_A#_9 H_A#_10 H_A#_11 H_A#_12 H_A#_13 H_A#_14 H_A#_15 H_A#_16 H_A#_17 H_A#_18 H_A#_19 H_A#_20 H_A#_21 H_A#_22 H_A#_23 H_A#_24 H_A#_25 H_A#_26 H_A#_27 H_A#_28 H_A#_29 H_A#_30 H_A#_31 H_A#_32 H_A#_33 H_A#_34 H_A#_35

H_ADS# H_ADSTB#_0 H_ADSTB#_1

H_BNR#

H_BPRI#

H_BREQ#

H_DEFER#

H_DBSY#

HPLL_CLK

HPLL_CLK#

H_DPWR#

H_DRDY#

H_HIT#

H_HITM# H_LOCK# H_TRDY#

H_DINV#_0 H_DINV#_1 H_DINV#_2 H_DINV#_3

H_DSTBN_0 H_DSTBN_1 H_DSTBN_2 H_DSTBN_3

H_DSTBP_0 H_DSTBP_1 H_DSTBP_2 H_DSTBP_3

H_REQ#_0 H_REQ#_1

H_REQ#_2 H_REQ#_3

H_REQ#_4

H_RS#_0 H_RS#_1 H_RS#_2

L15 B14 C15 D12 F14 G17 B12 J15 D16 C17 D14 K16 F16 B16 C21 D18 J19 J21 B18 D22 G19 J17 L21 L19 G21 D20 K22 F18 K20 F20 F22 B20 A19

F10 A15 C19 C9 B8 C11 E5 D6 AH10 AJ11 G11 H2 C7 F8 A11 D8

L9 N7 AA7 AG3

K2 N3 AA3 AF4

L3 M2 Y2 AF2

J13 L13 C13 G13 G15

F4 F2 G7

H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16 H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 H_A#32 H_A#33 H_A#34 H_A#35

H_DINV#0 H_DINV#1 H_DINV#2 H_DINV#3

H_DSTBN#0 H_DSTBN#1 H_DSTBN#2 H_DSTBN#3

H_DSTBP#0 H_DSTBP#1 H_DSTBP#2 H_DSTBP#3

H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4

H_RS#0 H_RS#1 H_RS#2

H_A#[35..3]

H_ADS# 4 H_ADSTB#0 4 H_ADSTB#1 4 H_BNR# 4

H_BPRI# 4

H_BREQ#0 4

H_DEFER# 4

H_DBSY# 4

CLK_MCH_BCLK 3 CLK_MCH_BCLK# 3

H_DPWR# 4

H_DRDY# 4 H_HIT# 4 H_HITM# 4

H_LOCK# 4 H_TRDY# 4

H_DINV#[3..0]

H_DSTBN#[3..0]

H_DSTBP#[3..0]

H_A#[35..3] 4

H_DINV#[3..0] 4

H_DSTBN#[3..0] 4

H_DSTBP#[3..0] 4

H_REQ#[4..0] 4

H_RS#[2..0] 4

A A

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

Cantiga (1 of 6)

JM41_Discrete

7 48Monday, March 02, 2009

1D5V_S3

C513

C513 SCD01U16V2KX- 3GP

SCD01U16V2KX- 3GP

C511

C511 SCD01U16V2KX- 3GP

SCD01U16V2KX- 3GP

SM_RCOMP_VOH

C514

C514 SC2D2U6D3V 3MX-1-GP

SC2D2U6D3V 3MX-1-GP

SM_RCOMP_VOL

C510

C510 SC2D2U6D3V 3MX-1-GP

SC2D2U6D3V 3MX-1-GP

R218 1KR2F-3-GPR218 1KR2F-3-GP

D D

R216

R216 3K01R2F-3-GP

3K01R2F-3-GP

R214

R214 1KR2F-3-GP

1KR2F-3-GP

1 2

layout take note

CPU_SEL03,4

C C

1D5V_S3

R206

R206 80D6R2F-L-G P

80D6R2F-L-G P

R207

80D6R2F-L-G P

B B

M_RCOMPP

M_RCOMPN

3D3V_S0

R51 4K02R2F-GP

1 2

R50 2K21R2F-GP

1 2

PM_THRMTR IP-A#4,13,32

CPU_SEL13,4 CPU_SEL23,4

TP77TPAD14-GP TP77TPAD14-GP

PM_EXTTS#0 PM_EXTTS#1

PLT_RST1#_Can tiga PM_THRMTR IP-A#_R

CFG9

CFG16

CFG20

CFG9

PM_SYNC#14 H_DPRSTP#4,13,34

PM_EXTTS#017,18

PWROK14,32

PLT_RST1#14,24,25,28,29,42

PM_DPRSLPVR14,34

100R2J-2-GP

SC100P50V2JN-3 GP

R47

C164

R208

1 2

0R0402-PAD

AW42

AN11 AM10 AK10 AL11

AN45 AP44 AT44 AN47

BB20 BE19 BF20 BF18

AY39 BB18

BE55 BH55 BK55 BK54 BL54 BL52 BL49

J43 L43 J41 L41

F12

C27 D30

K26 G23 G25

J25

L25

L27

F24

D24

D26

J23

B26

A23

C23

B24

B22

K24

C25

L23

L33

K32

K34

J35

F6 J39 L39

K28 K36

A7 A49 A52 A54 B54 D55

G55

BL7 BL4 BL2

BK2 BK1 BH1 BE1

NB1B

RSVD#J43 RSVD#L43 RSVD#J41 RSVD#L41 RSVD#AN11 RSVD#AM10 RSVD#AK10 RSVD#AL11 RSVD#F12 RSVD#AN45 RSVD#AP44 RSVD#AT44 RSVD#AN47 RSVD#C27 RSVD#D30

RSVD#J9

RSVD#AW42

RSVD#BB20 RSVD#BE19 RSVD#BF20 RSVD#BF18

CFG_0 CFG_1 CFG_2 CFG_3 CFG_4 CFG_5 CFG_6 CFG_7 CFG_8 CFG_9 CFG_10 CFG_11 CFG_12 CFG_13 CFG_14 CFG_15 CFG_16 CFG_17 CFG_18 CFG_19 CFG_20

PM_SYNC# PM_DPRSTP# PM_EXT_TS#_0 PM_EXT_TS#_1 PWROK RSTIN# THERMTRIP# DPRSLPVR

NC#A7 NC#A49 NC#A52 NC#A54 NC#B54 NC#D55 NC#G55 NC#BE55 NC#BH55 NC#BK55 NC#BK54 NC#BL54 NC#BL52 NC#BL49 NC#BL7 NC#BL4 NC#BL2 NC#BK2 NC#BK1 NC#BH1 NC#BE1 NC#G1

CANTIGA-GS- GP-NF

2 OF 10

CFGRSVD

SA_CK#_0 SA_CK#_1 SB_CK#_0 SB_CK#_1

SA_CKE_0 SA_CKE_1 SB_CKE_0 SB_CKE_1

SA_CS#_0 SA_CS#_1 SB_CS#_0 SB_CS#_1

SA_ODT_0 SA_ODT_1 SB_ODT_0 SB_ODT_1

SM_RCOMP

SM_RCOMP#

SM_RCOMP_VOH SM_RCOMP_VOL

SM_VREF

SM_PWROK

SM_REXT

SM_DRAMRST# DPLL_REF_CLK

DPLL_REF_CLK#

DPLL_REF_SSCLK

DPLL_REF_SSCLK#

DDR CLK/ CONTROL/COMPENSATION

PEG_CLK

PEG_CLK#

DMI_RXN_0 DMI_RXN_1

CLK

DMI_RXN_2 DMI_RXN_3

DMI_RXP_0 DMI_RXP_1 DMI_RXP_2 DMI_RXP_3

DMI_TXN_0 DMI_TXN_1 DMI_TXN_2 DMI_TXN_3

DMI_TXP_0 DMI_TXP_1 DMI_TXP_2 DMI_TXP_3

DMI

GFX_VID_0 GFX_VID_1 GFX_VID_2 GFX_VID_3 GFX_VID_4

GFX_VR_EN

GRAPHICS VID

CL_PWROK

DDPC_CTRLCLK

DDPC_CTRLDATA

SDVO_CTRLCLK

SDVO_CTRLDATA

CLKREQ#

ICH_SYNC#

MISC

HDA_BCLK HDA_RST#

HDA_SDO

HDA_SYNC

HDA

SA_CK_0 SA_CK_1 SB_CK_0 SB_CK_1

CL_CLK

CL_DATA CL_RST#

CL_VREF

TSATN#

HDA_SDI

BB32 BA25 BA33 BA23

BA31 BC25 BC33 BB24

BC35 BE33 BE37 BC37

BK18 BK16 BE23 BC19

BJ17 BJ19 BC17 BE17

M_RCOMPP

BL25

M_RCOMPN

BK26

SM_RCOMP_VOH

BK32

SM_RCOMP_VOL

BL31 BC51

DDR2 : connect to GND

AY37

SM_REXT

BH20 BA37

B42 D42 B50 D50

R49 P50

AG55 AL49 AH54 AL47

AG53 AK50 AH52 AL45

AG49 AJ49 AJ47 AG47

AF50 AH50 AJ45 AG45

G33 G37 F38 F36 G35

GFXVR_EN

G39

AK52 AK54 AW40 AL53

MCH_CLVRE F

AL55

for HDMI port C

F34 F32 B38 A37 C31 K42

MCH_TSATN #

D10

C29 B30 D28 A27 B28

M_CLK_DDR0 18 M_CLK_DDR1 18 M_CLK_DDR2 17 M_CLK_DDR3 17

M_CLK_DDR#0 18 M_CLK_DDR#1 18 M_CLK_DDR#2 17 M_CLK_DDR#3 17

M_CKE0 18 M_CKE1 18 M_CKE2 17 M_CKE3 17

M_CS0# 18 M_CS1# 18 M_CS2# 17 M_CS3# 17

M_ODT0 18 M_ODT1 18 M_ODT2 17 M_ODT3 17

R204 499R2F-2-GPR204 499R2F-2-GP

1 2

DDR3_DR AMRST# 17,18

DREFCLK# 3

DREFSSCLK 3

DREFSSCLK # 3

CLK_MCH_3GPL L 3

CLK_MCH_3GPL L# 3

DMI_TXN0 14 DMI_TXN1 14 DMI_TXN2 14 DMI_TXN3 14

DMI_TXP0 14 DMI_TXP1 14 DMI_TXP2 14 DMI_TXP3 14

DMI_RXN0 14 DMI_RXN1 14 DMI_RXN2 14 DMI_RXN3 14

DMI_RXP0 14 DMI_RXP1 14 DMI_RXP2 14 DMI_RXP3 14

GFX_VID0 GFX_VID1 GFX_VID2 GFX_VID3 GFX_VID4

GFXVR_EN 38

CLK_MCH_OE# 3 MCH_ICH_SYNC # 14

DREFCLK 3

CL_CLK0 14

CL_DATA0 14 PWROK 14,32 CL_RST#0 14

SM_PWROK 32

DDR_VREF _S3_1

0.75V

C238

SCD1U10V2KX-4GP

GMCH_DDC CLK20 GMCH_DDC DATA20

GMCH_HSYNC20 GMCH_VSYNC20

GFX_VID[4..0] 38

1D05V_S0

R243

R243 1KR2F-3-GP

1KR2F-3-GP

1 2

R244

C583

511R2F-2-GP

FOR Cantiga:500 ohm Teenah: 392 ohm

SCD1U10V2KX-4GP

GMCH_CLK_D DC_EDID41 GMCH_DAT_ DDC_EDID41

DREFCLK DREFCLK# DREFSSCLK DREFSSCLK #

GMCH_L_BKLTC TL19

GMCH_LCDV DD_ON19

GMCH_BL_ON19

GMCH_TXAC LK-41 GMCH_TXAC LK+41

GMCH_TXAOU T0-41 GMCH_TXAOU T1-41 GMCH_TXAOU T2-41

GMCH_TXAOU T0+41 GMCH_TXAOU T1+41 GMCH_TXAOU T2+41

RN8

4 5 3 2 1

SRN0J-7-GP

GMCH_BLUE41

GMCH_GREE N41

GMCH_RED41

GMCH_DDC CLK GMCH_DDC DATA

1 2

R211 976R2F-3-GP

D38 C37

LCTLA_CLK

K38

LCTLB_DATA

L37 J37

LIBG L_LVBG

TV_DACA TV_DACB TV_DACC

GMCH_BLUE GMCH_GREE N GMCH_RED

CRT_IREF

L35

B36

F50 H46 P44 K46 D46 B46 D44 B44

G45

F46 G41 C45

F44 G47

F40 A45

B40 A41

F42 D48

D40 C41 G43 B48

J27 E27 G27

F26

B34 D34

J29 G29

F30 E29 D36

C35

J33 D32 G31

GMCH_LCDV DD_ON

TP26TPAD14-GP TP26TPAD14-GP

6 7 8

UMA

FOR Cantiga: 1.02k_1% ohm Teenah: 1.3k ohm

CRT_IREF routing Trace width use 20 mil

NB1C

L_BKLT_CTRL L_BKLT_EN L_CTRL_CLK

L_CTRL_DATA L_DDC_CLK L_DDC_DATA

L_VDD_EN LVDS_IBG LVDS_VBG LVDS_VREFH LVDS_VREFL LVDSA_CLK# LVDSA_CLK LVDSB_CLK# LVDSB_CLK

LVDSA_DATA#_0 LVDSA_DATA#_1 LVDSA_DATA#_2 LVDSA_DATA#_3

LVDSA_DATA_0 LVDSA_DATA_1 LVDSA_DATA_2 LVDSA_DATA_3

LVDSB_DATA#_0 LVDSB_DATA#_1 LVDSB_DATA#_2 LVDSB_DATA#_3

LVDSB_DATA_0 LVDSB_DATA_1 LVDSB_DATA_2 LVDSB_DATA_3

TVA_DAC TVB_DAC TVC_DAC

TVA_RTN

TV_DCONSEL_0 TV_DCONSEL_1

CRT_BLUE CRT_GREEN CRT_RED CRT_IRTN CRT_DDC_CLK

CRT_DDC_DATA CRT_HSYNC CRT_TVO_IREF CRT_VSYNC

CANTIGA-GS- GP-NF

3 OF 10

LVDS

PEG_CMP

U45

PEG_COMPI

T44

PEG_COMPO

D52

PEG_RX#_0

G49

PEG_RX#_1

K54

PEG_RX#_2

H50

PEG_RX#_3

M52

PEG_RX#_4

N49

PEG_RX#_5

P54

PEG_RX#_6

V46

PEG_RX#_7

Y50

PEG_RX#_8

V52

PEG_RX#_9

W49

PEG_RX#_10

AB54

PEG_RX#_11

AD46

PEG_RX#_12

AC55

PEG_RX#_13

AE49

PEG_RX#_14

AF54

PEG_RX#_15

E51

PEG_RX_0

F48

PEG_RX_1

J55

PEG_RX_2

J49

PEG_RX_3

M54

PEG_RX_4

M50

PEG_RX_5

P52

PEG_RX_6

U47

PEG_RX_7

AA49

PEG_RX_8

V54

PEG_RX_9

V50

PEG_RX_10

AB52

PEG_RX_11

AC47

PEG_RX_12

AC53

PEG_RX_13

AD50

PEG_RX_14

AF52

PEG_RX_15 PEG_TX#_0

PEG_TX#_1 PEG_TX#_2 PEG_TX#_3 PEG_TX#_4 PEG_TX#_5 PEG_TX#_6 PEG_TX#_7 PEG_TX#_8 PEG_TX#_9

PEG_TX#_10

PCI-EXPRESS GRAPHICS

PEG_TX#_11 PEG_TX#_12 PEG_TX#_13 PEG_TX#_14 PEG_TX#_15

VGA

PEG_TX_10 PEG_TX_11 PEG_TX_12 PEG_TX_13 PEG_TX_14 PEG_TX_15

PEG_TX_0 PEG_TX_1 PEG_TX_2 PEG_TX_3 PEG_TX_4 PEG_TX_5 PEG_TX_6 PEG_TX_7 PEG_TX_8 PEG_TX_9

L47 F52 P46 H54 L55 T46 R53 U49 T54 Y46 AB46 W53 Y54 AC49 AF46 AD54

J47 F54 N47 H52 L53 R47 R55 T50 T52 W47 AA47 W55 Y52 AB50 AE47 AD52

M_TXN0 M_TXN1 M_TXN2 M_TXN3 M_TXN4 M_TXN5 M_TXN6 M_TXN7 M_TXN8 M_TXN9 M_TXN10 M_TXN11 M_TXN12 M_TXN13 M_TXN14 M_TXN15

M_TXP0 M_TXP1 M_TXP2 M_TXP3 M_TXP4 M_TXP5 M_TXP6 M_TXP7 M_TXP8 M_TXP9 M_TXP10 M_TXP11 M_TXP12 M_TXP13 M_TXP14 M_TXP15

1D05V_S0

Close to GMCH as 500 mils.

R53 49D9R 2F-GPR 53 49D9R2F -GP

PEG_RXN0 42 PEG_RXN1 42 PEG_RXN2 42 PEG_RXN3 42 PEG_RXN4 42 PEG_RXN5 42 PEG_RXN6 42 PEG_RXN7 42 PEG_RXN8 42 PEG_RXN9 42 PEG_RXN10 42 PEG_RXN11 42 PEG_RXN12 42 PEG_RXN13 42 PEG_RXN14 42 PEG_RXN15 42

PEG_RXP0 42 PEG_RXP1 42 PEG_RXP2 42 PEG_RXP3 42 PEG_RXP4 42 PEG_RXP5 42 PEG_RXP6 42 PEG_RXP7 42 PEG_RXP8 42 PEG_RXP9 42 PEG_RXP10 42 PEG_RXP11 42 PEG_RXP12 42 PEG_RXP13 42 PEG_RXP14 42 PEG_RXP15 42

C535 SCD1U6D3V1 KX-GPC535 SCD1U6D3V1 KX-GP

1 2

C539 SCD1U6D3V1 KX-GPC539 SCD1U6D3V1 KX-GP

1 2

C550 SCD1U6D3V1 KX-GPC550 SCD1U6D3V1 KX-GP

1 2

C589 SCD1U6D3V1 KX-GPC589 SCD1U6D3V1 KX-GP

1 2

C577 SCD1U6D3V1 KX-GPC577 SCD1U6D3V1 KX-GP

1 2

C575 SCD1U6D3V1 KX-GPC575 SCD1U6D3V1 KX-GP

1 2

C573 SCD1U6D3V1 KX-GPC573 SCD1U6D3V1 KX-GP

1 2

C571 SCD1U6D3V1 KX-GPC571 SCD1U6D3V1 KX-GP

1 2

C569 SCD1U6D3V1 KX-GPC569 SCD1U6D3V1 KX-GP

1 2

C567 SCD1U6D3V1 KX-GPC567 SCD1U6D3V1 KX-GP

1 2

C565 SCD1U6D3V1 KX-GPC565 SCD1U6D3V1 KX-GP

1 2

C563 SCD1U6D3V1 KX-GPC563 SCD1U6D3V1 KX-GP

1 2

C561 SCD1U6D3V1 KX-GPC561 SCD1U6D3V1 KX-GP

1 2

C559 SCD1U6D3V1 KX-GPC559 SCD1U6D3V1 KX-GP

1 2

C557 SCD1U6D3V1 KX-GPC557 SCD1U6D3V1 KX-GP

1 2

C555 SCD1U6D3V1 KX-GPC555 SCD1U6D3V1 KX-GP

1 2

C530 SCD1U6D3V1 KX-GPC530 SCD1U6D3V1 KX-GP

1 2

C536 SCD1U6D3V1 KX-GPC536 SCD1U6D3V1 KX-GP

1 2

C543 SCD1U6D3V1 KX-GPC543 SCD1U6D3V1 KX-GP

1 2

C584 SCD1U6D3V1 KX-GPC584 SCD1U6D3V1 KX-GP

1 2

C578 SCD1U6D3V1 KX-GPC578 SCD1U6D3V1 KX-GP

1 2

C576 SCD1U6D3V1 KX-GPC576 SCD1U6D3V1 KX-GP

1 2

C574 SCD1U6D3V1 KX-GPC574 SCD1U6D3V1 KX-GP

1 2

C572 SCD1U6D3V1 KX-GPC572 SCD1U6D3V1 KX-GP

1 2

C570 SCD1U6D3V1 KX-GPC570 SCD1U6D3V1 KX-GP

1 2

C568 SCD1U6D3V1 KX-GPC568 SCD1U6D3V1 KX-GP

1 2

C566 SCD1U6D3V1 KX-GPC566 SCD1U6D3V1 KX-GP

1 2

C564 SCD1U6D3V1 KX-GPC564 SCD1U6D3V1 KX-GP

1 2

C562 SCD1U6D3V1 KX-GPC562 SCD1U6D3V1 KX-GP

1 2

C560 SCD1U6D3V1 KX-GPC560 SCD1U6D3V1 KX-GP

1 2

C558 SCD1U6D3V1 KX-GPC558 SCD1U6D3V1 KX-GP

1 2

C556 SCD1U6D3V1 KX-GPC556 SCD1U6D3V1 KX-GP

1 2

PEG_TXN0 42 PEG_TXN1 42 PEG_TXN2 42 PEG_TXN3 42 PEG_TXN4 42 PEG_TXN5 42 PEG_TXN6 42 PEG_TXN7 42 PEG_TXN8 42 PEG_TXN9 42 PEG_TXN10 42 PEG_TXN11 42 PEG_TXN12 42 PEG_TXN13 42 PEG_TXN14 42 PEG_TXN15 42

PEG_TXP0 42 PEG_TXP1 42 PEG_TXP2 42 PEG_TXP3 42 PEG_TXP4 42 PEG_TXP5 42 PEG_TXP6 42 PEG_TXP7 42 PEG_TXP8 42 PEG_TXP9 42 PEG_TXP10 42 PEG_TXP11 42 PEG_TXP12 42 PEG_TXP13 42 PEG_TXP14 42 PEG_TXP15 42

0201 CAPs

SRN100KJ-6-G P

2 3 1

RN26

1 2

R221 2K4R2F-GP

UMA

SRN150F-1-G P

RN27

GMCH_BLUE GMCH_GREE N GMCH_RED

FOR Discrete,change to 0 ohm (66.R0036.A8L)

RN27

4 5

UMA_DIS:66.R0036.A8L

GMCH_BL_ON GMCH_LCDV DD_ON

LIBG

1D05V_S0

3D3V_S0

SRN10KJ-5-G P

RN28

SRN10KJ-5-G P

RN6

UMA

23 1

3D3V_S0

23 1

MCH_TSATN #

PM_EXTTS#0 PM_EXTTS#1

A A

LCTLA_CLK LCTLB_DATA

R198

R198 56R2F-1-GP

56R2F-1-GP

RN23

1 2 3 4 5

FOR Discrete,change to 0 ohm (66.R0036.A8L)

TV_DACC

TV_DACB

TV_DACA

SRN75J-1-G P

UMA_DIS:66.R0036.A8L

Wistron Corporation

21F, 88, Sec.1, Hsin T ai Wu Rd ., Hsichih,

21F, 88, Sec.1, Hsin T ai Wu Rd ., Hsichih, Taipei Hsie n 221, Taiwan, R.O .C.

Taipei Hsie n 221, Taiwan, R.O .C.

Title

Size Document Number Rev

Date: Sheet of

Taipei Hsie n 221, Taiwan, R.O .C.

Cantiga (2 of 6)

JM41_Discrete

8 48Monday, March 02, 2009

M_A_DQ[63..0]18

D D

C C

B B

M_A_DQ[63..0]

M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63

NB1D

AP46 AU47 AT46 AU49 AR45 AN49 AV50 AP50

AW47

BD50

AW49

BA49 BC49 AV46 BA47 AY50 BF46 BC47 BF50 BF48 BC43 BE49 BA43 BE47 BF42 BC39 BF44 BF40 BB40 BE43 BF38 BE41 BA15 BE11 BE15 BF14 BB14 BC15 BE13 BF16 BF10 BC11

BF8

BG7

BC7 BC9 BD6

BF12

AV6 BB6

AW7

AY6

AT10

AW11

AU11

AW9

AR11

AT6 AP6 AL7 AR7

AT12

AM6

AU7

CANTIGA-GS-GP-NF

SA_DQ_0 SA_DQ_1 SA_DQ_2 SA_DQ_3 SA_DQ_4 SA_DQ_5 SA_DQ_6 SA_DQ_7 SA_DQ_8 SA_DQ_9 SA_DQ_10 SA_DQ_11 SA_DQ_12 SA_DQ_13 SA_DQ_14 SA_DQ_15 SA_DQ_16 SA_DQ_17 SA_DQ_18 SA_DQ_19 SA_DQ_20 SA_DQ_21 SA_DQ_22 SA_DQ_23 SA_DQ_24 SA_DQ_25 SA_DQ_26 SA_DQ_27 SA_DQ_28 SA_DQ_29 SA_DQ_30 SA_DQ_31 SA_DQ_32 SA_DQ_33 SA_DQ_34 SA_DQ_35 SA_DQ_36 SA_DQ_37 SA_DQ_38 SA_DQ_39 SA_DQ_40 SA_DQ_41 SA_DQ_42 SA_DQ_43 SA_DQ_44 SA_DQ_45 SA_DQ_46 SA_DQ_47 SA_DQ_48 SA_DQ_49 SA_DQ_50 SA_DQ_51 SA_DQ_52 SA_DQ_53 SA_DQ_54 SA_DQ_55 SA_DQ_56 SA_DQ_57 SA_DQ_58 SA_DQ_59 SA_DQ_60 SA_DQ_61 SA_DQ_62 SA_DQ_63

4 OF 10

DDR SYSTEM MEMORY A

SA_BS_0 SA_BS_1 SA_BS_2

SA_RAS# SA_CAS#

SA_WE#

SA_DM_0 SA_DM_1 SA_DM_2 SA_DM_3 SA_DM_4 SA_DM_5 SA_DM_6 SA_DM_7

SA_DQS_0 SA_DQS_1 SA_DQS_2 SA_DQS_3 SA_DQS_4 SA_DQS_5 SA_DQS_6 SA_DQS_7

SA_DQS#_0 SA_DQS#_1 SA_DQS#_2 SA_DQS#_3 SA_DQS#_4 SA_DQS#_5 SA_DQS#_6 SA_DQS#_7

SA_MA_0 SA_MA_1 SA_MA_2 SA_MA_3 SA_MA_4 SA_MA_5 SA_MA_6 SA_MA_7 SA_MA_8

SA_MA_9 SA_MA_10 SA_MA_11 SA_MA_12 SA_MA_13 SA_MA_14

BC21 BJ21 BJ41

BH22 BK20 BL15

AT50 BB50 BB46 BE39 BB12 BE7 AV10 AR9

AR47 BA45 BE45 BC41 BC13 BB10 BA7 AN7

AR49 AW45 BC45 BA41 BA13 BA11 BA9 AN9

BC23 BF22 BE31 BC31 BH26 BJ35 BB34 BH32 BB26 BF32 BA21 BG25 BH34 BH18 BE25

M_A_DM0 M_A_DM1 M_A_DM2 M_A_DM3 M_A_DM4 M_A_DM5 M_A_DM6 M_A_DM7

M_A_DQS0 M_A_DQS1 M_A_DQS2 M_A_DQS3 M_A_DQS4 M_A_DQS5 M_A_DQS6 M_A_DQS7

M_A_DQS#0 M_A_DQS#1 M_A_DQS#2 M_A_DQS#3 M_A_DQS#4 M_A_DQS#5 M_A_DQS#6 M_A_DQS#7

M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8

M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14

M_A_DM[7..0]

M_A_DQS[7..0]

M_A_DQS#[7..0]

M_A_A[14..0]

M_A_BS#0 18 M_A_BS#1 18 M_A_BS#2 18

M_A_RAS# 18

M_A_CAS# 18

M_A_WE# 18

M_A_DM[7..0] 18

M_A_DQS[7..0] 18

M_A_DQS#[7..0] 18

M_A_A[14..0] 18

M_B_DQ[63..0]17

M_B_DQ[63..0]

M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63

NB1E

AP54 AM52 AR55

AV54 AM54 AN53

AT52 AU53

AW53

AY52

BB52 BC53

AV52

AW55

BD52 BC55

BF54

BE51 BH48

BK48

BE53 BH52

BK46

BJ47

BL45

BJ45

BL41 BH44 BH46

BK44

BK40

BJ39

BK10 BH10

BK6 BH6

BJ9

BL11

BG5

BJ5

BG3

BF4 BD4 BA3 BE5

BF2 BB4 AY4 BA1 AP2 AU1

AT2

AT4 AV4 AU3 AR3 AN1 AP4

AL3

AJ1 AK4 AM4 AH2 AK2

CANTIGA-GS-GP-NF

SB_DQ_0 SB_DQ_1 SB_DQ_2 SB_DQ_3 SB_DQ_4 SB_DQ_5 SB_DQ_6 SB_DQ_7 SB_DQ_8 SB_DQ_9 SB_DQ_10 SB_DQ_11 SB_DQ_12 SB_DQ_13 SB_DQ_14 SB_DQ_15 SB_DQ_16 SB_DQ_17 SB_DQ_18 SB_DQ_19 SB_DQ_20 SB_DQ_21 SB_DQ_22 SB_DQ_23 SB_DQ_24 SB_DQ_25 SB_DQ_26 SB_DQ_27 SB_DQ_28 SB_DQ_29 SB_DQ_30 SB_DQ_31 SB_DQ_32 SB_DQ_33 SB_DQ_34 SB_DQ_35 SB_DQ_36 SB_DQ_37 SB_DQ_38 SB_DQ_39 SB_DQ_40 SB_DQ_41 SB_DQ_42 SB_DQ_43 SB_DQ_44 SB_DQ_45 SB_DQ_46 SB_DQ_47 SB_DQ_48 SB_DQ_49 SB_DQ_50 SB_DQ_51 SB_DQ_52 SB_DQ_53 SB_DQ_54 SB_DQ_55 SB_DQ_56 SB_DQ_57 SB_DQ_58 SB_DQ_59 SB_DQ_60 SB_DQ_61 SB_DQ_62 SB_DQ_63

5 OF 10

DDR SYSTEM MEMORY B

SB_BS_0 SB_BS_1 SB_BS_2

SB_RAS# SB_CAS#

SB_WE#

SB_DM_0 SB_DM_1 SB_DM_2 SB_DM_3 SB_DM_4 SB_DM_5 SB_DM_6 SB_DM_7

SB_DQS_0 SB_DQS_1 SB_DQS_2 SB_DQS_3 SB_DQS_4 SB_DQS_5 SB_DQS_6 SB_DQS_7

SB_DQS#_0 SB_DQS#_1 SB_DQS#_2 SB_DQS#_3 SB_DQS#_4 SB_DQS#_5 SB_DQS#_6 SB_DQS#_7

SB_MA_0 SB_MA_1 SB_MA_2 SB_MA_3 SB_MA_4 SB_MA_5 SB_MA_6 SB_MA_7 SB_MA_8

SB_MA_9 SB_MA_10 SB_MA_11 SB_MA_12 SB_MA_13 SB_MA_14

BJ13 BK12 BK38

BE21 BH14 BK14

AP52 AY54 BJ49 BJ43 BH12 BD2 AY2 AJ3

AR53 BA53 BH50 BK42 BH8 BB2 AV2 AM2

AT54 BB54 BJ51 BH42 BK8 BC3 AW3 AN3

BJ15 BJ33 BH24 BA17 BF36 BH36 BF34 BK34 BJ37 BH40 BH16 BK36 BH38 BJ11 BL37

M_B_DM0 M_B_DM1 M_B_DM2 M_B_DM3 M_B_DM4 M_B_DM5 M_B_DM6 M_B_DM7

M_B_DQS0 M_B_DQS1 M_B_DQS2 M_B_DQS3 M_B_DQS4 M_B_DQS5 M_B_DQS6 M_B_DQS7

M_B_DQS#0 M_B_DQS#1 M_B_DQS#2 M_B_DQS#3 M_B_DQS#4 M_B_DQS#5 M_B_DQS#6 M_B_DQS#7

M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8

M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14

M_B_DM[7..0]

M_B_DQS[7..0]

M_B_DQS#[7..0]

M_B_A[14..0]

M_B_RAS# 17 M_B_CAS# 17 M_B_WE# 17

M_B_DQS[7..0] 17

M_B_DQS#[7..0] 17

M_B_A[14..0] 17

M_B_BS#0 17 M_B_BS#1 17 M_B_BS#2 17

M_B_DM[7..0] 17

A A

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

Cantiga (3 of 6)

JM41_Discrete

9 48Monday, March 02, 2009

NB1G

AW34 AW32

AW30

AW26

AM22

AM21

AM16

BB36 BE35

BK30 BH30 BF30 BD30 BB30

BL29 BG29

BE29 BC29 BA29 AY29 BK28 BH28

BD28 BB28 BL27

BG27 BE27 BC27 BA27 AY27

BF24 BL19 BB16

AG31 AE31 AD31 AC31 AA31

AH29 AG29 AE29 AD29 AC29 AA29

AH28 AG28 AE28 AA28 AH27 AG27 AE27 AD27 AC27 AA27

AH25 AD25 AC25

AH24 AG24 AE24 AD24 AC24 AA24

AL22 AH22

AG22 AE22 AD22 AC22 AA22

AL21 AH21

AD21 AC21 AA21

AL16

AG13 AE13

BJ29

BF28

BJ27

W32

Y31

W31

Y29

W29

Y27

W27

W25

AJ24

Y24

W24

AJ22

AJ21

Y21

W21

NB1G

VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM

VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG

VCC_AXG_SENSE VSS_AXG_SENSE

CANTIGA-GS- GP-NF

1D5V_S3

D D

VCC_GFXCO RE

C C

B B

VCC_AXG_SEN SE38

VSS_AXG_SENSE38

VCC_AXG_SEN SE VSS_AXG_SENSE

U60(ISL6263ACRZ-T-GP) place near Cantiga

VCC SMVCC GFX

7 OF 10

POWER

VCC GFX NCTF

VCC GFX

VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF

VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG

VCC_SM_LF VCC_SM_LF VCC_SM_LF VCC_SM_LF VCC_SM_LF VCC_SM_LF VCC_SM_LF

VCC SM LF

T32 U31 T31 R31 U29 T29 R29 U28 U27 T27 R27 U25 T25 R25 U24 U22 T22 R22 U21 T21 R21 AM19 AL19 AH19 AG19 AE19 AD19 AC19 W19 U19 AM18 AL18 AJ18 AH18 AG18 AE18 AD18 AC18 AA18 Y18 W18 U18 T18 R18

VCC_GFXCO RE

AJ16 AH16 AD16 AC16 AA16 U16 T16 R16 AM15 AL15 AJ15 AH15 AG15 AE15 AA15 Y15 W15 U15 T15

SM_LF1_GMCH

AU45

SM_LF2_GMCH

BF52

SM_LF3_GMCH

BB38

SM_LF4_GMCH

BA19

SM_LF5_GMCH

BE9

SM_LF6_GMCH

AU9

SM_LF7_GMCH

AL9

VCC_GFXCO RE

C146

C142

SCD1U10V2KX-4GP

place near Cantiga

C174

C147

C192

SCD1U16V2KX-3GP

Place on the Edge

Place CAP where LVDS and DDR3 taps

C175

SCD22U10V2KX-1GP

C165

C163

SCD1U16V2KX-3GP

C217

C217 SCD1U10V2KX- 4GP

SCD1U10V2KX- 4GP

C211

C237

SCD47U10V3KX-3GP

1D05V_S0

C221

C213

SCD1U16V2KX-3GP

Coupling CAP 370 mils from the Edge

C170

C184

C178

SCD1U16V2KX-3GP

C184

SCD1U16V2KX-3GP

SC10U6D3V5MX-3GP

C159

SC10U10V5KX-2GP

Coupling CAP

C162

SC10U10V5KX-2GP

FOR VCC SM

C191

SC10U6D3V5MX-3GP

C166

C216

SCD1U10V2KX-4GP

TC10

ST330U2D5VBM-GP

C172

BC1

C171

SC1U10V3KX-3GP

SCD1U10V2KX-4GP

1D5V_S3

C187

SC10U6D3V5MX-3GP

FOR VCC CORE

C204

C236

SC10U6D3V5MX-3GP

C218

SC10U6D3V5MX- 3GP

Coupling CAP

C206

SCD1U10V2KX-4GP

C205

SCD1U10V2KX- 4GP

SCD1U10V2KX-4GP

C212

1 2

0R0402-PAD

6 OF 10

NB1F

AT41

VCC

AR41

VCC

AN41

C198

SCD1U10V2KX-4GP

VCC_GMCH _35

R52

AH41 AD41 AC41

AT40 AM40

AH40 AG40 AE40 AD40 AC40 AA40

AN35 AM35

AH35 AD35 AC35

AM34

AH34 AG34 AE34 AD34

AC34 AA34

AM32

AH32 AE32 AD32 AA32 AM31

AH31 AM29

AM28

AM27 AM25

AM24

VCC

AJ41

VCC VCC VCC VCC

Y41

VCC

W41

VCC VCC VCC

AL40

VCC

AJ40

VCC VCC VCC VCC VCC VCC VCC

Y40

VCC VCC VCC

AJ35

VCC VCC VCC VCC

W35

VCC VCC

AL34

VCC

AJ34

VCC VCC VCC VCC VCC

VCC VCC

Y34

VCC

W34

VCC VCC

AL32

VCC

AJ32

VCC VCC VCC VCC VCC VCC

AL31

VCC

AJ31

VCC VCC VCC

AL29

VCC VCC

AL28

VCC

AJ28

VCC VCC

AL27

VCC VCC

AL25

VCC

AJ25

VCC VCC

N36

VCC

6 OF 10

VCC CORE

1D05V_S0

AT38

VCC_NCTF

AR38

VCC_NCTF

AN38

VCC_NCTF

AM38

VCC_NCTF

AL38

VCC_NCTF

AG38

VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF

AE38 AA38 Y38 W38 U38 T38 R38 AT37 AR37 AN37 AM37 AL37 AJ37 AH37 AG37 AE37 AD37 AC37 AA37 Y37 W37 U37 T37 R37 AT35 AR35 U35 AT34 AR34 U34 T34 R34

POWER

VCC NCTF

Place on the Edge

CANTIGA-GS- GP-NF

C229

SC1U10V3KX-3GP

CANTIGA-GS- GP-NF

A A

Wistron Corporation

21F, 88, Sec.1, Hsin T ai Wu Rd ., Hsichih,

21F, 88, Sec.1, Hsin T ai Wu Rd ., Hsichih, Taipei Hsie n 221, Taiwan, R.O .C.

Taipei Hsie n 221, Taiwan, R.O .C.

Title

Size D ocument Numb er Rev

Date: Sheet of

Taipei Hsie n 221, Taiwan, R.O .C.

Cantiga (4 of 6)

JM41_Discrete

10 48Monday, March 02, 2009

5V_S0

BC3

D D

UMA

1D05V_S0

C C

1D05V_S0

Imax = 300 mA

U30

VIN

GND EN3NC#4

SC1U10V3KX-3GP

RT9198-33PBR-GP

74.09198.G7F

74.09091.J3F

74.09091.J3F UMA

UMA

65mA

FCM1608KF-1-GP

1 2

68.00217.161

2ND = 68.00248.061

FCM1608KF-1-GP

1 2

L17

68.00217.161

2ND = 68.00248.061

VOUT

SCD1U16V2KX-3GP

SCD1U10V2KX-4GP

SCD1U16V2KX-3GP

SCD1U10V2KX-4GP

C519

SCD1U10V2KX-4GP

C527

M_VCCA_HPLL

C145

M_VCCA_MPLL

C466

SCD1U16V2KX-3GP

C520

SCD1U16V2KX-3GP

C528

1D05V_SUS_MCH_PLL2

3D3V_S0_DAC

BC2

SC1U10V3KX-3GP

UMA

M_VCCA_DPLLA

C518

M_VCCA_DPLLB

C529

24mA

SC4D7U6D3V3KX-GP

C153

C153 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SC10U6D3V5MX-3GP

C509

C509 SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

UMA

139.2mA

C477

C477 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

3D3V_S0_DAC

1D05V_S0

480mA

120ohm 100MHz

1D05V_S01D05V_S0

B B

A A

1 2

FCM1608CF-221T02-GP

220ohm 100MHz

68.00217.521

2ND = 68.00119.111

1D5V_S0

PBY160808T-181Y-GP

68.00206.041

2ND = 68.00214.101

UMA

1 2

C235

SC10U6D3V5MX-3GP

C215

C194

SCD01U16V2KX-3GP

1D05V_RUN_PEGPLL

C233

C233 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

1D5VRUN_TVDAC

SCD022U16V2KX-3GP

1D5VRUN_QDAC

C195

SCD1U10V2KX-4GP

58.7mA

C214

SCD1U10V2KX-4GP

24mA

1D05V_SUS_MCH_PLL2

C154

180ohm 100MHz

UMA

1D5V_S0

SCD1U10V2KX-4GP

157.2mA

80mA

C209

UMA

10mA

SCD01U16V2KX-3GP

C202

UMA

SC1KP50V2KX-1GP

C186

SC10U6D3V5MX-3GP

1D8V_NB_S0

60.3mA

SCD1U10V2KX-4GP

SCD01U16V2KX-3GP

C210

UMA

SCD1U10V2KX-4GP

C201

UMA

1D8V_NB_S0

UMA

C225

13.2mA

C227

C227 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

1D05V_RUN_PEGPLL

C148

 Dbz Dcz 

C160

SC4D7U6D3V3KX-GP

SC10U6D3V5MX-3GP

SCD1U10V2KX-4GP

SC2D2U6D3V3MX-1-GP

C196

1D05V_RUN_PEGPLL

C226

50mA

C232

SCD1U10V2KX-4GP

UMA

M_VCCA_DPLLA M_VCCA_DPLLB M_VCCA_HPLL M_VCCA_MPLL

C155

SC1U10V3KX-3GP



SCD1U10V2KX-4GP

J31

L31

M33

J45 L49

AF10

AE1

U43 U41

V44

AJ43

50mA

AG43

AW24

AU24

AW22

AU22 AU21

AW20

AU19

AW18

AU18

AW16

AU16 AT16 AR16 AU15 AT15 AR15

AW14

AT24

AR24

AT22

AR22

AT21

AR21

AT19

AR19

AT18

AR18

AU27

Bdz  



Bdz  



AU28 AU29 AU31 AT31

AR31

AT29

AR29

AT28

AR28

AT27

AR27

AH12 AE43

M46

L45

1D05V_S0

NB1H

VCCA_CRT_DAC

VCCA_DAC_BG VSSA_DAC_BG

VCCA_DPLLA VCCA_DPLLB VCCA_HPLL VCCA_MPLL

VCCA_LVDS VCCA_LVDS

VSSA_LVDS

VCCA_PEG_BG

VCCA_PEG_PLL

VCCA_SM VCCA_SM VCCA_SM VCCA_SM VCCA_SM VCCA_SM VCCA_SM VCCA_SM VCCA_SM VCCA_SM VCCA_SM VCCA_SM VCCA_SM VCCA_SM VCCA_SM VCCA_SM VCCA_SM

VCCA_SM_NCTF VCCA_SM_NCTF VCCA_SM_NCTF VCCA_SM_NCTF VCCA_SM_NCTF VCCA_SM_NCTF VCCA_SM_NCTF VCCA_SM_NCTF VCCA_SM_NCTF VCCA_SM_NCTF

VCCA_SM_CK

? Dez  Dfz 

VCCA_SM_CK VCCA_SM_CK VCCA_SM_CK VCCA_SM_CK_NCTF VCCA_SM_CK_NCTF VCCA_SM_CK_NCTF VCCA_SM_CK_NCTF VCCA_SM_CK_NCTF VCCA_SM_CK_NCTF VCCA_SM_CK_NCTF VCCA_SM_CK_NCTF

VCCD_HPLL VCCD_PEG_PLL

VCCD_LVDS VCCD_LVDS

CANTIGA-GS-GP-NF

D11

BAT54-7-F-GP

8 OF 10

CRTPLLA PEGA SM

A LVDS

POWER



LVDS

1D05V_S0_SD

R13

VTT

T12

VTT

R11

VTT

T10

VTT

VCC_HDA

VCC_AXF VCC_AXF VCC_AXF



VCC_HV VCC_HV

VCC_PEG VCC_PEG VCC_PEG VCC_PEG

VCC_DMI VCC_DMI VCC_DMI

VTTLF VTTLF VTTLF

1 2

0R0603-PAD

K30

A31

N34 N32

M25 N24 M23

BK24 BL23 BJ23 BK22

T41

  

 

  

 

C33 A33

AB44 Y44 AC43 AA43

AM44 AN43 AL43

K14 Y12 P2

R212

VCCA_TV_DAC

TVD TV/CRT

HDA

VCCD_QDAC

VCCD_TVDAC

AXF

VCC_SM_CK VCC_SM_CK VCC_SM_CK VCC_SM_CK

SM CK

VCC_TX_LVDS

Bgz

PEG

DMI

VTTLF

3D3V_S0 3D3V_HV_S0

R213

10R2F-L-GP

1D5VRUN_TVDAC

1D5VRUN_QDAC

350mA

SC1U10V3KX-3GP

C203

3D3V_HV_S0

106mA

Dhz Diz 

VTTLF1 VTTLF2 VTTLF3



1782mA

C189

456mA

C152

C478

SCD47U6D3V2KX-GP

C505

SCD1U10V2KX-4GP

C228

SCD47U6D3V2KX-GP

SCD1U10V2KX-4GP

1D05V_S0

SC10U6D3V5MX-3GP

C231

C503

SC4D7U6D3V3KX-GP

C157

SCD47U6D3V2KX-GP

1D05V_S0

ST220U2D5VDM-13GP

C220

C197

852mA

C179

SC2D2U6D3V3MX-1-GP

SC4D7U6D3V3KX-GP

C193

SCD47U6D3V2KX-GP

3D3V_S0_DAC

180ohm 100MHz

TC8

I=300mA

U10

3D3V_S0

C222

SC1U10V2ZY-GP

1 2

200mA

SCD1U10V2KX-4GP

C219

Bjz

SCD47U6D3V2KX-GP

C224

C185

SC1KP50V2KX-1GP



R205

1 2

SC10U6D3V5MX-3GP

1R2F-GP

100mA

UMA

%   

 

%   

 

1D05V_S0

SCD1U10V2KX-4GP

Title

Size Document Number Rev

Date: Sheet of

Dkz Dlz 

C188

SC10U6D3V5MX-3GP

U10

VIN

GND EN/EN#3NC#4

RT9198-18PBR-GP

74.09198.C7F

74.09091.G3F

1D5V_S3

C180

1D5V_SM_CK_R

C223

SC10U6D3V5MX-3GP

C208

SC10U6D3V5MX-3GP

C180



1D05V_S0

TC9

ST150U6D3VBM-GP

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Cantiga (5 of 6)

JM41_Discrete

VOUT

SC10U6D3V5MX-3GP

Bpz!D   

11 48Monday, March 02, 2009

NB:180mA

C234

1 2

1D8V_NB_S0

 

1D8V_NB_S0

SC1U10V2ZY-GP

Dqz D

9 OF 10

NB1I

BA55

VSS

AU55

VSS

AN55

VSS

AJ55

VSS

AE55

VSS

AA55

VSS

U55

VSS

N55

VSS

BD54

VSS

BG53

VSS

D D

C C

B B

A A

AJ53 AE53 AA53

U53 N53

J53 G53 E53 K52

BG51 BA51

AW51

AU51 AR51 AN51 AL51

AJ51 AG51 AE51 AC51 AA51

W51

U51 R51 N51

L51

J51 G51 C51

BK50

AM50

K50

BG49

E49 C49

BD48 BB48 AY48 AV48 AT48 AP48

AM48

AK48 AH48 AF48 AD48 AB48

Y48 V48

T48 P48 M48 K48 H48

BL47 BG47

E47 C47 A47

BD46 AY46

AM46

AK46 AH46 BG45 AE45 AC45 AA45

W45

R45 N45 E45

BD44 BB44 AV44 AK44 AH44 AF44 AD44

K44 H44

BL43 BG43 AY43 AR43

W43

R43 M43 E43

CANTIGA-GS-GP-NF

9 OF 10

VSS

C43 A43 BD42 H42 BG41 AY41 AU41 AM41 AL41 AG41 AE41 AA41 R41 M41 E41 BD40 AU40 AR40 AN40 W40 U40 T40 R40 K40 H40 BL39 BG39 BA39 E39 C39 A39 BD38 AU38 H38 BG37 AU37 M37 E37 BD36 AW36 H36 BL35 BG35 AY35 AU35 AL35 AG35 AE35 AA35 Y35 M35 E35 A35 BD34 AU34 AN34 H34 BL33 BG33 AY33 E33 BD32 AU32 AN32 AG32 AC32 Y32 H32 B32 BJ31 BG31 AY31 AN31 M31 E31 N30 H30 AN29 AJ29 M29 A29 AW28 AN28 AD28 AC28 Y28 W28 H28 F28 AN27 AJ27 M27 BF26 BD26 N26 H26 BJ25 AY25 AU25

NB1J

AN25

VSS

AG25

VSS

AE25

VSS

AA25

VSS

Y25

VSS

E25

VSS

A25

VSS

BD24

VSS

AN24

VSS

AL24

VSS

H24

VSS

BG23

VSS

AY23

VSS

E23

VSS

BD22

VSS

BB22

VSS

AN22

VSS

Y22

VSS

W22

VSS

H22

VSS

BL21

VSS

BG21

VSS

AY21

VSS

AN21

VSS

AG21

VSS

AE21

VSS

M21

VSS

E21

VSS

A21

VSS

BD20

VSS

H20

VSS

BG19

VSS

AY19

VSS

M19

VSS

E19

VSS

BD18

VSS

N18

VSS

H18

VSS

BL17

VSS

BG17

VSS

AY17

VSS

M17

VSS

E17

VSS

A17

VSS

BD16

VSS

AN16

VSS

AG16

VSS

AE16

VSS

Y16

VSS

W16

VSS

N16

VSS

H16

VSS

BG15

VSS

AY15

VSS

AN15

VSS

AD15

VSS

AC15

VSS

R15

VSS

M15

VSS

E15

VSS

BD14

VSS

H14

VSS

BL13

VSS

BG13

VSS

AY13

VSS

AU13

VSS

AR13

VSS

AJ13

VSS

AC13

VSS

AA13

VSS

W13

VSS

U13

VSS

M13

VSS

E13

VSS

A13

VSS

BD12

VSS

AV12

VSS

AP12

VSS

AM12

VSS

AK12

VSS

AB12

VSS

V12

VSS

P12

VSS

H12

VSS

BG11

VSS

AG11

VSS

E11

VSS

BD10

VSS

AY10

VSS

AP10

VSS

H10

VSS

BL9

VSS

BG9

VSS

BD8

VSS

BB8

VSS

AY8

VSS

AV8

VSS

AT8

VSS

AP8

VSS

CANTIGA-GS-GP-NF

VSS

VSS SCB

NCTF TEST PIN:

BL55,BL1,A55,D1,A4

10 OF 10

VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF

VSS NCTF

VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF

RSVD#B55

VSS_SCB

NCTF_VSS_SCB#BL55

NCTF_VSS_SCB#BL1 NCTF_VSS_SCB#A55

NCTF_VSS_SCB#D1 NCTF_VSS_SCB#A4

VSS VSS VSS VSS

AM8 AK8 AH8 AF8 AD8 AB8 Y8 V8 P8 M8 K8 H8 BJ7 E7 BF6 BC5 BA5 AW5 AU5 AR5 AN5 AL5 AJ5 AG5 AE5 AC5 AA5 W5 U5 N5 L5 J5 G5 C5 BH4 BE3 U3 E3 BC1 AW1 AR1 AL1 AG1 AC1 W1 N1 J1 AU43 BB42 AW38 BA35 L29 N28 N22 N20 N14 AL13 B10 AN13

N42 N40 N38 M39

AJ38 AH38 AD38 AC38 T35 R35 AT32 AR32 U32 R32 T28 R28 AT25 AR25 T24 R24 AN19 AJ19 AA19 Y19 T19 R19 AN18

B55 B2

BL55 BL1 A55 D1 A4

VSS_SCB#B2

NCTF_VSS_SCB#BL55 NCTF_VSS_SCB#BL1 NCTF_VSS_SCB#A55 NCTF_VSS_SCB#D1 NCTF_VSS_SCB#A4

TP73 TPAD14-GPTP73 TPAD14-GP

TP78 TPAD14-GPTP78 TPAD14-GP

TP76 TPAD14-GPTP76 TPAD14-GP

TP79 TPAD14-GPTP79 TPAD14-GP

TP72 TPAD14-GPTP72 TPAD14-GP

TP75 TPAD14-GPTP75 TPAD14-GP

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

Cantiga (6 of 6)

JM41_Discrete

12 48Monday, March 02, 2009

3RD = 83.00016.F11

2ND = 83.00016.K11

3D3V_AUX_S5

D D

RTC_BAT

1 2

R199 1KR2J-1-GPR199 1KR2J-1-GP

RTC_AUX_S5

C C

B B

R195

R195 330KR2F-L-GP

330KR2F-L-GP

INTVRMEN

HDMI_DIS

3D3V_S0

integrated VccSus1_05,VccSus1_5,VccCL1_5

INTVRMEN

High=Enable Low=Disable

integrated VccLan1_05VccCL1_05

LAN100_SLP

R200

R200 10KR2J-3-GP

10KR2J-3-GP

R172

1 2

10KR2J-3-GP

HDMI_EN

MEDIA_LED#

High=Enable Low=Disable

2ND = 83.00016.K11

83.00016.B11

D10

BAS16-1-GP

G75

GAP-OPEN

ACZ_SDATAIN022

SSD HDD

RTC_AUX_S5

SC1U16V3ZY-GP

SRN20KJ-GP-U

2 3 1

RN4

MEDIA_LED#31

SATA_RXN021

SATA_RXP021 SATA_TXN021 SATA_TXP021

SATA_RXN120

SATA_RXP120 SATA_TXN120 SATA_TXP120

C133 SC6P50V2CN-1GPC133 SC6P50V2CN-1GP

1 2

X-32D768KHZ-40GPU

82.30001.841

82.30001.A41

C498

C140

82.30001.A41

C130 SC6P50V2CN-1GPC130 SC6P50V2CN-1GP

R197

C149

SC1U10V3KX-3GP

C87 SCD01U50V2KX-1GPC87 SCD01U50V2KX-1GP

1 2

C88 SCD01U50V2KX-1GPC88 SCD01U50V2KX-1GP

1 2

C90 SCD01U50V2KX-1GPC90 SCD01U50V2KX-1GP

1 2

C89 SCD01U50V2KX-1GPC89 SCD01U50V2KX-1GP

1 2

C108 SCD01U50V2KX-1GPC108 SCD01U50V2KX-1GP

1 2

C109 SCD01U50V2KX-1GPC109 SCD01U50V2KX-1GP

1 2

C111 SCD01U50V2KX-1GPC111 SCD01U50V2KX-1GP

1 2

C110 SCD01U50V2KX-1GPC110 SCD01U50V2KX-1GP

1 2

2 3

1 2

1MR2J-1-GP

TP19TPAD14-GP TP19TPAD14-GP

GLAN_COMP place within 500 mil of ICH9M

1D5V_S0

1 2

R189

TP11TPAD14-GP TP11TPAD14-GP

TP56TPAD14-GP TP56TPAD14-GP

TP70TPAD14-GP TP70TPAD14-GP

TP53TPAD14-GP TP53TPAD14-GP

TP67TPAD14-GP TP67TPAD14-GP

RTC_X1

R45

R45 10MR2J-L-GP

10MR2J-L-GP

RTC_X2

INTVRMEN

ICH9_LAN_RSTSYNC

HDMI_EN

GLAN_COMP

24D9R2F-L-GP

ACZ_BIT_CLK ACZ_SYNC_R

ACZ_RST#_R

ACZ_SDIN1 ACZ_SDIN2 ACZ_SDIN3

ACZ_SDATAOUT_R

HDA_DOCK_EN# HDA_DOCK_RST#

SATA_RXN0_C SATA_RXP0_C

SATA_TXN0_C

SATA_TXP0_C

SATA_RXN1_C SATA_RXP1_C SATA_TXN1_C SATA_TXP1_C

RTC_RST# SRTC_RST#

INTRUDER#

SB1A

F25

RTCX1

G25

RTCX2

G24

RTCRST#

C24

SRTCRST#

C23

INTRUDER#

E25

INTVRMEN

D25

LAN100_SLP

G22

GLAN_CLK

D14

LAN_RSTSYNC

A14

LAN_RXD0

D12

LAN_RXD1

B14

LAN_RXD2

D13

LAN_TXD0

C13

LAN_TXD1

A13

LAN_TXD2

D15

GPIO56

H22

GLAN_COMPI

H21

GLAN_COMPO

AE7

HDA_BIT_CLK

AB7

HDA_SYNC

AA7

HDA_RST#

AB6

HDA_SDIN0

AE6

HDA_SDIN1

AC6

HDA_SDIN2

AA5

HDA_SDIN3

AC7

HDA_SDOUT

AD8

HDA_DOCK_EN#/GPIO33

AB8

HDA_DOCK_RST#/GPIO34

AC9

SATALED#

AE14

SATA0RXN

AD14

SATA0RXP

AC15

SATA0TXN

AD15

SATA0TXP

AD13

SATA1RXN

AC13

SATA1RXP

AA14

SATA1TXN

AB14

SATA1TXP

ICH9M-1-GP

RTCLAN / GLAN

LPCCPU

RTCLAN / GLAN

LPCCPU

IHDA

SATA

1 OF 6

FWH0/LAD0 FWH1/LAD1 FWH2/LAD2 FWH3/LAD3

FWH4/LFRAME#

LDRQ0#

LDRQ1#/GPIO23

A20GATE

A20M#

DPRSTP#

DPSLP#

FERR#

CPUPWRGD

IGNNE#

INIT# INTR

RCIN#

NMI

SMI#

STPCLK#

THRMTRIP#

TP11

SATA4RXN SATA4RXP SATA4TXN

SATA4TXP

SATA5RXN SATA5RXP SATA5TXN

SATA5TXP

SATA_CLKN SATA_CLKP

SATARBIAS#

SATARBIAS

H3 J3 K5 L3

LDRQ0#

3D3V_LDRQ1_S0

J1 N3

AB23

H_DPRSTP#

AE23 AE24

H_FERR#_R

AD25

H_PWRGD

AE22 AD23 AE21

AD24 L1

AD21 AC21

AC25 AC23

ICH_TP11

AC22

SATA_RXN4_C

AD12

SATA_RXP4_C

AE12

SATA_TXN4_C

AB12

SATA_TXP4_C

AA12 AC11

AD11 AB10 AA10

AC16 AB16

SATARBIAS

AD10 AE10

24D9R2F-L-GP

Place within 500 mils of ICH9 ball

LPC_LFRAME# 28,29

TP15 TPAD14-GPTP15 TPAD14-GP

TP14 TPAD14-GPTP14 TPAD14-GP

KA20GATE 28 H_A20M# 4

H_PWRGD 4,32 H_IGNNE# 4 H_INIT# 4

H_INTR 4 KBRCIN# 28

H_STPCLK# 4

H_THERMTRIP_R

TP57 TPAD14-GPTP57 TPAD14-GP

CLK_PCIE_SATA# 3

CLK_PCIE_SATA 3

R32

LPC_LAD0 28,29 LPC_LAD1 28,29 LPC_LAD2 28,29 LPC_LAD3 28,29RTC_BAT24,28

H_DPRSTP# 4,8,34 H_DPSLP# 4

H_NMI 4 H_SMI# 4

12 12 12 12

1D05V_S0

RN14

1 2 3

SRN56J-4-GP

1 2

R183 54D9R2F-L1-GPR183 54D9R2F-L1-GP

C93SCD01U50V2KX-1GP C93SCD01U50V2KX-1GP C92SCD01U50V2KX-1GP C92SCD01U50V2KX-1GP C94SCD01U50V2KX-1GP C94SCD01U50V2KX-1GP C95SCD01U50V2KX-1GP C95SCD01U50V2KX-1GP

R179

1 2

56R2F-1-GP

SATA_RXN4 24 SATA_RXP4 24

SATA_TXN4 24 SATA_TXP4 24

1D05V_S0 1D05V_S0

H_DPRSTP# H_PWRGD

H_FERR# 4

1D05V_S0

PM_THRMTRIP-A# 4,8,32

ODD

R36

R36 56R2F-1-GP

56R2F-1-GP

R171

R171 56R2F-1-GP

56R2F-1-GP

RN2

ACZ_RST#_R

ACZ_SDATAOUT_R

ACZ_SYNC_R

ACZ_BIT_CLK

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

ICH9-M (1 of 4)

JM41_Discrete

13 48Thursday, March 05, 2009

1 2 3 4 5

SRN0J-7-GP

ACZ_RST#22 ACZ_SDATAOUT22 ACZ_SYNC22 ACZ_BITCLK22

C96

SCD1U10V2KX-4GP

A A

2 OF 6

PCI

PCI_REQ#3

INT_PIRQB# INT_PIRQG#

3D3V_S0

TXN1

TXP1

TXN2

TXP2

2 OF 6

REQ0#

GNT0# REQ1#/GPIO50 GNT1#/GPIO51 REQ2#/GPIO52 GNT2#/GPIO53 REQ3#/GPIO54 GNT3#/GPIO55

C/BE0# C/BE1# C/BE2# C/BE3#

IRDY#

PAR

PCIRST#

DEVSEL#

PERR#

PLOCK#

SERR#

STOP#

TRDY#

FRAME#

PLTRST#

PCICLK

PME#

PIRQE#/GPIO2

PIRQF#/GPIO3

PIRQG#/GPIO4

SB1D

T25

PERN1

T24

PERP1

R24

PETN1

R23

PETP1

P25

PERN2

P24

PERP2

P21

PETN2

P22

PETP2

N23

PERN3

N24

PERP3

M21

PETN3

M22

PETP3

M25

PERN4

M24

PERP4

L24

PETN4

L23

PETP4

K24

PERN5

K25

PERP5

K21

PETN5

K22

PETP5

H24

PERN6/GLAN_RXN

H25

PERP6/GLAN_RXP

J24

PETN6/GLAN_TXN

J23

PETP6/GLAN_TXP

E24

SPI_CLK

E23

SPI_CS0#

F23

SPI_CS1#/GPIO58/CLGPIO6

F22

SPI_MOSI

G23

SPI_MISO

OC0#/GPIO59

OC1#/GPIO40

OC2#/GPIO41

OC3#/GPIO42

OC4#/GPIO43

OC5#/GPIO29

OC6#/GPIO30

OC7#/GPIO31

OC8#/GPIO44

OC9#/GPIO45

OC10#/GPIO46

OC11#/GPIO47

AE5

USBRBIAS

AD5

USBRBIAS#

ICH9M-1-GP

PCI_REQ#0

G4 E1

PCI_REQ#1

A9 E12

PCI_REQ#2

B11 C10

PCI_REQ#3

D6 C6

D10 A5 E6 C9

PCI_IRDY#

C3 B1 T3

PCI_DEVSEL#

PCI_PERR#

PCI_LOCK#

PCI_SERR#

PCI_STOP#

PCI_TRDY#

PCI_FRAME#

B8 A21

B5 T1

INT_PIRQE#

INT_PIRQF#

INT_PIRQG#

INT_PIRQH#

RP2

1 2 3 4 5 6

SRN8K2J-2-GP-U

USB

SB1B

A11

AD0

B12

AD1

A10

AD2

C12

AD3

AD4

A12

AD5

E10

AD6

C11

AD7

AD8

PCI_GNT#0 and SPI_CS1#

D D

have weak internal Pull up

INT_PIRQA# INT_PIRQB# INT_PIRQC# INT_PIRQD#

C C

PCI_STOP# PCI_FRAME# PCI_REQ#1

3D3V_S0

ECSCI#_1 INT_PIRQH# INT_PIRQF# PM_CLKRUN#

3D3V_S0

B B

3D3V_S5

A A

These R need close SB within 600 mils

RP3

1 2 3 4 5 6

SRN8K2J-2-GP-U

SRN8K2J-2-GP-U RP1

RP1

1 2 3 4 5 6

SRN8K2J-2-GP-U

PCIE_RXN125

PCIE_RXP125 PCIE_TXN125 PCIE_TXP125

LAN

PCIE_RXN225

PCIE_RXP225 PCIE_TXN225 PCIE_TXP225

MINICARD1

RN3

45 3

SRN10KJ-6-GP

10 9 8 7

INT_PIRQC#

INT_PIRQE#

INT_PIRQA#

INT_SERIRQ

C124 SCD1U10V2KX-5GPC124 SCD1U10V2KX-5GP C123 SCD1U10V2KX-5GPC123 SCD1U10V2KX-5GP

C128 SCD1U10V2KX-5GPC128 SCD1U10V2KX-5GP C126 SCD1U10V2KX-5GPC126 SCD1U10V2KX-5GP

USB_OC#0 USB_OC#3~11

USB_OC#1

USB_OC#025 USB_OC#120

R177 22D6R2F-L1-GPR177 22D6R2F-L1-GP

A4 E8

A3 D9 C8 C2 D7

D11

B6 D5 D3

B2 C4 C1 D1

J4 H2

PCI_LOCK# PCI_DEVSEL# INT_PIRQD# PCI_REQ#2

ICH9M-1-GP

AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31

Interrupt I/F

PIRQA# PIRQB# PIRQC# PIRQD#C7PIRQH#/GPIO5

3D3V_S0

USB_OC#0 USB_OC#1

USB_OC#3~11

USB_RBIAS_PN

10 9 8 7

4 OF 6

DMI0RXN DMI0RXP DMI0TXN DMI0TXP

DMI1RXN DMI1RXP DMI1TXN DMI1TXP

DMI2RXN DMI2RXP DMI2TXN DMI2TXP

DMI3RXN DMI3RXP DMI3TXN DMI3TXP

DMI_CLKN

PCI-Express

DMI_CLKP

Direct Media Interface

DMI_ZCOMP

DMI_IRCOMP

SPI

USBP10N USBP10P USBP11N USBP11P

TP_GPIO1

TPAD14-GP

BOOT BIOS Strap

A16 swap override strap

PCI_GNT#3

PCI_TRDY#PCI_PERR# PCI_IRDY# PCI_SERR# PCI_REQ#0

V25 V24 U24 U23

W23 W24 V21 V22

Y24 Y25 Y21 Y22

AB24 AB25 AA23 AA24

T21 T22

AB21 AB22

AE2

USBP0N

AD1

USBP0P

AD3

USBP1N

AD4

USBP1P

AC2

USBP2N

AC3

USBP2P

AC5

USBP3N

AB4

USBP3P

AB2

USBP4N

AB1

USBP4P

AA3

USBP5N

AA2

USBP5P

USBP6N

USBP6P

USBP7N

USBP7P

USBP8N

USBP8P

USBP9N

USBP9P

U3 U2 V4 V5

3D3V_S5

RN19

1 2 3

SRN10KJ-5-GP

SPI_CS#1 BOOT BIOS LocationPCI_GNT#0

0 1 SPI

C501 SC100P50V2JN-3GP

PCLK_ICH 3

3D3V_S0

PCI

LPC(Default)

low = A16 swap override enable high = default

3D3V_S0

R167

10KR2J-3-GP

G74

GAP-OPEN

RN18

1 2 3

SRN10KJ-5-GP

1D5V_S0

Pair

0 1 2 3 4 5 6 7 8 9 10 11

MXM_RST#42

SATACLKREQ#3

R187

1 2

10KR2J-3-GP

R35

R35 24D9R2F-L-GP

24D9R2F-L-GP

USB

Device USB2 USB3 USB4 WiMAX WEBCAM NC NC BLUETOOTH NC USB1 MINIC2 Cardreader

PLT_RST1#

1 2

GPIO49 should be pulled down to GND only when using Teenah. When using Cantiga, this ball should be left as No Connect.

DMI_RXN0 8 DMI_RXP0 8 DMI_TXN0 8 DMI_TXP0 8

DMI_RXN1 8 DMI_RXP1 8 DMI_TXN1 8 DMI_TXP1 8

DMI_RXN2 8 DMI_RXP2 8 DMI_TXN2 8 DMI_TXP2 8

DMI_RXN3 8 DMI_RXP3 8 DMI_TXN3 8 DMI_TXP3 8

CLK_PCIE_ICH# 3 CLK_PCIE_ICH 3

DMI_IRCOMP_R ACZ_SPKR

USBPN0 25

USBPP0 25

USBPN1 20 USBPP1 20 USBPN2 26 USBPP2 26

USBPN3 25

USBPP3 25

USBPN4 19

USBPP4 19

USBPN7 24 USBPP7 24

USBPN9 20

USBPP9 20

USBPN10 25

USBPP10 25

USBPN11 24 USBPP11 24

SMB_CLK16 SMB_DATA16

PM_SYNC#8

VR_PWRGD28,32,34

MCH_ICH_SYNC#8

MXM_RST#

ATI_PWR_ON

ATI_PWR_ON#

PM_STPPCI#3 PM_STPCPU#3

PM_CLKRUN#28

PCIE_WAKE#25

INT_SERIRQ28

EC_TMR28

ECSCI#_128

ECSWI#28

ACZ_SPKR22

SMB_LINK_ALERT#

SMLINK0 SMLINK1

PM_RI#

DBRESET#

SMB_ALERT#

THRM#

TP58TPAD14-GP TP58TPAD14-GP

PSW_CLR# ATI_PWR_ON# ICH9_GPIO20

TP60TPAD14-GP TP60TPAD14-GP

CLK_SEL1

TP6TPAD14-GP TP6TPAD14-GP

MXM_RST#

TP89TPAD14-GP TP89TPAD14-GP

SATACLKREQ#

PCB_VER0_SB

PCB_VER1_SB

TP65TPAD14-GP TP65TPAD14-GP

MIC_SEL_1

TP5TPAD14-GP TP5TPAD14-GP

NO_iTPM

ICH_TP3

TP20TPAD14-GPTP20TPAD14-GP TP66TPAD14-GPTP66TPAD14-GP TP64TPAD14-GPTP64TPAD14-GP TP59TPAD14-GPTP59TPAD14-GP

MIC_SEL_1

THRM#

ICH_TP8

ICH_TP9

ICH_TP10

ATI_PWR_ON 39,40

ATI_PWR_ON# 40

No Reboot Strap

SPKR LOW = Defaule

1 2

R170 10KR2J-3-GPR170 10KR2J-3-GP

1 2

R44 1KR2J-1-GP

1 2

R169 10KR2J-3-GPR169 10KR2J-3-GP

SB1C

C18

SMBCLK

C15

SMBDATA

B21

LINKALERT#/GPIO60/CLGPIO4

E18

SMLINK0

A24

SMLINK1

C20

RI#

SUS_STAT#/LPCPD#

C25

SYS_RESET#

PMSYNC#/GPIO0

A23

SMBALERT#/GPIO11

B15

STP_PCI#/GPIO15

A20

STP_CPU#/GPIO25

CLKRUN#/GPIO32

C21

WAKE#

SERIRQ

AD20

THRM#

B24

VRMPWRGD

A19

TP12

AE16

GPIO1

AE18

GPIO6

AD18

GPIO7

B25

GPIO8

C14

GPIO12

D20

GPIO13

AE17

GPIO17

GPIO18

AC8

GPIO20

AC19

SCLOCK/GPIO22

D17

GPIO27

E20

GPIO28

SATACLKREQ#/GPIO35

AB18

SLOAD/GPIO38

AC18

SDATAOUT0/GPIO39

AB19

SDATAOUT1/GPIO48

AC20

GPIO49

A16

GPIO57/CLGPIO5

SPKR

AB20

MCH_SYNC#

C19

TP3

AB17

TP8

AC17

TP9

AD17

TP10

ICH9M-1-GP

ECSWI# PM_RI#

PCIE_WAKE#

3D3V_S5

High=No Reboot

3D3V_S0

SMB

SATA

SYS GPIO

Power MGTController Link

GPIO

MISC

RP4

1 2 3 4 5 6

SRN10KJ-L3-GP

PM_BATLOW#_R

3D3V_S5

RSMRST#_KBC28

3 OF 6

SATA0GP/GPIO21 SATA1GP/GPIO19 SATA4GP/GPIO36 SATA5GP/GPIO37

GPIO

Clocks

GPIO10/SUS_PW R_ACK

GPIO14/AC_PRESENT

10 9 8 7

1 2

R201 8K2R2J-3-GPR201 8K2R2J-3-GP

CLK14 CLK48

SUSCLK

SLP_S3# SLP_S4# SLP_S5#

S4_STATE#/GPIO26

PWROK

DPRSLPVR/GPIO16

BATLOW# PWRBTN# LAN_RST#

RSMRST#

CK_PWRGD

CLPWROK

SLP_M#

CL_CLK0 CL_CLK1

CL_DATA0 CL_DATA1

CL_VREF0 CL_VREF1

CL_RST0#

CL_RST1#

MEM_LED/GPIO24

WOL_EN/GPIO9

3D3V_S5

DBRESET# SMB_ALERT# SMB_LINK_ALERT# SUSPWRACK

RN21

4 5

SRN10KJ-6-GP

BAS16-1-GP

83.00016.B11

2ND = 83.00016.K11

3RD = 83.00016.F11

AE19 AA18 AE20 AA20

K1 AB5

R3 D18

B20 D16

E14 D23 M1 C16 U4 D22 D19 U1 T4 B23 C22

A18 E22

B18 F21

A17 C17

B17 A22

E16 A15 D21

3D3V_S5

AC_PRESENT NO_iTPM

PWROK

SATA0GP SATA1GP

PM_SLP_S5# S4_STATE#

PM_DPRSLPVR_1

PM_BATLOW#_R PWRBTN#_ICH

RSMRST#_SB

PM_SLP_M#

CL_VREF0_ICH

ICH_GPIO24 SUSPWRACK AC_PRESENT

ICH_GPIO9

R203

3D3V_S5

DIS_EN 20,41

G_VCORE_PGOOD 39,40,42

TP74

TPAD14-GP

TPAD14-GP TP17

TP17

TPAD14-GP

CLK_PWRGD 3 PWROK 8,32

TP21

TPAD14-GP

CL_CLK0 8

CL_DATA0 8

CL_RST#0 8

TP22

TPAD14-GP

TPAD14-GP TP23

TP23

TPAD14-GP

100KR2J-1-GP

CLK_ICH14 3 CLK48_ICH 3

PM_SLP_S3# 28,32,36,39,40

PM_SLP_S4# 28,32,35,37

PWROK 8,32

R42 100R2J-2-GPR42 100R2J-2-GP R39

R39

1 2

100KR2J-1-GP

BAS16-1-GP

2 3 1

83.00016.B11

2ND = 83.00016.K11

3RD = 83.00016.F11

3D3V_S0

R338

10KR2J-3-GP

R202

R202 100KR2J-1-GP

100KR2J-1-GP

DIS_EN

PLT_RST1# 8,24,25,28,29,42

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

ICH9-M (2 of 4)

JM41_Discrete

1 2

RSMRST#_SB

R46

100KR2J-1-GP

Title

Size Document Number Rev

Date: Sheet of

RN1

RN1 SRN10KJ-5-GP

SRN10KJ-5-GP

PM_DPRSLPVR 8,34

PM_PWRBTN# 28

3D3V_S0

R193

3K24R2F-GP

C488

SCD1U10V2KX-4GP

14 48Thursday, March 05, 2009

R192

R192 453R2F-1-GP

453R2F-1-GP

657mA

D D

*Within a given well, 5VREF needs to be up before the corresponding 3.3V rail

5V_S0

R191

5V_S53D3V_S5

R191 100R2J-2-GP

100R2J-2-GP

R184

R184 100R2J-2-GP

100R2J-2-GP

1D5V_S0

D9 RB751V-40-2-GP

2mA

C C

V5REF_S0

Layout Note: Place near ICH9

2mA

V5REF_S5

B B

RB751V-40-2-GP

83.R2004.B8F

83.R0304.A8F

K A

SCD1U16V2KX-3GP

C491

D8 RB751V-40-2-GP

RB751V-40-2-GP

83.R2004.B8F

83.R0304.A8F

K A

SCD1U16V2KX-3GP

C454

1D5V_S0

C469

SC10U6D3V3MX-GP

RTC_AUX_S5

C496

SCD1U10V2KX-4GP

C468

SC10U6D3V3MX-GP

47mA

1 2

IND-10UH-66-GP

68.1001D.10E

1D5V_S0

SATA+USB=1.56A

C447

SC1U10V2KX-1GP

1D5V_S0

SCD1U10V2KX-4GP

C483

USBPLL=10mA

C427

C456

SCD1U10V2KX-4GP

3D3V_S0

19mA in S0;78mA in S3/S4/S5

C481

C480

A A

SCD1U10V2KX-4GP

1D5V_S0

23mA

C485

SC1U10V3KX-3GP

80mA

C484

SC1U10V2KX-1GP

C446

C484 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

6uA in G3

TC4

ST220U2D5VDM-13GP

1D5V_APLL_S01D5V_S03D3V_S0

C492

SCD1U10V2KX-4GP

C457

SCD1U10V2KX-4GP

C493

SC10U6D3V5MX-3GP

C86

3D3V_S0

V5REF_S0 V5REF_S5

C470

SC1U10V3KX-3GP

C68

SC1U10V3KX-3GP

C65

SC10U6D3V5MX-3GP

C448

C448 SC1U10V2KX-1GP

SC1U10V2KX-1GP

VCCLAN_1D05V_INT_ICH

SCD1U10V2KX-4GP

1mA

G17

K18 K19 L18

L19 M18 M19 N18 N19

P18 R18

T18

T19 U18 U19

W17 U13

V13 W13

U12

V12 W12

W10 U15

V15 W18

V11 U11

G11 H11

G12 H13

H19

K16

G7 U7

J19

G9 H9

J17

J18

SB1F

VCCRTC V5REF V5REF_SUS VCC1_5_B

VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B

VCCSATAPLL VCC1_5_A

VCC1_5_A VCC1_5_A

VCC1_5_A VCC1_5_A VCC1_5_A

VCC1_5_A VCC1_5_A

VCC1_5_A VCC1_5_A VCC1_5_A

VCC1_5_A VCC1_5_A

VCC1_5_A

VCCUSBPLL VCC1_5_A

VCC1_5_A

VCCLAN1_05 VCCLAN1_05

VCCLAN3_3 VCCLAN3_3

VCCGLANPLL VCCGLAN1_5

VCCGLAN1_5

VCCGLAN3_3

ICH9M-1-GP

VCCA3GP ATXARX USB CORE

GLAN POWER

CORE

VCCP_CORE

PCI

VCCSUSHDA VCCSUS1_05

VCCSUS1_05

VCCPSUSVCCPUSB

6 OF 6

VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05

VCCDMIPLL

VCC_DMI VCC_DMI

V_CPU_IO V_CPU_IO

VCC3_3 VCC3_3

VCC3_3 VCC3_3 VCC3_3

VCCHDA

VCCSUS1_5 VCCSUS1_5

VCCSUS3_3 VCCSUS3_3 VCCSUS3_3

VCCSUS3_3 VCCSUS3_3

VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3

VCCCL1_05

VCCCL1_5 VCCCL3_3

VCCCL3_3

L11 L12 L13 L14 L15 M11 M15 N11 N15 P11 P15 R11 R12 R13 R14 R15

P19 T17

U17 V16

U16 V18 AE9

AA9 V14 W14

G8 H7 H8

AD7 V10 T7

H15 H16 V7

G14 G15 H14

W8 J7

J8 K7 K8 L7 L8 M7 M8 N7 N8 P7 P8

G18 H17 J14

K14

C482

SCD1U10V2KX-4GP

Place near ICH9MLayout Note:

1.13A

C474

C462

SCD1U10V2KX-4GP

1D5V_DMIPLL_ICH_S0

C458

C445

SCD1U10V2KX-4GP

VCC3_3=278mA

3D3V_S0

C489

SCD1U10V2KX-4GP

C476

C464

SCD1U10V2KX-4GP

C471

SCD1U10V2KX-4GP

VCCCL1D05V_INT_ICH VCCCL1D5V_INT_ICH

SC39P50V2JN-1GP

C472

3D3V_S0

C460

SCD1U10V2KX-4GP

3D3V_S0

C490

SCD1U10V2KX-4GP

VCCSUSHDA_ICH

C479

C479 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

C452

C452 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

C475

SCD1U10V2KX-4GP

SCD1U16V2KX-3GP

18mA

C467

SC39P50V2JN-1GP

SCD01U16V2KX-3GP

SC4D7U6D3V3KX-GP

3D3V_S0

C441

Vcc Sus 1_05

177mA

C463

C463 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

C494

SC1U10V2KX-1GP

1D05V_S0

C473

SCD1U10V2KX-4GP

C118

C451

SCD1U10V2KX-4GP

32mA

C444

C444 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

32mA

3D3V_S5

C495

SCD1U10V2KX-5GP

C465

SCD1U10V2KX-4GP

50mA

C449

C487

23mA

1 2

C120

C120 SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

1D05V_S0

IND-1D2UH-7-GP

68.1R220.10B

1D05V_S0

68.1R220.10D

1D5V_S0

1mA

C450

SCD1U10V2KX-4GP

C450

SCD1U10V2KX-4GP

C461

SCD1U10V2KX-4GP

SCD1U10V2KX-5GP

Title

Size Document Number Rev

Date: Sheet of

C459

C459 SC1U10V2KX-1GP

SC1U10V2KX-1GP

1D5V_S0

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

ICH9-M (3 of 4)

JM41_Discrete

15 48Monday, March 02, 2009

+ 33 hidden pages