Acer AspireOne 532G Schematics

ZZZ1

ZZZ1

D0DAZ@

D0DAZ@

PCB

PCB

ZZZ3

ZZZ3

LA-6091P

LA-6091P

D0DA@

D0DA@

A

ZZZ4

ZZZ4

LS-6094P

LS-6094P

D0DA@

D0DA@

ZZZ5

ZZZ5

LS-6095P

LS-6095P

D0DA@

D0DA@

B

PJP1

PJP1

45@

45@

DCIN

DCIN

DC301008S00

C

D

E

1 1

ZZZ2

ZZZ2

PCB

PCB

E0DAZ@

E0DAZ@

ZZZ6

ZZZ6

LA-6091P

LA-6091P

E0DA@

E0DA@

ZZZ8

ZZZ8

LS-6096P

LS-6096P

E0DA@

E0DA@

ZZZ7

ZZZ7

LS-6097P

LS-6097P

E0DA@

E0DA@

ZZZ9

ZZZ9

LS-6098P

LS-6098P

E0DA@

E0DA@

ZZZ10

ZZZ10

LS-6099P

LS-6099P

E0DA@

E0DA@

Compal Confidential

2 2

NAVD0 Schematics Document

Intel Pineview Processor with Tigerpoint + DDRII + NV OPTIMUS

3 3

2010-02-09

REV: 1.0

4 4

Security Classifica tion

Security Classifica tion

Security Classifica tion

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOU T PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOU T PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

http://laptop-motherboard-schematic.blogspot.com/

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOU T PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2009/10/09 2010/10/09

2009/10/09 2010/10/09

2009/10/09 2010/10/09

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

B

B

B

Date: Sheet

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

Cover Page

Cover Page

Cover Page

NAVD0 LA-6091P

NAVD0 LA-6091P

NAVD0 LA-6091P

146Wednesday, March 03, 2010

146Wednesday, March 03, 2010

146Wednesday, March 03, 2010

E

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of

of

of

A

B

C

D

E

Compal Confidential

Clock Generator
CK505

page 13

Model Name : NAVD0
File Name : LA-6091P

1 1

Thermal Sensor

EMC1402

2 2

VGA
N11M-OP2

page 8,9,10,11,12

page 5

MINI Card x1
3G

page 24

CRT Conn.

page 15

LCD Conn.

page 14

WLAN

page 25

RGB

LVDS

PCI-Express

10/100 Ethernet

AR8132L

page 23

Pineview
FCBGA 559

DMI
X2 mode
GEN1

Tigerpoint

PCBGA360

22x22mm

page 4,5,6

17x17mm

page 17,18,19,20

LPC BUS

Memory BUS(DDRII)

1.8V DDRII 667

SATA

DDRII-SO-DIMM

USB

HDA

HDD Conn.

page 21

page 7

USB Port X2

page 23

BlueTooth

page 24

CMOS CAM

page 14

3G

page 24

HDMI Conn

3 3

page 16

Transfermer

Audio Codec
ALC272

Power ON/OFF

page 22

DC IN

page 36

BATT IN

page 37

DC/DC Interface

3VALW/5VALW

0.89VP/0.9VSP

page 34

page 39

page 41

1.8V/VCCP

CHARGER

4 4

VGA
DC/DC Interface

page 38

CPU_CORE

page 35

page 40

page 42

VGA_CORE/

1.5VSP

A

page 43

http://laptop-motherboard-schematic.blogspot.com/

B

RJ45

ENE KBC
KB926

Int.KBD

page 32

Touch Pad

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

page 29

page32

C

SPI

SPI ROM

page 31

Compal Secret Data

Compal Secret Data

2009/10/09 2010/10/09

2009/10/09 2010/10/09

2009/10/09 2010/10/09

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

AMP & INT
Speaker

page 29 page 28

D

To Audio Board
INT MIC

page 28

To Audio Board
HeadPhone &
MIC Jack

page 29

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

B

B

B

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

Block Diagrams

Block Diagrams

Block Diagrams

Card Reader
ENE UB6250

page 27

SD/MMC/MS
CONN

NAVD0 LA-6091P

NAVD0 LA-6091P

NAVD0 LA-6091P

E

page 27

246Wednesday, March 03, 2010

246Wednesday, March 03, 2010

246Wednesday, March 03, 2010

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of

A

1 1

B

C

D

E

Voltage Rails

S3S1

DescriptionPower Plane

VIN

B+

+CPU_CORE

+VCCP

+1.5VS

+1.8V

+0.89VS Graphic core power rail

+3VALW

+3VS

+5VALW

2 2

+5VS

+VSB VSB always on power rail ON

+RTCVCC

Note : ON* means that t his power plane is ON only with AC power available, otherwise it is OFF.

STATE

Full ON

S1(Power On Suspend)

S3 (Suspend to RAM)

S4 (Suspend to Disk)

S5 (Soft OFF)

3 3

Adapter power supply (19V)

AC or battery power r ail for power circuit .

Core voltage for CPU

0.9V switched power rail for DDR termina tor+0.9VS

VCCP switched power r ail

1.5V switched power rail

1.8V power rail for DDR

3.3V always on power rail

3.3V switched power rail

5V always on power rail

5V switched power rail

RTC power

SIGNAL

SLP_S3#

SLP_S4#

HIGHHIGHHIGH

HIGH

LOW

LOW LOW

LOWLOW

SLP_S5#

HIGHHIGHHIGH

HIGH

HIGH

LOW

+VALW

ON

ON

ON

ON

ON

N/A N/A N/A

ON

ON OFF

ON

ON

ON

ON

ON

+V +VS Clock

ON

ON

ON

OFF

OFF

S5

N/AN/AN/A

OFFON

OFF

OFFON

OFF

OFFOFFON

OFFOFFON

ON

OFF

OFF

ON ON*

OFF

OFF

ON ON*

OFFON

OFF

ON*

ON

ON

ON

OFF

OFF

OFF

ONON

LOW

OFF

OFF

OFF

BOARD ID Table(Page 31)

NAVD0

NAVE0

VCC

Ra

ID

0

1

2

3

5

6

7

3.3V
100K

BRD ID

R01 (EVT)

R02 (DVT)

R03 (PVT)

R10A (MP)

R01 (EVT)4

R02 (DVT)

R03 (PVT)

R10A (MP)

Rb Vab-Typ

Vab-Min

0

0.216V

8.2K

0.436V

18K
33K
56K

1.036V

1.453V 1.759V

100K
200K

1.935V 2.341V

2.500V

NC

0V

0V

0.250V

0.503V

0.819V

1.185V

1.650V

2.200V

3.3V

Vab-Max

0V

0.289V

0.538V

0.875V0.712V

1.264V

3.3V

External PCI Devices

'(9,&( 5(4*17

,'6(/

No PCI Device

EC SM Bus1 address

Device

Smart Batter y

Address

EC SM Bus2 address

ICH7M SM Bus address

Device

Clock Generator
(SLG8SP556VTR)

DDR DIMMA

Address

1101 001Xb

1010 000Xb

Device

EMC1402

3,54

Address

100_11000001 011X b

4 4

Security Classifica tion

Security Classifica tion

Security Classifica tion

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOU T PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOU T PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

http://laptop-motherboard-schematic.blogspot.com/

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOU T PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2009/10/09 2010/10/09

2009/10/09 2010/10/09

2009/10/09 2010/10/09

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

B

B

B

Date: Sheet

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

Notes List

Notes List

Notes List

NAVD0 LA-6091P

NAVD0 LA-6091P

NAVD0 LA-6091P

346Wednesday, March 03, 2010

346Wednesday, March 03, 2010

346Wednesday, March 03, 2010

E

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1.0

1.0

of

of

of

5

PINEVIEW_M

U71A

U71A

DMI_RX0_R
DMI_RX#0_R
DMI_RX1_R
DMI_RX#1_R

D D

CLK_CPU_EXP#<13>
CLK_CPU_EXP<13>

F3
F2
H4

G3

N7
N6

R10

R9

N10

N9

K2

J1

M4

L3

DMI_RXP_0
DMI_RXN_0
DMI_RXP_1
DMI_RXN_1

EXP_CLKINN
EXP_CLKINP

EXP_TCLKINN
EXP_TCLKINP
RSVD
RSVD

RSVD
RSVD
RSVD
RSVD

PINEVIEW-M_FCBGA8559

PINEVIEW-M_FCBGA8559

PINEVIEW_M

REV = 1.1

REV = 1.1

DMI

DMI

091105 change CPU Part Number to SA00003M870

C435

C435

DMI_RX0<19>

DMI_RX#0<19>

C C

DMI_RX1<19>

DMI_RX#1<19>

C436

C436

C437

C437

C438

C438

1 2

0.1U_0402_10V7K

0.1U_0402_10V7K

1 2

0.1U_0402_10V7K

0.1U_0402_10V7K

1 2

0.1U_0402_10V7K

0.1U_0402_10V7K

1 2

0.1U_0402_10V7K

0.1U_0402_10V7K

Close to CPU

FAN1 Conn

B B

FAN_SPEED1<31>

A A

EXP_RCOMPO

EXP_ICOMPI

DMI_RX0_R

DMI_RX#0_R

DMI_RX1_R

DMI_RX#1_R

+3VS

12

1

2

+5VS

4

DMI_TXP_0
DMI_TXN_0
DMI_TXP_1
DMI_TXN_1

EXP_RBIAS

RSVD_TP
RSVD_TP

RSVD
RSVD
RSVD
RSVD

1 OF 6

1 OF 6

R256

R256
10K_0402_5%

10K_0402_5%

C311

C311
100P_0402_50V8J

100P_0402_50V8J

G2
G1
H3
J2

L10

R162

R162

L9

R203

R203

L8

N11

T38T38

P11

K3
L2
M2
N2

FAN_PWM<31>

1 2

0_0603_5%

0_0603_5%

Must be placed within 500 mils from Pineview-M pins

T39T39

40mil

+VCC_FAN1

091022 change JP12 to ACES_87213_0400G
2010 0105 change JP12 to ACES_85205-04001

0120 Change JP12 BOM structure from ME@ to CONN@

+VCC_FAN1

R817

R817

49.9_0402_1%

49.9_0402_1%
750_0402_1%

750_0402_1%

FAN_PWM

DMI_TX0 <19>
DMI_TX#0 <19>
DMI_TX1 <19>
DMI_TX#1 <19>

1
2
3
4
5
6

ACES_85205-04001

ACES_85205-04001

CONN@

CONN@

3

DDR_A_DQS#[0..7]<7>

DDR_A_D[0..63]<7>

DDR_A_DM[0..7]<7>

DDR_A_DQS[0..7]<7>

DDR_A_MA[0..14]<7>

+1.8V

DDR_A_WE#
DDR_A_CAS#
DDR_A_RAS#

DDR_A_BS0
DDR_A_BS1
DDR_A_BS2

DDR_CS#0
DDR_CS#1

DDR_CKE0
DDR_CKE1

M_ODT0
M_ODT1

M_CLK_DDR0
M_CLK_DDR#0
M_CLK_DDR1
M_CLK_DDR#1

R243

R243
R242

R242

DDR_A_WE#<7>
DDR_A_CAS#<7>
DDR_A_RAS#<7>

DDR_A_BS0<7>
DDR_A_BS1<7>
DDR_A_BS2<7>

DDR_CS#0<7>
DDR_CS#1<7>

DDR_CKE0<7>
DDR_CKE1<7>

M_ODT0<7>
M_ODT1<7>

M_CLK_DDR0<7>

M_CLK_DDR#0<7>

M_CLK_DDR1<7>

M_CLK_DDR#1<7>

+1.8V

12

R50

R50

1K_0402_1%

1K_0402_1%

12

R142

JP12

JP12

1
2
3
4
G5
G6

R142

1K_0402_1%

1K_0402_1%

DDR_A_MA0
DDR_A_MA1
DDR_A_MA2
DDR_A_MA3
DDR_A_MA4
DDR_A_MA5
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA11
DDR_A_MA12
DDR_A_MA13
DDR_A_MA14

+1.8V

R369

R369
10K_0402_5%

10K_0402_5%

R370

R370
10K_0402_5%

10K_0402_5%

@

@

80.6_0402_1%

80.6_0402_1%

80.6_0402_1%

80.6_0402_1%

2

PINEVIEW_M

DDR_A

DDR_A

PINEVIEW_M

REV = 1.1

REV = 1.1

2 OF 6

2 OF 6

DDR_A_DQS_0

DDR_A_DQS#_0

DDR_A_DM_0

DDR_A_DQ_0
DDR_A_DQ_1
DDR_A_DQ_2
DDR_A_DQ_3
DDR_A_DQ_4
DDR_A_DQ_5
DDR_A_DQ_6
DDR_A_DQ_7

DDR_A_DQS_1

DDR_A_DQS#_1

DDR_A_DM_1

DDR_A_DQ_8

DDR_A_DQ_9
DDR_A_DQ_10
DDR_A_DQ_11
DDR_A_DQ_12
DDR_A_DQ_13
DDR_A_DQ_14
DDR_A_DQ_15

DDR_A_DQS_2

DDR_A_DQS#_2

DDR_A_DM_2

DDR_A_DQ_16
DDR_A_DQ_17
DDR_A_DQ_18
DDR_A_DQ_19
DDR_A_DQ_20
DDR_A_DQ_21
DDR_A_DQ_22
DDR_A_DQ_23

DDR_A_DQS_3

DDR_A_DQS#_3

DDR_A_DM_3

DDR_A_DQ_24
DDR_A_DQ_25
DDR_A_DQ_26
DDR_A_DQ_27
DDR_A_DQ_28
DDR_A_DQ_29
DDR_A_DQ_30
DDR_A_DQ_31

DDR_A_DQS_4

DDR_A_DQS#_4

DDR_A_DM_4

DDR_A_DQ_32
DDR_A_DQ_33
DDR_A_DQ_34
DDR_A_DQ_35
DDR_A_DQ_36
DDR_A_DQ_37
DDR_A_DQ_38
DDR_A_DQ_39

DDR_A_DQS_5

DDR_A_DQS#_5

DDR_A_DM_5

DDR_A_DQ_40
DDR_A_DQ_41
DDR_A_DQ_42
DDR_A_DQ_43
DDR_A_DQ_44
DDR_A_DQ_45
DDR_A_DQ_46
DDR_A_DQ_47

DDR_A_DQS_6

DDR_A_DQS#_6

DDR_A_DM_6

DDR_A_DQ_48
DDR_A_DQ_49
DDR_A_DQ_50
DDR_A_DQ_51
DDR_A_DQ_52
DDR_A_DQ_53
DDR_A_DQ_54
DDR_A_DQ_55

DDR_A_DQS_7

DDR_A_DQS#_7

DDR_A_DM_7

DDR_A_DQ_56
DDR_A_DQ_57
DDR_A_DQ_58
DDR_A_DQ_59
DDR_A_DQ_60
DDR_A_DQ_61
DDR_A_DQ_62
DDR_A_DQ_63

U71B

U71B

AH19

DDR_A_MA_0

AJ18

DDR_A_MA_1

AK18

DDR_A_MA_2

AK16

DDR_A_MA_3

AJ14

DDR_A_MA_4

AH14

DDR_A_MA_5

AK14

DDR_A_MA_6

AJ12

DDR_A_MA_7

AH13

DDR_A_MA_8

AK12

DDR_A_MA_9

AK20

DDR_A_MA_10

AH12

DDR_A_MA_11

AJ11

DDR_A_MA_12

AJ24

DDR_A_MA_13

AJ10

DDR_A_MA_14

AK22

DDR_A_WE#

AJ22

DDR_A_CAS#

AK21

DDR_A_RAS#

AJ20

DDR_A_BS_0

AH20

DDR_A_BS_1

AK11

DDR_A_BS_2

AH22

DDR_A_CS#_0

AK25

DDR_A_CS#_1

AJ21

DDR_A_CS#_2

AJ25

DDR_A_CS#_3

AH10

DDR_A_CKE_0

AH9

DDR_A_CKE_1

AK10

DDR_A_CKE_2

AJ8

DDR_A_CKE_3

AK24

DDR_A_ODT_0

AH26

DDR_A_ODT_1

AH24

DDR_A_ODT_2

AK27

DDR_A_ODT_3

AG15

DDR_A_CK_0

AF15

DDR_A_CK_0#

AD13

DDR_A_CK_1

AC13

DDR_A_CK_1#

AC15

DDR_A_CK_3

AD15

DDR_A_CK_3#

AF13

DDR_A_CK_4

AG13

DDR_A_CK_4#

AD17

RSVD

AC17

RSVD

AB15

RSVD

AB17

RSVD

AB4

RSVD

AK8

RSVD

AB11

T40T40
T41T41

AB13

AL28

AK28

AJ26

AK29

RSVD_TP
RSVD_TP

DDR_VREF
DDR_RPD
DDR_RPU

RSVD

PINEVIEW-M_FCBGA8559

PINEVIEW-M_FCBGA8559

1

AD3
AD2
AD4

AC4
AC1
AF4
AG2
AB2
AB3
AE2
AE3

AB8
AD7
AA9

AB6
AB7
AE5
AG5
AA5
AB5
AB9
AD6

AD8
AD10
AE8

AG8
AG7
AF10
AG11
AF7
AF8
AD11
AE10

AK5
AK3
AJ3

AH1
AJ2
AK6
AJ7
AF3
AH2
AL5
AJ6

AG22
AG21
AD19

AE19
AG19
AF22
AD22
AG17
AF19
AE21
AD21

AE26
AG27
AJ27

AE24
AG25
AD25
AD24
AC22
AG24
AD27
AE27

AE30
AF29
AF30

AG31
AG30
AD30
AD29
AJ30
AJ29
AE29
AD28

AB27
AA27
AB26

AA24
AB25
W24
W22
AB24
AB23
AA23
W27

DDR_A_DQS0
DDR_A_DQS#0
DDR_A_DM0

DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7

DDR_A_DQS1
DDR_A_DQS#1
DDR_A_DM1

DDR_A_D8
DDR_A_D9
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15

DDR_A_DQS2
DDR_A_DQS#2
DDR_A_DM2

DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23

DDR_A_DQS3
DDR_A_DQS#3
DDR_A_DM3

DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31

DDR_A_DQS4
DDR_A_DQS#4
DDR_A_DM4

DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39

DDR_A_DQS5
DDR_A_DQS#5
DDR_A_DM5

DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47

DDR_A_DQS6
DDR_A_DQS#6
DDR_A_DM6

DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55

DDR_A_DQS7
DDR_A_DQS#7
DDR_A_DM7

DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63

091105 change CPU Part Number to SA00003M870

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

http://laptop-motherboard-schematic.blogspot.com/

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/10/09 2010/10/09

2009/10/09 2010/10/09

2009/10/09 2010/10/09

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

Pineview(1/3)

Pineview(1/3)

Pineview(1/3)

NAVD0 LA-6091P

NAVD0 LA-6091P

NAVD0 LA-6091P

446Wednesday, March 03, 2010

446Wednesday, March 03, 2010

446Wednesday, March 03, 2010

1

1.0

1.0

1.0

of

of

of

5

PINEVIEW_M

U71C

U71C

D12

T2T2
T12T12
T3T3
T4T4

R1378

R1378

1 2

1K_0402_5%

1K_0402_5%

091211 del T10/T11/T28

T13T13
T5T5
T6T6
T7T7
T14T14

T8T8
T15T15
T9T9
T16T16

T17T17

T37T37

T18T18
T19T19
T20T20
T21T21

T22T22
T23T23
T24T24
T25T25

D D

C C

B B

AA21

W21

C10
D10
B11
B10
B12
C11

AA7
AA6

V21

A7
D6
C5
C7
C6
D8
B7
A9
D9
C8
B8

L11

R5
R6

T21

XDP_RSVD_00
XDP_RSVD_01
XDP_RSVD_02
XDP_RSVD_03
XDP_RSVD_04
XDP_RSVD_05
XDP_RSVD_06
XDP_RSVD_07
XDP_RSVD_08
XDP_RSVD_09
XDP_RSVD_10
XDP_RSVD_11
XDP_RSVD_12
XDP_RSVD_13
XDP_RSVD_14
XDP_RSVD_15
XDP_RSVD_16
XDP_RSVD_17

RSVD

RSVD_TP
RSVD_TP
RSVD_TP
RSVD_TP

RSVD_TP
RSVD_TP
RSVD_TP
RSVD_TP

PINEVIEW-M_FCBGA8559

PINEVIEW-M_FCBGA8559

PINEVIEW_M

REV = 1.1

REV = 1.1

VGA

VGA

PM_EXTTS#_1/DPRSLPVR

MISC

MISC

CRT_HSYNC
CRT_VSYNC

CRT_RED

CRT_GREEN

CRT_BLUE

CRT_IRTN

CRT_DDC_DATA

CRT_DDC_CLK

DAC_IREF

REFCLKINP

REFCLKINN
REFSSCLKINP
REFSSCLKINN

PM_EXTTS#_0

PWROK

RSTIN#

HPL_CLKINN
HPL_CLKINP

3 OF 6

3 OF 6

091105 change CPU Part Number to SA00003M870

H_THERMDA, H_THERMDC routing together.
Trace width / Spacing = 10 / 10 mil

+3VS

1

C80

C80

C79

C79

1 2

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

H_THERMDA

H_THERMDC

2200P_0402_50V7K

2200P_0402_50V7K

5

A A

CPU THERMAL SENSOR

U2

U2

GND

8

7

6

5

EC_SMB_CK2

EC_SMB_DA2

1

VDD

2

DP

3

DN

4

THERM#

EMC1402-1-ACZL-TR MSOP 8P SENSOR

EMC1402-1-ACZL-TR MSOP 8P SENSOR

Address:100_1100

SMCLK

SMDATA

ALERT#

http://laptop-motherboard-schematic.blogspot.com/

4

091202 move R247/R249 from CRT side to CPU side

M30

GMCH_CRT_VSYNC_R

M29

GMCH_CRT_R

N31

GMCH_CRT_G

P30

GMCH_CRT_B

P29
N30

L31
L30

P28

CPU_DREFCLK

Y30

CPU_DREFCLK#

Y29

CPU_SSCDREFCLK

AA30

CPU_SSCDREFCLK#

AA31

PM_EXTTS#1

K29

PM_EXTTS#0

J30

H_PWROK

L5

PLTRST#

AA3

CLK_CPU_HPLCLK#

W8

CLK_CPU_HPLCLK

W9

R249 15_0402_5%OPT@R249 15_0402_5%OPT@

1 2
1 2

R247 15_0402_5%OPT@R247 15_0402_5%OPT@

GMCH_CRT_R <15>
GMCH_CRT_G <15>
GMCH_CRT_B <15>

GMCH_CRT_DATA <15>
GMCH_CRT_CLK <15>

R201 665_0402_1%R201 665_0402_1%

0_0402_5%

0_0402_5%

R200

R200

PM_EXTTS#0 <7>

PLTRST# <8,19,24,25,26,31>

CPU_DREFCLK <13>
CPU_DREFCLK# <13>
CPU_SSCDREFCLK <13>
CPU_SSCDREFCLK# <13>

CLK_CPU_HPLCLK# <13>
CLK_CPU_HPLCLK <13>

Modify 08/04

H_A20M#

H_INTR

H_NMI

H_IGNNE#

H_STPCLK#

H_DPSLP#

H_IN IT#

H_PWRGD

H_DPRSTP#

091212 Add C5, C6, C7, C9, C11, C12, C13, C14
to prevent switch noise

C5 470P_0402_50V8JC5 470P_0402_50V8J

1 2

C6 470P_0402_50V8JC6 470P_0402_50V8J

1 2

C7 470P_0402_50V8JC7 470P_0402_50V8J

1 2

C9 470P_0402_50V8JC9 470P_0402_50V8J

1 2

C11 470P_0402_50V8JC11 470P_0402_50V8J

1 2

C12 470P_0402_50V8JC12 470P_0402_50V8J

1 2

C13 470P_0402_50V8JC13 470P_0402_50V8J

1 2

C14 470P_0402_50V8JC14 470P_0402_50V8J

1 2

C66 470P_0402_50V8JC66 470P_0402_50V8J

1 2

XDP Reserve

XDP_TDI

XDP_TMS

XDP_TDO

XDP_PREQ#

XDP_TRST#

XDP_TCK

R58

R58

12

10K_0402_5%

10K_0402_5%

4

R341 51 +-1% 0402R341 51 +-1% 0402

1 2

R342 51 +-1% 0402R342 51 +-1% 0402

1 2

R343 51 +-1% 0402R343 51 +-1% 0402

1 2

R344 51 +-1% 0402R344 51 +-1% 0402

1 2

R345 51 +-1% 0402R345 51 +-1% 0402

1 2

R346 51 +-1% 0402R346 51 +-1% 0402

1 2

EC_SMB_CK2 <8,9,31>

EC_SMB_DA2 <8,9,31>

+3VS

3

U71D

U71D

GMCH_LVDS_ACLK#<14>

GMCH_LVDS_ACLK<14>
GMCH_CRT_HSYNC <15>
GMCH_CRT_VSYNC <15>

H_PWROK

PM_DPRSLPVR <19>

091216 change value
to 470P

+VCCP

GMCH_LVDS_SCL<14>
GMCH_LVDS_SDA<14>

R305 0_0402_5%@R305 0_0402_5%@

1 2

R306 0_0402_5%R306 0_0402_5%

1 2

091214 Remove T77
T55 test point
for layout limitation

GMCH_LVDS_A0#<14>
GMCH_LVDS_A0<14>
GMCH_LVDS_A1#<14>
GMCH_LVDS_A1<14>
GMCH_LVDS_A2#<14>
GMCH_LVDS_A2<14>

2.37K_0402_1%

2.37K_0402_1%

+3VS

T53T53
T52T52
T54T54
T57T57
T58T58

12

R143

R143
10K_0402_5%

10K_0402_5%

GMCH_ENBKL

R213 0_0402_5%

R213 0_0402_5%

H_THERMDA
H_THERMDC

R307

R307

1 2

150_0402_1%

150_0402_1%
R308

R308

1 2

150_0402_1%

150_0402_1%
R309

R309

1 2

150_0402_1%

150_0402_1%
R34

R34

100K_0402_5%

100K_0402_5%

GMCH_ENBKL<31>

INVT_PWM<14,31>

GMCH_ENVDD<14>

Place closed to chipset

GMCH_CRT_R

GMCH_CRT_G

GMCH_CRT_B

GMCH_ENBKL

PM_EXTTS#0

R151

R151

VGATE <13,19,31,42>

PCH_POK <19,31>

T74T74
T75T75
T76T76

T48T48
T49T49
T50T50
T51T51

XDP_TDI
XDP_TDO
XDP_TCK

XDP_TMS
XDP_TRST#

Close to Processor
pin

Security Classification

Security Classification

Security Classification

2009/10/09 2010/10/09

2009/10/09 2010/10/09

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAI NS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAI NS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAI NS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/10/09 2010/10/09

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

U25

LA_CLKN

U26

LA_CLKP

R23

LA_DATAN_0

R24

LA_DATAP_0

N26

LA_DATAN_1

N27

LA_DATAP_1

R26

LA_DATAN_2

R27

LA_DATAP_2

LIBG

R22

LIBG

J28

LVBG

N22

LVREFH

N23

LVREFL

L27

@

@

LBKLT_EN

L26

LBKLT_CTL

L23

LCTLA_CLK

K25

LCTLB_DATA

K23

LDDC_CLK

K24

LDDC_DATA

H26

LVDD_EN

G11

BPM_1_0#

E15

BPM_1_1#

G13

BPM_1_2#

F13

BPM_1_3#

B18

BPM_2_0#/RSVD

B20

BPM_2_1#/RSVD

C20

BPM_2_2#/RSVD

B21

BPM_2_3#/RSVD

G5

RSVD

D14

TDI

D13

TDO

B14

TCK

C14

TMS

C16

TRST#

D30

THRMDA_1

E30

THRMDC_1

C30

THRMDA_2/RSVD

D31

THRMDC_2/RSVD

H_PROCHOT#

PINEVIEW-M_FCBGA8559

PINEVIEW-M_FCBGA8559

Close to Processor
pin

2

091105 change CPU Part Number to SA00003M870

+VCCP

R202

R202
68_0402_5%

68_0402_5%

2

PINEVIEW_M

PINEVIEW_M

REV = 1.1

REV = 1.1

ICH

ICH

LVDS

LVDS

CPUPWRGOOD

CPU

CPU

4 OF 6

4 OF 6

H_GTLREF

1

C939

2

@ C939

@

1U_0603_10V6K

1U_0603_10V6K

placed within 0.5"
of processor pin.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

B

B

B

Date: Sheet

Date: Sheet

Date: Sheet

SMI#

A20M#

FERR#

LINT0
LINT1

IGNNE#

STPCLK#

DPRSTP#

DPSLP#

INIT#
PRDY#
PREQ#

THERMTRIP#

PROCHOT#

GTLREF

VSS

RSVD
RSVD

BCLKN
BCLKP

BSEL_0
BSEL_1
BSEL_2

VID_0
VID_1
VID_2
VID_3
VID_4
VID_5
VID_6

RSVD
RSVD
RSVD
RSVD

RSVD_TP
RSVD_TP

EXTBGREF

+VCCP

R144

R144
1K_0402_1%

1K_0402_1%

R155

R155
2K_0402_1%

2K_0402_1%

Add 470PF on
H_SMI# for known issue 07/08

C1171 470P_0402_50V7KC1171 470P_0402_50V7K

H_SMI#

E7

H_A20M#

H7

H_FERR#GMCH_CRT_HSYNC_R

H6

H_INTR

F10

H_NMI

F11

H_IGNNE#

E5

H_STPCLK#

F8

G6
G10
G8
E11
F15

H_THERMTRIP#

E13

H_PROCHOT#

C18

H_PWRGD

W1

H_GTLREF

A13
H27

L6
E17

H10
J10

CPU_BSEL0

K5

CPU_BSEL1

H5

CPU_BSEL2

K6

CPU_VID0

H30

CPU_VID1

H29

CPU_VID2

H28

CPU_VID3

G30

CPU_VID4

G29

CPU_VID5

F29

CPU_VID6

E29

L7
D20
H13
D18

K9
D19
K7

1

1 2

H_DPRSTP#
H_DPSLP#

H_IN IT#
XDP_PRDY#
XDP_PREQ#

CLK_CPU_BCLK#
CLK_CPU_BCLK

T26T26
T27T27

H_EXTBGREF

H_EXTBGREF

H_SMI# <18>
H_A20M# <18>
H_FERR# <18>
H_INTR <18>
H_NMI <18>
H_IGNNE# <18>
H_STPCLK# <18>

H_DPRSTP# <19>
H_DPSLP# <19>

H_INIT# <18>

T78T78
T79T79

H_THERMTRIP# <18>

H_PWRGD <19>

T63T63

CPU_BSEL0 <13>
CPU_BSEL1 <13>
CPU_BSEL2 <13>

CPU_VID0 <42>
CPU_VID1 <42>
CPU_VID2 <42>
CPU_VID3 <42>
CPU_VID4 <42>
CPU_VID5 <42>
CPU_VID6 <42>

1

C940

C940

@

@

2

1U_0402_6.3V6K

1U_0402_6.3V6K

CLK_CPU_BCLK# <13>
CLK_CPU_BCLK <13>

+VCCP

placed within 0.5"
of processor pin.

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Pineview(2/3)

Pineview(2/3)

Pineview(2/3)

NAVD0 LA-6091P

NAVD0 LA-6091P

NAVD0 LA-6091P

546Wednesday, March 03, 2010

546Wednesday, March 03, 2010

546Wednesday, March 03, 2010

1

R244

R244
976_0402_1%

976_0402_1%

R156

R156

3.3K_0402_1%

3.3K_0402_1%

of

of

of

1.0

1.0

1.0

5

U71E

W14
W16
W18
W19

U71E

T13

VCCGFX

T14

VCCGFX

T16

VCCGFX

T18

VCCGFX

T19

VCCGFX

V13

VCCGFX

V19

VCCGFX
VCCGFX
VCCGFX
VCCGFX
VCCGFX

GFX/MCH

GFX/MCH

PINEVIEW_M

PINEVIEW_M

REV = 1.1

REV = 1.1

GFX supply current: 1.38A
Sustained GFX supply current: 1.05A

D D

+0.89VS

DDR supply current 2.27A

+1.8V

2.2U_0603_10V6K

2.2U_0603_10V6K

2

1

+1.8V

2.2U_0603_10V6K

1

+VCCP

2

22U_0805_6.3V6M

22U_0805_6.3V6M

R321 0_0402_5%R321 0_0402_5%

+VCCP

2.2U_0603_10V6K

2.2U_0603_10V6K

2.2U_0603_10V6K

C C

C267

C267

Display PLL SFR and CRT DAC supply
current: 0.154A

B B

+1.8VS

DAC, GIO, LVDS, & LGIO, DPLL, HMPLL
supply current: 0.33A

A A

Modify to 2.2U 05/11

2.2U_0603_10V6K

C188

C188

2

C187

C187

1

2.2U_0603_10V6K

2

2

C186

C186

1

1

2.2U_0603_10V6K

2.2U_0603_10V6K

C85

C85

AK13
AK19

DDR analog supply current: 1.32A

1

1

C243

C243

C55

C55

2

22U_0805_6.3V6M

22U_0805_6.3V6M

1

C192

C192

2

1U_0402_6.3V6K

1U_0402_6.3V6K

+3VS

GIO supply current: 0.006A

+RING_EAST
+RING_WE ST

+0.89VS

1

2

C74

C74

C81

C81

2

1

2

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

C189

C189

1U_0402_6.3V6K

1U_0402_6.3V6K

1

C71

C71

2

1U_0402_6.3V6K

1U_0402_6.3V6K

1

C236

C236

2

1U_0402_6.3V6K

1U_0402_6.3V6K

+VCCSFR_AB_DPL

1

2

+VCC_CRT_DAC

1

1

C70

C70

C76

C76

2

2

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

AA10
AA11

AA19

AC31

1

C75

C75

2

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

Close Chipset pin

5

VCCSM
VCCSM

AK9

VCCSM

AL11

VCCSM

AL16

VCCSM

AL21

VCCSM

AL25

VCCSM

AK7

VCCCK_DDR

AL7

VCCCK_DDR

U10

VCCA_DDR

U5

W10
W11

U6
U7
U8
U9
V2
V3
V4

V11

T30

T31
J31

C3
B2
C2

A21

VCCA_DDR
VCCA_DDR
VCCA_DDR
VCCA_DDR
VCCA_DDR
VCCA_DDR
VCCA_DDR
VCCA_DDR
VCCA_DDR
VCCA_DDR

VCCACK_DDR
VCCACK_DDR

VCCD_AB_DPL

VCCD_HMPLL

VCCSFR_AB_DPL

VCCACRTDAC

VCC_GIO
VCCRING_EAST
VCCRING_WEST
VCCRING_WEST
VCCRING_WEST
VCC_LGI

PINEVIEW-M_FCBGA8559

PINEVIEW-M_FCBGA8559

5 OF 6

5 OF 6

DDR

DDR

EXP\CRT\PLL

EXP\CRT\PLL

091105 change CPU Part Number to SA00003M870

1

1

C78

C78

C77

C77

2

2

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

4

1U_0402_6.3V6K

A23

VCC

A25

VCC

A27

VCC

B23

VCC

B24

VCC

B25

VCC

B26

VCC

B27

VCC

C24

VCC

C26

VCC

D23

VCC

D24

VCC

D26

VCC

D28

VCC

E22

VCC

E24

VCC

E27

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

VCCSENSE
VSSSENSE

VCCA

VCCP

VCCP
VCCP

VCCALVDS
VCCDLVDS

VCCA_DMI
VCCA_DMI
VCCA_DMI

RSVD

VCCP

100_0402_1%

100_0402_1%

R31

R31

F21
F22
F25
G19
G21
G24
H17
H19
H22
H24
J17
J19
J21
J22
K15
K17
K21
L14
L16
L19
L21
N14
N16
N19
N21

C29
B29
Y2

D4

B4
B3

V30
W31

T1
T2
T3

P2
AA1

E2

CPU

CPU

POWER

POWER

LVDS

LVDS

DMI

DMI

VCCSFR_DMIHMPLL

R32

VCCSENSE

VSSSENSE

http://laptop-motherboard-schematic.blogspot.com/

R32

1 2

1 2

100_0402_1%

100_0402_1%

4

1U_0402_6.3V6K

VCCSENSE
VSSSENSE

+VCCP

Processor Core analog supply current: 0.08A

+VCC_ALVD
+VCC_DLVD

LVDS supply current: 0.06A

+VCC_DMI

+DMI_HMPLL

1

C1162

C1162

0.1U_0402_10V6K

0.1U_0402_10V6K

2

+CPU_CORE

1U_0402_6.3V6K

1U_0402_6.3V6K

1

1

C428

C428

2

1U_0402_6.3V6K

1U_0402_6.3V6K

1

C430

C430

C429

C429

2

2

PLACE IN CAVITY

VCCSENSE <42>
VSSSENSE <42>

+1.5VS

1

C391

C391

0.01U_0402_16V7K

0.01U_0402_16V7K

2

DMI analog supply current: 0.48A

T56T56

SFR & DMIHMPLL supply current: 0.104A

+VCCP

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

22U_0805_6.3V6M

22U_0805_6.3V6M

1

1

C431

C431

2

2

1U_0402_6.3V6K

1U_0402_6.3V6K

3

+CPU_CORE

1

1

C1152

C1152

C1153

C1154

C1154

C1153
22U_0805_6.3V6M

22U_0805_6.3V6M

2

2

22U_0805_6.3V6M

22U_0805_6.3V6M

+VCCP

C1160

C1160

0.1U_0402_10V6K

0.1U_0402_10V6K

R20 0_0402_5%R20 0_0402_5%

R21 0_0402_5%R21 0_0402_5%

1U_0402_6.3V6K

1U_0402_6.3V6K

R28 0_0603_5%R28 0_0603_5%

1U_0402_6.3V6K

1U_0402_6.3V6K

+1.8VS

R25

R25

1 2

MBK1608601YZF_2P

MBK1608601YZF_2P

R18

R18

1 2

0.1UH +-10% MLF1608DR10KT

0.1UH +-10% MLF1608DR10KT

2009/10/09 2010/10/09

2009/10/09 2010/10/09

2009/10/09 2010/10/09

+CPU_CORE

330U 2.5V Y

330U 2.5V Y

1

1

0.1U_0402_10V6K

0.1U_0402_10V6K

2

2

1

C242

C242
1U_0402_6.3V6K

1U_0402_6.3V6K

2

1

C64

C64

2

12

1

C68

C68

2

+VCC_CRT_DAC

1

C239

C239
1U_0402_6.3V6K

1U_0402_6.3V6K

2

1

C69

C69
1U_0402_6.3V6K

1U_0402_6.3V6K

2

+VCC_ALVD

1

C56

C56

2

22U_0805_6.3V6M

22U_0805_6.3V6M

1

C235

C235
1U_0402_6.3V6K

1U_0402_6.3V6K

2

Deciphered Date

Deciphered Date

Deciphered Date

+DMI_HMPLL

+VCC_DLVD

0_0402_5%

0_0402_5%

R26

R26

R27

R27

0_0402_5%

0_0402_5%

Compal Secret Data

Compal Secret Data

Compal Secret Data

1

+

+

2

C1161

C1161

Close U71.D4

1

2

2

1

+

+

C275

C275

C1155

C1155
1U_0402_6.3V6K

1U_0402_6.3V6K

330U 2.5V Y

330U 2.5V Y

2

+RING_EAST

+RING_WE ST

1

C241

C241
1U_0402_6.3V6K

1U_0402_6.3V6K

2

+VCC_DMI

1

C237

C237
1U_0402_6.3V6K

1U_0402_6.3V6K

2

C278

C278

Follow Intel check list change to 22uF 06/06

2

1

PINEVIEW_M

PINEVIEW_M

U71F

U71F

REV = 1.1

REV = 1.1

AA13
AA14
AA16
AA18

AA2
AA22
AA25
AA26
AA29

AA8
AB19
AB21
AB28
AB29
AB30
AC10
AC11
AC19

AC2
AC21
AC28
AC30
AD26

AD5

AE1
AE11
AE13
AE15
AE17
AE22
AE31
AF11
AF17
AF21
AF24
AF28
AG10

AG3
AH18
AH23
AH28

AH4

AH6

AH8

AJ16
AJ31

AK1

AK2
AK23
AK30
AK31

AL13
AL19

AL23
AL29

AL30

C12

C21

C22

C25

C31

D22

A11
A16
A19
A29

A3

A30

A4

AJ1

AL2

AL3

AL9
B13
B16
B19
B22
B30
B31

B5
B9

C1

E1
E10
E19
E21
E25

E8
F17
F19

VSS
VSS
VSS
RSVD_NCTF
RSVD_NCTF
RSVD_NCTF
RSVD_NCTF
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
RSVD_NCTF
VSS
RSVD_NCTF
RSVD_NCTF
RSVD_NCTF
VSS
RSVD_NCTF
RSVD_NCTF
VSS
VSS
RSVD_NCTF
VSS
RSVD_NCTF
RSVD_NCTF
RSVD_NCTF
VSS
VSS
VSS
VSS
VSS
RSVD_NCTF
RSVD_NCTF
VSS
VSS
RSVD_NCTF
VSS
VSS
VSS
VSS
RSVD_NCTF
VSS
RSVD_NCTF
VSS
VSS
VSS
VSS
VSS
VSS
VSS

6 OF 6

6 OF 6

PINEVIEW-M_FCBGA8559

PINEVIEW-M_FCBGA8559

GND

GND

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSS

F24
F28
F4
G15
G17
G22
G27
G31
H11
H15
H2
H21
H25
H8
J11
J13
J15
J4
K11
K13
K19
K26
K27
K28
K30
K4
K8
L1
L13
L18
L22
L24
L25
L29
M28
M3
N1
N13
N18
N24
N25
N28
N4
N5
N8
P13
P14
P16
P18
P19
P21
P3
P4
R25
R7
R8
T11
U22
U23
U24
U27
V14
V16
V18
V28
V29
W13
W2
W23
W25
W26
W28
W30
W4
W5
W6
W7
Y28
Y3
Y4

T29

091105 change CPU Part Number to SA00003M870

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

Pineview(3/3)

Pineview(3/3)

Pineview(3/3)

NAVD0 LA-6091P

NAVD0 LA-6091P

NAVD0 LA-6091P

1

646Wednesday, March 03, 2010

646Wednesday, March 03, 2010

646Wednesday, March 03, 2010

of

of

of

1.0

1.0

1.0

5

DDR_A_DQS#[0..7]<4>

DDR_A_D[0..63]<4>

DDR_A_DM[0..7]<4>

DDR_A_DQS[0..7]<4>

DDR_A_M A[0..14]<4>

D D

+1.8V

2

C128

C128

C129

C129

1

2.2U_0603_6.3V4Z

2.2U_0603_6.3V4Z

1

1

+

+

@

@

C94

C94

C106

C106

2

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

220U_B2_2.5VM_R35

220U_B2_2.5VM_R35

C C

Layout Note:
Place one cap close to every 2 pullup
resistors terminated to +0.9VS

+0.9VS

1

1

1

C117

C117

C119

C119

2

B B

A A

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

DDR_A_MA13
M_ODT0
DDR_CS#0

DDR_A_BS0
DDR_A_MA10
DDR_A_MA3
DDR_A_MA5

M_ODT1
DDR_CS#1
DDR_A_CAS#
DDR_A_WE#

0.1U_0402_16V4Z

0.1U_0402_16V4Z

47_0804_8P4R_5%

47_0804_8P4R_5%

47_0804_8P4R_5%

47_0804_8P4R_5%

47_0804_8P4R_5%

47_0804_8P4R_5%

C86

C86

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

RP6

RP6

1 8
2 7
3 6
4 5

RP2

RP2

1 8
2 7
3 6
4 5

RP3

RP3

1 8
2 7
3 6
4 5

C121

C121

1

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

+0.9VS

C87

C87

0.1U_0402_16V4Z

0.1U_0402_16V4Z

47_0804_8P4R_5%

47_0804_8P4R_5%

47_0804_8P4R_5%

47_0804_8P4R_5%

2

C110

C110

1

2.2U_0603_6.3V4Z

2.2U_0603_6.3V4Z

2.2U_0603_6.3V4Z

2.2U_0603_6.3V4Z

1

C105

C105

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

1

C88

C88

C122

C122

2

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

RP5

RP5

18
27
36
45

RP4

RP4

18
27
36
45

RP1

RP1

18
27
36
45

47_0804_8P4R_5%

47_0804_8P4R_5%

2

C109

C109

1

2.2U_0603_6.3V4Z

2.2U_0603_6.3V4Z

1

C108

C108

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C115

C115

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

DDR_A_BS1

DDR_A_MA0
DDR_A_MA2

DDR_A_MA4DDR_A_RAS#

DDR_A_MA6
DDR_A_MA7
DDR_A_MA11

DDR_A_MA14

DDR_A_MA12

DDR_A_MA9
DDR_A_MA8
DDR_A_MA1

2

C130

C130

1

1

C107

C107

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C91

C91

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

Layout Note:
Place near JDIM1

2

1

2.2U_0603_6.3V4Z

2.2U_0603_6.3V4Z

1

1

C90

C90

C120

C120

2

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

091204 swap nets for layout

4

1

1

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

Layout Note:
Place these resistor
closely DIMMA,all
trace length<750 mil

1

C89

C89

C118

C118

2

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

3

09/03

+DIMM_VREF

+1.8V

12

R61

R61

1K_0402_1%

1K_0402_1%

+DIMM_VREF

12

R62

R62

1K_0402_1%

1K_0402_1%

1

C439

C439

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

1

C440

C440

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C441

C441

C442

C442

2

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

Share +DIMM_VREF for

1.DDRII VREF

2.GMCH SM_VREF_0
SM_VREF_1

1

1

C445

C443

C443

+3VS

0.1U_0402_16V4Z

0.1U_0402_16V4Z

C445

C444

C444

2

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C116

C116

2

1

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

1

1

C446

C446

2

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C141

C141

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

20mils

1

C112

C112

2.2U 6.3V M X5R 0402

2.2U 6.3V M X5R 0402

2

DDR_CKE0<4>

DDR_A_BS2<4>

DDR_A_BS0<4>
DDR_A_WE#<4>

DDR_A_CAS#<4>

DDR_CS#1<4>

M_ODT1<4>

CLK_SMBDATA<13,24>

CLK_SMBCLK<13,24>

Follow Intel Layout checklist, add C141 05/12

0.1U_0402_16V4Z

0.1U_0402_16V4Z

C111

C111

DDR_A_D0
DDR_A_D1

DDR_A_DQS#0
DDR_A_DQS0

DDR_A_D2
DDR_A_D3

DDR_A_D8
DDR_A_D9

DDR_A_DQS#1
DDR_A_DQS1

DDR_A_D10
DDR_A_D11

DDR_A_D16
DDR_A_D17

DDR_A_DQS#2
DDR_A_DQS2

DDR_A_D18
DDR_A_D19

DDR_A_D24
DDR_A_D25

DDR_A_DM3

DDR_A_D26
DDR_A_D27

DDR_CKE0

DDR_A_BS2

DDR_A_MA12
DDR_A_MA9
DDR_A_MA8

DDR_A_MA5
DDR_A_MA3
DDR_A_MA1

DDR_A_MA10
DDR_A_BS0
DDR_A_WE#

DDR_A_CAS#
DDR_CS#1

M_ODT1

DDR_A_D32
DDR_A_D33

DDR_A_DQS#4
DDR_A_DQS4

DDR_A_D34
DDR_A_D35

DDR_A_D40
DDR_A_D41

DDR_A_DM5

DDR_A_D42
DDR_A_D43

DDR_A_D48
DDR_A_D49

DDR_A_DQS#6
DDR_A_DQS6

DDR_A_D50
DDR_A_D51

DDR_A_D56
DDR_A_D57

DDR_A_DM7

DDR_A_D58
DDR_A_D59

CLK_SMBDATA
CLK_SMBCLK

2

+1.8V +1.8V

JDIM1

JDIM1

1

VREF

3

VSS

5

DQ0

7

DQ1

9

VSS

11

DQS0#

13

DQS0

15

VSS

17

DQ2

19

DQ3

21

VSS

23

DQ8

25

DQ9

27

VSS

29

DQS1#

31

DQS1

33

VSS

35

DQ10

37

DQ11

39

VSS

41

VSS

43

DQ16

45

DQ17

47

VSS

49

DQS2#

51

DQS2

53

VSS

55

DQ18

57

DQ19

59

VSS

61

DQ24

63

DQ25

65

VSS

67

DM3

69

NC

71

VSS

73

DQ26

75

DQ27

77

VSS

79

CKE0

81

VDD

83

NC

85

BA2

87

VDD

89

A12

91

A9

93

A8

95

VDD

97

A5

99

A3

101

A1

103

VDD

105

A10/AP

107

BA0

109

WE#

111

VDD

113

CAS#

115

NC/S1#

117

VDD

119

NC/ODT1

121

VSS

123

DQ32

125

DQ33

127

VSS

129

DQS4#

131

DQS4

133

VSS

135

DQ34

137

DQ35

139

VSS

141

DQ40

143

DQ41

145

VSS

147

DM5

149

VSS

151

DQ42

153

DQ43

155

VSS

157

DQ48

159

DQ49

161

VSS

163

NC,TEST

165

VSS

167

DQS6#

169

DQS6

171

VSS

173

DQ50

175

DQ51

177

VSS

179

DQ56

181

DQ57

183

VSS

185

DM7

187

VSS

189

DQ58

191

DQ59

193

VSS

195

SDA

197

SCL

199

VDDSPD

FOX_ASOA426-M2RN-7F

FOX_ASOA426-M2RN-7F

CONN@

CONN@

VSS
DQ4
DQ5
VSS
DM0
VSS
DQ6
DQ7

VSS
DQ12
DQ13

VSS

DM1

VSS

CK0
CK0#

VSS
DQ14
DQ15

VSS

VSS
DQ20
DQ21

VSS

DM2

VSS
DQ22
DQ23

VSS
DQ28
DQ29

VSS

DQS3#

DQS3

VSS
DQ30
DQ31

VSS

NC/CKE1

VDD

NC/A15
NC/A14

VDD

VDD

VDD

BA1

RAS#

VDD

ODT0

NC/A13

VDD

VSS
DQ36
DQ37

VSS

DM4

VSS
DQ38
DQ39

VSS
DQ44
DQ45

VSS

DQS5#

DQS5

VSS
DQ46
DQ47

VSS
DQ52
DQ53

VSS

CK1
CK1#

VSS

DM6

VSS
DQ54
DQ55

VSS
DQ60
DQ61

VSS

DQS7#

DQS7

VSS
DQ62
DQ63

VSS

SA0

SA1

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40

42
44
46
48
50

NC

52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90

A11

92

A7

94

A6

96
98

A4

100

A2

102

A0

104
106
108
110

S0#

112
114
116
118
120

NC

122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200

DIMMA

1

091029 change JDIM1 to FOX_AS OA426-M2RN-7F
follow SJV03_MB_Conn_List_1029_Rev10(BTB)

DDR_A_D4
DDR_A_D5

DDR_A_DM0

DDR_A_D6
DDR_A_D7

DDR_A_D12
DDR_A_D13

DDR_A_DM1

M_CLK_DDR0
M_CLK_DDR#0

DDR_A_D14
DDR_A_D15

DDR_A_D20
DDR_A_D21

DDR_A_DM2

DDR_A_D22
DDR_A_D23

DDR_A_D28
DDR_A_D29

DDR_A_DQS#3
DDR_A_DQS3

DDR_A_D30
DDR_A_D31

DDR_CKE1

DDR_A_MA14

DDR_A_MA11
DDR_A_MA7
DDR_A_MA6

DDR_A_MA4
DDR_A_MA2
DDR_A_MA0

DDR_A_BS1
DDR_A_RAS#
DDR_CS#0

M_ODT0
DDR_A_MA13

DDR_A_D36
DDR_A_D37

DDR_A_DM4

DDR_A_D38
DDR_A_D39

DDR_A_D44
DDR_A_D45

DDR_A_DQS#5
DDR_A_DQS5

DDR_A_D46
DDR_A_D47

DDR_A_D52
DDR_A_D53

M_CLK_DDR1
M_CLK_DDR#1

DDR_A_DM6

DDR_A_D54
DDR_A_D55

DDR_A_D60
DDR_A_D61

DDR_A_DQS#7
DDR_A_DQS7

DDR_A_D62
DDR_A_D63

R66 10K_0402_5%R66 10K_0402_5%

1 2

R65 10K_0402_5%R65 10K_0402_5%

1 2

R64

R64

M_CLK_DDR0 <4>
M_CLK_DDR#0 <4>

1 2

DDR_CKE1 <4>

DDR_A_BS1 <4>
DDR_A_RAS# <4>
DDR_CS#0 <4>

M_ODT0 <4>

M_CLK_DDR1 <4>
M_CLK_DDR#1 <4>

0_0402_5%

0_0402_5%

PM_EXTTS#0 <5>

DDR_CKE1

DDR_A_BS2

DDR_CKE0

R163

R163

1 2

47_0402_5%

47_0402_5%
R60

R60

1 2

47_0402_5%

47_0402_5%
R59

R59

1 2

47_0402_5%

47_0402_5%

Layout Note:
Place these resistor
closely DIMMA,all
trace length
Max=1.3"

5

http://laptop-motherboard-schematic.blogspot.com/

4

Security Classifica tion

Security Classifica tion

Security Classifica tion

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOU T PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOU T PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOU T PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/10/09 2010/10/09

2009/10/09 2010/10/09

2009/10/09 2010/10/09

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

B

B

B

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

DDRII-SODIMMA

DDRII-SODIMMA

DDRII-SODIMMA

NAVD0 LA-6091P

NAVD0 LA-6091P

NAVD0 LA-6091P

746Wednesday, March 03, 2010

746Wednesday, March 03, 2010

746Wednesday, March 03, 2010

1

of

of

of

1.0

1.0

1.0

5

PCIE_CTX_GRX_P0<19>
PCIE_CTX_GRX_N0<19>

PCIE_CTX_GRX_P0
PCIE_CTX_GRX_N0

DIS ONLY

VDD33

(+3VSDGPU)

PEX_VDD

(+1.05VSDGPU)

D D

NVVDD

(VGA_CORE)

IFPAB_IOVDD
(+1.8VSDGPU)

FBVDDQ

(+1.5VSDGPU)

PCIE_CRX_GTX_P0<19>
PCIE_CRX_GTX_N0<19>

C C

B B

A A

DGPU_HOLD_RST#

PEX_VDD can
ramp up any time

DIS@

PCIE_CRX_GTX_P0
PCIE_CRX_GTX_N0

PEG_CLKREQ#<13>

PLTRST#<5,19,24,25,26,31>

DGPU_HOLD_RST#<31>

PLTRST# PLTRST_VGA#

C35 100P_0402_50V8J

C35 100P_0402_50V8J

1 2

OPT@

091212 Add C35 near U87
to prevent switch noise

OPT@

5

0.1U_0402_16V7K

0.1U_0402_16V7K

C736

1 2

C735

1 2

0.1U_0402_16V7K

0.1U_0402_16V7K

CLK_PCIE_VGA<13>

CLK_PCIE_VGA#<13>

PLTRST_VGA#

NC7SZ08P5X_NL_SC70-5

NC7SZ08P5X_NL_SC70-5

DIS@

DIS@

1 2

R1526 0_0402_5%

R1526 0_0402_5%

VGA@C736

VGA@
VGA@C735

VGA@

+3VSDGPU

PEG_CLKREQ#

U87

U87

2

1

OPT@

OPT@

PCIE_CRX_C_GTX_P0
PCIE_CRX_C_GTX_N0

CLK_PCIE_VGA
CLK_PCIE_VGA#

1 2

R694 200_0402_5% @R694 200_0402_5%@

1 2

R695 2.49K_0402_1% VGA@R695 2.49K_0402_1% VGA@

VGA@

VGA@

10K_0402_5%

10K_0402_5%

1 2

R696

R696

+3VS

5

P

B

4

Y

A

12

G

R1490

3

R1490
100K_0402_5%

100K_0402_5%

VGA@

VGA@

4

U30A

U30A

AE12
AF12
AG12
AG13
AF13
AE13
AE15
AF15
AG15
AG16
AF16
AE16
AE18
AF18
AG18
AG19
AF19
AE19
AE21
AF21
AG21
AG22
AF22
AE22
AE24
AF24
AG24
AF25
AG25
AG26
AF27
AE27

AD10
AD11
AD12
AC12
AB11
AB12
AD13
AD14
AD15
AC15
AB14
AB15
AC16
AD16
AD17
AD18
AC18
AB18
AB19
AB20
AD19
AD20
AD21
AC21
AB21
AB22
AC22
AD22
AD23
AD24
AE25
AE26

AB10
AC10

AF10
AE10

AG10

AD9

AE9

N11M-GE1-S-A2 _BGA533

N11M-GE1-S-A2 _BGA533

VGA@

VGA@

Part 1 of 5

Part 1 of 5

PEX_RX0
PEX_RX0_N
PEX_RX1
PEX_RX1_N
PEX_RX2
PEX_RX2_N
PEX_RX3
PEX_RX3_N
PEX_RX4
PEX_RX4_N
PEX_RX5
PEX_RX5_N
PEX_RX6
PEX_RX6_N
PEX_RX7
PEX_RX7_N
PEX_RX8
PEX_RX8_N
PEX_RX9
PEX_RX9_N
PEX_RX10
PEX_RX10_N
PEX_RX11
PEX_RX11_N
PEX_RX12
PEX_RX12_N
PEX_RX13
PEX_RX13_N
PEX_RX14
PEX_RX14_N
PEX_RX15
PEX_RX15_N

PEX_TX0
PEX_TX0_N
PEX_TX1
PEX_TX1_N
PEX_TX2
PEX_TX2_N
PEX_TX3
PEX_TX3_N
PEX_TX4
PEX_TX4_N
PEX_TX5
PEX_TX5_N
PEX_TX6
PEX_TX6_N
PEX_TX7
PEX_TX7_N
PEX_TX8
PEX_TX8_N
PEX_TX9
PEX_TX9_N
PEX_TX10
PEX_TX10_N
PEX_TX11
PEX_TX11_N
PEX_TX12
PEX_TX12_N
PEX_TX13
PEX_TX13_N
PEX_TX14
PEX_TX14_N
PEX_TX15
PEX_TX15_N

PEX_REFCLK
PEX_REFCLK_N

PEX_TSTCLK_OUT
PEX_TSTCLK_OUT_N

PEX_TERMP

PEX_RST_N

PEX_CLKREQ_N

PCI EXPRESS

PCI EXPRESS

GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8

GPIO9
GPIO10
GPIO11

GPIO

GPIO

GPIO12
GPIO13
GPIO14
GPIO15
GPIO16
GPIO17
GPIO18
GPIO19

DACA_HSYNC
DACA_VSYNC

DACA_RED

DACA_BLUE

DACA_GREEN

DACA_VREF
DACA_RSET

DACB_HSYNC
DACB_VSYNC

DACB_RED

DACB_BLUE

DACB_GREEN

DACB_VREF
DACB_RSET

JTAG_TCK

JTAG_TDI
JTAG_TDO
JTAG_TMS

JTAG_TRST_N

TEST

TEST

TESTMODE

I2CA_SCL
I2CA_SDA

I2CB_SCL
I2CB_SDA

I2CC_SCL
I2CC_SDA

I2C DACADACB

I2C DACADACB

I2CH_SCL
I2CH_SDA

I2CS_SCL

I2CS_SDA

XTAL_SSIN

XTAL_OUTBUFF

XTAL_OUT

XTAL_IN

CLK

CLK

N1

HDMI_DETECT_VGA

G1
C1
M2
M3
K3

R685 0_0402_5%VGA@R685 0_0402_5%VGA@

K2

R686 0_0402_5%VGA@R686 0_0402_5%VGA@

J2
C2
M1
D2

VGA_GPIO11

D1
J3
J1

VGA_GPIO14

K1
F3

T68

T68

G3
G2

VGA_DEEP_IDLE_R

F1
F2

AD2
AD1

VGA_CRT_R

AE2

VGA_CRT_B

AD3

VGA_CRT_G

AE3

DACA_VREF

AF1

DACA_RSET

AE1

U6
U4

T5
R4
T4

R6
V6

JTAG_TCK

AF3

JTAG_TDI

AG4

JTAG_TDO

AE4

JTAG_TMS

AF4

JTAG_TRST_N

AG3

TESTMODE

AD25

R1
T3

R2
R3

A2
B1

A3
A4

T1
T2

I2CS is internal thermal sensor.

D11

E9

XTALOUT

E10

XTALIN

D10

091216 change GPU P/N to S A00003UD00

C740

C740

27P_0402_50V8J

27P_0402_50V8J

VGA@

VGA@

PLTRST_VGA#

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

http://laptop-motherboard-schematic.blogspot.com/

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

NV_INVTPWM
VGA_ENVDD
VGA_ENBKL

1 2
1 2

T31T31
T32T32

1 2

R684 10K _0402_5%

R684 10K _0402_5%

1 2

R687 10K _0402_5%

R687 10K _0402_5%

PAD

PAD

R682 124_0402_1%DIS@R682 124_0402_1%DIS@

VGA_DDCCLK_C
VGA_DDCDATA_C

I2CB_SCL
I2CB_SDA

VGA_LVDS_SCL_C
VGA_LVDS_SDA_C

HDCP_SMB_CK1
HDCP_SMB_DAI

SMB_EC_CK2_R
SMB_EC_DA2_R

HDMI_DETECT_VGA <16>

T33T33

VGA_ENVDD <14>
VGA_ENBKL <31>

@

@

@

@

1 2

R825 0_0402_5%@R825 0_0402_5%@

VGA_HSYNC <15>
VGA_VSYNC <15>

VGA_CRT_R <15>
VGA_CRT_B <15>
VGA_CRT_G <15>

DIS@

DIS@

C746 0.1U_0402_16V4Z

C746 0.1U_0402_16V4Z

1 2

R693 10K_0402_5%VGA@R693 10K_0402_5%VGA@

1 2

R674 10K_0402_5%VGA@R674 10K_0402_5%VGA@

1 2

R67510K_0402_5% @ R67510K _0402_5% @

R689 2.2K_0402_5%VGA@R689 2.2K_0402_5%VGA@

1 2

R688 2.2K_0402_5%

R688 2.2K_0402_5%

1 2

VGA@

VGA@

10K_0402_5%

10K_0402_5%

VGA@

VGA@

Y5

Y5

1 2

27MHZ_20P_7A27000010

27MHZ_20P_7A27000010

VGA@

VGA@

GPU_VID0
GPU_VID1

091105 add TestPad on GP IO8/GPIO9
Follow NV review

12

PAD

PAD

T73

T73

PAD

PAD

T72

T72

PAD

PAD

T71

T71

PAD

PAD

T70

T70

+3VS

DIS@

DIS@

R814 0_0402_5%

R814 0_0402_5%

1 2

12

12

10K_0402_5%

R677

R677

10K_0402_5%

091026 add GPIO18 us age
VGA_DEEP_IDLE output to EC

R676

R676

VGA@

VGA@

091124 change crystal Y5 P/N to SJ127P0M800

091124 change C740/C739 to 27PF

2009/10/09 2010/10/09

2009/10/09 2010/10/09

2009/10/09 2010/10/09

3

GPU_VID0 <43>
GPU_VID1 <43>

VGA_DEEP_IDLE <31>

CRT OUT

+3VSDGPU

+3VSDGPU

R683

R683

2.2K_0402_5%

2.2K_0402_5%

VGA@

VGA@

1 2

R815 0_0402_5%

R815 0_0402_5%

DIS@

DIS@

C739

C739
27P_0402_50V8J

27P_0402_50V8J

VGA@

VGA@

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

N10M-GS
(40nm)

N11M-GE1/LP1
(40nm)

Ball Name

GPIO0
GPIO1

GPIO2

GPIO3

GPIO4

GPIO5
GPIO6
GPIO7

GPIO8

GPIO9

GPU_VID0

GPU_VID1

R681

R681

2.2K_0402_5%

2.2K_0402_5%

VGA@

VGA@

EC_SMB_CK2
EC_SMB_DA2

C26 100P_0402_50V8J@C26 100P_0402_50V8J@

C29 100P_0402_50V8J@C29 100P_0402_50V8J@

091022 follow NV OPTIMUS D.G.

VGA_DDCCLK_C
VGA_DDCDATA_C

VGA_LVDS_SCL_C
VGA_LVDS_SDA_C

2

Device ID

0x0A74

Device ID

0x0A7D

GB1-N11x
Normal
Function

General Purpose
HPD-C

LCD0_BL_PWM

LCD0_VDD

LCD0_BL_EN

GPU_VID0
GPU_VID1
GPU_VID2

OVERT

ALERT

1 2

1 2

Function Description

Hot Plug detect for IFP link C
Panel Backlight Brightness
(PWM capable)

Panel power enable
Panel Backlight on/off
(PWM Capable)

GPU_VID0
GPU_VID1
GPU_VID2
Thermal Catast rophic
Overtemp

Thermal Alert

SMB_EC_CK2_R

SMB_EC_DA2_R

2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

OPT@

OPT@

100112 change Q47 P/N from SB00000AR00 to SB00000DH00

L27 MBK 1608121YZF_0603DIS@L27 MBK 1608121YZF_0603DIS@

1 2
1 2

L28 MBK 1608121YZF_0603DIS@L28 MBK 1608121YZF_0603DIS@

L31

L31

L30 MBK 1608121YZF_0603DIS@L30 MBK 1608121YZF_0603DIS@

1 2
1 2

DIS@

DIS@

C737

C737

MBK1608121YZF_0603DIS@

MBK1608121YZF_0603DIS@

1

GPIO6GPIO5

0

VGA_COREGPU_VID00GPU_VID1

0

1

1

1

VGA_COREGPU_VID00GPU_VID1

00

1

1

091212 Add C26, C29 near PR241
, PR242 to prevent switch noise

2

Q47A

Q47A

1

C738

C738

DIS@

DIS@

2

12P_0402_50V8J

12P_0402_50V8J

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

B

B

B

Date: Sheet

Date: Sheet

Date: Sheet

1

GB1-N11x
Normal

Ball Name

Function

GPIO10

MEM_VREF

GPIO11

SLI_SYNC
PWR_LEVEL

GPIO12

MEM_VID

GPIO13

PWR_CTRL1

GPIO14

HPD-E

GPIO15

FAN_PWM

GPIO16

Reserved

GPIO17

Reserved

GPIO18

HPD-D

GPIO19

VGA_CRT_R
VGA_CRT_G
VGA_CRT_B

091217 change R678/R679 from 4.7K to 2.2K

VGA_DDCCLK_C

VGA_DDCDATA_C

VGA_LVDS_SCL_C

VGA_LVDS_SDA_C

VGA_DEEP_IDLE_R

DGPU_PWR_EN

61

Q47B

Q47B

4

2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

1

C748

C748

DIS@

DIS@

2

12P_0402_50V8J

12P_0402_50V8J

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

N11M-OP2 PCIE,GPIO,CLK

N11M-OP2 PCIE,GPIO,CLK

N11M-OP2 PCIE,GPIO,CLK

R691 150_0402_1%DIS@R691 150_0402_1%DIS@
R692 150_0402_1%DIS@R692 150_0402_1%DIS@
R690 150_0402_1%DIS@R690 150_0402_1%DIS@

R678 2.2K_0402_5%VGA@R678 2.2K_0402_5%VGA@

R679 2.2K_0402_5%VGA@R679 2.2K_0402_5%VGA@

R699 2.2K_0402_5%VGA@R699 2.2K_0402_5%VGA@

R698 2.2K_0402_5%VGA@R698 2.2K_0402_5%VGA@

R824 10K_0402_5%@R824 10K_0402_5%@

091026 add R824 10K PU to +3VSDGPU

DGPU_PWR_EN <13,31,35>

5

OPT@

OPT@

3

1

1

C747

C747

DIS@

DIS@

2

2

12P_0402_50V8J

12P_0402_50V8J

NAVD0 LA-6091P

NAVD0 LA-6091P

NAVD0 LA-6091P

P-State

Deep P12

0.8V

0.85V

P8

P0

1.0V

P-State

Deep P12

0.8V

0.85V

P8

0.9V

P0

Function Description

Memory VREF switch
SLI raster sync

AC power detect in put
MEM_V ID or Power supply
Control

Power supply control
Hot plug detect f or IFP link E
Programmable Fan con trol

Hot plug detect f or IFP link D

1 2
1 2
1 2

12

12

12

12

12

EC_SMB_CK2 <5,9,31>

EC_SMB_DA2 <5,9,31>

VGA_DDCCLK <15>

VGA_DDCDATA <15>

VGA_LVDS_SCL <14>

VGA_LVDS_SDA <14>

12P_0402_50V8J

12P_0402_50V8J

846Wednesday, March 03, 2010

846Wednesday, March 03, 2010

846Wednesday, March 03, 2010

1

of

of

of

+3VSDGPU

1.0

1.0

1.0

5

FBAA[0..13]<12>

FBBA[2..5]<12>

FBADQM[0..7]<12>

FBADQS[0..7]<12>

FBADQS#[0..7 ]<12>

FBA_D[0..63]<12>

U30B

D D

C C

B B

FBA_D0
FBA_D1
FBA_D2
FBA_D3
FBA_D4
FBA_D5
FBA_D6
FBA_D7
FBA_D8
FBA_D9
FBA_D10
FBA_D11
FBA_D12
FBA_D13
FBA_D14
FBA_D15
FBA_D16
FBA_D17
FBA_D18
FBA_D19
FBA_D20
FBA_D21
FBA_D22
FBA_D23
FBA_D24
FBA_D25
FBA_D26
FBA_D27
FBA_D28
FBA_D29
FBA_D30
FBA_D31
FBA_D32
FBA_D33
FBA_D34
FBA_D35
FBA_D36
FBA_D37
FBA_D38
FBA_D39
FBA_D40
FBA_D41
FBA_D42
FBA_D43
FBA_D44
FBA_D45
FBA_D46
FBA_D47
FBA_D48
FBA_D49
FBA_D50
FBA_D51
FBA_D52
FBA_D53
FBA_D54
FBA_D55
FBA_D56
FBA_D57
FBA_D58
FBA_D59
FBA_D60
FBA_D61
FBA_D62
FBA_D63

U30B

D22

FBA_D0

E24

FBA_D1

E22

FBA_D2

D24

FBA_D3

D26

FBA_D4

D27

FBA_D5

C27

FBA_D6

B27

FBA_D7

A21

FBA_D8

B21

FBA_D9

C21

FBA_D10

C19

FBA_D11

C18

FBA_D12

D18

FBA_D13

B18

FBA_D14

C16

FBA_D15

E21

FBA_D16

F21

FBA_D17

D20

FBA_D18

F20

FBA_D19

D17

FBA_D20

F18

FBA_D21

D16

FBA_D22

E16

FBA_D23

A22

FBA_D24

C24

FBA_D25

D21

FBA_D26

B22

FBA_D27

C22

FBA_D28

A25

FBA_D29

B25

FBA_D30

A26

FBA_D31

U24

FBA_D32

V24

FBA_D33

V23

FBA_D34

R24

FBA_D35

T23

FBA_D36

R23

FBA_D37

P24

FBA_D38

P22

FBA_D39

AC24

FBA_D40

AB23

FBA_D41

AB24

FBA_D42

W24

FBA_D43

AA22

FBA_D44

W23

FBA_D45

W22

FBA_D46

V22

FBA_D47

AA25

FBA_D48

W27

FBA_D49

W26

FBA_D50

W25

FBA_D51

AB25

FBA_D52

AB26

FBA_D53

AD26

FBA_D54

AD27

FBA_D55

V25

FBA_D56

R25

FBA_D57

V26

FBA_D58

V27

FBA_D59

R26

FBA_D60

T25

FBA_D61

N25

FBA_D62

N26

FBA_D63

N11M-GE1-S-A2 _BGA533

N11M-GE1-S-A2 _BGA533

VGA@

VGA@

FBAA[0..13]

FBBA[2..5]

FBADQM[0..7]

FBADQS[0..7]

FBADQS#[0..7]

FBA_D[0..63]

Part 2 of 5

Part 2 of 5

MEMORY INTERFACE

MEMORY INTERFACE

FBA_DQS_RN0
FBA_DQS_RN1
FBA_DQS_RN2
FBA_DQS_RN3
FBA_DQS_RN4
FBA_DQS_RN5
FBA_DQS_RN6
FBA_DQS_RN7

FBA_DQS_WP0
FBA_DQS_WP1
FBA_DQS_WP2
FBA_DQS_WP3
FBA_DQS_WP4
FBA_DQS_WP5
FBA_DQS_WP6
FBA_DQS_WP7

FBA_CMD0
FBA_CMD1
FBA_CMD2
FBA_CMD3
FBA_CMD4
FBA_CMD5
FBA_CMD6
FBA_CMD7
FBA_CMD8

FBA_CMD9
FBA_CMD10
FBA_CMD11
FBA_CMD12
FBA_CMD13
FBA_CMD14
FBA_CMD15
FBA_CMD16
FBA_CMD17
FBA_CMD18
FBA_CMD19
FBA_CMD20
FBA_CMD21
FBA_CMD22
FBA_CMD23
FBA_CMD24
FBA_CMD25
FBA_CMD26
FBA_CMD27
FBA_CMD28
FBA_CMD29
FBA_CMD30

FBA_DQM0

FBA_DQM1

FBA_DQM2

FBA_DQM3

FBA_DQM4

FBA_DQM5

FBA_DQM6

FBA_DQM7

FB_VREF

FBA_CLK0

FBA_CLK0_N

FBA_CLK1

FBA_CLK1_N

FBA_DEBUG

FBAA4

F26

FBARAS#

J24

FBAA5

F25

FBA_BA1

M23

FBBA2

N27

FBBA4

M27

FBBA3

K26
J25

FBBACS0#

J27

FBAA11

G23

FBACAS#

G26

FBAWE#

J23

FBA_BA0

M25

FBBA5

K27

FBAA12

G25

FBA_RST

L24

FBAA7

K23

FBAA10

K24
G22

FBAA0

K25

FBAA9

H22

FBAA6

M26

FBAA2

H24

FBAA8

F27

FBAA3

J26

FBAA1

G24

FBAA13

G27

FBA_BA2

M24

FBBAODT0

K22

FBAACS0#

J22

FBAAODT0

L22

FBADQM0

C26

FBADQM1

B19

FBADQM2

D19

FBADQM3

D23

FBADQM4

T24

FBADQM5

AA23

FBADQM6

AB27

FBADQM7

T26

FBADQS#0

D25

FBADQS#1

A18

FBADQS#2

E18

FBADQS#3

B24

FBADQS#4

R22

FBADQS#5

Y24

FBADQS#6

AA27

FBADQS#7

R27

FBADQS0

C25

FBADQS1

A19

FBADQS2

E19

FBADQS3

A24

FBADQS4

T22

FBADQS5

AA24

FBADQS6

AA26

FBADQS7

T27

FB_VREF1

A16

F24
F23

N24
N23

M22

10K_0402_5%VGA@

10K_0402_5%VGA@

1 2

100112 change Q73 P/N from SB00000AR00 to SB00000DH00

change Q73,Q74,R821 from mount to @

EC_SMB_CK2<5,8,31>

A A

EC_SMB_DA2<5,8,31>

5

EC_SMB_CK2

EC_SMB_DA2

2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

@

@

2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

4

FBARAS# <12>

FBA_BA1 <12>

FBBA_CKE

FBBACS0# <12>

FBACAS# <12>
FBAWE# <12>
FBA_BA0 <12>

FBAA12 <12>

FBAA_CKE

12

R614

R614
10K_0402_5%

10K_0402_5%

VGA@

VGA@

FBAACS0# <12>

12

R607

R607
10K_0402_5%

10K_0402_5%

VGA@

VGA@

FBAA_CKE <12>

FBAAODT0 <12>

1.27V~0.9V

FBACLK0 <12>
FBACLK0# <12>

FBACLK1 <12>
FBACLK1# <12>

R615

R615

Q73A

Q73A

Q73B

Q73B

DGPU_PWRGD#

2

DGPU_PWRGD#

5

4

61

@

@

3

+1.5VSDGPU

091022 add for OPTIMUS

http://laptop-motherboard-schematic.blogspot.com/

4

12

R613

R613
10K_0402_5%

10K_0402_5%

VGA@

VGA@

12

R608

R608
10K_0402_5%

10K_0402_5%

VGA@

VGA@

12

R609

R609
10K_0402_5%

10K_0402_5%

VGA@

VGA@

VGA_HDMI_SCL <16>

VGA_HDMI_SDA <16>

FBBA_CKE <12>

FBA_RST <12>

FBA_BA2 <12>
FBBAODT0 <12>

HDMI

10mil

1

C634

C634

0.01U_0402_16V7K

0.01U_0402_16V7K

@

@

2

DGPU_PWRGD<16,31>

20100123 change R822 from OPT@ to VGA@

Security Classifica tion

Security Classifica tion

Security Classifica tion

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOU T PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOU T PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOU T PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

LVDS

VGA_HDMI_TX2+<16>
VGA_HDMI_TX2-<16>
VGA_HDMI_TX1+<16>
VGA_HDMI_TX1-<16>
VGA_HDMI_TX0+<16>
VGA_HDMI_TX0-<16>
VGA_HDMI_CLK+<16>
VGA_HDMI_CLK-<16>

+1.5VSDGPU

12

R619

R619

1.3K_0402_1%

1.3K_0402_1%

@

@

12

R618

R618

1.3K_0402_1%

1.3K_0402_1%

@

@

3

C756

C756

12P_0402_50V8J

12P_0402_50V8J

VGA_LVDS_ACLK<14>
VGA_LVDS_ACLK#<14>

VGA_LVDS_A0<14>
VGA_LVDS_A0#<14>
VGA_LVDS_A1<14>
VGA_LVDS_A1#<14>
VGA_LVDS_A2<14>
VGA_LVDS_A2#<14>

DGPU_PWRGD

R822

R822

22K_0402_5%

22K_0402_5%

VGA@

VGA@

3

VGA_LVDS_ACLK

VGA_LVDS_ACLK#

2

2

C757

C757
12P_0402_50V8J

12P_0402_50V8J

1

1

@

@

DGPU_PWRGD#

100K_0402_5%

100K_0402_5%

12

@

@

VGA_LVDS_ACLK
VGA_LVDS_ACLK#
VGA_LVDS_A0
VGA_LVDS_A0#
VGA_LVDS_A1
VGA_LVDS_A1#
VGA_LVDS_A2
VGA_LVDS_A2#

IFPC_AUX
IFPC_AUX_N

+3VS

R821

R821

@

@

1 2

13

D

D

2

G

G

S

S

U30C

U30C

AC4

IFPA_TXC

AD4

IFPA_TXC_N

V5

IFPA_TXD0

V4

IFPA_TXD0_N

AA5

IFPA_TXD1

AA4

IFPA_TXD1_N

W4

IFPA_TXD2

Y4

IFPA_TXD2_N

AB4

IFPA_TXD3

AB5

IFPA_TXD3_N

AB3

IFPB_TXC

AB2

IFPB_TXC_N

W1

IFPB_TXD4

V1

IFPB_TXD4_N

W3

IFPB_TXD5

W2

IFPB_TXD5_N

AA2

IFPB_TXD6

AA3

IFPB_TXD6_N

AB1

IFPB_TXD7

AA1

IFPB_TXD7_N

G4

IFPC_AUX_I2CW_SCL

G5

IFPC_AUX_I2CW_SDA_N

P4

IFPC_L0

N4

IFPC_L0_N

M5

IFPC_L1

M4

IFPC_L1_N

L4

IFPC_L2

K4

IFPC_L2_N

H4

IFPC_L3

J4

IFPC_L3_N

D3

IFPD_AUX_I2CX_SCL

D4

IFPD_AUX_I2CX_SDA_N

F5

IFPD_L0

F4

IFPD_L0_N

E4

IFPD_L1

D5

IFPD_L1_N

C3

IFPD_L2

C4

IFPD_L2_N

B3

IFPD_L3

B4

IFPD_L3_N

F7

IFPE_AUX_I2CY_SCL

G6

IFPE_AUX_I2CY_SDA_N

D6

IFPE_L0

C6

IFPE_L0_N

A6

IFPE_L1

A7

IFPE_L1_N

B6

IFPE_L2

B7

IFPE_L2_N

E6

IFPE_L3

E7

IFPE_L3_N

N11M-GE1-S-A2 _BGA533

N11M-GE1-S-A2 _BGA533

VGA@

VGA@

091216 change GPU P/N to S A00003UD00

Q74

Q74
SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

@

@

IFPC_AUX

IFPC_AUX_N

100112 change Q38 P/N from SB00000AR00 to SB00000DH00

Compal Secret Data

Compal Secret Data

2009/10/09 2010/10/09

2009/10/09 2010/10/09

2009/10/09 2010/10/09

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Part 3 of 5

Part 3 of 5

4.7K_0402_5%

4.7K_0402_5%

VGA@

VGA@

4.7K_0402_5%

4.7K_0402_5%

VGA@

VGA@

2

C15

NC

D15

NC

J5

NC

NCRFU

NCRFU

T6

RFU_1

W6

RFU_2

Y6

RFU_3

AA6

RFU_4

N3

RFU_5

C7

STRAP0

B9

STRAP1

A9

STRAP2

N5

BUFRST_N

LVDS / TMDS

LVDS / TMDS

GENERAL STRAPSERIAL

GENERAL STRAPSERIAL

IFPAB_RSET

+3VSDGPU

R652

R652

1 2

2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

VGA@

VGA@

+3VSDGPU

R654

R654

1 2

D8

THERMDN

D9

THERMDP

N2

CEC

F9

SPDIF

B10

ROM_CS_N

C9

ROM_SCLK

A10

ROM_SI

C10

ROM_SO

AB6

R5

IFPC_RSET

M6

IFPD_RSET

F8

IFPE_RSET

DGPU_PWRGD

2

Q38A

Q38A

2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

5V PULL UP IN CONNECTER SIDE

Q38B

Q38B

4

61

DGPU_PWRGD

5

VGA@

VGA@

1

STRAP0

STRAP1

STRAP2

PAD

PAD

T65

T65

PAD

PAD

T66

T66

PAD

PAD

T67

T67

SPDIF_IN

R620 36K_0402_5%

R620 36K_0402_5%

ROM_SCLK

ROM_SI

ROM_SO

R625 1K_0402_1%@R625 1K_0402_1%@

R621 1K_0402_1%VGA@R621 1K_0402_1%VGA@

R622 1K_0402_1%@R622 1K_0402_1%@

R649 1K_0402_1%@R649 1K_0402_1%@

3

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

B

B

B

Date: Sheet

Date: Sheet

Date: Sheet

STRAP0 <11>

STRAP1 <11>

STRAP2 <11>

+3VSDGPU

12

R634

R634
10K_0402_5%

10K_0402_5%

VGA@

VGA@

+3VSDGPU

VGA@

VGA@

1 2

ROM_SCLK <11>

ROM_SI <11>

ROM_SO <11>

1 2

1 2

1 2

1 2

VGA_HDMI_SCL <16>

VGA_HDMI_SDA <16>

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

N11M-OP2 LVDS,Memory Bus

N11M-OP2 LVDS,Memory Bus

N11M-OP2 LVDS,Memory Bus

12

R640

R640
10K_0402_5%

10K_0402_5%

VGA@

VGA@

NAVD0 LA-6091P

NAVD0 LA-6091P

NAVD0 LA-6091P

946Wednesday, March 03, 2010

946Wednesday, March 03, 2010

946Wednesday, March 03, 2010

1

of

of

of

1.0

1.0

1.0

5

NEAR BGA

VGA_CORE

NEAR BALL

4.7U 6.3V K X5R 0603

4.7U 6.3V K X5R 0603

1

C619

C619

VGA@

D D

2

VGA@

0.1U_0402_10V7K

0.1U_0402_10V7K

330U_D2_2.5VY_R9M

330U_D2_2.5VY_R9M

N10M-GS: 15.8A
N11M-GE1:16.7A

091022 add C804 330U for VGA_CORE

1

2

C658

C658

VGA@

VGA@

1

2

1

2

C661

C661

VGA@

VGA@

+3VSDGPU

1

C665

C665

VGA@

VGA@

2

4.7U 6.3V K X5R 0603

4.7U 6.3V K X5R 0603

1U_0402_6.3V6K

1U_0402_6.3V6K

1

C694

C694

VGA@

VGA@

2

1U_0402_6.3V6K

1U_0402_6.3V6K

1

2

1U_0402_6.3V6K

1U_0402_6.3V6K

1

C657

C657

VGA@

VGA@

2

1U_0402_6.3V6K

1U_0402_6.3V6K

1

2

5

1U_0402_6.3V6K

1U_0402_6.3V6K

C690

C690

VGA@

VGA@

C689

C689

VGA@

VGA@

0.1U_0402_10V7K

0.1U_0402_10V7K

C660

C660

VGA@

VGA@

0.1U_0402_10V7K

0.1U_0402_10V7K

1

2

1

2

NEAR BALL

C C

120mA

NEAR BGA

NEAR BGA

+1.8VSDGPU

L33

L33

MBK1608121YZF_0603

MBK1608121YZF_0603

1 2

VGA@

VGA@

300mA

4.7U 6.3V K X5R 0603

4.7U 6.3V K X5R 0603

B B

NEAR BGA

+1.05VSDGPU

L22

L22

MBK1608121YZF_0603

MBK1608121YZF_0603

1 2

VGA@

VGA@

285mA

4.7U 6.3V K X5R 0603

4.7U 6.3V K X5R 0603

NEAR BGA

+3VSDGPU

A A

L24

VGA@L24

VGA@

1 2

MBK1608121YZF_0603

MBK1608121YZF_0603

220mA

4.7U 6.3V K X5R 0603

4.7U 6.3V K X5R 0603

0.047U_0402_25V7K

0.047U_0402_25V7K

1

C641

C641

VGA@

VGA@

2

0.047U_0402_25V7K

0.047U_0402_25V7K

1

+

+

C804

C804

VGA@

VGA@

2

0.047U_0402_25V7K

0.047U_0402_25V7K

NEAR BALL

1

C679

C679

VGA@

VGA@

2

0.1U_0402_10V7K

0.1U_0402_10V7K

NEAR BALL

0.1U_0402_10V7K

0.1U_0402_10V7K

1

C692

C692

VGA@

VGA@

2

0.1U_0402_10V7K

0.1U_0402_10V7K

0.1U_0402_10V7K

0.1U_0402_10V7K

1

C688

C688

VGA@

VGA@

2

0.1U_0402_10V7K

0.1U_0402_10V7K

NEAR BALL

0.1U_0402_10V7K

0.1U_0402_10V7K

1

C662

C662

C656

C656

VGA@

VGA@

VGA@

VGA@

2

0.1U_0402_10V7K

0.1U_0402_10V7K

1

1

C652

C652

C653

C653

VGA@

VGA@

VGA@

VGA@

2

2

1

2

1

2

1

2

0.1U_0402_10V7K

0.1U_0402_10V7K

0.1U_0402_10V7K

0.1U_0402_10V7K

1

C630

C629

C629

VGA@

VGA@

C632

C632

VGA@

VGA@

C627

C627

VGA@

VGA@

0.1U_0402_10V7K

0.1U_0402_10V7K

C635

C635

VGA@

VGA@

1

2

1

2

1

2

C630

VGA@

VGA@

2

0.01U_0402_16V7K

0.01U_0402_16V7K

1

C628

C628

VGA@

VGA@

2

0.01U_0402_16V7K

0.01U_0402_16V7K

1

C643

C643

VGA@

VGA@

2

0.01U_0402_16V7K

0.01U_0402_16V7K

1

C646

C646

VGA@

VGA@

2

0.1U_0402_10V7K

0.1U_0402_10V7K

C693

C693

VGA@

VGA@

C687

C687

VGA@

VGA@

091212 Add C712 for +IFPC_IOVDD

1

C712

C712

VGA@

VGA@

2

0.1U_0402_10V7K

0.1U_0402_10V7K

1

C651

C651

C717

C717

VGA@

VGA@

VGA@

VGA@

2

091212 Add C717 for +SP_PLLVDD

http://laptop-motherboard-schematic.blogspot.com/

4

0.01U_0402_16V7K

0.01U_0402_16V7K

1

C631

C631

VGA@

VGA@

2

0.01U_0402_16V7K

0.01U_0402_16V7K

1

C622

C622

VGA@

VGA@

2

0.01U_0402_16V7K

0.01U_0402_16V7K

1

C642

C642

VGA@

VGA@

2

1

C645

C645

VGA@

VGA@

2

+3VSDGPU

+IFPC_PLLVDD

4

+IFPA_IOVDD

+IFPA_IOVDD

+IFPC_IOVDD

+IFPDE_IOVDD

12

R62310K_0402_5%

R62310K_0402_5%

VGA@

VGA@

+IFPAB_PLLVDD

+IFPC_PLLVDD

1 2

R628 0_0402_5%

R628 0_0402_5%

+1.05VSDGPU

+IFPD_PLLVDD

VGA@

VGA@

@

12

R62710K_0402_5%@R62710K_0402_5%

+IFPE_PLLVDD

VGA@

VGA@

12

R62410K_0402_5%

R62410K_0402_5%

NEAR BGA

L23

1 2

MBK1608121YZF_0603

MBK1608121YZF_0603

220mA

J10
J12
J13

M11
M17

N11
N12
N13
N14
N15
N16
N17
N19
P11
P12
P13
P14
P15
P16
P17

R11
R12
R13
R14
R15
R16
R17

T11
T17

U19

W9
W10
W12
W13
W18
W19

A12
B12
C12
D12
E12
F12

AG9

AD5

VGA@L23

VGA@

4.7U 6.3V K X5R 0603

4.7U 6.3V K X5R 0603

U30D

U30D

J9

L9

M9

N9

R9

T9

U9

V3

V2

J6

H6

P6

N6

D7

N11M-GE1-S-A2 _BGA533

N11M-GE1-S-A2 _BGA533

VGA@

VGA@

091216 change GPU P/N to
SA00003UD00

1

C663

C663

VGA@

VGA@

2

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

VDD33
VDD33
VDD33
VDD33
VDD33
VDD33

PEX_SVDD_3V3

IFPA_IOVDD

IFPB_IOVDD

IFPC_IOVD D

IFPDE_IOVDD

IFPAB_PLLVDD

IFPC_PLLVDD

IFPD_PLLVDD

IFPE_PLLVDD

1U_0402_6.3V6K

1U_0402_6.3V6K

1

C659

C659

VGA@

VGA@

2

Part 4 of 5

Part 4 of 5

3

PLACE UNDER GPU

A13

FBVDDQ

B13

FBVDDQ

C13

FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ

PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ

POWER

POWER

PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ

PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD

PEX_PLLVDD

VID_PLLVDD

SP_PLLVDD

PLLVDD

FB_PLLAVDD

FB_PLLAVDD

FB_DLLAVDD

DACA_VDD

DACB_VDD

FB_CAL_PD_VDDQ

VDD_SENSE

VDD_SENSE

D13
D14
E13
F13
F14
F15
F16
F17
F19
F22
H23
H26
J15
J16
J18
J19
L19
L23
L26
M19
N22
U22
Y22

AG6
AF6
AE6
AD6
AC13
AC7
AB17
AB16
AB13
AB9
AB8
AB7

AG7
AF7
AE7
AD8
AD7
AC9

AF9

K6

+SP_PLLVDD

L6

K5

R19

AC19

T19

AG2

W5

B15

W15

E15

NEAR BALL

+3VSDGPU

+PEX_PLLVDD

+DACA_VDD

+DACB_VDD

R637 40.2_0402_1%VGA@R637 40.2_0402_1%VGA@

0.01U_0402_16V7K

0.01U_0402_16V7K

0.1U_0402_10V7K

0.1U_0402_10V7K

0.1U_0402_10V7K

0.1U_0402_10V7K

R626 10K_0402_5%VGA@R626 10K_0402_5%VGA@

120mA

1

C678

C678

VGA@

VGA@

2

0.1U_0402_10V7K

0.1U_0402_10V7K

+IFPAB_PLLVDD

Security Classification

Security Classification

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Issued Date

Issued Date

3

+DACA_VDD

NEAR BALL NEAR BGA

1

2

470P_0402_50V7K

470P_0402_50V7K

2009/10/09 2010/10/09

2009/10/09 2010/10/09

2009/10/09 2010/10/09

0.01U_0402_16V7K

0.01U_0402_16V7K

1

C621

C621

VGA@

VGA@

2

0.01U_0402_16V7K

0.01U_0402_16V7K

1

C648

C648

VGA@

VGA@

2

1

C650

C650

VGA@

VGA@

2

0.1U_0402_10V7K

0.1U_0402_10V7K

1

2

1

2

1

C644

C644

VGA@

VGA@

2

NEAR BALL

0.1U_0402_10V7K

0.1U_0402_10V7K

1

C637

C637

VGA@

VGA@

2

NEAR BALL NEAR BGA

0.1U_0402_10V7K

0.1U_0402_10V7K

1

C638

C638

VGA@

VGA@

2

NEAR BALL

0.1U_0402_10V7K

+1.05VS_PLL

12~16mil

+FB_PLLAVDD

The power is base on VRAM type.

C702

C702

VGA@

VGA@

0.1U_0402_10V7K

1

1

C714

C714

VGA@

VGA@

2

2

0.1U_0402_10V7K

091212 Add C714 for +1.05VS_PLL

0104 Modify FB_CAL_PD_VDDQ connect from +1.5VS to +1.5VSDGPU

1 2

+VGASENSE

4700P_0402_25V7K

4700P_0402_25V7K

1

2

0.1U_0402_10V7K

+1.5VSDGPU

+VGASENSE <43>

+FB_PLLAVDD

0.1U_0402_10V7K

0.1U_0402_10V7K

1

C699

C701

C701

VGA@

VGA@

C699

VGA@

VGA@

2

0.1U_0402_10V7K

0.1U_0402_10V7K

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

0.047U_0402_25V7K

0.047U_0402_25V7K

1

C620

C620

VGA@

VGA@

2

NEAR BGA

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

C649

C649

VGA@

VGA@

0.1U_0402_10V7K

0.1U_0402_10V7K

1

C681

C681

VGA@

VGA@

2

+SP_PLLVDD

0.1U_0402_10V7K

0.1U_0402_10V7K

1

C695

C695

VGA@

VGA@

2

0.1U_0402_10V7K

0.1U_0402_10V7K

2

1

C633

C633

VGA@

VGA@

2

0.047U_0402_25V7K

0.047U_0402_25V7K

1

C664

C664

VGA@

VGA@

2

1U_0402_6.3V6K

1U_0402_6.3V6K

1

C640

C640

VGA@

VGA@

2

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

C682

C682

VGA@

VGA@

1U_0402_6.3V6K

1U_0402_6.3V6K

1

C716

C716

VGA@

VGA@

2

NEAR BGA

1U_0402_6.3V6K

1U_0402_6.3V6K

1

2

1

C700

C700

VGA@

VGA@

2

2

NEAR BGA

1U_0402_6.3V6K

1U_0402_6.3V6K

NEAR BGA

1

2

C623

C623

VGA@

VGA@

0.047U_0402_25V7K

0.047U_0402_25V7K

1

C624

C624

C625

C625

VGA@

VGA@

VGA@

VGA@

2

4.7U 6.3V K X5R 0603

4.7U 6.3V K X5R 0603

1

C626

C626

VGA@

VGA@

2

4.7U 6.3V K X5R 0603

4.7U 6.3V K X5R 0603

1

C639

C639

VGA@

VGA@

2

1

C636

C636

VGA@

VGA@

2

4.7U 6.3V K X5R 0603

4.7U 6.3V K X5R 0603

MBK1608121YZF_0603

MBK1608121YZF_0603

1

1

C655

C655

C683

C683

VGA@

VGA@

VGA@

VGA@

2

2

4.7U 6.3V K X5R 0603

4.7U 6.3V K X5R 0603

1

C654

C654

C685

C685

VGA@

VGA@

VGA@

VGA@

2

4.7U 6.3V K X5R 0603

4.7U 6.3V K X5R 0603

1

C617

C617

VGA@

VGA@

2

4.7U 6.3V K X5R 0603

4.7U 6.3V K X5R 0603

1U_0402_6.3V6K

1U_0402_6.3V6K

1

C698

C698

VGA@

VGA@

2

1

CLOSE TO GPU

+1.5VSDGPU

4.7U 6.3V K X5R 0603

4.7U 6.3V K X5R 0603

1

N10M-GS: 2.63A

C618

C618

VGA@

VGA@

N11M-GE1:2.55A

2

+1.05VSDGPU

2A

22U_0805_6.3V6M

22U_0805_6.3V6M

1

C706

C706

VGA@

VGA@

2

10U_0805_6.3V6M

10U_0805_6.3V6M

+1.05VSDGPU

1

C708

C708

VGA@

VGA@

2

1

C647

C647

VGA@

VGA@

2

1

1

C709

C709

C707

C707

VGA@

VGA@

VGA@

VGA@

2

2

22U_0805_6.3V6M

22U_0805_6.3V6M

1

C710

C710

VGA@

VGA@

2

10U_0805_6.3V6M

10U_0805_6.3V6M

120mA

L21

L21

1 2

MBK1608121YZF_0603

MBK1608121YZF_0603

VGA@

VGA@

+1.05VSDGPU

12

L29

L29

VGA@

VGA@

1

C813

C813

@

@

2

091022 add C813 22U follow NV rev iew

+1.05VSDGPU

VID_PLLVDD=45mA
SP_PLLVDD=45mA
PLLVDD=60mA

L32

L32

1 2

MBK1608121YZF_0603

MBK1608121YZF_0603

VGA@

VGA@

091212 Add C716 for +SP_PLLVDD

L20

L20

1 2

MBK1608121YZF_0603

MBK1608121YZF_0603

VGA@

VGA@

+1.05VSDGPU

+1.05VSDGPU

FB_PLLVDD=100mA
FB_DLLVDD=100mA

L34

L34

MBK1608121YZF_0603

MBK1608121YZF_0603

1

C703

C703

VGA@

VGA@

2

4.7U 6.3V K X5R 0603

4.7U 6.3V K X5R 0603

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

+3VSDGPU

12

VGA@

VGA@

120mA

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

N11M-OP2 PWR

N11M-OP2 PWR

N11M-OP2 PWR

NAVD0 LA-6091P

NAVD0 LA-6091P

NAVD0 LA-6091P

1

1.0

1.0

1.0

of

of

of

10 46Wednesday, March 03, 2010

10 46Wednesday, March 03, 2010

10 46Wednesday, March 03, 2010

5

4

3

2

1

A total of 8 signals are required for GB1 strapping this includes

2 reference signals

6 physical strapping pins

4 logical strapping bits

U30E

U30E

B2
B5
B8

B11
B14

D D

C C

B17
B20
B23
B26

E2
E5
E8

E11
E17
E20
E23
E26

H2
H5

J11
J14
J17

K9

K19

L2

L5
L11
L12
L13
L14
L15
L16
L17

M12
M13
M14
M15
M16

P2
P5

P9
P19
P23
P26
T12
T13

W16

E14

N11M-GE1-S-A2 _BGA533

N11M-GE1-S-A2 _BGA533

VGA@

Place Components Close to BGA

VGA@

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

GND_SENSE

GND_SENSE

Part 5 of 5

Part 5 of 5

FB_CAL_TERM_GND

MULTI_STRAP_REF1_GND

MULTI_STRAP_REF0_GND

GND

GND

FB_CAL_PU_GND

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

U2
U5
U11
U12
U13
U14
U15
U16
U17
U23
U26
V9
V19
W11
W14
W17
Y2
Y5
Y23
Y26
AC2
AC5
AC6
AC8
AC11
AC14
AC17
AC20
AC23
AC26
AF2
AF5
AF8
AF11
AF14
AF17
AF20
AF23
AF26
T16
T15
T14
F6

A15

B16

F11

F10

R617 40.2_0402_1%VGA@R617 40.2_0402_1%VGA@

1 2

R616 60.4_0402_1%

R616 60.4_0402_1%

1 2

VGA@

VGA@

12

R635

R635

40.2K_0402_1%

40.2K_0402_1%

VGA@

VGA@

12

R636

R636

40.2K_0402_1%

40.2K_0402_1%

VGA@

VGA@

091216 change GPU P/N to S A00003UD00

Resistor
Values

5Kohm

10Kohm

B B

15Kohm

20Kohm

25Kohm

30Kohm

35Kohm

45Kohm

Pull-up to VDD

1000

1001

1010

1011

1100

1101

1110

1111

Pull-down to GND

0000

0001

0010

0011

0100

0101

0110

0111

SUB_VENDOR

0

No VBIOS ROM (Default)

*

1

BIOS ROM is present

Panel USER Straps

User[3:0]

EDID used

*

Customer defined

FB_0_BAR_SIZE

0

*

256MB (Default)

1

Reserved

PEX_PLL_EN_TERM

0

*

Disable (Default)

1

Enable

XCLK_417

0

*

277MHz (Default )

1

Reserved

SMBUS_ALT_ADDR

0

*

0x9E (Default)

1

0x9C (Multi-GPU usage)

VGA_DEVICE

0

3D Device

1

VGA Device (Default)

*

3GIO_PADCFG

3GIO_PADCFG[3:0]

0110

A total of 24 logical strapping bits are available

+3VSDGPU

12

R646

R646

VGA@

VGA@

STRAP2<9>
STRAP1<9>
STRAP0<9>
ROM_SCLK<9>
ROM_SI<9>
ROM_SO<9>

STRAP2
STRAP1
STRAP0
ROM_SCLK
ROM_SI
ROM_SO

12

R647

R647

@

@

FB Memory (DDR3)

K4W1G1646E-HC12

H5TQ1G63BFR-12C

Power
Rail

VDD33

VDD33

VDD33

VDD33

VDD33

VDD33

Memory/PKG

DDR3

LP1
(0x0A7D)
40nm

Samsung
800MHz
(defaul)

Hynix
800MHz

Physical
Strapping
Pin

ROM_SO

ROM_SCLK

ROM_SI

STRAP2

STRAP1

STRAP0

N11M-GE1
LP1

Must be used 1% resister for driver calibration

*

Notebook Default

R642

R642

VGA@

VGA@

45.3K_0402_1%

45.3K_0402_1%

@

@

30K_0402_1%

30K_0402_1%

12

R644

R644

12

R643

R643

34.8K_0402_1%

34.8K_0402_1%

34.8K_0402_1%

34.8K_0402_1%

12

12

R645

R645

VGA@

VGA@

45.3K_0402_1%

45.3K_0402_1%

R648

R648

@

@

10K_0402_5%

10K_0402_5%

ROM_SO

PD 10K

12

12

R630

R630

@

@

R629

R629

VGA@

VGA@

15K_0402_1%

15K_0402_1%

15K_0402_1%

15K_0402_1%

12

R641

R641

@

@

2K_0402_5%

2K_0402_5%

12

R642

R642

SAM@

SAM@

20K_0402_1%

20K_0402_1%

PD 15K

PD 15K

12

R639

R639

@

@

12

R638

R638

VGA@

VGA@

STRAP1 use for 3GIO_PADCFG to set 35K pull up.
(PUN-04335-001_V10 HW9 update)

2K_0402_5%

2K_0402_5%

10K_0402_5%

10K_0402_5%

15K_0402_1%

15K_0402_1%

HY@

HY@

ROM_SIROM_SCLK STRAP0STRAP1STRAP2GPU

PU 45K

PD 15K64Mx16

PU 45K

X76

Logical
Strapping
Bit 3

XCLK_417

PCI_DEVID[4]

Logical
Strapping
Bit 2

Logical
Strapping
Bit 1

Logical
Strapping
Bit 0

FB_0_BAR_SIZE SMB_ALT_ADDR VGA_DEV ICE

SUB_VENDOR SLOT_CLK_CFG PEX_PLL_EN_TERM

RAMCFG[3] RAM CFG[2] RAMCFG[1] RAMCFG[0]

PCI_DEVID[3] PCI_DEVID[2] PCI_DEVID[1] PCI_DEVID[0]

3GIO_PADCFG[3] 3GIO_PADCFG[2] 3GIO_PADCFG[1] 3GIO_PADCFG[0]

USER[3] USER[2] USER[1] USER[0]

+1.5VS

FB_CAL_PU_GND FBCAL_PD_VDDQ

40.2 ohm

FBCAL_TERM_GNDFBVDDQ

40.2/60.4 ohm40.2 ohm

DG-04642-001-V01(May 22, 2009)

PU 35KN11M-GE1

PU 35K

PU 45KPD 10K PD 20K64Mx16

PU 45K

SLOT_CLOCK_CFG

0

*

A A

GPU and MCH don't share a common reference cloc k

1

GPU and MCH share a common reference clock (Default )

Security Classifica tion

Security Classifica tion

Security Classifica tion

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOU T PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOU T PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

http://laptop-motherboard-schematic.blogspot.com/

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOU T PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/10/09 2010/10/09

2009/10/09 2010/10/09

2009/10/09 2010/10/09

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

B

B

B

Date: Sheet

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

N11M-OP2 GND & STRAP

N11M-OP2 GND & STRAP

N11M-OP2 GND & STRAP

NAVD0 LA-6091P

NAVD0 LA-6091P

NAVD0 LA-6091P

11 46Wednesday, March 03, 2010

11 46Wednesday, March 03, 2010

11 46Wednesday, March 03, 2010

1

1.0

1.0

1.0

of

of

of

5

N10x 40nm DDR3 MAPPING
NVIDIA COCUMENT FOR DA-3978-001

FBAA[0..13]<9>

FBBA[2..5]<9>

FBADQM[0..7]<9>

FBADQS[0..7]<9>

FBADQS#[0..7]<9>

FBA_D[0..63]<9>

D D

C C

B B

A A

FBAA[0..13]

FBBA[2..5]

FBADQM[0..7]

FBADQS[0..7]

FBADQS#[0..7]

FBA_D[0..63]

FBA_BA0<9>
FBA_BA1<9>
FBA_BA2<9>

FBACLK0<9>
FBACLK0#<9>
FBAA_CKE<9>

FBAAODT0<9>
FBAACS0#<9>
FBARAS#<9>
FBACAS#<9>
FBAWE#<9>

FBA_RST<9>

+VRAM_VREFB

+VRAM_VREFA

R605

R605
240_0402_1%

240_0402_1%

VGA@

VGA@

FBAA0
FBAA1
FBAA2
FBAA3
FBAA4
FBAA5
FBAA6
FBAA7
FBAA8
FBAA9
FBAA10
FBAA11
FBAA12
FBAA13

FBA_BA0
FBA_BA1
FBA_BA2

FBAAODT0
FBAACS0#
FBARAS#
FBACAS#
FBAWE#

FBADQS1
FBADQS3

FBADQM1
FBADQM3

FBADQS#1
FBADQS#3

FBA_RST

12

FBACLK0

FBACLK0#

FBACLK1

FBACLK1#

FBAA_CKE

U33

U33

M9

VREFCA

H2

VREFDQ

N4

A0

P8

A1

P4

A2

N3

A3

P9

A4

P3

A5

R9

A6

R3

A7

T9

A8

R4

A9

L8

A10/AP

R8

A11

N8

A12

T4

A13

T8

A14

M8

A15/BA3

M3

BA0

N9

BA1

M4

BA2

J8

CK

K8

CK

K10

CKE/CKE0

K2

ODT/ODT0

L3

CS

J4

RAS

K4

CAS

L4

WE

F4

DQSL

C8

DQSU

E8

DML

D4

DMU

G4

DQSL

B8

DQSU

T3

RESET

L9

ZQ/ZQ0

J2

NC/ODT1

L2

NC/CS1

J10

NC/CE1

L10

NCZQ1

A1

NC

A11

NC

T1

NC

T11

NC

100-BALL

100-BALL
SDRAM DDR3

SDRAM DDR3

K4W1G1646E-HC12

K4W1G1646E-HC12

SAM@

SAM@

U33

U33

H5TQ1G63BFR-12C

H5TQ1G63BFR-12C

HY@

HY@

VGA@

VGA@

243_0402_1%

243_0402_1%
R633

R633

1 2

12

R606

R606
243_0402_1%

243_0402_1%

VGA@

VGA@

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VSSQ
VSSQ

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

4

+VRAM_VREFB

+VRAM_VREFA

FBA_D9

E4

FBA_D14

F8

FBA_D8

F3

FBA_D12

F9

FBA_D10

H4

FBA_D13

H9

FBA_D11

G3

FBA_D15

H8

FBA_D24

D8

FBA_D30

C4

FBA_D26

C9

FBA_D29

C3

FBA_D28

A8

FBA_D25

A3

FBA_D27

B9

FBA_D31

A4

+1.5VSDGPU

B3

VDD

D10

VDD

G8

VDD

K3

VDD

K9

VDD

N2

VDD

N10

VDD

R2

VDD

R10

VDD

+1.5VSDGPU

A2
A9
C2
C10
D3
E10
F2
H3
H10

A10

VSS

B4

VSS

E2

VSS

G9

VSS

J3

VSS

J9

VSS

M2

VSS

M10

VSS

P2

VSS

P10

VSS

T2

VSS

T10

VSS

B2
B10
D2
D9
E3
E9
F10
G2
G10

1

3

R612

R612
240_0402_1%

240_0402_1%

VGA@

VGA@

FBAA0
FBAA1
FBAA2
FBAA3
FBAA4
FBAA5
FBAA6
FBAA7
FBAA8
FBAA9
FBAA10
FBAA11
FBAA12
FBAA13

FBA_BA0
FBA_BA1
FBA_BA2

FBACLK0

FBAA_CKE

FBAAODT0
FBAACS0#
FBARAS#
FBACAS#
FBAWE#

FBADQS2
FBADQS0

FBADQM2
FBADQM0

FBADQS#2
FBADQS#0

FBA_RST

12

M9
H2

N4
P8
P4
N3
P9
P3
R9
R3
T9
R4
L8
R8
N8
T4
T8
M8

M3
N9
M4

J8
K8

K10

K2
L3
J4
K4
L4

F4
C8

E8
D4

G4
B8

T3

L9

J2
L2

J10

L10

A1

A11

T1

T11

+1.5VSDGPU

10U_0603_6.3V6M

10U_0603_6.3V6M

1

C615

C615

VGA@

VGA@

VGA@

VGA@

2

10U_0603_6.3V6M

10U_0603_6.3V6M

+1.5VSDGPU

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1

VGA@

VGA@

VGA@

VGA@

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

+1.5VSDGPU

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1

VGA@

VGA@

VGA@

VGA@

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

U32

U32

VREFCA
VREFDQ

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15/BA3

BA0
BA1
BA2

CK
CK
CKE/CKE0

ODT/ODT0
CS
RAS
CAS
WE

DQSL
DQSU

DML
DMU

DQSL
DQSU

RESET

ZQ/ZQ0

NC/ODT1
NC/CS1
NC/CE1
NCZQ1

NC
NC
NC
NC

100-BALL

100-BALL
SDRAM DDR3

SDRAM DDR3

K4W1G1646E-HC12

K4W1G1646E-HC12

SAM@

SAM@

1

C697

C697

2

C696

C696

C691

C691

1

VGA@

VGA@
2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

C674

C674

C705

C705

1

VGA@

VGA@
2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

U32

U32

H5TQ1G63BFR-12C

H5TQ1G63BFR-12C

HY@

HY@

10U_0603_6.3V6M

10U_0603_6.3V6M

1

C675

C675

VGA@

VGA@

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

C614

C614

C602

C602

1

1

VGA@

VGA@

VGA@

VGA@
2

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

C607

C607

C606

C606

1

1

VGA@

VGA@

VGA@

VGA@

2

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

E4

DQL0

F8

DQL1

F3

DQL2

F9

DQL3

H4

DQL4

H9

DQL5

G3

DQL6

H8

DQL7

D8

DQU0

C4

DQU1

C9

DQU2

C3

DQU3

A8

DQU4

A3

DQU5

B9

DQU6

A4

DQU7

B3

VDD

D10

VDD

G8

VDD

K3

VDD

K9

VDD

N2

VDD

N10

VDD

R2

VDD

R10

VDD

A2

VDDQ

A9

VDDQ

C2

VDDQ

C10

VDDQ

D3

VDDQ

E10

VDDQ

F2

VDDQ

H3

VDDQ

H10

VDDQ

A10

VSS

B4

VSS

E2

VSS

G9

VSS

J3

VSS

J9

VSS

M2

VSS

M10

VSS

P2

VSS

P10

VSS

T2

VSS

T10

VSS

B2

VSSQ

B10

VSSQ

D2

VSSQ

D9

VSSQ

E3

VSSQ

E9

VSSQ

F10

VSSQ

G2

VSSQ

G10

VSSQ

1

C600

C600

VGA@

VGA@

VGA@

VGA@

2

10U_0603_6.3V6M

10U_0603_6.3V6M

1U_0402_6.3V4Z

1U_0402_6.3V4Z

C684

C684

1

1

VGA@

VGA@

VGA@

VGA@

2

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

C612

C612

1

1

VGA@

VGA@

VGA@

VGA@

2

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

FBA_D21
FBA_D18
FBA_D20
FBA_D16
FBA_D22
FBA_D19
FBA_D23
FBA_D17

FBA_D4
FBA_D1
FBA_D5
FBA_D2
FBA_D6
FBA_D0
FBA_D7
FBA_D3

+1.5VSDGPU

+1.5VSDGPU

10U_0603_6.3V6M

10U_0603_6.3V6M

1

C603

C603

2

10U_0603_6.3V6M

10U_0603_6.3V6M

1U_0402_6.3V4Z

1U_0402_6.3V4Z

C680

C680

C673

C673

1

VGA@

VGA@
2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

C609

C609

C611

C611

1

VGA@

VGA@
2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

3

+VRAM_VREFD

+VRAM_VREFC

U31

U31

M9

VREFCA

H2

2

0

091126 swap nets for layout 091026 swap nets for layout

FBACLK1<9>
FBACLK1#<9>

FBBA_CKE<9>

FBBAODT0<9>
FBBACS0#<9>

10P_0402_50V8J

10P_0402_50V8J

1

1

C805

@C805

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

C677

C677

1

1

VGA@

VGA@

2

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

C610

C610

1

1

VGA@

VGA@
2

2

@

2

C704

C704

C806

C806

1

@

@

2

10P_0402_50V8J

10P_0402_50V8J

C613

C613

C807

C807

1

@

@

2

10P_0402_50V8J

10P_0402_50V8J

VGA@

VGA@

1

VGA@

VGA@
2

1

VGA@

VGA@
2

C604

C604

C676

C676

C608

C608

FBAA0
FBAA1
FBBA2
FBBA3
FBBA4
FBBA5
FBAA6
FBAA7
FBAA8
FBAA9
FBAA10
FBAA11
FBAA12
FBAA13

FBA_BA0
FBA_BA1
FBA_BA2

FBACLK1
FBACLK1#FBACLK0#

FBBA_CKE

FBBAODT0
FBBACS0#

FBARAS#
FBACAS#
FBAWE#

FBADQS4
FBADQS7

FBADQM4
FBADQM7

FBADQS#4
FBADQS#7

FBA_RST

12

R600

R600
240_0402_1%

240_0402_1%

VGA@

VGA@

091020 reserve C805/C806/C807
10P for RF solution

+1.5VSDGPU

1

VGA@

VGA@

+

+

2

VREFDQ

N4

A0

P8

A1

P4

A2

N3

A3

P9

A4

P3

A5

R9

A6

R3

A7

T9

A8

R4

A9

L8

A10/AP

R8

A11

N8

A12

T4

A13

T8

A14

M8

A15/BA3

M3

BA0

N9

BA1

M4

BA2

J8

CK

K8

CK

K10

CKE/CKE0

K2

ODT/ODT0

L3

CS

J4

RAS

K4

CAS

L4

WE

F4

DQSL

C8

DQSU

E8

DML

D4

DMU

G4

DQSL

B8

DQSU

T3

RESET

L9

ZQ/ZQ0

J2

NC/ODT1

L2

NC/CS1

J10

NC/CE1

L10

NCZQ1

A1

NC

A11

NC

T1

NC

T11

NC

100-BALL

100-BALL
SDRAM DDR3

SDRAM DDR3

K4W1G1646E-HC12

K4W1G1646E-HC12

SAM@

SAM@

R611

R611

1.33K_0402_1%

1.33K_0402_1%

VGA@

VGA@

R610

R610

1.33K_0402_1%

1.33K_0402_1%

VGA@

VGA@

R602

R602

1.33K_0402_1%

220U_B2_2.5VM_R35

220U_B2_2.5VM_R35

1.33K_0402_1%

VGA@

C672

C672

VGA@

1.33K_0402_1%

1.33K_0402_1%

VGA@

VGA@

R601

R601

2

+VRAM_VREFD

+VRAM_VREFC

U34

FBA_D37

E4

DQL0

FBA_D36

F8

DQL1

FBA_D35

F3

DQL2

FBA_D32

F9

DQL3

FBA_D39

H4

DQL4

H9

DQL5

FBA_D38

G3

DQL6

FBA_D33

H8

DQL7

FBA_D61

D8

DQU0

FBA_D62

C4

DQU1

FBA_D56

C9

DQU2

FBA_D63

C3

DQU3

FBA_D58

A8

DQU4

FBA_D57

A3

DQU5

FBA_D59

B9

DQU6

FBA_D60

A4

DQU7

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

+1.5VSDGPU

+1.5VSDGPU +1.5VSDGPU

+1.5VSDGPU

B3
D10
G8
K3
K9
N2
N10
R2
R10

+1.5VSDGPU

A2
A9
C2
C10
D3
E10
F2
H3
H10

A10
B4
E2
G9
J3
J9
M2
M10
P2
P10
T2
T10

B2
B10
D2
D9
E3
E9
F10
G2
G10

U31

U31

H5TQ1G63BFR-12C

H5TQ1G63BFR-12C

HY@

HY@

12

+VRAM_VREFA +VRAM_VREFB

15MIL 15MIL

12

0.1U_0402_10V6K

0.1U_0402_10V6K

1

C616

C616

VGA@

VGA@

2

12

+VRAM_VREFC +VRAM_VREFD

15MIL 15MIL

12

0.1U_0402_10V6K

0.1U_0402_10V6K

1

C605

C605

VGA@

VGA@

2

FBAA0
FBAA1

45

FBBA2
FBBA3
FBBA4
FBBA5
FBAA6
FBAA7
FBAA8
FBAA9
FBAA10
FBAA11

76

FBAA12
FBAA13

FBA_BA0
FBA_BA1
FBA_BA2

FBACLK1
FBACLK1#
FBBA_CKE

FBBAODT0
FBBACS0#
FBARAS#
FBACAS#
FBAWE#

FBADQS5
FBADQS6

FBADQM5
FBADQM6

FBADQS#5
FBADQS#6

FBA_RST

12

R651

R651
240_0402_1%

240_0402_1%

VGA@

VGA@

U34

M9

VREFCA

H2

VREFDQ

N4

A0

P8

A1

P4

A2

N3

A3

P9

A4

P3

A5

R9

A6

R3

A7

T9

A8

R4

A9

L8

A10/AP

R8

A11

N8

A12

T4

A13

T8

A14

M8

A15/BA3

M3

BA0

N9

BA1

M4

BA2

J8

CK

K8

CK

K10

CKE/CKE0

K2

ODT/ODT0

L3

CS

J4

RAS

K4

CAS

L4

WE

F4

DQSL

C8

DQSU

E8

DML

D4

DMU

G4

DQSL

B8

DQSU

T3

RESET

L9

ZQ/ZQ0

J2

NC/ODT1

L2

NC/CS1

J10

NC/CE1

L10

NCZQ1

A1

NC

A11

NC

T1

NC

T11

NC

K4W1G1646E-HC12

K4W1G1646E-HC12

SAM@

SAM@

R604

R604

1.33K_0402_1%

1.33K_0402_1%

VGA@

VGA@

R603

R603

1.33K_0402_1%

1.33K_0402_1%

VGA@

VGA@

R653

R653

1.33K_0402_1%

1.33K_0402_1%

VGA@

VGA@

R650

R650

1.33K_0402_1%

1.33K_0402_1%

VGA@

VGA@

100-BALL

100-BALL
SDRAM DDR3

SDRAM DDR3

+1.5VSDGPU

12

12

12

12

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

VSS
VSS

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

1

C601

C601

2

1

C686

C686

2

FBA_D42

E4

FBA_D46

F8

FBA_D40

F3

FBA_D45

F9

FBA_D41

H4

FBA_D47FBA_D34

H9

FBA_D44

G3

FBA_D43

H8

FBA_D50

D8

FBA_D53

C4

FBA_D48

C9

FBA_D52

C3

FBA_D51

A8

FBA_D54

A3

FBA_D49

B9

FBA_D55

A4

+1.5VSDGPU

B3
D10
G8
K3
K9
N2
N10
R2
R10

+1.5VSDGPU

A2
A9
C2
C10
D3
E10
F2
H3
H10

A10
B4
E2
G9
J3
J9
M2
M10
P2
P10
T2
T10

B2
B10
D2
D9
E3
E9
F10
G2
G10

U34

U34

H5TQ1G63BFR-12C

H5TQ1G63BFR-12C

HY@

HY@

0.1U_0402_10V6K

0.1U_0402_10V6K

VGA@

VGA@

0.1U_0402_10V6K

0.1U_0402_10V6K

VGA@

VGA@

1

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY TH IRD PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY TH IRD PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

http://laptop-motherboard-schematic.blogspot.com/

4

MAY BE USED BY OR DISCLOSED TO ANY TH IRD PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/10/09 2010/10/09

2009/10/09 2010/10/09

2009/10/09 2010/10/09

Compal Secret Dat a

Compal Secret Dat a

Compal Secret Dat a

Deciphered Dat e

Deciphered Dat e

Deciphered Dat e

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

N11M-OP2 VRAM DDR3

N11M-OP2 VRAM DDR3

N11M-OP2 VRAM DDR3

NAVD0 LA-6091P

NAVD0 LA-6091P

NAVD0 LA-6091P

1

12 46Wednesday, March 03, 2010

12 46Wednesday, March 03, 2010

12 46Wednesday, March 03, 2010

of

of

of

1.0

1.0

1.0

5

PCI

SRC

CPU

CLKSEL1

0

FSA

CLKSEL0

MHz

266

MHz

1000

MHz

MHz

33.30

14.318 96.0 48.0

DOT_96
MHz

USB
MHz

FSC FSB REF

CLKSEL2

0 1000 133 33.31 14.318 96.0 48.0

0 1001 200 33.30 14.318 96.0 48.0

0 1001 166 33.31 14.318 96.0 48.0

D D

1 1000 333 33.30 14.318 96.0 48.0

4

Change C174 C175 to 10U_0603 05/14

+3VS

R1370_0603_5%R1370_0603_5%

R138

R138

+VCCP

1 2

1 2

0_0603_5%

0_0603_5%

+3VM_CK505

47P_0402_50V8J

47P_0402_50V8J

Add C1145 C1146 C1147 for EMI 06/12

3

10U_0603_6.3V6M

1

C1145

C1145

2

47P_0402_50V8J

47P_0402_50V8J

+1.05VM_CK505

1

C1146

C1146

2

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

1

C174

C174

2

1

C175

C175

2

1

C172

C172

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C139

C139

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C138

C138

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C167

C167

2

1

C148

C148

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

1

C137

C137

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C146

C146

2

2

CLK_SMBDATA

CLK_SMBCLK

091212 Add C15 C16 near Q10
to prevent switch noise

C15 100P_0402_50V8J@C15 100P_0402_50V8J@

C16 100P_0402_50V8J@C16 100P_0402_50V8J@

1

C165

C165

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

1 2

1 2

1

+3VS

R72

R72

2.2K_0402_5%

2.2K_0402_5%

Q10A

Q10A

+3VS

6 1

2

5

Q10B

Q10B

3

2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

4

ICH_SMBDATA<19>

ICH_SMBCLK<19>

R91

R91

2.2K_0402_5%

2.2K_0402_5%

CLK_SMBDATA

CLK_SMBCLK

100112 change Q47 P/N from SB00000AR00 to SB00000DH00

1 1000 100 33.31 14.318 96.0 48.0

1 1001 400 33.30 14.318 96.0 48.0

111

+3VS

R435

R435

10K_0402_5%

10K_0402_5%

1 2

CLK_EN

13

Q31

Q31

R52

R52

FSC

R76

R76

2.2K_0402_5%

2.2K_0402_5%

FSA

1 2

R69

R69
0_0402_5%

0_0402_5%

1K_0402_1%

1K_0402_1%

1 2

1 2

R119

R119
0_0402_5%

0_0402_5%

R98

R98
10K_0402_5%

10K_0402_5%

1 2

R84

R84
0_0402_5%

0_0402_5%

2

DTC115EUA_SC70-3

DTC115EUA_SC70-3

+VCCP

12

R68

@R68

@

470_0402_5%

470_0402_5%

12

12

R73

R73

1K_0402_5%

1K_0402_5%

@

@

+VCCP

12

R113

R113

@

@

470_0402_5%

470_0402_5%

12

R110

R110

@

@

0_0402_5%

0_0402_5%

+VCCP

12

R92

@R92

@

470_0402_5%

470_0402_5%

12

12

R87

R87
0_0402_5%

0_0402_5%

@

@

CLK_ENABLE#<42>

C C

Rename 06/06

CPU_BSEL0<5>

Add 1K follow
Intel check list 05/11

B B

A A

FSB

CPU_BSEL1<5>

CPU_BSEL2<5>

Follow Intel check list change to 27P 06/05

C161 27P_0402_50V8JC161 27P_0402_50V8J

C164 27P_0402_50V8JC164 27P_0402_50V8J

Routing the t race at least 10mil

5

Reserved

Change co-lay net name to +1.5VM_CK505 07/03

CLK_48M_CR<27>

H_STP_CPU#_R

H_STP_PCI#_R

1 2

R1348 0_0603_5%

R1348 0_0603_5%

@

@

1 2

R1349 0_0603_5%R1349 0_0603_5%

1

47P_0402_50V8J

47P_0402_50V8J

C1147

C1147

2

@

@

1 2

C386

C386

CLK_48M_CR

H_STP_CPU#<19>

H_STP_PCI#<19>

+1.5VM_CK505

10U_0603_6.3V6M

10U_0603_6.3V6M

+VCCP

+1.5VS

22P_0402_50V8J

22P_0402_50V8J

1 2

R376 0_0402_5%R376 0_0402_5%

091210 add C392/C393 22P for RF team

CLK_PCI_LPC<31>

CLK_PCI_PCH<17>

+3VS

+1.5VS

0301Change R1349,R1351 BOM structure from LOW_CLK@ to mount
0301Change R1348,R1350 BOM structure from NOR_CLK@ to @

091020 change value of
C386 from 10P to 22P

CLK_PCH_48M<19>

CLK_PCH_14M<19>

0111Change BOM Structure of C390 from @ to mount

091020 change value of C390 from 10P to 22P

+3VS

@

@

12

R1528 10K_0402_5%

R1528 10K_0402_5%

12

R1529 10K_0402_5%R1529 10K_0402_5%

CLK_PCI_LPC

12

R1289

R1289

10_0402_5%

10_0402_5%

@

@

1

C388

C388
22P_0402_50V8J

22P_0402_50V8J

@

@

2

0301 Change BOM Structure of R1289 and C388/C389/C393/C390 from NOR_CLK@ to @

For ITP_EN, 0 =SRC8/SRC8#; 1 = ITP/ITP#

For PCI4_SEL, 0 = Pin24/25 : DOT96 / DOT96#
Pin28/29 : LCDCLK / LCDCLK#

For PCI2_TME:0=Overclocking of CPU and SRC allowed
(ICS only) 1=Overclocking of CPU and SRC NOT allowed

1 = Pin24/25 : SRC_0 / SRC_0#
Pin28/29 : 27M/27M_SS

CLK_XTAL_IN

12

Y1

Y1

14.318MHZ_16PF_7A14300083

14.318MHZ_16PF_7A14300083

CLK_XTAL_OUT

1 2

ITP_EN PCI4_SEL PCI2_TME

1 2

R85

R85

10K_0402_5%

10K_0402_5%

@

@

R89

R89

10K_0402_5%

10K_0402_5%

22P_0402_50V8J

22P_0402_50V8J

@

@

+3VS+3VS +3VS

R95

R95

10K_0402_5%

10K_0402_5%

@

@

1 2

R90

R90

10K_0402_5%

10K_0402_5%

1 2

http://laptop-motherboard-schematic.blogspot.com/

4

1

C1119

C1119

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

091029 add R376 0_0402_5%
for EMI solution

H_STP_CPU#

H_STP_PCI#

C389

C389

SA000020K00 (Silego : SLG8SP556VTR )
SA000020H10 (ICS : ICS9LPRS387AKLFT)

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

1

C160

C160

C140

C140

2

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

R1350 0_0402_5%@R1350 0_0402_5%@

1 2

R1351 0_0402_5%R1351 0_0402_5%

1 2

R74

R74

FSA_R

1 2

22_0402_5%

22_0402_5%
R75

R75

1 2

22_0402_5%

22_0402_5%

R104

R104

1 2

33_0402_5%

33_0402_5%

1 2

C390 22P_0402_50V8J

C390 22P_0402_50V8J

@

@

VGATE<5,19,31,42>

R801 0_0402_5%R801 0_0402_5%

1 2

R802 0_0402_5%

R802 0_0402_5%

@

@

1 2

091015 add R801/R802 0ohm

1

1

2

R71

R71

10K_0402_5%

10K_0402_5%

1 2

@

@

R77

R77

10K_0402_5%

10K_0402_5%

1 2

C393

C393
22P_0402_50V8J

22P_0402_50V8J

2

@

@

C169

C169

+1.05VM_CK505

1

2

PCI2_TME

R86

R86

1 2

33_0402_5%

33_0402_5%

R80

R80

1 2

33_0402_5%

33_0402_5%

+3VM_CK505

1

2

VDD_SRC_IO

C173

C173

0.1U_0402_16V4Z

0.1U_0402_16V4Z

FSA

FSB

FSC

CLK_EN

@

@

1 2

R371 0_0402_5%

R371 0_0402_5%

H_STP_CPU#_R

H_STP_PCI#_R

CLK_XTAL_IN

CLK_XTAL_OUT

PCI4_SEL

ITP_EN

U4

U4

55

VDD_SRC

6

VDD_REF

12

VDD_PCI

72

VDD_CPU

19

VDD_48

27

VDD_PLL3

66

VDD_CPU_IO

31

VDD_PLL3_IO

62

VDD_SRC_IO

52

VDD_SRC_IO

23

VDD_IO

38

VDD_SRC_IO

20

USB_0/FS_A

2

FS_B/TEST_MODE

7

REF_0/FS_C/TEST_

8

REF_1

1

CKPWRGD/PD#

11

NC

53

CPU_STOP#

54

PCI_STOP#

5

XTAL_IN

4

XTAL_OUT

13

PCI_1

14

PCI_2

15

PCI_3

16

PCI_4/SEL_LCDCL

17

PCIF_5/ITP_EN

18

VSS_PCI

3

VSS_REF

22

VSS_48

26

VSS_IO

69

VSS_CPU

30

VSS_PLL3

34

VSS_SRC

59

VSS_SRC

42

VSS_SRC

73

VSS

SLG8SP556VTR_QFN72_10X10

SLG8SP556VTR_QFN72_10X10

0303 change U4 P/N from SA00003H730 to SA00003H610

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

9

SDA

10

SCL

71

CPU_0

70

CPU_0#

68

CPU_1

67

CPU_1#

LCDCLK/27M

SRC_2

SRC_2#

SRC_3

SRC_3#

SRC_4

SRC_4#

SRC_6

SRC_6#

SRC_7

SRC_7#

SRC_9

SRC_9#

SRC_10

SRC_10#

SRC_11

SRC_11#

CLKREQ_3#

CLKREQ_4#

CLKREQ_6#

CLKREQ_7#

CLKREQ_9#

SLKREQ_10#

CLKREQ_11#

Compal Secret Data

Compal Secret Data

Compal Secret Data

24

25

28

29

32

33

35

36

39

40

57

56

61

60

64

63

44

45

50

51

48

47

37

41

58

65

43

49

46

21

Deciphered Date

Deciphered Date

Deciphered Date

SRC_0/DOT_96

SRC_0#/DOT_96#

LCDCLK#/27M_SS

SRC_8/CPU_ITP

SRC_8#/CPU_ITP#

USB_1/CLKREQ_A#

2009/10/09 2010/10/09

2009/10/09 2010/10/09

2009/10/09 2010/10/09

R1487

R1487

OPT@

OPT@

1 2

+3VS

10K_0402_5%

10K_0402_5%

PEG_CLKREQ#_R

CLK_SMBDATA

CLK_SMBCLK

CLK_CPU_BCLK

CLK_CPU_BCLK#

CLK_CPU_HPLCLK

CLK_CPU_HPLCLK#

CPU_DREFCLK

CPU_DREFCLK#

CPU_SSCDREFCLK

CPU_SSCDREFCLK#

CLK_PCIE_VGA

CLK_PCIE_VGA#

CLK_PCIE_WLAN

CLK_PCIE_WLAN#

CLK_PCIE_SATA

CLK_PCIE_SATA#

CLK_PCIE_PCH

CLK_PCIE_PCH#

CLK_CPU_EXP

CLK_CPU_EXP#

CLK_PCIE_LAN

CLK_PCIE_LAN#

CLK_PCIE_WWAN

CLK_PCIE_WWAN#

Add PEG_CLKREQ# 09/10/08
PU to +3VS

PEG_CLKREQ#_R PEG_CLKREQ#

WLAN_CLKREQ#

LAN_CLKREQ#

WWA N_CLKREQ#

2

Add CLK to GPU 09/10/08

DIS@

DIS@

1 2

R804 0_0402_5%

R804 0_0402_5%

Add WW AN_CLKREQ# 05/04

1 3

CLK_SMBDATA <7,24>

CLK_SMBCLK <7,24>

CLK_CPU_BCLK <5>

CLK_CPU_BCLK# <5>

CLK_CPU_HPLCLK <5>

CLK_CPU_HPLCLK# <5>

CPU_DREFCLK <5>

CPU_DREFCLK# <5>

CPU_SSCDREFCLK <5>

CPU_SSCDREFCLK# <5>

CLK_PCIE_VGA <8>

CLK_PCIE_VGA# <8>

CLK_PCIE_WLAN <25>

CLK_PCIE_WLAN# <25>

CLK_PCIE_SATA <18>

CLK_PCIE_SATA# <18>

CLK_PCIE_PCH <19>

CLK_PCIE_PCH# <19>

CLK_CPU_EXP <4>

CLK_CPU_EXP# <4>

CLK_PCIE_LAN <26>

CLK_PCIE_LAN# <26>

CLK_PCIE_WWAN <24>

CLK_PCIE_WWAN# <24>

WLAN_CLKREQ# <25>

Add LAN_CLKREQ# 091116

LAN_CLKREQ# <26>

WWA N_CLKREQ# <24>

R1488

R1488

OPT@

OPT@

2

G

G

Q63

Q63

D

D

OPT@

OPT@

SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

S

S

12

10K_0402_5%

10K_0402_5%

DGPU_PWR_EN <8,31,35>

PEG_CLKREQ# <8>

SRC PORT LIST

PORT

SRC1
SRC2
SRC3
SRC4
SRC6
SRC7
SRC8
SRC9
SRC10
SRC11

LAN_CLKREQ#

WLAN_CLKREQ#

WWA N_CLKREQ#

DEVICE

CPU_SSCDREFCLK

PCIE_VGA
PCIE_WLAN
PCIE_SATA
PCIE_PCH
CPU_ITP
CLK_CPU_EXP
PCIE_LAN
PCIE_WWAN

R1530 10K_0402_5%R1530 10K_0402_5%

R121 10K _0402_5%R121 10K_0402_5%

R107 10K _0402_5%R107 10K_0402_5%

12

12

12

REQ PORT LIST

DEVICEPORT

REQ_3#
REQ_4#
REQ_6#
REQ_7#
REQ_9#
REQ_10#
REQ_11#
REQ_A#

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Num ber Rev

Size Document Num ber Rev

Size Document Num ber Rev

Date: Sh eet

Date: Sh eet

Date: Sh eet

Compal Electronics, Inc.

Clock Generator CK505

Clock Generator CK505

Clock Generator CK505

PCIE_VGA
PCIE_WLAN

PCIE_LAN
PCIE_WWAN

NAVD0 LA-6091P

NAVD0 LA-6091P

NAVD0 LA-6091P

1

13 46Wednesday, March 03, 2010

13 46Wednesday, March 03, 2010

13 46Wednesday, March 03, 2010

of

of

of

+3VS

1.0

1.0

1.0

5

4

3

2

1

R1182 0_0402_5%@R1182 0_0402_5%@

LCD POWER CIRCUIT

+LCDVDD

D D

2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

GMCH_ENVDD<5>

100K_0402_5%

100K_0402_5%

C C

12

3

Q4B

Q4B

4

2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

@

@

R174

R174

1 2

R577

R577
150_0603_5%

150_0603_5%

5

Q4A

Q4A

VGA_ENVDD<8>

+3VALW

12

R578

R578
47K_0402_5%

47K_0402_5%

R579 47K_0402_5%R579 47K_0402_5%

61

2

R700

R700

10K_0402_5%

10K_0402_5%

DIS@

DIS@

2

G

G

12

12

13

D

D

S

S

SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

DIS@

DIS@

091015 follow NTV00 Design

+3VS

W=60mils

S

S

G

G

Q3

Q3

2

AO3413_SOT23-3

AO3413_SOT23-3

D

D

2

C1108

C1108

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

Q42

Q42

1 3

1

@

@

C1106

C1106

4.7U_0805_10V4Z

4.7U_0805_10V4Z

2

2009/10/07 Add Q42 and R700 for DIS only

+LCDVDD

1

2

W=60mils

C1105

C1105

0.1U_0402_16V4Z

0.1U_0402_16V4Z

USB20_N3_1

USB20_P3_1

091103 del C1167/C1168

2

3

WCM2012F2S-900T04_0805

WCM2012F2S-900T04_0805

R1183 0_0402_5%@R1183 0_0402_5%@

0111 Change BOM Structur e of L3 from @ to mount and R1182/ R1183 from mount to @

12

D6

L3

L3

USB20_N3

1

1

2

USB20_P3USB20_P3

3

4

4

12

+3VS

USB20_N3 <19>

USB20_P3 <19>

R807

R807

1 2

0_0603_5%

0_0603_5%

0.1U_0402_16V4Z

0.1U_0402_16V4Z

+CAM_VCC

C1113

C1113

USB20_P3_1 USB20_N3_1

091203 change P/N of D6 to SC300000100

1

2

D6

1

GND

VCC

2

IO1

IO2

PRTR5V0U2X_SOT143

PRTR5V0U2X_SOT143

@

@

4

+CAM_VCC

3

091020 change JUMP J1 to R807 0ohm

OPTIMUS

100112 change Q47 P/N from SB00000AR00 to SB00000DH00

GMCH_LVDS_A0<5>
GMCH_LVDS_A0#<5>

GMCH_LVDS_A1<5>
GMCH_LVDS_A1#<5>

CMOS & LCD/PANEL BD. Conn.

Modify JLVDS1 08/04

JLVDS1

JLVDS1

1
2
3
4
5
6
7
8

9
10
11
12
13

B B

14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30

ACES_88341-3000B001

ACES_88341-3000B001

CONN@

CONN@

USB20_P3_1
USB20_N3_1

DMIC_CLK_LVDS
DMIC_DATA_LVDS

LVDS_ACLK
LVDS_ACLK#

LVDS_A2
LVDS_A2#

LVDS_A1
LVDS_A1#

LVDS_A0
LVDS_A0#

LVDS_SDA
LVDS_SCL
DISPOFF#
INVTPWM

+LCDVDD_L

+LEDVDD

20100106 add R1186 connect pin1 of JLVDS1 t o GND

camera

DMIC_CLK_LVDS <28>

DMIC_DATA_LVDS <28>

56P_0402_50V8

56P_0402_50V8

0111 Change BOM Structur e of C1306/C1307/C1308 from @ to mount

L2

L2

FBMA-L11-160808-221LMT 0603

FBMA-L11-160808-221LMT 0603

+3VS

FBMA-L11-160808-221LMT 0603

FBMA-L11-160808-221LMT 0603

2

C1111

C1111
330P_0402_50V7K

330P_0402_50V7K

1

R11860_0402_5% R11860_0402_5%

12

R11850_0402_5%

R11850_0402_5%

12

@

@

1

C1307

C1307

2

091130 combine Digital MIC into LVDS
follow NAV50 Pin definition

LVDS_SCL

LVDS_SDA

+3VS

+CAM_VCC

091020 change value of C1109 from 220P t o 1200P

INVTPWM

DISPOFF#

Change P/N from SE 071100J80 to SE071560J80

+LCDVDD

L1

L1

(20 MIL)

1

C1112

C1112
100P_0402_50V8J

100P_0402_50V8J

2

1 2

R1180 2.2K_0402_5%R1180 2.2K_0402_5%

1 2

R1181 2.2K_0402_5%R1181 2.2K_0402_5%

56P_0402_50V8

56P_0402_50V8

C1109 1200P_0402_50V 7KC1109 1200P_0402_50V7K

1 2

C1156 220P_0402_50V 7KC1156 220P_0402_50V7K

56P_0402_50V8

56P_0402_50V8

B+

C1306

C1306

C1308

C1308

+3VS

1

2

+LCDVDD

1

2

GMCH_LVDS_A2<5>
GMCH_LVDS_A2#<5>

GMCH_LVDS_ACLK<5>
GMCH_LVDS_ACLK#<5>

GMCH_LVDS_SCL<5>
GMCH_LVDS_SDA<5>

INVT_PW M<5,31>

VGA_LVDS_A0#<9>
VGA_LVDS_A0<9>

VGA_LVDS_A1#<9>
VGA_LVDS_A1<9>

VGA_LVDS_A2#<9>
VGA_LVDS_A2<9>

VGA_LVDS_ACLK#<9>
VGA_LVDS_ACLK<9>

VGA_LVDS_SCL<8>
VGA_LVDS_SDA<8>

GMCH_LVDS_A0

GMCH_LVDS_A0#

GMCH_LVDS_A1

GMCH_LVDS_A1#

GMCH_LVDS_A2

GMCH_LVDS_A2#

GMCH_LVDS_ACLK
GMCH_LVDS_ACLK# LVDS_AC LK#

GMCH_LVDS_SCL
GMCH_LVDS_SDA
INVT_PW M

091202 swap A0/A0#,A1/A1#,A2/A2#,ACLK/ACLK#
nets on RP7/RP8/RP9/RP10

091209 change BOM Structure of R1500 from OPT@ to VGA@

VGA_LVDS_A0#
VGA_LVDS_A0

VGA_LVDS_A1#
VGA_LVDS_A1

VGA_LVDS_A2#
VGA_LVDS_A2

VGA_LVDS_ACLK#
VGA_LVDS_ACLK

VGA_LVDS_SCL

091202 swap A0/A0#,A1/A1#,A2/A2#,ACLK/ACLK#
nets on RP11/RP12/RP13/RP14

2 3
1 4

RP7 0_0404_4P2R_5%OPT@RP7 0_0404_4P2R_5%OPT@

2 3
1 4

RP8 0_0404_4P2R_5%OPT@RP8 0_0404_4P2R_5%OPT@

2 3
1 4

RP9 0_0404_4P2R_5%OPT@RP9 0_0404_4P2R_5%OPT@

2 3
1 4

RP10 0_0404_4P2R_5%OPT@RP10 0_0404_4P2R_5%OPT@

R1498

OPT@R1498

OPT@

1 2

R1499

OPT@R1499

OPT@

0_0402_5%

0_0402_5%

1 2

R1500

VGA@R1500

VGA@

0_0402_5%

0_0402_5%

1 2

0_0402_5%

0_0402_5%

DIS ONLY

2 3
1 4

RP11 0_0404_4P2R_5%DIS@RP11 0_0404_4P2R_5%DIS@

2 3
1 4

RP12 0_0404_4P2R_5%DIS@RP12 0_0404_4P2R_5%DIS@

2 3
1 4

RP13 0_0404_4P2R_5%DIS@RP13 0_0404_4P2R_5%DIS@

2 3
1 4

RP14 0_0404_4P2R_5%DIS@RP14 0_0404_4P2R_5%DIS@

R1514

DIS@R1514

DIS@

1 2

R1515

DIS@R1515

DIS@

0_0402_5%

0_0402_5%

1 2

0_0402_5%

0_0402_5%

LVDS_A0
LVDS_A0#

LVDS_A1
LVDS_A1#

LVDS_A2
LVDS_A2#

LVDS_ACLK

LVDS_SCL
LVDS_SDA

INVTPWM

LVDS_A0#
LVDS_A0

LVDS_A1#
LVDS_A1

LVDS_A2#
LVDS_A2

LVDS_ACLK#
LVDS_ACLK

LVDS_SCL
LVDS_SDAVGA_LVDS_SDA

LED PANEL Conn.

R1464 0_0402_5% R1464 0_0402_5%

A A

BKOFF#<31>

5

R1465 10K_0402_5% R1465 10K_0402_5%

1 2

1 2

DISPOFF#

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

http://laptop-motherboard-schematic.blogspot.com/

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/10/09 2010/10/09

2009/10/09 2010/10/09

2009/10/09 2010/10/09

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

LVDS /INVERTER

LVDS /INVERTER

LVDS /INVERTER

NAVD0 LA-6091P

NAVD0 LA-6091P

NAVD0 LA-6091P

14 46Wednesday, March 03, 2010

14 46Wednesday, March 03, 2010

14 46Wednesday, March 03, 2010

1

of

of

of

1.0

1.0

1.0

A

B

C

D

E

Close to CRT CONN for ESD.

CRT PORT

2

3

D18

D18

2

3

D17

D17

Modify C31- C308 C303 C307 C306 C304 BOM Structure 0615

0120 Change L12,L14,L15 P/N from SM01000AL00 to SM010032020

1

1 1

2 2

CRT_R

CRT_G

CRT_B

12

R255

R255

R253

R253

150_0402_1%

150_0402_1%

C301 0.1U_0402_16V4ZC301 0.1U_0402_16V4Z

CRT_HSYNC

Place closed to chipset

CRT_VSYNC

12

R250

R250

150_0402_1%

150_0402_1%

1 2

C298 0.1U_0402_16V4ZC298 0.1U_0402_16V4Z

12

150_0402_1%

150_0402_1%

1 2

1

C310

C310

C308

C308

2

10P_0402_50V8J

10P_0402_50V8J

+5VS

1

5

U11

U11

P

4

OE#

A2Y

G

SN74AHCT1G125DCKR_SC70-5

SN74AHCT1G125DCKR_SC70-5

3

+5VS

5

A2Y

3

P

G

1

1

C303

C303

2

2

10P_0402_50V8J

10P_0402_50V8J

CRT_HSYNC_1 CRT_HSYNC_2

1

U10

U10

CRT_VSYNC_1 CRT_VSYNC_2

4

OE#

SN74AHCT1G125DCKR_SC70-5

SN74AHCT1G125DCKR_SC70-5

L15

L15

1 2

L14

L14

1 2

L12

L12

1 2

10P_0402_50V8J

10P_0402_50V8J

1 2

R1512 39_0402_1%R1512 39_0402_1%

1 2

R1513 39_0402_1%R1513 39_0402_1%

BK1608121YZF

BK1608121YZF

BK1608121YZF

BK1608121YZF

BK1608121YZF

BK1608121YZF

C307

C307

1

2

C306

C306

10P_0402_50V8J

10P_0402_50V8J

1

1

C304

C304

2

2

1 2

BK1608LL121-T_2P

BK1608LL121-T_2P

1 2

BK1608LL121-T_2P

BK1608LL121-T_2P

10P_0402_50V8J

10P_0402_50V8J

L44

L44

L45

L45

C1304

C1304

10P_0402_50V8J

10P_0402_50V8J

10P_0402_50V8J

10P_0402_50V8J

091013 Add R/L/C folloew NTV00

1

2

C1305

C1305

10P_0402_50V8J

10P_0402_50V8J

PJDLC05C_SOT23-3

PJDLC05C_SOT23-3

091202 move R249/R247 to CPU si de

1

PJDLC05C_SOT23-3

PJDLC05C_SOT23-3

RED

GREEN

BLUE

JVGA_HS

JVGA_VS

1

2

High: CRT Plugged

CRT_DET<19>

CRT_DET

CRT_DET#

+3VS

1 2

13

D

D

2

G

G

S

S

R149

R149
10K_0402_5%

10K_0402_5%

Q11

Q11
2N7002W-T/R7_SOT323-3

2N7002W-T/R7_SOT323-3

DIS ONLYOPTIMUS

+5VS

GMCH_CRT_R<5>

GMCH_CRT_G<5>

GMCH_CRT_B<5>

GMCH_CRT_HSYNC<5>

3 3

GMCH_CRT_DATA<5>

GMCH_CRT_CLK<5>

GMCH_CRT_VSYNC<5>

GMCH_CRT_DATA CRT_DAT

GMCH_CRT_CLK CRT_CLK

GMCH_CRT_R

GMCH_CRT_G

GMCH_CRT_B

GMCH_CRT_HSYNC

GMCH_CRT_VSYNC

+3VS +3VSDGPU

4

Q67B

2

2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

61

OPT@

OPT@

Q67A

Q67A
2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

R1501

OPT@R1501

OPT@

1 2

R1502

OPT@R1502

OPT@

1 2

R1503

OPT@R1503

OPT@

1 2

R1504

OPT@R1504

OPT@

1 2

R1505

OPT@R1505

OPT@

1 2

5

3

OPT@Q67B

OPT@

CRT_CLK

0_0402_5%

0_0402_5%

0_0402_5%

0_0402_5%

0_0402_5%

0_0402_5%

0_0402_5%

0_0402_5%

0_0402_5%

0_0402_5%

CRT_R

CRT_G

CRT_B

CRT_HSYNC

CRT_VSYNC

VGA_CRT_R<8>

VGA_CRT_G<8>

VGA_CRT_B<8>

VGA_HSYNC<8>

VGA_VSYNC<8>

VGA_DDCDATA<8>

VGA_DDCCLK<8>

VGA_CRT_R

VGA_CRT_G

VGA_CRT_B

VGA_HSYNC

VGA_VSYNC

VGA_DDCDATA CRT_DAT

VGA_DDCCLK

R1517

DIS@R1517

DIS@

1 2

R1518

DIS@R1518

DIS@

1 2

R1519

DIS@R1519

DIS@

1 2

R1520

DIS@R1520

DIS@

1 2

R1521

DIS@R1521

DIS@

1 2

5

4

Q72B

DIS@Q72B

2

Q72A

Q72A
2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

DIS@

2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

61

DIS@

DIS@

0_0402_5%

0_0402_5%

0_0402_5%

0_0402_5%

0_0402_5%

0_0402_5%

0_0402_5%

0_0402_5%

0_0402_5%

0_0402_5%

3

CRT_R

CRT_G

CRT_B

CRT_HSYNC

CRT_VSYNC

+CRT_VCC

W=40mils

D3

D3

2 1

RB491D_SC59-3

RB491D_SC59-3

R1103 100K_0402_5%

R1103 100K_0402_5%

1 2

20100129 add F4 for +CRT_VC C

+CRT_VCC_1

091117 Change JCRT1 Symbol t o
SUYIN_070546FR015M21TZR

+CRT_VCC

F4

F4

21

1.1A_6V_SMD1812P110TF

1.1A_6V_SMD1812P110TF

RED

CRT_DAT
GREEN

JVGA_HS
BLUE

JVGA_VS

CRT_CLK
CRT_DET#

C142 0.1U_0402_16V4ZC142 0.1U_0402_16V4Z

1 2

JCRT1

JCRT1

6

11

1
7

12

2
8

13

3
9

14

4
10
15

5

SUYIN_070546FR015M21TZR

SUYIN_070546FR015M21TZR

CONN@

CONN@

16

G

G

17

G

G

100112 change Q72 P/N from SB00000AR00 to SB00000DH00

4 4

GMCH_CRT_DATA

GMCH_CRT_CLK

VGA_DDCDATA

VGA_DDCCLK

OPT@

OPT@

1 2

R248 2.2K_0402_5%

R248 2.2K_0402_5%

OPT@

OPT@

1 2

R245 2.2K_0402_5%

R245 2.2K_0402_5%

@

@

1 2

R1469 4.7K_0402_5%

R1469 4.7K_0402_5%

@

@

1 2

R1470 4.7K_0402_5%

R1470 4.7K_0402_5%

A

+3VS

CRT_DAT

CRT_CLK

+CRT_VCC

1 2

R251 2.2K_0402_5%R251 2.2K_0402_5%

1 2

R252 2.2K_0402_5%R252 2.2K_0402_5%

Security Classifica tion

Security Classifica tion

Security Classifica tion

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOU T PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOU T PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

http://laptop-motherboard-schematic.blogspot.com/

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOU T PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2009/10/09 2010/10/09

2009/10/09 2010/10/09

2009/10/09 2010/10/09

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

D

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

CRT PORT

CRT PORT

CRT PORT

NAVD0 LA-6091P

NAVD0 LA-6091P

NAVD0 LA-6091P

15 46Wednesday, March 03, 2010

15 46Wednesday, March 03, 2010

15 46Wednesday, March 03, 2010

E

of

of

of

1.0

1.0

1.0

5

4

3

2

1

L36

1

1

4

4

WCM-2012-900T_4P

WCM-2012-900T_4P

L37

1

1

4

4

WCM-2012-900T_4P

WCM-2012-900T_4P

L38

1

1

4

4

WCM-2012-900T_4P

WCM-2012-900T_4P

L39

1

1

4

4

WCM-2012-900T_4P

WCM-2012-900T_4P

@

@

D45

D45
RB751V_SOD323

RB751V_SOD323

2 1

HDMI_CLK+_CK
HDMI_CLK-_CK
HDMI_TX0+_CK
HDMI_TX0-_CK
HDMI_TX1+_CK
HDMI_TX1-_CK
HDMI_TX2+_CK
HDMI_TX2-_CK

VGA@L36

VGA@

2

3

VGA@L37

VGA@

2

3

VGA@L38

VGA@

2

3

VGA@L39

VGA@

2

3

1 2

R660 0_0402_5%@R660 0_0402_5%@
R658 0_0402_5%@R658 0_0402_5%@
R664 0_0402_5%@R664 0_0402_5%@
R662 0_0402_5%@R662 0_0402_5%@
R668 0_0402_5%@R668 0_0402_5%@
R666 0_0402_5%@R666 0_0402_5%@
R672 0_0402_5%@R672 0_0402_5%@
R670 0_0402_5%@R670 0_0402_5%@

HDMI_CLK-_CONN

2

HDMI_CLK+_CONN

3

HDMI_TX0-_CONN

2

HDMI_TX0+_CONN

3

HDMI_TX1-_CONN

2

HDMI_TX1+_CONN

3

HDMI_TX2-_CONN

2

HDMI_TX2+_CONN

3

R656

R656

10K_0402_1%

10K_0402_1%

1 2

VGA@

VGA@

R655

R655
100K_0402_5%

100K_0402_5%

VGA@

VGA@

1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2

C669 0.1U_0402_16V7KVGA@C669 0.1U_0402_16V7KVGA@

VGA_HDMI_CLK+<9>

D D

C C

DGPU_PWRGD<9,31>

B B

A A

DGPU_PWRGD

HDMI_DETECT

NC7SZ08P5X_NL_SC70-5

NC7SZ08P5X_NL_SC70-5

HDMI_DETECT HDMI_DETECT_VGA

VGA_HDMI_CLK-<9>
VGA_HDMI_TX0+<9>
VGA_HDMI_TX0-<9>
VGA_HDMI_TX1+<9>
VGA_HDMI_TX1-<9>
VGA_HDMI_TX2+<9>
VGA_HDMI_TX2-<9>

+3VSDGPU

5

U15

U15

2

P

B

Y

1

A

G

3

OPT@

OPT@

DIS@

DIS@

1 2

R816 0_0402_5%

R816 0_0402_5%

HDMI_DETECT_VGA

4

HDMI_DETECT<31>

1 2

C668 0.1U_0402_16V7KVGA@C668 0.1U_0402_16V7KVGA@

1 2

C667 0.1U_0402_16V7KVGA@C667 0.1U_0402_16V7KVGA@

1 2

C666 0.1U_0402_16V7KVGA@C666 0.1U_0402_16V7KVGA@

1 2

C715 0.1U_0402_16V7KVGA@C715 0.1U_0402_16V7KVGA@

1 2

C713 0.1U_0402_16V7KVGA@C713 0.1U_0402_16V7KVGA@

1 2

C730 0.1U_0402_16V7KVGA@C730 0.1U_0402_16V7KVGA@

1 2

C711 0.1U_0402_16V7KVGA@C711 0.1U_0402_16V7KVGA@

1 2

HDMI_CLK-_CK

HDMI_CLK+_CK

HDMI_TX0-_CK

HDMI_TX0+_CK

HDMI_TX1-_CK

HDMI_TX1+_CK

HDMI_TX2-_CK

HDMI_TX2+_CK

091027 swap L36/L37/L38/L39 nets for layout

HDMI_DETECT_VGA <8>

HDMI_DETECT

HDMI_CLK+_CONN

HDMI_CLK-_CONN

HDMI_TX0+_CONN

HDMI_TX0-_CONN

HDMI_TX1+_CONN

HDMI_TX1-_CONN

HDMI_TX2+_CONN

HDMI_TX2-_CONN

VGA@

VGA@

1 2

L35MBK1608121YZF_0603

L35MBK1608121YZF_0603

330P_0402_50V7K

330P_0402_50V7K

VGA@

VGA@

C718

C718

+5VS

3

VGA_HDMI_SDA<9>
VGA_HDMI_SCL<9>

2

@

@

1

D46

D46
BAT54S-7-F_SOT23-3

BAT54S-7-F_SOT23-3

HDMI_CLK+_CONN

HDMI_CLK-_CONN

HDMI_TX0+_CONN

HDMI_TX0-_CONN

HDMI_TX1+_CONN

HDMI_TX1-_CONN

HDMI_TX2+_CONN

HDMI_TX2-_CONN

R661 499_0402_1%VGA@R661 499_0402_1%VGA@

R659 499_0402_1%VGA@R659 499_0402_1%VGA@

R665 499_0402_1%VGA@R665 499_0402_1%VGA@

R663 499_0402_1%VGA@R663 499_0402_1%VGA@

R669 499_0402_1%VGA@R669 499_0402_1%VGA@

R667 499_0402_1%VGA@R667 499_0402_1%VGA@

R673 499_0402_1%VGA@R673 499_0402_1%VGA@

R671 499_0402_1%VGA@R671 499_0402_1%VGA@

NEAR CONNECT

R657

@R657

R631

R631

@

1 2

R632

R632

2.2K_0402_5%

2.2K_0402_5%

VGA@

VGA@

1 2

0_0805_5%

0_0805_5%

2.2K_0402_5%

2.2K_0402_5%

VGA@

VGA@

HDMIDAT_R
HDMICLK_R

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

L25 MBK1608121YZF_0603VGA@L25 MBK1608121YZF_0603VGA@

1 2
1 2

L26 MBK1608121YZF_0603VGA@L26 MBK1608121YZF_0603VGA@

+5VS

21

VGA@

VGA@

D49

D49
RB491D_SC59-3

RB491D_SC59-3

+5VS_HDMI

HDMI_CLK-_CONN

HDMI_CLK+_CONN
HDMI_TX0-_CONN

HDMI_TX0+_CONN
HDMI_TX1-_CONN

HDMI_TX1+_CONN
HDMI_TX2-_CONN

HDMI_TX2+_CONN

C670

C670

12P_0402_50V8J

12P_0402_50V8J

VGA@

VGA@

C743

C743

1

0.1U_0402_16V4Z

0.1U_0402_16V4Z

VGA@

VGA@

2

HDMI_CONN

20mil

13

D

D

2

+3VSDGPU

G

G

VGA@

VGA@

S

S

Q41

Q41
2N7002W-T/R7_SOT323-3

2N7002W-T/R7_SOT323-3

091022 change Q41.2 PU from
+3VS to +3VSDGPU

HDMIDAT_R
HDMICLK_R

1

1

C671

C671

12P_0402_50V8J

12P_0402_50V8J

2

2

VGA@

VGA@

091012 change HDMI CONN Symbol to
SUYIN_100042GR019S268ZR

JHDMI1

JHDMI1

19

HP_DET

18

+5V

17

DDC/CEC_GND

16

SDA

15

SCL

14

Reserved

13

CEC

12

CK-

11
10

9
8
7
6
5
4
3
2
1

GND

CK_shield

GND
CK+
D0­D0_shield
D0+
D1­D1_shield
D1+
D2­D2_shield
D2+

SUYIN_100042GR019S268ZR

SUYIN_100042GR019S268ZR

CONN@

CONN@

20
21

Security Classification

Security Classification

Security Classification

2009/10/09 2010/10/09

2009/10/09 2010/10/09

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING I S THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING I S THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING I S THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

http://laptop-motherboard-schematic.blogspot.com/

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/10/09 2010/10/09

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

HDMI CONN

HDMI CONN

HDMI CONN

NAVD0 LA-6091P

NAVD0 LA-6091P

NAVD0 LA-6091P

16 46W ednesday, March 03, 2010

16 46W ednesday, March 03, 2010

16 46W ednesday, March 03, 2010

1

1.0

1.0

1.0

of

of

of

5

D D

4

3

2

1

+3VS

PCI_DEVSEL#

R233

OPT@

OPT@

R29110K_0402_5%

R29110K_0402_5%
R29210K_0402_5% R29210K_0402_5%

R2388.2K_0402_5% R2388.2K_0402_5%
R2058.2K_0402_5% R2058.2K_0402_5%
R2068.2K_0402_5% R2068.2K_0402_5%
R2088.2K_0402_5% R2088.2K_0402_5%
R2108.2K_0402_5% R2108.2K_0402_5%
R2118.2K_0402_5% R2118.2K_0402_5%
R2128.2K_0402_5% R2128.2K_0402_5%
R2048.2K_0402_5% R2048.2K_0402_5%

R3648.2K_0402_5% R3648.2K_0402_5%
R3658.2K_0402_5% R3658.2K_0402_5%

R233

R2358.2K_0402_5% R2358.2K_0402_5%

R2368.2K_0402_5% R2368.2K_0402_5%
R2298.2K_0402_5% R2298.2K_0402_5%
R2078.2K_0402_5% R2078.2K_0402_5%
R2318.2K_0402_5% R2318.2K_0402_5%
R2308.2K_0402_5% R2308.2K_0402_5%
R2378.2K_0402_5% R2378.2K_0402_5%

R2328.2K_0402_5% R2328.2K_0402_5%
R2098.2K_0402_5% R2098.2K_0402_5%

CLK_PCI_PCH

PCI_ IRDY#

PCI_SERR#
PCI_STOP#
PCI_PLOCK#
PCI_TRDY#
PCI_PERR#
PCI_FRAME#

GPIO22

PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
PCI_PIRQE#
PCI_PIRQF#
PCI_PIRQG#
PCI_PIRQH#

8.2K_0402_5%

R363

R363
10K_0402_5%

10K_0402_5%

@

@

@

@

8.2K_0402_5%

CLK_PCI_PCH

12

R336

R336
33_0402_5%

33_0402_5%

@

@

1

C432

C432
22P_0402_50V8J

22P_0402_50V8J

C C

B B

2

@

@

0111 Change BOM Structure of R336 and C432 from @ to mount
0301 Change BOM Structure of R336 and C432 from NOR_CLK@ to @

DIS@

DIS@

R823 10K_0402_5%

R823 10K_0402_5%

091023 add R823 DIS@ 10K PD
for SW OPTIMUS usage

For EMI

GPIO22

12

CLK_PCI_PCH<13>

R362

R362

10K_0402_5%

10K_0402_5%

@

@

R366

R366

10K_0402_5%

10K_0402_5%

U72A

U72A

A5

PAR

B15

DEVSEL#

J12

PCICLK

A23

PCIRST#

B7

IRDY#

C22

PME#

B11

SERR#

F14

STOP#

A8

PLOCK#

A10

TRDY#

D10

PERR#

A16

FRAME#

A18

GNT1#

E16

GNT2#

G16

REQ1#

A20

REQ2#

G14

GPIO48/STRAP1#

A2

GPIO17/STRAP2#

C15

GPIO22

C9

GPIO1

B2

PIRQA#

D7

PIRQB#

B3

PIRQC#

H10

PIRQD#

E8

PIRQE#/GPIO2

D6

PIRQF#/GPIO3

H8

PIRQG#/GPIO4

F8

PIRQH#/GPIO5

D11

STRAP0#

K9

RSVD01

M13

RSVD02

TIGERPOINT_ES1_BGA360

TIGERPOINT_ES1_BGA360

TGP

TGP

PCI

PCI

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8

AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

C/BE0#
C/BE1#
C/BE2#
C/BE3#

1

1

B22
D18
C17
C18
B17
C19
B18
B19
D16
D15
A13
E14
H14
L14
J14
E10
C11
E12
B9
B13
L12
B8
A3
B5
A6
G12
H12
C8
D9
C7
C1
B1

H16
M15
C13
L16

091105 change TigerPoint Part Number to SA000039N90

675$3
*3,2

A A

5

675$3
*3,2













%RRW%,26

63,

3&,

/3&

Security Classification

Security Classification

Security Classification

2009/10/09 2010/10/09

2009/10/09 2010/10/09

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAI NS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAI NS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAI NS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

http://laptop-motherboard-schematic.blogspot.com/

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/10/09 2010/10/09

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

Tigerpoint(1/4)

Tigerpoint(1/4)

Tigerpoint(1/4)

NAVD0 LA-6091P

NAVD0 LA-6091P

NAVD0 LA-6091P

17 46W ednesday, March 03, 2010

17 46W ednesday, March 03, 2010

17 46W ednesday, March 03, 2010

1

of

of

of

1.0

1.0

1.0

5

D D

C C

+3VS

R294

R294
10K_0402_5%

10K_0402_5%

GAT@

B B

A A

GAT@

1 2

R296

R296
10K_0402_5%

10K_0402_5%

PAC@

PAC@

1 2

4

U72C

U72C

R12

RSVD03

AE20

RSVD04

AD17

RSVD05

AC15

RSVD06

AD18

RSVD07

Y12

RSVD08

AA10

RSVD09

AA12

RSVD10

Y10

RSVD11

AD15

RSVD12

W10

RSVD13

V12

RSVD14

AE21

RSVD15

AE18

RSVD16

AD19

RSVD17

U12

RSVD18

AC17

RSVD19

AB13

RSVD20

AC13

RSVD21

AB15

RSVD22

Y14

RSVD23

AB16

RSVD24

AE24

RSVD25

AE23

RSVD26

AA14

RSVD27

V14

RSVD28

AD16

RSVD29

AB11

RSVD30

AB10

AD23

RSVD31

GPIO36

TIGERPOINT_ES1_BGA360

TIGERPOINT_ES1_BGA360

GPIO36

091105 change TigerPoint P art Number to SA000039N90091203 add R296 10K PD for customer recognize

+VCCP

H_FERR#

Close to TigerPoint
pin

TGP

TGP

R198

R198
56_0402_5%

56_0402_5%

SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP
SATA1RXN
SATA1RXP
SATA1TXN
SATA1TXP

SATA

SATA

SATA_CLKN
SATA_CLKP

SATARBIAS#

SATARBIAS

SATALED#

HOST

HOST

THRMTRIP#

A20GATE

A20M#

CPUSLP#

IGNNE#

INIT3_3V#

INIT#
INTR

FERR#

RCIN#

SERIRQ

SMI#

STPCLK#

3

3

3

AE6
AD6

SATA_ITX_C_DRX_N0

AC7

SATA_ITX_C_DRX_P0

AD7
AE8
AD8
AD9
AC9

AD4
AC4

AD11
AC11
AD25

U16
Y20
Y21
Y18
AD21
AC25
AB24
Y22
T17

NMI

AC21
AA16
AA21
V18
AA20

SATA_LED#

GATEA20
H_A20M#

H_IGNNE#

H_INIT#
H_INTR
H_FERR#
H_NMI
KB_RST#
SERIRQ
H_SMI#
H_STPCLK#

SATARBIAS

SATA_DTX_C_IRX_N0 <21>
SATA_DTX_C_IRX_P0 <21>

SATA_ITX_C_DRX_N0 <21>
SATA_ITX_C_DRX_P0 <21>

Del SATA1 04/30

CLK_PCIE_SATA# <13>
CLK_PCIE_SATA <13>

R154 24.9_0402_1%R154 24.9_0402_1%

SATA_LED# <21>

GATEA20 <31>

H_A20M# <5>

H_IGNNE# <5>

H_INIT# < 5>
H_INTR <5>
H_FERR# <5>
H_NMI <5>

KB_RST# <31>

SERIRQ <31>
H_SMI# <5>
H_STPCLK# <5>

Placed within 500 mils of Tiger point chipset pin.

+VCCP

12

R164

R164

56_0402_5%

56_0402_5%

SATA_LED#

GATEA20

SERIRQ

56 ohm±5% pull-up resistor has
to be within 1" from the Tiger
Point chipset.

H_THERMTRIP# <5>

2

R45

R45

10K_0402_5%

10K_0402_5%

R293

R293

10K_0402_5%

10K_0402_5%

R312

R312

10K_0402_5%

10K_0402_5%

1

+3VS

ESD request

@

H_THERMTRIP#

H_A20M#

H_IGNNE#

H_INIT#

H_INTR

H_FERR#

H_NMI

H_SMI#

H_STPCLK#

@

C458 100P_0402_50V8J

C458 100P_0402_50V8J

1 2

@

@

C450 100P_0402_50V8J

C450 100P_0402_50V8J

1 2

@

@

C451 100P_0402_50V8J

C451 100P_0402_50V8J

1 2

@

@

C452 100P_0402_50V8J

C452 100P_0402_50V8J

1 2

@

@

C453 100P_0402_50V8J

C453 100P_0402_50V8J

1 2

C454 470P_0402_50V8JC454 470P_0402_50V8J

1 2

@

@

C455 100P_0402_50V8J

C455 100P_0402_50V8J

1 2

@

@

C456 100P_0402_50V8J

C456 100P_0402_50V8J

1 2

@

@

C457 100P_0402_50V8J

C457 100P_0402_50V8J

1 2

091216 change value of C454 to 470P

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

http://laptop-motherboard-schematic.blogspot.com/

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/10/09 2010/10/09

2009/10/09 2010/10/09

2009/10/09 2010/10/09

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

Tigerpoint(2/4)

Tigerpoint(2/4)

Tigerpoint(2/4)

NAVD0 LA-6091P

NAVD0 LA-6091P

NAVD0 LA-6091P

1

1.0

1.0

18 46Wednesday, March 03, 2010

18 46Wednesday, March 03, 2010

18 46Wednesday, March 03, 2010

1.0

of

of

of

5

091212 Add C30 near PCH
to prevent switch noise

HDA_SDIN0

C30 100P_0402_50V8J@C30 100P_0402_50V8J@

1 2

D D

ICH_SMBCLK

ICH_SMBDATA

091212 Add C17 C18 near U72
to prevent switch noise

HDA_BITCLK_AUDIO<28,30>
HDA_RST_AUDIO#<28,30>

HDA_SDOUT_AUDIO<28,30>
HDA_SYNC_AUDIO<28,30>

CLK_PCH_14M<13>

C C

For EMI, Close to TigerPoint

Change EC_LID_OUT# From GPIO13 to GPIO11
06/08

B B

+RTCVCC

A A

C17 100P_0402_50V8JC17 100P_0402_50V8J

1 2

C18 100P_0402_50V8JC18 100P_0402_50V8J

1 2

LPC_AD0<31>
LPC_AD1<31>
LPC_AD2<31>
LPC_AD3<31>

LPC_FRAME#<31>

33_0402_5%

33_0402_5%
33_0402_5%

HDA_SDIN0<28>

+3VALW

10K_0402_5%

10K_0402_5%

10K_0402_5%

10K_0402_5%

10K_0402_5%

10K_0402_5%

8.2K_0402_5%

8.2K_0402_5%

1K_0402_5%

1K_0402_5%

8.2K_0402_5%

8.2K_0402_5%

10K_0402_5%

10K_0402_5%

8.2K_0402_5%

8.2K_0402_5%

+RTCVCC

Change J3 to R1184 4/29
20100129 Add J14 for RTCRST#

33_0402_5%

33_0402_5%

33_0402_5%

12

R337

R337
33_0402_5%

33_0402_5%

@

@

1

C433

C433

@

@

22P_0402_50V8J

22P_0402_50V8J

2

ICH_SMBCLK<13>

ICH_SMBDATA<13>

R1472.2K_0402_5% R1472.2K_0402_5%

1 2

R1482.2K_0402_5% R1482.2K_0402_5%

1 2

R40

R40

R44

R44

R43

R43

R239

R239

R145

R145

1 2

R3910K_0402_5% R3910K_0402_5%

R240

R240

R36

R36

R3148.2K_0402_5% R3148.2K_0402_5%

R3158.2K_0402_5% R3158.2K_0402_5%

R316

R316

R3018.2K_0402_5% R3018.2K_0402_5%

1M_0402_5%

1M_0402_5%

R146

R146

1 2

R197

R197

1 2

332K_0402_1%

332K_0402_1%

R196

R196

1 2

20K_0402_5%

20K_0402_5%

@

@

12

R1184

R1184

C230

C230

1U_0603_10V4Z~D

1U_0603_10V4Z~D

1 2

J14

J14

2

112

JUMP_43X39@

JUMP_43X39@

12

12

12

PM_BATT_LOW#

ICH_PCIE_WAKE#

12

12

0_0402_5%

0_0402_5%

5

R160

R160

1 2

R158

R158

1 2

R159

R159

1 2

R15733_0402_5% R15733_0402_5%

1 2

RTCX1
RTCX2
RTCRST#

SMBALERT#
ICH_SMBCLK
ICH_SMBDATA
LINKALERT#
SMLINK0
SMLINK1

ICH_SMBCLK

ICH_SMBDATA

LINKALERT#

SMLINK0

SMLINK1

SYS_RST#

ICH_RI#

EC_LID_OUT#

GPIO12

GPIO14

GPIO15

SMBALERT#

INTRUDER#

INTVRMEN

RTCRST#

091105 change TigerPoint P art Number to SA000039N90

U72D

U72D

AA5

LDRQ1#/GPIO23

V6

LAD0/FWH0

AA6

LAD1/FWH1

Y5

LAD2/FWH2

W8

LAD3/FWH3

Y8

LDRQ0#

Y4

HDA_BITCLK
HDA_RST#

HDA_SDOUT
HDA_SYNC

LFRAME#/FWH4

P6

HDA_BIT_CLK

U2

HDA_RST#

W2

HDA_SDIN0

V2

HDA_SDIN1

P8

HDA_SDIN2

AA1

HDA_SDOUT

Y1

HDA_SYNC

AA3

CLK14

U3

EE_CS

AE2

EE_DIN

T6

EE_DOUT

EPROM

V3

T4
P7

B23
AA2
AD1
AC2

W3

T7
U4

W4

V5
T5

E20
H18

E23
H21

F25

F24

R2
T1

M8

P9
R4

HDA_BITCLK_AUDIO

EPROM

EE_SHCLK

LAN_CLK
LANR_RSTSYNC
LAN_RST#
LAN_RXD0
LAN_RXD1
LAN_RXD2
LAN_TXD0
LAN_TXD1
LAN_TXD2

RTCX1
RTCX2
RTCRST#

SMBALER T#/GPIO11
SMBCLK
SMBDATA
LINKALERT#
SMLINK0
SMLINK1

SPI_MISO
SPI_MOSI
SPI_CS#
SPI_CLK
SPI_ARB

TIGERPOINT_ES1_BGA360

TIGERPOINT_ES1_BGA360

10K_0402_5%

10K_0402_5%

+3VS

10K_0402_5%

10K_0402_5%

8.2K_0402_5%

8.2K_0402_5%

8.2K_0402_5%

8.2K_0402_5%

8.2K_0402_5%

8.2K_0402_5%

8.2K_0402_5%

8.2K_0402_5%

091020 add R806 22ohm for 3G noise solution
0111 Change BOM Structure of R806 and C1214 from @ to mount
0111 Change R806 value from 22_0402_5% ohm to 0_0402_5%
2003 delete R806 for RF

Del R203 (pull-up GPIO6 Resister) 06/08

0120 Change C368,C371 from 15p to 12p

C368

C368

12P_0402_50V8J

12P_0402_50V8J

32.768KHZ_12.5PF_Q13MC14610002

32.768KHZ_12.5PF_Q13MC14610002

12P_0402_50V8J

12P_0402_50V8J

Routing the trace at least 10mil

1 2

Y3

Y3

2

OSC

NC

3

OSC

NC

C371

C371

1 2

1

4

http://laptop-motherboard-schematic.blogspot.com/

TGP

TGP

LPC

LPC

AUDIO

AUDIO

LAN

LAN

RTC

RTC

SMB

SMB

SPI

SPI

R37

R37

R3810K_0402_5% R3810K_0402_5%

R42

R42

R295

R295
R368

R368
R302

R302
R241

R241

12

12

12

4

BMBUSY#/GPIO0

DPRSLPVR

STP_PCI#

STP_CPU#

CLKRUN#

CPUPW RGD/GPIO49

VRMPWRGD
MCH_SYNC#

MISC

MISC

PWRBTN#

SUS_STAT#/LPCPD#

SYS_RESET#

INTRUDER#

RSMRST#

INTVRMEN

BATLOW#

DPRSTP#

T_PWROK

EC_RSMRST#R

MCH_SYNC#

GPIO7

EC_THERM#

GPIO0

PM_CLKRUN#

1 2

C1214 22P_0402_50V 8JC1214 22P _0402_50V8J

12

R288

R288

10M_0402_5%

10M_0402_5%

4

@

@

EVQPLHA15_4P

EVQPLHA15_4P

1

2

6

20100120 change SW2 from mount to @

GPIO0

T15

CRT_DET

W16

GPIO6
GPIO7
GPIO8

GPIO9
GPIO10
GPIO12
GPIO13
GPIO14
GPIO15

GPIO24
GPIO25
GPIO26
GPIO27
GPIO28

GPIO33
GPIO34
GPIO38
GPIO39

THRM#

RI#

SUSCLK

PLTRST#

WAKE#

PWROK

SPKR

SLP_S3#
SLP_S4#
SLP_S5#

DPSLP#
RSVD31

RTCX1

0112 Add R1379,R1380 10K_0402_5% for GPIO39

RTCX2

W14
K18
H19
M17
A24
C23
P5
E24
AB20
Y16
AB19
R3
C24
D19
D20
F22
AC19
U14
AC1
AC23
AC24

AB22

AB17
V16
AC18
E21
H23
G22
D22
G18
G23
C25
T8
U10
AC3
AD3
J16

H20
E25
F21

B25
AB23
AA18
F20

GPIO38

GPIO7
EC_SMI#
EC_SCI#
ACIN_C
GPIO12
EC_LID_OUT#
GPIO14
GPIO15

R17

R17

R367

R367

1 2

1K_0402_5%

1K_0402_5%

PM_CLKRUN#

GPIO38
GPIO39

H_PWRGD

EC_THERM#
VGATE
MCH_SYNC#
PBTN_OUT#
ICH_RI#

SYS_RST#
PLTRST#
ICH_PCIE_WAKE#
INTRUDER#
T_PWROK
EC_RSMRST#R
INTVRMEN
SB_SPKR

PM_BATT_LOW#
H_DPRSTP#
H_DPSLP#

+3VS

R1376

R1376
10K_0402_5%

10K_0402_5%

D0@

D0@

1 2

R1377

R1377
10K_0402_5%

10K_0402_5%

E0@

E0@

1 2

GPIO39

12

+3VS

3

2

PCIE Port List

SW2

SW2

RTCRST#RTCRST#

3

4

5

1

2

3

LAN

WLAN
WWAN

4

DMI_TX#0<4>

CRT_DET <15>

EC_SMI# <31>
EC_SCI# <31>

EC_LID_OUT# <31>

0_0402_5%

0_0402_5%

R1380

R1380

8.2K_0402_5%

8.2K_0402_5%

NON3G_LCD@

NON3G_LCD@

R1379

R1379

8.2K_0402_5%

8.2K_0402_5%

3G_LG@

3G_LG@

PM_DPRSLPVR <5>
H_STP_PCI# <13>
H_STP_CPU# <13>

PCIE_DTX_C_IRX_N1<26>
PCIE_DTX_C_IRX_P1<26>
PCIE_ITX_C_DRX_N1<26>
PCIE_ITX_C_DRX_P1<26>
PCIE_DTX_C_IRX_N2<25>

H_PWRGD <5>

EC_THERM# <31>

PBTN_OUT# <31>

PLTRST# <5,8,24,25,26,31>

ICH_PCIE_WAKE# <24,25>

SB_SPKR <29>

PM_SLP_S3# <31>
PM_SLP_S4# <31>
PM_SLP_S5# <31>

H_DPRSTP# <5>
H_DPSLP# <5>

T_PWROK VGATE

ACIN_C ACIN

+3VALW

Security Classifica tion

Security Classifica tion

Security Classifica tion

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHO UT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHO UT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHO UT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

PCIE_DTX_C_IRX_P2<25>
PCIE_ITX_C_DRX_N2<25>
PCIE_ITX_C_DRX_P2<25>
PCIE_DTX_C_IRX_N3<24>
PCIE_DTX_C_IRX_P3<24>
PCIE_ITX_C_DRX_N3<24>
PCIE_ITX_C_DRX_P3<24>
PCIE_CRX_GTX_N0<8>
PCIE_CRX_GTX_P0<8>
PCIE_CTX_GRX_N0<8>
PCIE_CTX_GRX_P0<8>

091212 Add C50 near PCH
to prevent switch noise

1 2

1 2

R223

R223

100K_0402_5%

100K_0402_5%

+RTCVCC

1

C1148

C1148

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

3

USB_OC#0

C50 100P_0402_50V8J@C50 100P_0402_50V8J@

0_0402_5%

0_0402_5%

R310

R310

@

@

R311

R311

0_0402_5%

0_0402_5%

D25 RB751V_SOD323D25 RB751V_SOD323

2 1

12

R222

R222

@

@

0_0402_5%

0_0402_5%

D37

D37

3

BAS40-04_SOT23-3

BAS40-04_SOT23-3

Add +RTCVCC circuit 06/12

2009/10/09 2010/10/09

2009/10/09 2010/10/09

2009/10/09 2010/10/09

DMI_TX0<4>
DMI_RX#0<4>
DMI_RX0<4>
DMI_TX#1<4>
DMI_TX1<4>
DMI_RX#1<4>
DMI_RX1<4>

C565

C565

0.1U_0402_10V7K

0.1U_0402_10V7K

C566 0.1U_0402_10V7KC566 0.1U_0402_10V7K

C53

C53

0.1U_0402_10V7K

0.1U_0402_10V7K

C49 0.1U_0402_10V7KC49 0.1U_0402_10V7K

C52

C52

0.1U_0402_10V7K

0.1U_0402_10V7K

C54 0.1U_0402_10V7KC54 0.1U_0402_10V7K

VGA@

VGA@

C1277 0.1U_0402_10V7K

C1277 0.1U_0402_10V7K

0.1U_0402_10V7K

0.1U_0402_10V7K

C1278

C1278

VGA@

VGA@

09/10/08 Add PCIE to GPU

1 2

+1.5VS

CLK_PCIE_PCH#<13>
CLK_PCIE_PCH<13>

VGATE <5,13,31,42>

PCH_POK <5,31>

12

+RTCBATT_R

1

ACIN

ACIN <31,38>

+RTCBATT

R1370

R1370

1 2

1K_0402_5%

1K_0402_5%

2

+CHGRTC

Compal Secret Data

Compal Secret Data

Compal Secret Data

PCIE_ITX_C_DRX_N1_R
PCIE_ITX_C_DRX_P1_R

PCIE_ITX_C_DRX_N2_R
PCIE_ITX_C_DRX_P2_R

PCIE_ITX_C_DRX_N3_R
PCIE_ITX_C_DRX_P3_R

PCIE_CTX_C_GRX_N0

PCIE_CTX_C_GRX_P0

R153 24.9_0402_1%R153 24.9_0402_1%

1 2

DMI_COMP

PLTRST#

For ESD

0118 Change C1158 from 220p to 100K ohm
0131 Change C1158 symbol

Deciphered Date

Deciphered Date

Deciphered Date

2

R225 0_0402_5%

R225 0_0402_5%

USB20_N1_R
USB20_P1_R

R226 0_0402_5%

R226 0_0402_5%

USB20_N1

@

@

12

USB20_P1

@

@

12

091105 change TigerPoint P art Number to SA000039N90

TGP

R1598

R1598

TGP

USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P

DMI PCI-E

DMI PCI-E

USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P

OC0#
OC1#
OC2#
OC3#

USB

USB

OC4#
OC5#/GPIO29
OC6#/GPIO30
OC7#/GPIO31

USBRBIAS

USBRBIAS#

CLK48

2

2

091113 change net name from
USB_OC#0_1 to USB_OC#0
add net name USB _OC#1

091020 change net name from
USB_OC#3/4/5/6/7 to USB_OC#3_7

M18
M19

M21

W23
W24

R23
R24
P21
P20
T21
T20
T24
T25
T19
T18
U23
U24

V21
V20
V24
V23

K21
K22

J23

J24

K24
K25

L23

L24

L22

P17
P18
N25
N24

H24

J22

U72B

U72B

DMI0RXN
DMI0RXP
DMI0TXN
DMI0TXP
DMI1RXN
DMI1RXP
DMI1TXN
DMI1TXP
DMI2RXN
DMI2RXP
DMI2TXN
DMI2TXP
DMI3RXN
DMI3RXP
DMI3TXN
DMI3TXP

PERN1
PERP1
PETN1
PETP1
PERN2
PERP2
PETN2
PETP2
PERN3
PERP3
PETN3
PETP3
PERN4
PERP4
PETN4
PETP4

DMI_ZCOMP
DMI_IRCOMP

DMI_CLKN
DMI_CLKP

TIGERPOINT_ES1_BGA360

TIGERPOINT_ES1_BGA360

12

100K_0402_5%

100K_0402_5%

RSMRST circuit

R372

R372

0_0402_5%

0_0402_5%

1 2

Q30

Q30

C

C

1

3

E

EC_RSMRST#<31>

2.2K_0402_5%@

2.2K_0402_5%@

BAV99DW-7_SOT363

BAV99DW-7_SOT363

R374

R374

D28B

D28B

1 2

R375

R375

1 2

@

@

E

MMBT3906_SOT23-3@

MMBT3906_SOT23-3@

B

B

2

R373 4.7K_0402_5%@R373 4.7K_0402_5%@

4

5

1

2

@

@

D28A

D28A
BAV99DW-7_SOT363

3

2.2K_0402_5%@

2.2K_0402_5%@

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

BAV99DW-7_SOT363

6

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Tigerpoint(3/4)

Tigerpoint(3/4)

Tigerpoint(3/4)

USB20_N1 <24>
USB20_P1 <24>

091204 add USB20_N1/P1 for
SIM CARD Conn.

USB20_N0

H7

USB20_P0

H6

USB20_N1_R

H3

USB20_P1_R

H2

USB20_N2

J2

USB20_P2

J3

USB20_N3

K6

USB20_P3

K5

USB20_N4

K1

USB20_P4

K2

USB20_N5

L2

USB20_P5

L3
M6
M5

USB20_N7

N1
N2

USB_OC#0

D4

USB_OC#3_7

C5

USB_OC#2

D3

USB_OC#3_7

D2
E5
E6
C2
C3

G2

USBRBIAS

G3

CLK_PCH_48M

F4

For EMI, Close to TigerPoint

USB_OC#0

USB_OC#2
USB_OC#3_7

EC_RSMRST#R

1 2

NAVD0 LA-6091P

NAVD0 LA-6091P

NAVD0 LA-6091P

1

USB Port List

0

USB Left1

1

2

USB Right2

3

CMOS

4

CardReader

WWAN

5

BT

6

WIMAX

7

USB20_N0 <23>
USB20_P0 < 23>

USB20_N2 <23>
USB20_P2 < 23>
USB20_N3 <14>
USB20_P3 < 14>
USB20_N4 <27>
USB20_P4 < 27>
USB20_N5 <24>

R152

R152

22.6_0402_1%

22.6_0402_1%

C434

C434
22P_0402_50V8J

22P_0402_50V8J

+3VALW

19 46Wednesday, March 03, 2010

19 46Wednesday, March 03, 2010

19 46Wednesday, March 03, 2010

USB20_P5 < 24>
USB20_N6 <24>
USB20_P6 < 24>
USB20_N7 <25>
USB20_P7 < 25>

USB_OC#0 <23>

USB_OC#2 <23>

CLK_PCH_48M <13>

+3VALW

of

of

of

USB20_N6
USB20_P6

USB20_P7

12

R338

R338
33_0402_5%

33_0402_5%

@

@

1

@

@

2

R47 10K_0402_5%R47 10K_0402_5%

R49 10K_0402_5%R49 10K_0402_5%
R48 10K_0402_5%R48 10K_0402_5%

1

1.0

1.0

1.0

5

4

3

2

1

091105 change TigerPoint Part Number to SA000039N90

TGP

U72E

D D

+3VS+5VS

12

R33

R33

100_0402_5%

100_0402_5%

+5VALW

C C

B B

R35

R35

10_0402_5%

10_0402_5%

12

D12

D12
RB751V-40_SOD323-2

RB751V-40_SOD323-2

1 2

1

C59

C59

1U_0402_6.3V6K

1U_0402_6.3V6K

2

+3VALW

D10

D10
RB751V-40_SOD323-2

RB751V-40_SOD323-2

1 2

1

C40

C40

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

+V5REF_RUN

+V5REF_SUS

U72E

TIGERPOINT_ES1_BGA360

TIGERPOINT_ES1_BGA360

TGP

POWER

POWER

VCC5REF

VCC5REF_SUS

VCCSATAPLL

VCCRTC

VCCDMIPLL

VCCUSBPLL

V_CPU_IO

VCC1_5_1
VCC1_5_2
VCC1_5_3
VCC1_5_4

VCC1_05_1
VCC1_05_2
VCC1_05_3
VCC1_05_4

VCC3_3_1
VCC3_3_2
VCC3_3_3
VCC3_3_4
VCC3_3_5
VCC3_3_6

VCCSUS3_3_1
VCCSUS3_3_2
VCCSUS3_3_3
VCCSUS3_3_4

+V5REF_RUN

F12

+V5REF_SUS

F5

+SATAPLL

Y6

AE3

+DMIPLL

Y25

F6

W18

AA8
M9
M20
N22

J10
K17
P15
V10

H25
AD13
F10
G10
R10
T9

F18
N4
K7
F1

5

5

10mA

14mA

1.3A

0.98A

0.29A

0.13A

6mA

10mA

50mA

+VCCP

1

C41 0.1U_0402_16V4ZC41 0.1U_0402_16V4Z

2

1

C48

C48

2

1

1

C60

C60

C46

C46

2

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

1

C43

C43

C37

C37

2

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

1

C39

C39

C44

C44

2

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C45

C45

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C63

C63

2

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1

C38

C38

2

1U_0402_6.3V6K

1U_0402_6.3V6K

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C463

C463

2

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1

C42

C42

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

1

C62

C62

C61

C61

2

2

1U_0402_6.3V6K

1U_0402_6.3V6K

1

C460

C460

2

10U_0603_6.3V6M

10U_0603_6.3V6M

1

1

C462

C462

C461

C461

2

2

1U_0402_6.3V6K

1U_0402_6.3V6K

+3VALW

1

C47

C47

2

0.01U_0402_16V7K

0.01U_0402_16V7K

1

C459

C459

2

10U_0603_6.3V6M

10U_0603_6.3V6M

1U_0402_6.3V6K

1U_0402_6.3V6K

+VCCP

+3VS

1U_0402_6.3V6K

1U_0402_6.3V6K

+RTCVCC

+1.5VS

091105 change TigerPoint Part Number to SA000039N90

TGP

U72F

TGP

U72F

A1

VSS01

A25

VSS02

B6

VSS03

B10

VSS04

B16

VSS05

B20

VSS06

B24

VSS07

E18

VSS08

F16

VSS09

G4

VSS10

G8

VSS11

H1

VSS12

H4

VSS13

H5

VSS14

K4

VSS15

K8

VSS16

K11

VSS17

K19

VSS18

K20

VSS19

L4

VSS20

M7

VSS21

M11

VSS22

N3

VSS23

N12

VSS24

N13

VSS25

N14

VSS26

N23

VSS27

P11

VSS28

P13

VSS29

P19

VSS30

R14

VSS31

R22

VSS32

T2

VSS33

T22

VSS34

V1

VSS35

V7

VSS36

V8

VSS37

V19

VSS38

V22

VSS39

V25

VSS40

W12

VSS41

W22

VSS42

Y2

VSS43

Y24

VSS44

AB4

VSS45

AB6

VSS46

AB7

VSS47

AB8

VSS48

AC8

VSS49

AD2

VSS50

AD10

VSS51

AD20

VSS52

AD24

VSS53

AE1

VSS54

AE10

VSS55

AE25

VSS56

Place closely pin Y25 within 100mlis.

G24

+1.5VS

R30

R30

1 2

0_0603_5%

0_0603_5%

10U_0603_6.3V6M

10U_0603_6.3V6M

C58

C58

0.01U_0402_16V7K

0.01U_0402_16V7K

1

1

C28

C28

2

2

+DMIPLL

1

C464

C464

2

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

TIGERPOINT_ES1_BGA360

TIGERPOINT_ES1_BGA360

VSS57
VSS58
VSS59

RSVD32

AE13
F2

AE16

Place closely pin Y6 within 100mlis.

+1.5VS

R29

R29

1 2

0_0603_5%

0_0603_5%

A A

10U_0603_6.3V6M

10U_0603_6.3V6M

5

1

1

C57

C57

2

2

+SATAPLL

C27

C27

0.1U_0402_16V4Z

0.1U_0402_16V4Z

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THI S SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THI S SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DI VISION OF R&D

AND TRADE SECRET INFORMATION. THI S SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DI VISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL EL ECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATIO N IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL EL ECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATIO N IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL EL ECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATIO N IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

http://laptop-motherboard-schematic.blogspot.com/

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/10/09 2010/10/09

2009/10/09 2010/10/09

2009/10/09 2010/10/09

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

Tigerpoint(4/4)

Tigerpoint(4/4)

Tigerpoint(4/4)

NAVD0 LA-6091P

NAVD0 LA-6091P

NAVD0 LA-6091P

20 46Wednesday, March 03, 2010

20 46Wednesday, March 03, 2010

20 46Wednesday, March 03, 2010

1

1.0

1.0

1.0

of

of

of

A

B

C

D

E

F

G

H

LED PCB CONN

JP18

4

JP18

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

11

GND

12

12

GND

13

13

14

14

15

15

16

16

ACES_85201-1605N

ACES_85201-1605N

CONN@

CONN@

MEDIA_LED#

17
18

09/30 add ESD

JP21

JP21

+3VS

C247

C247

1U_0402_6.3V6K

1U_0402_6.3V6K

1

1

2

2

C1398

C1398
47P_0402_50V8J

47P_0402_50V8J

WWAN_LED#
WLAN_LED#
BT_LED#

2

3

1

1

1

2

2

3

3

4

6

4

G1

5

7

5

G2

ACES_85201-0505N

ACES_85201-0505N

CONN@

CONN@

D32

D32
ROW PJSOT05C 3P C/A SOT-23

ROW PJSOT05C 3P C/A SOT-23

1 1

2 2

PWR_LED#<31>
PWR_SUSP_LED#<31>
BATT_GRN_LED#<31>
BATT_AMB_LED#<31>

NUM_LED#<31>

CAPS_LED#<31>

BT_LED#<31>

WWAN_LED#<24,25>
WLAN_LED#<24,25>

CARD_LED#<27>

SATA_LED#<18>

+3VALW

SATA_LED#

+3VS

MEDIA_LED#
NUM_LED#
CAPS_LED#
BT_LED#

WWAN_LED#
WLAN_LED#

+3VS

5

U29

U29

2

B

1

A

3

P

G

Y

NC7SZ08P5X_NL_SC70-5

NC7SZ08P5X_NL_SC70-5

@

@

R805 0_0402_5% R805 0_0402_5%

1 2

0108 Add C247,C1398 on pin1 of JP21 (RF)

SATA HDD Conn.

JSATA1

3 3

4 4

SATA_ITX_C_DRX_P0<18>

SATA_ITX_C_DRX_N0<18>

SATA_DTX_C_IRX_N0<18>

SATA_DTX_C_IRX_P0<18>

+5VS

1000P_0402_50V7K

1000P_0402_50V7K

A

1

C423

C423

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

SATA_ITX_C_DRX_P0

SATA_ITX_C_DRX_N0 SATA_ITX_DRX_N0

SATA_DTX_C_IRX_N0

SATA_DTX_C_IRX_P0

1

1

C426

C426

2

C422

C422

1U_0402_6.3V6K

1U_0402_6.3V6K

2

B

1 2

1 2

1

C419

C419
10U_0603_6.3V6M

10U_0603_6.3V6M

2

C32

C32

C31

C31

C380

C380

0.01U_0402_16V7K

0.01U_0402_16V7K

0.01U_0402_16V7K

0.01U_0402_16V7K

C383

C383

SATA_ITX_DRX_P0

0.01U_0402_16V7K

0.01U_0402_16V7K

0.01U_0402_16V7K

0.01U_0402_16V7K

SATA_DTX_IRX_N0

SATA_DTX_IRX_P0

+3VS

+5VS

http://laptop-motherboard-schematic.blogspot.com/

C

JSATA1

1

GND

2

A+

3

A-

4

GND

5

B-

6

B+

7

GND

8

V33

9

V33

10

V33

11

GND

12

GND

13

GND

14

V5

15

V5

16

V5

17

GND

18

Reserved

19

GND

20
21
22

SUYIN_127043FR022G263ZR_NR

SUYIN_127043FR022G263ZR_NR

CONN@

CONN@

091116 change symbol of JSATA1 to
SUYIN_127043FR022G263ZR_NR

23

V12

GND1

24

V12

GND2

V12

D

Security Classifica tion

Security Classifica tion

Security Classifica tion

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOU T PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOU T PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOU T PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/10/09 2010/10/09

2009/10/09 2010/10/09

2009/10/09 2010/10/09

E

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

F

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

B

B

B

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

LED/HDD/Function Board CONN.

LED/HDD/Function Board CONN.

LED/HDD/Function Board CONN.

NAVD0 LA-6091P

NAVD0 LA-6091P

G

NAVD0 LA-6091P

21 46Wednesday, March 03, 2010

21 46Wednesday, March 03, 2010

21 46Wednesday, March 03, 2010

of

of

of

H

1.0

1.0

1.0

D0@

D0@

D0@

D0@

+3VALW

12

21

SW1

SW1

SW1

EVQPLHA15_4P

EVQPLHA15_4P

1

(BLUE)

51 +-5% 0402

51 +-5% 0402
R1388

R1388

LED1

LED1
HT-191NB5-DT BLUE 0603

HT-191NB5-DT BLUE 0603

PWR_PWM_LED# 51ON#

2

ON/OFFBTN#

PWR_PWM_LED#

PWR_PWM_LED#

ON/OFFBTN#

3

4

5

6

D0@

D0@

D2

D2

3

2

PJSOT24C_SOT23-3

PJSOT24C_SOT23-3

C2 100P_0402_50V8J@C2 100P_0402_50V8J@

1 2

C3 100P_0402_50V8J@C3 100P_0402_50V8J@

1 2

ON/OFFBTN#

1

D0@

D0@

ON/OFFBTN#

C19 100P_0402_50V8JC19 100P_0402_50V8J

091212 Add C19 near D14
to prevent switch noise

1 2

7236LGH

R186

R186

0_0805_5%

0_0805_5%

R194

R194

0_0805_5%

0_0805_5%

%RWWRP6LGH

ON/OFFBTN#

EC_ON<31>

@

@

@

@

12

12

EC_ON

10K_0402_5%

10K_0402_5%

1

DAN202U_SC70

DAN202U_SC70

R3

R3

1 2

D14

D14

2

G

G

+3VALW

2

3

1 2

13

D

D

S

S

R1347

R1347

100K_0402_5%

100K_0402_5%

ON/OFF#

2

C4

C4

1000P_0402_50V7K

1000P_0402_50V7K

1

Q1

Q1
2N7002W-T/R7_SOT323-3

2N7002W-T/R7_SOT323-3

12

D1

@D1

@

RLZ20A_LL34

RLZ20A_LL34

ON/OFF# <31>

51ON# <36>

PWR/B Conn

091019 Change +3VS to +3VALW

+3VALW

ON/OFFBTN#

PWR_PWM_LED#<31>

PWR_PWM_LED#

C246

C246

1U_0402_6.3V6K

1U_0402_6.3V6K

0108 Add C246,C1397 on pin1 of JP23

http://laptop-motherboard-schematic.blogspot.com/

1

1

2

2

C1397

C1397
47P_0402_50V8J

47P_0402_50V8J

JP23

JP23

1

1

2

2

3

3

4

4

5

G1

6

G2

ACES_85201-0405N

ACES_85201-0405N

CONN@

CONN@

LID Switch

+3VALW

C155

C155

0.1U_0402_16V4Z

0.1U_0402_16V4Z

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/10/09 2010/10/09

2009/10/09 2010/10/09

2009/10/09 2010/10/09

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

VDD

1

OUTPUT

GND

2

U5

U5

1

APX9132ATI-TRL SOT-23 3P

APX9132ATI-TRL SOT-23 3P

3

1

C150

C150

2

Del R103 05/12

10P_0402_50V8J

10P_0402_50V8J

LID_SW# <31>

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

B

B

B

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

ON/OFF / PWR/B CONN./ LID SW

ON/OFF / PWR/B CONN./ LID SW

ON/OFF / PWR/B CONN./ LID SW

NAVD0 LA-6091P

NAVD0 LA-6091P

NAVD0 LA-6091P

22 46Wednesday, March 03, 2010

22 46Wednesday, March 03, 2010

22 46Wednesday, March 03, 2010

of

of

of

1.0

1.0

1.0

A

B

C

D

E

5/5 Add U2 circuit

VOUT
VOUT

+USB_VCCC+5VALW

8
7
6
5

FLG

1

2

C819

C819

USB_OC#2 <19>USB_ON#<31>

1000P_0402_50V7K@

1000P_0402_50V7K@

+5VALW

+USB_VCCA

1 1

1U_0603_10V6K

1U_0603_10V6K

C1309

C1309

1

2

1

C1310

C1310

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

USB_ON#<31>

C244

C244

0.1U_0402_16V4Z

0.1U_0402_16V4Z

12

USB_ON#

R224

R224

100K_0402_5%

100K_0402_5%

1 2

U13

U13

1

GND

2

VIN
VIN3VOUT

4

EN

APL3510BKI-TRG SOP 8P PWR SWITCH

APL3510BKI-TRG SOP 8P PWR SWITCH

091014 add for RF Solution

USB_ON#

C51 100P_0402_50V8JC51 100P_0402_50V8J

1 2

091212 Add C51 near U13

USB CONN.1

+USB_VCCA

2

W=40mils

1

C316

C316

470P_0402_50V7K

470P_0402_50V7K

2

+USB_VCCA

1

+

+

C315

PJDLC05C_SOT23-3

PJDLC05C_SOT23-3

@

@

R1

R1
0_0402_5%

0_0402_5%

1 2

1

4

1 2

R2

R2
0_0402_5%

0_0402_5%

@

@

C315

2

3

2

3

D21

D21

2

3

1

USB20_N2_1

USB20_P2_1

150U 6.3V M B LESR45M T520 H1.9

2 2

USB20_N0<19>
USB20_P0<19>

3 3

USB20_N2<19>

USB20_P2<19>

150U 6.3V M B LESR45M T520 H1.9

L5

L5

1

4

WCM2012F2S-900T04_0805

WCM2012F2S-900T04_0805

to prevent switch noise

JUSB1

JUSB1

1

VCC

2

D-

3

D+

4

GND

5

GND1

6

GND2

7

GND3

8

GND4

SUYIN_020133GB004M25MZL

SUYIN_020133GB004M25MZL

CONN@

091119 change JUSB1 to SUYIN_020133GB004M25MZL

CONN@

5/12 Revised net name

VOUT
VOUT

FLG

+USB_VCCC

+USB_VCCA

8
7
6
5

USB20_N2_1

1

C245

C245

1000P_0402_50V7K@

1000P_0402_50V7K@

2

D4

D4

6

CH3

5

Vp

4

CH4

CM1293-04SO_SOT23-6

CM1293-04SO_SOT23-6

@

@

USB_OC#0 <19>

3

CH2

2

Vn

1

CH1

150U 6.3V M B LESR45M T520 H1.9

150U 6.3V M B LESR45M T520 H1.9

USB20_P2_1

+USB_VCCC

1

C10

C10

2

W=40mils

+

+

0.1U_0402_16V4Z

0.1U_0402_16V4Z

USB20_N2_1
USB20_P2_1

1

C8

C8

470P_0402_50V7K

470P_0402_50V7K

2

W=80mils W=80mils

1

C818

C818

2

U8

U8

1

GND

2

VIN
VIN3VOUT

4

EN

APL3510BKI-TRG SOP 8P PWR SWITCH

APL3510BKI-TRG SOP 8P PWR SWITCH

USB CONN. 2

JUSB2

JUSB2

1

VCC

2

D-

3

D+

4

GND

5

GND1

6

GND2

7

GND3

8

GND4

SUYIN_020133GB004M25MZL

SUYIN_020133GB004M25MZL

CONN@

CONN@

4 4

Security Classifica tion

Security Classifica tion

Security Classifica tion

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOU T PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOU T PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

http://laptop-motherboard-schematic.blogspot.com/

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOU T PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2009/10/09 2010/10/09

2009/10/09 2010/10/09

2009/10/09 2010/10/09

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

B

B

B

Date: Sheet

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

USB PORT

USB PORT

USB PORT

NAVD0 LA-6091P

NAVD0 LA-6091P

NAVD0 LA-6091P

23 46Wednesday, March 03, 2010

23 46Wednesday, March 03, 2010

23 46Wednesday, March 03, 2010

E

1.0

1.0

1.0

of

of

of

A

B

C

D

E

Mini-Express Card for WWAN

091019 Remove C1163/C1164/C1165/C1166

1 1

1

2

C505

C505

0.1U_0402_16V4Z

0.1U_0402_16V4Z

+3VS_WWAN

1

C506

C506

2

10U_0805_10V4Z

10U_0805_10V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C507

C507

2

Add C850 06/12

1

C508

C508

0.01U_0402_25V7K

0.01U_0402_25V7K

2

1

C850

C850
47P_0402_50V8J

47P_0402_50V8J

2

EC_TX_P80_DATA<31>
EC_RX_P80_CLK<31>

ICH_PCIE_WAKE#<19,25>

WWAN_CLKREQ#<13>

2 2

3 3

UIM_DATA

C1118

C1118

56P_0402_50V8

56P_0402_50V8

Modifiy 05/11

4 4

USB20_P1<19>
USB20_N1<19>

091204 add USB20_P1/N1 for SIM Card Conn.

EC_TX_P80_DATA
EC_RX_P80_CLK

UIM_VPP UIM_DATA

UIM_RST

1

1

C509

C509

2

2

R12

R12

@

@

@

@

22P_0402_50V8J

22P_0402_50V8J

+UIM_PWR

Reserve for SIM card does not meet rise time
and pull-up is needed.

A

R402 0_0402_5%R402 0_0402_5%

R403 0_0402_5%R403 0_0402_5%

ICH_PCIE_WAKE#

WWAN_CLKREQ#

091106 change EC_TX_P80_DAT A_R
from pin17 to pin49

12

10K_0402_5%

10K_0402_5%

USB20_P1
USB20_N1

1 2
1 2

CLK_PCIE_WWAN#<13>

CLK_PCIE_WWAN<13>

PCIE_DTX_C_IRX_N3<19>
PCIE_DTX_C_IRX_P3<19>

PCIE_ITX_C_DRX_N3<19>
PCIE_ITX_C_DRX_P3<19>

+3VS_WWAN

D15

D15
CM1293-04SO_SOT23-6@

CM1293-04SO_SOT23-6@

1

CH1

2

Vn

3

CH2

UIM_VPP

USB20_P1
USB20_N1

EC_TX_P80_DATA_R
EC_TX_P80_CLK_R

CH4

Vp

CH3

091204 change SIM Card Conn. to
TAITW_PMPAT2-08GLBS7N14N0

JP3

JP3

4

GND

5

VPP

6

I/O

7

DET

8

D+

9

D-

TAITW_PMPAT2-08GLBS7N14N0

100K_0402_5%

100K_0402_5%

10U_0805_10V4Z

10U_0805_10V4Z

1 2

C504

C504

WWAN_WAKEUP_R#

EC_TX_P80_DATA_R
EC_TX_P80_CLK_R

4

5

6

+UIM_PWR

UIM_CLK

R829

R829

VCC

RST
CLK

GND
GND

http://laptop-motherboard-schematic.blogspot.com/

+3VS

3G@

3G@

1 2

R405 0_1206_5%

R405 0_1206_5%

JMINI1

JMINI1

1

1

3

3

5

5

7

7

9

9

11

11

13

13

15

15

17

17

19

19

21

21

23

23

25

25

27

27

29

29

31

31

33

33

35

35

37

37

39

39

41

41

43

43

45

45

47

47

49

49

51

51

53

GND1

GND2

ACES_88910-5204

ACES_88910-5204

CONN@

CONN@

091012 Change Mini PCIE CONN
Symbol to ACES 88910-5204 follow
ME CONN LISTRev08

+UIM_PWR

1

UIM_RST

2

UIM_CLK

3

10
11

CONN@TAITW_PMPAT2-08GLBS7N14N0

CONN@

Add C1114 C1116 C1117 C1118 05/11
Change C512 to 1U_0402 05/14

B

C1117

C1117

56P_0402_50V8

56P_0402_50V8

+3VS_WWAN

2

2

4

4

6

6

8

8

10

10

12

12

14

14

16

16

18

18

20

20

22

22

24

24

26

26

28

28

30

30

32

32

34

34

36

36

38

38

40

40

42

42

44

44

46

46

48

48

50

50

52

52

54

1

1

C510

C510

C511

C511

2

@

@

@

@

2

22P_0402_50V8J

22P_0402_50V8J

NON3G@

NON3G@

1 2

R504 0_1206_5%

R504 0_1206_5%

+UIM_PWR
UIM_DATA
UIM_CLK
UIM_RST
UIM_VPP

WXMIT_OFF#

R506 0_0402_5%

R506 0_0402_5%

R507 0_0402_5%

R507 0_0402_5%

1 2
1 2

R508 0_0402_5%

R508 0_0402_5%

1 2

R511 0_0402_5%@R511 0_0402_5%@

0104 Modify netname WWAN_LED_R# to WWAN_LED#, WLAN_LED_R# to WLAN_LED#

USB20_N5_1

USB20_P5_1

1

1

C1116

C1116

2

2

22P_0402_50V8J

22P_0402_50V8J

+3VALW

150U_B_6.3VM_R40M

150U_B_6.3VM_R40M

091125 change 3G SKU power from +3VALW to +3VS

+1.5VS

1 2

NON3G@

NON3G@

NON3G@

NON3G@
NON3G@

NON3G@

USB20_N5_1
USB20_P5_1

1

1

C512

C512

C513

C513

2

2

56P_0402_50V8

56P_0402_50V8

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1U_0402_6.3V6K

1U_0402_6.3V6K

C

WXMIT_OFF# <31>
PLTRST# <5,8,19,25,26,31>

CLK_SMBCLK <7,13>

CLK_SMBDATA <7,13>

WWAN_LED# <21,25>
WLAN_LED# <21,25>

R8260_0402_5% R 8260_0402_5%

@ L4

@

2

2

3

3

WCM2012F2S-900T04_0805

WCM2012F2S-900T04_0805

R8270_0402_5% R 8270_0402_5%

091102 add L4/R826/R827 on USB port5
follow RF team review

1

2

C1114

C1114

56P_0402_50V8

56P_0402_50V8

2009/10/09 2010/10/09

2009/10/09 2010/10/09

2009/10/09 2010/10/09

12

L4

1

4

12

1

4

USB20_N5

USB20_P5

(9~16mA)

USB20_N5 <19>

USB20_P5 <19>

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

091106 add R829 100K PD to GND

C403

@+C403

@

BT_ON#<31>

+3VS_WWAN

1

+

Close to WWA N CONN

2

USB20_P6<19>
USB20_N6<19>

D

091212 Add C20, C21
near JMINI1
to prevent switch noise

R501

R501

12

10K_0402_5%

10K_0402_5%

BT@

BT@

WWAN_WAKEUP#<31>

+3VS

USB20_P6
USB20_N6

UIM_VPP

C20 100P_0402_50V8J@C20 100P_0402_50V8J@

UIM_DATA

1

C411

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

+3VS

10K_0402_5%

10K_0402_5%

BT MODULE CONN

BT@C411

BT@

Q35

Q35
AO3413_SOT23-3

AO3413_SOT23-3

S

S

BT@

BT@

G

G

2

+3VALW

12

R509

R509

3G@

3G@

1 2

R510 0_0402_5%

R510 0_0402_5%

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

1 2

C21 100P_0402_50V8J@C21 100P_0402_50V8J@

1 2

+3VS_BT

BT@

BT@

C502

C502

D

D

13

+3VS_BT

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

12

0.1U_0402_16V4Z

0.1U_0402_16V4Z

JBT1

JBT1

1

1

2

2

3

5

3

GND

4

6

4

GND

ACES 88266-04001

ACES 88266-04001

CONN@

CONN@

WWAN_WAKEUP_R#

Mini-Card/BT CONN

Mini-Card/BT CONN

Mini-Card/BT CONN

NAVD0 LA-6091P

NAVD0 LA-6091P

NAVD0 LA-6091P

E

1.0

1.0

1.0

of

24 46Wednesday, March 03, 2010

of

24 46Wednesday, March 03, 2010

of

24 46Wednesday, March 03, 2010

5

D D

4

3

2

1

Mini-Express Card for WLAN

+3VS_WLAN

CLK_PCIE_WLAN#<13>

PCIE_ITX_C_DRX_N2<19>
PCIE_ITX_C_DRX_P2<19>

CLK_PCIE_WLAN<13>

1

C1312

C1312

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

+3VS_WLAN

10U_0603_6.3V6M

10U_0603_6.3V6M

1

C1311

C1311

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

2

C C

ICH_PCIE_WAKE#<19,24>

WLAN_CLKREQ#<13>

PCIE_DTX_C_IRX_N2<19>
PCIE_DTX_C_IRX_P2<19>

B B

C1317

C1317

1

C1313

C1313
47P_0402_50V8J

47P_0402_50V8J

2

1

2

1

C240

C240
1U_0402_6.3V6K

1U_0402_6.3V6K

2

JMINI2

JMINI2

1

1

3

3

5

5

7

7

9

9

11

11

13

13

15

15

17

17

19

19

21

21

23

23

25

25

27

27

29

29

31

31

33

33

35

35

37

37

39

39

41

41

43

43

45

45

47

47

49

49

51

51

53

GND1

ACES_88910-5204

ACES_88910-5204

CONN@

CONN@

091116 Change JMINI2
Symbol to ACES 88910-5204 follow
ME CONN LIST 1116 Rev01

5/12 Update WLAN connector(the same as KAV60)
6/1 Revised 37

ΕΕΕΕ39ΕΕΕΕ41ΕΕΕΕ42ΕΕΕΕ

43 to NC

+1.5VS

1

C1314

C1314

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

2

091127 reserve C240/C238 for RF team

0111 Change BOM Structure of C238/C240 from @ to mount

+3VS_WLAN

2

2

4

4

6

6

8

8

10

10

12

12

14

14

16

16

18

18

20

20

22

22

24

24

26

26

28

28

30

30

32

32

34

34

36

36

38

38

40

40

42

42

44

44

46

46

48

48

50

50

52

52

54

GND2

1

C1315

C1315

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

J12

J12
JUMP_43X79

JUMP_43X79

@

@

112

@

@

1 2

R1536 0_0402_5%

R1536 0_0402_5%

0104 Modify netname WWAN_LED_R# to WWAN_LED#, WLAN_LED_R# to WLAN_LED#

1

C1316

C1316
47P_0402_50V8J

47P_0402_50V8J

2

2

+3VS

+1.5VS

WL_OFF# <31>
PLTRST# <5,8,19,24,26,31>

USB20_N7 <19>
USB20_P7 <19>

WWAN_LED# <21,24>
WLAN_LED# <21,24>

(9~16mA)

@

@

1 2

R723 0_0402_5%

R723 0_0402_5%

091125 reserve 0ohm for WIMAX

WWAN_LED#WLAN_LED#

1

C238

C238
1U_0402_6.3V6K

1U_0402_6.3V6K

2

6/12 Update connector to DC040006S00
6/26 Update JMINI1 footprint
7/01 update pin 23,25,31,33

A A

Security Classifica tion

Security Classifica tion

Security Classifica tion

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOU T PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOU T PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

http://laptop-motherboard-schematic.blogspot.com/

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOU T PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/10/09 2010/10/09

2009/10/09 2010/10/09

2009/10/09 2010/10/09

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

WLAN

WLAN

WLAN

NAVD0 LA-6091P

NAVD0 LA-6091P

NAVD0 LA-6091P

25 46Wednesday, March 03, 2010

25 46Wednesday, March 03, 2010

25 46Wednesday, March 03, 2010

1

1.0

1.0

1.0

of

of

of

5

4

3

2

1

&FORVHWRSLQ

&FORVHWRSLQ

&FORVHWRSLQ

C1318 1U_0402_6.3V4ZC1318 1U_0402_6.3V4Z

+3V_LAN

SXOOXS59HQGRU

$GG55IRUUHVHUYHXFDS9HQGRU

D D

+3VALW

C C

R1540 0_0805_5%R1540 0_0805_5%

Y7

Y7

LAN_X1 LAN_X2

1 2

25MHZ_20PF_7A25000012

25MHZ_20PF_7A25000012

2

C1327

C1327
27P_0402_50V8J

27P_0402_50V8J

1

091116 change P/N of Y7 to
SJ100003300

+AVDD_CEN

10U_0603_6.3V6M

10U_0603_6.3V6M

C1330

C1330

2

1

C1329

C1329
27P_0402_50V8J

27P_0402_50V8J

PLTRST#<5,8,19,24,25,31>
LAN_WAKE#<31>

+3V_LAN

CLK_PCIE_LAN<13>

CLK_PCIE_LAN#<13>

PCIE_ITX_C_DRX_P1<19>

PCIE_ITX_C_DRX_N1<19>

PCIE_DTX_C_IRX_P1<19>

PCIE_DTX_C_IRX_N1<19>

+3V_LAN

PLO

1

2

L46 4.7UH_1008HC-472EJFS-A_5%_1008L46 4.7UH_1008HC-472EJFS-A_5%_1008

1

C1331

C1331

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

/FORVHWRSLQPLO
&

PLO

PLTRST#
LAN_WAKE#

R1537 4.7K_0402_5%R1537 4.7K_0402_5%

12

CLK_PCIE_LAN

CLK_PCIE_LAN#

PCIE_ITX_C_DRX_P1

PCIE_ITX_C_DRX_N1

PCIE_DTX_C_IRX_P1

PCIE_DTX_C_IRX_N1

&

1 2

ΕΕΕΕ

&FORVHWR/PLO

+1.8_VDD_LX

5NHHSDZD\RWKHUVLQJDOPLO

12

C1319 0.1U_0402_16V4ZC1319 0.1U_0402_16V4Z

1 2

C1320 0.1U_0402_16V4ZC1320 0.1U_0402_16V4Z

12

0_0402_5%

R1538

R1538

R1539

R1539

C1324 0.1U_0402_16V7KC1324 0.1U_0402_16V7K

C1325 0.1U_0402_16V7KC1325 0.1U_0402_16V7K

ΕΕΕΕ

&FORVHWR8

0_0402_5%

1 2

0_0402_5%

0_0402_5%

1 2

12

12

R1541 2.37K_0402_1%R1541 2.37K_0402_1%

WKH*1'GLUHFWO\FRQQHFWWR*1'OD\HU

LAN_MDI0+
LAN_MDI0-

B B

LAN_MDI1+
LAN_MDI1-

Place Close to Chip

R1545 49.9_0402_1%R1545 49.9_0402_1%

1 2

R1546 49.9_0402_1%R1546 49.9_0402_1%

1 2

R1547 49.9_0402_1%R1547 49.9_0402_1%

1 2

R1548 49.9_0402_1%R1548 49.9_0402_1%

1 2

PLO

LAN_MDI0

LAN_MDI1

C1339

C1339

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

1

2

C1340

C1340

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

PLO

+1.8_VDD_LX

+AVDD_CEN

+2.5V_ VDDH

CLK_PCIE_LAN_R

CLK_PCIE_LAN#_R

PCIE_C_RXP1

PCIE_C_RXN1

LAN_X1
LAN_X2

LANRBIAS_R

12

LAN_ACT IVITY

R1544 5.1K_0402_5%R1544 5.1K_0402_5%

WKH*1'GLUHFWO\FRQQHFWWR*1'OD\HU

+AVDD_CEN

A A

C1353

C1353

1U_0402_6.3V4Z

1U_0402_6.3V4Z

$GG5&IRU(0,9HQGRU

R1550

R1550
0_0603_5%

0_0603_5%

1 2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

1

2

2

C1354

C1354

0.1U_0402_16V4Z

0.1U_0402_16V4Z

5

1

C1355

C1355

2

LAN_MDI1+
LAN_MDI1-

+AVDD_CEN_R

LAN_MDI0+
LAN_MDI0-

T80

T80

1

RD+

2

RD-

3

CT

4

NC

5

NC

6

CT

7

TD+
TD-8TX-

350uH_NS0013LF

350uH_NS0013LF

RJ45_MIDI1+

16

RX+

RJ45_MIDI1-

15

RX-

RJ45_CT0

14

CT

13

NC

12

NC

RJ45_CT1

11

CT

RJ45_MIDI0+

10

TX+

RJ45_MIDI0-

9

1 2

R1551 75_0402_5%R1551 75_0402_5%

1 2

R1552 75_0402_5%R1552 75_0402_5%

4

RJ45_GND

12

For EMI.

C1341

C1341
470P_0402_50V7K

470P_0402_50V7K

@

@

+3V_LAN

LAN_SK_LAN_LINK#

U88

U88

1

LX

2

VDD3V

6

VDD17

5

VDD25V

3

PERSTn

4

WAKEn

7

SEL_25 MHz

41

REFCLKP

40

REFCLKN

43

RX_P

AR8132 10/100 LAN

AR8132 10/100 LAN

44

RX_N

38

TX_P

37

TX_N

9

XTLO

10

XTLI

31

SMCLK

33

SMDATA

12

RBIAS

34

TESTMODE

49

GND

AR8132-AL1E_QFN48_6X6

AR8132-AL1E_QFN48_6X6

FORVHWR-5-

C1332 100P_0402_50V8J

C1332 100P_0402_50V8J

R1543 511_0402_1%R1543 511_0402_1%

12

12

C1346 100P_0402_50V8J

C1346 100P_0402_50V8J

@

@

29

TWSI_CLK

30

TWSI_DATA

LED_ACTn

LED_10_100n

CLKREQn

TRXP0
TRXN0
TRXP1
TRXN1

AVDD_ REG

DVDD_REG
DVDD_REG

VDD11_ REG

VDDHO
AVDDH
AVDDH

RJ45_MIDI1-

RJ45_MIDI1+

RJ45_MIDI0-

RJ45_MIDI0+

C1347

C1347

1 2

1000P_1206_2KV7K

1000P_1206_2KV7K

0.1U_0402_16V4Z

0.1U_0402_16V4Z

AVDDL

DVDDL
DVDDL

AVDDL
AVDDL
AVDDL
AVDDL

NC
NC
NC
NC
NC
NC

Atheros

Atheros

@

@

12

12

R1549

R1549

12

511_0402_1%

511_0402_1%

RJ45_GND RJ45_GNDA

LAN_ACT IVITY

47

LAN_SK_LAN_LINK#

48

LAN_CLKREQ#

27

13
14
17
18

11
42

28
32
45
46

8
16
22
36
39

15
19
25

20
21
23
24
26
35

LAN_MDI0+
LAN_MDI0­LAN_MDI1+
LAN_MDI1-

+AVDDVCO1
+AVDDVCO2

+1.2_DVDDL

+1.2_AVDDL

+2.5V_ VDDH

RJ45 CONN

JRJ1

JRJ1

11

Yellow LED+

12

Yellow LED-

8

PR4-

7

PR4+

6

PR2-

5

PR3-

4

PR3+

3

PR2+

2

PR1-

1

PR1+

9

Green LED +

10

Green LED -

SANTA_130452-3

SANTA_130452-3

CONN@

CONN@

C1348

C1348

DETECT PIN1

1

2

SHLD1

SHLD1

1

C1349

C1349

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

PLO

PLO

PLO

15

13

14

PLO

1013 Add C1348,C1349 for ESD (Vendor)

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/10/09 2010/10/09

2009/10/09 2010/10/09

2009/10/09 2010/10/09

LAN_CLKREQ# <13>

Compal Secret Data

Compal Secret Data

Compal Secret Data

&&FORVHWRSLQ

&FORVHWRSLQ

&&FORVHWRSLQ

+1.2_AVDDL

1

C1334

C1334

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

&FORVHWRSLQ

&FORVHWRSLQ

&FORVHWRSLQ

&FORVHWRSLQ

Deciphered Date

Deciphered Date

Deciphered Date

2

&&&FORVHWRSLQPLO

+3V_LAN

10U_0603_6.3V6M

10U_0603_6.3V6M

1

1

C1322

C1322

C1321

C1321

0.1U_0402_16V4Z

0.1U_0402_16V4Z

&FORVHWRSLQ

0.1U_0402_16V4Z

0.1U_0402_16V4Z

+1.2_AVDDL

1 2

R1542

R1542
0_0603_5%

0_0603_5%

2

2

1

C1326

C1326

2

1

C1328

C1328

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

$GG&FORVHWRSLQ9HQGRU

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

1

2

C1335

C1335

1

C1336

C1336

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

+1.2_DVDDL

1U_0402_6.3V4Z

1U_0402_6.3V4Z

C1342

C1342

C1337

C1337

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

2

1

C1338

C1338

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C1343

C1343

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

2

&FORVHWRSLQ

&FORVHWRSLQ

&FORVHWRSLQ

+2.5V_ VDDH

1

C1350

C1350
1U_0402_6.3V4Z

1U_0402_6.3V4Z

2

1

C1351

C1351

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

1

C1323

C1323
10U_0603_6.3V6M

10U_0603_6.3V6M

2

+AVDDVCO1

+AVDDVCO2

FORVHWRSLQ

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C1333

C1333

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C1344

C1344

C1345

C1345

2

1

C1352

C1352

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

LAN AR8132

LAN AR8132

LAN AR8132

NAVD0 LA-6091P

NAVD0 LA-6091P

NAVD0 LA-6091P

1

1.0

1.0

1.0

of

of

of

26 46Wednesday, March 03, 2010

26 46Wednesday, March 03, 2010

26 46Wednesday, March 03, 2010

http://laptop-motherboard-schematic.blogspot.com/

Compal Electronics, Inc.

5

+3VS

+3VALW

D D

+VCC_4IN1 +VCC18

20mils 20mils

091020 change JUMP J2/J3 to R808/R809 0ohm

R808

R808

1 2

0_0603_5%

0_0603_5%

R809

R809

1 2

0_0603_5%

0_0603_5%

4

@

@

1

C1179

C1179
10U 6.3V M X5R 0603 H0.8

10U 6.3V M X5R 0603 H0.8

2

+3VS_READER

1

2

C1180

C1180

0.1U_0402_25V4K

0.1U_0402_25V4K

@

@

3

+VCC_4IN1

+3VS_READER

+VCC33
+VCC18

R1390

R1390
12K_0402_1%

12K_0402_1%

1 2

USB20_P4<19>
USB20_N4<19>

XTLI

Clock from M/B

2

8FORVHWR-5($'

U78

U78

28

CrdVcc

29

SysVcc

30

Vcc33O

31

Vcc18O

33

Thermo Pad

14

D+

13

D-

REXT

12

Rref

8

EClkin

CARD_D0
CARD_D1
CARD_D2
CARD_D3
CARD_D4
CARD_D5
CARD_D6
CARD_D7

17

xDData0

18

xDData1

20

xDData2

21

xDData3

19

xDData4

4

xDData5

5

xDData6

6

xDData7

UB6250NF-A1-110_QFN32_5X5

UB6250NF-A1-110_QFN32_5X5

If use external crystal(Y6),
U78 will change UB6252

VddA

VccA

xDCeZ

xDCle
xDAle

xDBsyZ

xDWeZ

xDReZ

xDWpZ

SdCdZ
xDCdZ

LedZ

ResetZ

VssA

GndA

1

+VCC33

15
10

SMCEZ_C

7
23
24
22

3
25
32
26
27

1

2

16
11
9

NC

SMALE_CLK

SMBSYZ_SDCMD

SMREZ_C

SMCDZ_MSINSZ

CARD_LED_R#

XTLO

SMCLE

PIN3

SMWPZ
SDCDZ

1 2

R1392

R1392

4.7K_0402_5%

4.7K_0402_5%

@

@

+VCC33

1

@

C C

B B

A A

@

C1181

C1181
10P 50V J NPO 0402

10P 50V J NPO 0402

2

CLK_48M_CR<13>

1

C1182

C1182
10U 6.3V M X5R 0603 H0.8

10U 6.3V M X5R 0603 H0.8

2

+VCC33

2

@

@

C1185

C1185

0.01U_0402_16V7K

0.01U_0402_16V7K

1

12

R1405

R1405

@

@

33_0402_5%

33_0402_5%

1

C1191

@ C1191

@

22P_0402_50V8J

22P_0402_50V8J

2

EMI

20mils

1

@

@

C1183

C1183

0.1U_0402_25V4K

0.1U_0402_25V4K

2

1

C1186

C1186

0.1U_0402_25V4K

0.1U_0402_25V4K

2

R1404

6250@R1404

6250@

1 2

0_0402_5%

0_0402_5%

1 2

C1189

C1189
27P_0402_50V8J

27P_0402_50V8J

6252@

6252@

12MHZ_16PF_7A12000026~D

12MHZ_16PF_7A12000026~D

1 2

C1193

C1193
27P_0402_50V8J

27P_0402_50V8J

6252@

6252@

1

C1184

C1184

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

2

1

C1187

C1187

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

2

ByPass Capacitors

XTLI

12

Y6

Y6

Only UB6252

6252@

6252@

need to use XTLI and XTLO

091102 change Y6 to SJ100005900

XTLO

+VCC33

@

CARD_LED_R#

@

S

S

Q53

Q53

2N7002W-T/R7_SOT323-3

2N7002W-T/R7_SOT323-3

Card Reader Connector

JREAD1

JREAD1

+VCC_4IN1 +VCC_4IN1

CARD_D0
CARD_D1
CARD_D2
CARD_D3
CARD_D4
CARD_D5
CARD_D6
CARD_D7

PIN3
SMWPZ
SMALE_CLK
SMCDZ_MSINSZ
SMBSYZ_SDCMD
SMREZ_C
SMCEZ_C
SMCLE

22

XD-VCC

30

XD10-D0

29

XD11-D1

28

XD12-D2

27

XD13-D3

26

XD14-D4

25

XD15-D5

24

XD16-D6

23

XD17-D7

33

XD07-WE

32

XD08-WP

34

XD06-ALE

39

XD01-CD

38

XD02-R/B

37

XD03-RE

36

XD04-CE

35

XD05-CLE

31

XD GND

40

XD GND

41

SD CD/W P GND

42

SD CD/W P GND

T-SOL_144-1300302600_NR

T-SOL_144-1300302600_NR

CONN@

CONN@

SD4-VDD

MS9-VCC

SD5-CLK
SD7-DAT0
SD8-DAT1
SD9-DAT2
SD1-DAT3

SD2-CMD

SD-CD

SD-WP

SD6-VSS
SD3-VSS

MS8-SCLK

MS4-DATA0
MS3-DATA1
MS5-DATA2
MS7-DATA3

MS6-INS

MS2-BS

MS1-VSS

MS10-VSS

11
18

9
4
3
21
19
16
1
2

6
13

17
10
8
12
15
14
7
5
20

SMALE_CLK

SMBSYZ_SDCMD

SMALE_CLK

SMCDZ_MSINSZ

12

0_0402_5%

0_0402_5%
R1395

R1395

@

@

G

G

2

1 2

0_0402_5%

0_0402_5%
R1403

R1403

@

@

CARD_D0
CARD_D1
CARD_D2
CARD_D3

SDCDZ

PIN3

CARD_D0
CARD_D1
CARD_D2
CARD_D3

PIN3

13

D

D

C1188 4.7P_0402_50V8CC1188 4.7P_0402_50V8C

+3VS

091203 change BOM structure of
Q53/R1395/R1396 from mount to @

@

@

C1190 4.7P_0402_50V8C

C1190 4.7P_0402_50V8C

12

R1396

R1396
10K_0402_5%

10K_0402_5%

@

@

CARD_LED# <21>

SMCDZ_MSINSZ

1

C1192

C1192

0.1U_0402_25V4K

0.1U_0402_25V4K

2

Security Classifica tion

Security Classifica tion

Security Classifica tion

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOU T PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOU T PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

http://laptop-motherboard-schematic.blogspot.com/

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOU T PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/10/09 2010/10/09

2009/10/09 2010/10/09

2009/10/09 2010/10/09

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

CARD READER

CARD READER

CARD READER

NAVD0 LA-6091P

NAVD0 LA-6091P

NAVD0 LA-6091P

27 46Wednesday, March 03, 2010

27 46Wednesday, March 03, 2010

27 46Wednesday, March 03, 2010

1

1.0

1.0

1.0

of

of

of

5

CD_GND<30>

MIC1_C_L<30>

MIC1_C_R<30>

AUDIO_GPIO0<30>
AUDIO_GPIO3<30>

SENSE_A<30>
SENSE_B<30>

EAPD_R<30>

D D

EC_MUTE#_R<30>

L47

+5VS

C C

B B

L47

FBMA-L11-201209-221LMA30T_0805

FBMA-L11-201209-221LMA30T_0805

HP_PLUG#<29>
MIC_PLUG#<29>
HP_PLUG#<29>

CD_GND

MIC1_C_L

MIC1_C_R

AUDIO_GPIO0
AUDIO_GPIO3

SENSE_A
SENSE_B

EAPD_R

EC_MUTE#_R

1 2

7/04 Add C23

HDA_SDOUT_AUDIO<19,30>

C1358

C1358

0.1U_0402_16V4Z

0.1U_0402_16V4Z

+VDDA

HDA_RST_AUDIO#

HDA_SYNC_AUDIO

091212 Add C33, C34 near Codec
to prevent switch noise

R1564 39.2K +-1% 0402 271@R1564 39.2K +-1% 0402 271@
R1566 20K_0402_1%R1566 20K_0402_1%
R1567 5.11K_0402_1% 272@R1567 5.11K_0402_1% 272@

12

C1383

271@C1383

271@

2.2U_0402_6.3VM

2.2U_0402_6.3VM

PVDD1_AUDIO

PVDD2_AUDIO

1

1

C1359

C1359

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

2

L50

L50
MBK1608121YZF_0603

MBK1608121YZF_0603

1 2

10U 6.3V M X5R 0603 H0.8

10U 6.3V M X5R 0603 H0.8

C33 100P_0402_50V8J@C33 100P_0402_50V8J@

1 2

C34 100P_0402_50V8J@C34 100P_0402_50V8J@

1 2

20mil
20mil

C1380

@C1380

@

10P_0402_50V8J

10P_0402_50V8J

12
12
12

SPKL-_R

SPKR+_R

PVSS2

SPKR-_R

AUDIO_LDO_IN

C1364

C1364

MIC1_L<29>

MIC1_R<29>

12

PVDD1_AUDIO <30>

PVDD2_AUDIO <30>

PLO

1

2

DMIC_DATA
DMIC_CLK AUD IO_GPIO3

EAPD<31>

EC_MUTE#<29,31>

Sense Pin Impedance Codec Signals

39.2K

SENSE A

A A

20K

10K

5.1K

39.2K

SENSE B

20K

10K

5.1K

PORT-A (PIN 39, 41)

PORT-B (PIN 21, 22)

PORT-C (PIN 23, 24)

PORT-D (PIN 35, 36)

PORT-E (PIN 14, 15)

PORT-F (PIN 16, 17)

PORT-G (PIN 43, 44)

PORT-H (PIN 45, 46)

5

4

SPKL-_R <30>

SPKR+_R <30>

PVSS2 <30>

SPKR-_R <30>

J13

J13

2

112

JUMP_43X39@

JUMP_43X39@

U89

U89

@

@

1

IN

OUT

2

GND

3

SHDN

BYP

G9191-475T1U_SOT23-5

G9191-475T1U_SOT23-5

HDA_SDIN0_AUDIO

271_AVSS2

271_VREFO

CODEC_VREF

SPKL+_R

5

4

DMIC_CLK

DMIC_DATA

PLO

1 2

R1603 0_0402_5%@R1603 0_0402_5%@

1 2

R1604 0_0402_5%@R1604 0_0402_5%@

091130 reserve R1603/R1604 for LVDS Conn.
Close to CODEC

(output = 300 mA)

+VDDA

C1360

C1360

1 2

@

@

2.2U_0603_6.3V6K

2.2U_0603_6.3V6K

4.75V

HDA_SDIN0_AUDIO <30>

271_AVSS2 <30>

271_VREFO <30>

CODEC_VREF <30>

SPKL+_R <30>

DMIC_CLK_LVDS

DMIC_DATA_LVDS

HD Audio Codec

+AVDD_HDA

40mil

1

C1365

C1365

0.1U_0402_16V4Z

0.1U_0402_16V4Z

MIC1_L

MIC1_R

HDA_RST_AUDIO#<19,30>

HDA_SYNC_AUDIO<19,30>

SENSE_A
SENSE_B

http://laptop-motherboard-schematic.blogspot.com/

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

271@

271@

R1558 20K_0402_1%

R1558 20K_0402_1%

1 2

C1377 4.7U_0603_6.3V6KC1377 4.7U_0603_6.3V6K

1 2

C1378 4.7U_0603_6.3V6KC1378 4.7U_0603_6.3V6K

MONO_IN<29,30>

FBMA-11-100505-401T 0402

FBMA-11-100505-401T 0402

R1563

R1563

1 2

R1565

R1565

1 2

1 2

R1568 0_0402_5%R1568 0_0402_5%

1 2

R1570 0_0402_5% 271@R1570 0_0402_5% 271@

1 2

R1571 0_0402_5% 272@R1571 0_0402_5% 272@

4

1

C1367

C1367

12

0_0402_5%271@

0_0402_5%271@

2

CD_GND

MIC1_C_L

MIC1_C_R

AUDIO_GPIO0

EAPD_R

EC_MUTE#_R

U90

U90

14

15

16

17

23

24

18

20

19

21

22

12

11

10

5

2

3
13
34

47

48

4

7

38

AVDD125AVDD2

NC

NC

MIC2_L

MIC2_R

LINE1_L

LINE1_R

CD_L

CD_R

CD_GND

MIC1_L

MIC1_R

PCBEEP

RESET#

SYNC

SDATA_OUT

GPIO0
GPIO3
SENSE A
SENSE B

EAPD

SPDIFO

DVSS1
DVSS2

ALC272-GR_LQFP48_9X9

ALC272-GR_LQFP48_9X9

DGND

&KDQJHWR6$&,$/&9$*5

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

DMIC_CLK_LVDS <14>

DMIC_DATA_LVDS <14>

+3VS_DVDD

20mil

1

DVDD

LINE_OUT_L

LINE_OUT_R

HP_OUT_L

HP_OUT_R

DMIC_CLK

BIT_CLK

SDATA_IN

MONO_OUT

LINE1_VREFO

GPIO1

MIC1_VREFO_L

MIC1_VREFO_R

MIC2_VREFO

VREF

JDREF

AVSS1
AVSS2

3

20mil

9

DVDD_IO

NC

NC

NC

NC

3

091130 add R1601/R1602 0ohm
Close to CODEC

DMIC_CLK
DMIC_DATA

R1601 0_0402_5%R1601 0_0402_5%

1 2

R1602 0_0402_5%R1602 0_0402_5%

1 2

2

D50

PJDLC05C_SOT23-3

PJDLC05C_SOT23-3

D50

For ESD 12/22

1

316&$

+3VS_DVDD

1 2

1 2

1 2

1 2

1 2

MIC1_VREFO_L

20mil

HP_LEFT <29,30>

1

C1362

C1362

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

1

C1371

C1371

2.2U_0402_6.3VM

2.2U_0402_6.3VM

2

R1553 0_0402_5%271@ R1553 0_0402_5%271@

R1554 0_0402_5%271@ R1554 0_0402_5%271@

R1556 0_0402_5%271@ R1556 0_0402_5%271@

R1557 0_0402_5%271@ R 1557 0_0402_5%271@

1 2

R1560 33_0402_5%R1560 33_0402_5%

C1381 10U 6.3V M X5R 0603 H0.8

C1381 10U 6.3V M X5R 0603 H0.8

HP_RIGHT <29,30>

1

C1361

C1361

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

35

36

PVDD1_AUDIO

39

SPKL-_R

41

SPKR+_R

45

PVDD2_AUDIO

46

PVSS2

43

20mil

SPKR-_R

44

R1559 22_0402_5%R1559 22_0402_5%

6

HDA_SDIN0_AUDIO

8

271_AVSS2

37

10mil

29

31

10mil

28

HP_RIGHT

32

10mil

30

CODEC_VREF

27

SPKL+_R

40

HP_LEFT

33

20mil

26
42

AGND

Compal Secret Data

Compal Secret Data

2009/10/09 2010/10/09

2009/10/09 2010/10/09

2009/10/09 2010/10/09

Compal Secret Data

1

C1363

C1363
10U 6.3V M X5R 0603 H0.8

10U 6.3V M X5R 0603 H0.8

2

AMP_LEFT <29,30>

271@

271@

AMP_RIGHT <29,30>

1 2

R1555 FBMA-11-100505-401T 0402

R1555 FBMA-11-100505-401T 0402

C1376 22P_0402_50V8JC1376 22P_0402_50V8J

1 2

1 2

R1561 0_0402_5% 271@R1561 0_0402_5% 271@

1 2

271@

271@

MIC1_VREFO

1 2

R1569

R1569
0_0402_5%

0_0402_5%

271@

271@

12

272@

272@

R157220K_0402_1%

R157220K_0402_1%

Deciphered Date

Deciphered Date

Deciphered Date

2

3

22P 50V J NPO 0402

22P 50V J NPO 0402

L48

L48
MBK1608121YZF_0603

MBK1608121YZF_0603

1 2

PVDD1_AUDIO

20mil

SPKL- <29>

20mil

SPKR+ <29>

DMIC_CLK

272@

272@

SPKR- <29>

HDA_BITCLK_AUDIO <19,30>

HDA_SDIN0 <19>

SPKL+ <29>

20mil

091127 reserve C447 0.1U for EMI request
20100125 change R1573 P/N from SD028000080 to SE102104K00 ,
value from 0_0402_5% to 0.1u_0402_10V7K
20100131 change R1573 symbol to C448

2

1

C1356

C1356

2

22P 50V J NPO 0402

22P 50V J NPO 0402

+3VS

1

271@

271@

C1366

C1366

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

PVDD2_AUDIO

1

271@

271@

C1372

C1372

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

271_VREFO

1 2

1

@

@

C1385

C1385
10U 6.3V M X5R 0603 H0.8

10U 6.3V M X5R 0603 H0.8

2

C1382

C1382

2.2U_0402_6.3VM

2.2U_0402_6.3VM

272@

272@

C1379

C1379

1

8mil

DMIC_CLK_R
DMIC_DATA_R

C1357

C1357

+3VS

1

2

JP24

JP24

1

1

2

2

3

5

3

G1

4

6

4

G2

ACES_88266-04001

ACES_88266-04001

CONN@

CONN@

5/5 Add digital MIC
5/12 Revised circuit

L49

271@L49

271@

MBK1608121YZF_0603

MBK1608121YZF_0603

1 2

1

271@

271@

C1368

C1368
10U 6.3V M X5R 0603 H0.8

10U 6.3V M X5R 0603 H0.8

2

L51
MBK1608121YZF_0603

MBK1608121YZF_0603

1 2

1

271@

271@

C1373

C1373
10U 6.3V M X5R 0603 H0.8

10U 6.3V M X5R 0603 H0.8

2

272@

272@

2.2U_0402_6.3VM

2.2U_0402_6.3VM

1 2

1

C1384

C1384

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

271@L51

271@

1

271@

271@

C1369

C1369

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

1

271@

271@

C1374

C1374

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

MIC1_VREFO_R

1

10U 6.3V M X5R 0603 H0.8

10U 6.3V M X5R 0603 H0.8

2

1

271@

271@

C1375

C1375
10U 6.3V M X5R 0603 H0.8

10U 6.3V M X5R 0603 H0.8

2

1 2

C447

C447

@

@

1 2

C448 0.1U_0402_10V 7KC448 0.1U_0402_10V7K

R1574 0_0402_5%R1574 0_0402_5%

R1597 0_0402_5%R1597 0_0402_5%

R1575 0_0603_5%

R1575 0_0603_5%

GND GNDA

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

AUDIO CODEC ALC272

AUDIO CODEC ALC272

AUDIO CODEC ALC272

NAVD0 LA-6091P

NAVD0 LA-6091P

NAVD0 LA-6091P

1

271@

271@

C1370

C1370

+5VS

0.1U_0402_10V7K

0.1U_0402_10V7K

12

12

12

<BOM Structure>

<BOM Structure>

28 46Wednesday, March 03, 2010

28 46Wednesday, March 03, 2010

28 46Wednesday, March 03, 2010

of

of

of

+5VS

1.0

1.0

1.0

5

4

3

2

1

091020 change JUMP J5 to R1576 0ohm

272@

272@

1 2

R1576 0_0603_5%

R1576 0_0603_5%

D D

AMP_LEFT<28,30>

AMP_RIGHT<28,30>

C C

100K_0402_5%

100K_0402_5%

100K_0402_5%

100K_0402_5%

B B

272@

272@

272@

272@

8SGDWHWRG%

+5VAMP_J

12

R1586

@ R1586

@

12

R1589

R1589

272@

272@

EC Beep

BEEP#<31>

SB_SPKR<19>

PCI Beep

091127 change value of R1328 from 10K to 4.7K

A A

+5VAMP_J+5VS

272@

272@

12

C1386 10U 6.3V M X5R 0603 H0.8

C1386 10U 6.3V M X5R 0603 H0.8

12

C1387 0.1U_0402_16V4Z

C1387 0.1U_0402_16V4Z

272@

272@

272@

272@

1 2

C1388 0.47U_0603_10V7K

C1388 0.47U_0603_10V7K

1 2

C1389 0.47U_0603_10V7K

C1389 0.47U_0603_10V7K

1 2

C1390 0.47U_0603_10V7K

C1390 0.47U_0603_10V7K

1 2

C1391 0.47U_0603_10V7K

C1391 0.47U_0603_10V7K

272@

272@

12

R1587

@ R1587

@

100K_0402_5%

100K_0402_5%

12

R1590

R1590
100K_0402_5%

100K_0402_5%

272@

272@

R1326

R1326

1 2

47K_0402_5%

47K_0402_5%

R1327

R1327

1 2

47K_0402_5%

47K_0402_5%

4.7K_0402_5%

4.7K_0402_5%

272@

272@

1 2

R1581 0_0402_5%

R1581 0_0402_5%

1 2

R1582 0_0402_5%272@R1582 0_0402_5%272@

GAIN0

GAIN1

12

R1328

R1328

091020 follow NTV00 Design

+5VAMP_J

GAIN0

GAIN1

AMP_C_LEFT

AMP_C_RIGHT

C812

C812

0.1U_0402_16V4Z

0.1U_0402_16V4Z

C811

C811

0.1U_0402_16V4Z

0.1U_0402_16V4Z

272@

272@

U81

U81

16

VDD

6

PVDD

SHUTDOWN#

15

PVDD

GAIN0

GAIN1

LIN-

RIN-

LIN+

RIN+

HP_RIGHT<28,30>

LOUT-

ROUT-

LOUT+

ROUT+

BYPASS

HP_LEFT<28,30>

HP_RIGHT<28,30>

HP_LEFT<28,30>

MONO_IN <28,30>

2

3

5

17

9

7

APA2031RI-TRL_TSSOP20

APA2031RI-TRL_TSSOP20

091109 change U81 symbol to
APA2031RI-TRL_TSSOP20
P/N: SA00001RZ00

MONO_INMONO_IN_1

GND
GND
GND
GND
GND

SPKL+<28>
SPKL-<28>
SPKR+<28>

PLO

PLO

1 2

12

MIC2_R_1

SPKR-<28>

PJDLC05C_SOT23-3

PJDLC05C_SOT23-3

272@

272@

D54

D54
RB751V-40TE17_SOD323-2

RB751V-40TE17_SOD323-2

1 2

12

R1594

R1594

4.7K_0402_5%

4.7K_0402_5%

L55

L55
FBM-11-160808-700T_0603

FBM-11-160808-700T_0603

1 2

1 2

L54

L54
FBM-11-160808-700T_0603

FBM-11-160808-700T_0603

1 2

12

NC

EC_MUTE#

19

SPKL-

8

SPKR-

14

SPKL+

4

SPKR+

18

1
11
13
20
21
10

C1392 0.47U_0603_10V7K

C1392 0.47U_0603_10V7K

.HHSPLOZLGWK

HP_RIGHT

HP_LEFT

HP_RIGHT

HP_LEFT

EC_MUTE# <28,31>

12

272@

272@

271@

271@

1 2

R1583 56.2_0402_1%

R1583 56.2_0402_1%

272@

272@

1 2

R1584 56.2_0402_1%

R1584 56.2_0402_1%

1 2

R1585 56.2_0402_1%

R1585 56.2_0402_1%

272@

272@

271@

271@

1 2

R1588 56.2_0402_1%

R1588 56.2_0402_1%

R1591 0_0402_5%

R1591 0_0402_5%

HPOUT_L_1

HPOUT_R_1

272@

RB751V-40TE17_SOD323-2

RB751V-40TE17_SOD323-2

271@

271@

1 2

272@

4.7K_0402_5%

4.7K_0402_5%

1 2

L52 FBM-11-160808-700T_0603L52 FBM-11-160808-700T_0603

1 2

L53 FBM-11-160808-700T_0603L53 FBM-11-160808-700T_0603

MIC1_VREFO MIC1_VREFO

D53

D53

R1593

R1593

PLO

MIC1_L<28>

MIC1_R<28>

1 2

R1596 1K_0603_1%R1596 1K_0603_1%

1 2

R1595 1K_0603_1%R1595 1K_0603_1%

MIC2_L_1

PLO

Int. Speaker Conn.

PLO

R1577 0_0603_5%R1577 0_0603_5%

1 2

R1578 0_0603_5%R1578 0_0603_5%

1 2

R1579 0_0603_5%R1579 0_0603_5%

1 2

R1580 0_0603_5%R1580 0_0603_5%

1 2

SPK_R+SPK_R- SPK_L- SPK_L+

2

3

D51

D51

1

HPOUT_L_2

HPOUT_R_2

1

C1393

C1393

330P_0402_50V7K

330P_0402_50V7K

271@

271@

R15920_0402_5%

R15920_0402_5%

MIC1_VREFO_RMIC1_VREFO_L

C1395

C1395

220P_0402_50V8J

220P_0402_50V8J

2

1

2

PJDLC05C_SOT23-3

PJDLC05C_SOT23-3

1

C1394

C1394
330P_0402_50V7K

330P_0402_50V7K

2

MIC2_L_2

MIC2_R_2

1

C1396

C1396
220P_0402_50V8J

220P_0402_50V8J

2

SPK_L+
SPK_L­SPK_R+
SPK_R-

D52

D52

JP25

JP25

1

1

2

2

3

3

G1

4

4

G2

ACES_88266-04001

ACES_88266-04001

CONN@

CONN@

2

3

1

HP_PLUG#<28>

MIC_PLUG#<28>

5
6

Headphone JACK

JHP1

JHP1

3

1

2
5

HP_PLUG#

6

SHLD1

SHLD1

4

SINGA_2SJ2285-112252

SINGA_2SJ2285-112252

CONN@

CONN@

091123 change symbol of JHP1 to
SINGA_2SJ2285-112252

MIC JACK

JMIC1

JMIC1

3

1

2
5

MIC_PLUG#

6

SHLD1

SHLD1

4

SINGA_2SJ2285-112252

SINGA_2SJ2285-112252

CONN@

CONN@

091123 change symbol of JMIC1 to
SINGA_2SJ2285-112252

Security Classifica tion

Security Classifica tion

Security Classifica tion

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOU T PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOU T PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

http://laptop-motherboard-schematic.blogspot.com/

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOU T PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/10/09 2010/10/09

2009/10/09 2010/10/09

2009/10/09 2010/10/09

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

AMP & Audio Jack

AMP & Audio Jack

AMP & Audio Jack

NAVD0 LA-6091P

NAVD0 LA-6091P

NAVD0 LA-6091P

29 46Wednesday, March 03, 2010

29 46Wednesday, March 03, 2010

29 46Wednesday, March 03, 2010

1

1.0

1.0

1.0

of

of

of

5

D D

4

3

2

1

HD Audio Codec

+3VS_DVDD

+AVDD_HDA

+AVDD_HDA

C C

CD_GND<28>

MIC1_C_L<28>

MIC1_C_R<28>

MONO_IN<28,29>

HDA_RST_AUDIO#<19,28>

HDA_SDOUT_AUDIO<19,28>

SENSE_A<28>
SENSE_B<28>

B B

HDA_SYNC_AUDIO<19,28>

AUDIO_GPIO0<28>
AUDIO_GPIO3<28>

EAPD_R<28>

EC_MUTE#_R<28>

MIC1_C_L

MIC1_C_R

CD_GND

AUDIO_GPIO0
AUDIO_GPIO3
SENSE_A
SENSE_B

EAPD_R

EC_MUTE#_R

40mil

U92

U92

14

15

16

17

23

24

18

20

19

21

22

12

11

10

5

2

3
13
34

47

48

4

7

271@

271@

38

AVDD125AVDD2

NC

NC

MIC2_L

MIC2_R

LINE1_L

LINE1_R

CD_L

CD_R

CD_GND

MIC1_L

MIC1_R

PCBEEP

RESET#

SYNC

SDATA_OUT

GPIO0
GPIO3
SENSE A
SENSE B

EAPD

SPDIFO

DVSS1
DVSS2

ALC271X-GR QFN 48P CODEC

ALC271X-GR QFN 48P CODEC

20mil

LINE_OUT_L

LINE_OUT_R

HP_OUT_L

HP_OUT_R

DMIC_CLK

BIT_CLK

SDATA_IN

MONO_OUT

LINE1_VREFO

MIC1_VREFO_L

MIC1_VREFO_R

MIC2_VREFO

DGND

1

DVDD

GPIO1

VREF

JDREF

AVSS1
AVSS2

20mil

9

DVDD_IO

NC

NC

NC

NC

+3VS_DVDD

35

36

PVDD1_AUDIO

39

41

45

PVDD2_AUDIO

46

43

20mil

44

6

HDA_SDIN0_AUDIO

8

37

29

10mil

31

10mil

28

HP_RIGHT

32

10mil

30

CODEC_VREF

27

40

HP_LEFT

33

26
42

AGND

SPKL-_R

SPKR+_R

PVSS2

SPKR-_R

271_AVSS2

271_VREFO

20mil

SPKL+_R

20mil

PVDD1_AUDIO <28>

SPKL-_R <28>

SPKR+_R <28>

PVSS2 <28>

SPKR-_R <28>

HDA_SDIN0_AUDIO <28>

271_AVSS2 <28>

MIC1_VREFO_L

MIC1_VREFO

HP_RIGHT <28,29>

CODEC_VREF <28>

SPKL+_R <28>

HP_LEFT <28,29>

AMP_LEFT <28,29>

AMP_RIGHT <28,29>

20mil

20mil

PVDD2_AUDIO <28>

HDA_BITCLK_AUDIO <19,28>

271_VREFO <28>

MIC1_VREFO_R

Codec SignalsImpedanceSense Pin

39.2K

SENSE A

A A

20K

10K

5.1K

39.2K

SENSE B

20K

10K

5.1K

PORT-A (PIN 39, 41)

PORT-B (PIN 21, 22)

PORT-C (PIN 23, 24)

PORT-D (PIN 35, 36)

PORT-E (PIN 14, 15)

PORT-F (PIN 16, 17)

PORT-G (PIN 43, 44)

PORT-H (PIN 45, 46)

5

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

http://laptop-motherboard-schematic.blogspot.com/

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/10/09 2010/10/09

2009/10/09 2010/10/09

2009/10/09 2010/10/09

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

AUDIO CODEC ALC271

AUDIO CODEC ALC271

AUDIO CODEC ALC271

NAVD0 LA-6091P

NAVD0 LA-6091P

NAVD0 LA-6091P

30 46Wednesday, March 03, 2010

30 46Wednesday, March 03, 2010

30 46Wednesday, March 03, 2010

1

of

of

of

1.0

1.0

1.0

L16

L16

+3VALW +EC_AVCC

Change to R_0402 05/14

For ESD

+3VALW

R1297 2.2K_0402_5%R1297 2.2K_0402_5%

R1298 2.2K_0402_5%R1298 2.2K_0402_5%

R1299 47K_0402_5%R1299 47K_0402_5%

R1300 47K_0402_5%R1300 47K_0402_5%

+3VS

R1307 2.2K_0402_5%R1307 2.2K_0402_5%

R1308 2.2K_0402_5%R1308 2.2K_0402_5%

1 2

MBK1608121YZF_0603

MBK1608121YZF_0603

0.1U_0402_16V4Z

0.1U_0402_16V4Z

PLTRST#

1 2

1 2

1 2

1 2

1 2

1 2

1

2

C520

C520

1

12

R1288

R1288

0_0402_5%

0_0402_5%

KB_RST#<18>

+3VALW

R1290 47K_0402_5%R1290 47K_0402_5%

12

C1159

C1159

220P_0402_50V7K

220P_0402_50V7K

20100104 delete WLAN_LED_R# on pin 16
20100104 delete WWAN_LED_R# on pin 19
091015 add HDMI_DETECT on Pin16
091026 add VGA_DEEP_IDLE on Pin17

EC_SMB_CK1

EC_SMB_DA1

KSO1

KSO2

15P_0402_50V8J

15P_0402_50V8J

EC_SMB_CK2

EC_SMB_DA2

ECAGND

+3VS

1 2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

C527

C527

C518

C518
1000P_0402_50V7K

1000P_0402_50V7K

@

@

2

KSO[0..15]<32>

KSI[0..7]<32>

C514

0.1U_0402_16V4Z

C514

0.1U_0402_16V4Z

10K_0402_5%

10K_0402_5%

R41

R41

12

LPC_FRAME#<19>

CLK_PCI_LPC<13>
PLTRST#<5,8,19,24,25,26>

2

C523

C523

20100104 delete WLAN_LED# on pin 38

1

KSO[0..15]

KSI[0..7]

EC_SMB_CK1<37>
EC_SMB_DA1<37>
EC_SMB_CK2<5,8,9>
EC_SMB_DA2<5,8,9>

PM_SLP_S3#<19>
PM_SLP_S5#<19>

VGA_DEEP_IDLE<8>

INVT_PW M<5,14>

FAN_SPEED1<4>

DGPU_PWR_EN<8,13,35>

HDMI_DETECT<16>
EC_TX_P80_DATA<24>
EC_RX_P80_CLK<24>

1

2

FAN_SPEED1

ON/OFF#<22>

PWR_SUSP_LED#<21>

NUM_LED#<21>

OSC4OSC

NC3NC

X1

X1

32.768KHZ_12.5PF_Q13MC14610002

32.768KHZ_12.5PF_Q13MC14610002

+3VALW

C515

0.1U_0402_16V4Z

C515

0.1U_0402_16V4Z

C516

0.1U_0402_16V4Z

C516

0.1U_0402_16V4Z

C517

0.1U_0402_16V4Z

C517

1

2

GATEA20<18>

SERIRQ<18>

LPC_AD3<19>
LPC_AD2<19>
LPC_AD1<19>
LPC_AD0<19>

EC_SCI#<19>

EC_SMI#<19>

1

1

2

2

LPC_AD3
LPC_AD2
LPC_AD1
LPC_AD0

EC_RST#
EC_SCI#

KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15

EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2

PM_SLP_S3#
PM_SLP_S5#
EC_SMI#

VGA_DEEP_IDLE

DGPU_PWR_EN

R67 0_0402_5%R67 0_0402_5%

HDMI_DETECT
EC_TX_P80_DATA
EC_RX_P80_CLK

ON/OFF#
PWR_SUSP_LED#
NUM_LED#

XCLKI
XCLKO

0.1U_0402_16V4Z

1

2

10

12
13
37
20
38

55
56
57
58
59
60
61
62
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
81
82

77
78
79
80

14
15
16
17
18
19
25

12

28
29
30
31
32
34
36

122
123

KB926QFD3_LQFP128_14X14

KB926QFD3_LQFP128_14X14

C519

1000P_0402_50V7K

C519

1000P_0402_50V7K

C521

1000P_0402_50V7K

C521

1000P_0402_50V7K

1
2
3
4
5
7
8

6

1

1

2

2

GA20/GPIO00
KBRST#/GPIO0 1
SERIRQ#
LFRAME#
LAD3
LAD2
LAD1

LPC & MISC

LPC & MISC

LAD0

PCICLK
PCIRST#/GPIO0 5
ECRST#
SCI#/GPIO0E
CLKRUN#/GPIO1D

KSI0/GPIO30
KSI1/GPIO31
KSI2/GPIO32
KSI3/GPIO33
KSI4/GPIO34
KSI5/GPIO35
KSI6/GPIO36
KSI7/GPIO37
KSO0/GPIO20
KSO1/GPIO21
KSO2/GPIO22
KSO3/GPIO23
KSO4/GPIO24

Int. K/B

Int. K/B

KSO5/GPIO25

Matrix

Matrix

KSO6/GPIO26
KSO7/GPIO27
KSO8/GPIO28
KSO9/GPIO29
KSO10/GPIO2A
KSO11/GPIO2B
KSO12/GPIO2C
KSO13/GPIO2D
KSO14/GPIO2E
KSO15/GPIO2F
KSO16/GPIO48
KSO17/GPIO49

SCL1/GPIO44
SDA1/GPIO45
SCL2/GPIO46
SDA2/GPIO47

PM_SLP_S3#/GPIO04
PM_SLP_S5#/GPIO07
EC_SMI#/GPIO0 8
LID_SW# /GPIO0A
SUSP#/GPIO0B
PBTN_OUT# /GPIO0C
EC_PME#/GP IO0D
EC_THERM #/GPIO11
FAN_SPEED1/FANFB1/GPIO14
FANFB2/GPIO1 5
EC_TX/GPIO16
EC_RX/GPIO17
ON_OFF/GPIO18
PWR_LE D#/GPIO19
NUMLED# /GPIO1A

XCLK1
XCLK0

SM Bus

SM Bus

0104 Delete WWAN_LED_R#, WLAN_LED_R#, WWAN_LED#, WLAN_LED#

C525

C525
15P_0402_50V8J

15P_0402_50V8J

+5VS

TP_CLK SPI_CS#

1 2

R1301 4.7K_0402_5%R1301 4.7K_0402_5%

TP_DATA

1 2

R1303 4.7K_0402_5%R1303 4.7K_0402_5%

BATT_OVP

BATT_TEMP

ACIN

C529

C529

C530

C530

C531

C531

1 2

100P_0402_50V8J

100P_0402_50V8J

1 2

100P_0402_50V8J

100P_0402_50V8J

1 2

100P_0402_50V8J

100P_0402_50V8J

http://laptop-motherboard-schematic.blogspot.com/

+EC_AVCC

9

22

33

96

111

125

VCC

VCC

VCC

VCC

VCC

VCC

PWM Output

PWM Output

AD Input

AD Input

DA Output

DA Output

PS2 Interface

PS2 Interface

SPI Device Interface

SPI Device Interface

SPI Flash ROM

SPI Flash ROM

GPIO

GPIO

GPO

GPO

GPIO

GPIO

GPI

GPI

GND

GND

GND

GND

GND

11

24

35

94

113

67

AVCC

INVT_PW M/PWM1/GPIO0F

BEEP#/PWM2/GPIO10

FANPWM 1/GPIO12

ACOFF/FANP WM2/GPIO13

BATT_TEM P/AD0/GPIO38

BATT_OVP/A D1/GPIO39

ADP_I/AD2/GP IO3A

AD3/GPIO3B
AD4/GPIO42

SELIO2#/AD5/GP IO43

DAC_BRIG/D A0/GPIO3C

EN_DFAN1 /DA1/GPIO3D

IREF/DA2/GPIO3 E

DA3/GPIO3F

PSCLK1/GPIO4 A
PSDAT1/GPIO4 B
PSCLK2/GPIO4 C
PSDAT2/GPIO4 D

TP_CLK/PSCLK3/GPIO4E

TP_DATA/PSDAT3/GPIO4F

SDICS#/GPXOA00
SDICLK/GPXOA01

SDIDO/GPXOA02

SDIDI/GPXID0

SPIDI/RD#

SPIDO/WR #

SPICLK/GPIO58

SPICS#

CIR_RX/GPIO40

CIR_RLC_TX/GPIO41

FSTCHG/SEL IO#/GPIO50

BATT_CHGI_ LED#/GPIO52

CAPS_LED #/GPIO53

BATT_LOW_LED#/GPIO54

SUSP_LED #/GPIO55

SYSON/GPIO56

VR_ON/XCLK32K/GPIO57

AC_IN/GPIO59

EC_RSMRST#/GPXO03
EC_LID_OUT#/GPXO04

EC_ON/GPXO05

EC_SWI#/GPXO06

ICH_PWROK/GPXO06

BKOFF#/GPXO08

WL_OFF#/GPXO09

GPXO10
GPXO11

PM_SLP_S4#/GPXID1

ENBKL/GPXID2

GPXID3
GPXID4
GPXID5
GPXID6
GPXID7

V18R

AGND

69

ECAGND

U6

U6

VR_ON

C65 100P_0402_50V8J@C65 100P_0402_50V8J@

PWR_PWM_LED#

21

BEEP#

23

FAN_PWM

26

ACOFF

27

BATT_TEMP

63

BATT_OVP

64
65

BRD_ID

66
75
76

68
70

IREF

71
72

091022 add VGAPWRGD on Pin85, 20100104 delete WWAN_LED# on pin 85

83

USB_ON#

84
85
86

TP_CLK

87

TP_DATA

88

97

DGPU_PWRGD

98
99

LID_SW#

109

FRD#SPI_SO

119

FWR#SPI_SI

120

SPI_CLK

126

FSEL#SPICS#

128

73

VGAPWRGD

74
89

BATT_GRN_LED#

90

CAPS_LED#

91

BATT_AMB_LED#

92

PWR_LED#

93
95
121
127

100

EC_LID_OUT#

101
102

DGPU_HOLD_RST#

103
104
105
106
107
108

110

ENBKL

112
114

EC_THERM#

115
116

PBTN_OUT#

117
118

EC_V18R

124

20mil

C524

C524

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

091022 add DGPU_PWRGD on Pin98

R1293 47K_0402_5%R1293 47K_0402_5%

SYSON

0_0402_5%

0_0402_5%

1 2

EC_ON

Change BT_ON# from Pin98 to Pin108 06/24

SUSP#

R320

R320

1 2

1

1

C1178

C1178

@

@
2

2

470P_0402_50V7K

470P_0402_50V7K

100112 delete JP26 for EC debug port

Security Classifica tion

Security Classifica tion

Security Classifica tion

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOU T PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOU T PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOU T PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/10/09 2010/10/09

2009/10/09 2010/10/09

2009/10/09 2010/10/09

Change R1292 to 0 ohm for BRD ID R01 (EVT) 091015

091212 Add C65
to prevent switch noise

1 2

0118 Change R1292 200K P/N from SD028200300 to SD028200380

PWR_PWM_LED # <22>
BEEP# <29>
FAN_PWM <4>

ACOFF <38>

BATT_TEMP <37>
BATT_OVP
ADP_I <38>

IREF <38>
CALIBRATE# <38>

EC_MUTE# <28,29>
USB_ON# <23>

TP_CLK <32>

TP_DATA <32>

DGPU_PWRGD <9,16>

12

+3VALW

VGAPWRGD

WWAN_WAKEUP# <24>

VGAPWRGD <43>

FSTCHG <38>

BATT_GRN_LED# <21>
CAPS_LED# <21>
BATT_AMB_LED# <21>
PWR_LED# <21>

SYSON <34,40>
VR_ON <42>
ACIN <19,38>

Add 0 ohm R1309 06/08

R1309

R1309

100K_0402_5%

100K_0402_5%

EC_RSMRST# <19>
EC_LID_OUT# <19>
EC_ON <22>
DGPU_HOLD_RST# <8>

BKOFF# <14>
WL_OFF# <25>
WXMIT_OFF# <24>
BT_ON# <24>

PM_SLP_S4# <19>

EAPD <28>

EC_THERM# <19>

SUSP# <34,35,40,41,43>

PBTN_OUT# <19>
LAN_WAKE# <26>

Compal Secret Data

Compal Secret Data

Compal Secret Data

+3VALW

Deciphered Date

Deciphered Date

Deciphered Date

091022 add output pin FA N_PWM

C36 100P_0402_50V8JC36 100P_0402_50V8J

Change R1292 18K P/N from SD028180200 to SD028180280

BOARD ID Table

NAVD0

BT_LED# <21>

NAVE0

LID_SW# <22>

1 2

RB751V-40TE17_SOD323-2

RB751V-40TE17_SOD323-2

@

@

1 2

D29

D29

R1295

R1295

1 2

0_0402_5%

0_0402_5%

0.1U_0402_16V4Z

0.1U_0402_16V4Z

FSEL#SPICS#

SPI_CLK

C526

C526

GMCH_ENBKL<5>

SUSP#

PCH_POKICH_POK_EC

1 2

R1296 10K_0402_5%

R1296 10K_0402_5%

@

@

PCH_POK

RB751V-40TE17_SOD323-2

RB751V-40TE17_SOD323-2

SPI_CS#

+3VALW

+3VALW

1

2

R1302 22_0402_5%R1302 22_0402_5%

R1304 22_0402_5%R1304 22_0402_5%

R1305 22_0402_5%R1305 22_0402_5%

+3VALW

Ra

R1291

R1291
100K_0402_5%

100K_0402_5%

1 2

BRD_ID

R1292

R1292
33K +-5% 0402

33K +-5% 0402

D0@

D0@

Rb

1 2

20100115 change R1292 to 33K for Pre-MP phase

VCC

Ra

ID

0

1

2

3

4

5

6

7

VGA_ENBKL<8>

C22 100P_0402_50V8JC22 100P_0402_50V8J

C23 100P_0402_50V8JC23 100P_0402_50V8J

C24 100P_0402_50V8JC24 100P_0402_50V8J

3.3V
100K

BRD ID

R01 (EVT)

R02 (DVT)

R03 (PVT)

R10A (MP)

R01 (EVT)

R02 (DVT)

R03 (PVT)

R10A (MP)

091212 Add C36
to prevent switch noise

1 2

C22 near PR99

1 2

C23 near PR199

1 2

Rb Vab-Typ

Vab-Min Vab-Max

0

8.2K
18K

0V 0V

0.216V 0.289V

0.436V 0.538V
33K
56K

1.036V 1.264V
100K

1.453V 1.759V
200K

1.935V 2.341V
NC

2.500V 3.3V

VGA_ENBKL

GMCH_ENBKL

DIS@

DIS@

1 2

R1522 0_0402_5%

R1522 0_0402_5%

OPT@

OPT@

1 2

R1523 0_0402_5%

R1523 0_0402_5%

0V

0.250V

0.503V

0.819V

1.185V

1.650V

2.200V

3.3V

091212 Add C22, C23, C24
to prevent switch noise

C24 near R800

PCH_POK <5,19>

+3VS

@

@

D30

D30

12

U75

U75

1

CS#

3

WP#

7

HOLD#

4

GND

MX25L512AMC-12G_SO8

MX25L512AMC-12G_SO8

@

@

BT_LED#

TP_CLK

VGATE <5,13,19,42>

8

VCC

6

SCLK

5

SI

2

SO

@

@

1 2

C1177 470P_0402_50V7K

C1177 470P_0402_50V7K

@

@

C816 33P _0402_50V8K

C816 33P _0402_50V8K

091102 reserve C816 33P on TP_CLK
follow RF team revi ew

+3VALW

SPI_CLK_R
SPI_SI
SPI_SO

16M SPI ROM

20mils

12

SPI_CLK_R

12

SPI_SIFWR#SPI_SI FRD#SPI_SO

12

C528

C528

12

U76

U76

8

VCC

3

W

7

HOLD

1

S

6

C

5

D

MX25L1605AM2C-12G_SO8-200mil

MX25L1605AM2C-12G_SO8-200mil

SPI_CLK_R

10P_0402_50V8J

10P_0402_50V8J

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

4

VSS

SPI_SO

2

Q

091123 change SPI ROM to
SA00002TO00 (2MB)

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

R1306 22_0402_5%R1306 22_0402_5%

KB926/BIOS

KB926/BIOS

KB926/BIOS

NAVD0 LA-6091P

NAVD0 LA-6091P

NAVD0 LA-6091P

12

0.875V0.712V

ENBKL

12

R1472

R1472
10K_0402_5%

10K_0402_5%

31 46Wednesday, March 03, 2010

31 46Wednesday, March 03, 2010

31 46Wednesday, March 03, 2010

1.0

1.0

1.0

of

of

of

5

4

3

2

1

To TP/B Conn.

D D

KSI[0..7]

KSO[0..15]

KSI0

C136 100P_0402_50V8JC136 100P_0402_50V8J

KSI1

C135 100P_0402_50V8JC135 100P_0402_50V8J

KSI2

C134 100P_0402_50V8JC134 100P_0402_50V8J

KSI3

C133 100P_0402_50V8JC133 100P_0402_50V8J

KSI4

C132 100P_0402_50V8JC132 100P_0402_50V8J

KSI5

C131 100P_0402_50V8JC131 100P_0402_50V8J

KSI6

C127 100P_0402_50V8JC127 100P_0402_50V8J

KSI7

C126 100P_0402_50V8JC126 100P_0402_50V8J

KSO0

C C

C125 100P_0402_50V8JC125 100P_0402_50V8J

KSO1

C124 100P_0402_50V8JC124 100P_0402_50V8J

KSO2

C114 100P_0402_50V8JC114 100P_0402_50V8J

KSO3

C113 100P_0402_50V8JC113 100P_0402_50V8J

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

KSI[0..7] <31>

KSO[0..15] <31>

KSO4

KSO5

KSO6

KSO7

KSO8

KSO9

KSO10

KSO11

KSO12

KSO13

KSO14

KSO15

INT_KBD Conn.

C104 100P_0402_50V8JC104 100P_0402_50V8J

1 2

C103 100P_0402_50V8JC103 100P_0402_50V8J

1 2

C102 100P_0402_50V8JC102 100P_0402_50V8J

1 2

C101 100P_0402_50V8JC101 100P_0402_50V8J

1 2

C100 100P_0402_50V8JC100 100P_0402_50V8J

1 2

C99 100P_0402_50V8JC99 100P_0402_50V8J

1 2

C98 100P_0402_50V8JC98 100P_0402_50V8J

1 2

C97 100P_0402_50V8JC97 100P_0402_50V8J

1 2

C96 100P_0402_50V8JC96 100P_0402_50V8J

1 2

C95 100P_0402_50V8JC95 100P_0402_50V8J

1 2

C93 100P_0402_50V8JC93 100P_0402_50V8J

1 2

C92 100P_0402_50V8JC92 100P_0402_50V8J

1 2

KSI0
KSI1
KSI2
KSO0
KSO1
KSO2
KSI3
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSI4
KSO9
KSI5
KSI6
KSO10
KSO11
KSI7
KSO12
KSO13
KSO14
KSO15

JKB1

JKB1

26

G2

25

G1

24

24

23

23

22

22

21

21

20

20

19

19

18

18

17

17

16

16

15

15

14

14

13

13

12

12

11

11

10

10

9

9

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

ACES_85202-24051

ACES_85202-24051

CONN@

CONN@

+5VS

1

C522

C522

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

TP_CLK<31>
TP_DATA<31>

PJDLC05C_SOT23-3

PJDLC05C_SOT23-3

TP_CLK

TP_DATA

D22

D22

2

3

1

Chage JP11 Pin define & Add D22 05/14

0111 Add C522 for JP11 pin1

Update TP/B Conn 05/04

0108 Change 24 caps BOM structure from @ to mount (EMI)

JP11

JP11

1

1

2

2

3

3

4

4

5

5

GND

66GND

ACES_85201-0605N

ACES_85201-0605N

CONN@

CONN@

8
7

B B

A A

Security Classification

Security Classification

Security Classification

2009/10/09 2010/10/09

2009/10/09 2010/10/09

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING I S THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING I S THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING I S THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

http://laptop-motherboard-schematic.blogspot.com/

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/10/09 2010/10/09

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

B

B

B

Date: Sheet

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

KB/SW/TP/LPC Debug CONN

KB/SW/TP/LPC Debug CONN

KB/SW/TP/LPC Debug CONN

NAVD0 LA-6091P

NAVD0 LA-6091P

NAVD0 LA-6091P

32 46W ednesday, March 03, 2010

32 46W ednesday, March 03, 2010

32 46W ednesday, March 03, 2010

of

of

1

of

1.0

1.0

1.0

091028 Modify Hole location by 1127_NAVD0_NEW_MB_ASSY_FOR_2865_v11

H_3P2N

H_2P8

H_2P6

H_3P8N

H_8P7X5P8N

H16

H16
H

H_3P0N

H

1

H17

H17
H

H

1

H5

H5
H

H

@

@

1

H7

H7

H6

H6

H

H

H

H

1

@

@

@

@

1

H9

H9

H8

H8

H

H

H

H

1

@

@

@

@

1

H_3P4X3P2N

H24

H24
H

H

@

@

@

@

1

H25

H25
H

H

@

@

@

@

1

H2

H2

H3

H3

H

H

H

H

@

@

@

@

1

1

20100201 change H4 from H_3P2N to H_3P2

H_3P2

H22

H18
H

H

@

H11

H11

H12

H10

H10
H

H

@

@

1

H14

H14

H1

H1

H

H

H

H

@

@

1

H12

H

H

H

H

@

@

@

1

@

@

1

@

1

H23

H23

H13

H13

H

H

H

H

1

@

@

@

@

1

@

1

H

H

H

H

@

@

@

@

1

1

H20

H20

H19

H19

H18

http://laptop-motherboard-schematic.blogspot.com/

H22

H4

H

H

@

@

1

Issued Date

Issued Date

Issued Date

H4
H

H

@

@

1

FM2@FM2

FM4@FM4

@

1

Compal Secret Data

Compal Secret Data

2009/10/09 2010/10/09

2009/10/09 2010/10/09

2009/10/09 2010/10/09

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

H21

H21
H

H

@

@

1

Security Classifica tion

Security Classifica tion

Security Classifica tion

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOU T PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOU T PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOU T PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

FM3@FM3

FM1@FM1

@

@

1

1

@

FIDUCIAL_C40M80

1

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

B

B

B

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

Screw

Screw

Screw

NAVD0 LA-6091P

NAVD0 LA-6091P

NAVD0 LA-6091P

33 46Wednesday, March 03, 2010

33 46Wednesday, March 03, 2010

33 46Wednesday, March 03, 2010

of

of

of

1.0

1.0

1.0

A

B

C

D

E

1 1

091019 remove 10U*2

+VSB

R187

R187
22K +-5% 0402

22K +-5% 0402

100112 change Q47 P/N from SB00000AR00 to SB00000DH00

2 2

091019 remove 10U*2

+VSB

3 3

100112 change Q47 P/N from SB00000AR00 to SB00000DH00

1 2

SUSP

R318

R318
200K +-1% 0402

200K +-1% 0402

SUSP

+5VALW

61

Q17A

Q17A

2

2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

+1.8V

61

2

091113 change Q19 P/N to SB564020020

8
7

5

5VS_GATE

+1.8V to +1.8VS

1.8VS_GATE

Q28A

Q28A

2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

Q19SI4800BDY-T1-E3_SO8 Q19SI4800BDY-T1-E3_SO8

4

1

C208

C208

0.1U 25V K X5R 0402

0.1U 25V K X5R 0402

2

091113 change Q27 P/N to SB564020020

Q27

Q27

D

D

6

S

S

45
2
1

SI3456BDV-T1-E3 1N TSOP6

SI3456BDV-T1-E3 1N TSOP6

G

G

3

1

C396

C396

0.1U 25V K X5R 0402

0.1U 25V K X5R 0402

2

1
2
36

+5VS

1

C219

C219

1U_0603_10V4Z

1U_0603_10V4Z

2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

2

+1.8VS

C395

C395

2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

+3VALW

470_0402_5%

470_0402_5%

R190

R190

Q17B

Q17B

1 2

3

SUSP

5

4

091019 remove 10U*2

+VSB

R139

R139

1 2

33K +-5% 0402

33K +-5% 0402

SUSP

100112 change Q47 P/N from SB00000AR00 to SB00000DH00

1

2

470_0402_5%

470_0402_5%

R317

R317

1 2

3

1U_0603_10V4Z

1U_0603_10V4Z

Q28B

Q28B

SUSP

5

4

ADD +5VS +VCCP +0.89VS Cap for EMI

+5VS

@ C1172

@

+VCCP +0.89VS +1.8V

1

C1173

@ C1173

@

1

C1172

2

2

0.01U_0402_25V7K

0.01U_0402_25V7K

0.01U_0402_25V7K

0.01U_0402_25V7K

+3VALW TO +3VS+5VALW TO +5VS

8
7

5

61

Q12A

Q12A

2

2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

1

C1174

@ C1174

@

2

0.01U_0402_25V7K

0.01U_0402_25V7K

Q15SI4800BDY-T1-E3_SO8 Q15SI4800BDY-T1-E3_SO8

1
2
36

4

1

C179

C179

0.1U 25V K X5R 0402

0.1U 25V K X5R 0402

2

1

C1175

@ C1175

@

2

0.01U_0402_25V7K

0.01U_0402_25V7K

+3VS

C176

C176

1U_0603_10V4Z

1U_0603_10V4Z

2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

+1.8V

1

C1176

@ C1176

@

2

+0.9VS

0.01U_0402_25V7K

0.01U_0402_25V7K

1

2

Q12B

Q12B

470_0402_5%

470_0402_5%

R114

R114

1 2
3

5

4

SUSP<41>

SUSP

+5VALW

R141

R141
100K_0402_5%

100K_0402_5%

1 2

SYSON#

61

Q14A

SYSON<31,40>

SUSP#<31,35,40,41,43>

SYSON

R830

R830

10K_0402_5%

10K_0402_5%

R172

R172

100K_0402_5%

100K_0402_5%

SUSP

R831

R831

10K_0402_5%

10K_0402_5%

+3VLP

@

@

1 2

Q14A

2

2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

VL

R173

R173
100K_0402_5%

100K_0402_5%

1 2

3

Q14B

Q14B

5

2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

4

+1.5VS +1.8V+0.9VS

470_0402_5%

470_0402_5%

R51

R51

@

@

1 2

3

Q6B

2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

4 4

A

http://laptop-motherboard-schematic.blogspot.com/

B

Q6B

5

@

@

4

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

+VCCP

470_0402_5%

470_0402_5%

R57

R57

@

@

1 2

61

Q6A

Q6A

C

SUSP

2

2N7002DW-T/R7_SOT363-6@

2N7002DW-T/R7_SOT363-6@

2009/10/09 2010/10/09

2009/10/09 2010/10/09

2009/10/09 2010/10/09

470_0402_5%

470_0402_5%

R70

R70

@

@

1 2

3

Q8B

Q8B

5

@

@

2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

4

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

470_0402_5%

470_0402_5%

R63

R63

@

@

1 2

61

Q8A

Q8A

@

@

2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

D

100112 change Q47 P/N from SB00000AR00 to SB00000DH00

SYSON#SUSP SUSP

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

B

B

B

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

DC INTERFACE

DC INTERFACE

DC INTERFACE

NAVD0 LA-6091P

NAVD0 LA-6091P

NAVD0 LA-6091P

E

1.0

1.0

34 46Wednesday, March 03, 2010

34 46Wednesday, March 03, 2010

34 46Wednesday, March 03, 2010

1.0

of

of

of

5

4

3

2

1

+3VS to +3VSDGPU Transfer

+3VS

J8

J8

2

1

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

JUMP_43X79

JUMP_43X79

DIS@

DIS@

C803

C803

VGA@

VGA@

112

1

2

D D

0223 change R1507 from 0ohm to 33k

OPT@

VGA_ON#

OPT@

1 2

R1507 33K +-5% 0402

R1507 33K +-5% 0402

C802

C802

OPT@

OPT@

0301 change C802 P/N from SE070104Z80 to SE102104K00

+3VSDGPU_ GATE

0.1U_0402_10V7K

0.1U_0402_10V7K

2

G

G

S

S

Q68

Q68

D

D

AO3413_SOT23-3

AO3413_SOT23-3

1 3

OPT@

OPT@

C1302

C1302

VGA@

VGA@

+1.5VS to +1.5VSDGPU Transfer

C C

+VSB

VGA_ON#

B B

1 2

R721 0_0402_5%

R721 0_0402_5%

+1.5VS

091113 change Q48 P/N to SB564020020

R715

R715
200K +-1% 0402

200K +-1% 0402

VGA@

VGA@

VGA@

VGA@

1.5VSDGPU_ GATE

61

Q50A

Q50A

2

2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

VGA@

VGA@

J10

J10

2

112

JUMP_43X118

JUMP_43X118

@

@

Q48

Q48

D

D

6

S

S

45
2
1

SI3456BDV-T1-E3 1N TSOP6

SI3456BDV-T1-E3 1N TSOP6

G

G

VGA@

VGA@

3

1

C769

C769

0.1U 25V K X5R 0402

0.1U 25V K X5R 0402

2

VGA@

VGA@

0111 Change BOM Structure of C1302/C803/C1303/C801/C1294 from OPT@ to VGA@

50mil(1140mA)

+3VSDGPU

12

R1508

R1508
470_0603_5%

470_0603_5%

OPT@

OPT@

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

13

D

D

2

G

Q69

G

Q69
SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

S

S

OPT@

OPT@

+1.5VSDGPU

1

C768

C768

2

VGA@

VGA@

2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

1U_0603_10V4Z

1U_0603_10V4Z

Q50B

Q50B

VGA@

VGA@

470_0402_5%

470_0402_5%

R716

R716

VGA@

VGA@

1 2

3

VGA@

VGA@

5

1 2

R722 0_0402_5%

R722 0_0402_5%

4

100112 change Q50 P/N from SB00000AR00 to SB00000DH00

VGA_ON#

VGA_ON#

091113 change Q60 P/N to SB564020020

+VSB

R1483

R1483
200K +-1% 0402

200K +-1% 0402

OPT@

OPT@

1 2

R1485 0_0402_5%

R1485 0_0402_5%

100112 change Q55 P/N from SB00000AR00 to SB00000DH00

+VCCP to +1.05VSDGPU Transfer

OPT@

OPT@

+VCCP

1.05VSDGPU _GATE

61

Q55A

Q55A

2

2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

OPT@

OPT@

DGPU_PWR_EN<8,13,31>

SUSP#<31,34,40,41,43>

2

JUMP_43X118

JUMP_43X118

Q60

Q60

6

2
1

VGA_ON

J9

J9

112

DIS@

DIS@

D

D

S

S

45

SI3456BDV-T1-E3 1N TSOP6

SI3456BDV-T1-E3 1N TSOP6

G

G

OPT@

OPT@

3

1

C1296

C1296

0.1U 25V K X5R 0402

0.1U 25V K X5R 0402

2

OPT@

OPT@

C25 100P_0402_50V8J@C25 100P_0402_50V8J@

+1.05VSDGPU

2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

OPT@

OPT@

1 2

R1527 0_0402_5%

R1527 0_0402_5%

DIS@

DIS@

1 2

R800 0_0402_5%

R800 0_0402_5%

1 2

VGA@

VGA@

C1294

C1294

1

2

1U_0603_10V4Z

1U_0603_10V4Z

Q55B

Q55B

OPT@

OPT@

091212 Add C25
to prevent switch noise

470_0402_5%

470_0402_5%

R1479

R1479

OPT@

OPT@

1 2

3

1 2

5

R1481 0_0402_5%

R1481 0_0402_5%

4

VGA_ON

OPT@

OPT@

VGA_ON#

+5VALW

+1.8VS to +1.8VSDGPU Transfer

+1.8VS

J11

091216 change value of R1510 to 200Kohm

S

S

G

VGA_ON#

A A

0301 change C800 P/N from SE070104Z80 to SE102104K00

OPT@

OPT@

R1510 200K +-1% 0402

R1510 200K +-1% 0402

5

+1.8VSDGPU _GATE

C800

C800

OPT@

OPT@

0.1U_0402_10V7K

0.1U_0402_10V7K

G

2

D

D

1 3

C1303

C1303

VGA@

VGA@

J11

2

112

JUMP_43X39

JUMP_43X39

DIS@

Q70

Q70
AO3413_SOT23-3

AO3413_SOT23-3

OPT@

OPT@

DIS@

20mil(300mA)

+1.8VSDGPU

1

C801

C801

VGA@

VGA@

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

http://laptop-motherboard-schematic.blogspot.com/

12

1

2

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

2

G

G

4

R1511

R1511
470_0603_5%

470_0603_5%

OPT@

OPT@

13

D

D

Q71

Q71
SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

S

S

OPT@

OPT@

Security Classifica tion

Security Classifica tion

Security Classifica tion

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOU T PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOU T PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOU T PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/10/09 2010/10/09

2009/10/09 2010/10/09

2009/10/09 2010/10/09

VGA_ON<43>

22K_0402_5%

22K_0402_5%

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

R1497

R1497

VGA@

VGA@

100K_0402_5%

100K_0402_5%

VGA_ON#

12

2

R1496

R1496

VGA@

VGA@

2

G

G

1 2

13

D

D

Q66

Q66
SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

S

S

VGA@

VGA@

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

VGA DC INTERFACE

VGA DC INTERFACE

VGA DC INTERFACE

NAVD0 LA-6091P

NAVD0 LA-6091P

NAVD0 LA-6091P

1

35 46Wednesday, March 03, 2010

35 46Wednesday, March 03, 2010

35 46Wednesday, March 03, 2010

of

of

of

1.0

1.0

1.0

A

1 1

B

C

D

VIN

PL1

PL1

HCB2012KF-121T50_0805

DC_IN_S1

SP02000GC00

PJP1

PJP1

4

6

4

GND

3

5

3

GND

2

2

1

1

ACES 88266-04001

ACES 88266-04001

CONN@

CONN@

2 2

12

PC3

PC3
1000P_0402_50V7K

1000P_0402_50V7K

HCB2012KF-121T50_0805

1 2

12

PC4

PC4

100P_0402_50V8J

100P_0402_50V8J

12

PC5

PC5
100P_0402_50V8J

100P_0402_50V8J

12

PC6

PC6
1000P_0402_50V7K

1000P_0402_50V7K

-

3 3

4 4

BATT+

51ON#<22>

+

PBJ1

@PBJ1

@

MAXEL_ML1220T10

MAXEL_ML1220T10

RLS4148_LL34-2

RLS4148_LL34-2

100K_0402_1%

100K_0402_1%

22K_0402_1%

22K_0402_1%

+CHGRTC

+RTCBATT

12

PD3

PD3

PR13

PR13

PR14

PR14

1 2

560_0603_5%

560_0603_5%

+RTCBATT

12

12

PR16

PR16

1 2

N1

12

PC13

PC13

0.22U_0603_25V7K

0.22U_0603_25V7K

PR17

PR17

560_0603_5%

560_0603_5%

1 2

68_1206_5%

68_1206_5%

PQ1

PQ1

13

TP0610K-T1-E3_SOT23-3

TP0610K-T1-E3_SOT23-3

2

+3VLP

PR10

PR10

VIN

PD2

PD2

RLS4148_LL34-2

RLS4148_LL34-2

1 2

12

12

PC14

PC14

0.1U_0402_25V6

0.1U_0402_25V6

12

PR11

PR11
68_1206_5%

68_1206_5%

VS

PJ1

PJ1

+3VALWP +3VALW +5VALWP +5VALW

+0.89VSP + 0.89VS

2

JUMP_43X118

JUMP_43X118

PJ3

PJ3

2

JUMP_43X118

JUMP_43X118

PJ5

PJ5

2

JUMP_43X79

JUMP_43X79

PJ7

PJ7

2

JUMP_43X118

JUMP_43X118

112

112

112

112

+1.8V+1.8VP

+1.5VS+1.5VSP

+VCCPP

VGA_COREP

+0.9VSP +0.9VS

PJ2

PJ2

2

JUMP_43X118

JUMP_43X118

PJ4

PJ4

2

JUMP_43X118

JUMP_43X118

PJ6

PJ6

2

JUMP_43X118

JUMP_43X118

2

JUMP_43X79

JUMP_43X79

112

112

112

PJ9

PJ9

112

+VCCP

VGA_CORE

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

http://laptop-motherboard-schematic.blogspot.com/

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/10/09 2010/10/09

2009/10/09 2010/10/09

2009/10/09 2010/10/09

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

C

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: S heet

Date: S heet

Date: S heet

Compal Electronics, Inc.

DCIN/DECTOR

DCIN/DECTOR

DCIN/DECTOR

NAVD0 LA-6091P

NAVD0 LA-6091P

NAVD0 LA-6091P

D

36 46Wednesday, March 03, 2010

36 46Wednesday, March 03, 2010

36 46Wednesday, March 03, 2010

of

of

of

1.0

1.0

1.0

A

B

C

D

VMB

PL2

PJP2

1 1

2 2

PJP2

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

GND

10

GND

SUYIN_200275MR008G15QZR

SUYIN_200275MR008G15QZR

@

@

B/I

VMB

EC_SMDA

PR21

PR21

100_0402_1%

100_0402_1%

12

PR220

PR220
1K_0402_5%

1K_0402_5%

EC_SMCA

1 2

PR22

PR22
100_0402_1%

100_0402_1%

1 2

TS

12

PR27

PR27
1K_0402_1%

1K_0402_1%

B+

PR30

PR30

100K_0402_1%

100K_0402_1%

PR25

PR25

6.49K_0402_1%

6.49K_0402_1%

12

1 2

PQ3

PQ3

12

TP0610K-T1-E3_SOT23-3

TP0610K-T1-E3_SOT23-3

PR236

@PR236

@

0_0805_5%

0_0805_5%

2

13

PL2

HCB2012KF-121T50_0805

HCB2012KF-121T50_0805

1 2

12

PC21

PC21
1000P_0402_50V7K

1000P_0402_50V7K

+3VALWP

BATT_TEMP <31>

EC_SMB_CK1 <31>

EC_SMB_DA1 <31>

+VSB

12

PC200

PC200

0.1U_0402_25V6

0.1U_0402_25V6

BATT+

12

PC22

PC22

0.01U_0402_25V7K

0.01U_0402_25V7K

PC23

PC23

0.1U_0603_25V7K

0.1U_0603_25V7K

VL

12

PH1 under CPU botten side :

CPU thermal protection at 92 degree C

Recovery at 70 degree C

12

PR28

PR28

21K_0402_1%

21K_0402_1%

PR31

PR31

13K_0402_1%

13K_0402_1%

1 2

12

PH1

PH1

100K_0402_1%_NCP15W F104F03RC

100K_0402_1%_NCP15W F104F03RC

10K_0402_1%

10K_0402_1%

PU3

PU3

1

VCC

TMSNS1

2

GND

RHYST1

3

OT1

TMSNS2

4

RHYST2

OT2

G718TM1U_SOT23-8

G718TM1U_SOT23-8

PR29

PR29

1 2

8

7

6

5

12

PH2

PH2

@

@

100K_0402_1%_NCP15W F104F03RC

100K_0402_1%_NCP15W F104F03RC

47K_0402_1%@

47K_0402_1%@

1 2

PR169

PR169

VL

PR23
100K_0402_1%

100K_0402_1%

1 2

@PR23

@

MAINPWON <39>

VL

PR32

PR32
22K_0402_1%

3 3

SPOK<39>

PR34

PR34

100K_0402_1%

100K_0402_1%

1 2

1 2

13

D

D

2

G

G

S

S

22K_0402_1%

PQ4

PQ4
2N7002W-T/R 7_SOT323-3

2N7002W-T/R 7_SOT323-3

4 4

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

http://laptop-motherboard-schematic.blogspot.com/

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/10/09 2010/10/09

2009/10/09 2010/10/09

2009/10/09 2010/10/09

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

C

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: S heet

Date: S heet

Date: S heet

Compal Electronics, Inc.

BATTERY CONN / OTP

BATTERY CONN / OTP

BATTERY CONN / OTP

NAVD0 LA-6091P

NAVD0 LA-6091P

NAVD0 LA-6091P

D

of

of

of

37 46Wednesday, March 03, 2010

37 46Wednesday, March 03, 2010

37 46Wednesday, March 03, 2010

1.0

1.0

1.0

A

B

C

D

B+

PQ11

PQ11
SI7121DN-T1-GE3_POWERPAK8- 5

SI7121DN-T1-GE3_POWERPAK8- 5

1
2
3 5

PR62

PR62

10K_0402_1%

10K_0402_1%

PQ16

PQ16

PL5

PL5

1 2

12

PR76

PR76

4.7_1206_5%

4.7_1206_5%

12

PC66

PC66

680P_0402_50V7K

680P_0402_50V7K

4

1 2
13

PR58

PR58

47K_0402_1%

47K_0402_1%

1 2

1SS355TE-17_SOD323-2

1SS355TE-17_SOD323-2

1 2

PD13

PD13

1SS355TE-17_SOD323-2

1SS355TE-17_SOD323-2

2

1 2

PR74 0.05_1206_1%PR74 0.05_1206_1%

CHGCHG

1

2

PD10

PD10

PC58

PC58

VIN

ACOFF

PR64

PR64

200K_0402_1%

200K_0402_1%

1 2

PQ18

PQ18

12

0.1U_0603_25V7K

0.1U_0603_25V7K

4

3

VIN

13

D

D

PACIN

2

G

G

2N7002W-T/R 7_SOT323-3

2N7002W-T/R 7_SOT323-3

S

S

12

PC67

PC67

10U_1206_25V6M

10U_1206_25V6M

BATT+

12

PC68

PC68

1 2

10U_1206_25V6M

10U_1206_25V6M

4.7U_0805_25V6-K

4.7U_0805_25V6-K

PC71

PC71

12

1

2

3

4

5

6

7

8

9

10

11

12

B+

RB751V-40_SOD323-2

RB751V-40_SOD323-2

PU5

PU5

DCIN

ACPRN

CSON

CSOP

CSIN

CSIP

PHASE

UGATE

BOOT

VDDP

LGATE

PGND

24

23

22

21

20

19

18

17

16

15

14

13

VDD

ACSET

EN

CELLS

ICOMP

VCOMP

ICM

VREF

CHLIM

ACLIM

VADJ

GND

ISL6251AHAZ-T_QSOP24

ISL6251AHAZ-T_QSOP24

VIN

PD4

PD4

PR222

PR222

10_1206_5%

10_1206_5%

@

@

1 2
12

DCIN

DCIN

ACPRN

PC59

PC59

0.047U_0603_16V7K

0.047U_0603_16V7K

1 2

PC62

PC62

0.1U_0603_25V7K

0.1U_0603_25V7K

1 2

LX_CHG

DH_CHG

0_0603_5%

0_0603_5%

BST_CHG

6251VDDP

DL_CHG

PJ8

PJ8

2

112

JUMP_43X118

JUMP_43X118

12

12

12

PC214

PC214

1000P_0402_25V8J

1000P_0402_25V8J

PC57

PC57

0.1U_0603_25V7K

0.1U_0603_25V7K

12

20_0402_5%

20_0402_5%

1 2

1 2

PR69

PR69

20_0402_5%

20_0402_5%

12

PR70

PR70
20_0402_5%

20_0402_5%

1 2

2_0402_5%

2_0402_5%

PR78

PR78

1 2

PC70

PC70

1 2

4.7U_0805_6.3V6K

4.7U_0805_6.3V6K

CSIN

CSIP

191K_0402_1%

191K_0402_1%

PR221

PR221

ACSETIN

PR223

PR223

14.3K_0402_1%

14.3K_0402_1%

PR68

PR68

PR72

PR72

0.1U_0603_25V7K

0.1U_0603_25V7K

BST_CHGA

12

PD14

PD14
RB751V-40_SOD323-2

RB751V-40_SOD323-2

1 2

PR82

PR82

4.7_0603_5%

4.7_0603_5%

PC65

PC65

PC165

PC165

0.1U_0603_25V7K

0.1U_0603_25V7K

CSOP

12

6251VDD

CHG_B+

12

12

12

PC50

PC50

4.7U_0805_25V6-K

4.7U_0805_25V6-K

12

PC53

PC53

PC54

PC54

4.7U_0805_25V6-K

4.7U_0805_25V6-K
2200P_0402_25V7K

2200P_0402_25V7K

DTC115EUA_SC70-3

DTC115EUA_SC70-3

5

PQ19

PQ19

AON7408L_DFN8-5

AON7408L_DFN8-5

4

10UH_PCMB062D-100MS_2.5A_20%

10UH_PCMB062D-100MS_2.5A_20%

123

5

PQ21

PQ21

AON7408L_DFN8-5

AON7408L_DFN8-5

4

123

P2

PQ10

PQ10
SI7121DN-T1-GE3_POWERPAK8- 5

PD9

VIN

1 1

12

PR59

PR59
47K_0402_1%

47K_0402_1%

13

D

D

2

G

G

S

S

2N7002W-T/R 7_SOT323-3

2N7002W-T/R 7_SOT323-3

2 2

ACOFF<31>

PD9

B340A_SMA2

B340A_SMA2

DTA144EUA_SC70-3

DTA144EUA_SC70-3

13

2

PQ17

PQ17

PACIN

DTC115EUA_SC70-3

DTC115EUA_SC70-3

ACOFFACOFF

12

PQ12

PQ12

2

1 3

PQ15

PQ15

DTC115EUA_SC70-3

DTC115EUA_SC70-3

PR75

PR75

22K_0402_5%

22K_0402_5%

1 2

PQ22

PQ22

2

12

PQ20

PQ20

2

G

G

13

SI7121DN-T1-GE3_POWERPAK8- 5

1
2
3 5

12

PR60

PR60
200K_0402_1%

200K_0402_1%

PC51

PC51

0.1U_0603_25V7K

0.1U_0603_25V7K

FSTCHG<31>

12

PR66

PR66
150K_0402_1%

150K_0402_1%

2N7002W-T/R 7_SOT323-3

2N7002W-T/R 7_SOT323-3

13

D

D

S

S

IREF<31>

4

ADP_I<31>

62K_0402_1%

62K_0402_1%

100K_0402_1%

100K_0402_1%

1 2

PC52

PC52

5600P_0402_25V7K

5600P_0402_25V7K

1SS355TE-17_SOD323-2

1SS355TE-17_SOD323-2

PC61

PC61

1 2

0.01U_0402_25V7K

0.01U_0402_25V7K

PR77

PR77

12

PR80

PR80

PD12

@PD12

@

1 2

10K_0402_5%

10K_0402_5%

.1U_0402_16V7K

.1U_0402_16V7K

12

PC69

PC69

0.01U_0402_25V7K

0.01U_0402_25V7K

PR65

PR65

1 2

12

P3

PC56

PC56

@

@

PC60 6800P_0402_25V7KPC60 6800P_0402_25V7K

PR71 6.81K_0402_1%PR71 6.81K_0402_1%

1 2

100P_0402_50V8J@

100P_0402_50V8J@

6251VREF

1

2

12

PR67

PR67

1 2

1 2

PC63

PC63

PC64

PC64

1 2

.1U_0402_16V7K

.1U_0402_16V7K

38.3K_0402_1%

38.3K_0402_1%

1 2

PR81

PR81

20K_0402_1%

20K_0402_1%

PR57 0.05_1206_1%PR57 0.05_1206_1%

ACSETIN

12

100K_0402_1%

100K_0402_1%

PR79

PR79

4

3

6251VDD

PC55

PC55

2.2U_0603_6.3V6K

2.2U_0603_6.3V6K

6251_EN CSON

PR73

PR73

100_0402_1%

100_0402_1%

1 2

6251VREF

6251aclim

12

3 3

Iada=0~1.58A(30W)

CP mode

Vaclim=2.39*(4.99K/(20K+4.99K))=1.876V

Iinput=(1/0.05)((0.05*Vaclm)/2.39+0.05)=1.343A

CC=0.3~1.76A
IREF=1.62*Icharge
IREF=0.486V~2.85V

3.24V==>2A

BATT Type

4 4

Normal 3S LI-ON Cells

CP = 85%*Iada ; CP = 1.343A

Charging Voltage
(0x15)

12600mV

CV mode

12.60V

http://laptop-motherboard-schematic.blogspot.com/

A

PR83

PR83

15.4K_0402_1%

15.4K_0402_1%

CALIBRATE#<31>

1 2

VADJ-->VREF-->4.41V

VADJ--->Ground--->3.99V

Vcell=(0.175*VADJ+3.99)

B

PR85

PR85

31.6K_0402_1%

31.6K_0402_1%

1 2

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

PR225

PR225

100K_0402_1%

100K_0402_1%

ACPRN

2009/10/09 2010/10/09

2009/10/09 2010/10/09

2009/10/09 2010/10/09

6251VDD

12

12

PR226

PR226
10K_0402_1%

10K_0402_1%

13

D

D

PQ36

PQ36

2

2N7002W-T/R 7_SOT323-3

2N7002W-T/R 7_SOT323-3

G

G

S

S

Compal Secret Data

Compal Secret Data

Compal Secret Data

12

Deciphered Date

Deciphered Date

Deciphered Date

C

PR224

PR224

10K_0402_1%

10K_0402_1%

1 2

PR227

PR227
20K_0402_1%

20K_0402_1%

PACIN

ACIN <19,31>

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: S heet

Date: S heet

Date: S heet

Compal Electronics, Inc.

CHARGER

CHARGER

CHARGER

NAVD0 LA-6091P

NAVD0 LA-6091P

NAVD0 LA-6091P

D

38 46Wednesday, March 03, 2010

38 46Wednesday, March 03, 2010

38 46Wednesday, March 03, 2010

of

of

of

1.0

1.0

1.0

5

4

3

2

1

2VREF_51125

12

PC202

PR41

PR41

PR43

PR43

25

10

11

12

PC202

0.22U_0603_10V7K

0.22U_0603_10V7K

PR42

PR42

30K_0402_1%

30K_0402_1%

1 2

PR44

PR44

19.1K_0402_1%

19.1K_0402_1%

1 2

PR229

PR229

158K_0402_1%

ENTRIP2

3

4

5

6

PU4

PU4

P PAD

VFB2

VREF

TONSEL

ENTRIP2

7

VO2

8

VREG3

9

VBST2

VFB=2.0V

DRVH2

LL2

DRVL2

GND

VIN

SKIPSEL

EN0

15

16

14

13

1 2

PR231

PR231

0_0402_5%@

0_0402_5%@

B++

12

158K_0402_1%

ENTRIP1

1 2

2

1

VFB1

ENTRIP1

24

VO1

23

PGOOD

22

VBST1

21

DRVH1

20

LL1

19

DRVL1

VREG5

VCLK

TPS51125RGER_QFN24_4X4

TPS51125RGER_QFN24_4X4

17

18

PC205

PC205

4.7U_0805_10V6K

4.7U_0805_10V6K

VL

12

BST_5V

UG_5V

LX_5V

LG_5V

B++

PC32

PC32

10U_1206_25V6M

10U_1206_25V6M

PR40

PR40

0_0603_5%

0_0603_5%

1 2

12

SPOK <37>

PC41

PC41

0.1U_0402_16V7K

0.1U_0402_16V7K

1 2

12

PC34

PC34

2200P_0402_50V7K

2200P_0402_50V7K

PQ6

PQ6
AON7408L_DFN8-5

AON7408L_DFN8-5

3 5

241

8.2UH 20% FMJ-0630T-8R2A HF 4.5A

8.2UH 20% FMJ-0630T-8R2A HF 4.5A

3

12

2

PQ8

PQ8

IRFH3707TRPBF_PQFN8-3

IRFH3707TRPBF_PQFN8-3

12

1

PL4

PL4

1 2

PR38

PR38

4.7_1206_5%

4.7_1206_5%

PC43

PC43

680P_0402_50V7K

680P_0402_50V7K

1

+

+

PC44

PC44

2

150U_B2_6.3VM_R45M

150U_B2_6.3VM_R45M

+5VALWP

D D

12.7K_0402_1%

12.7K_0402_1%

1 2

B++

PL11

PL11

HCB2012KF-121T50_0805

HCB2012KF-121T50_0805

B+

1 2

C C

B B

PC36

PC36

+3VALWP

12

PC31

PC31

10U_1206_25V6M

10U_1206_25V6M

ENTRIP1

12

2200P_0402_50V7K

2200P_0402_50V7K

8.2UH 20% FMJ-0630T-8R2A HF 4.5A

8.2UH 20% FMJ-0630T-8R2A HF 4.5A

AON7408L_DFN8-5

AON7408L_DFN8-5

1 2

1

+

+

PC39

PC39

2

150U_B2_6.3VM_R45M

150U_B2_6.3VM_R45M

ENTRIP2

PL3

PL3

PQ5

PQ5

PR37

PR37

4.7_1206_5%

4.7_1206_5%

PC42

PC42

680P_0402_50V7K

680P_0402_50V7K

3 5

241

3

12

12

PQ7

PQ7

2

IRFH3707TRPBF_PQFN8-3

IRFH3707TRPBF_PQFN8-3

1

12

PC203

PC203

4.7U_0805_10V6K

4.7U_0805_10V6K

1 2

PC40

PC40

0.1U_0402_16V7K

0.1U_0402_16V7K

B+

+3VLP

PR39

PR39

1 2

0_0603_5%

0_0603_5%

PR230

PR230

499K_0402_1%

499K_0402_1%

1 2

PR232

PR232

12

100K_0402_1%

100K_0402_1%

162K_0402_1%

162K_0402_1%

BST_3V

UG_3V

LX_3V

LG_3V

PC204

PC204

1U_0603_10V6K

1U_0603_10V6K

18.7K_0402_1%

18.7K_0402_1%

1 2

PR228

PR228

1 2

12

2VREF_51125

13

D

D

PQ33

PQ33

2N7002W-T/R7_SOT323-3

2N7002W-T/R7_SOT323-3

VL

100K_0402_1%

100K_0402_1%

MAINPWON<37>

1 2

VS

A A

PR234

PR234

100K_0402_1%

100K_0402_1%

12

PR235

PR235

5

S

S

PR233

PR233

2

12

PC213

@ PC213

@

40.2K_0402_1%

40.2K_0402_1%

2

G

G

12

13

0.01U_0402_16V7K

0.01U_0402_16V7K

13

D

D

PQ34

PQ34

2

G

G

2N7002W-T/R7_SOT323-3

2N7002W-T/R7_SOT323-3

S

S

PQ35

PQ35
DTC115EUA_SC70-3

DTC115EUA_SC70-3

+3.3VALWP Ipeak=6.42A=(5.82+0.6)A Imax=4.5A Vo=3.3V
Rds(on)=17.9m ohm(max) ; Rds(on)=14.5m ohm(typical)
Vtrip=(10E-06 * 143K)/9-24mV=156mV
Ilimit=156/(14.5~14.5*1.2)=10.76~7.26 A

Iocp=Ilimit+Delta I/2
=11.3~7.81A
Delta I=1.090A (Freq=305KHz)

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAI NS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAI NS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAI NS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

http://laptop-motherboard-schematic.blogspot.com/

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/10/09 2010/10/09

2009/10/09 2010/10/09

2009/10/09 2010/10/09

3

PC212

PC212

0.1U_0603_25V7K

0.1U_0603_25V7K

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

+5VALWP Ipeak=3.86A Imax=2.7A Vo=5.14v
Rds(on)=17.9m ohm(max) ; Rds(on)=14.5m ohm(typical)
Vtrip=(10E-06 * 158K)/9-24mV=151mV
Ilimit=151mV/17.9m ~151mV/14.5m x 1.2
=8.467A ~ 8.710A
Iocp=Ilimit+Delta I/2
=9.384A ~ 9.627A
Delta I=1.834A (Freq=245KHz)

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

3V/5V

3V/5V

3V/5V

NAVD0 LA-6091P

NAVD0 LA-6091P

NAVD0 LA-6091P

1

1.0

1.0

1.0

39 46W ednesday, March 03, 2010

39 46W ednesday, March 03, 2010

39 46W ednesday, March 03, 2010

of

of

of

A

B

C

1.8V_B+

1.8V_B+

PL12

PL12

HCB2012KF-121T50_0805

HCB2012KF-121T50_0805

1 2

B+

D

12

5

PC73

PC73

PR89

PR89

300K_0402_5%

300K_0402_5%

2

3

4

5

6

PU7

PU7

TON

VOUT

VDD

FB

PGOOD

PU6

PU6

TON

VOUT

VDD

FB

PGOOD

1 2

1

15

NC

EN/DEM

GND7PGND

8

PR98

PR98

300K_0402_5%

300K_0402_5%

1 2

BST_1.05V

15

14

1

NC

BOOT

UGATE

EN/DEM

PHASE

LGATE

GND7PGND

RT8209BGQW _WQFN14_3P5X3P5

RT8209BGQW _WQFN14_3P5X3P5

8

PR91

PR91

0_0603_5%

0_0603_5%

BST_1.8V

1 2

14

13

BOOT

UGATE

12

PHASE

11

CS

10

VDDP

9

LGATE

RT8209BGQW _WQFN14_3P5X3P5

RT8209BGQW _WQFN14_3P5X3P5

0_0603_5%

0_0603_5%

1 2

13

12

11

CS

10

VDDP

9

PR100

PR100

1 2

14K_0402_1%

14K_0402_1%

BST_1.8V-1

DH_1.8V

LX_1.8V

1 2

PR95

PR95

13.7K_0402_1%

13.7K_0402_1%

DL_1.8V

BST_1.05V-1

DH_1.05V

LX_1.05V

PR104

PR104

DL_1.05V

PC76

PC76

1 2

0.1U_0603_25V7K

0.1U_0603_25V7K

+5VALW

12

PC82

PC82

4.7U_0805_10V6K

4.7U_0805_10V6K

PC87

PC87

0.1U_0603_25V7K

0.1U_0603_25V7K

1 2

+5VALW

12

PC92

PC92

4.7U_0603_10V6K

4.7U_0603_10V6K

1 1

SYSON<31,34>

+5VALW

<Vo=1.8V> VFB=0.75V
Vo=VFB*(1+PR96/PR97)=1.8V
Fsw=262 KHz

Cout ESR=15m ohm Rdson(max)=17.9m Rdson(typical)=14.5m
Ipeak=6.36 A, Imax=4.45 A, Iocp=7.63 A

2 2

Delta I=((19-1.8)*(1.8/19))/(2.2u*262 K)=2.82 A
=>1/2DeltaI=1.41A
Vtrip=137mV
Iocp=Vtrip/(Rdson)+1.41
=95.3/(17.9~21.48)+ 1.41=9.07~7.79

SUSP#<31,34,35,41,43>

3 3

<Vo=1.052V> VFB=0.75V
Vo=VFB*(1+PR105/PR106)=1.052V
Fsw=262KHz

Cout ESR=15m ohm Rdson(max)=17.9m Rdson(typical)=14.5m
Ipeak=6.1A, Imax=4.27 A, Iocp=7.32 A
Delta I=((19-1.05)*(1.05/19))/(2.2u*262K)= 1.72A
=>1/2DeltaI=0.86A
Vtrip=14K*10uA=0.140 V

4 4

Iocp=Vtrip/(Rdson)+0.86
=113/(17.9~21.48)+0.86=8.68~7.37 A

+5VALW

PR90

PR90

1K_0402_1%

1K_0402_1%

1 2

PR92

@ PR92

@

30K_0402_5%

30K_0402_5%

PR94

PR94

100_0603_1%

100_0603_1%

1 2

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

PR99

PR99

1K_0402_1%

1K_0402_1%

1 2

PR101

@ PR101

@

30K_0402_5%

30K_0402_5%

PR103

PR103

100_0603_1%

100_0603_1%

1 2

PC89

PC89

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

PC79

PC79

12

12

12

12

PC77

PC77
1U_0402_6.3V6K

1U_0402_6.3V6K

12

PC86

PC86

.1U_0402_16V7K

.1U_0402_16V7K

12

12

@

@

PC208

PC208

47P_0402_50V8J

47P_0402_50V8J

1 2

PR96

PR96

5.9K_0402_1%

5.9K_0402_1%

1 2

12

PR97

PR97

4.12K_0402_1%

4.12K_0402_1%

@

@

PC209

PC209

47P_0402_50V8J

47P_0402_50V8J

1 2

PR105

PR105

3.48K_0402_1%

3.48K_0402_1%

1 2

PR106

PR106

8.25K_0402_1%

8.25K_0402_1%

2

3

4

5

6

4

PQ23

PQ23

AON7408L_DFN8-5

AON7408L_DFN8-5

123

3

PQ24

PQ24

2

1

IRFH3707TRPBF_PQFN8-3

IRFH3707TRPBF_PQFN8-3

5

4

PQ25

PQ25

AON7408L_DFN8-5

AON7408L_DFN8-5

123

2.2UH_FMJ-0630T-2R2 HF_8A_20%

2.2UH_FMJ-0630T-2R2 HF_8A_20%

3

2

PQ26

PQ26

1

IRFH3707TRPBF_PQFN8-3

IRFH3707TRPBF_PQFN8-3

12

PC33

PC33

10U_1206_25V6M

10U_1206_25V6M

2200P_0402_50V7K

2200P_0402_50V7K

PL6

PL6

2.2UH_FMJ-0624T-2R2 HF_7A_20%

2.2UH_FMJ-0624T-2R2 HF_7A_20%

1 2

12

PR93

PR93

4.7_1206_5%

4.7_1206_5%

12

PC80

PC80

680P_0603_50V7K

680P_0603_50V7K

+VCCP_B+

12

12

PC30

PC30

PC83

PC83

10U_1206_25V6M

10U_1206_25V6M

2200P_0402_50V7K

2200P_0402_50V7K

PL7

PL7

1 2

12

PR102

PR102

4.7_1206_5%

4.7_1206_5%

12

PC90

PC90

680P_0603_50V7K

680P_0603_50V7K

12

PC166

PC166

0.1U_0603_25V7K

0.1U_0603_25V7K

1

+

+

2

HCB2012KF-121T50_0805

HCB2012KF-121T50_0805

1 2

12

PC167

PC167

0.1U_0603_25V7K

0.1U_0603_25V7K

1

+

+

PC88

PC88

2

PC78

PC78

330U_B2_2.5VM_R15M

330U_B2_2.5VM_R15M

220U_B2_2.5VM

220U_B2_2.5VM

PL13

PL13

+1.8VP

B+

+VCCPP

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

http://laptop-motherboard-schematic.blogspot.com/

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/10/09 2010/10/09

2009/10/09 2010/10/09

2009/10/09 2010/10/09

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

C

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: S heet

Date: S heet

Date: S heet

Compal Electronics, Inc.

VCCPP/1.8VP

VCCPP/1.8VP

VCCPP/1.8VP

NAVD0 LA-6091P

NAVD0 LA-6091P

NAVD0 LA-6091P

D

40 46Wednesday, March 03, 2010

40 46Wednesday, March 03, 2010

40 46Wednesday, March 03, 2010

of

of

of

1.0

1.0

1.0

5

4

3

2

1

D D

<Vo=0.89V> VFB=0.6V
Vo=VFB*(1+PR117/PR116)=0.6*(1+30.1K/61.9K)=0.8917V

Ipeak=2.64A

PL14

PU9

@

@

PJ10

PJ10

+5VALWP

C C

B B

A A

2

112

JUMP_43X79

JUMP_43X79

SUSP#<31,34,35,40,43>

12

PC105

PC105
22U_0805_6.3VAM

22U_0805_6.3VAM

1 2

PR119 0_0402_5%PR119 0_0402_5%

EN_SY8033B

47K_0402_5%@

47K_0402_5%@

PR125

PR125

1 2

PU9

4

10

PVIN

PG

9

PVIN

8

SVIN

5

EN

TP

NC

7

11

SY8033BDBC_DFN10_3X3

12

PC104

PC104

@

@

0.1U_0402_10V7K

0.1U_0402_10V7K

SY8033BDBC_DFN10_3X3

LX_SY8033B

2

LX

3

LX

6

FB

NC

1

12

12

PL14

1UH_PCMB062D-1R0MS_9A_20%

1UH_PCMB062D-1R0MS_9A_20%

1 2

12

PR117

PR117

30.9K_0402_1%

30.9K_0402_1%

PR118

PR118

4.7_1206_5%

4.7_1206_5%

FB_SY8033B

12

PR116

PR116

61.9K_0402_1%

61.9K_0402_1%

PC103

PC103

680P_0603_50V7K

680P_0603_50V7K

SUSP<34>

PC102

PC102

@

@

12

22P_0402_50V8J

22P_0402_50V8J

0_0402_5%

0_0402_5%

1 2

.1U_0402_16V7K

.1U_0402_16V7K

12

PR122

PR122

12

PC101

PC101

22U_0805_6.3VAM

22U_0805_6.3VAM

4.7U_0805_6.3V6K

4.7U_0805_6.3V6K

12

PC113

PC113

+0.89VSP

PC211

PC211

22U_0805_6.3VAM

22U_0805_6.3VAM

+1.8V

1

PJ11

PJ11

1

JUMP_43X79

JUMP_43X79

2

2

PC110

PC110

1 2

1K_0402_1%

1K_0402_1%

13

D

D

PQ29

PQ29

2

1K_0402_1%

1K_0402_1%

G

G

S

S

2N7002W-T/R 7_SOT323-3

2N7002W-T/R 7_SOT323-3

PR121

PR121

PR123

PR123

PU11

PU11

VIN1VCNTL

2

12

12

12

PC112

PC112

.1U_0402_16V7K

.1U_0402_16V7K

GND

3

VREF

4

VOUT

APL5336KAI-TRL SOP

APL5336KAI-TRL SOP

12

PC114

PC114

10U_0805_6.3V6M

10U_0805_6.3V6M

12

6

5

NC

7

NC

8

NC

9

TP

+0.9VSP

Ipeak=1A, Imax=0.7A

PC199

PC199

.1U_0402_16V7K

.1U_0402_16V7K

+3VALW

12

PC111

PC111
1U_0603_6.3V6M

1U_0603_6.3V6M

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

http://laptop-motherboard-schematic.blogspot.com/

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/10/09 2010/10/09

2009/10/09 2010/10/09

2009/10/09 2010/10/09

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: S heet

Date: S heet

2

Date: S heet

Compal Electronics, Inc.

0.89VSP/0.9VSP

0.89VSP/0.9VSP

0.89VSP/0.9VSP

NAVD0 LA-6091P

NAVD0 LA-6091P

NAVD0 LA-6091P

41 46Wednesday, March 03, 2010

41 46Wednesday, March 03, 2010

41 46Wednesday, March 03, 2010

1

1.0

1.0

1.0

of

of

of

A

1 1

VGATE<5,13,19, 31>

2 2

12

PC184

PC184
1000P_0402_50V7K

1000P_0402_50V7K

390P_0402_50V7K

390P_0402_50V7K

3 3

PR150

PR150

0_0402_5%

0_0402_5%

1 2

1 2

VSSSENSE

VCCSENSE

CLK_ENABLE#<13>

1 2

PC185

PC185

1 2

PR208

PR208

1K_0402_1%

1K_0402_1%

470P_0402_50V8J

470P_0402_50V8J

Avoid high dV/dt

PR158

PR158
0_0402_5%

0_0402_5%

<6>

<6>

1 2

PC188

PC188

3211_COMP-1

PR195

PR195

0_0402_5%

0_0402_5%

3211_PWRGD

12

+3VS

12

PC187

PC187

47P_0402_50V8J

47P_0402_50V8J

1 2

PR207

PR207

28K_0402_1%

28K_0402_1%

2.61K_0402_1%

2.61K_0402_1%

Connect to input caps

B

PR205

PR205
10K_0402_1%

10K_0402_1%

12

PR209

PR209

+CPU_B+

+3VS

12

3211_FB

3211_COMP

3211_ILIM

1 2

3211_CSCOMP

PR194

PR194

4.7K_0402_1%

4.7K_0402_1%

PU12

PU12

1

2

3

4

5

6

7

8

3211_IREF

PR210

PR210

80.6K_0402_1%

80.6K_0402_1%

1 2

PR219

PR219

1K_0402_1%

1K_0402_1%

1000P_0402_50V7K

1000P_0402_50V7K

VR_ON

CPU_VID0

CPU_VID1

PR198 0_0402_5%PR198 0_0402_5%

PR196 0_0402_5%PR196 0_0402_5%

PR197 0_0402_5%PR197 0_0402_5%

1 2

1 2

1 2

VID0

VID1

3211_EN

32

EN

VID031VID130VID229VID328VID427VID526VID6

PWRGD

IMON

CLKEN#

FBRTN

ADP3211AMNR2G_QFN32_5X5

ADP3211AMNR2G_QFN32_5X5

FB

COMP

GPU

ILIM

IREF9RPM10RT11RAMP12LLINE13CSREF14CSFB15CSCOMP

3211_RT

3211_RPM

PR211

PR211

PR212

PR212

1 2

1 2

200K_0402_1%

200K_0402_1%

274K_0402_1%

274K_0402_1%

3211_RAMP-1

12

PC191

PC191

CPU_VID2

PR199 0_0402_5%PR199 0_0402_5%

1 2

VID2

3211_RAMP

12

12

C

<5>

<31>

CPU_VID3

CPU_VID4

PR202 0_0402_5%PR202 0_0402_5%

PR201 0_0402_5%PR201 0_0402_5%

1 2

1 2

VID3

VID4

3211_CSCOMP

PR214

PR214

499K_0402_1%

499K_0402_1%

12

<5>

<5>

<5>

CPU_VID5

CPU_VID6

PR204 0_0402_5%PR204 0_0402_5%

PR203 0_0402_5%PR203 0_0402_5%

1 2

1 2

VID5

VID6

25

VCC

BST

DRVH

SW

PVCC

DRVL

PGND

AGND

AGND

16

3211_CSCOMP

3211_CSFB

12

1000P_0402_50V7K

1000P_0402_50V7K
PC192

PC192

<5>

<5>

<5>

+5VS

PR200

PR200
10_0603_1%

10_0603_1%

1 2

12

3211_VCC

24

CPU_BOOST

23

3211_DRVH

22

3211_SW

21

20

3211_DRVL

19

18

17

33

PC189

PC189
1000P_0402_50V7K

1000P_0402_50V7K

Shortest the
net trace

D

PC182

PC182
1U_0805_25V6K

1U_0805_25V6K

PR206

PR206
0_0603_5%

0_0603_5%

1 2

100K_0402_1%_NCP15WF104F03RC

100K_0402_1%_NCP15WF104F03RC

35.7K_0402_1%

35.7K_0402_1%

12

PC190

PC190
220P_0402_50V7K

220P_0402_50V7K

CPU_BOOST-1

2.2U_0603_10V6K

2.2U_0603_10V6K

PH4

PH4

1 2

PR213

PR213

PC183

PC183

0.22U_0603_25V7K

0.22U_0603_25V7K

1 2

+5VS

12

PC186

PC186

IRFH3707TRPBF_PQFN8-3

IRFH3707TRPBF_PQFN8-3

Place RTH1 close to inductor
on the same layer

12

12

PR217

PR217
75K_0402_1%

75K_0402_1%

4

PQ31

PQ31

2

PR218

PR218

422K_0402_1%

422K_0402_1%

12

5

123

3

1

PQ30

PQ30

AON7408L_DFN8-5

AON7408L_DFN8-5

12

PR124

PR124

4.7_1206_5%

4.7_1206_5%

12

PC115

PC115
680P_0603_50V7K

680P_0603_50V7K

E

+CPU_B+

12

PC107

PC107

10U_1206_25V6M

10U_1206_25V6M

PL10

PL10

2.2UH_FMJ-0624T-2R2 HF_7A_20%

2.2UH_FMJ-0624T-2R2 HF_7A_20%

1 2

12

PC147

PC147

2200P_0402_50V7K

2200P_0402_50V7K

+CPU_CORE

F

HCB2012KF-121T50_0805

HCB2012KF-121T50_0805

1 2

12

PC148

PC148

0.1U_0402_25V6

0.1U_0402_25V6

LL=5.9m ohm
OCP=7.85A
VID:0.75V~1.1V
Io(max)=6.04A
DCR=23m

G

PL9

PL9

B+

H

+CPU_CORE

4 4

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY TH IRD PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY TH IRD PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

http://laptop-motherboard-schematic.blogspot.com/

C

D

MAY BE USED BY OR DISCLOSED TO ANY TH IRD PARTY WITHOUT PRIOR WR ITTEN CONSENT OF COMPAL ELECTRONICS, INC.

E

2009/10/09 2010/10/09

2009/10/09 2010/10/09

2009/10/09 2010/10/09

Compal Secret Dat a

Compal Secret Dat a

Compal Secret Dat a

Deciphered Dat e

Deciphered Dat e

Deciphered Dat e

F

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

Date: Sheet

Date: Sheet

Date: Sheet

G

Compal Electronics, Inc.

CPU_CORE

CPU_CORE

CPU_CORE

NAVD0 LA-6091P

NAVD0 LA-6091P

NAVD0 LA-6091P

42 46W ednesday, March 03, 2010

42 46W ednesday, March 03, 2010

42 46W ednesday, March 03, 2010

H

of

of

of

1.0

1.0

1.0

5

Ipeak=11.6 A
Imax=8.15 A

delta I=3.27A 1/2 delta I=1.636 A
Iocp=RTEIP*ITRIP/RDS(ON)+1/2 I=14~11.98 A
Rds(on)=11~14m

D D

PR249

PR249

47K_0402_1%

47K_0402_1%

PC206

PC206

1 2

30K_0402_5%

30K_0402_5%

12

@

@

PR120

PR120

12

12

@

@

47P_0402_50V8J

47P_0402_50V8J

1.58K_0402_1%

1.58K_0402_1%

1 2

PR184

PR184
10K_0402_1%

10K_0402_1%

VGA_ON<35>

PR252

PR252

100_0603_1%

100_0603_1%

+5VALW

C C

1 2

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

GPU_VID0 GPU_VID1

0

0

1

B B

Vo=1.518V
Fsw=262 KHz

Ipeak=8.62 A
Imax=6.034 A
Iocp=10.35 A

A A

Rds(on)=17.9m ohm(max) ; Rds(on)=14.5m ohm(typical)

Ilimit=9.44A ~ 7.86A
Iocp=Ilimit+Delta I/2
=12~10.5A
Delta I=5.27A (Freq=262KHz)

1.03 V

0

1 0.85V

1

PR115

PR115

0_0402_5%

0_0402_5%

+5VALW

1 2

@

@

PR110

PR110

30K_0402_5%

30K_0402_5%

PR111

PR111

100_0603_1%

100_0603_1%

1 2

PC99

PC99

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

12

SUSP#<31,34,35,40,41>

http://laptop-motherboard-schematic.blogspot.com/

5

12

PC81

PC81

0.1U_0402_16V7K

0.1U_0402_16V7K

PC207

PC207

1 2

PR192

PR192

12

@

@

PC97

PC97
.1U_0402_16V7K

.1U_0402_16V7K

12

4

VGA_TON

VGA_EN

VGA_V5FILT

VGA_FB

10K_0402_1%

10K_0402_1%

PR255

PR255

1 2

+5VS

VGAPWRGD<31>

@

@

PR245

PR245
2K_0402_1%

2K_0402_1%

2N7002W-T/R 7_SOT323-3

2N7002W-T/R 7_SOT323-3

@

@

PC210

PC210

47P_0402_50V8J

47P_0402_50V8J

1 2

PR107

PR107

4.22K_0402_1%

4.22K_0402_1%

1 2

12

PR108

PR108

4.12K_0402_1%

4.12K_0402_1%

4

PQ50

PQ50

1 2

12

PU13

PU13

2

TON

3

VOUT

4

VDD

5

FB

6

PGOOD

PR216

PR216
0_0402_5%

0_0402_5%

PC93

@PC93

@

0.22U_0402_10V6K

0.22U_0402_10V6K

12

13

D

D

G

G

S

S

PU8

PU8

2

TON

3

VOUT

4

VDD

5

FB

6

PGOOD

PR253

PR253

300K_0402_5%

300K_0402_5%

1 2

1

15

NC

EN/DEM

GND7PGND

1 2

2

12

PC180

PC180

0.22U_0402_10V4Z

0.22U_0402_10V4Z

300K_0402_5%

300K_0402_5%

1 2

1

EN/DEM

3

PQ41

PQ41
AON7408L_DFN8-5

AON7408L_DFN8-5

PR193

PR193

0_0603_5%

0_0603_5%

BST_VGA-1BST_VGA

1 2

14

UG_VGA

13

BOOT

UGATE

PHASE

VDDP

LGATE

RT8209BGQW _WQFN14_3P5X3P5

RT8209BGQW _WQFN14_3P5X3P5

8

SW_VGA

12

VGA_TRIP

11

CS

10

LG_VGA

9

VFB=0.75V

+3VSDGPU

PR243

PR243
10K_0402_5%

10K_0402_5%

@

@

1 2

PR246

PR246

10K_0402_5%

10K_0402_5%

PR112

PR112

15

GND7PGND

PR241

PR241
10K_0402_5%

10K_0402_5%

1 2

0_0603_5%

0_0603_5%

BST_1.5V

1 2

14

NC

Security Classification

Security Classification

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

13

BOOT

UGATE

12

PHASE

11

CS

10

VDDP

9

LGATE

RT8209BGQW _WQFN14_3P5X3P5

RT8209BGQW _WQFN14_3P5X3P5

8

Issued Date

Issued Date

Issued Date

1 2

PR215

PR215

15.8K_0402_1%

15.8K_0402_1%

@PR248

@

2.61K_0402_1%

2.61K_0402_1%

GPU_VID0 <8>

PR114

PR114

DH_1.5V

LX_1.5V

1 2

PR109

PR109

16.9K_0402_1%

16.9K_0402_1%

DL_1.5V

3

1 2

PC155

PC155

0.1U_0603_25V7K

0.1U_0603_25V7K

+5VALW

12

PC150

PC150

4.7U_0805_10V6K

4.7U_0805_10V6K

12

PR248

13

D

D

2

12

G

G

PC181

S

S

BST_1.5V-1

PC181

0.22U_0402_10V4Z

0.22U_0402_10V4Z

PQ51

PQ51

2N7002W-T/R 7_SOT323-3

2N7002W-T/R 7_SOT323-3

PC94

PC94

0.1U_0603_25V7K

0.1U_0603_25V7K

1 2

+5VALW

12

PC98

PC98

4.7U_0805_10V6K

4.7U_0805_10V6K

2009/10/09 2010/10/09

2009/10/09 2010/10/09

2009/10/09 2010/10/09

3 5

5

4

+3VSDGPU

PR247

PR247

1 2

10K_0402_5%

10K_0402_5%

4

4

Compal Secret Data

Compal Secret Data

Compal Secret Data

241

1UH_PCMB062D-1R0MS_9A_20%

1UH_PCMB062D-1R0MS_9A_20%

12

12

PQ32

PQ32

123

AON7702L_DFN8-5

AON7702L_DFN8-5

@

@

PR244

PR244
10K_0402_5%

10K_0402_5%

1 2

PR242

PR242
10K_0402_5%

10K_0402_5%

1 2

5

PQ28

PQ28

AON7408L_DFN8-5

AON7408L_DFN8-5

123

5

PQ27

PQ27

AON7702L_DFN8-5

AON7702L_DFN8-5

123

Deciphered Date

Deciphered Date

Deciphered Date

PR250

PR250

PC201

PC201

GPU_VID1 <8>

2

PC106

PC106

10U_1206_25V6M

10U_1206_25V6M

PL18

PL18

1 2

4.7_1206_5%

4.7_1206_5%
PR251

PR251
0_0402_5%

0_0402_5%

680P_0603_50V7K

680P_0603_50V7K

12

PC96

PC96

PC100

PC100

10U_1206_25V6M

10U_1206_25V6M

2200P_0402_50V7K

2200P_0402_50V7K

2.2UH_FMJ-0630T-2R2 HF_8A_20%

2.2UH_FMJ-0630T-2R2 HF_8A_20%

1 2

12

PR113

PR113

4.7_1206_5%

4.7_1206_5%

12

PC95

PC95

680P_0603_50V7K

680P_0603_50V7K

2

12

PL8

PL8

1 2

12

1.5V_B+

12

PL20

PL20

HCB2012KF-121T50_0805

HCB2012KF-121T50_0805

1

+

+

2

PR254

PR254

1 2

10_0402_1%

10_0402_1%

B+

VGA_COREP

PC149

PC149

330U_D2E_2.5VM_R9M

330U_D2E_2.5VM_R9M

PL15

PL15

HCB2012KF-121T50_0805

HCB2012KF-121T50_0805

1 2

1

+

+

PC91

PC91

2

330U_B2_2.5VM_R15M

330U_B2_2.5VM_R15M

1

+VGASENSE <10>

B+

+1.5VSP

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: S heet

Date: S heet

Date: S heet

Compal Electronics, Inc.

VGA_CORE/1.5VSP

VGA_CORE/1.5VSP

VGA_CORE/1.5VSP

NAVD0 LA-6091P

NAVD0 LA-6091P

NAVD0 LA-6091P

43 46Wednesday, March 03, 2010

43 46Wednesday, March 03, 2010

43 46Wednesday, March 03, 2010

1

of

of

of

1.0

1.0

1.0

5

4

3

2

1

9HUVLRQFKDQJHOLVW3,5/LVW 3DJHRIIRU3:5

5HDVRQIRUFKDQJH 5HY 3* 0RGLI\/LVW 'DWH 3KDVH)L[HG,VVXH,WHP

D D









For cost down change 0.89V from MP2121 to SY8033A

A

A

A

change PC50 PC53 to 0805 4.7uFor save layout space and shortage

Reserve PR216 PC93For VGA_core 51117 power good delay

Delet PC35 PC36, change PC29 PC32 to 1206 10uFSave layout space







C C







For cost down

For cost down

For Design change

For cost down change 1.5V PL8 to 3mm height

For cost down change VCCP PL7 to 3mm height

For Design change change PQ31 to IRFH3707











B B











change VCCP enable RC ,for HW request change PR99 to 1k ohm ,pc86 to 0.1u,unpop PR110

change VGACORE enable RC ,for HW request change PR249 to 47k ohm ,pc81 to 0.1u,unpop PR120

For charger ripple

For charger ripple

Buyer suggest change PQ36 from 2N7002 TO SSM3K7002FU

Fix VGA_VID at 0.85V delete PR248 PR245 ,change PR192 to 1.58K

OTP INPUT PULL HIGH resister Add PR29

change OTP set change PR31 to 13K

A

A

A

A

A

A

A

A

A

A





A A

51125 VL cap size up to 1206 change PC205 to 1206 size



delet Vin detector,battery OVP circuit

change 3V/5v from ISL6237 to TPS51125

change PR116 to 61.9K PR117 to 30.1K
PL14 to 1uH

change PQ23 PQ25 PQ28 PQ30 TO AON7408For Design change

change PR115 to 0 ohm ,unpop PR101change 1.5V enable RC ,for HW request

Add PC71 4.7u 0805 25V

change PL5 to 10uF

Add PC77 1u 6.3v X5R1.8V enable cap

change PC96 PC106 PC107 from X6S to X5RBuyer suggest

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING I S THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING I S THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING I S THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTO DY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTO DY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTO DY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

http://laptop-motherboard-schematic.blogspot.com/

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/10/09 2010/10/09

2009/10/09 2010/10/09

2009/10/09 2010/10/09

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

PIR-PWR-1

PIR-PWR-1

PIR-PWR-1

NAVD0 LA-6091P

NAVD0 LA-6091P

NAVD0 LA-6091P

44 46Wednesday, March 03, 2010

44 46Wednesday, March 03, 2010

44 46Wednesday, March 03, 2010

1

1.0

1.0

1.0

of

of

of

5

4

3

2

1

9HUVLRQFKDQJHOLVW3,5/LVW 3DJHRIIRU3:5

5HDVRQIRUFKDQJH 5HY 3* 0RGLI\/LVW 'DWH 3KDVH)L[HG,VVXH,WHP

D D









2009.6.30

2009.6.30

2009.7.2

2009.8.4

EVT

EVT

EVT

EVT







C C

















B B







2009.8.12

2009.8.12

2009.8.12

2009.8.12

2009.8.24

2009.8.24

2009.8.24

2009.8.24

2009.8.24

2009.8.24

2009.8.27

2009.9.4

2009.9.10

2009.9.30

EVT

EVT

EVT

EVT

EVT

EVT

EVT

EVT

EVT

EVT

EVT

DVT

DVT

PVT









A A



Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAI NS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAI NS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAI NS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTO DY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTO DY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTO DY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

http://laptop-motherboard-schematic.blogspot.com/

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/10/09 2010/10/09

2009/10/09 2010/10/09

2009/10/09 2010/10/09

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

PIR-PWR-2

PIR-PWR-2

PIR-PWR-2

NAVD0 LA-6091P

NAVD0 LA-6091P

NAVD0 LA-6091P

45 46Wednesday, March 03, 2010

45 46Wednesday, March 03, 2010

45 46Wednesday, March 03, 2010

1

1.0

1.0

1.0

of

of

of

<2009/4/28>
Update new power schematic,
release first version NAV50 schematic

<2009/04/29>
. Add R1182 R1183 L3 on page 9
. Change J3 to R1184 on page 13

<2009/04/30>
. Change JDIM1 to SP07F001720 on page 7
. Del SATA1 Port on page 12
. Change R51 R57 R70 R63 R317 R314 R190 to 0402 Size on page 21

D D

<2009/05/04>
. Add WWAN_CLKREQ# and R107 pull-high to +3VS on page 8
. Add CRT_DET# on page 10
. Add CRT_DET# circuit on page 13
. Add 3 LEDS on page 16
. Add BT/BTN Board CONN. on page 16
. Update TP/B CONN. to SP01000LB00 on page 19

<2009/05/11>
. Add INVT_PWM on Page 5
. Del R323 on page 5
. C74 change to 2.2U_0603 on page 6
. C267 change to 22U on page 6
. C391 change to 0.1U on page 6
. Del C67 C35 C33 C36 on page 6
. Del +LGI_VID and U71.A21 direct connect to +VCCP on page 6
. Follow Intel checklist, add R52 on FSB on page 8
. Add D5 D7 D8 on page 4
. Add R174 on page 9
. Add PCI_RST# on page 11
. Add C1115 C1114 C1116 C1117 C1118 on page 15

C C

<2009/05/12>
. Follow Intel Layout Checklist, Add C141 on VDDSPD on page 7
. Modify SRC CLK PORT LIST on page 8
. Del CLKREQ_LAN# on page 8
. Change PCIE Port list on page 13
. Change USB Port list on page 13
. Add W/L 3G SW on page 16
. Del R103 on page 18

<2009/05/13>
. Change JMINI1 to PCIE Port 3 on page 15

<2009/05/14>
. Page8 Change C174 C175 to 10U_0603

<2009/05/14>
. Update New Power schematic
. Del R376 R377 on page 8
. Del D5 D7 D8 on page 4
. Change JLVDS1 to SP010006810 on page 9
. Add D6 for EMI on page 9
. Change C1106 to C_0603 type on page 9
. Change USB_OC# on page 13
. Add USB Port2 on page 20

B B

. Change JP11 Pin define & Add D22 on page 19
. Change C512 to 1u_0402 on page 15
. Add U29 (MEDIA_LED#)) on page 16

<2009/05/19>
.Update new clock GEN co-lay schematic on page 8

<2009/06/05>
.Update new clock GEN co-lay schematic on page 8
.Follow Intel check list change C161 C165 to 27P on page 8
.Follow Intel check list change C56 to 22uF on page 6

<2009/06/08>
.Update New Power schematic 06/06 version
Page 13- a.Del R203 (pull-up GPIO6 Resister)
b.Change R1184 NU
Page 17- a. Add VGATE
b. Del R1294
c. Change D30 NU
d. Change R1295 to 0 ohm
e. Add R1309 0 ohm on EC_RSMRST#
f. Pull-up LAN_WAKE# +3VALW
g. ICH_POK change to PCH_POK

A A

h. Pull-up KB_RST# to +3VS
Page 10- a. Add R1283 R1284 ,Change R247 R249 to 10 ohm
b. Add @ on U10 U11 C301 C298
c. Del C302 C300 R1281 R1287

5

5

4

<2009/06/10>
. Page 7- Add C116 @
. Page 22- Modify USB_OC#1_2 to USB_OC#2
. Page 17- Modify PLTRST# to PCI_RST#
. Page 17- Add @ on R1311

<2009/06/12>
. Page4 Add C314 C313 C1150 D19 on +VCC_FAN1
. Page8 Add C1145 C1146 C1147
. Page10 Move CRT_DET# from Page13 to Page10
. Page13 Add +RTCVCC circuit

<2009/06/15>
. Update New Power schematic (change PBJ1 to PJP3)
. Page 10 modify C310 C308 C303 C307 C306 C304 Bom Structure
. Page 22 Modify Hole location by (ME drawing 06/12)

<2009/06/16>
. Page7 Modify DDR Command Control Pin pull-high Resister location
. Page9 Change R577 to 0402 type

<2009/06/17>
. Update New Power schematic 06/17
. Page9 modify LVDS Conn. Pin define
. Page9 Del C1110
. Page4 Add EMI solution D38 D39 D40

<2009/06/18>
. Update New Power schematic 06/18
. Page8 modify U4 Pin define and Q31
. Page13 Add R1376, R1377
. Page15 Modify C403
. Page23 Modify H11

<2009/06/19>
. Page4 Add new signal CPU_ITP , CPU_ITP#
. Page5 ADD R1378
. Page6 ADD C1152,C1153,C1154 C1160,C1161,C1162
. Page7 DDR_A_D8
. Page8 ADD R1379,R1380,U77,R1381,C1157,R1382,R1383,R1384,C1157
, Page8 DEL C390
. Page9 ADD C1156
. Page11 DEL R1322, R1154
. Page13 DEL U77, ADD C1158
. Page17 ADD C1159

<2009/06/22>
. Page22 change IO Conn. pin34 from 48M to USB_ON#
. Page10 change JCRT1 P/N to SP010906182

<2009/06/23>
. Page15 Add C1163 C1164 C1165 C1166
. Page18 change PWR/B Conn. P/N to SP01000H300
. Page22 change JUSB1 JUSB2 P/N

<2009/06/24>
. Page8 Change C1350 C1351 to 0402 type
. Page10 Add R1385 R1386 on JVGA_HS JVGA_VS

<2009/06/25>
. Page22 move some parts to I/O Board , Add the MONO_IN_R on M/B
.
<2009/06/29>
. Page16 Change JP24 to ACES_88266_05001
. Page15 Change JMINI1 to FOX_AS0B246-S50U-7F_52P-T

<2009/06/30>
. Page18 Change PWR_LED# to PWR_PWM_LED#
. Page17 Add PWR LED DETECT PIN on Pin97

<2009/07/02>
. Update New Power schematic 07/02
. Page9 Add C1167 C1168 for RF request.
. Page13 Change R223 to 100K
. Page16 change JP24 to ACES_85201-0505N
. Page17 Del R1387 R1388 on EC Pin97
. Page17 Add New Board ID to separate NAV50 NAV60
. Page17 Change
. Page18 Add D41 for ESD

http://laptop-motherboard-schematic.blogspot.com/

4

ፖ

DDR_A_D9

յང

୶᙮

IC to SA00003J400 (New)

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PR IOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

<2009/07/03>
. Page18 Add D41.2 to PWR_PWM_LED#
. Page8 Change co-lay net name to +1.5VM_CK505
. Page20 Change JP2 Pin42 to +5VS

<2009/07/06>
. Page18 Add pwr switch for NAV50

<2009/07/08>
. Page5 Add 470pf on H_SMI# for known issue.

<DVT START>

<2009/08/04>
. Page5 CLK_CPU_HPLCLK CLK_CPU_HPLCLK# exchange
. Page9 Change JLVDS1 to P/N ACES 88341-3001 30P
. Page17 del PM_1.8V(U6.82) ,Del R1310 R1311
. Page18 Del D41

<2009/09/03>
. Page7 Change C112 to 0402 type
. Page8 Add T6 on CLK_48M_CR
. Page16 Modify JP18 Pin define change +5VALW +5VS to +3VALW +3VS
. Page20 Change Pin 18, 23 to +1.5VS change Pin7 , 9 to USB20_P7 N7
. Page21 Del H12

<2009/09/08>
Update Power schematic 0904
. Page18 Change R1388 to 100 ohm 0402
. Page18 Change LED1 to SC591NB5A00

<2009/09/10>
Update Power schematic 0910
. Page22 unmount Q6 Q8

Compal Secret Data

Compal Secret Data

2009/10/09 2010/10/09

2009/10/09 2010/10/09

2009/10/09 2010/10/09

3

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

2

1

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

PIR -HW

PIR -HW

PIR -HW

NAVD0 LA-6091P

NAVD0 LA-6091P

NAVD0 LA-6091P

46 46Wednesday, March 03, 2010

46 46Wednesday, March 03, 2010

46 46Wednesday, March 03, 2010

1

of

of

of

1.0

1.0

1.0