5
D D
4
3
2
1
LAW_BA
Schematics Document
C C
B B
Wistron Corporation
Wistron Corporation
A A
Title
Title
Title
Cover Page
Cover Page
Cover Page
LAW_BA
LAW_BA
LAW_BA
5
4
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A4
A4
A4
Monday, March 16, 2015
Monday, March 16, 2015
Monday, March 16, 2015
Date: Sheet of
Date: Sheet of
3
Date: Sheet of
2
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
-1
-1
11 0 2
11 0 2
11 0 2
1
-1
5
D D
LCD 13"
13.3” LCD (1366x768)
C C
Touch Panel
HDMI 1.4a
eMMC
HDD
SATA2.0 (3Gb/s, 300MB /s)
DMIC
B B
2CH
SPEAKER 2W
External MIC
Headphone
HD Audio Codec
ALC255
4
3
LAW_BA Board Block Diagram
Project code : 4PD05T010001
PCB P/N : 14295
Revision : -1
52
52
54
57
56
27
eDP
I2C x1
USB2.0x1
HDMI
eMMC
SATA PORT0
HD Audio
XTAL
19.2MHZ
16
Intel CPU
Braswell
FCBGA15
Package
25*27
USB 3.0 (4)/2.0 (5)/HSIC ports (2)
ETHERNET (10/100/1000Mb)
High Definition Audio
LPC I/F
5,7,8,9,10,
11,12,15,16,18,19,21
DDR3L/ 1.35V
DDR3L 1333MHz Channel A
I2C
PCIe x 1
XTAL
25MHZ
PCIe x 1
USB2.0 x 1
USB2.0 x 1
USB2.0 x 1
USB2.0 x 1
USB3.0 x 1
XTAL
32.768KHz
19
DDR3L-1333
8G Slot 1
G Sensor
BMA250E
LAN/Cardreader
Realtek
RTL8411B
2
12
70
Card Reader
33
RJ45
Mini-Card
WLAN & BT
comb module
Camera
USB2.0
USB 3.0/2.0
31
58
52
34
34
PCB LAYER
L1:Top
L2:VCC
L3:Signal
30
CHARGER
HPA02224
INPUTS
DCBATOUT
SYSTEM DC/DC
RT6575D
INPUTS
DCBATOUT
CPU DC/DC
NCP81201MNTXG
INPUTS
DCBATOUT
CPU DC/DC
NCP81201MNTXG
INPUTS
DCBATOUT
SYSTEM DC/DC
TPS51716
INPUTS
DCBATOUT
SYSTEM DC/DC
TPS51716
INPUTS
DCBATOUT
SYSTEM LDO
S-1339D15
INPUTS
3D3V_S5
SYSTEM LDO
RT9043GB
INPUTS
1D8V_S5
SYSTEM DC/DC
RT8068AZQWID
INPUTS
3D3V_S5
L4:Signal
L5:GND
L6:Bottom
1
44
OUTPUTS
BT+
45
OUTPUTS
5V_S5
3D3V_S5
46-47
OUTPUTS
1V_CPU_CORE
48
OUTPUTS
GFX_CORE
50
OUTPUTS
1D05V_S5
49
OUTPUTS
1D35V_CPU_VDDQ_S3
51
OUTPUTS
1D5V_S0
51
OUTPUTS
1D24V_S5
51
OUTPUTS
1D8V_S5
SPI
25
ROM SW
only control CS/CLK
Thermal
VD_I N1 / 2
25
26
VID
SPI Flash
W25Q64FWSSIG
8MB
A A
KBC
NPCE985PB
PS2
Touch PAD
Int.
KB
LPC BUS
SMBus
SMBus
24
62 62
5
4
3
LPC debug port
Charger
HPA02224
HALL SENSOR
65
44
68
2
Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other
purpose application without get Wistron
permission
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei H sien 22 1, Taiwan , R.O. C.
Taipei H sien 22 1, Taiwan , R.O. C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Monday, March 16, 2015
Monday, March 16, 2015
Monday, March 16, 2015
Date: Sheet of
Date: Sheet of
Date: Sheet of
Taipei H sien 22 1, Taiwan , R.O. C.
Block Diagram
Block Diagram
Block Diagram
LAW_BA
LAW_BA
LAW_BA
1
21 0 2
21 0 2
21 0 2
-1
-1
-1
5
D D
C C
4
3
2
1
Blanking
B B
Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
Wistron Corporation
Wistron Corporation
A A
Title
Title
Title
(Reserved)
(Reserved)
(Reserved)
LAW_BA
LAW_BA
LAW_BA
5
4
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A4
A4
A4
Monday, March 16, 2015
Monday, March 16, 2015
Monday, March 16, 2015
Date: Sheet of
Date: Sheet of
3
Date: Sheet of
2
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
-1
-1
31 0 2
31 0 2
31 0 2
1
-1
5
D D
C C
4
3
2
1
Blanking
B B
Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
Wistron Corporation
Wistron Corporation
A A
Title
Title
Title
(Reserved)
(Reserved)
(Reserved)
LAW_BA
LAW_BA
LAW_BA
5
4
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A4
A4
A4
Monday, March 16, 2015
Monday, March 16, 2015
Monday, March 16, 2015
Date: Sheet of
Date: Sheet of
3
Date: Sheet of
2
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
-1
-1
41 0 2
41 0 2
41 0 2
1
-1
5
4
3
2
1
SSID = CPU
D D
1 OF 13
CPU1A
CPU1A
BD49
DDR3_M0_MA_15
BD47
DDR3_M0_MA_14
BF44
DDR3_M0_MA_13
BF48
DDR3_M0_MA_12
BB49
DDR3_M0_MA_11
BJ45
DDR3_M0_MA_10
BE52
DDR3_M0_MA_9
BD44
DDR3_M0_MA_8
BE46
DDR3_M0_MA_7
BB46
DDR3_M0_MA_6
BH48
DDR3_M0_MA_5
BD42
DDR3_M0_MA_4
BH47
DDR3_M0_MA_3
BJ48
DDR3_M0_MA_2
BC42
DDR3_M0_MA_1
BB47
DDR3_M0_MA_0
BF52
DDR3_M0_BS_2
AY40
DDR3_M0_BS_1
BH46
DDR3_M0_BS_0
BG45
DDR3_M0_CAS#
BA40
DDR3_M0_RAS#
BH44
DDR3_M0_WE#
AU38
DDR3_M0_CS1#
AY38
DDR3_M0_CS0#
BD38
DDR3_M0_CK_1
BF38
DDR3_M0_CK_1#
AY42
DDR3_M0_CKE_1
BD40
DDR3_M0_CK_0
BF40
DDR3_M0_CK_0#
BB44
DDR3_M0_CKE_0
AT30
RSVD#AT30
AU30
RSVD#AU30
AV36
DDR3_M0_ODT_0
BA38
DDR3_M0_ODT_1
AT28
DDR3_M0_OCAVREF
AU28
DDR3_M0_ODQVREF
BA42
DDR3_M0_DRAMRST#
AV28
DDR3_DRAM_PWROK
BA28
DDR3_M0_RCOMPPD
BH30
DDR3_M0_DM_7
BD32
DDR3_M0_DM_6
AY36
DDR3_M0_DM_5
BG41
DDR3_M0_DM_4
BA53
DDR3_M0_DM_3
AP44
DDR3_M0_DM_2
AT48
DDR3_M0_DM_1
AP52
DDR3_M0_DM_0
BH32
DDR3_M0_DQS_7
BG31
DDR3_M0_DQSB_7
BC30
DDR3_M0_DQS_6
BC32
DDR3_M0_DQSB_6
AT32
DDR3_M0_DQS_5
AT34
DDR3_M0_DQSB_5
BH40
DDR3_M0_DQS_4
BG39
DDR3_M0_DQSB_4
AY52
DDR3_M0_DQS_3
BA51
DDR3_M0_DQSB_3
AT42
DDR3_M0_DQS_2
AT41
DDR3_M0_DQSB_2
AV47
DDR3_M0_DQS_1
AV48
DDR3_M0_DQSB_1
AM52
DDR3_M0_DQS_0
AM51
DDR3_M0_DQSB_0
BRASWELL-GP
BRASWELL-GP
071.BRASW.000U
071.BRASW.000U
PLACE TWO 4.7K RESISTORS CLOSE TO CPU TO
CPU PINS ON M_VREF ROUTE THE VREF POWER
SIGNALS WITH THICK TRACES
V_SM_VREF_CNT
M_VREF_DQ_DIM0
SM_RCOMP_0
M_A_A15
M_A_A14
M_A_A13
M_A_A12
M_A_A11
M_A_A10
M_A_A9
M_A_A8
M_A_A7
M_A_A6
M_A_A5
M_A_A4
M_A_A3
M_A_A2
M_A_A1
M_A_A0
M_A_A[15:0] 12
M_A_BS2 12
M_A_BS1 12
M_A_BS0 12
M_A_CAS# 12
M_A_RAS# 12
M_A_WE# 12
M_A_CS#1 12
M_A_CS#0 12
C C
SM_RCOMP_0
1 2
R504
R504
182R2F-GP
182R2F-GP
Layout Note: Close CPU
B B
1D35V_CPU_VDDQ_S3
RN501
RN501
1
2
3
4 5
SRN4K7J-1 0 - G P
SRN4K7J-10-GP
DY
DY
DRAM_OCAVREF_R
A A
PLACE TWO 4.7K RESISTORS CLOSE TO CPU TO
CPU PINS ON M_VREF ROUTE THE VREF POWER
SIGNALS WITH THICK TRACES
DRAM_OCAVREF_R
8
7
DRAM_ODQVREF_R
6
-1 20150205 Rock
DY
DY
0R2J-L-GP
0R2J-L-GP
SB 20150123 Rock
Reduce component connector (Delete RN502 )
20141223 Rock
R506
R506
1 2
DY
DY
M_A_CLK1 12
M_A_CLK#1 12
M_A_CKE1 12
M_A_CLK0 12
M_A_CLK#0 12
M_A_CKE0 12
M_A_DIM0_ODT0 12
M_A_DIM0_ODT1 12
SM_DRAMRST# 12
DDR3_DRAM_PWROK 36,86
M_A_DM7 12
M_A_DM6 12
M_A_DM5 12
M_A_DM4 12
M_A_DM3 12
M_A_DM2 12
M_A_DM1 12
M_A_DM0 12
M_A_DQS_DP7 12
M_A_DQS_DN7 12
M_A_DQS_DP6 12
M_A_DQS_DN6 12
M_A_DQS_DP5 12
M_A_DQS_DN5 12
M_A_DQS_DP4 12
M_A_DQS_DN4 12
M_A_DQS_DP3 12
M_A_DQS_DN3 12
M_A_DQS_DP2 12
M_A_DQS_DN2 12
M_A_DQS_DP1 12
M_A_DQS_DN1 12
M_A_DQS_DP0 12
M_A_DQS_DN0 12
V_SM_VREF_CNT
NOTE:
1 2
C501
C501
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
PLACE 0.1U CAP CLOSE TO CPU
BRASWELL
BRASWELL
DDR0
DDR0
5
4
1 OF 13
DDR3_M0_DQ_63
DDR3_M0_DQ_62
DDR3_M0_DQ_61
DDR3_M0_DQ_60
DDR3_M0_DQ_59
DDR3_M0_DQ_58
DDR3_M0_DQ_57
DDR3_M0_DQ_56
DDR3_M0_DQ_55
DDR3_M0_DQ_54
DDR3_M0_DQ_53
DDR3_M0_DQ_52
DDR3_M0_DQ_51
DDR3_M0_DQ_50
DDR3_M0_DQ_49
DDR3_M0_DQ_48
DDR3_M0_DQ_47
DDR3_M0_DQ_46
DDR3_M0_DQ_45
DDR3_M0_DQ_44
DDR3_M0_DQ_43
DDR3_M0_DQ_42
DDR3_M0_DQ_41
DDR3_M0_DQ_40
DDR3_M0_DQ_39
DDR3_M0_DQ_38
DDR3_M0_DQ_37
DDR3_M0_DQ_36
DDR3_M0_DQ_35
DDR3_M0_DQ_34
DDR3_M0_DQ_33
DDR3_M0_DQ_32
DDR3_M0_DQ_31
DDR3_M0_DQ_30
DDR3_M0_DQ_29
DDR3_M0_DQ_28
DDR3_M0_DQ_27
DDR3_M0_DQ_26
DDR3_M0_DQ_25
DDR3_M0_DQ_24
DDR3_M0_DQ_23
DDR3_M0_DQ_22
DDR3_M0_DQ_21
DDR3_M0_DQ_20
DDR3_M0_DQ_19
DDR3_M0_DQ_18
DDR3_M0_DQ_17
DDR3_M0_DQ_16
DDR3_M0_DQ_15
DDR3_M0_DQ_14
DDR3_M0_DQ_13
DDR3_M0_DQ_12
DDR3_M0_DQ_11
DDR3_M0_DQ_10
DDR3_M0_DQ_9
DDR3_M0_DQ_8
DDR3_M0_DQ_7
DDR3_M0_DQ_6
DDR3_M0_DQ_5
DDR3_M0_DQ_4
DDR3_M0_DQ_3
DDR3_M0_DQ_2
DDR3_M0_DQ_1
DDR3_M0_DQ_0
BG33
BH28
BJ29
BG28
BG32
BH34
BG29
BJ33
BD28
BF30
BA34
BD34
BD30
BA32
BC34
BF34
AV32
AV34
BD36
BF36
AU32
AU34
BA36
BC36
BH38
BH36
BJ41
BH42
BJ37
BG37
BG43
BG42
BB51
AW53
BC52
AW51
AV51
BC53
AV52
BD52
AV42
AP41
AV41
AT44
AP40
AT38
AP42
AT40
AV45
AY50
AT50
AP47
AV50
AY48
AT47
AP48
AP51
AR53
AK52
AL53
AR51
AT52
AL51
AK51
DY
DY
M_A_DQ63
M_A_DQ62
M_A_DQ61
M_A_DQ60
M_A_DQ59
M_A_DQ58
M_A_DQ57
M_A_DQ56
M_A_DQ55
M_A_DQ54
M_A_DQ53
M_A_DQ52
M_A_DQ51
M_A_DQ50
M_A_DQ49
M_A_DQ48
M_A_DQ47
M_A_DQ46
M_A_DQ45
M_A_DQ44
M_A_DQ43
M_A_DQ42
M_A_DQ41
M_A_DQ40
M_A_DQ39
M_A_DQ38
M_A_DQ37
M_A_DQ36
M_A_DQ35
M_A_DQ34
M_A_DQ33
M_A_DQ32
M_A_DQ31
M_A_DQ30
M_A_DQ29
M_A_DQ28
M_A_DQ27
M_A_DQ26
M_A_DQ25
M_A_DQ24
M_A_DQ23
M_A_DQ22
M_A_DQ21
M_A_DQ20
M_A_DQ19
M_A_DQ18
M_A_DQ17
M_A_DQ16
M_A_DQ15
M_A_DQ14
M_A_DQ13
M_A_DQ12
M_A_DQ11
M_A_DQ10
M_A_DQ9
M_A_DQ8
M_A_DQ7
M_A_DQ6
M_A_DQ5
M_A_DQ4
M_A_DQ3
M_A_DQ2
M_A_DQ1
M_A_DQ0
SB 20150123 Rock
R507
R507
1 2
0R2J-L-GP
0R2J-L-GP
CPU1B
M_A_DQ[63:0] 12
DDR3_VCCA_PWRGD 36
M_VREF_DQ_DIM0 DRAM_ODQVREF_R
NOTE:
1 2
C502
C502
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
DY
DY
PLACE 0.1U CAP CLOSE TO CPU
SM_DRAMRST#
DDR3_DRAM_PWROK
DDR3_VCCA_PWRGD
3
1 2
DRAM_RCOMP_1
R508
R508
182R2F-GP
182R2F-GP
SCD1U25V2KX change to SCD1U16V2KX -1 20150204 Rock
EC502
EC502
1 2
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
DY
DY
EC503
EC503
1 2
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
DY
DY
EC504
EC504
1 2
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
DY
DY
2
CPU1B
BD5
DDR3_M1_MA_15
BD7
DDR3_M1_MA_14
BF10
DDR3_M1_MA_13
BF6
DDR3_M1_MA_12
BB5
DDR3_M1_MA_11
BJ9
DDR3_M1_MA_10
BE2
DDR3_M1_MA_9
BD10
DDR3_M1_MA_8
BE8
DDR3_M1_MA_7
BB8
DDR3_M1_MA_6
BH6
DDR3_M1_MA_5
BD12
DDR3_M1_MA_4
BH7
DDR3_M1_MA_3
BJ6
DDR3_M1_MA_2
BC12
DDR3_M1_MA_1
BB7
DDR3_M1_MA_0
BF2
DDR3_M1_BS_2
AY14
DDR3_M1_BS_1
BH8
DDR3_M1_BS_0
BG9
DDR3_M1_CAS#
BA14
DDR3_M1_RAS#
BH10
DDR3_M1_WE#
AU16
DDR3_M1_CS1#
AY16
DDR3_M1_CS0#
BD16
DDR3_M1_CK_1
BF16
DDR3_M1_CK_1#
AY12
DDR3_M1_CKE_1
BD14
DDR3_M1_CK_0
BF14
DDR3_M1_CK_0#
BB10
DDR3_M1_CKE_0
AT24
RSVD#AT24
AU24
RSVD#AU24
AV18
DDR3_M1_ODT_0
BA16
DDR3_M1_ODT_1
AT26
DDR3_M1_OCAVREF
AU26
DDR3_M1_ODQVREF
BA12
DDR3_M1_DRAMRST#
AV26
DDR3_VCCA_PW ROK
BA26
DDR3_M1_RCOMPPD
BH24
DDR3_M1_DM_7
BD22
DDR3_M1_DM_6
AY18
DDR3_M1_DM_5
BG13
DDR3_M1_DM_4
BA1
DDR3_M1_DM_3
AP10
DDR3_M1_DM_2
AT6
DDR3_M1_DM_1
AP2
DDR3_M1_DM_0
BH22
DDR3_M1_DQS_7
BG23
DDR3_M1_DQSB_7
BC24
DDR3_M1_DQS_6
BC22
DDR3_M1_DQSB_6
AT22
DDR3_M1_DQS_5
AT20
DDR3_M1_DQSB_5
BH14
DDR3_M1_DQS_4
BG15
DDR3_M1_DQSB_4
AY2
DDR3_M1_DQS_3
BA3
DDR3_M1_DQSB_3
AT12
DDR3_M1_DQS_2
AT13
DDR3_M1_DQSB_2
AV7
DDR3_M1_DQS_1
AV6
DDR3_M1_DQSB_1
AM2
DDR3_M1_DQS_0
AM3
DDR3_M1_DQSB_0
BRASWELL-GP
BRASWELL-GP
DDR1
DDR1
BRASWELL
BRASWELL
2 OF 13
2 OF 13
DDR3_M1_DQ_63
DDR3_M1_DQ_62
DDR3_M1_DQ_61
DDR3_M1_DQ_60
DDR3_M1_DQ_59
DDR3_M1_DQ_58
DDR3_M1_DQ_57
DDR3_M1_DQ_56
DDR3_M1_DQ_55
DDR3_M1_DQ_54
DDR3_M1_DQ_53
DDR3_M1_DQ_52
DDR3_M1_DQ_51
DDR3_M1_DQ_50
DDR3_M1_DQ_49
DDR3_M1_DQ_48
DDR3_M1_DQ_47
DDR3_M1_DQ_46
DDR3_M1_DQ_45
DDR3_M1_DQ_44
DDR3_M1_DQ_43
DDR3_M1_DQ_42
DDR3_M1_DQ_41
DDR3_M1_DQ_40
DDR3_M1_DQ_39
DDR3_M1_DQ_38
DDR3_M1_DQ_37
DDR3_M1_DQ_36
DDR3_M1_DQ_35
DDR3_M1_DQ_34
DDR3_M1_DQ_33
DDR3_M1_DQ_32
DDR3_M1_DQ_31
DDR3_M1_DQ_30
DDR3_M1_DQ_29
DDR3_M1_DQ_28
DDR3_M1_DQ_27
DDR3_M1_DQ_26
DDR3_M1_DQ_25
DDR3_M1_DQ_24
DDR3_M1_DQ_23
DDR3_M1_DQ_22
DDR3_M1_DQ_21
DDR3_M1_DQ_20
DDR3_M1_DQ_19
DDR3_M1_DQ_18
DDR3_M1_DQ_17
DDR3_M1_DQ_16
DDR3_M1_DQ_15
DDR3_M1_DQ_14
DDR3_M1_DQ_13
DDR3_M1_DQ_12
DDR3_M1_DQ_11
DDR3_M1_DQ_10
DDR3_M1_DQ_9
DDR3_M1_DQ_8
DDR3_M1_DQ_7
DDR3_M1_DQ_6
DDR3_M1_DQ_5
DDR3_M1_DQ_4
DDR3_M1_DQ_3
DDR3_M1_DQ_2
DDR3_M1_DQ_1
DDR3_M1_DQ_0
Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Monday, March 16, 2015
Monday, March 16, 2015
Monday, March 16, 2015
Date: Sheet of
Date: Sheet of
Date: Sheet of
BG21
BH26
BJ25
BG26
BG22
BH20
BG25
BJ21
BD26
BF24
BA20
BD20
BD24
BA22
BC20
BF20
AV22
AV20
BD18
BF18
AU22
AU20
BA18
BC18
BH16
BH18
BJ13
BH12
BJ17
BG17
BG11
BG12
BB3
AW1
BC2
AW3
AV3
BC1
AV2
BD2
AV12
AP13
AV13
AT10
AP14
AT16
AP12
AT14
AV9
AY4
AT4
AP7
AV4
AY6
AT7
AP6
AP3
AR1
AK2
AL1
AR3
AT2
AL3
AK3
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
CPU (DDR)
CPU (DDR)
CPU (DDR)
LAW_BA
LAW_BA
LAW_BA
1
51 0 2
51 0 2
51 0 2
-1
-1
-1
5
4
3
2
1
SSID = CPU
D D
C C
Blanking
B B
Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A A
Title
Title
Title
CPU (CFG)
CPU (CFG)
CPU (CFG)
LAW_BA
LAW_BA
LAW_BA
5
4
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A4
A4
A4
Monday, March 16, 2015
Monday, March 16, 2015
Monday, March 16, 2015
Date: Sheet of
Date: Sheet of
3
Date: Sheet of
2
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
61 0 2
61 0 2
61 0 2
1
-1
-1
-1
5
SSID = CPU
4
3
2
1
1D05V_S5
1D05V_S5
1D05V_S5
1D05V_S5
1D05V_S5
CPU1H
D D
C C
1D15V_S5
B B
Imax=0.7A (1D15V_S5)
1D15V_S5
1D15V_S5
Imax=6.4A (merged VCC0+VCC1)
1V_CPU_CORE
1V_CPU_CORE
GFX_CORE
Imax=11A
CPU1H
AF36
CORE_VCC1_S0IX3
AG33
CORE_VCC1_S0IX7
AG35
CORE_VCC1_S0IX8
AG36
CORE_VCC1_S0IX9
AG38
CORE_VCC1_S0IX10
AJ33
CORE_VCC1_S0IX14
AJ36
CORE_VCC1_S0IX15
AJ38
CORE_VCC1_S0IX16
AF30
CORE_VCC1_S0IX2
AG27
CORE_VCC1_S0IX4
AG29
CORE_VCC1_S0IX5
AG30
CORE_VCC1_S0IX6
AJ27
CORE_VCC1_S0IX11
AJ29
CORE_VCC1_S0IX12
AJ30
CORE_VCC1_S0IX13
AF29
CORE_VCC1_S0IX1
AD16
DDI_VGG_S0IX1
AD18
DDI_VGG_S0IX2
AD19
DDI_VGG_S0IX3
AF16
DDI_VGG_S0IX4
AF18
DDI_VGG_S0IX5
AF19
DDI_VGG_S0IX6
AF21
DDI_VGG_S0IX7
AF22
DDI_VGG_S0IX8
AJ19
DDI_VGG_S0IX15
AG16
DDI_VGG_S0IX9
AG18
DDI_VGG_S0IX10
AG19
DDI_VGG_S0IX11
AG21
DDI_VGG_S0IX12
AG22
DDI_VGG_S0IX13
AG24
DDI_VGG_S0IX14
AJ21
DDI_VGG_S0IX16
AJ22
DDI_VGG_S0IX17
AJ24
DDI_VGG_S0IX18
AK24
DDI_VGG_S0IX19
AK30
CORE_V1P15_S0IX1
AK35
CORE_V1P15_S0IX2
AK36
CORE_V1P15_S0IX3
AM29
CORE_V1P15_S0IX4
AK33
FUSE_V1P15_S0IX2
AJ35
FUSE_V1P15_S0IX1
AM19
DDI_V1P15_S0IX2
AK21
DDI_V1P15_S0IX1
BRASWELL-GP
BRASWELL-GP
BRASWELL
BRASWELL
UNCORE_VNN_S41
UNCORE_VNN_S42
UNCORE_VNN_S43
UNCORE_VNN_S44
UNCORE_VNN_S45
UNCORE_VNN_S46
UNCORE_VNN_S47
UNCORE_VNN_S48
UNCORE_VNN_S49
UNCORE_VNN_S410
UNCORE_VNN_S411
UNCORE_VNN_S412
UNCORE_VNN_S413
UNCORE_VNN_S414
UNCORE_V1P15_S0IX6
UNCORE_V1P15_S0IX1
UNCORE_V1P15_S0IX2
UNCORE_V1P15_S0IX3
UNCORE_V1P15_S0IX4
UNCORE_V1P15_S0IX5
UNCORE_V1P15_S0IX7
UNCORE_V1P15_S0IX8
UNCORE_V1P15_S0IX9
UNCORE_V1P15_S0IX10
iCLK DDR PCIe SATA
iCLK DDR PCIe SATA
DDR_V1P05A_G31
DDR_V1P05A_G34
DDR_V1P05A_G32
DDR_V1P05A_G35
DDR_V1P05A_G36
DDR_V1P05A_G33
PCIE_V1P05A_G31#V22
PCIE_V1P05A_G32
SATA_V1P05A_G32
SATA_V1P05A_G31
USB3_V1P05A_G32
USB3_V1P05A_G31
USBSSIC_V1P05A_G3
USB
USB
FUSE3_V1P05A_G5
FUSE_V1P05A_G3
FUSE
FUSE
8 OF 13
8 OF 13
RSVD#AA30
ICLK_GND_OFF2
ICLK_GND_OFF1
AA18
AA19
AA21
AA22
AA24
AA25
AC18
AC19
AC21
AC22
AC24
AC25
AD25
AD27
AA30
V33
AA32
AA33
AA35
AA36
AC32
Y30
Y32
Y33
Y35
V19
V18
AM21
AM33
AM22
AN22
AN32
AM32
V22
V24
U24
U22
V27
U27
V29
N18
U19
RSVD#AA30
Imax=1.9A (1D05V_S5)
TP701 TPAD14-OP-GP TP701 TPAD14-OP-GP
1
1D05V_S5
1D05V_S5
1D05V_S5
Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A A
Title
Title
Title
CPU (VCC_CORE)
CPU (VCC_CORE)
CPU (VCC_CORE)
LAW_BA
LAW_BA
LAW_BA
5
4
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A4
A4
A4
Monday, March 16, 2015
Monday, March 16, 2015
Monday, March 16, 2015
Date: Sheet of
Date: Sheet of
3
Date: Sheet of
2
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
71 0 2
71 0 2
71 0 2
1
-1
-1
-1
5
4
3
2
1
SSID = CPU
HDMI_DATA_CPU_P2 54
D D
HDMI_CLK_CPU 54,86
HDMI_DATA_CPU 54
1D8V_S5
DY
DY
R803 100KR2J-4-GP
R803 100KR2J-4-GP
C C
1 2
R804 100KR2J-4-GP
R804 100KR2J-4-GP
1 2
DY
DY
eDP_BLE N_CPU
eDP_BLC TRL_CPU
HDMI
RN803
RN803
SRN2K2J-5-GP
SRN2K2J-5-GP
CRB 2.2k
1D8V_S5
4
1
2 3
EDP
1 2
B B
HDMI_DATA_CPU_N2 54
HDMI_DATA_CPU_P1 54
HDMI_DATA_CPU_N1 54
HDMI_DATA_CPU_P0 54
HDMI_DATA_CPU_N0 54
HDMI_DATA_CPU_P3 54
HDMI_DATA_CPU_N3 54
HDMI_DET_CPU 54
R802
R802
402R2F-GP
402R2F-GP
1 2
eDP_TX_ CPU_P0 52,86
eDP_TX_ CPU_N0 52,86
eDP_TX_ CPU_P1 52,86
eDP_TX_ CPU_N1 52,86
eDP_AUX _CPU_P 52,86
eDP_AUX _CPU_N 52,86
eDP_HPD _CPU_N 52
eDP_BLE N_CPU 24
eDP_BLC TRL_CPU 52
eDP_VDD EN_CPU 52 MMC1_CMD_CPU 57
1 2
R801
R801
402R2F-GP
402R2F-GP
R813
R813
1MR2J-L3-GP
1MR2J-L3-GP
eDP_BLE N_CPU
TP803 TPAD14-OP-GP TP803 TPAD14-OP-GP
TP801 TPAD14-OP-GP TP801 TPAD14-OP-GP
TP802 TPAD14-OP-GP TP802 TPAD14-OP-GP
1
1
1
DDI0_PLLOBS_P
DDI0_PLLOBS_N
eDP_BLE N_CPU
eDP_VDD EN_CPU
DDI1_PLLOBS_P
DDI1_PLLOBS_N
HV_DDI2_HPD
UART1_TX
UART1_RX
CPU1C
CPU1C
D50
DDI0_TXP_0
C51
DDI0_TXN_0
H49
DDI0_TXP_1
H50
DDI0_TXN_1
F53
DDI0_TXP_2
F52
DDI0_TXN_2
G53
DDI0_TXP_3
G52
DDI0_TXN_3
H47
DDI0_AUXP
H46
DDI0_AUXN
W51
HV_DDI0_HPD
Y51
HV_DDI0_DDC_SCL
Y52
HV_DDI0_DDC_SDA
V52
PANEL0_BKLTEN
V51
PANEL0_BKLTCTL
W53
PANEL0_VDDEN
F38
DDI0_PLLOBS_P
G38
DDI0_PLLOBS_N
J51
DDI1_TXP_0
H51
DDI1_TXN_0
K51
DDI1_TXP_1
K52
DDI1_TXN_1
L53
DDI1_TXP_2
L51
DDI1_TXN_2
M52
DDI1_TXP_3
M51
DDI1_TXN_3
M42
DDI1_AUXP
K42
DDI1_AUXN
R51
HV_DDI1_HPD
P51
PANEL1_BKLTEN
P52
PANEL1_BKLTCTL
R53
PANEL1_VDDEN
F47
DDI1_PLLOBS_P
F49
DDI1_PLLOBS_N
F40
DDI2_TXP_0
G40
DDI2_TXN_0
J40
DDI2_TXP_1
K40
DDI2_TXN_1
F42
DDI2_TXP_2
G42
DDI2_TXN_2
D44
DDI2_TXP_3
F44
DDI2_TXN_3
D48
DDI2_AUXP
C49
DDI2_AUXN
U51
HV_DDI2_HPD
T51
HV_DDI2_DDC_SCL
T52
HV_DDI2_DDC_SDA
B53
RSVD#B53
A52
RSVD#A52
E52
RSVD#E52
D52
RSVD#D52
B50
RSVD#B50
B49
RSVD#B49
E53
RSVD#E53
C53
RSVD#C53
A51
RSVD#A51
A49
RSVD#A49
G44
RSVD#G44
BRASWELL
BRASWELL
1.0V
DDI0
DDI0
1.8V
1.0V
DDI1
DDI1
1.8V
DDI2
DDI2
DDI2 do not support eDP
1.8V
NC's
NC's
1D8V_S5
SDMMC1
SDMMC1
1D8V_S5
SDMMC2
SDMMC2
3.3V
1.8V
3.3V
SDMMC3
SDMMC3
1.8V
3 OF 13
3 OF 13
RSVD#M44
RSVD#K44
RSVD#K48
RSVD#K47
MCSI_1_CLKP
MCSI_1_CLKN
MCSI_1_DP_0
MCSI_1_DN_0
MCSI_1_DP_1
MCSI_1_DN_1
MCSI_1_DP_2
MCSI_1_DN_2
MCSI_1_DP_3
MCSI_1_DN_3
MCSI and Camera interface
MCSI and Camera interface
MCSI_2_CLKP
MCSI_2_CLKN
MCSI_2_DP_0
MCSI_2_DN_0
MCSI_2_DP_1
MCSI_2_DN_1
RSVD#T50
RSVD#T48
MCSI_COMP
GP_CAMERASB00
GP_CAMERASB01
GP_CAMERASB02
GP_CAMERASB03
GP_CAMERASB04
GP_CAMERASB05
GP_CAMERASB06
GP_CAMERASB07
GP_CAMERASB08
GP_CAMERASB09
GP_CAMERASB10
GP_CAMERASB11
SDMMC1_CLK
SDMMC1_CMD
SDMMC1_D0
SDMMC1_D1
SDMMC1_D2
SDMMC1_D3_CD#
MMC1_D4_SD_W E
MMC1_D5
MMC1_D6
MMC1_D7
MMC1_RCLK
SDMMC1_RCOMP
SDMMC2_CLK
SDMMC2_CMD
SDMMC2_D0
SDMMC2_D1
SDMMC2_D2
SDMMC2_D3_CD#
SDMMC3_CLK
SDMMC3_CMD
SDMMC3_CD#
SDMMC3_D0
SDMMC3_D1
SDMMC3_D2
SDMMC3_D3
SDMMC3_1P8_EN
SDMMC3_PWR_EN#
SDMMC3_RCOMP
M44
K44
K48
K47
T44
T45
Y47
Y48
V45
V47
V50
V48
T41
T42
P50
P48
P47
P45
M48
M47
T50
T48
P44
AB41
AB45
AB44
AC53
AB51
AB52
AA51
AB40
Y44
Y42
Y41
V40
M7
P6
M6
M4
P9
P7
T6
T7
T10
T12
T13
P13
K10
K9
M12
M10
K7
K6
F2
D2
K3
J1
J3
H3
G2
K2
L3
P12
MCSI_COMP
SDMMC1_RCOMP
PSW_CLR#
SDMMC3_RCOMP
R817
R817
1 2
150R2F-4-L-GP
150R2F-4-L-GP
R814
R814
1 2
100R2F-L3-GP
100R2F-L3-GP
R815
R815
1 2
80D6R2F-L-GP
80D6R2F-L-GP
PSW_CLR#
2 1
G801
G801
GAP-OPEN
GAP-OPEN
GP_CAMERASB08 15
GP_CAMERASB09 15
GP_CAMERASB11 15
RTC_DET# 25
To XDP
MMC1_CLK 57
MMC1_D0_CPU 57
MMC1_D1_CPU 57
MMC1_D2_CPU 57
MMC1_D3_CPU 57
MMC1_D4_CPU 57
MMC1_D5_CPU 57
MMC1_D6_CPU 57
MMC1_D7_CPU 57
PSW_CLR# 16
BRASWELL-GP
BRASWELL-GP
A A
5
4
3
2
Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Monday, March 16, 2015
Monday, March 16, 2015
Monday, March 16, 2015
Date: Sheet of
Date: Sheet of
Date: Sheet of
CPU (DDI/EDP/GPIO)
CPU (DDI/EDP/GPIO)
CPU (DDI/EDP/GPIO)
LAW_BA
LAW_BA
LAW_BA
Taipei Hsien 221, Taiwan, R.O.C.
81 0 2
81 0 2
81 0 2
1
-1
-1
-1
5
4
3
2
1
SSID = CPU
D D
CPU1L
AN33
AF24
N53
N51
N32
N24
N22
M40
M35
M27
AW13
M19
M14
M45
M50
P32
P27
P22
P19
K45
L35
L27
L19
K50
T47
K36
K34
K32
K30
K24
K22
K16
K14
K12
E46
H35
H27
H19
V25
M9
L1
K4
J53
J38
J35
J30
J27
J22
J19
J18
H8
CPU1L
VSS2
VSS99
VSS98
VSS97
VSS96
VSS1
VSS95
VSS94
VSS93
VSS92
VSS91
VSS90
VSS77
VSS87
VSS86
VSS85
VSS3
VSS84
VSS83
VSS82
VSS81
VSS80
VSS79
VSS78
VSS100
VSS76
VSS75
VSS74
VSS73
VSS72
VSS71
VSS70
VSS69
VSS68
VSS67
VSS66
VSS88
VSS64
VSS63
VSS62
VSS61
VSS60
VSS59
VSS58
VSS57
VSS40
VSS56
VSS55
VSS54
VSS89
VSS101
BRASWELL-GP
BRASWELL-GP
CPU1K
AN21
BG30
BG27
BG24
BG20
BG19
BG18
BG16
BG14
BF42
BF32
BF28
BF27
BF26
BF22
BF12
BE35
BE19
C20
BD53
BG7
BD35
BD27
BD19
BD1
BC44
BC40
BC38
BC28
BC26
BC16
BC14
BC10
BB35
BB27
BB19
BA35
BA30
BA27
BA24
BA19
B36
B28
AY7
AY51
AY47
AY34
AY32
AY30
AY3
AN30
AY45
CPU1K
VSS5
VSS101
VSS100
VSS99
VSS98
VSS97
VSS96
VSS95
VSS94
VSS93
VSS92
VSS91
VSS90
VSS89
VSS88
VSS87
VSS86
VSS85
VSS103
VSS84
VSS102
VSS83
VSS82
VSS81
VSS80
VSS79
VSS78
VSS77
VSS76
VSS75
VSS74
VSS73
VSS72
VSS71
VSS70
VSS69
VSS68
VSS67
VSS66
VSS65
VSS64
VSS63
VSS62
VSS60
VSS59
VSS58
VSS56
VSS55
VSS54
VSS53
VSS6
VSS57
BRASWELL-GP
BRASWELL-GP
CPU1J
CPU1J
AN3
VSS98
AN29
VSS97
AN25
VSS96
AN24
VSS95
AN16
VSS94
AN14
VSS93
AN12
VSS92
AN11
VSS91
AN1
VSS90
AM50
VSS89
AM42
VSS88
AM4
VSS87
AM38
VSS86
AM35
VSS85
AH44
VSS60
AM30
VSS84
AM27
VSS83
U25
VSS100
P10
VSS99
AM16
C C
B B
AD4
AK7
AK50
AK47
AK45
AK44
AK40
AK4
AK38
AK32
AK27
AK25
AM24
AK16
AJ53
AJ51
AJ3
AJ25
AJ16
AJ1
AH9
AH47
AH42
AH41
AH14
AH13
AH12
AH10
AG25
AF47
VSS81
VSS31
VSS80
VSS79
VSS78
VSS77
VSS76
VSS75
VSS74
VSS73
VSS72
VSS71
VSS70
VSS82
VSS69
VSS68
VSS67
VSS66
VSS65
VSS64
VSS63
VSS62
VSS61
VSS59
VSS58
VSS57
VSS56
VSS55
VSS54
VSS53
VSS52
BRASWELL-GP
BRASWELL-GP
Power-VSS
Power-VSS
BRASWELL
BRASWELL
10 OF 13
10 OF 13
VSS51
VSS50
VSS49
VSS48
VSS47
VSS46
VSS45
VSS44
VSS43
VSS42
VSS41
VSS40
VSS39
VSS38
VSS37
VSS36
VSS35
VSS34
VSS33
VSS32
VSS30
VSS23
VSS29
VSS28
VSS27
VSS26
VSS25
VSS24
VSS22
VSS21
VSS20
VSS19
VSS18
VSS17
VSS16
VSS15
VSS14
VSS13
VSS12
VSS11
VSS10
VSS9
VSS8
VSS7
VSS6
VSS5
VSS4
VSS3
VSS2
VSS1
AF38
AF32
AF25
AF10
AE9
AE8
AE6
AE53
AE50
AE48
AE46
AE45
AE43
AE42
AE40
AE14
AE12
AE11
AE1
AD44
AD36
AC29
AD32
AD30
AD21
AC38
AC35
AC33
AC16
AB6
AB50
AB47
AB42
AB4
AB14
AB13
AB12
AB10
AA53
AA38
AA27
AA16
A47
A43
A39
A31
A23
A19
A15
A11
Power-VSS
Power-VSS
BRASWELL
BRASWELL
11 OF 13
11 OF 13
VSS61
VSS52
VSS51
VSS50
VSS49
VSS48
VSS47
VSS46
VSS45
VSS4
VSS3
VSS2
VSS44
VSS43
VSS42
VSS41
VSS40
VSS39
VSS38
VSS1
VSS37
VSS36
VSS35
VSS34
VSS33
VSS32
VSS31
VSS30
VSS29
VSS28
VSS27
VSS26
VSS25
VSS24
VSS23
VSS22
VSS21
VSS20
VSS19
VSS18
VSS17
VSS16
VSS15
VSS14
VSS13
VSS12
VSS11
VSS10
VSS9
VSS8
VSS7
AY9
AY28
AY26
AY24
AY22
AY20
AW35
AW27
AW19
AM13
AK29
AK22
AV40
AV35
AV30
AV27
AV24
AV19
AV14
AJ18
AU53
AU51
AU3
AU1
AT9
AT51
AT45
AT36
AT35
AT3
AT27
AT19
AT18
AP9
AP50
AP45
AP4
AN9
AN8
AN6
AN53
AN51
AN5
AN49
AN48
AN46
AN45
AN43
AN42
AN40
AN38
Power-VSS
Power-VSS
BRASWELL
BRASWELL
12 OF 13
12 OF 13
VSS102
VSS53
VSS52
VSS51
VSS50
VSS49
VSS48
VSS47
VSS46
VSS45
VSS44
VSS43
VSS42
VSS41
VSS39
VSS38
VSS37
VSS36
VSS35
VSS34
VSS33
VSS32
VSS31
VSS30
VSS65
VSS29
VSS28
VSS27
VSS26
VSS25
VSS24
VSS23
VSS4
VSS22
VSS21
VSS20
VSS19
VSS18
VSS17
VSS16
VSS15
VSS14
VSS13
VSS12
VSS11
VSS10
VSS9
VSS8
VSS7
VSS6
VSS5
Y24
G30
G28
G26
G22
G14
G12
F5
F35
F32
F27
F24
F19
E51
E35
E19
D42
D40
D38
D32
D27
D24
D16
D10
J42
C47
C39
C36
C30
C3
C28
C22
AW41
BJ7
BJ47
BJ43
BJ39
BJ35
BJ31
BJ27
BJ23
BJ19
BJ15
BJ11
BG5
BG49
BG40
BG38
BG36
BG35
BG34
CPU_VSS16
1
TP901
TP901
TPAD14-OP-GP
TPAD14-OP-GP
B52 MAY NOT BE ABLE TO BREAK OUT IN ROUTING
CPU_VSS2
1
TP902
TP902
TPAD14-OP-GP
TPAD14-OP-GP
BH53
BH52
BH2
BH1
BG53
BG1
B52
M24
BF50
BF4
BB50
BB4
BG47
Y50
Y45
Y40
Y38
Y29
Y22
Y21
Y19
Y16
Y14
Y10
L41
P36
F1
C1
B2
A6
A5
A7
Y9
Y4
P4
CPU1M
CPU1M
VSS18
VSS17
VSS16
VSS15
VSS14
VSS13
VSS12
VSS10
VSS5
VSS4
VSS2
VSS1
VSSA
VSS3
VSS9
VSS8
VSS7
VSS6
VSS11
VSS70
VSS69
VSS68
VSS67
VSS66
VSS65
VSS64
VSS63
VSS62
VSS61
VSS60
VSS59
VSS58
VSS22
VSS19
VSS21
BRASWELL-GP
BRASWELL-GP
Power-VSS
Power-VSS
BRASWELL
BRASWELL
13 OF 13
13 OF 13
VSS57
VSS56
VSS55
VSS54
VSS53
VSS52
VSS51
VSS50
VSS49
VSS48
VSS47
VSS46
VSS45
VSS44
VSS43
VSS42
VSS41
VSS40
VSS39
VSS38
VSS37
VSS35
VSS34
VSS33
VSS32
VSS31
VSS30
VSS36
VSS29
VSS28
VSS27
VSS26
VSS23
VSS25
VSS24
VSS20
W1
V44
V42
V41
V38
V32
V21
V16
U9
U8
U6
U53
U5
U49
U48
U46
U45
U43
U42
U40
U38
U33
U32
U30
U29
U21
U18
U36
U14
U12
U11
T9
P42
T14
R1
P35
Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
<Variant Name>
<Variant Name>
A A
5
4
3
2
<Variant Name>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Monday, March 16, 2015
Monday, March 16, 2015
Monday, March 16, 2015
Date: Sheet of
Date: Sheet of
Date: Sheet of
CPU (VSS)
CPU (VSS)
CPU (VSS)
LAW_BA
LAW_BA
LAW_BA
Taipei Hsien 221, Taiwan, R.O.C.
91 0 2
91 0 2
91 0 2
1
-1
-1
-1
-1
-1
-1
10 102
10 102
10 102
1
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Wistron Corporation
Wistron Corporation
Wistron Corporation
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
N18 V18
C1015
C1015
1 2
1D05V_S5
2
SC10U6D3V3MX-L-GP
SC10U6D3V3MX-L-GP
PC1011
PC1011
1 2
SC10U6D3V3MX-L-GP
SC10U6D3V3MX-L-GP
PC1010
PC1010
1 2
SC10U6D3V3MX-L-GP
SC10U6D3V3MX-L-GP
PC1009
PC1009
1 2
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
C1008
C1008
1 2
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
C1002
C1002
1 2
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
C1001
C1001
3
1 2
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
C1025
C1025
DY
DY
1 2
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
C1024
C1024
AA18, AA19, AA21, AA22, AA24, AA25, AC18, AC19, AC21, AC22, AC24, AC25, AD25, AD27
1 2
1D05V_S5
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
C1005
C1005
DY
DY
1 2
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
C1004
C1004
DY
DY
1 2
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
C1003
C1003
1 2
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
C1007
C1007
DY
DY
1 2
V33, AA32, AA33, AA35, AA36, AC32, Y30, Y32, Y33, Y35
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
C1006
C1006
1 2
1D05V_S5
1D05V_S5
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
C1056
C1056
DY
DY
1 2
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
C1057
C1057
1 2
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
C1018
C1018
1 2
1D05V_S5
12/2
SC10U6D3V3MX-L-GP
SC10U6D3V3MX-L-GP
PC1014
PC1014
1 2
SC10U6D3V3MX-L-GP
SC10U6D3V3MX-L-GP
PC1012
PC1012
AM21, AM33, AM22, AN22, AN32, AM32
1 2
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
C1013
C1013
1 2
1D05V_S5
remove C1050 SB 20150123 Rock
DY
DY
DY
DY
DY
DY
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
C1019
C1019
DY
DY
1 2
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
C1021
C1021
V22, V24, U24, U22, V27, U27
1 2
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
C1020
C1020
1 2
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
C1023
C1023
1 2
U19
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
C1022
C1022
1 2
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
C1016
C1016
V29
1 2
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
C1017
C1017
1 2
1D05V_S5 1D05V_S5 1D05V_S5
1D05V_S5 1D05V_S5
<Variant Name>
<Variant Name>
<Variant Name>
Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
SC10U6D3V3MX-L-GP
SC10U6D3V3MX-L-GP
PC1055
PC1055
1 2
SC10U6D3V3MX-L-GP
SC10U6D3V3MX-L-GP
PC1054
PC1054
1 2
SC10U6D3V3MX-L-GP
SC10U6D3V3MX-L-GP
PC1053
PC1053
DY
DY
1 2
SC10U6D3V3MX-L-GP
SC10U6D3V3MX-L-GP
PC1052
PC1052
DY
DY
1 2
SC10U6D3V3MX-L-GP
SC10U6D3V3MX-L-GP
PC1051
PC1051
DY
DY
1 2
Title
Title
Title
1
LAW_BA
LAW_BA
LAW_BA
CPU (Power CAP1)
CPU (Power CAP1)
CPU (Power CAP1)
Monday, March 16, 2015
Monday, March 16, 2015
Monday, March 16, 2015
Size Document Number Rev
Date: Sheet of
A3
Size Document Number Rev
Date: Sheet of
A3
Size Document Number Rev
Date: Sheet of
A3
2
PLACE CLOSE TO PIN 1 OF RB
3
PLACE CLOSE TO PIN 1 OF RA
SC10U6D3V2MX-GP-U
SC10U6D3V2MX-GP-U
PC1065
PC1065
DY
DY
GFX_CORE
1 2
SC10U6D3V3MX-L-GP
SC10U6D3V3MX-L-GP
PC1064
PC1064
DY
DY
1 2
SC10U6D3V3MX-L-GP
SC10U6D3V3MX-L-GP
PC1063
PC1063
DY
DY
1 2
SC10U6D3V3MX-L-GP
SC10U6D3V3MX-L-GP
PC1062
PC1062
1 2
SC10U6D3V2MX-GP-U
SC10U6D3V2MX-GP-U
PC1044
PC1044
1 2
SC10U6D3V3MX-L-GP
SC10U6D3V3MX-L-GP
PC1046
PC1046
DY
DY
1 2
SC10U6D3V2MX-GP-U
SC10U6D3V2MX-GP-U
PC1045
PC1045
1 2
SC10U6D3V2MX-GP-U
SC10U6D3V2MX-GP-U
PC1043
PC1043
1 2
SC10U6D3V2MX-GP-U
SC10U6D3V2MX-GP-U
PC1031
PC1031
1 2
Cap part count -1 20150225
DY
DY
Cap part count -1 20150225
DY
DY
1D15V_S5
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
C1049
C1049
DY
DY
1 2
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
C1039
C1039
DY
DY
1 2
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
C1038
C1038
1 2
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
C1037
C1037
DY
DY
1 2
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
C1035
C1035
DY
DY
1 2
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
C1034
C1034
DY
DY
1 2
1D15V_S5
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
C1028
C1028
1 2
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
C1026
C1026
1 2
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
C1047
C1047
1 2
4
5
SC10U6D3V3MX-L-GP
SC10U6D3V3MX-L-GP
PC1059
PC1059
DY
DY
1 2
SC10U6D3V3MX-L-GP
SC10U6D3V3MX-L-GP
PC1058
PC1058
DY
DY
1 2
SC4D7U6 D 3V2MX-GP-U
SC4D7U6D3V2MX-GP-U
C1029
C1029
1 2
SC4D7U6 D 3V2MX-GP-U
4
5
SC4D7U6D3V2MX-GP-U
C1030
C1030
1 2
SC4D7U6 D 3V2MX-GP-U
SC4D7U6D3V2MX-GP-U
C1027
C1027
1 2
Cap part count -1 20150225
SC10U6D3V3MX-L-GP
SC10U6D3V3MX-L-GP
PC1048
PC1048
1 2
SC10U6D3V3MX-L-GP
SC10U6D3V3MX-L-GP
AF36, AG33, AG35, AG36, AG38, AJ33, AJ36, AJ38
PC1042
PC1042
1 2
1V_CPU_CORE
PLACE ALL THE CAPS
UNDER THE PKG SHADOW
Change all caps to 10U 20150121 Ray
SC10U6D3V3MX-L-GP
SC10U6D3V3MX-L-GP
PC1061
PC1061
DY
DY
1 2
SC10U6D3V3MX-L-GP
SC10U6D3V3MX-L-GP
PC1060
PC1060
DY
DY
1 2
SC4D7U6 D 3V2MX-GP-U
SC4D7U6D3V2MX-GP-U
C1032
C1032
1 2
SC4D7U6 D 3V2MX-GP-U
SC4D7U6D3V2MX-GP-U
C1033
C1033
Cap part count -1 20150225
1 2
SC10U6D3V3MX-L-GP
SC10U6D3V3MX-L-GP
PC1041
PC1041
AF30, AG27, AG29, AG30, AJ27, AJ29, AJ30, AF29
1 2
SC10U6D3V3MX-L-GP
SC10U6D3V3MX-L-GP
PC1040
PC1040
1 2
1V_CPU_CORE
PLACE ALL THE CAPS
UNDER THE PKG SHADOW
Change all caps to 10U 20150121 Ray
SSID = CPU
D D
C C
B B
A A
-1
-1
-1
11 102
11 102
11 102
1
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
C1103
C1103
2
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
H10, G10
C1125
C1125
1 2
1D05V_S5
3D3V_S5_PRIME
C5, B6 D4, E3
RTC_AUX_S5
1 2
9/22 removed 9/22 removed
SC1U6D3V3KX-L1-GP
SC1U6D3V3KX-L1-GP
C1132
C1132
1 2
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
C1114
C1114
1 2
1D8V_S5
3D3V_S5_PRIME
1D8V_S5
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
C1115
C1115
1 2
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
C1105
C1105
1 2
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
C1104
C1104
1 2
Title
Title
Title
1
LAW_BA
LAW_BA
LAW_BA
CPU (Power CAP2)
CPU (Power CAP2)
CPU (Power CAP2)
Monday, March 16, 2015
Monday, March 16, 2015
Monday, March 16, 2015
Size Document Number Rev
Date: Sheet of
A3
A3
A3
Size Document Number Rev
Date: Sheet of
Size Document Number Rev
Date: Sheet of
2
-1 20150206 Rock
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
C1127
3D3V_1D8V_VCCPADCF3SI0
3D3V_1D8V_VCCPADCF1SI0
1D8V_VCCCFIOAZA
1D8V_S5
1D8V_S5
C1127
1 2
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
C1126
C1126
1 2
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
C1133
C1133
1 2
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
C1102
C1102
1 2
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
C1111
C1111
1 2
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
C1110
C1110
1 2
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
C1130
C1130
1 2
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
C1121
C1121
1 2
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
C1113
C1113
1 2
DY
DY
DY
DY
3
4
3
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
C1148
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
C1144
C1144
1 2
SC10U6D3V3MX-L-GP
SC10U6D3V3MX-L-GP
PC1119
PC1119
1 2
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
C1112
C1112
1 2
1D35V_CPU_VDDQ_S3
4
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
C1143
C1143
1 2
SC10U6D3V3MX-L-GP
SC10U6D3V3MX-L-GP
PC1118
PC1118
1 2
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
C1101
C1101
1 2
DY
DY
Place close to CPU V36, Y36 T40, P40
1D35V_CPU_VDDQ_S3 1D24V_S5 1D24V_S5
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
C1107
C1107
1 2
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
C1106
C1106
1 2
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
C1131
C1131
1 2
SC10U6D3V3MX-L-GP
SC10U6D3V3MX-L-GP
PC1124
PC1124
1 2
SC10U6D3V3MX-L-GP
SC10U6D3V3MX-L-GP
PC1123
PC1123
1 2
SC10U6D3V3MX-L-GP
SC10U6D3V3MX-L-GP
PC1122
PC1122
1 2
SC10U6D3V3MX-L-GP
SC10U6D3V3MX-L-GP
PC1120
PC1120
1 2
DY
DY
DY
DY
DY
DY
C1148
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
C1117
C1117
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
C1116
C1116
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
C1147
C1147
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
Y27, Y25 P38, V30, AC30
C1134
C1134
1D24V_S5 1D24V_S5
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
C1137
C1137
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
C1138
C1138
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
M41 U35, V35
C1128
C1128
1 2
1D24V_S5 1D24V_S5
1 2
1 2
1 2
1 2
1 2
1 2
1 2
DY
DY
DY
DY
DY
DY
DY
DY
DY
DY
1D24V_S5 1D24V_S5
AF35, AD35, AD38, AC36 H44 P41
1D24V_S5
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
C1129
C1129
1 2
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
C1150
C1150
1 2
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
C1108
C1108
1 2
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
C1149
C1149
1 2
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
C1109
C1109
1 2
DY
DY
DY
DY
DY
DY
DY
DY
5
1D35V_CPU_VDDQ_S3
Close to CPU Close to DDR Close to DDR Close to CPU
SSID = CPU
D D
C C
5
B B
A A
5
4
3
2
1
SSID = MEMORY
DM1
D D
M_A_A[15:0] 5
M_A_BS2 5
M_A_BS0 5
M_A_BS1 5
M_A_DQ[63:0] 5
C C
B B
M_A_DQS_DN0 5
M_A_DQS_DN1 5
M_A_DQS_DN2 5
M_A_DQS_DN3 5
M_A_DQS_DN4 5
M_A_DQS_DN5 5
M_A_DQS_DN6 5
M_A_DQS_DN7 5
M_A_DQS_DP0 5
M_A_DQS_DP1 5
M_A_DQS_DP2 5
M_A_DQS_DP3 5
M_A_DQS_DP4 5
M_A_DQS_DP5 5
M_A_DQS_DP6 5
M_A_DIM0_ODT0 5
M_A_DIM0_ODT1 5
A A
M_A_DQS_DP7 5
SM_DRAMRST# 5
M_A_DIM0_ODT0
M_A_DIM0_ODT1
VREF_CA
VREF_DQ
0D675V_VREF_S0
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
M_A_DQ1
M_A_DQ4
M_A_DQ2
M_A_DQ3
M_A_DQ0
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ13
M_A_DQ9
M_A_DQ10
M_A_DQ14
M_A_DQ8
M_A_DQ12
M_A_DQ11
M_A_DQ15
M_A_DQ22
M_A_DQ17
M_A_DQ18
M_A_DQ23
M_A_DQ19
M_A_DQ16
M_A_DQ20
M_A_DQ21
M_A_DQ28
M_A_DQ30
M_A_DQ24
M_A_DQ26
M_A_DQ27
M_A_DQ25
M_A_DQ31
M_A_DQ29
M_A_DQ32
M_A_DQ37
M_A_DQ34
M_A_DQ38
M_A_DQ36
M_A_DQ33
M_A_DQ35
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ46
M_A_DQ44
M_A_DQ45
M_A_DQ43
M_A_DQ47
M_A_DQ48
M_A_DQ52
M_A_DQ55
M_A_DQ51
M_A_DQ53
M_A_DQ49
M_A_DQ54
M_A_DQ50
M_A_DQ56
M_A_DQ59
M_A_DQ62
M_A_DQ60
M_A_DQ58
M_A_DQ63
M_A_DQ61
5
DM1
98
A0
97
A1
96
A2
95
A3
92
A4
91
A5
90
A6
86
A7
89
A8
85
A9
107
A10/AP
84
A11
83
A12
119
A13
80
A14
78
A15
79
A16/BA2
109
BA0
108
BA1
5
DQ0
7
DQ1
15
DQ2
17
DQ3
4
DQ4
6
DQ5
16
DQ6
18
DQ7
21
DQ8
23
DQ9
33
DQ10
35
DQ11
22
DQ12
24
DQ13
34
DQ14
36
DQ15
39
DQ16
41
DQ17
51
DQ18
53
DQ19
40
DQ20
42
DQ21
50
DQ22
52
DQ23
57
DQ24
59
DQ25
67
DQ26
69
DQ27
56
DQ28
58
DQ29
68
DQ30
70
DQ31
129
DQ32
131
DQ33
141
DQ34
143
DQ35
130
DQ36
132
DQ37
140
DQ38
142
DQ39
147
DQ40
149
DQ41
157
DQ42
159
DQ43
146
DQ44
148
DQ45
158
DQ46
160
DQ47
163
DQ48
165
DQ49
175
DQ50
177
DQ51
164
DQ52
166
DQ53
174
DQ54
176
DQ55
181
DQ56
183
DQ57
191
DQ58
193
DQ59
180
DQ60
182
DQ61
192
DQ62
194
DQ63
10
DQS0#
27
DQS1#
45
DQS2#
62
DQS3#
135
DQS4#
152
DQS5#
169
DQS6#
186
DQS7#
12
DQS0
29
DQS1
47
DQS2
64
DQS3
137
DQS4
154
DQS5
171
DQS6
188
DQS7
116
ODT0
120
ODT1
126
VREF_CA
1
VREF_DQ
30
RESET#
203
VTT1
204
VTT2
SKT_DDR 204P SMD
SKT_DDR 204P SMD
DDR3-204P-262-GP-U
DDR3-204P-262-GP-U
1st = 62.10024.S21
1st = 62.10024.S21
2nd = 62.10024.Q61
2nd = 62.10024.Q61
3rd = 62.10024.M31
3rd = 62.10024.M31
4th = 62.10017.I31
4th = 62.10017.I31
NP1
NP1
NP2
NP2
110
RAS#
113
WE#
115
CAS#
114
CS0#
121
CS1#
73
CKE0
74
CKE1
101
CK0
103
CK0#
102
CK1
104
CK1#
11
DM0
28
DM1
46
DM2
63
DM3
136
DM4
153
DM5
170
DM6
187
DM7
200
SDA
202
SCL
198
EVENT#
199
VDDSPD
197
SA0
201
SA1
77
NC#1
122
NC#2
125
NC#/TEST
75
VDD1
76
VDD2
81
VDD3
82
VDD4
87
VDD5
88
VDD6
93
VDD7
94
VDD8
99
VDD9
100
VDD10
105
VDD11
106
VDD12
111
VDD13
112
VDD14
117
VDD15
118
VDD16
123
VDD17
124
VDD18
2
VSS
3
VSS
8
VSS
9
VSS
13
VSS
14
VSS
19
VSS
20
VSS
25
VSS
26
VSS
31
VSS
32
VSS
37
VSS
38
VSS
43
VSS
44
VSS
48
VSS
49
VSS
54
VSS
55
VSS
60
VSS
61
VSS
65
VSS
66
VSS
71
VSS
72
VSS
127
VSS
128
VSS
133
VSS
134
VSS
138
VSS
139
VSS
144
VSS
145
VSS
150
VSS
151
VSS
155
VSS
156
VSS
161
VSS
162
VSS
167
VSS
168
VSS
172
VSS
173
VSS
178
VSS
179
VSS
184
VSS
185
VSS
189
VSS
190
VSS
195
VSS
196
VSS
205
VSS
206
VSS
Reverse Type
4
TS#_D IMM0_1
SA0 DIM0 = 0
SA1 DIM0 = 0
1D35V_CPU_VDDQ_S3
M_A_RAS# 5
M_A_WE# 5
M_A_CAS# 5
M_A_CS#0 5
M_A_CS#1 5
M_A_CKE0 5
M_A_CKE1 5
M_A_CLK0 5
M_A_CLK#0 5
M_A_CLK1 5
M_A_CLK#1 5
M_A_DM0 5
M_A_DM1 5
M_A_DM2 5
M_A_DM3 5
M_A_DM4 5
M_A_DM5 5
M_A_DM6 5
M_A_DM7 5
SMB_DATA_DIMM 16
SMB_CLK_DIMM 16
1D35V_CPU_VDDQ_S3
0D675V_VREF_S0
1 2
TS#_D IMM0_1
3D3V_S0
1 2
1 2
C1208
C1208
C1202
C1202
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
DY
DY
SCD1U16V2KX-L-GP
Layout Note:
Place these Caps near SO-DIMMA.
SODIMM A DECOUPLING
1 2
1 2
C1204
C1204
C1203
C1203
SC10U6D3V3MX-L-GP
SC10U6D3V3MX-L-GP
1 2
C1209
C1209
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
DY
DY
Layout Note:
Place these capsclose to VTT1 and VTT2.
C1216
C1216
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
SB 20150122 Rock
1 2
1 2
C1206
C1206
C1205
C1205
SC10U6D3V3MX-L-GP
SC10U6D3V3MX-L-GP
SC10U6D3V3MX-L-GP
SC10U6D3V3MX-L-GP
DY
DY
DY
DY
1 2
1 2
C1211
C1211
C1210
C1210
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
Note:
If SA0 D IM0 = 0, SA1_D IM0 = 0
SO-DIMMA SPD Address is 0xA0
SO-DIMMA TS Address is 0x30
If SA0 D IM0 = 1, SA1_D IM0 = 0
SO-DIMMA SPD Address is 0xA2
SO-DIMMA TS Address is 0x32
3D3V_S0
R1211
R1211
10KR2J-L-GP
10KR2J-L-GP
1 2
For Intel Recommend Close to DIMM(Braswell)
1D35V_CPU_VDDQ_S3
SRN4K7J-8-GP
VREF_DQ
1 2
1 2
C1207
C1207
SC10U6D3V3MX-L-GP
SC10U6D3V3MX-L-GP
DY
DY
1 2
C1212
C1212
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
1 2
C1221
C1221
SC10U6D3V3MX-L-GP
SC10U6D3V3MX-L-GP
DY
DY
1 2
C1222
C1222
C1223
SC10U6D3V3MX-L-GP
SC10U6D3V3MX-L-GP
C1223
SC10U6D3V3MX-L-GP
SC10U6D3V3MX-L-GP
DY
DY
10/13 EMC add
1D35V_CPU_VDDQ_S3
1 2
DY
SC10U6D3V3MX-L-GP
SC10U6D3V3MX-L-GP
EC1202
SCD1U16V2KX-L-GPDYEC1202
SCD1U16V2KX-L-GP
EC1201
SCD1U16V2KX-L-GPDYEC1201
SCD1U16V2KX-L-GP
1 2
DY
For Intel Recommend Close to DIMM(Braswell)
VREF_CA
EC1203
SCD1U16V2KX-L-GPDYEC1203
SCD1U16V2KX-L-GP
EC1204
SCD1U16V2KX-L-GPDYEC1204
SCD1U16V2KX-L-GP
1 2
1 2
DY
DY
1 2
1 2
C1213
C1213
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
1 2
1 2
C1201
C1201
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
SCD1U25V2KX change to SCD1U16V2KX -1 20150204 Rock
R1203
R1203
R1207
R1207
0R0402-PAD
0R0402-PAD
0R0402-PAD
0R0402-PAD
VREF_DQ_R1203
VREF_CA_R1207 M_A_DQ57
SRN4K7J-8-GP
1
2 3
RN1201
RN1201
RN1202
RN1202
2 3
1
SRN4K7J-8-GP
SRN4K7J-8-GP
4
1D35V_CPU_VDDQ_S3
4
Reseve 0.1uF for ESD
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei H sien 22 1, Taiwan , R.O. C.
Taipei H sien 22 1, Taiwan , R.O. C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Monday, March 16, 2015
Monday, March 16, 2015
Monday, March 16, 2015
Date: Sheet of
Date: Sheet of
3
2
Date: Sheet of
Taipei H sien 22 1, Taiwan , R.O. C.
DDR3-SODIMM1
DDR3-SODIMM1
DDR3-SODIMM1
LAW_BA
LAW_BA
LAW_BA
1
Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
-1
-1
12 102
12 102
12 102
-1
5
4
3
2
1
SSID = MEMORY
D D
C C
Blanking
B B
Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
<Variant Name>
<Variant Name>
<Variant Name>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A A
Title
Title
Title
(Reserved)
(Reserved)
(Reserved)
LAW_BA
LAW_BA
LAW_BA
5
4
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A4
A4
A4
Monday, March 16, 2015
Monday, March 16, 2015
Monday, March 16, 2015
Date: Sheet of
Date: Sheet of
3
Date: Sheet of
2
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
13 102
13 102
13 102
1
-1
-1
-1
5
4
3
2
1
SSID = CPU
D D
C C
Blanking
B B
Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
<Variant Name>
<Variant Name>
<Variant Name>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A A
Title
Title
Title
(Reserved)
(Reserved)
(Reserved)
LAW_BA
LAW_BA
LAW_BA
5
4
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A4
A4
A4
Monday, March 16, 2015
Monday, March 16, 2015
Monday, March 16, 2015
Date: Sheet of
Date: Sheet of
3
Date: Sheet of
2
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
14 102
14 102
14 102
1
-1
-1
-1
5
SSID = STRAP
GPIO
D D
Schematic
STRAP RESISTORS SHOULD BE PLACED CLOSE TO SOC
SHOULD BE PLACED OUTSIDE KOZ AREA
DDI0_Detected DDI1_Detected Description
SOC_WAKE_SCI# 16,24
1 2
R1516
R1516
10KR2F-L1-GP
10KR2F-L1-GP
DY
DY
All the straps are sampled on the rising edge of the
PMC_RSMRST_N signal (check l ist)
A16 Sw ap
Override
GPIO_SUS1 GPIO_SUS2
GPIO_SUS1 16
1 2
R1512
R1512
10KR2F-L1-GP
10KR2F-L1-GP
DY
DY
DY
DY
1 2
R1508
R1508
10KR2F-L1-GP
10KR2F-L1-GP
4
DSI Display Detected Boot BIOS Strap BBS
GPIO_SUS3 GPIO_SUS4 GPIO_SUS0
1 2
R1520
R1520
10KR2F-L1-GP
10KR2F-L1-GP
DY
GPIO_SUS2 16 SOC_RUNTIME_SCI# 16,24 EC_SMI# 16,24
DY
DY
DY
1 2
R1504
R1504
10KR2F-L1-GP
10KR2F-L1-GP
DY
DY
1 2
R1503
R1503
10KR2F-L1-GP
10KR2F-L1-GP
Flash Descriptor
Security Override
Stuff for production
1D8V_S5 1D8V_S5
DY
DY
TP_IN#_CPU 16,62
DY
DY
GPIO_SUS5 GPIO_SUS6 GPI O_SUS7
1 2
R1531
R1531
100KR2J-4-GP
100KR2J-4-GP
ME_FWP_SOC 16 GPIO_SUS3 16
1 2
R1519
R1519
4K7R2F-GP
4K7R2F-GP
3
DFX Boot Halt Strap
& VISA Early POSM Debug Enable
1 2
R1513
R1513
10KR2F-L1-GP
10KR2F-L1-GP
DY
DY
DFX Sus Debug Strap
1 2
R1515
R1515
10KR2F-L1-GP
10KR2F-L1-GP
DY
DY
2
ICLK, USB2, DDI SFR
Supply Select
SEC_GPIO_SUS8
1D8V_S5
1 2
R1523
R1523
DY
DY
10KR2F-L1-GP
10KR2F-L1-GP
SEC_GPIO_SUS8 16 SEC_GPIO_SUS9 16 SEC_GPIO_SUS10 16 GP_CAMERASB08 8 GP_CAMERASB09 8 GP_CAMERASB11 8
ICLK SFR
Bypass
POSM Select
ICLK Xtal OSC
Bypass
SEC_GPIO_SUS9 SEC_GPIO_SUS10 GP_CAMERASB09 GP_CAMERASB08 GP_CAMERASB11
1D8V_S5
DY
DY
DY
DY
1 2
R1525
R1525
1KR2J-L2-GP
1KR2J-L2-GP
1 2
R1524
R1524
10KR2F-L1-GP
10KR2F-L1-GP
10/1 modified
1D8V_S5 1D8V_S5 1D8V_S5 1D8V_S5
1 2
R1527
R1527
10KR2F-L1-GP
10KR2F-L1-GP
DY
DY
1 2
R1526
R1526
10KR2F-L1-GP
10KR2F-L1-GP
DY
DY
DY
DY
1 2
R1529
R1529
10KR2F-L1-GP
10KR2F-L1-GP
1
CCU SUS RO
Bypass
1 2
R1535
R1535
10KR2F-L1-GP
10KR2F-L1-GP
DY
DY
RTC OSC
bypass
1 2
R1537
R1537
10KR2F-L1-GP
10KR2F-L1-GP
DY
DY
Weak internal pull-up
Normal Operation
Override
Normal
Halt boot enable
4
Normal Operation
Change Boot
Loader address
(A16 Override)
GPIO_SUS2
EC_SMI#
DDI1 Detect
Disable
1D8V_S5
RN1502
RN1502
2 3
1
SRN10KJ-L-GP
SRN10KJ-L-GP
SB 20150120 Rock SB 20150120 Rock
RN1501
RN1501
1
2
3
4 5
SRN4K7J- 1 0 - G P
SRN4K7J-10-GP
DDI0 Detect
Disable
SOC_WAKE_SCI#
8
GPIO_SUS1
7
SOC_RUNTIME_SCI#
6
SEC_GPIO_SUS8
-1 20150205 Rock
High
Low
C C
B B
DSI Detect
Disable
Weak internal pull-down
1D8V_S5 1D8V_S5
RN1503
RN1503
1
8
2
7
3
6
4 5
SRN100KJ - L - GP
SRN100KJ-L-GP
TP_IN#_CPU
GP_CAMERASB08
GP_CAMERASB09
GP_CAMERASB11
Boot from SPI
Boot from LPC
Weak internal pull-up
Normal
Sus Debug enable
1.35V
1.25V
Weak internal pull-up
Bypass
with 1.05V
No bypass
PMC
Fuse controller
Weak internal pull-down
Bypass
No bypass
Bypass
No bypass
Bypass
No bypass
A A
Wistron Confidential document, Anyone can not
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<Variant Name>
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5
4
<Variant Name>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A1
A1
A1
Monday, March 16, 2015
Monday, March 16, 2015
Monday, March 16, 2015
Date: Sheet of
Date: Sheet of
3
2
Date: Sheet of
1
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
CPU(STRAP)
CPU(STRAP)
CPU(STRAP)
LAW_BA
LAW_BA
LAW_BA
15 102
15 102
15 102
-1
-1
-1
5
SSID = PCH
D D
USB30_TX_CPU_P0 34
USB30_TX_CPU_N0 34
USB30_RX_CPU_P0 34
USB30_RX_CPU_N0 34
C1601
C1601
1 2
SC6D8P50V2DN-GP
SC6D8P50V2DN-GP
SPEC CL=7pF
C1602
C1602
1 2
SC6D8P50V2DN-GP
SC6D8P50V2DN-GP
1D8V_S5
RN1615
RN1615
SRN10KJ-L-GP
SRN10KJ-L-GP
DY
DY
1 2
1 2
USB_OC#0
PSW_CLR#
4
PCU_SMB_ALERT#
USB_HSIC_RCOMP
45D3R2F-L-GP
45D3R2F-L-GP
USB_RCOMP
2 3
C C
B B
1
1D8V_S5
1 2
R1612 1KR2J-L2-GP
R1612 1KR2J-L2-GP
R1637
R1637
R1641 113R2F-GP R1641 113R2F-GP
Change to GSENSOR_Control Pin 20150115 Rock
A A
11/6 change hosonic
X1601
X1601
82.30071.131
82.30071.131
4 1
XTAL-19D2MHZ-12-GP
XTAL-19D2MHZ-12-GP
2nd = 082.30001.0071
2nd = 082.30001.0071
SB 20150121 Rock
GSENSOR_INT# 70
5
2 3
PSW_CLR# 8
R1601 2K49R2F-2-L-GP R1601 2K49R2F-2-L-GP
1 2
XTL_19D2M_X1_CPU
R1603
R1603
200KR2F-L-3-GP
200KR2F-L-3-GP
1 2
XTL_19D2M_X2_CPU
1 2
R1636 49D9R2F-L1-GP R1636 49D9R2F-L1-GP
SOC_WAKE_SCI# 15,24
GPIO_SUS1 15
GPIO_SUS2 15
GPIO_SUS3 15
TP_IN#_CPU 15,62
ME_FWP_SOC 15
SOC_RUNTIME_SCI# 15,24
EC_SMI# 15,24
SEC_GPIO_SUS9 15
SEC_GPIO_SUS8 15
SEC_GPIO_SUS10 15
1 2
100R2F-L3-GP
100R2F-L3-GP
XTL_19D2M_X1_CPU
XTL_19D2M_X2_CPU
ICLKIC OMP
ICLKR COMP
TP1613 TPAD14-OP-GP TP1613 TPAD14-OP-GP
TP1614 TPAD14-OP-GP TP1614 TPAD14-OP-GP
TP1615 TPAD14-OP-GP TP1615 TPAD14-OP-GP
TP1616 TPAD14-OP-GP TP1616 TPAD14-OP-GP
TP1617 TPAD14-OP-GP TP1617 TPAD14-OP-GP
R1639
R1639
1
TP1612
TP1612
TPAD14-OP-GP
TPAD14-OP-GP
R1642
R1642
402R2F-GP
402R2F-GP
1 2
1
1
1
1
1
GPIO_RCOMP18
GPIO_ALERT
GPIO_DFX0
GPIO_DFX2
GPIO_DFX5
GPIO_DFX7
GPIO_DFX8
USB3_OBSP
USB3_OBSN
P24
M22
J26
N26
P20
N20
P26
K26
M26
AH45
A9
C9
B8
B7
B5
B4
AM40
AM41
AM44
AM45
AM47
AK48
AM48
AK41
AK42
AD51
AD52
AH50
AH48
AH51
AH52
AG51
AG53
AF52
AF51
AE51
AC51
AH40
Y3
4
CPU1E
CPU1E
OSCIN
OSCOUT
RSVD#J26
RSVD#N26
ICLKICOMP
ICLKRCOMP
RSVD#P26
RSVD#K26
RSVD#M26
RSVD#AH45
MF_PLT_CLK0
MF_PLT_CLK1
MF_PLT_CLK2
MF_PLT_CLK3
MF_PLT_CLK4
MF_PLT_CLK5
GPIO_DFX0
GPIO_DFX1
GPIO_DFX2
GPIO_DFX3
GPIO_DFX4
GPIO_DFX5
GPIO_DFX6
GPIO_DFX7
GPIO_DFX8
GPIO_SUS0
GPIO_SUS1
GPIO_SUS2
GPIO_SUS3
GPIO_SUS4
GPIO_SUS5
GPIO_SUS6
GPIO_SUS7
SEC_GPIO_SUS9
SEC_GPIO_SUS8
SEC_GPIO_SUS10
SEC_GPIO_SUS11
GPIO0_RCOMP
GPIO_ALERT
BRASWELL-GP
BRASWELL-GP
4
1.8V
B32
C32
F28
D28
A33
C33
F30
D30
C34
B34
G32
C35
A35
G34
D34
F34
C37
A37
F36
D36
M34
M32
C38
B38
G36
N34
P34
iCLK
iCLK
J32
J34
J36
PLTFM CLK's
PLTFM CLK's
GPIO_DFX
GPIO_DFX
GPIO_SUS
GPIO_SUS
CPU1F
CPU1F
1.05V
USB3_TXP0
USB3_TXN0
USB3_RXP0
USB3_RXN0
USB3_TXP1
USB3_TXN1
USB3_RXP1
USB3_RXN1
USB3_TXP2
USB3_TXN2
USB3_RXP2
USB3_RXN2
USB3_TXP3
USB3_TXN3
USB3_RXP3
USB3_RXN3
USB3_OBSP
USB3_OBSN
RSVD#C37
RSVD#A37
RSVD#F36
RSVD#D36
RSVD#M34
RSVD#M32
RSVD#C38
RSVD#B38
RSVD#G36
RSVD#J36
RSVD#N34
RSVD#P34
BRASWELL-GP
BRASWELL-GP
BRASWELL
BRASWELL
BRASWELL
BRASWELL
1.8V
USB3.0
USB3.0
USB_HSIC_0_STROBE
USB_HSIC_0_DATA
USB_HSIC_1_STROBE
USB_HSIC_1_DATA
HSIC
HSIC
USB_HSIC_RCOMP
RESERVED
RESERVED
UART
UART
1.8V
RESERVED
RESERVED
I2C
I2C
1.8V
SMBUS
SMBUS
MF_SMB_ALERT#
6 OF 13
6 OF 13
USB_OTG_ID
USB_DP0
USB_DN0
USB_DP1
USB_DN1
USB_DP2
USB_DN2
USB_DP3
USB_DN3
USB_DP4
USB_DN4
USB2.0
USB2.0
USB_OC1#
USB_OC0#
RSVD#B46
USB_VBUSSNS
USB_RCOMP
UART1_TXD
UART1_RXD
UART1_CTS#
UART1_RTS#
UART2_TXD
UART2_RXD
UART2_CTS#
UART2_RTS#
5 OF 13
5 OF 13
RSVD#C11
RSVD#B10
RSVD#F12
RSVD#F10
RSVD#D12
RSVD#E8
RSVD#C7
RSVD#D6
RSVD#J12
RSVD#F7
RSVD#J14
RSVD#L13
I2C0_SCL
I2C0_SDA
I2C1_SCL
I2C1_SDA
I2C2_SCL
I2C2_SDA
I2C3_SCL
I2C3_SDA
I2C4_SCL
I2C4_SDA
I2C5_SCL
I2C5_SDA
I2C6_SCL
I2C6_SDA
I2C_NFC_SCL
I2C_NFC_SDA
MF_SMB_CLK
MF_SMB_DATA
B48
C42
B42
C43
B44
C41
A41
C45
A45
B40
C40
P16
P14
B46
B47
A48
M36
N36
K38
M38
N38
AD10
AD12
AD13
AD14
Y6
Y7
V9
V10
C11
B10
F12
F10
D12
E8
C7
D6
J12
F7
J14
L13
AK6
AH7
AF6
AH6
AF9
AF7
AE4
AD2
AC1
AD3
AB2
AC3
AA1
AB3
AA3
Y2
AM6
AM7
AM9
USB_OTG_ID
USB_OC#0
USB_OC#0
USB_RCOMP1
USB_VBUSSNS
USB_RCOMP
USB_HSIC_RCOMP
UART1_TXD
1
UART1_RXD
1
UART1_CTS
1
UART1_RTS
1
SIO_I2C0_CLK
SIO_I2C0_DATA
GSOR_I2C1_CLK
GSOR_I2C1_DATA
SIO_I2C5_CLK
SIO_I2C5_DATA
SMB_CLK_CPU
SMB_DATA_CPU
PCU_SMB_ALERT#
USB Table
Pair
0
1
2
3
4
0R2J-L-GP
0R2J-L-GP
R1611
R1611
1 2
DY
DY
TP1608 TPAD14-OP-GP TP1608 TPAD14-OP-GP
TP1609 TPAD14-OP-GP TP1609 TPAD14-OP-GP
TP1610 TPAD14-OP-GP TP1610 TPAD14-OP-GP
TP1611 TPAD14-OP-GP TP1611 TPAD14-OP-GP
3
Device
USB3.0 Port 0(USB2.0)
USB 2.0 (debug port)
Camera
TS
WiFi + BT
USB_CPU_PP0 34
USB_CPU_PN0 34
USB_CPU_PP1 34
USB_CPU_PN1 34
USB_CPU_PP2 52
USB_CPU_PN2 52
USB_CPU_PP3 52
USB_CPU_PN3 52
USB_CPU_PP4 58,86
USB_CPU_PN4 58,86
USB 3 (I/O)
USB 2 (I/O)
CCD
TS
MINICARD(WLAN)
R1617
R1617
1 2
0R2J-L-GP
0R2J-L-GP
DY
DY
10/30 Braswell symbol issue
GSOR_I2C1_CLK 70
GSOR_I2C1_DATA 70
GSENSOR_1
GSENSOR_1
GSOR_I2C1_CLK
GSOR_I2C1_DATA
3
1D8V_S5
1
4
2 3
RN1608
RN1608
SRN2K2J-5-GP
SRN2K2J-5-GP
USB_VBUSSNS
R1616
R1616
0R0402-PAD
0R0402-PAD
SB 20150122 Rock
1D8V_S5
4
RN1610
RN1610
SRN1K8J-GP
SRN1K8J-GP
1
2 3
SMB_CLK_CPU
1D8V_S5
SML1_SMBDATA
1D8V_S5
.Delete location Q1615 ,Q1605 ,Q1607 , then
Q1614,Q1604,Q1606 change material from 84.05067.031
to 075.00138.0A7C (Singal N-mosfet =>Dual N-mosfet)
,due to consider that we can get more space of PCB for
designing 20141223 Rock
4
RN1603
RN1603
SRN2K2J-5-GP
SRN2K2J-5-GP
1
2 3
SIO_I2C5_DATA SIO_I2C5_DATA_Q
1D8V_S5 1D8V_S5
SIO_I2C5_CLK_Q SIO_I2C5_CLK
.Delete location Q1615 ,Q1605 ,Q1607 , then
Q1614,Q1604,Q1606 change material from 84.05067.031
to 075.00138.0A7C (Singal N-mosfet =>Dual N-mosfet)
,due to consider that we can get more space of PCB for
designing 20141223 Rock
1D8V_S5
1
2 3
RN1602
RN1602
SRN2K2J-5-GP
SRN2K2J-5-GP
TOUCH_I2C
TOUCH_I2C
4
SIO_I2C0_DATA SIO_I2C0_DATA_Q
1D8V_S5 1D 8V_S5
SIO_I2C0_CLK_Q
SIO_I2C0_CLK
.Delete location Q1615 ,Q1605 ,Q1607 , then
Q1614,Q1604,Q1606 change material from 84.05067.031
to 075.00138.0A7C (Singal N-mosfet =>Dual N-mosfet)
,due to consider that we can get more space of PCB for
designing 20141223 Rock
1 2
1 2
1 2
C1609
C1609
1
2 5
Q1606
Q1606
S1
S1
1
2 5
G1
G1
D2
D2
PJT138KA-GP
PJT138KA-GP
TOUCH_I2C
TOUCH_I2C
2
0R2J-L-GP
0R2J-L-GP
R1614
R1614
USB_VBUSSNS_R
USB_VBUS DY
USB_VBUS DY
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
USB_VBUS DY
USB_VBUS DY
Vth(max)=1.1V
Q1614
Q1614
S1
S1
1
2 5
G1
G1
D2
D2
PJT138KA-GP
PJT138KA-GP
Vth(max)=1.1V
Q1604
Q1604
S1
D1
S1
D1
G2
G2
G1
G1
D2
D2
S2
S2
PJT138KA-GP
PJT138KA-GP
Vth(max)=1.1V
D1
D1
G2
G2
S2
S2
2
D1
D1
G2
G2
6
4 3
S2
S2
6
4 3
6
4 3
Level shift
1 2
R1613
R1613
20KR2J-L3-GP
20KR2J-L3-GP
USB_VBUS DY
USB_VBUS DY
PD
CPU has internall weak pull high
ME_FWP_SOC
20150120 Rock
DDR3L-SODIMM1
1D8V_S5
SMB_DATA_CPU
SMB_DATA_DIMM 12
TOUCH_PAD
level-shift
PM_TP_CLK 62,86
TOUCH_I2C
I2C1_S CL_T OUC H 52
1
1D8V_S5 1D8V_S5
3D3V_S5
1 2
R1651
R1651
2K2R2J-L1-GP
2K2R2J-L1-GP
DY
DY
1 2
ME_FWP_B
R1650
R1650
DY
DY
2K2R2J-L1-GP
2K2R2J-L1-GP
DY
DY
CBE
Q1612
Q1612
LMBT3904LT1G-GP
LMBT3904LT1G-GP
84.T3904.H11
84.T3904.H11
2nd = 84.T3904.K11
2nd = 84.T3904.K11
3rd = 84.T3904.C11
3rd = 84.T3904.C11
SML1_SMBCLK
3D3V_S3 3D3V_S3
TOUCH_I2C
TOUCH_I2C
Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
<Variant Name>
<Variant Name>
<Variant Name>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A2
A2
A2
Date: Sheet of
Date: Sheet of
Date: Sheet of
-1 20150304 Rock
R1615
R1615
1 2
0R0402-PAD
0R0402-PAD
Q1618
Q1618
3 4
2
5
1
6
2N7002KDW-G P
2N7002KDW-G P
84.2N702.A3F
84.2N702.A3F
2nd = 75.00601.07C
2nd = 75.00601.07C
Q1619
Q1619
3 4
2
5
1
6
2N7002KDW-G P
2N7002KDW-G P
84.2N702.A3F
84.2N702.A3F
2nd = 75.00601.07C
2nd = 75.00601.07C
SIO_I2C0_CLK_Q
SIO_I2C0_DATA_Q
I2C1_S DA_T OUC H
I2C1_S CL_T OUC H
Q1620
Q1620
3 4
2
5
1
6
2N7002KDW-G P
2N7002KDW-G P
84.2N702.A3F
84.2N702.A3F
2nd = 75.00601.07C
2nd = 75.00601.07C
CPU (USB/LPC/GPIO)
CPU (USB/LPC/GPIO)
CPU (USB/LPC/GPIO)
Monday, March 16, 2015
Monday, March 16, 2015
Monday, March 16, 2015
ME_UNLOCK# 24
SML1_SMBCLK
SML1_SMBDATA
SMB_DATA_DIMM
SMB_CLK_DIMM
SB 20150120 Rock
SML1_SMBDATA
SIO_I2C5_DATA_Q
SIO_I2C5_CLK_Q
PM_TP_CLK
PM_TP_DATA
SB 20150120 Rock
SIO_I2C5_CLK_Q
1
2
3
4 5
TOUCH_I2C
TOUCH_I2C
SB 20150120 Rock
SIO_I2C0_CLK_Q
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
LAW_BA
LAW_BA
LAW_BA
1
RN1611
RN1611
1
2
3
4 5
SRN2K2J- 4 - G P
SRN2K2J-4-GP
3D3V_S0 3D3V_S0
RN1612
RN1612
1
2
3
4 5
SRN2K2J- 4 - G P
SRN2K2J-4-GP
RN1613
RN1613
SRN2K2J- 4 - G P
SRN2K2J-4-GP
3D3V_S0 3D3V_S0
16 102
16 102
16 102
3D3V_S5
3D3V_S0
8
7
6
SMB_CLK_DIMM 12
3D3V_S5
3D3V_S3
8
7
6
PM_TP_DATA 62,86
3D3V_S5
3D3V_S0
8
7
6
I2C1_S DA_T OUC H 52
-1
-1
-1
5
4
3
2
1
SSID = CPU
D D
C C
Blanking
B B
Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A A
Title
Title
Title
(Reserved)
(Reserved)
(Reserved)
LAW_BA
LAW_BA
LAW_BA
5
4
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A4
A4
A4
Monday, March 16, 2015
Monday, March 16, 2015
Monday, March 16, 2015
Date: Sheet of
Date: Sheet of
3
Date: Sheet of
2
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
17 102
17 102
17 102
1
-1
-1
-1
5
3D3V_AUX_S5
1 2
DY
DY
R1826
R1826
100KR2J-4-GP
1 2
RSMRST#_KBC_G
-1 20150203 Rock
2 1
G1801
G1801
GAP-OPEN
GAP-OPEN
SB 20150120 Rock
5
100KR2J-4-GP
RTC_RST#
RTC_TEST#
G
S
Q1802
Q1802
2N7002K-2-GP
2N7002K-2-GP
84.2N702.J31
84.2N702.J31
2ND = 84.2N702. 031
2ND = 84.2N702. 031
Q1801
Q1801
23 45
1
6
2N7002KDW-GP
2N7002KDW-GP
84.2N702.A3F
84.2N702.A3F
2nd = 75.00601.07C
2nd = 75.00601.07C
3rd = 84.2N702.F3F
3rd = 84.2N702.F3F
RTC_RST#
D
PM_RSM RST#
CLK_PCI_KBC 24,86
CLK_PCI_LPC 65,86
CLK_PCI_TPM 86,88
PM_CLK RUN#_EC 24,88
LPC_FRAME#_CPU 24,65, 88
LPC_AD_CPU_P0 24,65,88
LPC_AD_CPU_P1 24,65,88
LPC_AD_CPU_P2 24,65,88
LPC_AD_CPU_P3 24,65,88
INT_SERIRQ 24,88
R1820
R1820
10KR2J-L-GP
10KR2J-L-GP
D D
RTC_AUX_S5
Delete R1862, R1863 ,add RN1807 (SRN20KJ-1-GP)
20141223 Rock
1
2 3
RN1807
RN1807
SRN20KJ-1-GP
SRN20KJ-1-GP
4
1 2
C1803
C1803
SC1U6D3V3KX-L1-GP
SC1U6D3V3KX-L1-GP
1D8V_S5
C C
B B
A A
1 2
R1860 20KR2J-L3-GP R1860 20KR2J-L3-GP
RN1808
RN1808
1
2 3
SRN51J-G P
SRN51J-GP
DY
DY
1 2
R1822 51R2J-L1-GP
R1822 51R2J-L1-GP
DY
DY
1 2
R1831 51R2J-L1-GP
R1831 51R2J-L1-GP
DY
DY
100R2F-L3-GP
100R2F-L3-GP
R1859
R1859
1 2
1 2
10KR2J-L-GP
10KR2J-L-GP
R1815
R1815
1 2
51R2J-L1-GP
51R2J-L1-GP
R1817
R1817
1 2
51R2J-L1-GP
51R2J-L1-GP
3D3V_S0
APS_DY
APS_DY
RTCRST_ON 24
100KR2F-L3-GP
100KR2F-L3-GP
NOTE:Using Cap of 0402 package will be have bigger
leakage current ,so we need to use Cap of 0603 to
provide it. 20150203 Rock
1 2
C1802
C1802
SC1U6D3V3KX-L1-GP
SC1U6D3V3KX-L1-GP
-1 20150203 Rock
PROCHOT #_CPU
XDP_TMS
4
XDP_TDI
XDP_TDO
XDP_PREQ #
RCOMP_LPC_HVT
EDM_SOC
R1846
R1846
DY
DY
XDP_TCK
DY
DY
XDP_TRST #
DY
DY
R1866
R1866
APS_SLP_S0IX#
1 2
10KR2J-L-GP
10KR2J-L-GP
1 2
R1832
R1832
H_PROCHOT# 44,46,48,86
2K2R2J-L1-GP
2K2R2J-L1-GP
R1841
R1841
1KR2J-L2-GP
1KR2J-L2-GP
1 2
1D05V_VNN_PG_G
DY
DY
TP1814 TPAD14-OP-GP TP1814 TPAD14-OP-GP
1D8V_S5
R1840
R1840
DY
DY
1 2
C1801
C1801
SC22P50V2GN-GP
SC22P50V2GN-GP
1
1 2
1 2
R1802 0R2J-L-GP
R1802 0R2J-L-GP
1 2
R1809 0R0402-PAD R1809 0R0402-PAD
1 2
PM_SLP_S 4#_CPU
PM_SLP_S 3#_CPU_ D
4
RSMRST#_KBC 24,25,86
R1845 0R2J-L-GP
R1845 0R2J-L-GP
1 2
DY
DY
R1844
R1844
1 2
0R0402-PAD
0R0402-PAD
SB 20150122 Rock
XDP_TCK
XDP_TDI
XDP_TDO
XDP_TMS
XDP_TRST #
XDP_PRDY #
XDP_PREQ #
R1804 33R2J-L1-GP R1804 33R2J-L1-GP
R1803 33R2J-L1-GP R1803 33R2J-L1-GP
TPM
TPM
PROCHOT #_CPU
1 2
SB 20150122 Rock
3D3V_S5
Q1806
Q1806
S1
S1
1
2 5
G1
G1
D2
D2
PJT138KA -GP
PJT138KA -GP
SB 20150120 Rock
4
3
1D8V_S5
1 2
R1842
R1842
DY
DY
2K2R2J-L1-GP
R1827
R1827
1 2
0R0402-PAD
0R0402-PAD
SB 20150122 Rock
7 OF 13
7 OF 13
BRTCX1_PAD
BRTCX2_PAD
BVCCRTC_EXTPAD
SRTCRST#
RTC
RTC
COREPWROK
RSMRST#
RTEST#
RSVD_VSS#G18
SUSPWRDNACK
SUS_STAT#
PMU_SUSC LK
PMU_SLP_ S4#
PMU_SLP_ S3#
PMU_PLTR ST#
PMU_BATL OW#
PMU_AC_ PRESENT
PMU_SLP_ S0IX#
PMU_SLP_ LAN#
PMU_W AKE#
PMU_PW RBTN#
PMU_W AKE_LA N#
SVID0_CLK
SVID0_DATA
SVID0_ALERT#
DDI_VGG_SENSE
2K2R2J-L1-GP
XTL_32D 768K_X1 _CPU
M18
XTL_32D 768K_X2 _CPU
K18
BVCCRTC_EXTPAD BVCCRTC_EXTPAD
F16
RTC_RST#
D18
COREPWROK
G16
PM_RSM RST#
F18
RTC_TEST#
J16
RSVD_VSS#G18
G18
SUS_PWRDN_ACK_CPU
AE3
PM_SUS_ STAT#_C PU
D14
PCH_SUSC LK
C15
PM_SLP_S 4#_CPU
C12
PM_SLP_S 3#_CPU
B14
PMC_RS TBTN#
AF2
PLTRST#_ CPU
F14
PMC_BA TLOW#
C14
AC_PRESENT_CPU
C13
APS_SLP_S0IX#
A13
B12
PCIE_W AKE# _CPU
N16
PM_PW RBTN#_C PU
M16
P18
AD42
VIDSOUT _CPU
AD41
AD40
AG32
AJ32
AD29
AF27
AD24
AD22
VSS_VNN_S ENSE
AC27
3D3V_AUX_S5
1D05V_S5_PWRGD 50,51
3V_5V_POK 45,50
Characteristic Symbol Min Typ Max Unit Test Condition
Gate Threshold Voltage VGS(th) 0.49 1.0 V VDS = VGS, ID = 250µ A
20141218 Rock
AF42
AD47
AF40
AD48
AB48
AD45
AF41
EDM_SOC
CLK_PCI_LPC_R
CLK_PCI_TPM_R
RCOMP_LPC_HVT
AF50
AF48
AF44
AF45
AD50
PM_SLP_S 3#_CPU_ D
PM_SLP_S 4#_CPU_ D
M13
P2
R3
T3
P3
M3
M2
N3
N1
T4
T2
H5
H7
P28
P30
PLTRST#_ CPU PLT_RS T#_CPU_G
CPU1G
CPU1G
TCK
TDI
TDO
TMS
TRST#
CX_PRDY#
CX_PREQ#
RSVD#M13
MF_LPC_CLKOUT0
MF_LPC_CLKOUT1
LPC_CLKRUN#
LPC_FRAME#
MF_LPC_AD0
MF_LPC_AD1
MF_LPC_AD2
MF_LPC_AD3
LPC_HVT_RCOMP
ILB_SERIRQ
PWM0
PWM1
RSVD#P28
RSVD#P30
RSVD#AF50
RSVD#AF48
RSVD#AF44
RSVD#AF45
PROCHOT #
BRASWELL-GP
BRASWELL-GP
071.BRASW.000U
071.BRASW.000U
RN1804
RN1804
1
2
3
4 5
SRN10KJ - 1 2 - GP
SRN10KJ-12-GP
JTAG/ITP
JTAG/ITP
Reserved
Reserved
8
7
6
BRASWELL
BRASWELL
PMU_RES ETBUTTON #
LPC
LPC
PMU
PMU
PWM
PWM
SVID
SVID
Voltage sense
Voltage sense
UNCORE_VSS_SENS E2
UNCORE_VSS_SENS E1
PM_SLP_S 3#
PM_SLP_S 4#
CORE_VCC0_SENSE
CORE_VSS0_SENSE
CORE_VCC1_SENSE
CORE_VSS1_SENSE
R1843
R1843
10KR2J-L-GP
10KR2J-L-GP
1 2
PLT_RST# _D PL TRST#
D S
Q1812
Q1812
G
DMN5L06K-7-GP
DMN5L06K-7-GP
84.05067.031
84.05067.031
AC_PRESENT_CPU 24
1
TP1812 TPAD1 4-OP-GP TP1812 TPAD14-OP-GP
R1805 0R0402-PAD R1805 0R0402-PAD
PM_PW RBTN#_C PU 24,86
R1821 0R0402-PAD R1821 0R0402-PAD
Delete RN1805 , change RN1804 (SRN10KJ-6-GP) 20141224 Rock
Q1810
Q1810
2N7002KDW-GP
2N7002KDW-GP
84.2N702.A3F
84.2N702.A3F
2nd = 75.00601.07C
2nd = 75.00601.07C
1
6
D1
D1
6
G2
G2
S2
S2
4 3
PM_SLP_S 3#_CPU
PM_SLP_S 3#_CPU
1D8V_S5
1 2
R1854
R1854
2K2R2J-L1-GP
2K2R2J-L1-GP
DY
DY
2
3 4
PM_SLP_S 3# 24,36,37,48,49,50, 51
Characteristic Symbol Min Typ Max Unit Test Condition
Gate Threshold Voltage VGS(th) 0.49 1.0 V VDS = VGS, ID = 250µ A
20141218 Rock
PM_SLP_S 3#_CPU_ D PM_SLP_S 4#_CPU_ D
5
3
COREPWROK 36,86
PM_RSM RST# 86
R1816
R1816
1 2
10KR2J-L-GP
10KR2J-L-GP
1
1 2
SB 20150122 Rock
1 2
SB 20150122 Rock
VCC_SE NSE 46
VSS_SENS E 46
VCC_VCO RE1_SE NSE 4 6
VSS_VCOR E1_SEN SE 46
VCC_AXG _SENSE 48
VSS_AXG_ SENSE 48
PM_SLP_S 4# 24 ,36,4 9
3D3V_S 0 3D 3V_S 5
1 2
R1864
R1864
1KR2J-L2-GP
1KR2J-L2-GP
D
Q1809
Q1809
2N7002K-2-GP
2N7002K-2-GP
84.2N702.J31
84.2N702.J31
2ND = 84.2N702. 031
2ND = 84.2N702. 031
S
G
11/7
R1828
R1828
1 2
10KR2J-L-GP
10KR2J-L-GP
TP1815 TPAD14-OP-GP TP1815 TPAD14-OP-G P
PLTRST#_ CPU 86
PCIE_W AKE# 24, 30,58
H_CPU_SVIDCLK 46,48
H_CPU_SVIDDAT 46,48
H_SVID_ALERT # 46,48
-1 20150213 Rock
R1810
R1810
1 2
0R0402-PAD
0R0402-PAD
SB 20150122 Rock
PM_SUS_ STAT#_C PU
PCH_SUSC LK
2
PLT_RST# 24,30 ,58,6 5,86, 88
TPM
TPM
D S
SUSCLK
SUSCLK
D S
2
VCC_VCO RE1_SE NSE
VSS_VCOR E1_SEN SE
VCC_SE NSE
VSS_SENS E
VCC_AXG _SENSE
VSS_AXG_ SENSE
-1 20150204 Rock
VSS_VNN_S ENSE
XTL_32D 768K_X1 _CPU
XTL_32D 768K_X2 _CPU
C1806
C1806
SC5P50V2CN-2GP
SC5P50V2CN-2GP
PM_SUS_ STAT#_C PU
PCIE_W AKE# _CPU
AC_PRESENT_CPU
PM_PW RBTN#_C PU
PM_SUS_ STAT#_B
G
Q1813
Q1813
DMN5L06K-7-GP
DMN5L06K-7-GP
84.05067.031
84.05067.031
PM_SUS_ STAT#_A
G
Q1814
Q1814
DMN5L06K-7-GP
DMN5L06K-7-GP
84.05067.031
84.05067.031
XTAL-32 D768KHZ -6-GP
XTAL-32 D768KHZ -6-GP
2nd = 82.30001.661
2nd = 82.30001.661
1 2
1V_CPU_CORE
RN1802
RN1802
1
4
SRN100J-3-GP
SRN100J-3-GP
RN1803
RN1803
4
SRN100J-3-GP
SRN100J-3-GP
RN1806
RN1806
4
SRN100J-3-GP
SRN100J-3-GP
R1823
R1823
10MR2J-L-GP
10MR2J-L-GP
X1802
X1802
82.30001.B21
82.30001.B21
4 1
2 3
2 3
1
2 3
1
R1875 100R2F-L3-GP R1875 100R2F-L3-GP
1 2
1 2
2 3
RN1801
RN1801
8
7
6
1V_CPU_CORE
GFX_CORE
1D05V_S5
C1807
C1807
SC5P50V2CN-2GP
SC5P50V2CN-2GP
1
2
3
4 5
SRN10KJ-12-GP
SRN10KJ-12-GP
PMC_BA TLOW#
H_SVID_ALERT #
PMC_RS TBTN#
PM_RSM RST#
1 2
1D8V_S5
Level shift
SB 20150120 Rock
TPM
TPM
1D8V_S5 3D3V_S5
SRN10KJ-L-GP
SRN10KJ-L-GP
1
4
2 3
RN1805
RN1805
PM_SUS_ STAT# 8 8
SB 20150121 Rock
Only to TPM connector
RN1810
RN1810
2 3
1
SRN10KJ-L-GP
SRN10KJ-L-GP
SUSCLK
SUSCLK
SUS_CLK_CPU 58
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
3D3V_S5 1D8V_S5
4
Only to WLAN connector
CPU (CLK/SPI/SIDEBAND/JTAG)
CPU (CLK/SPI/SIDEBAND/JTAG)
CPU (CLK/SPI/SIDEBAND/JTAG)
LAW_BA
LAW_BA
LAW_BA
Monday, March 16, 2015
Monday, March 16, 2015
Monday, March 16, 2015
1
1D8V_S5
20KR2J-L3-GP
20KR2J-L3-GP
R1839
R1839
1 2
1D05V_S5
R1824
R1824
1 2
200R2F-L1-GP
200R2F-L1-GP
1D8V_S5
R1825
R1825
1 2
2K7R2J-GP
2K7R2J-GP
1 2
C1811
C1811
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
DY
DY
R1861
R1861
1 2
100KR2J-4-GP
100KR2J-4-GP
C1810
C1810
1 2
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsie n 221, Taiwan , R.O.C .
Taipei Hsie n 221, Taiwan , R.O.C .
Taipei Hsie n 221, Taiwan , R.O.C .
18 102
18 102
1
18 102
-1
-1
-1
5
PCIE_TX_LAN_P0 30
LAN
D D
WLAN
PCIE_TX_LAN_N0 30
PCIE_RX_CPU_P0 30
PCIE_RX_CPU_N0 30
PCIE_TX_WLAN_P1 58,86
PCIE_TX_WLAN_N1 58,86
PCIE_RX_CPU_P1 58,86
PCIE_RX_CPU_N1 58,86
C1917 SCD1U16V 2KX-L-GP C1917 SCD1U16V 2KX-L-GP
C1918 SCD1U16V 2KX-L-GP C1918 SCD1U16V 2KX-L-GP
C1915 SCD1U16V 2KX-L-GP C1915 SCD1U16V 2KX-L-GP
C1916 SCD1U16V 2KX-L-GP C1916 SCD1U16V 2KX-L-GP
1 2
12
1 2
1 2
Customer required 20141231 Rock
LAN_CLKREQ_LAN# 30
WLAN_CLKREQ_WLAN# 58,86
LAN_CLK_CPU 30
LAN_CLK_CPU# 30
C C
1D8V_S5
B B
WLAN_CLK_CPU 58, 86
WLAN_CLK_CPU# 58,86
R1930
R1930
402R2F-GP
402R2F-GP
1 2
4
PCIE_TX_CPU_P0
PCIE_TX_CPU_N0
PCIE_TX_CPU_P1
PCIE_TX_CPU_N1
LAN_CLKREQ_LAN#
WLAN_CLKREQ_WLAN#
PEG_CLKREQ2_CPU#
PEG_CLKREQ3_CPU#
PCIE_RCOMP_P_CPU
PCIE_RCOMP_N_CPU
C24
B24
G20
J20
A25
C25
D20
F20
B26
C26
D22
F22
A27
C27
G24
J24
AM10
AM12
AK14
AM14
A21
C21
C19
B20
C18
B18
C17
A17
C16
B16
D26
F26
V14
Y13
Y12
V13
V12
CPU1D
CPU1D
PCIE_TXP0
PCIE_TXN0
PCIE_RXP0
PCIE_RXN0
PCIE_TXP1
PCIE_TXN1
PCIE_RXP1
PCIE_RXN1
PCIE_TXP2
PCIE_TXN2
PCIE_RXP2
PCIE_RXN2
PCIE_TXP3
PCIE_TXN3
PCIE_RXP3
PCIE_RXN3
PCIE_CLKREQ0#
PCIE_CLKREQ1#
PCIE_CLKREQ2#
PCIE_CLKREQ3#
CLK_DIFF_P_0
CLK_DIFF_N_0
CLK_DIFF_P_1
CLK_DIFF_N_1
CLK_DIFF_P_2
CLK_DIFF_N_2
CLK_DIFF_P_3
CLK_DIFF_N_3
CLK_DIFF_P_4
CLK_DIFF_N_4
PCIE_OBSP
PCIE_OBSN
SPI1_CLK
SPI1_CS0#
SPI1_CS1#
SPI1_MISO
SPI1_MOSI
BRASWELL-GP
BRASWELL-GP
PCIe
PCIe
3
4 OF 1 3
4 OF 1 3
BRASWELL
BRASWELL
SATA_TXP0
SATA_TXN0
SATA_RXP0
SATA_RXN0
SATA_TXP1
SATA_TXN1
SATA_RXP1
SATA_RXN1
SATA_LED#
SATA_GP0
SATA
SATA
SATA_GP1
SATA_GP2
SATA_GP3
SATA_OBSP
SATA_OBSN
FST_SPI_CLK
FST_SPI_CS0#
FST_SPI_CS1#
FST_SPI_CS2#
FAST SPI
FAST SPI
SPI
SPI
FST_SPI_D0
FST_SPI_D1
FST_SPI_D2
FST_SPI_D3
MF_HDA_RST#
MF_HDA_SDI1
MF_HDA_CLK
MF_HDA_SDI0
MF_HDA_SYNC
MF_HDA_SDO
MF_HDA_DOCKEN#
MF_HDA_DOCKRST#
AUDIO
AUDIO
GP_SSP_2_CLK
GP_SSP_2_FS
GP_SSP_2_TXD
GP_SSP_2_RXD
SPKR
C31
B30
N28
M28
C29
A29
J28
K28
AH3
AH2
AG3
AG1
AF3
N30
M30
W3
V4
V6
V7
V2
V3
U1
U3
AF13
AD6
AD9
AD7
AF12
AF14
AB9
AB7
H4
AK9
AK10
AK12
AK13
TOUCH_INT 52
TOUCH_RST 52
SATA_OBSP
SATA_OBSN
SPI_CLK_CPU
SPI_CS_CPU_N0
SPI_SI_CPU
HDA_RST#_CPU
HDA_BITCLK_CPU
HDA_SDIN0_CPU
HDA_SYNC_CPU
HDA_SDOUT_CPU
2
SATA_TX_CPU_P0 56
SATA_TX_CPU_N0 56
SATA_RX_CPU_P0 56
SATA_RX_CPU_N0 56
SPI_CLK_CPU
SPI_CS_CPU_N0
SPI_SI_CPU
R1931 402R2F-GP R1931 402R2F-GP
SPI_WP_CPU 25
SPI_HOLD_CPU 25
HDA_SPKR 27
RN1903
RN1903
1
2
3
4 5
SRN10J-1-GP
SRN10J-1-GP
1 2
HDA_SDIN0_CPU 27
HDD
8
7
6
SB 20150121 Rock
SPI_SO_CPU 24,25
1
SPI_CLK_CPU_SW 25
SPI_CS_CPU_SW 25
SPI_SI_ROM 24,25
RN1901
RN1901
1
2
3
4 5
SRN10KJ- 1 2 - GP
SRN10KJ-12-GP
A A
5
PEG_CLKREQ3_CPU#
8
PEG_CLKREQ2_CPU#
7
WLAN_CLKREQ_WLAN#
6
LAN_CLKREQ_LAN#
-1 20150204 Rock
HDA_BITCLK_CPU
HDA_SDOUT_CPU
HDA_RST#_CPU
1 2
C1910
DY
DY
4
C1910
SC22P50V2JN-L-GP
SC22P50V2JN-L-GP
3
HDA_RST#_CPU
HDA_SYNC_CPU
2
SB 20150120 Rock
RN1902
RN1902
1
2
3
4 5
<Variant Name>
<Variant Name>
<Variant Name>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
8
7
6
SRN75J-1-GP
SRN75J-1-GP
CPU (SATA/PCIE/IHDA)
CPU (SATA/PCIE/IHDA)
CPU (SATA/PCIE/IHDA)
Monday, Marc h 16, 2 015
Monday, Marc h 16, 2 015
Monday, Marc h 16, 2 015
HDA_BITCLK_CODEC 27
HDA_SDOUT_CODEC 27
HDA_RST#_CODEC 27
HDA_SYNC_CODEC 2 7
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
LAW_BA
LAW_BA
LAW_BA
19 102
19 102
19 102
1
-1
-1
-1
5
4
3
2
1
SSID = PCH
D D
C C
Blanking
B B
Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A A
Title
Title
Title
(Reserved)
(Reserved)
(Reserved)
LAW_BA
LAW_BA
Monday, March 16, 2015
Monday, March 16, 2015
Monday, March 16, 2015
2
LAW_BA
5
4
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A4
A4
A4
Date: Sheet of
Date: Sheet of
3
Date: Sheet of
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
20 102
20 102
20 102
1
-1
-1
-1
5
4
3
2
1
SSID = CPU
D D
3D3V_S5_PRIME
3D3V_S0
3D3V_S5_PRIME 3D3V_1D8V_VCCPADCF1SI0
C C
1D5V_S0 1D8V_VCCCFIOAZA
1D8V_S5
B B
-1 20150304 Rock
R2113 0R0402-PAD R2113 0R0402-PAD
Imax=141mA (VSDIO 3.3V)
R2114 0R2J-L-GP
R2114 0R2J-L-GP
DY
DY
-1 20150304 Rock
Imax=147.59mA
Imax=16.53mA
0R0402-PAD
0R0402-PAD
3D3V_1D8V_VCCPADCF3SI0
1 2
1 2
R2115 0R0402-PAD R2115 0R0402-PAD
1 2
R2105
R2105
1 2
SB 20150122 Rock
R2106 0R2J-L-GP
R2106 0R2J-L-GP
1 2
DY
DY
SD IO SUPPLY
LPC IO SUPPLY
AUDIO IO SUPPLY
1D8V_S5
1D35V_CPU_VDDQ_S3
3D3V_1D8V_VCCPADCF1SI0
1D8V_VCCCFIOAZA
Imax=550mA
Imax=1.9A (VDDQ)
3D3V_1D8V_VCCPADCF3SI0
1D8V_S5
1D35V_CPU_VDDQ_S3 1D35V_CPU_VDDQ_S3
CPU1I
CPU1I
AN27
DDRSFR_VDDQ_G_S4
AM25
DDR_VDDQ_G_S42
BE1
DDR_VDDQ_G_S416
BE53
DDR_VDDQ_G_S419
BJ2
DDR_VDDQ_G_S426
BJ3
DDR_VDDQ_G_S427
BJ49
DDR_VDDQ_G_S428
BJ5
DDR_VDDQ_G_S429
BH50
DDR_VDDQ_G_S425
BH5
DDR_VDDQ_G_S424
BH49
DDR_VDDQ_G_S423
BH4
DDR_VDDQ_G_S422
BE3
DDR_VDDQ_G_S417
BG51
DDR_VDDQ_G_S421
BG3
DDR_VDDQ_G_S420
BJ51
DDR_VDDQ_G_S430
BJ52
DDR_VDDQ_G_S431
AY10
DDR_VDDQ_G_S414
AY44
DDR_VDDQ_G_S415
AV44
DDR_VDDQ_G_S413
AV10
DDR_VDDQ_G_S410
BE51
DDR_VDDQ_G_S418
AV38
DDR_VDDQ_G_S412
AV16
DDR_VDDQ_G_S411
AU36
DDR_VDDQ_G_S49
AU18
DDR_VDDQ_G_S48
AN36
DDR_VDDQ_G_S47
AN35
DDR_VDDQ_G_S46
AN19
DDR_VDDQ_G_S45
AN18
DDR_VDDQ_G_S44
AM36
DDR_VDDQ_G_S43
AM18
DDR_VDDQ_G_S41
E1
SDIO_V3P3A_V1P8A_G31
E2
SDIO_V3P3A_V1P8A_G32
G1
SDIO_V3P3A_V1P8A_G33
AH4
UNCORE_V1P8A_G32
AF4
UNCORE_V1P8A_G31
Y18
GPIO_V1P8A_G35
AD33
GPIO_V1P8A_G31
AK18
GPIO_V1P8A_G33
AF33
GPIO_V1P8A_G32
AK19
GPIO_V1P8A_G34
BRASWELL-GP
BRASWELL-GP
Removal of 1.24V VR
BRASWELL
BRASWELL
Imax=0.55A (1.24V)
DDR
DDR
PCIE_V1P05A_G31#AC30
20141219 SA
9 OF 13
9 OF 13
DDI_VDDQ_G31
DDI_VDDQ_G32
MIPI_V1P2A_G32
MIPI_V1P2A_G31
ICLK_VSFR_G32
ICLK_VSFR_G31
CORE_VSFR_G35
CORE_VSFR_G36
CORE_VSFR_G3
CORE_VSFR_G34
CORE_VSFR_G32
CORE_VSFR_G33
CORE_VSFR_G31
USBHSIC_V1P2A_G3
USB_VDDQ_G32
USB_VDDQ_G33
USB RTC FUSE
USB RTC FUSE
USB_VDDQ_G31
USBSSIC_V1P2A_G3
USB_V1P8A_G3
USB_V3P3A_G32
USB_V3P3A_G31
RTC_V3P3RTC_G52
RTC_V3P3RTC_G51
RTC_V3P3A_G51
RTC_V3P3A_G52
FUSE_V1P8A_G3
FUSE1_V1P05A_G4
FUSE0_V1P05A_G3
RSVD_VSS#A3
RSVD#K20
RSVD#M20
V36
Y36
T40
P40
Y27
Y25
P38
V30
AC30
AF35
AD35
AD38
AC36
M41
U35
V35
H44
P41
AA29
C23
B22
C5
B6
D4
E3
U16
H10
G10
A3
K20
M20
1D24V_S5
RSVD_VSS#A3
1D24V_S5
1D24V_S5
1D8V_S5
RTC_AUX_S5
1D8V_S5
1D24V_S5
1D24V_S5
1D24V_S5
3D3V_S5_PRIME
1D05V_S5
1
MIPI_V1P2 A
DY
DY
USBHSIC_V1P2A
3D3V_S5_PRIME
Imax=200mA (3.3V_PRIME)
TP2101 TPAD14-OP-GP TP2101 TPAD14-OP- GP
1 2
R2102
R2102
0R2J-2-GP
0R2J-2-GP
DY
DY
1 2
0R2J-L-GP
0R2J-L-GP
1 2
R2103
R2103
0R2J-2-GP
0R2J-2-GP
R2101
R2101
1D24V_S5
1 2
0R2J-L-GP
0R2J-L-GP
R2104
R2104
1D24V_S5
Wistron Confidential document, Anyone can not
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Wistron Corporation
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21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Tai wan, R.O.C.
Taipei Hsien 221, Tai wan, R.O.C.
Taipei Hsien 221, Tai wan, R.O.C.
Title
Title
Title
CPU (POWER1)
CPU (POWER1)
CPU (POWER1)
Size Docum ent Number Rev
Size Docum ent Number Rev
Size Docum ent Number Rev
Custom
Custom
Custom
Monday, March 16, 2 015
Monday, March 16, 2 015
Monday, March 16, 2 015
Date: Sheet of
Date: Sheet of
Date: Sheet of
LAW_BA
LAW_BA
LAW_BA
21 102
21 102
21 102
1
-1
-1
-1
5
D D
C C
4
3
2
1
Blanking
B B
Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A A
Title
Title
Title
(Reserved)
(Reserved)
(Reserved)
LAW_BA
LAW_BA
Monday, March 16, 2015
Monday, March 16, 2015
Monday, March 16, 2015
2
LAW_BA
5
4
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A4
A4
A4
Date: Sheet of
Date: Sheet of
3
Date: Sheet of
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
22 102
22 102
22 102
1
-1
-1
-1
5
D D
C C
4
3
2
1
Blanking
B B
Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A A
Title
Title
Title
(Reserved)
(Reserved)
(Reserved)
LAW_BA
LAW_BA
Monday, March 16, 2015
Monday, March 16, 2015
Monday, March 16, 2015
2
LAW_BA
5
4
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A4
A4
A4
Date: Sheet of
Date: Sheet of
3
Date: Sheet of
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
23 102
23 102
23 102
1
-1
-1
-1
12 34
RN2401
RN2401
2 3
1
SRN2K2J-5-GP
SRN2K2J-5-GP
1 2
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
DY
DY
RN2406
RN2406
1
2
3
4 5
SRN10KJ- 1 2 - GP
SRN10KJ-12-GP
RN2405
RN2405
8
7
6
SRN10KJ- 1 2 - GP
SRN10KJ-12-GP
SB 20150120 Rock
5
3D3V_KBC_AVC C
12
DY
DY
BAT_SCL
BAT_SDA
8
7
6
4
AD_IA
1D8V_S0 1D8V_S5 1D05V_S5
12
C2428
C2428
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
GPIO73
GPIO74
BATTERY / CHARGER ------>
H_A20GATE
TOUCH_DET#
H_RCIN#
AD_OFF
Delete R2420,R2437,R2469 ,add RN2406 (SRN10KJ-6-GP)
20141223 Rock
Remove GPIO of GSensor ,change to SoC SUS GPIO11 20150115 Rock
S5_ENABLE
LID_CLOSE#
LAN_DIS#
LAN_PCIE_WAK E#
3D3V_S0
3D3V_S5
3D3V_AUX_S5
R2410
R2410
0R0402-PAD
0R0402-PAD
0611_-1
12
C2421
C2421
C2439
C2439
SC1KP50V2KX-L-1-GP
SC1KP50V2KX-L-1-GP
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
EC_AGND
12
C2440
C2440
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
ME_UNLOCK# 16
RN2408
RN2408
1
8
2
7
3
6
4 5
SRN10KJ- 1 2 - GP
SRN10KJ-12-GP
3D3V_AUX_S5
1 2
12
C2422
C2422
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
Add EC VTT circuit 20141205 Rock
R2413
R2413
1 2
DY
DY
0R2J-L-GP
0R2J-L-GP
12
E51_TxD 58
EC_SMI# 15,16
ECRST#
GPIO23
FAN_TACH1
FUN_OFF#
SB 20150120 Rock
SSID = KBC
3D3V_AUX_S5
RN2402
RN2402
SRN4K7J-8-GP
3D3V_S0
3D3V_S5
SRN4K7J-8-GP
C2418
C2418
D D
C C
3D3V_AUX_S5
3D3V_S5
1
2
3
4 5
4
12
12
12
C2423
C2423
C2424
C2424
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
DY
DY
EC_VTT
1 2
DY
R2411
R2411
C2441 SCD1U16V2KX-L-GPDYC2441 SCD1U16V2KX-L-GP
0R0402-PAD
0R0402-PAD
SB 20150122 Rock
WLAN_PERST# 58
TOUCH_EN 52
PTP_PWR_EN# 62
BAT_SCL 43, 44
BAT_SDA 43,44
TOUCH_DET# 52
LAN_DIS# 30
PROCHOT_EC 44
CHG_ON# 44
eDP_BLEN_CPU 8
BLUETOOTH_EN 58
Remove no ROM SW circuit 20141216 Rock
ALL_SYS_PWRGD 36
PM_CLKRUN#_EC 18,88
12
12
C2425
C2425
C2427
C2427
C2426
C2426
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
DY
DY
1D8V_S5
3D3V_KBC_AVC C
1D8V_S0
EC_VTT
AD_IA 44
PCB_VER_AD
ADT_TYPE_AD
MODEL_ID_AD
VD_IN1
1 2
GPIO73
GPIO74
GPIO23
0R2J-L-GP
0R2J-L-GP
AC_PRESENT
SOC_WAKE_SCI#_KBC
PM_PWRBTN#
H_A20GATE
ECSMI#_KBC
VD_IN2 26
EC_TPCLK 62
EC_TPDATA 62
RTCRST_ON 18
FUN_OFF# 62,86
BLON_OUT 52
FAN_TACH1 26,86
PCIE_WAKE# 18,30,58
PM_SLP_S3# 18,36,37,48,49,50,51
CHARGE_LED 61
KBC_BEEP 27
DC_BATFULL 61
STDBY_LED 61
PWRLED 61
FAN1_PWM 26,86
VD_IN1 26
VD_OUT1 26
R2471
R2471
DY
DY
AMP_MUTE# 27
U2404
U2404
19
VCC
46
VCC
76
VCC
115
VCC
88
VCC1D8
!!Notice:
!!Notice:
102
AVCC
4
VDD1D8
12
VTT
97
GPIO90/AD0
98
GPIO91/AD1
99
GPIO92/AD2
100
GPIO93/AD3
108
GPIO5/AD4
96
GPIO4/AD5
95
GPIO3/EXT_PURST#/ AD6
94
GPIO7/AD7/VD_IN2
101
GPIO94/DA0
105
GPIO95/DA1
106
GPIO96/DA2
107
GPIO97/DA3
70
GPIO17/SCL1/N2TCK
69
GPIO22/SDA1/N2TMS
67
GPIO73/SCL2/N2TCK
68
GPIO74/SDA2/N2TMS
119
GPIO23/SCL3/N2TCK
120
GPIO31/SDA3/N2TMS
24
GPIO47/SCL4/N2TCK
28
GPIO53/SDA4/N2TMS
26
GPIO51/TA3/N2TCK
123
GPIO67/N2TMS
72
GPIO37/PSCLK1
71
GPIO35/PSDAT1
10
GPIO26/PSCLK2
11
GPIO27/PSDAT2
25
GPIO50/PSCLK3/TDO
27
GPIO52/PSDAT3/RDY#
31
GPIO56/TA1
117
GPIO20/TA2/IOX_DIN_DIO
63
GPIO14/TB1
64
GPIO1/TB2
32
GPIO15/A_PWM
118
GPIO21/B_PWM
62
GPIO13/C_PWM
65
GPIO32/D_PWM
22
GPIO45/E_PWM
16
GPIO40/F_PWM/1_WIRE
81
GPIO66/G_PWM
66
GPO33/H_PWM/VD1_EN#
104
GPIO80/VD_IN1
110
GPIO82/IOX_LDSH/VD_OUT1
112
GPIO84/IOX_SCLK/VD_OUT2
84
GPIO77/SPI_MISO
83
GPIO76/SPI_MOSI
82
GPIO75/SPI_SCK
79
GPIO2/SPI_CS#
124
GPIO10/LPCPD#
121
GPIO85/GA20
111
GPIO83/SOUT_CR
9
GPIO65/SMI#
8
GPIO11/CLKRUN#
30
GPIO55/CLKOUT/IOX_DIN_DI O
NPCE985PB1DX-GP-U
NPCE985PB1DX-GP-U
KBSIN0/GPIOA0/N2TCK
KBSIN1/GPIOA1/N2TMS
VCC1D8
VCC1D8
KBSOUT0/GPOB0/SOUT_CR/JENK#
KBSOUT1/GPIOB1/TCK
KBSOUT2/GPIOB2/TMS
KBSOUT3/GPIOB3/TDI
KBSOUT4/GPOB4/JEN0#
KBSOUT5/GPIOB5/TDO
KBSOUT6/GPIOB6/RDY#
KBSOUT9/GPOC1/SDP_VIS#
KBSOUT10/P80_CLK/GPIOC2
KBSOUT11/P80_DAT/GPIOC3
KBSOUT12/GPO64/TEST#
KBSOUT13/GPIO63/TRIST#
KBSOUT14/GPIO62/XORTR#
KBSOUT15/GPIO61/XOR_OUT
PSL_IN2#/GPI6/EXT_PURST#
GPIO46/CIRRXM/TRST #
GPIO87/CIRRXM/SIN_CR
3
KBSIN2/GPIOA2
KBSIN3/GPIOA3
KBSIN4/GPIOA4
KBSIN5/GPIOA5
KBSIN6/GPIOA6
KBSIN7/GPIOA7
KBSOUT7/GPIOB7
KBSOUT8/GPIOC0
GPIO60/KBSOUT16
GPIO57/KBSOUT17
LAD0/GPIOF1
LAD1/GPIOF2
LAD2/GPIOF3
LAD3/GPIOF4
LCLK/GPIOF5
LFRAME#/GPIOF6
LRESET#/GPIOF7
F_CS0#
F_SCK
GPIO30/F_WP#
GPIO41/F_WP#
F_SDO
GPIO81/F_WP#
GPIO0/EXTCLK
PSL_IN1#/GPI70
PSL_OUT#/GPIO71
ECSCI#/GPIO54
EXT_RST#
KBRST#/GPIO86
VBKUP
VCORF
SERIRQ/GPIOF0
GPIO24
GPIO36/TB3
GPIO44/TDI
GPIO43/TMS
GPIO42/TCK
GPIO34/CIRRXL
AGND
2
KROW0
54
KROW1
55
KROW2
56
KROW3
57
KROW4
58
KROW5
59
KROW6
60
KROW7
61
KCOL0
53
KCOL1
52
KCOL2
51
KCOL3
50
KCOL4
49
KCOL5
48
KCOL6
47
KCOL7
43
KCOL8
42
KCOL9
41
KCOL10
40
KCOL11
39
KCOL12
38
KCOL13
37
KCOL14
36
KCOL15
35
34
33
126
127
128
1
2
3
7
SPI_CS_KBC_N0
90
SPI_CLK_KBC
92
109
80
SPI_SO_KBC
87
SPI_SI_KBC
86
F_SDI
91
77
73
93
74
SOC_RUNTIME_SCI#
29
ECRST#
85
H_RCIN#
122
75
VSBY
114
KBC_VCORF
44
13
PECI
125
6
15
21
20
17
23
113
14
5
GND
18
GND
45
GND
78
GND
89
GND
116
GND
103
KBC_PWRBTN#_R
EC_AGND
R2412 33R2J-L1-GP R2412 33R2J-L1-GP
1 2
R2407 33R2J-L1-GP R2407 33R2J-L1-GP
1 2
R2402 33R2J-L1-GP R2402 33R2J-L1-GP
1 2
R2405 0R0402-PAD R2405 0R0402-PAD
1 2
R2403
R2403
0R0402-PAD
0R0402-PAD
SB 20150122 Rock
SOC_WAKE_SCI#_KBC
LPC_AD_CPU_P 0 18,65,88
LPC_AD_CPU_P 1 18,65,88
LPC_AD_CPU_P 2 18,65,88
LPC_AD_CPU_P 3 18,65,88
CLK_PCI_KBC 18,86
LPC_FRAME#_CPU 18,65,88
PLT_RST# 18,30,58,65,86,88
0611_-1
SYS_PWROK 36
USB_PWR_EN# 34
AC_IN# 44
KBC_PWRBTN#_R 86
3D3V_AUX_S5 RTC_AUX_S5
INT_SERIRQ 18,88
AD_OFF 42
LAN_PCIE_WAK E# 30
PM_SLP_S4# 18,36,49
RSMRST#_KBC 18,25,86
LID_CLOSE# 68
E51_RxD 58
S5_ENABLE 36,86 WIFI_RF_EN 58
1 2
KROW[0..7] 62,86
KCOL[0..15] 62,86
12
C2431
C2431
SC2D2U10V2KX-GP
SC2D2U10V2KX-GP
R2477
R2477
1 2
0R0402-PAD
0R0402-PAD
SPI_CS_EC_SW 25
SPI_CLK_EC_SW 25
WLAN_PCIE_WAKE # 58,86
BAT_IN# 43
SPI_SI_ROM 19,25
SPI_SO_CPU 19,25 EC_TP_IN# 62
SOC_RUNTIME_SCI# 15,16
-1 20150225 Rock
3D3V_S5
PM_CLKRUN#_EC
3D3V_AUX_S5
SOC_WAKE_SCI# 15,16
DY
DY
R2473
R2473
10KR2J-L-GP
10KR2J-L-GP
PM_PWRBTN#
SB 20150120 Rock
RN2407
RN2407
1
8
2
7
3
6
4 5
SRN100KJ - L - G P
SRN100KJ-L-GP
R2470
R2470
0R0402-PAD
0R0402-PAD
BAT_IN#
CHG_ON#
USB_PWR_EN#
SYS_PWROK
CLK_PCI_KBC
3D3V_S0
1 2
1 2
PM_PWRBTN#_CPU 18,86
12
C2436
C2436
SC22P50V2JN-L-GP
SC22P50V2JN-L-GP
DY
DY
1
EC HW Strap
R2429
? 10K for GPIO table,but before is 330K
3D3V_AUX_S5
B B
KBC_PWRBTN# 61, 86
AC_PRESENT
1 2
2 1
R2401
R2401
330KR2J-L-GP
330KR2J-L-GP
G2401
G2401
GAP-OPEN
GAP-OPEN
R2404
R2404
470R2J-2-GP
470R2J-2-GP
R2468
R2468
1 2
0R0402-PAD
0R0402-PAD
1 2
KBC_PWRBTN#_R
AC_PRESENT_CPU 18
BLUETOOTH_EN
R2429
4K7R2J-L-GP
4K7R2J-L-GP
1 2
MODEL_ID_AD
12
C2420
C2420
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
DY
DY
3D3V_AUX_S5
1 2
MODEL_ID_AD
MODEL_ID_AD
1 2
R2436
R2436
100KR2F-L3-GP
100KR2F-L3-GP
EC_AGND
R2431
R2431
47KR2F-GP
47KR2F-GP
PURE_HW_SHUTDOWN# 26,36
150129
LAW_BA HDD setting
RN2404
RN2404
2 3
1
SRN10KJ-L-GP
SRN10KJ-L-GP
3D3V_AUX_S5
ECRST#
Q2401
Q2401
MMB T 3906-4-GP
MMBT3906-4-GP
E
84.T3906.A11
ECRST#_Q
4
3D3V_AUX_S5
84.T3906.A11
B
2nd = 84.M3906.B11
2nd = 84.M3906.B11
C
12
C2415
C2415
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
ADT_TYPE_AD
EC_AGND
1 2
R2425
R2425
100KR2F-L3-GP
100KR2F-L3-GP
1 2
R2430
R2430
20KR2F-L3-GP
20KR2F-L3-GP
150129
40W setting
PCB_VER_AD
3D3V_AUX_S5
1 2
1 2
EC_AGND
R2424
R2424
47KR2F-GP
47KR2F-GP
R2426
R2426
100KR2F-L3-GP
100KR2F-L3-GP
150129
-1 setting
PCB_VER_AD
PCB_VER_AD
A A
Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd. , Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd. , Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd. , Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
5
4
3
Title
Title
Title
KBC_NPCE985
KBC_NPCE985
KBC_NPCE985
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Monday, March 16, 2015
Monday, March 16, 2015
Monday, March 16, 2015
Date: Sheet of
Date: Sheet of
Date: Sheet of
2
LAW_BA
LAW_BA
LAW_BA
1
Taipei Hsien 221, Taiwan, R.O.C.
24 102
24 102
24 102
-1
-1
-1
5
4
3
2
1
SSID = Flash.ROM
D D
SPI_HOLD_CPU 19
C C
R2511 0R2J-L-GP R2511 0R2J-L-GP
SB 20150129 Rock
SPI_SI_ROM 19,24
1 2
1D8V_S5
SPI_SI_ROM
SPI_CLK_ROM
SPI_HOLD_ROM
SPI FLASH ROM (8M byte) for PCH
SPI_CS_ROM_N0
SPI_HOLD_ROM
SPI_WP_ROM
R2509 4K7R2J-L-GP R2509 4K7R2J-L-GP
1 2
RN2501
RN2501
2 3
1
4
SRN4K7J-8-GP
SRN4K7J-8-GP
U2502
U2502
5
SI
6
SCLK
7
IO3
8
VCC
GD25LB64CSIGR-GP
GD25LB64CSIGR-GP
VSS
CS#
4
3
IO2
2
SO
1
1D8V_S5
SB 20150129 Rock
SPI_WP_ROM
SPI_SO_ROM
SPI_CS_ROM_N0
SB 20150121 Rock
SB 20150129 Rock
R2510 0R2J-L-GP R2510 0R2J-L-GP
12
R2506 22R2J-L1-GP R2506 22R2J-L1-GP
1 2
SPI_WP_CPU 19
SPI_SO_CPU 19,24
1D8V_S5
3D3V_S5 3D3V_S5
1 2
C2506
C2506
SC10U 6D3V5KX-L-1-GP
SC10U6D3V5KX-L-1-GP
DY
DY
1 2
C2503
C2503
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
SPI_CS_EC_SW 24
SPI_CLK_EC_SW 24
SPI_CS_CPU_SW 19
SPI_CLK_CPU_SW 19
Remove no ROM SW circuit 20141216 Rock
0R0402-PAD
0R0402-PAD
R2512
R2512
3D3V_S5_R OE#
SPI_CS_ROM_N0
SPI_CLK_ROM
1st = 073.03950.0003
1st = 073.03950.0003
1 2
R2513 change to 0R 20150119 Rock
U2503
U2503
10
VCC
8
D+
7
D-
1
1D+
2
1D-
3
2D+
4
2D-
NCT3956Y-GP
NCT3956Y-GP
11/26
OE#
GND
GND
1 2
R2514
R2514
100KR2J-4-GP
100KR2J-4-GP
DY
DY
R2513
6
9
S
5
11
R2513
1 2
0R0402-PAD
0R0402-PAD
RSMRST#_KBC 18,24,86
1st : 072.02564.0A01 GIGADEVICE/ GD25LB64CSIGR
2nd: 072.25647.0001 MXIC
3rd: 072.25Q64.0E01 Winbond
SSID = RBAT
Width=20mils
RTC_AUX_S5
B B
C2505
C2505
SC1U6D3V3KX-L1-GP
SC1U6D3V3KX-L1-GP
1 2
Q2501
Q2501
3
CH715FPT-GP
CH715FPT-GP
83.R0304.B81
83.R0304.B81
2nd = 83.00040.E81
2nd = 83.00040.E81
-1 20150206 Rock
R2517
RTC_PWR
1
2
R2517
1 2
1KR2J-L2-GP
1KR2J-L2-GP
3D3V_AUX_S5
3D3V_RTC_VCC
RTC1
RTC1
1
PWR
2
GND
NP1
NP1
NP2
NP2
BAT-060003HA002M213ZL-GP-U1
BAT-060003HA002M213ZL-GP-U1
62.70014.001
62.70014.001
2nd = 62.70001.061
2nd = 62.70001.061
3rd = 20.F2316.002
3rd = 20.F2316.002
R2507
R2507
10MR2J-L-GP
10MR2J-L-GP
1 2
RTC_PWR
3D3V_S5
1 2
R2508
R2508
10KR2J-L-GP
10KR2J-L-GP
D
G
Q2502
Q2502
2N7002K-2-GP
2N7002K-2-GP
84.2N702.J31
84.2N702.J31
2ND = 84.2N702.031
2ND = 84.2N702.031
S
RTC_DET# 8
Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
A A
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
Flash(KBC+PCH)/RTC
Flash(KBC+PCH)/RTC
Flash(KBC+PCH)/RTC
LAW_BA
LAW_BA
Monday, March 16, 2015
Monday, March 16, 2015
Monday, March 16, 2015
LAW_BA
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
25 102
25 102
25 102
1
-1
-1
-1
5
SSID = Thermal
4
3
*Layout* 15 mil
5V_S0
2
1
D D
C C
B B
3D3V_AUX_S5
1 2
R2611
R2611
16KR2F-GP
16KR2F-GP
1 2
RT2601
RT2601
NTC-100K-11-GP-U
NTC-100K-11-GP-U
T8
PT2601 close CPU and Vcore chock
3D3V_AUX_S5
1 2
R2612
R2612
16KR2F-GP
16KR2F-GP
RT DY
RT DY
1 2
RT2602
RT2602
NTC-100K-11-GP-U
NTC-100K-11-GP-U
RT DY
RT DY
1 2
C2607
C2607
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
1 2
C2610
C2610
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
RT DY
RT DY
1 2
C2608
C2608
SC100P50V2JN-L-GP
SC100P50V2JN-L-GP
1 2
C2609
C2609
SC100P50V2JN-L-GP
SC100P50V2JN-L-GP
RT DY
RT DY
PT2602 close CPU and memory
VD_IN1 24
VD_IN2 24
FAN_TACH1 24,86
Q2603
Q2603
PURE_HW_SHUTDOW N# 24,36
1 2
R2608
R2608
10KR2J-L-GP
10KR2J-L-GP
DY
DY
1 2
C2606
C2606
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
DY
DY
D
2N7002K-2-GP
2N7002K-2-GP
84.2N702.J31
84.2N702.J31
2ND = 84.2N702.031
2ND = 84.2N702.031
3rd = 84.2N702.W31
3rd = 84.2N702.W31
change material 20141230 Rock
K A
D2601
D2601
RB551V30-1-GP
RB551V30-1-GP
083.55130.008F
083.55130.008F
2ND = 83.R5003.H8H
2ND = 83.R5003.H8H
FAN1_PWM 24,86
D2602
D2602
RB551V30-1-GP
RB551V30-1-GP
K A
083.55130.008F
083.55130.008F
2ND = 83.R5003.H8H
2ND = 83.R5003.H8H
THERM_SYS_SHDN#_R
S
G
IMVP _PWR GD_G
5V_S0
FAN_TACH1_C
FAN_TACH1_C
3D3V_S0
1 2
C2603
C2603
SC4D7U25V5KX-L2-GP
SC4D7U25V5KX-L2-GP
ACES-CON4-29-GP
ACES-CON4-29-GP
1 2
R2606
R2606
2KR2F-L1-GP
2KR2F-L1-GP
R2607
R2607
1 2
0R0402-PAD
0R0402-PAD
DY
DY
R2609
R2609
0R2J-L-GP
0R2J-L-GP
1 2
1 2
0R0402-PAD
0R0402-PAD
1 2
C2602
C2602
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
DY
DY
C2602 DY 20150119 Rock
FAN1
FAN1
5
1
2
3
4
6
20.F0772.004
20.F0772.004
2nd = 20.F1804.004
2nd = 20.F1804.004
R2610
R2610
3D3V_S0
IMVP _PWR GD 36 ,46,49 ,86
VD_OUT1 24
Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
A A
Title
Title
Title
Thermal 7718/Fan Controllor P2793
Thermal 7718/Fan Controllor P2793
Thermal 7718/Fan Controllor P2793
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Monday, March 16, 2015
Monday, March 16, 2015
Monday, March 16, 2015
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
LAW_BA
LAW_BA
LAW_BA
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
26 102
26 102
26 102
1
-1
-1
-1