Acer ASPIRE EK-571G Schematic

A
B
C
D
E
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Compal Confidential
Model Name : A5WAH/A5WAB
1 1
File Name : LA-B991P
Compal Confidential
2 2
EA50_HB M/B Schematics Document
Intel Broadwell ULT (Broadwell + Wildcat point)
3 3
2014-08-27
REV:1.0
4 4
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2013/10/01 2014/05/24
2013/10/01 2014/05/24
2013/10/01 2014/05/24
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Re v
Size Document Number Re v
Size Document Number Re v
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
D
Date: Sheet of
Compal Electronics, Inc.
Cover Page
Cover Page
Cover Page
A5WAH M/B LA-B991P
A5WAH M/B LA-B991P
A5WAH M/B LA-B991P
E
1.0
1.0
1 54Friday, October 17, 2014
1 54Friday, October 17, 2014
1 54Friday, October 17, 2014
1.0
VGA
A
eDP
LVDS-Translator
LVDS
RTD2132R
B
C
D
www.laptopblue.vn
page 24
Fan Control
page 36
E
page 28
1 1
DP to VGA ITE IT6513FN
page 27
DP x 2 lanes
page 25
HDMI Conn.
page 26
HDMI x 4 lanes
Nvidia N15x
eDP
DDI
Intel Broadwell ULT
Broadwell ULT
Processor
OPI
Memory BUS
Dual Channel
1.35V DDR3L 1333/1600
USB 3.0 conn x1
USB port 0
USB 2.0 conn x2
(port 1,2)
USB/B
204pin DDR3L-SO-DIMM X1
BANK 0, 1, 2, 3
page 15
204pin DDR3L-SO-DIMM X1
BANK 4, 5, 6, 7
page 16
CMOS Camera
USB port 7
with DDR3 x4 or 8
MINI Card
WLAN
USB port 4
2 2
page 31
PCIe 2.0 5GT/s
port 4
PCIe 2.0 5GT/s
port 3
LAN(GbE)/ Card Reader
Realtek 8411B
page 29
page 17~23
PCIe 2.0 x4 5GT/s
port 5
SATA3.0 SATA3.0
port 0
SATA HDD Conn.
Flexible IO
6.0 Gb/s6.0 Gb/s
port 1
SATA CDROM Conn.
Wildcat point
PCH
1168pin BGA
page 04~14
USBx8
HD Audio
SPI
48MHz
page 33 page 25
3.3V 24MHz
page 33
HDA Codec
ALC283
page 36
Finger Print
USB
(port 5)
page 33
Touch Screen
I2C (PORT1)
USB (port 6)
page 25
Card Reader
3 3
2 in 1 (SD)
page 30
RTC CKT.
Power On/Off CKT.
4 4
DC/DC Interface CKT.
Power Circuit DC/DC
RJ45 conn.
page 30
page 6
page 35
page 38
page 39~50
A
page 32
Sub Board
LS-B161P
PWR/B
page 33
LS-B162P
USB/B
(port 1,2)
page 33
LS-B163P
BATT/B (UMA)
page 32
B
LPC BUS
CLK=24MHz
ENE KB9012/9022
Touch Pad Int.KBD
PS2 / I2C
page 35
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
page 34
C
page 35
2013/10/01 2014/05/24
2013/10/01 2014/05/24
2013/10/01 2014/05/24
SPI ROM x2
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
page 7
Int. Speaker Combo Jack
page 36
D
Int. MIC
page 36 page 36
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Re v
Size Document Number Re v
Size Document Number Re v
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Block Diagrams
Block Diagrams
Block Diagrams
A5WAH M/B LA-B991P
A5WAH M/B LA-B991P
A5WAH M/B LA-B991P
E
1.0
1.0
1.0
2 54Friday, October 17, 2014
2 54Friday, October 17, 2014
2 54Friday, October 17, 2014
A
Voltage Rails
Power Plane Description
VIN
BATT+ B+ +CPU_CORE
+VGA_CORE
1 1
+0.675VS +0.675VS power rail for DDR3L terminator +1.05VS_VTT
+1.05VSDGPU +1.05VSDGPU switched power rail for GPU
+1.35V
+1.5VSDGPU +1.5VSDGPU power rail for GPU
+1.5VS +3VALW +3VALW always on power rail +3VLP B+ to +3VLP power rail for suspend power +3VS
+3VSDGPU
+5VALW +5VS +5VALW to +5VS power rail
+RTCVCC
2 2
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
Adapter power supply (19V)
Battery power supply (12.6V) AC or battery power rail for power circuit. Core voltage for CPU
Core voltage for GPU
+1.05V power rail for CPU
+1.35V power rail for DDR3L
+1.5V power rail for CPU
+3VALW to +3VS power rail
+3VS to +3VSDGPU power rail for GPU
+5VALWP to +5VALW power rail
RTC power
B
www.laptopblue.vn
S1 S3 S5
N/A N/A N/A N/A N/A N/A
ON ON ON ON ON ON ON ON ON ON ON ON ON ON ON
N/AN/AN/A
OFFOFF
OFF
OFF OFF OFF OFF OFF OFF OFF
OFF OFF OFF OFF OFF
ON
ON*
ON
OFF
OFF
OFFOFF
ON
ON*
OFFONOFF
ONONON
C
STATE
Full ON
S1(Power On Suspend)
S3 (Suspend to RAM)
S4 (Suspend to Disk)
S5 (Soft OFF)
SIGNAL
SLP_S1# SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock
HIGH HIGH HIGH HIGH
LOW
LOW
LOW
LOW LOW LOW LOW
D
HIGH
LOWLOWLOW
Board ID / SKU ID Table for AD channel
Vcc 3.3V +/- 5%
Board ID
0 1 2 3 4 5 6 7 56K +/- 5% 8 9 10 11 12 13
100K +/- 5%Ra/Rc/Re
Rb / Rd / Rf V min
0 12K +/- 5% 15K +/- 5% 20K +/- 5% 27K +/- 5% 33K +/- 5% 43K +/- 5%
AD_B ID
0 V
0.347 V 0.354 V 0.360 V
0.423 V
0.541 V
0.691 V
0.807 V 0.819 V 0.831 V
0.978 V
1.169 V 75K +/- 5% 100K +/- 5% 130K +/- 5% 160K +/- 5% 200K +/- 5% 240K +/- 5%
1.398 V
1.634 V
1.849 V 1.865 V 1.881 V
2.015 V 2.031 V 2.046 V
2.185 V 2.200 V 2.215 V
2.316 V 2.329 V 2.343 V
HIGHHIGHHIGH
HIGH
HIGH
V typ
AD_B ID
0.430 V
0.550 V
0.702 V 0.713 V
0.992 V
1.185 V
1.414 V 1.430 V
1.650 V 1.667 V
ON
ONONON ON
ON
ON
ON
ON
ON
OFF
OFF
V
AD_B ID
ON
OFF
OFF
OFF
max
0 V 0 V
0.438 V
0.559 V
1.006 V
1.200 V
E
LOW
OFF
OFF
OFF
EC SM Bus1 address
Device
Smart Battery
Address Address
0x16
PCH SM Bus address
Device
ChannelA DIMM 0
3 3
DIMM 1ChannelB JDIMM2
Address
1010 0000 1010 0010
JDIMM1
EC SM Bus2 address
Device
On Board Thermal Senser VGA Internal Thermal Senser
0x96
0x9E
USB Port Table
USB 2.0 Port
EHCI1
PortUSB 3.0
XHCI
0
USB Port(Left 3.0)
1
USB Port(Right 2.0)
2
USB Port(Right 2.0)
3 4
Mini Card (WLAN+BT)
5
Touch Screen
6
Camera
7
Finger Print
0
USB Port(Left 3.0)
1 2 3
3 External USB Port
BTO Option Table
BTO Item BOM Structure
Unpop @
EC 9022 9022@ EC 9012 9012@ UMA Component
GPU
On Board HDD EDP panel EDP@ eDP to LVDS LVDS@
EMC Reserve XEMC@ TPM Module TPM@ G-Sensor BA@ Redriver HDD
CONN@Connector
UMA@
VGA@
HDD@
EMC@EMC Component
BA@
Touch Screen TS@
BOARD ID Table
Board ID
0 1 2 3
PCB Revision
0.1
0.2
0.3
1.0
DGPU_IDEN CPU_IDEN GC6 2.0 non GC6 One DMIC Two DMIC
X76@VRAM Selection
VGL@, VGM@, SGT@
HW@, BW@ GC6@ NGC6@ EA50@
2MIC@
4 5
4 4
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
6 7
Compal Secret Data
Compal Secret Data
2013/10/01 2014/05/24
2013/10/01 2014/05/24
2013/10/01 2014/05/24
C
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
D
Title
Title
Title
Size Document Number Re v
Size Document Number Re v
Size Document Number Re v
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Notes List
Notes List
Notes List
A5WAH M/B LA-B991P
A5WAH M/B LA-B991P
A5WAH M/B LA-B991P
E
1.0
1.0
3 54Friday, October 17, 2014
3 54Friday, October 17, 2014
3 54Friday, October 17, 2014
1.0
5
DDR3 Compensat i on Si gnal s
4
3
2
1
www.laptopblue.vn
U1A
D D
DP to CRT
HDMI
C C
+1.35V
12
R184 470_0603_5%
2
C96
6.8P_0402_50V8C
1
XEMC@
B B
U1
Close to AV15
PVT2 ,Replace i3-4030 to i3-4020
U1
DIMM_DRAMRST# <15,16>
Trace width=12~15 mil, Spcing=20 mils Max trace length= 500 m il
U1
+1.05VS_VTT
H_PROCHOT#<36,41>
A5WAH PVT: ESD request add
U1
CPU_DP1_N0<29> CPU_DP1_P0<29> CPU_DP1_N1<29> CPU_DP1_P1<29>
CPU_DP2_N0<28> CPU_DP2_P0<28> CPU_DP2_N1<28> CPU_DP2_P1<28> CPU_DP2_N2<28> CPU_DP2_P2<28> CPU_DP2_N3<28> CPU_DP2_P3<28>
C94 6.8P_0402_50V8C
1 2
XEMC@
H_PECI<36>
C95 6.8P_0402_50V8C
EMC@
R6 10K_0402_5% C60 6.8P_0402_50V8C
EMC@
R11 200_0402_1% R13 120_0402_1% R41 100_0402_1%
R68
12
62_0402_5%
1 2
1 2
1 2
1 2 1 2 1 2
DDR_PG_CTRL<15>
R8 56_0402_5%
1 2
T20 @ T2 @
SM_RCOMP0 SM_RCOMP1 SM_RCOMP2 DIMM_DRAMRST# DDR_PG_CTRL
H_PROCHOT#_R
H_CPUPWRGD
C54
DDI1_TXN0
C55
DDI1_TXP0
B58
DDI1_TXN1
C58
DDI1_TXP1
B55
DDI1_TXN2
A55
DDI1_TXP2
A57
DDI1_TXN3
B57
DDI1_TXP3
C51
DDI2_TXN0
C50
DDI2_TXP0
C53
DDI2_TXN1
B54
DDI2_TXP1
C49
DDI2_TXN2
B50
DDI2_TXP2
A53
DDI2_TXN3
B53
DDI2_TXP3
HASWELL-MCP-E-ULT_BGA1168
@
U1B
D61
PROC_DETECT
K61
CATERR
N62
PECI
K63
PROCHOT
C61
PROCPWRGD
AU60
SM_RCOMP0
AV60
SM_RCOMP1
AU61
SM_RCOMP2
AV15
SM_DRAMRST
AV61
SM_PG_CNTL1
HASWELL-MCP-E-ULT_BGA1168
@
HASWELL_MCP_E
DDI EDP
1 OF 19
HASWELL_MCP_E
MISC
JTAG
THERMAL
PWR
DDR3
2 OF 19
EDP_TXN0 EDP_TXP0 EDP_TXN1 EDP_TXP1
EDP_TXN2 EDP_TXP2 EDP_TXN3 EDP_TXP3
EDP_AUXN EDP_AUXP
EDP_RCOMP
EDP_DISP_UTIL
Rev1p2
PROC_TCK PROC_TMS
PROC_TRST
PROC_TDI
PROC_TDO
PRDY
PREQ
BPM#0 BPM#1 BPM#2 BPM#3 BPM#4 BPM#5 BPM#6 BPM#7
Rev1p2
C45 B46 A47 B47
C47 C46 A49 B49
A45 B45
D20 A43
J62 K62 E60 E61 E59 F63 F62
J60 H60 H61 H62 K59 H63 K60 J61
EDP_TXN0 <27> EDP_TXP0 <27> EDP_TXN1 <27> EDP_TXP1 <27>
EDP_AUXN <27> EDP_AUXP <27>
EDP_COMP
R1 24.9_0402_1%
1 2
Trace width=20 mils,Spacing=25mil,Max length=100mils
EDP_DISP_UTIL <27>
XDP_PRDY#_R XDP_PREQ#_R XDP_TCK_R XDP_TMS_R XDP_TRST#_R XDP_TDI_R XDP_TDO_R
XDP_BPM#0_R XDP_BPM#1_R
T148@ T149@ T150@ T151@ T152@ T153@
eDP Panel
T157@ T158@ T159@ T160@ T161@ T162@ T163@
T164@ T165@
+VCCIOA_OUT
CPU_Haswell intel PMD3558U 1.7G
3558@
SA00007G260
U1
CPU_Haswell intel I5-4210 1.7G
4210@
SA00007LO70
U1
CPU_Haswell intel I3-4020 1.9G
4020@
A A
SA00007MG50
ZZZ
PCB A5WAH LA-B991P LS-B161P/B162P
DAZ1A400100
CPU_Haswell intel I3-4030 1.9G
4030@
SA00007TA60
U1
CPU_Haswell intel I7-4510 2G
4510@
SA00007M760
U1
CPU_Haswell intel PMD3556U 1.7G
3556@
SA000072Y70
U1
CPU_Boardwell intel QG21 1.2G
QG21@
SA00007OS10
5
CPU Haswell InteI I5-4200U 1.6G
4200@
SA00006SMB0
U1
CPU Haswell Intel I7-4500U 1.8G
4500@
SA00006SLB0
U1
CPU_Haswell intel I7-4550U 1.5G
4550@
SA00006SJA0
U1
CPU_Boardwell intel QG22 1.2G
QG22@
SA00007OT10
CPU Haswell Intel I3-4010U 1.7G
4010@
SA00006SX70
U1
CPU_Haswell intel I3-4158U 2G
4158@
SA00006VW40
U1
CPU_Haswell intel PDC2957 1.4G
2957@
SA00007G060
U1
CPU_Boardwell intel QGH9 1.8G
QGH9@
SA00007U920
4
U1
CPU Haswell InteI I3-4005 1.7G
4005@
SA000072QD0
U1
CPU_Boardwell intel QGHB 1.6G
QGHB@
SA00007UH20
U1
CPU_Boardwell intel QGHA 1.6G
QGHA@
SA00007UG20
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2013/10/01 2014/05/24
2013/10/01 2014/05/24
2013/10/01 2014/05/24
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Re v
Size Document Number Re v
Size Document Number Re v
Custom
Custom
Custom
Date : Sheet of
Date : Sheet of
Date : Sheet of
Compal Electronics, Inc.
BDW MCP(1/11) DDI,MSIC,XDP
BDW MCP(1/11) DDI,MSIC,XDP
BDW MCP(1/11) DDI,MSIC,XDP
A5WAH M/B LA-B991P
A5WAH M/B LA-B991P
A5WAH M/B LA-B991P
1
4 54Friday, October 17, 2014
4 54Friday, October 17, 2014
4 54Friday, October 17, 2014
1.0
1.0
1.0
5
4
3
2
1
www.laptopblue.vn
D D
U1C
DDR_A_D0
AH63
DDR_A_D1 DDR_A_D2 DDR_A_D3 DDR_A_D4 DDR_A_D5 DDR_A_D6 DDR_A_D7 DDR_A_D8 DDR_A_D9 DDR_A_D10 DDR_A_D11 DDR_A_D12 DDR_A_D13 DDR_A_D14 DDR_A_D15 DDR_A_D16 DDR_A_D17 DDR_A_D18 DDR_A_D19 DDR_A_D20 DDR_A_D21 DDR_A_D22 DDR_A_D23 DDR_A_D24 DDR_A_D25 DDR_A_D26
C C
B B
DDR_A_D27 DDR_A_D28 DDR_A_D29 DDR_A_D30 DDR_A_D31 DDR_A_D32 DDR_A_D33 DDR_A_D34 DDR_A_D35 DDR_A_D36 DDR_A_D37 DDR_A_D38 DDR_A_D39 DDR_A_D40 DDR_A_D41 DDR_A_D42 DDR_A_D43 DDR_A_D44 DDR_A_D45 DDR_A_D46 DDR_A_D47 DDR_A_D48 DDR_A_D49 DDR_A_D50 DDR_A_D51 DDR_A_D52 DDR_A_D53 DDR_A_D54 DDR_A_D55 DDR_A_D56 DDR_A_D57 DDR_A_D58 DDR_A_D59 DDR_A_D60 DDR_A_D61 DDR_A_D62 DDR_A_D63
SA_DQ0
AH62
SA_DQ1
AK63
SA_DQ2
AK62
SA_DQ3
AH61
SA_DQ4
AH60
SA_DQ5
AK61
SA_DQ6
AK60
SA_DQ7
AM63
SA_DQ8
AM62
SA_DQ9
AP63
SA_DQ10
AP62
SA_DQ11
AM61
SA_DQ12
AM60
SA_DQ13
AP61
SA_DQ14
AP60
SA_DQ15
AP58
SA_DQ16
AR58
SA_DQ17
AM57
SA_DQ18
AK57
SA_DQ19
AL58
SA_DQ20
AK58
SA_DQ21
AR57
SA_DQ22
AN57
SA_DQ23
AP55
SA_DQ24
AR55
SA_DQ25
AM54
SA_DQ26
AK54
SA_DQ27
AL55
SA_DQ28
AK55
SA_DQ29
AR54
SA_DQ30
AN54
SA_DQ31
AY58
SA_DQ32
AW58
SA_DQ33
AY56
SA_DQ34
AW56
SA_DQ35
AV58
SA_DQ36
AU58
SA_DQ37
AV56
SA_DQ38
AU56
SA_DQ39
AY54
SA_DQ40
AW54
SA_DQ41
AY52
SA_DQ42
AW52
SA_DQ43
AV54
SA_DQ44
AU54
SA_DQ45
AV52
SA_DQ46
AU52
SA_DQ47
AK40
SA_DQ48
AK42
SA_DQ49
AM43
SA_DQ50
AM45
SA_DQ51
AK45
SA_DQ52
AK43
SA_DQ53
AM40
SA_DQ54
AM42
SA_DQ55
AM46
SA_DQ56
AK46
SA_DQ57
AM49
SA_DQ58
AK49
SA_DQ59
AM48
SA_DQ60
AK48
SA_DQ61
AM51
SA_DQ62
AK51
SA_DQ63
HASWELL-MCP-E-ULT_BGA1168
@
HASWELL_MCP_E
DDR CHANNEL A
3 OF 19
SA_CLK#0
SA_CLK0
SA_CLK#1
SA_CLK1 SA_CKE0
SA_CKE1 SA_CKE2 SA_CKE3
SA_CS#0 SA_CS#1
SA_ODT0
SA_RAS
SA_WE
SA_CAS
SA_BA0 SA_BA1 SA_BA2
SA_MA0 SA_MA1 SA_MA2 SA_MA3 SA_MA4 SA_MA5 SA_MA6 SA_MA7 SA_MA8
SA_MA9 SA_MA10 SA_MA11 SA_MA12 SA_MA13 SA_MA14 SA_MA15
SA_DQSN0 SA_DQSN1 SA_DQSN2 SA_DQSN3 SA_DQSN4 SA_DQSN5 SA_DQSN6 SA_DQSN7
SA_DQSP0 SA_DQSP1 SA_DQSP2 SA_DQSP3 SA_DQSP4 SA_DQSP5 SA_DQSP6 SA_DQSP7
SM_VREF_CA SM_VREF_DQ0 SM_VREF_DQ1
Rev1p2
AU37 AV37 AW36 AY36
AU43 AW43 AY42 AY43
AP33 AR32
AP32 AY34
AW34 AU34
AU35 AV35 AY41
AU36 AY37 AR38 AP36 AU39 AR36 AV40 AW39 AY39 AU40 AP35 AW41 AU41 AR35 AV42 AU42
AJ61 AN62 AM58 AM55 AV57 AV53 AL43 AL48
AJ62 AN61 AN58 AN55 AW57 AW53 AL42 AL49
AP49 AR51 AP51
DDRA_ODT0
DDR_A_MA0 DDR_A_MA1 DDR_A_MA2 DDR_A_MA3 DDR_A_MA4 DDR_A_MA5 DDR_A_MA6 DDR_A_MA7 DDR_A_MA8 DDR_A_MA9 DDR_A_MA10 DDR_A_MA11 DDR_A_MA12 DDR_A_MA13 DDR_A_MA14 DDR_A_MA15
DDR_A_DQS#0 DDR_A_DQS#1 DDR_A_DQS#2 DDR_A_DQS#3 DDR_A_DQS#4 DDR_A_DQS#5 DDR_A_DQS#6 DDR_A_DQS#7
DDR_A_DQS0 DDR_A_DQS1 DDR_A_DQS2 DDR_A_DQS3 DDR_A_DQS4 DDR_A_DQS5 DDR_A_DQS6 DDR_A_DQS7
SA_CLK_DDR#0 <15> SA_CLK_DDR0 <15> SA_CLK_DDR#1 <15> SA_CLK_DDR1 <15>
DDRA_CKE0_DIMMA <15> DDRA_CKE1_DIMMA <15>
DDRA_CS0_DIMMA# <15> DDRA_CS1_DIMMA# <15>
T4@
DDR_A_RAS# <15>
DDR_A_WE# <15>
DDR_A_CAS# <15>
DDR_A_BS0 <15> DDR_A_BS1 <15> DDR_A_BS2 <15>
SM_DIMM_VREFCA <15> SA_DIMM_VREFDQ <15> SB_DIMM_VREFDQ <16>
DDR_A_D[0..63]<15>
DDR_A_MA[0..15]<15>
DDR_A_DQS#[0..7]<15>
DDR_A_DQS[0..7]<15>
DDR_B_D0 DDR_B_D1 DDR_B_D2 DDR_B_D3 DDR_B_D4 DDR_B_D5 DDR_B_D6 DDR_B_D7 DDR_B_D8 DDR_B_D9 DDR_B_D10 DDR_B_D11 DDR_B_D12 DDR_B_D13 DDR_B_D14 DDR_B_D15 DDR_B_D16 DDR_B_D17 DDR_B_D18 DDR_B_D19 DDR_B_D20 DDR_B_D21 DDR_B_D22 DDR_B_D23 DDR_B_D24 DDR_B_D25 DDR_B_D26 DDR_B_D27 DDR_B_D28 DDR_B_D29 DDR_B_D30 DDR_B_D31 DDR_B_D32 DDR_B_D33 DDR_B_D34 DDR_B_D35 DDR_B_D36 DDR_B_D37 DDR_B_D38 DDR_B_D39 DDR_B_D40 DDR_B_D41 DDR_B_D42 DDR_B_D43 DDR_B_D44 DDR_B_D45 DDR_B_D46 DDR_B_D47 DDR_B_D48 DDR_B_D49 DDR_B_D50 DDR_B_D51 DDR_B_D52 DDR_B_D53 DDR_B_D54 DDR_B_D55 DDR_B_D56 DDR_B_D57 DDR_B_D58 DDR_B_D59 DDR_B_D60 DDR_B_D61 DDR_B_D62 DDR_B_D63
U1D
AY31
SB_DQ0
AW31
SB_DQ1
AY29
SB_DQ2
AW29
SB_DQ3
AV31
SB_DQ4
AU31
SB_DQ5
AV29
SB_DQ6
AU29
SB_DQ7
AY27
SB_DQ8
AW27
SB_DQ9
AY25
SB_DQ10
AW25
SB_DQ11
AV27
SB_DQ12
AU27
SB_DQ13
AV25
SB_DQ14
AU25
SB_DQ15
AM29
SB_DQ16
AK29
SB_DQ17
AL28
SB_DQ18
AK28
SB_DQ19
AR29
SB_DQ20
AN29
SB_DQ21
AR28
SB_DQ22
AP28
SB_DQ23
AN26
SB_DQ24
AR26
SB_DQ25
AR25
SB_DQ26
AP25
SB_DQ27
AK26
SB_DQ28
AM26
SB_DQ29
AK25
SB_DQ30
AL25
SB_DQ31
AY23
SB_DQ32
AW23
SB_DQ33
AY21
SB_DQ34
AW21
SB_DQ35
AV23
SB_DQ36
AU23
SB_DQ37
AV21
SB_DQ38
AU21
SB_DQ39
AY19
SB_DQ40
AW19
SB_DQ41
AY17
SB_DQ42
AW17
SB_DQ43
AV19
SB_DQ44
AU19
SB_DQ45
AV17
SB_DQ46
AU17
SB_DQ47
AR21
SB_DQ48
AR22
SB_DQ49
AL21
SB_DQ50
AM22
SB_DQ51
AN22
SB_DQ52
AP21
SB_DQ53
AK21
SB_DQ54
AK22
SB_DQ55
AN20
SB_DQ56
AR20
SB_DQ57
AK18
SB_DQ58
AL18
SB_DQ59
AK20
SB_DQ60
AM20
SB_DQ61
AR18
SB_DQ62
AP18
SB_DQ63
HASWELL-MCP-E-ULT_BGA1168
@
HASWELL_MCP_E
DDR CHANNEL B
4 OF 19
SB_CK#0
SB_CK0
SB_CK#1
SB_CK1
SB_CKE0 SB_CKE1 SB_CKE2 SB_CKE3
SB_CS#0 SB_CS#1
SB_ODT0
SB_RAS
SB_WE
SB_CAS SB_BA0
SB_BA1 SB_BA2
SB_MA0 SB_MA1 SB_MA2 SB_MA3 SB_MA4 SB_MA5 SB_MA6 SB_MA7 SB_MA8
SB_MA9 SB_MA10 SB_MA11 SB_MA12 SB_MA13 SB_MA14 SB_MA15
SB_DQSN0 SB_DQSN1 SB_DQSN2 SB_DQSN3 SB_DQSN4 SB_DQSN5 SB_DQSN6 SB_DQSN7
SB_DQSP0 SB_DQSP1 SB_DQSP2 SB_DQSP3 SB_DQSP4 SB_DQSP5 SB_DQSP6 SB_DQSP7
Rev1p2
AM38 AN38 AK38 AL38
AY49 AU50 AW49 AV50
AM32 AK32
AL32 AM35
AK35 AM33
AL35 AM36 AU49
AP40 AR40 AP42 AR42 AR45 AP45 AW46 AY46 AY47 AU46 AK36 AV47 AU47 AK33 AR46 AP46
AW30 AV26 AN28 AN25 AW22 AV18 AN21 AN18
AV30 AW26 AM28 AM25 AV22 AW18 AM21 AM18
DDRB_ODT0
DDR_B_MA0 DDR_B_MA1 DDR_B_MA2 DDR_B_MA3 DDR_B_MA4 DDR_B_MA5 DDR_B_MA6 DDR_B_MA7 DDR_B_MA8 DDR_B_MA9 DDR_B_MA10 DDR_B_MA11 DDR_B_MA12 DDR_B_MA13 DDR_B_MA14 DDR_B_MA15
DDR_B_DQS#0 DDR_B_DQS#1 DDR_B_DQS#2 DDR_B_DQS#3 DDR_B_DQS#4 DDR_B_DQS#5 DDR_B_DQS#6 DDR_B_DQS#7
DDR_B_DQS0
DDR_B_DQS1
DDR_B_DQS2
DDR_B_DQS3
DDR_B_DQS4
DDR_B_DQS5
DDR_B_DQS6
DDR_B_DQS7
DDR_B_D[0..63]<16>
DDR_B_MA[0..15]<16>
DDR_B_DQS#[0..7]<16>
DDR_B_DQS[0..7]<16>
SB_CLK_DDR#0 <16> SB_CLK_DDR0 <16> SB_CLK_DDR#1 <16> SB_CLK_DDR1 <16>
DDRB_CKE0_DIMMB <16> DDRB_CKE1_DIMMB <16>
DDRB_CS0_DIMMB# <16> DDRB_CS1_DIMMB# <16>
T5@
DDR_B_RAS# <16> DDR_B_WE# <16> DDR_B_CAS# <16>
DDR_B_BS0 <16> DDR_B_BS1 <16> DDR_B_BS2 <16>
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2013/10/01 2014/05/24
2013/10/01 2014/05/24
2013/10/01 2014/05/24
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Re v
Size Document Number Re v
Size Document Number Re v
Custom
Custom
Custom
Date : Sheet of
Date : Sheet of
2
Date : Sheet of
Compal Electronics, Inc.
BDW MCP(2/11) DDRIII
BDW MCP(2/11) DDRIII
BDW MCP(2/11) DDRIII
A5WAH M/B LA-B991P
A5WAH M/B LA-B991P
A5WAH M/B LA-B991P
1
1.0
1.0
5 54Friday, October 17, 2014
5 54Friday, October 17, 2014
5 54Friday, October 17, 2014
1.0
5
4
3
2
1
www.laptopblue.vn
PCH_RTCX1
1
C154
2
R122 0_0402_5%@
1 2
1 8 2 7 3 6 4 5
C519
1 2
0.1U_0402_16V4Z
XEMC@
PCH_RTCX2
18P_0402_50V8J
+RTCVCC
RP14
EMC@
33_0804_8P4R_5%
PCH_RTCRST#
+RTCVCC+RTCBATT +CHGRTC
1
C151
0.1U_0402_16V4Z
2
+RTCVCC
ME Debug
HDA_SDOUTHDA_SDOUT HDA_RST# HDA_SYNC HDA_BIT_CLK
PVT modify 12/31 EMI reserved C519
1
C149
C150
ME CMOS
2
1
2
1U_0402_6.3V6K
R69 20K_0402_1%
1 2 1 2
R70 20K_0402_1%
1U_0402_6.3V6K
RTCRST close RAM door
12
JME1 0_0603_5%
@
12
JME2 0_0603_5%
@
+RTCVCC
R72 1M_0402_5%
1 2
EC_RTCRST#<36>
DVT modify 11/12 add Q19 for EC_RTCRST# pull low on EC side
1 2
U1E
PCH_RTCX1 PCH_RTCX2 SM_INTRUDER# PCH_INTVRMEN PCH_SRTCRST# PCH_RTCRST#
13
D
Q52 L2N7002LT1G_SOT23-3
2
G
@
S
HDA_BIT_CLK HDA_SYNC HDA_RST#
T6 @ T7 @
T8 @ T9 @
T95 @ T21 @
T19 @ T15 @ T10 @ T11 @ T22 @ T12 @
HDA_SDIN0 HDA_SDOUT
PCH_JTAG_RST#
PCH_JTAG_TCK PCH_JTAG_TDI PCH_JTAG_TDO PCH_JTAG_TMS
PCH_TCK_JTAGX
HDA_SDIN0<38>
R9751_0402_5% @
AW5
RTCX1
AY5
RTCX2
AU6
INTRUDER
AV7
INTVRMEN
AV6
SRTCRST
AU7
RTCRST
AW8
HDA_BCLK/I2S0_SCLK
AV11
HDA_SYNC/I2S0_SFRM
AU8
HDA_RST/I2S_MCLK
AY10
HDA_SDI0/I2S0_RXD
AU12
HDA_SDI1/I2S1_RXD
AU11
HDA_SDO/I2S0_TXD
AW10
HDA_DOCK_EN/I2S1_TXD
AV10
HDA_DOCK_RST/I2S1_SFRM
AY8
I2S1_SCLK
AU62
PCH_TRST
AE62
PCH_TCK
AD61
PCH_TDI
AE61
PCH_TDO
AD62
PCH_TMS
AL11
RSVD
AC4
RSVD
AE63
JTAGX
AV2
RSVD
HASWELL-MCP-E-ULT_BGA1168
@
HASWELL_MCP_E
RTC
JTAG
5 OF 19
SATA_IREF
RSVD RSVD
SATALED
Rev1p2
J5 H5 B15 A15
J8 H8 A17 B17
J6 H6 B14 C15
F5 E5 C17 D17
V1 U1 V6 AC1
A12 L11 K10 C12 U3
PCH_GPIO34 PCH_GPIO35 PCH_GPIO36 PCH_GPIO37
SATA_IREF
T13@ T14@
SATA_RCOMP
R10
1 2
10K_0402_5%
SATA_RN0/PERN6_L3
SATA_RP0/PERP6_L3 SATA_TN0/PETN6_L3
SATA_TP0/PETP6_L3
SATA_RN1/PERN6_L2
SATA_RP1/PERP6_L2 SATA_TN1/PETN6_L2
SATA_TP1/PETP6_L2
SATA_RN2/PERN6_L1
SATA_RP2/PERP6_L1 SATA_TN2/PETN6_L1
SATAAUDIO
SATA_TP2/PETP6_L1
SATA_RN3/PERN6_L0
SATA_RP3/PERP6_L0 SATA_TN3/PETN6_L0
SATA_TP3/PETP6_L0
SATA0GP/GPIO34 SATA1GP/GPIO35 SATA2GP/GPIO36 SATA3GP/GPIO37
SATA_RCOMP
SATA_PRX_DTX_N0 <34> SATA_PRX_DTX_P0 <34> SATA_PTX_DRX_N0 <34> SATA_PTX_DRX_P0 <34>
SATA_PRX_DTX_N1 <34> SATA_PRX_DTX_P1 <34> SATA_PTX_DRX_N1 <34> SATA_PTX_DRX_P1 <34>
PCH_GPIO34 <9> PCH_GPIO35 <9> PCH_GPIO36 <9> PCH_GPIO37 <9>
1 2
R75 0_0603_5%@
R2 3.01K_0402_1%
1 2
+3VS
SATA_RCOMP, IREF Trace width=12~15 mil, Spcing=12 mils Max trace length= 500 m il
HDD
ODD
+1.05VS_ASATA3PLL
1 2
R101 10M_0402_5%
Y1
32.768KHZ_12.5PF_Q13FC135000040
15P_0402_50V8J
R73 330K_0402_5%
1 2
R74 330K_0402_5%@
1 2
HDA_SDO<36>
12
D D
1
C153
2
DVT modify 11/27 TXC recommend from 18P change to 15P
PCH_INTVRMEN
INTVRMEN
H󶁪I nt egr ated VR M enabl e
*
L󶁪I nt egr ated VR M di s abl e
C C
HDA for AUDIO
HDA_SDOUT_AUDIO<38>
HDA_RST_AUDIO#<38> HDA_SYNC_AUDIO<38>
HDA_BITCLK_AUDIO<38>
EMI Request
W=20mils W=20mils
B B
trace width 10mil
D23
1
BAS40-04_SOT23-3
2
3
+RTCBATT
+CHGRTC
20mil
+RTCVCC
1
C168
0.1U_0402_16V4Z
@
A A
2
2
D32
1
CHN202UPT_SC70-3
@
R446 1K_0402_5%
@
1 2
+RTCBATT_R
3
20mil
5
+RTCBATT
1
+
-
JBATT1 LOTES_AAA-BAT-054-K01
2
CONN@
SP07000H700
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2013/10/01 2014/05/24
2013/10/01 2014/05/24
2013/10/01 2014/05/24
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Re v
Size Document Number Re v
Size Document Number Re v
Custom
Custom
Custom
Date : Sheet of
Date : Sheet of
2
Date : Sheet of
Compal Electronics, Inc.
BDW MCP(3/11) RTC,SATA,XDP
BDW MCP(3/11) RTC,SATA,XDP
BDW MCP(3/11) RTC,SATA,XDP
A5WAH M/B LA-B991P
A5WAH M/B LA-B991P
A5WAH M/B LA-B991P
1
6 54Friday, October 17, 2014
6 54Friday, October 17, 2014
6 54Friday, October 17, 2014
1.0
1.0
1.0
5
4
3
2
1
www.laptopblue.vn
XTAL24_IN
12
C3 15P_0402_50V8J
DGPU_PWR_EN<8,9,40,51>
R108 15_0402_5%
PCH_SPI_CLK_1
12
@
33_0402_5%
XTAL24_OUT
12
PCH_SPI_IO2_1 PCH_SPI_IO3_1
PCH_SPI_HOLD1#
PCH_SPI_WP1#
PCH_SPI_CS1# PCH_SPI_MISO_2 PCH_SPI_IO2_2
R109
12
PCIE LAN
WLAN
VGA
+3VS
12
12
R112
2.2K_0402_5%
@
R115 10K_0402_5%
G
2
S
R107
2.2K_0402_5%
@
VGA@
Q2L2N7002LT1G_SOT23-3
13
D
SPI ROM ( 8MByte )
PCH_SPI_CS0# PCH_SPI_MISO_1 PCH_SPI_IO2_1
12
U6
1
CS#
2
DO(IO1)
3
WP#(IO2)
4
GND
EN25QH64-104HIP_SO8
SPI ROM ( 4MByte ) 2ROM pop
U7
1
CS#
2
DO
HOLD#
3
WP#
4
GND
EN25QH32-104HIP_SO8
@
VGA_CLKREQ#
VCC
HOLD#(IO3)
CLK
DI(IO0)
8
VCC
7 6
CLK
5
DI
CLK_PCIE_LAN#<31> CLK_PCIE_LAN<31>
LAN_CLKREQ#<31> CLK_PCIE_MINI1#<33> CLK_PCIE_MINI1<33> MINI1_CLKREQ#<8,33>
CLK_PEG_VGA#<17> CLK_PEG_VGA<17>
+3V_SPI
8 7 6 5
PCH_SPI_IO3_2 PCH_SPI_CLK_2 PCH_SPI_MOSI_2
+3VS
C66
1 2
0.1U_0402_16V4Z
PCH_SPI_IO3_1 PCH_SPI_CLK_1 PCH_SPI_MOSI_1
+3V_SPI
PCH_GPIO18<9>
PCH_GPIO19<9>
CLK_PCIE_LAN# CLK_PCIE_LAN
R52 10K_0402_5%
CLK_PCIE_MINI1# CLK_PCIE_MINI1 MINI1_CLKREQ#
CLK_PEG_VGA# CLK_PEG_VGA VGA_CLKREQ#
PCH_GPIO23<9>
C67
1 2
0.1U_0402_16V4Z
12
R481M_0402_5%
Y2
24MHZ_12PF_X3G024000DC1H
12
C2 15P_0402_50V8J
Pull high @ VGA side
PEG_CLKREQ#<17>
+3V_SPI
R105 1K_0402_5% R106 1K_0402_5%
R103 1K_0402_5%@ R102 1K_0402_5%@
C152 10P_0402_50V8J
1 2
XEMC@
123
4
DVT modify 11/27 TXC recommend from 10P change to 15P
1 2 1 2
1 2 1 2
2ROM pop
PCH_SPI_WP1#
Reserve for EMI(Near SPI ROM)
R104 33_0402_5%XEMC@
PCH_SPI_WP1#
D D
C C
B B
A A
1 2
LPC_AD0<36,37> LPC_AD1<36,37> LPC_AD2<36,37> LPC_AD3<36,37>
LPC_FRAME#<36,37>
@
PCH_GPIO18
PCH_GPIO19
PCH_GPIO23
LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3 LPC_FRAME#
PCH_SPI_CLK PCH_SPI_CS0# PCH_SPI_CS1#
PCH_SPI_MOSI PCH_SPI_MISO PCH_SPI_WP1#
PCH_SPI_HOLD1#
for Share EC ROM, +3VS change to +3VALW
PCH_SPI_MISO_1 PCH_SPI_IO3_1 PCH_SPI_CLK_1 PCH_SPI_MOSI_1
PCH_SPI_MOSI_1 PCH_SPI_CLK_1 PCH_SPI_MISO_1 PCH_SPI_CS0#
R498 0_0402_5%@ R500 0_0402_5%@ R502 0_0402_5%@ R505 0_0402_5%@
PCH_SPI_MOSI_2 PCH_SPI_CLK_2 PCH_SPI_IO3_2 PCH_SPI_MISO_2 PCH_SPI_MISO
U1F
C43
CLKOUT_PCIE_N0
C42
CLKOUT_PCIE_P0
U2
PCIECLKRQ0/GPIO18
B41
CLKOUT_PCIE_N1
A41
CLKOUT_PCIE_P1
Y5
PCIECLKRQ1/GPIO19
C41
CLKOUT_PCIE_N2
B42
CLKOUT_PCIE_P2
AD1
PCIECLKRQ2/GPIO20
B38
CLKOUT_PCIE_N3
C37
CLKOUT_PCIE_P3
N1
PCIECLKRQ3/GPIO21
A39
CLKOUT_PCIE_N4
B39
CLKOUT_PCIE_P4
U5
PCIECLKRQ4/GPIO22
B37
CLKOUT_PCIE_N5
A37
CLKOUT_PCIE_P5
T2
PCIECLKRQ5/GPIO23
HASWELL-MCP-E-ULT_BGA1168
@
U1G
AU14
LAD0
AW12
LAD1
AY12
LAD2
AW11
LAD3
AV12
LFRAME
AA3
SPI_CLK
Y7
SPI_CS0
Y4
SPI_CS1
AC2
SPI_CS2
AA2
SPI_MOSI
AA4
SPI_MISO
Y6
SPI_IO2
AF1
SPI_IO3
HASWELL-MCP-E-ULT_BGA1168
@
RP19
1 8 2 7 3 6 4 5
15_0804_8P4R_5%
1 2 1 2 1 2 1 2
DVT modify 11/15 pop share rom
PVT modify 01/06 change to R-short
RP20
1 8 2 7 3 6 4 5
+3V_SPI
+3V_SPI
PCH_SPI_MISO PCH_SPI_HOLD1# PCH_SPI_CLK PCH_SPI_MOSI
PCH_SPI_MOSI PCH_SPI_CLK PCH_SPI_HOLD1#
33_0804_8P4R_5%
@
HASWELL_MCP_E
CLOCK
SIGNALS
6 OF 19
HASWELL_MCP_E
LPC
SPI C-LINK
1 2 1 2
SMBUS
7 OF 19
R126 0_0402_5%@ R123 0_0402_5%@
EC_SPI_SO <36> EC_SPI_CLK <36> EC_SPI_SI <36> EC_SPI_CS# <36>
XTAL24_IN
XTAL24_OUT
DIFFCLK_BIASREF
TESTLOW_C35 TESTLOW_C34
TESTLOW_AK8
TESTLOW_AL8
CLKOUT_LPC_0 CLKOUT_LPC_1
CLKOUT_ITPXDP_N CLKOUT_ITPXDP_P
SMBALERT/GPIO11
SMBCLK
SMBDATA
SML0ALERT/GPIO60
SML0CLK
SML1ALERT/PCHHOT/GPIO73
SML0DATA
SML1CLK/GPIO75
SML1DATA/GPIO74
+3VALW +3VS
SPI ROM
From EC (For share ROM)
CL_CLK
CL_DATA
CL_RST
Rev1p2
A25 B25
K21
RSVD
M21
RSVD
C26 C35
C34 AK8 AL8
AN15 AP15
B35 A35
Rev1p2
PCH_GPIO11
AN2
PCH_SMBCLK
AP2
PCH_SMBDATA
AH1
PCH_GPIO60
AL2 AN1
SML0CLK
AK1
SML0DATA PCH_GPIO73
AU4 AU3
SML1CLK
AH3
SML1DATA
AF2 AD2 AF4
PVT modify 1/20 chang R126 to R-short
XTAL24_IN XTAL24_OUT
T16@ T17@
XCLK_BIASREF
1 2
R140 10K_0402_5% R141 10K_0402_5%
1 2 1 2
R142 10K_0402_5% R148 10K_0402_5%
1 2
CLKOUT_LPC0 CLKOUT_LPC1
CLK_BCLK_ITP# CLK_BCLK_ITP
DMN66D0LDW-7_SOT363-6
PCH_SMBDATA D_CK_SDATA
PCH_SMBCLK D_CK_SCLK
DMN66D0LDW-7_SOT363-6
DMN66D0LDW-7_SOT363-6
R78 3.01K_0402_1%
1 2
R390 22_0402_5%
EMC@
R395 22_0402_5%
TPM@
T184@ T183@
PCH_GPIO11 <9>
PCH_SMBCLK <33>
PCH_SMBDATA <33>
PCH_GPIO60 <9>
PCH_GPIO73 <9>
T23@ T24@ T25@
+3VS
Q7A
SML1CLK
SML1DATA
DMN66D0LDW-7_SOT363-6
2
6 1
3 4
Q7B
+3VS
Q8A
6 1
2
12 12
4.7K_0402_5%
5
5
3 4
Q8B
+1.05VS_AXCK_LCPLL
CLK_PCI_LPC <36> CLK_PCI_TPM <37>
SML0CLK PCH_SMBCLK
PCH_SMBDATA SML0DATA
SML1CLK SML1DATA
+3VS
R116
1 2
1 2
PU 2.2K at EC side (+3VS)
RP8 2.2K_0804_8P4R_5%
1 8 2 7 3 6 4 5
R114 2.2K_0402_5%
1 2 1 2
R113 2.2K_0402_5%
R119
4.7K_0402_5%
D_CK_SDATA <15,16,39>
D_CK_SCLK <15,16,39>
EC_SMB_CK2 <17,36>
EC_SMB_DA2 <17,36>
+3VALW_PCH
DDR, G-sensor
VGA, EC
2ROM is SPI ROM 2M + 4M Byte
2ROM POP U6 - EN25QH16-104HIP_SO8 (SA00004UG00) RP19 - 33_0804_8P4R_5% (SD309330A80) R108 - 33_0402_5% (SD028330A80)
5
Reserve for EMI(Near SPI ROM)
C453 10P_0402_50V8J
1 2
R402 33_0402_5%XEMC@
XEMC@
PCH_SPI_CLK_2
12
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2013/10/01 2014/05/24
2013/10/01 2014/05/24
2013/10/01 2014/05/24
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Re v
Size Document Number Re v
Size Document Number Re v
Custom
Custom
Custom
Date : Sheet of
Date : Sheet of
2
Date : Sheet of
Compal Electronics, Inc.
BDW MCP(4/11) CLK,SPI,SMBUS
BDW MCP(4/11) CLK,SPI,SMBUS
BDW MCP(4/11) CLK,SPI,SMBUS
A5WAH M/B LA-B991P
A5WAH M/B LA-B991P
A5WAH M/B LA-B991P
1
7 54Friday, October 17, 2014
7 54Friday, October 17, 2014
7 54Friday, October 17, 2014
1.0
1.0
1.0
5
ACPRESENT funct i on
4
3
2
1
+3VS
12
R227 10K_0402_5%
SYS_RESET#
2
C513
D D
0.01U_0402_16V7K
1
XEMC@
place near AC3
PCH_RSMRST#
ACIN<36,41,43>
C C
VGATE<11,48>
B B
PCH_PWROK VGATE_3V
10K_0402_5%
+3VS
RP27
+3VS
R210
R117 10K_0402_5%
D21
@
1 2
RB751V-40 SOD-323
12
R208
U17
NC1VCC
2
A
3
GND
74AUP1G07GW_TSSOP5
@
1 8 2 7 3 6 4 5
10K_0804_8P4R_5%
NGC6@
1 2
10K_0402_5%
1 2
+3VALW_PCH
12
R245 10K_0402_5%
BW@
PCH_ACIN
+3VS
5
2
P
B
1
A
U43 MC74VHC1G08DFT2G_SC70-5
@
Y
4
Y
G
3
+1.05VS_VTT
5
VGATE_3V
4
G_SEN_INT PCH_GPIO80 MINI1_CLKREQ#
DEVSLP0
PCH_GPIO77
SYS_PWROK
10K_0402_5%
Note: Deep Sx need use EC GPIO for
R65 0_0402_5%
1 2
12
R207 10K_0402_5%
@
+3VS
12
R310
@
MINI1_CLKREQ# <7,33> DEVSLP0 <9,34>
www.laptopblue.vn
HASWELL_MCP_E
SYSTEM POWER MANAGEMENT
HASWELL_MCP_E
eDP SIDEBAND
GPIO
8 OF 19
9 OF 19
DISPLAY
DSWVRMEN
DPWROK
CLKRUN/GPIO32
SUS_STAT/GPIO61
SUSCLK/GPIO62
SLP_S5/GPIO63
SLP_SUS
SLP_LAN
DDPB_CTRLCLK
DDPB_CTRLDATA
DDPC_CTRLCLK
DDPC_CTRLDATA
DDPB_AUXN DDPC_AUXN
DDPB_AUXP
DDPC_AUXP
DDPB_HPD DDPC_HPD
EDP_HPD
PCH_PWROK
VGATE_3V <36>
PCH_PWROK<36> VCCST_PG_EC<11,36>
PCH_RSMRST#<36>
PBTN_OUT#<36>
PCH_PWROK_R
PLT_RST#<17,36,37>
SUSWARN#<9>
+3VALW_PCH
GC6_FB_EN<17>
PVT modify 01/06 R62, R64 change to R-short
R206
SYS_PWROK
1 2
R61 0_0402_5%@
1 2 1 2
R62 0_0402_5%@ R63 0_0402_5%@
1 2
R64 0_0402_5%@
1 2
R79 0_0402_5%@
1 2
R110 0_0402_5%@
1 2 1 2
R156 8.2K_0402_5%
PCH_INV_PWM<26,27> ENBKL<36> PCH_ENVDD<27>
GC6_FB_EN
DGPU_PWR_EN<7,9,40,51> DDI1_AUX_DN <29> DGPU_HOLD_RST#<9,17>
TP_INT#<9,37>
G_SEN_INT<39>
PCH_GPIO51<9>
0_0402_5%@
R2057 0_0402_5%
GC6@
DGPU_PWR_EN DGPU_HOLD_RST#
SUSACK#SUSWARN# SYS_RESET#
SYS_PWROK_R
PCH_PWROK_R PM_APWROK
PLT_RST#
PCH_RSMRST#_R
SUSWARN# PBTN_OUT#_R
PCH_ACIN PCH_BATLOW#
T31 @
PCH_GPIO77
12
PCH_GPIO80
T26 @
TP_INT# G_SEN_INT Project_ID1 PCH_GPIO51 Project_ID0
U1H
AK2
SUSACK
AC3
SYS_RESET
AG2
SYS_PWROK
AY7
PCH_PWROK
AB5
APWROK
AG7
PLTRST
AW6
RSMRST
AV4
SUSWARN/SUSPWRDNACK/GPIO30
AL7
PWRBTN
AJ8
ACPRESENT/GPIO31
AN4
BATLOW/GPIO72
AF3
SLP_S0
AM5
SLP_WLAN/GPIO29
HASWELL-MCP-E-ULT_BGA1168
@
U1I
B8
EDP_BKLCTL
A9
EDP_BKLEN
C6
EDP_VDDEN
U6
PIRQA/GPIO77
P4
PIRQB/GPIO78
N4
PIRQC/GPIO79
N2
PIRQD/GPIO80
AD4
PME
U7
GPIO55
L1
GPIO52
L3
GPIO54
R5
GPIO51
L4
GPIO53
HASWELL-MCP-E-ULT_BGA1168
@
AW7
DSWODVREN PCH_RSMRST#_R
AV5
PCH_PCIE_WAKE#
AJ5
WAKE
V5
CLKRUN#
AG4 AE6
SUSCLK PM_SLP_S5#
AP5
PM_SLP_S4#
AJ6
SLP_S4 SLP_S3
SLP_A
Rev1p2
AT4 AL5 AP4 AJ7
PM_SLP_S3#
PM_SLP_LAN#
DDPB_CTRLDATA: Port B Detected
DDPC_CTRLDATA: Port C Detected
1: Port B or C is detected
*
0: Port B or C is not detected
B9 C9
R271 2.2K_0402_5%
DDI2_CTRL_CK
D9
DDI2_CTRL_DATA
D11
DDI1_AUX_DN
C5 B6
DDI1_AUX_DP
B5 A6
C8 A8 D6
Rev1p2
R127 10K_0402_5%
(Have internal PD)
1 2
DSWODVREN - On Die DSW VR Enable
H󶁪Ena bl e( DEF AULT)
*
L󶁪Di s a bl e
R124 330K_0402_5%
1 2 1 2
R125 330K_0402_5%@
1 2
R1201K_0402_5%
+3VALW_PCH
R1578.2K_0402_5%
1 2
1 2
T30@ T96@
R118 10K_0402_5%
@
1 2
+3VS
T27@ T28@
@
not support Deep S4,S5 can NC
+3VS
DDI2_CTRL_CK <28>
DDI2_CTRL_DATA <28>
DDI1_AUX_DP <29>
CPU_DP_HPD <29> CPU_HDMI_HPD <28> CPU_EDP_HPD <27>
+RTCVCC
CLKRUN# <37>
PM_SLP_S5# <36>
T29@
PM_SLP_S4# <36> PM_SLP_S3# <36>
+3VALW_PCH
PCH_PCIE_WAKE# <31>
+3VS
5
U30
+3VS+3VS
12
R205
10K_0402_5%
BA50@
Project_ID0Project_ID1
A A
R214
10K_0402_5%
EA50@
1 2
R204
10K_0402_5%
10K_0402_5%
5
@
R215
12
Project ID
*
Z5WAH Z5W1H
1 2
Z5WBH Reserved
Project_ID0Project_ID1
GPIO53GPIO54
0 0 0 1 1 1
4
1 0
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2013/10/01 2014/05/24
2013/10/01 2014/05/24
2013/10/01 2014/05/24
PLT_RST#
MC74VHC1G08DFT2G_SC70-5
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
P
B
4
Y
1
A
G
3
2
12
R416 100K_0402_5%
PLT_RST_BUF# <31,33>
Custom
Custom
Custom
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Re v
Size Document Number Re v
Size Document Number Re v
Date : Sheet of
Date : Sheet of
Date : Sheet of
Compal Electronics, Inc.
BDW MCP(5/11) PM,GPIO,DDI
BDW MCP(5/11) PM,GPIO,DDI
BDW MCP(5/11) PM,GPIO,DDI
A5WAH M/B LA-B991P
A5WAH M/B LA-B991P
A5WAH M/B LA-B991P
1
8 54Friday, October 17, 2014
8 54Friday, October 17, 2014
8 54Friday, October 17, 2014
1.0
1.0
1.0
5
GPIO15 : TLS Conf i dent ial i t y
0: Intel ME TLS with no conf i dent ial i t y
+3VS
NGC6@
PCH_GPIO87 PCH_GPIO51
PCH_GPIO83
10K_0804_8P4R_5%
PCH_GPIO68 PCH_GPIO69
change to I2C0 for TS use
10K_0804_8P4R_5%
PCH_GPIO1 PCH_GPIO94 PCH_GPIO93 PCH_GPIO2
10K_0804_8P4R_5%
PCH_GPIO91 PCH_GPIO0 PCH_GPIO90 PCH_GPIO38
10K_0804_8P4R_5%
PCH_GPIO19 PCH_GPIO36 TP_INT#
SERIRQ
10K_0804_8P4R_5%
PCH_GPIO18 PCH_GPIO35 PCH_GPU_ACIN PCH_GPIO34
10K_0804_8P4R_5%
PCH_GPIO71 PCH_GPIO16 EC_KBRST# PCH_GPIO37
10K_0804_8P4R_5%
PCH_GPIO67
18
PCH_GPIO65
27
DGPU_HOLD_RST#
36
PCH_GPIO64
45
10K_0804_8P4R_5%
PCH_GPIO84
18
PCH_GPIO3
27 36
PCH_GPIO89
45
10K_0804_8P4R_5%
PCH_GPIO17
18
PCH_GPIO23
27
PCH_GPIO76
36 45
10K_0804_8P4R_5%
PCH_GPIO70 DGPU_PWR_EN
PCH_GPIO10 PCH_GPIO11 PCH_GPIO57 PCH_GPIO13
10K_0804_8P4R_5%
USB_OC1# PCH_GPIO8 PCH_GPIO73
SUSWARN#
10K_0804_8P4R_5%
PCH_GPIO46 PCH_GPIO42 PCH_GPIO14 PCH_GPIO60
10K_0804_8P4R_5%
PCH_GPIO47 PCH_GPIO45 PCH_GPIO24
10K_0804_8P4R_5%
PCH_GPIO43 PCH_GPIO59 PCH_GPIO25 PCH_GPIO58
10K_0804_8P4R_5%
USB_OC0# PCH_GPIO56 PCH_GPIO44 PCH_GPIO9
10K_0804_8P4R_5%
DIS,Optimus
UMA
N15V-GL N15V-GM
5
PCH_GPIO51 <8>
PCH_GPIO19 <7> PCH_GPIO36 <6>
TP_INT# <8,37>
PCH_GPIO18 <7> PCH_GPIO35 <6>
PCH_GPIO34 <6>
PCH_GPIO37 <6>
DGPU_HOLD_RST# <8,17>
PCH_GPIO23 <7>
DGPU_PWR_EN <7,8,40,51>
Pre MP modify 03/10 solve VGA sequence error issue
PCH_GPIO11 <7>
USB_OC1# <10> PCH_GPIO73 <7>
SUSWARN# <8>
PCH_GPIO42 <10> PCH_GPIO60 <7>
PCH_GPIO43 <10>
USB_OC0# <10,35>
GPIO49
DGPU_PRSNT#
0 1
GPIO26
VGA INFO
0 1
RP23
1 8 2 7 3 6 4 5
RP24
1 8 2 7 3 6 4 5
RP25
1 8
D D
C C
B B
DGPU_PRSNT#
A A
DGPU_IDEN
2 7 3 6 4 5
RP26
1 8 2 7 3 6 4 5
RP16
1 8 2 7 3 6 4 5
RP28
1 8 2 7 3 6 4 5
RP29
1 8 2 7 3 6 4 5
RP30
RP31
RP32
R216
1 2
10K_0402_5%
R217
1 2
10K_0402_5%
+3VALW_PCH
RP34
1 8 2 7 3 6 4 5
RP35
1 8 2 7 3 6 4 5
RP37
1 8 2 7 3 6 4 5
RP38
1 8 2 7 3 6 4 5
RP39
1 8 2 7 3 6 4 5
RP40
1 8 2 7 3 6 4 5
+3VS
12
R306
10K_0402_5%
UMA@
R219
10K_0402_5%
VGA@
1 2
+3VALW_PCH +3VALW_PCH
12
R311
10K_0402_5%
VGM@
R220
10K_0402_5%
VGL@
1 2
+3VS
10K_0402_5%
PCH_GPIO28
10K_0402_5%
10K_0402_5%
CPU_IDEN
10K_0402_5%
4
www.laptopblue.vn
RP36
1 8 2 7 3 6 4 5
DGPU_AC_DETECT<17,36>
GPU_EVENT#<17>
EC_SMI#_SCI# PCH_GPIO85 PCH_GPIO92 PCH_GPIO88
10K_0804_8P4R_5%
DGPU_AC_DETECT
GPU_EVENT#
EC_LID_OUT#<36>
R71 0_0402_5%
1 2
TS_INT#<27>
DEVSLP0<8,34>
R2058 0_0402_5%GC6@
EC_SMI#_SCI#<36>
PCH_SPKR<38>
PCH_GPIO76 PCH_GPIO8
EC_LID_OUT# PCH_GPIO16 PCH_GPIO17 PCH_GPIO24 CPU_IDEN PCH_GPIO28 DGPU_IDEN
PCH_GPIO56 PCH_GPIO57 PCH_GPIO58 PCH_GPIO59 PCH_GPIO44 PCH_GPIO47 PCH_GPU_ACIN
@
DGPU_PRSNT# TS_INT# PCH_GPIO71 PCH_GPIO13 PCH_GPIO14 PCH_GPIO25 PCH_GPIO45 PCH_GPIO46
PCH_GPIO9 PCH_GPIO10
DEVSLP0 PCH_GPIO70
12
PCH_GPIO38 EC_SMI#_SCI# PCH_SPKR
3
U1J
P1
BMBUSY/GPIO76
AU2
GPIO8
AM7
LAN_PHY_PWR_CTRL/GPIO12
AD6
GPIO15
Y1
GPIO16
T3
GPIO17
AD5
GPIO24
AN5
GPIO27
AD7
GPIO28
AN3
GPIO26
AG6
GPIO56
AP1
GPIO57
AL4
GPIO58
AT5
GPIO59
AK4
GPIO44
AB6
GPIO47
U4
GPIO48
Y3
GPIO49
P3
GPIO50
Y2
HSIOPC/GPIO71
AT3
GPIO13
AH4
GPIO14
AM4
GPIO25
AG5
GPIO45
AG3
GPIO46
AM3
GPIO9
AM2
GPIO10
P2
DEVSLP0/GPIO33
C4
SDIO_POWER_EN/GPIO70
L2
DEVSLP1/GPIO38
N5
DEVSLP2/GPIO39
V2
SPKR/GPIO81
HASWELL-MCP-E-ULT_BGA1168
@
HASWELL_MCP_E
GPIO
10 OF 19
CPU/ MISC
LPIO
+3VALW_PCH
PCH_OPI_RCOMP
GSPI0_CS/GPIO83
GSPI0_CLK/GPIO84 GSPI0_MISO/GPIO85 GSPI0_MOSI/GPIO86
GSPI1_CS/GPIO87
GSPI1_CLK/GPIO88 GSPI1_MISO/GPIO89
GSPI_MOSI/GPIO90 UART0_RXD/GPIO91
UART0_TXD/GPIO92 UART0_RTS/GPIO93 UART0_CTS/GPIO94
UART1_RXD/GPIO0 UART1_TXD/GPIO1
UART1_RST/GPIO2 UART1_CTS/GPIO3
I2C0_SDA/GPIO4 I2C0_SCL/GPIO5 I2C1_SDA/GPIO6 I2C1_SCL/GPIO7
SDIO_CLK/GPIO64
SDIO_CMD/GPIO65
SDIO_D0/GPIO66 SDIO_D1/GPIO67 SDIO_D2/GPIO68 SDIO_D3/GPIO69
R247 10K_0402_5%@
1 2
THERMTRIP
RCIN/GPIO82
SERIRQ
RSVD RSVD
Rev1p2
D60 V4 T4 AW15 AF20 AB21
R6 L6 N6 L8 R7 L5 N7 K2 J1 K3 J2 G1 K4 G2 J3 J4 F2 F3 G4 F1 E3 F4 D3 E4 C3 E2
2
H_THERMTRIP#
SERIRQ PCH_OPIRCOMP
PCH_GPIO83 PCH_GPIO84 PCH_GPIO85 PCH_GPIO86 PCH_GPIO87 PCH_GPIO88 PCH_GPIO89 PCH_GPIO90 PCH_GPIO91 PCH_GPIO92 PCH_GPIO93 PCH_GPIO94 PCH_GPIO0 PCH_GPIO1 PCH_GPIO2 PCH_GPIO3 PCH_I2C0_SDA PCH_I2C0_SCL PCH_I2C1_SDA PCH_I2C1_SCL PCH_GPIO64 PCH_GPIO65 PCH_GPIO66 PCH_GPIO67 PCH_GPIO68 PCH_GPIO69
EC_LID_OUT#
1: Intel ME TLS wi th conf i dent ial i ty
*
(Have internal PD)
PCH_GPIO86
1 2
R272 1K_0402_5%@ R273 1K_0402_5%
1 2
GSPI0_MOSI / GPIO86 : Boot BIOS Strap
1: ENABLED
0: SPI ROM
*
2013/10/01 2014/05/24
2013/10/01 2014/05/24
2013/10/01 2014/05/24
(Have internal PD)
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
R2605
SR@
R2604
DR@
R312
BW@
R221
HW@
+3VALW_PCH
12
1 2
12
1 2
4
A5WAH Pre MP 0819 SR for PU, DR for PD
GPIO28
CPU INFO
Dual Rank Single Rank 1
GPIO27
CPU INFO
Haswell Boradwell
0
Security Classification
Security Classification
0 1
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
T106@ T32@
+3VS
+1.05VS_VTT
1 2
R275
2.2K_0402_5%
12
R144 1K_0402_5%
R145
49.9_0402_1%
+3VS +3VS
R274
2.2K_0402_5%
2.2K_0402_5%
1 2
1 2
1
EC_KBRST# <36> SERIRQ <36,37>
PVT modify 01/06 change PCH GPIO4/GPIO5 to PCH_I2C0_SDA/PCH_I2C0_S CL
+3VS
1 2
R276
2.2K_0402_5%
1 2
1 2
R269 1K_0402_5%@
PCH_I2C0_SDA <27> PCH_I2C0_SCL <27> PCH_I2C1_SDA <37> PCH_I2C1_SCL <37>
Touch Screen
Touch Pad
PCH_SPKR
R277
SPKR / GPIO81 : NO REBOOT
1: ENABLED
0: DISABLED
*
PCH_GPIO66
(Have internal PD)
R270 1K_0402_5%@
1 2
SDIO_D0 / GPIO66 : Top-Block Swap Override
1: ENABLED
0: DISABLED*(Have internal PD)
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Re v
Size Document Number Re v
Size Document Number Re v
Custom
Custom
Custom
Date : Sheet of
Date : Sheet of
Date : Sheet of
Compal Electronics, Inc.
BDW MCP(6/11) GPIO,LPIO
BDW MCP(6/11) GPIO,LPIO
BDW MCP(6/11) GPIO,LPIO
A5WAH M/B LA-B991P
A5WAH M/B LA-B991P
A5WAH M/B LA-B991P
1
9 54Friday, October 17, 2014
9 54Friday, October 17, 2014
9 54Friday, October 17, 2014
1.0
1.0
1.0
5
4
3
2
1
www.laptopblue.vn
D D
U1K
PEG_GTX_HRX_N0 PEG_GTX_C_HRX_N0 PEG_GTX_HRX_P0 PEG_GTX_C_HRX_P0
PEG_HTX_C_GRX_N0 PEG_HTX_GRX_N0
PEG_GTX_HRX_N1 PEG_GTX_C_HRX_N1 PEG_GTX_HRX_P1 PEG_GTX_C_HRX_P1
VGA
C C
PCIE LAN
WLAN
PEG_GTX_HRX_N[0..3] <17> PEG_GTX_HRX_P[0..3] <17>
PEG_HTX_C_GRX_N[0..3] <17> PEG_HTX_C_GRX_P[0..3] <17>
B B
PEG_HTX_C_GRX_N1 PEG_HTX_GRX_N1
PEG_GTX_HRX_N2 PEG_GTX_C_HRX_N2 PEG_GTX_HRX_P2
PEG_HTX_C_GRX_P2 PEG_HTX_GRX_P2 PEG_GTX_HRX_N3 PEG_GTX_C_HRX_N3
PEG_GTX_HRX_P3 PEG_GTX_C_HRX_P3 PEG_HTX_C_GRX_N3 PEG_HTX_GRX_N3
PCIE_PRX_DTX_N3<31> PCIE_PRX_DTX_P3<31>
PCIE_PTX_C_DRX_N3<31> PCIE_PTX_C_DRX_P3<31>
PCIE_PRX_DTX_N4<33> PCIE_PRX_DTX_P4<33>
PCIE_PTX_C_DRX_N4<33> PCIE_PTX_C_DRX_P4<33>
C76 0.22U_0402_10V6KVGA@
1 2 1 2
C77 0.22U_0402_10V6KVGA@
1 2
C78 0.22U_0402_10V6KVGA@ C79 0.22U_0402_10V6KVGA@
1 2 1 2
C80 0.22U_0402_10V6KVGA@ C81 0.22U_0402_10V6KVGA@
1 2
C82 0.22U_0402_10V6KVGA@
1 2
C83 0.22U_0402_10V6KVGA@
1 2
C84 0.22U_0402_10V6KVGA@
1 2 1 2
C85 0.22U_0402_10V6KVGA@ C86 0.22U_0402_10V6KVGA@
1 2 1 2
C87 0.22U_0402_10V6KVGA@
1 2
C88 0.22U_0402_10V6KVGA@ C89 0.22U_0402_10V6KVGA@
1 2 1 2
C90 0.22U_0402_10V6KVGA@ C91 0.22U_0402_10V6KVGA@
1 2
C155 0.1U_0402_16V7K C160 0.1U_0402_16V7K
C156 0.1U_0402_16V7K C157 0.1U_0402_16V7K
+1.05VS_AUSB3PLL
R232 3.01K_0402_1%
1 2 1 2
R155 0_0603_5%@
Trace width=12~15 mil, Spcing=12 mils Max trace length= 500 m il
1 2 1 2
1 2 1 2
F10
PERN5_L0
E10
PERP5_L0
C23
PEG_HTX_GRX_P0PEG_HTX_C_GRX_P0
PEG_HTX_GRX_P1PEG_HTX_C_GRX_P1
PEG_GTX_C_HRX_P2 PEG_HTX_GRX_N2PEG_HTX_C_GRX_N2
PEG_HTX_GRX_P3PEG_HTX_C_GRX_P3 PCIE_PRX_DTX_N3
PCIE_PRX_DTX_P3 PCIE_PTX_DRX_N3
PCIE_PTX_DRX_P3 PCIE_PRX_DTX_N4
PCIE_PRX_DTX_P4 PCIE_PTX_DRX_N4
PCIE_PTX_DRX_P4
T33 @ T34 @
PCIE_RCOMP PCIE_IREF
PETN5_L0
C22
PETP5_L0
F8
PERN5_L1
E8
PERP5_L1
B23
PETN5_L1
A23
PETP5_L1
H10
PERN5_L2
G10
PERP5_L2
B21
PETN5_L2
C21
PETP5_L2
E6
PERN5_L3
F6
PERP5_L3
B22
PETN5_L3
A21
PETP5_L3
G11
PERN3
F11
PERP3
C29
PETN3
B30
PETP3
F13
PERN4
G13
PERP4
B29
PETN4
A29
PETP4
G17
PERN1/USB3RN3
F17
PERP1/USB3RP3
C30
PETN1/USB3TN3
C31
PETP1/USB3TP3
F15
PERN2/USB3RN4
G15
PERP2/USB3RP4
B31
PETN2/USB3TN4
A31
PETP2/USB3TP4
E15
RSVD
E13
RSVD
A27
PCIE_RCOMP
B27
PCIE_IREF
HASWELL-MCP-E-ULT_BGA1168
@
HASWELL_MCP_E
PCIe
USB3.0 P3 / PCIE P1
USB3.0 P4 / PCIE P2
11 OF 19
USB
USB3.0 P1
USB3.0 P2
USB2N0 USB2P0
USB2N1 USB2P1
USB2N2 USB2P2
USB2N3 USB2P3
USB2N4 USB2P4
USB2N5 USB2P5
USB2N6 USB2P6
USB2N7 USB2P7
USB3RN1 USB3RP1
USB3TN1 USB3TP1
USB3RN2 USB3RP2
USB3TN2 USB3TP2
USBRBIAS USBRBIAS
RSVD RSVD
OC0/GPIO40 OC1/GPIO41 OC2/GPIO42 OC3/GPIO43
Rev1p2
AN8 AM8
AR7 AT7
AR8 AP8
AR10 AT10
AM15 AL15
AM13 AN13
AP11 AN11
AR13 AP13
G20 H20
C33 B34
E18 F18
B33 A33
AJ10 AJ11 AN10 AM10
AL3 AT1 AH2 AV3
USBRBIAS
T35@ T36@
USB_OC0# USB_OC1# PCH_GPIO42 PCH_GPIO43
USB20_N0 USB20_P0
USB20_N1 USB20_P1
USB20_N2 USB20_P2
USB20_N4 USB20_P4
USB20_N5 USB20_P5
USB20_N6 USB20_P6
USB20_N7 USB20_P7
R154 22.6_0402_1%
1 2
USB20_N0 <35> USB20_P0 <35>
USB20_N1 <35> USB20_P1 <35>
USB20_N2 <35> USB20_P2 <35>
USB20_N4 <33> USB20_P4 <33>
USB20_N5 <27> USB20_P5 <27>
USB20_N6 <27> USB20_P6 <27>
USB20_N7 <35> USB20_P7 <35>
PCH_USB3_RX0_N <35> PCH_USB3_RX0_P <35>
PCH_USB3_TX0_N <35> PCH_USB3_TX0_P <35>
USB_OC0# <9,35> USB_OC1# <9> PCH_GPIO42 <9> PCH_GPIO43 <9>
USB2 Port 0 (USB3.0 P0)
USB2 Port 1
USB2 Port 2
Mini Card(WLAN+BT)
Touch Screen
DVT modify 11/12
Camera
change to USB port setting
Finger Print
USB3 Port 0
CAD note: Route single-end 50-ohms and max 450-mils length. Recommended minimum spacing to other signal traces is 15 mils
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2013/10/01 2014/05/24
2013/10/01 2014/05/24
2013/10/01 2014/05/24
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Re v
Size Document Number Re v
Size Document Number Re v
Custom
Custom
Custom
Date : Sheet of
Date : Sheet of
2
Date : Sheet of
Compal Electronics, Inc.
BDW MCP(7/11) PCIE,USB
BDW MCP(7/11) PCIE,USB
BDW MCP(7/11) PCIE,USB
A5WAH M/B LA-B991P
A5WAH M/B LA-B991P
A5WAH M/B LA-B991P
1
1.0
1.0
10 54Friday, October 17, 2014
10 54Friday, October 17, 2014
10 54Friday, October 17, 2014
1.0
5
4
3
2
1
www.laptopblue.vn
+1.35V +1.35V_CPU
D D
Shark Bay ULT have internal gate for VDDQ
+3VS
12
R422
100K_0402_5%
@
VCCST_PG_EC<8,36>
C C
2 3
74AUP1G07GW_TSSOP5
SVID ALERT
+1.05VS_VTT
12
R171 75_0402_1%
R172
VR_ALERT#<48>
43_0402_1%
SVID DATA
B B
VR_SVID_DATA<48>
R177
100_0402_1%
VCC_SENSE_R
VSS_SENSE_R<13>
R233
100_0402_1%
R174 0_0402_5%
@
12
+CPU_CORE
12
Note: 0 ohm P LACED CLOSE TO CPU
@
@
12
J6
@
1 2
JUMP_43X118
U16
NC1VCC A
Y
GND
Place the CPU resistors close to CPU
H_CPU_SVIDALRT#
12
+1.05VS_VTT
Place the CPU resistors close to CPU
12
R173 130_0402_1%
VIDSOUT
12
R178 0_0402_5%
12
R235 0_0402_5%
+3VALW_PCH
5
VCCST_PG_EC_R
4
+1.05VS_VTT
R309
10K_0402_5%
VCC_SENSE <48>
VSS_SENSE <48>
12
R166 0_0402_5%
@
1 2
VCCST_PWRGD <36,46>
+1.05VS_VTT
R169 150_0402_1%
@
1 2
R170 10K_0402_5%
@
1 2
@
C163
1 2
0.1U_0402_16V4Z
@
CPU_PWR_DEBUG
VCCST_PG_EC_R
+1.05VS_VTT
1
C6
2
22U_0805_6.3V6M
Intel DG request
1U_0402_6.3V6K
C7
1
@
2
VR_SVID_CLK<48>
+VCCIOA_OUT
VR_ON<48>
VGATE<8,48>
CPU_PWR_DEBUG
+1.05VS_VTT
R164
PVT modify 01/06 R167, R168 change to R-short
+1.35V_CPU
+CPU_CORE
+VCCIO_OUT
12
0_0603_5%@
1 2
1 2 1 2
1 2
Reserved Only
+1.05VS_VTT
+CPU_CORE
VCC_SENSE_R
H_CPU_SVIDALRT# H_CPU_SVIDCLK
R1650_0402_5% @
VIDSOUT VCCST_PG_EC_R
PCH_VR_EN
R1670_0402_5% @
VR_READY
R1680_0402_5% @ C167
@
0.1U_0402_16V4Z
T37 @ T38 @
T39 @ T40 @
T41 @
T42 @ T43 @ T44 @
T45 @ T46 @ T47 @ T48 @ T98 @ T142 @ T143 @ T144 @ T141 @ T140 @ T147 @ T145 @ T146 @
+1.35V_CPU
1
@
2
L59 J58
AH26
AJ31 AJ33 AJ37
AN33
AP43
AR48
AY35 AY40 AY44 AY50
F59 N58
AC58
E63
AB23
A59 E20
AD23
AA23 AE59
L62
N63
L63 B59 F60 C59
D63 H59 P62 P60 P61 N59 N61 T59
AD60 AD59
AA59
AE60 AC59 AG58
U59 V59
AC22
AE22
AE23
AB57 AD57 AG57
C24 C28 C32
VDDQ DECOUPLING
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
C8
C9
1
2
U1L
RSVD RSVD
VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ
VCC RSVD RSVD
VCC_SENSE RSVD VCCIO_OUT VCCIOA_OUT RSVD RSVD RSVD
VIDALERT VIDSCLK VIDSOUT VCCST_PWRGD VR_EN VR_READY
VSS PWR_DEBUG VSS RSVD_TP RSVD_TP RSVD_TP RSVD_TP RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD
VCCST VCCST VCCST
VCC VCC VCC VCC VCC VCC
HASWELL-MCP-E-ULT_BGA1168
@
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
C10
1
2
10U_0603_6.3V6M
C11
1
1
C12
2
2
HASWELL_MCP_E
HSW ULT POWER
12 OF 19
EMC@
10U_0603_6.3V6M
1
C13
2
C36
VCC
C40
VCC
C44
VCC
C48
VCC
C52
VCC
C56
VCC
E23
VCC
E25
VCC
E27
VCC
E29
VCC
E31
VCC
E33
VCC
E35
VCC
E37
VCC
E39
VCC
E41
VCC
E43
VCC
E45
VCC
E47
VCC
E49
VCC
E51
VCC
E53
VCC
E55
VCC
E57
VCC
F24
VCC
F28
VCC
F32
VCC
F36
VCC
F40
VCC
F44
VCC
F48
VCC
F52
VCC
F56
VCC
G23
VCC
G25
VCC
G27
VCC
G29
VCC
G31
VCC
G33
VCC
G35
VCC
G37
VCC
G39
VCC
G41
VCC
G43
VCC
G45
VCC
G47
VCC
G49
VCC
G51
VCC
G53
VCC
G55
VCC
G57
VCC
H23
VCC
J23
VCC
K23
VCC
K57
VCC
L22
VCC
M23
VCC
M57
VCC
P57
VCC
U57
VCC
W57
VCC
Rev1p2
EMC@
10U_0603_6.3V6M
1
C14
2
+1.35V : 470UF/2V/7343 *2 10UF/6.3V/0603 * 6
2.2UF/6.3V/0402 * 4
10U_0603_6.3V6M
10U_0603_6.3V6M
1
C15
2
10U_0603_6.3V6M
1
1
C16
C17
2
2
+CPU_CORE
1
+
C18
330U_2.5V_M
2
SF000006S00 330U 2.5V H4.2 17mohm OSCON
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2013/10/01 2014/05/24
2013/10/01 2014/05/24
2013/10/01 2014/05/24
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Re v
Size Document Number Re v
Size Document Number Re v
Custom
Custom
Custom
Date : Sheet of
Date : Sheet of
2
Date : Sheet of
Compal Electronics, Inc.
BDW MCP(8/11) Power
BDW MCP(8/11) Power
BDW MCP(8/11) Power
A5WAH M/B LA-B991P
A5WAH M/B LA-B991P
A5WAH M/B LA-B991P
1
1.0
1.0
11 54Friday, October 17, 2014
11 54Friday, October 17, 2014
11 54Friday, October 17, 2014
1.0
5
4
3
2
1
www.laptopblue.vn
D D
+1.05VS_VTT
1
SF000006R00 220U 6.3V OSCON
+
C408
220U_6.3V_M
ESR 17mohm@100Khz
2
Near PJ601
+1.05VS_VTT +1.05VS_AUSB3PLL
L1
1 2
2.2UH_LQM2MPN2R2NG0L_30%
Idc 1.2A Rdc 0.11ohm +/-30%
C C
1 2
L2
2.2UH_LQM2MPN2R2NG0L_30%
Idc 1.2A Rdc 0.11ohm +/-30%
1 2
L3
2.2UH_LQM2MPN2R2NG0L_30%
Idc 1.2A Rdc 0.11ohm +/-30%
+1.05VS_VTT +1.05VS_AXCK_DCB
1 2
L4
2.2UH_LQM2MPN2R2NG0L_30%
Idc 1.2A Rdc 0.11ohm +/-30%
1 2
L5
2.2UH_LQM2MPN2R2NG0L_30%
Idc 1.2A Rdc 0.11ohm +/-30%
B B
C42 1U_0402_6.3V6K C32 100U_1206_6.3V6M
+1.05VS_ASATA3PLL
C46 1U_0402_6.3V6K C61 100U_1206_6.3V6M
+1.05VS_APLLOPI
C47 1U_0402_6.3V6K C22 100U_1206_6.3V6M
C48 1U_0402_6.3V6K C23 100U_1206_6.3V6M
+1.05VS_AXCK_LCPLL
C49 1U_0402_6.3V6K C24 100U_1206_6.3V6M
1 2 1 2
1 2 1 2
1 2 1 2
1 2 1 2
1 2 1 2
Near B18
Near B11
Near AA21
Near J18
Near A20
+1.05VS_VTT
1
1
1
C21
C20
1U_0402_6.3V6K
2
2
2
1U_0402_6.3V6K
Near K9 Near L10 Near M9
Near J17 Near R21
C31 1U_0402_6.3V6K
EMC@
HDA --> 3.3V or 1.5V I2C --> 1.8V
Near AC9 Near AH10 Near V8
+1.05VS_VTT
+1.05VS_AUSB3PLL
+1.05VS_ASATA3PLL
+1.05VS_APLLOPI
12
+1.05VS_AXCK_DCB
+1.05VS_AXCK_LCPLL
C57 1U_0402_6.3V6K
12
C56 1U_0402_6.3V6K
12
+3VALW_PCH
C38 1U_0402_6.3V6K
C28 22U_0805_6.3V6M
12
C59
@
0.1U_0402_16V4Z
12
C29
12
22U_0805_6.3V6M
+3VS
+3VALW_PCH
T105 @
T116 @
+3VALW_PCH
T100 @ T101 @ T102 @
U1M
K9
VCCHSIO
L10
VCCHSIO
M9
VCCHSIO
N8
VCC1_05
P9
VCC1_05
B18
VCCUSB3PLL
B11
VCCSATA3PLL
Y20
RSVD
AA21
VCCAPLL
W21
VCCAPLL
J13
DCPSUS3
AH14
VCCHDA
AH13
DCPSUS2
AC9
VCCSUS3_3
AA9
VCCSUS3_3
AH10
VCCDSW3_3
V8
VCC3_3
W9
VCC3_3
J18
VCCCLK
K19
VCCCLK
A20
VCCACLKPLL
J17
VCCCLK
R21
VCCCLK
T21
VCCCLK
K18
RSVD
M20
RSVD
V21
RSVD
AE20
VCCSUS3_3
AE21
VCCSUS3_3
HASWELL-MCP-E-ULT_BGA1168
@
HASWELL_MCP_E
mPHY
OPI
USB3
AXALIA/HDA
VRM/USB2/AZALIA
GPIO/LCC
LPT LP POWER
13 OF 19
RTC
SPI
CORE
THERMAL SENSOR
SDIO/PLSS
SUS OSCILLATOR
USB2
VCCSUS3_3
VCCRTC DCPRTC
VCCSPI
VCCASW VCCASW
VCC1_05 VCC1_05 VCC1_05 VCC1_05
VCC1_05 DCPSUSBYP DCPSUSBYP
VCCASW VCCASW
VCCASW DCPSUS1 DCPSUS1
VCCTS1_5
VCC3_3 VCC3_3
VCCSDIO
VCCSDIO
DCPSUS4
RSVD VCC1_05 VCC1_05
Rev1p2
+3VALW_PCH
C30 1U_0402_6.3V6K
AH11 AG10 AE7
+VCCRTCEXT
C54 0.1U_0402_16V4Z
+3V_SPI
Y8
C58 0.1U_0402_16V4Z
AG14 AG13
J11
C27 10U_0603_6.3V6M C33 1U_0402_6.3V6K
H11 H15
C40 10U_0603_6.3V6M
AE8
EMC@
AF22
+PCH_VCCDSW
AG19 AG20 AE9 AF9 AG8 AD10 AD8
J15 K14 K16
U8 T9
AB8
AC20 AG16 AG17
R209 0_0402_5%
C36 22U_0805_6.3V6M C37 1U_0402_6.3V6K C43 1U_0402_6.3V6K@
C55 0.1U_0402_16V4Z
1 2
C44 1U_0402_6.3V6K
1 2
C53 1U_0402_6.3V6K@
1 2 1 2
C25 100U_1206_6.3V6M@
T103@
+1.05VS_VTT
C45 1U_0402_6.3V6K
1 2
1 2
1 2
@
1 2 1 2 1 2
1 2 1 2 1 2
+RTCVCC
12
+1.05VS_VTT +1.05VS_VTT
1 2
@
+PCH_VCCDSW_R
+1.05VS_VTT
+1.5VS +3VS
+3VS
@
C2567 0.47U_0402_6.3V6K
1 2
1U_0402_6.3V6K
1 2
C41
+RTCVCC
1
1
@
C52
C51
2
1U_0402_6.3V6K
0.1U_0402_16V4Z
+3VALW_PCH
Broadwell only Intel recommends a 0.47uF boot strap capacitor to be placed between V 3.3DSW and DcpSUSByp power rail to support in-rush current.
1
@
C50
2
2
0.1U_0402_16V4Z
+3VALW TO +3VALW(PCH AUX Power)
Short J8 for PCH VCCSUS3.3
+3VALW +3VALW_PCH
J8
@
JUMP_43X39
112
2
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2013/10/01 2014/05/24
2013/10/01 2014/05/24
2013/10/01 2014/05/24
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Re v
Size Document Number Re v
Size Document Number Re v
Custom
Custom
Custom
Date : Sheet of
Date : Sheet of
2
Date : Sheet of
Compal Electronics, Inc.
BDW MCP(9/11) Power
BDW MCP(9/11) Power
BDW MCP(9/11) Power
A5WAH M/B LA-B991P
A5WAH M/B LA-B991P
A5WAH M/B LA-B991P
1
1.0
1.0
12 54Friday, October 17, 2014
12 54Friday, October 17, 2014
12 54Friday, October 17, 2014
1.0
5
4
3
2
1
www.laptopblue.vn
D D
HASWELL_MCP_E
U1N
A11
VSS
A14
VSS
A18
VSS
A24
VSS
A28
VSS
A32
VSS
A36
VSS
A40
VSS
A44
VSS
A48
VSS
A52
VSS
A56
VSS
AA1
VSS
AA58
VSS
AB10
VSS
AB20
VSS
AB22
VSS
AB7
VSS
AC61
VSS
AD21
VSS
AD3
C C
B B
VSS
AD63
VSS
AE10
VSS
AE5
VSS
AE58
VSS
AF11
VSS
AF12
VSS
AF14
VSS
AF15
VSS
AF17
VSS
AF18
VSS
AG1
VSS
AG11
VSS
AG21
VSS
AG23
VSS
AG60
VSS
AG61
VSS
AG62
VSS
AG63
VSS
AH17
VSS
AH19
VSS
AH20
VSS
AH22
VSS
AH24
VSS
AH28
VSS
AH30
VSS
AH32
VSS
AH34
VSS
AH36
VSS
AH38
VSS
AH40
VSS
AH42
VSS
AH44
VSS
AH49
VSS
AH51
VSS
AH53
VSS
AH55
VSS
AH57
VSS
AJ13
VSS
AJ14
VSS
AJ23
VSS
AJ25
VSS
AJ27
VSS
AJ29
VSS
HASWELL-MCP-E-ULT_BGA1168
@
14 OF 19
Rev1p2
AJ35
VSS
AJ39
VSS
AJ41
VSS
AJ43
VSS
AJ45
VSS
AJ47
VSS
AJ50
VSS
AJ52
VSS
AJ54
VSS
AJ56
VSS
AJ58
VSS
AJ60
VSS
AJ63
VSS
AK23
VSS
AK3
VSS
AK52
VSS
AL10
VSS
AL13
VSS
AL17
VSS
AL20
VSS
AL22
VSS
AL23
VSS
AL26
VSS
AL29
VSS
AL31
VSS
AL33
VSS
AL36
VSS
AL39
VSS
AL40
VSS
AL45
VSS
AL46
VSS
AL51
VSS
AL52
VSS
AL54
VSS
AL57
VSS
AL60
VSS
AL61
VSS
AM1
VSS
AM17
VSS
AM23
VSS
AM31
VSS
AM52
VSS
AN17
VSS
AN23
VSS
AN31
VSS
AN32
VSS
AN35
VSS
AN36
VSS
AN39
VSS
AN40
VSS
AN42
VSS
AN43
VSS
AN45
VSS
AN46
VSS
AN48
VSS
AN49
VSS
AN51
VSS
AN52
VSS
AN60
VSS
AN63
VSS
AN7
VSS
AP10
VSS
AP17
VSS
AP20
VSS
AP22 AP23 AP26 AP29
AP31 AP38 AP39 AP48 AP52 AP54 AP57 AR11 AR15 AR17 AR23 AR31 AR33 AR39 AR43 AR49
AR52 AT13 AT35 AT37 AT40 AT42 AT43 AT46 AT49 AT61 AT62 AT63
AU16 AU18 AU20 AU22 AU24 AU26 AU28 AU30 AU33 AU51 AU53 AU55 AU57 AU59 AV14 AV16 AV20 AV24 AV28 AV33 AV34 AV36 AV39 AV41 AV43 AV46 AV49 AV51 AV55
AP3
AR5
AU1
HASWELL_MCP_E
U1O
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
HASWELL-MCP-E-ULT_BGA1168
@
15 OF 19
Rev1p2
U1P
AV59
VSS
AV8
VSS
AW16
VSS
AW24
VSS
AW33
VSS
AW35
VSS
AW37
VSS
AW4
VSS
AW40
VSS
AW42
VSS
AW44
VSS
AW47
VSS
AW50
VSS
AW51
VSS
AW59
VSS
AW60
VSS
AY11
VSS
AY16
VSS
AY18
VSS
AY22
VSS
AY24
VSS
AY26
VSS
AY30
VSS
AY33
VSS
AY4
VSS
AY51
VSS
AY53
VSS
AY57
VSS
AY59
VSS
AY6
VSS
B20
VSS
B24
VSS
B26
VSS
B28
VSS
B32
VSS
B36
VSS
B4
VSS
B40
VSS
B44
VSS
B48
VSS
B52
VSS
B56
VSS
B60
VSS
C11
VSS
C14
VSS
C18
VSS
C20
VSS
C25
VSS
C27
VSS
C38
VSS
C39
VSS
C57
VSS
D12
VSS
D14
VSS
D18
VSS
D2
VSS
D21
VSS
D23
VSS
D25
VSS
D26
VSS
D27
VSS
D29
VSS
D30
VSS
D31
VSS
D33 D34 D35 D37 D38 D39 D41 D42 D43 D45 D46 D47 D49
D50 D51 D53 D54 D55 D57 D59 D62
E11 E17 F20 F26 F30 F34 F38 F42 F46 F50 F54 F58 F61 G18 G22
H13
HASWELL_MCP_E
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
D5
VSS VSS VSS VSS VSS VSS VSS VSS VSS
D8
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
G3
VSS
G5
VSS
G6
VSS
G8
VSS VSS
HASWELL-MCP-E-ULT_BGA1168
@
16 OF 19
VSS_SENSE
Rev1p2
H17
VSS
H57
VSS
J10
VSS
J22
VSS
J59
VSS
J63
VSS
K1
VSS
K12
VSS
L13
VSS
L15
VSS
L17
VSS
L18
VSS
L20
VSS
L58
VSS
L61
VSS
L7
VSS
M22
VSS
N10
VSS
N3
VSS
P59
VSS
P63
VSS
R10
VSS
R22
VSS
R8
VSS
T1
VSS
T58
VSS
U20
VSS
U22
VSS
U61
VSS
U9
VSS
V10
VSS
V3
VSS
V7
VSS
W20
VSS
W22
VSS
Y10
VSS
Y59
VSS
Y63
VSS
V58
VSS
AH46
VSS
V23
VSS
E62 AH16
VSS
VSS_SENSE_R <11>
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2013/10/01 2014/05/24
2013/10/01 2014/05/24
2013/10/01 2014/05/24
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Re v
Size Document Number Re v
Size Document Number Re v
Custom
Custom
Custom
Date : Sheet of
Date : Sheet of
2
Date : Sheet of
Compal Electronics, Inc.
HSW MCP(10/11) GND
HSW MCP(10/11) GND
HSW MCP(10/11) GND
A5WAH M/B LA-B991P
A5WAH M/B LA-B991P
A5WAH M/B LA-B991P
1
1.0
1.0
13 54Friday, October 17, 2014
13 54Friday, October 17, 2014
13 54Friday, October 17, 2014
1.0
5
at t ached t o E mbedded Di spl ay Port
4
3
2
1
www.laptopblue.vn
D D
U1Q
DC_TEST_AY2_AW2 DC_TEST_AY3_AW3
T49 @
DC_TEST_AY61_AW61 DC_TEST_AY62_AW62
T50 @
DC_TEST_A3_B3 DC_TEST_A61_B61 DC_TEST_B62_B63
DC_TEST_C1_C2
C C
B B
T104 @ T107 @ T108 @ T166 @ T167 @
T169 @ T170 @ T171 @ T172 @ T182 @ T181 @ T180 @ T179 @ T178 @ T177 @
T176 @ T175 @ T174 @ T173 @
CFG0 CFG1 CFG2 CFG3 CFG4 CFG5 CFG6 CFG7 CFG8 CFG9 CFG10 CFG11 CFG12 CFG13 CFG14 CFG15
CFG16 CFG18 CFG17 CFG19
CFG_RCOMP
TD_IREF
T90 @ T91 @
T92 @ T93 @ T94 @
AY2
DAISY_CHAIN_NCTF_AY2
AY3
DAISY_CHAIN_NCTF_AY3
AY60
DAISY_CHAIN_NCTF_AY60
AY61
DAISY_CHAIN_NCTF_AY61
AY62
DAISY_CHAIN_NCTF_AY62
B2
DAISY_CHAIN_NCTF_B2
B3
DAISY_CHAIN_NCTF_B3
B61
DAISY_CHAIN_NCTF_B61
B62
DAISY_CHAIN_NCTF_B62
B63
DAISY_CHAIN_NCTF_B63
C1
DAISY_CHAIN_NCTF_C1
C2
DAISY_CHAIN_NCTF_C2
HASWELL-MCP-E-ULT_BGA1168
@
U1S
AC60
CFG0
AC62
CFG1
AC63
CFG2
AA63
CFG3
AA60
CFG4
Y62
CFG5
Y61
CFG6
Y60
CFG7
V62
CFG8
V61
CFG9
V60
CFG10
U60
CFG11
T63
CFG12
T62
CFG13
T61
CFG14
T60
CFG15
AA62
CFG16
U63
CFG18
AA61
CFG17
U62
CFG19
V63
CFG_RCOMP
A5
RSVD
E1
RSVD
D1
RSVD
J20
RSVD
H18
RSVD
B12
TD_IREF
HASWELL-MCP-E-ULT_BGA1168
@
HASWELL_MCP_E
17 OF 19
HASWELL_MCP_E
RESERVED
19 OF 19
DAISY_CHAIN_NCTF_A3 DAISY_CHAIN_NCTF_A4
DAISY_CHAIN_NCTF_A60 DAISY_CHAIN_NCTF_A61 DAISY_CHAIN_NCTF_A62
DAISY_CHAIN_NCTF_AV1 DAISY_CHAIN_NCTF_AW1 DAISY_CHAIN_NCTF_AW2 DAISY_CHAIN_NCTF_AW3
DAISY_CHAIN_NCTF_AW61 DAISY_CHAIN_NCTF_AW62 DAISY_CHAIN_NCTF_AW63
Rev1p2
PROC_OPI_RCOMP
RSVD_TP RSVD_TP
RSVD_TP RSVD_TP
RSVD
RSVD_TP RSVD_TP
RSVD_TP
RSVD RSVD
RSVD
RSVD RSVD
RSVD RSVD
Rev1p2
VSS VSS
A3 A4
A60 A61 A62 AV1 AW1 AW2 AW3
DC_TEST_AY61_AW61
AW61
DC_TEST_AY62_AW62
AW62 AW63
AV63 AU63
C63 C62 B43
A51 B51
L60 N60 W23
Y22 AY15
AV62 D58
P22 N21
P20 R20
DC_TEST_A3_B3
DC_TEST_A61_B61
DC_TEST_AY2_AW2 DC_TEST_AY3_AW3
T75@ T76@
T77@ T78@T168 @ T79@
T80@ T81@
T82@ T83@ T84@
T85@
OPI_COMP
T86@ T87@
T88@ T89@
T51 @ T52 @ T53 @
T58@ T59@ T60@
T61@ T62@
T63@
T54 @
T55 @ T56 @ T57 @
U1R
AT2
RSVD
AU44
RSVD
AV44
RSVD
D15
RSVD
F22
RSVD
H22
RSVD
J21
RSVD
HASWELL-MCP-E-ULT_BGA1168
@
CFG Straps for Processor
Physical Debug Enable (DFX Privacy)
CFG3
HASWELL_MCP_E
18 OF 19
CFG3
12
R224 1K_0402_5%
@
1: DISABLED
0: ENABLED; SET DFX ENABLED BIT IN DEBUG INTERFACE MSR
CFG4
12
R225 1K_0402_5%
RSVD RSVD RSVD RSVD
RSVD RSVD RSVD RSVD RSVD RSVD RSVD
Rev1p2
N23 R23 T23 U10
AL1 AM11 AP7 AU10 AU15 AW14 AY14
T64@ T65@ T66@ T67@
T68@ T69@ T70@ T71@ T72@ T73@ T74@
CFG_RCOMP
R222 49.9_0402_1% R223 49.9_0402_1% R226 8.2K_0402_5%
A A
5
12
OPI_COMP
12 12
TD_IREF
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2013/10/01 2014/05/24
2013/10/01 2014/05/24
2013/10/01 2014/05/24
Display Port Presence Strap
CFG4
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
1 : Disabled; No Physical Display Port
0 : Enabled; An external Display Port device is connected to the Embedded Display Port
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Re v
Size Document Number Re v
Size Document Number Re v
Custom
Custom
Custom
Date : Sheet of
Date : Sheet of
Date : Sheet of
Compal Electronics, Inc.
BDW MCP(11/11) RSVD
BDW MCP(11/11) RSVD
BDW MCP(11/11) RSVD
A5WAH M/B LA-B991P
A5WAH M/B LA-B991P
A5WAH M/B LA-B991P
1
14 54Friday, October 17, 2014
14 54Friday, October 17, 2014
14 54Friday, October 17, 2014
1.0
1.0
1.0
A
SA_DIMM_VREFDQ<5>
C158
0.022U_0402_25V7K
1 1
Layout Note: Place near JDIMM1
+1.35V
C107
1U_0402_6.3V6K
1
@
2
2 2
+1.35V
C111
10U_0603_6.3V6M
1
1
2
2
+1.35V
C115
10U_0603_6.3V6M
1
1
@
2
2
3 3
4 4
+0.675VS
C121
1U_0402_6.3V6K
1
@
@
2
Layout Note: Place near JDIMM1.203,204
R176
24.9_0402_1%
A5WAH PVT: ESD request add
EMC@
C108
1U_0402_6.3V6K
C109
1U_0402_6.3V6K
1
1
2
2
C113
10U_0603_6.3V6M
C112
10U_0603_6.3V6M
1
1
@
2
2
EMC@
C116
10U_0603_6.3V6M
C117
10U_0603_6.3V6M
1
2
C122
1U_0402_6.3V6K
C123
1U_0402_6.3V6K
1
1
2
2
1 2
1
@
2
12
@
C110
1U_0402_6.3V6K
1
2
C114
10U_0603_6.3V6M
1
@
+
C118
330U_2.5V_M
2
SF000006S00 330U 2.5V H4.2 17mohm OSCON
C124
1U_0402_6.3V6K
1
2
R293 2_0402_1%
+1.35V
12
R54
1.8K_0402_1%
12
R185
1.8K_0402_1%
All VREF traces should have 10 mil trace width
DDRA_CKE0_DIMMA<5>
DDRA_CS1_DIMMA#<5>
EMC@
C161
10U_0603_6.3V6M
1
2
+3VS
+0.675VS
+V_DDR_REFA
2.2U_0402_6.3V6M C106
0.1U_0402_16V4Z
C105
1
1
@
2
2
DDRA_CKE0_DIMMA
DDRA_CS1_DIMMA#
10P_0402_50V8J
C126
1
2
EMC@
DDR_A_BS2
@
1 2
DDR_A_BS2<5>
SA_CLK_DDR0<5> SA_CLK_DDR#0<5>
DDR_A_BS0<5> DDR_A_WE#<5>
DDR_A_CAS#<5>
C125
0.1U_0402_16V4Z
1
2
B
+1.35V +1.35V
www.laptopblue.vn
DDR_A_D13 DDR_A_D8
DDR_A_D14 DDR_A_D10
DDR_A_D29 DDR_A_D28
DDR_A_DQS#3 DDR_A_DQS3
DDR_A_D30 DDR_A_D31
DDR_A_D44 DDR_A_D41
DDR_A_DQS#5 DDR_A_DQS5
DDR_A_D43 DDR_A_D47
DDR_A_D51 DDR_A_D50
DDR_A_D49 DDR_A_D48
DDR_A_MA12 DDR_A_MA9
DDR_A_MA8 DDR_A_MA5
DDR_A_MA3 DDR_A_MA1
SA_CLK_DDR0 SA_CLK_DDR#0
DDR_A_MA10 DDR_A_BS0
DDR_A_WE# DDR_A_CAS#
DDR_A_MA13
DDR_A_D0 DDR_A_D1
DDR_A_DQS#0 DDR_A_DQS0
DDR_A_D2 DDR_A_D6
DDR_A_D21 DDR_A_D20
DDR_A_D17 DDR_A_D16
DDR_A_D36 DDR_A_D33
DDR_A_DQS#4 DDR_A_DQS4
DDR_A_D34 DDR_A_D38
DDR_A_D62 DDR_A_D58
DDR_A_D60 DDR_A_D61
R211
0_0402_5%
@
1 2
R212
0_0402_5%
JDIMM1
VREF_DQ1VSS1
3
VSS2
5
DQ0
7
DQ1
9
VSS4
11
DM0
13
VSS5
15
DQ2
17
DQ3
19
VSS7
21
DQ8
23
DQ9
25
VSS9
27
DQS#1 DQS129RESET# VSS1131VSS12
33
DQ10
35
DQ11 VSS1337VSS14
39
DQ16
41
DQ17 VSS1543VSS16
45
DQS#2
47
DQS2
49
VSS18
51
DQ18
53
DQ19
55
VSS20
57
DQ24
59
DQ25 VSS2261DQS#3
63
DM3 VSS2365VSS24
67
DQ26
69
DQ27 VSS2571VSS26
73
CKE0
75
VDD1
77
NC1
79
BA2
81
VDD3
83
A12/BC#
85
A9
87
VDD5
89
A8
91
A5
93
VDD7
95
A3
97
A1
99
VDD9
101
CK0
103
CK0#
105
VDD11
107
A10/AP
109
BA0
111
VDD13
113
WE#
115
CAS#
117
VDD15
119
A13
121
S1#
123
VDD17
125
NCTEST
127
VSS27
129
DQ32
131
DQ33
133
VSS29
135
DQS#4
137
DQS4
139
VSS32
141
DQ34
143
DQ35
145
VSS34
147
DQ40
149
DQ41
151
VSS36
153
DM5
155
VSS37
157
DQ42
159
DQ43
161
VSS39
163
DQ48
165
DQ49
167
VSS41
169
DQS#6
171
DQS6
173
VSS44
175
DQ50
177
DQ51
179
VSS46
181
DQ56
183
DQ57
185
VSS48
187
DM7
189
VSS49
191
DQ58
193
DQ59
195
VSS51
197
SA0
199
VDDSPD
201
SA1
203
VTT1
205
G1
LCN_DAN06-K4406-0100
CONN@
2 4
DQ4
6
DQ5
8
VSS3
10
DQS#0
12
DQS0
14
VSS6
16
DQ6
18
DQ7
20
VSS8
22
DQ12
24
DQ13
26
VSS10
28
DM1
30 32 34
DQ14
36
DQ15
38 40
DQ20
42
DQ21
44 46
DM2
48
VSS17
50
DQ22
52
DQ23
54
VSS19
56
DQ28
58
DQ29
60
VSS21
62 64
DQS3
66 68
DQ30
70
DQ31
72
74
CKE1
76
VDD2
78
A15
80
A14
82
VDD4
84
A11
86
A7
88
VDD6
90
A6
92
A4
94
VDD8
96
A2
98
A0
100
VDD10
102
CK1
104
CK1#
106
VDD12
108
BA1
110
RAS#
112
VDD14
114
S0#
116
ODT0
118
VDD16
120
ODT1
122
NC2
124
VDD18
126
VREF_CA
128
VSS28
130
DQ36
132
DQ37
134
VSS30
136
DM4
138
VSS31
140
DQ38
142
DQ39
144
VSS33
146
DQ44
148
DQ45
150
VSS35
152
DQS#5
154
DQS5
156
VSS38
158
DQ46
160
DQ47
162
VSS40
164
DQ52
166
DQ53
168
VSS42
170
DM6
172
VSS43
174
DQ54
176
DQ55
178
VSS45
180
DQ60
182
DQ61
184
VSS47
186
DQS#7
188
DQS7
190
VSS50
192
DQ62
194
DQ63
196
VSS52
198
EVENT#
200
SDA
202
SCL
204
VTT2
206
G2
SP07000N300
DDR_A_D9 DDR_A_D12
DDR_A_DQS#1 DDR_A_DQS1
DDR_A_D15 DDR_A_D11
DDR_A_D25 DDR_A_D24
DIMM_DRAMRST# DDR_A_D27
DDR_A_D26 DDR_A_D45
DDR_A_D40
DDR_A_D42 DDR_A_D46
DDR_A_D52 DDR_A_D53
DDR_A_DQS#6 DDR_A_DQS6
DDR_A_D54 DDR_A_D55
DDRA_CKE1_DIMMA DDR_A_MA15
DDR_A_MA14 DDR_A_MA11
DDR_A_MA7 DDR_A_MA6
DDR_A_MA4 DDR_A_MA2
DDR_A_MA0 SA_CLK_DDR1
SA_CLK_DDR#1 DDR_A_BS1
DDR_A_RAS# DDRA_CS0_DIMMA#
SA_ODT0 SA_ODT1
+VREF_CA DDR_A_D5
DDR_A_D4
DDR_A_D3 DDR_A_D7
DDR_A_D18 DDR_A_D19
DDR_A_DQS#2 DDR_A_DQS2
DDR_A_D22 DDR_A_D23
DDR_A_D37 DDR_A_D32
DDR_A_D35 DDR_A_D39
DDR_A_D63 DDR_A_D59
DDR_A_DQS#7 DDR_A_DQS7
DDR_A_D56 DDR_A_D57
D_CK_SDATA
D_CK_SCLK
+0.675VS
Channel A
C
DIMM_DRAMRST# <4,16>
DDRA_CKE1_DIMMA <5>
SA_CLK_DDR1 <5> SA_CLK_DDR#1 <5>
DDR_A_BS1 <5> DDR_A_RAS# <5>
DDRA_CS0_DIMMA# <5>
@
D_CK_SDATA <7,16,39> D_CK_SCLK <7,16,39>
DDR_PG_CTRL<4>
2.2U_0402_6.3V6M
0.1U_0402_16V4Z
C119
1
1
2
2
+1.35V
C120
2 3
DDR_A_DQS#[0..7] <5>
DDR_A_DQS[0..7] <5>
DDR_A_D[0..63] <5>
DDR_A_MA[0..15] <5>
12
R56
1.8K_0402_1% R296
1 2
R295
1.8K_0402_1%
2_0402_1%
+VREF_CA <16>
12
0.1U_0402_16V4Z C34
1
@
2
U45
NC1VCC A
Y
GND
74AUP1G07GW_TSSOP5
100P_0402_50V8J
1
@
C162
0.022U_0402_25V7K
2
12
R294
@
24.9_0402_1%
+1.35V
5
4
XEMC@
C2144
SM_DIMM_VREFCA <5>
+5VALW
1 2
1
2
D
R186 100K_0402_5%
@
<Address: SA1:SA0=00>
+5VS
1 2
1
XEMC@
100P_0402_50V8J
2
C2145
+1.35V
R191 100K_0402_5%
DDR_VTT_PG_CTRL <45>
Q18 LBSS138LT1G_SOT-23-3
13
D
2
G
S
M_A_B_DIMM_ODT
PVT modify 12/31 EMI add C2144 EMI reserved C2145
1 2
R187
66.5_0402_1%
R188
1 2
66.5_0402_1%
1 2
R189
66.5_0402_1%
R190
1 2
66.5_0402_1%
E
SA_ODT0
SA_ODT1
SB_ODT0
SB_ODT1
SB_ODT0 <16>
SB_ODT1 <16>
DIMM_1 H:4mm DIS for Standard type UMA for Reverse type
A
B
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2013/10/01 2014/05/24
2013/10/01 2014/05/24
2013/10/01 2014/05/24
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
D
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Re v
Size Document Number Re v
Size Document Number Re v
Custom
Custom
Custom
Date : Sheet of
Date : Sheet of
Date : Sheet of
Compal Electronics, Inc.
DDRIII DIMMA
DDRIII DIMMA
DDRIII DIMMA
A5WAH M/B LA-B991P
A5WAH M/B LA-B991P
A5WAH M/B LA-B991P
E
15 54Friday, October 17, 2014
15 54Friday, October 17, 2014
15 54Friday, October 17, 2014
1.0
1.0
1.0
A
SB_DIMM_VREFDQ<5>
C159
0.022U_0402_25V7K
1 1
Layout Note: Place near JDIMM2
+1.35V
C129
1U_0402_6.3V6K
1
@
2
2 2
+1.35V
C133
10U_0603_6.3V6M
1
1
2
2
+1.35V
C137
10U_0603_6.3V6M
1
1
2
2
3 3
4 4
+0.675VS
C143
1U_0402_6.3V6K
1
@
2
Layout Note: Place near JDIMM2.203,204
1U_0402_6.3V6K
1
2
C134
10U_0603_6.3V6M
C138
10U_0603_6.3V6M
1U_0402_6.3V6K
1
2
24.9_0402_1%
C130
@
10U_0603_6.3V6M
1
2
10U_0603_6.3V6M
1
@
2
C144
R179
C131
1U_0402_6.3V6K
1
2
C135
1
2
C139
C145
1U_0402_6.3V6K
1
2
1 2
1
@
2
12
@
C132
1U_0402_6.3V6K
1
2
C136
10U_0603_6.3V6M
C146
1U_0402_6.3V6K
1
@
2
R297 2_0402_1%
+1.35V
12
R57
1.8K_0402_1%
12
All VREF traces should have 10 mil trace width
+0.675VS
R213
1.8K_0402_1%
DDRB_CKE0_DIMMB<5>
DDR_B_BS2<5>
SB_CLK_DDR0<5> SB_CLK_DDR#0<5>
DDR_B_BS0<5> DDR_B_WE#<5>
DDR_B_CAS#<5>
DDRB_CS1_DIMMB#<5>
10K_0402_5%
+3VS
@
R229
1
2
1
2
+3VS
+V_DDR_REFB
2.2U_0402_6.3V6M C127
C128
0.1U_0402_16V4Z
1
2
DDRB_CKE0_DIMMB
DDR_B_BS2
DDRB_CS1_DIMMB#
1 2
10P_0402_50V8J
C147
0.1U_0402_16V4Z
C148
1
@
2
EMC@
1 2
B
+1.35V +1.35V
www.laptopblue.vn
DDR_B_D8 DDR_B_D14
DDR_B_D10 DDR_B_D11
DDR_B_D28 DDR_B_D29
DDR_B_DQS#3 DDR_B_DQS3
DDR_B_D26 DDR_B_D27
DDR_B_D40 DDR_B_D41
DDR_B_DQS#5 DDR_B_DQS5
DDR_B_D46 DDR_B_D42
DDR_B_D56 DDR_B_D57
DDR_B_D59 DDR_B_D58
DDR_B_MA12 DDR_B_MA9
DDR_B_MA8 DDR_B_MA5
DDR_B_MA3 DDR_B_MA1
SB_CLK_DDR0 SB_CLK_DDR#0
DDR_B_MA10 DDR_B_BS0
DDR_B_WE# DDR_B_CAS#
DDR_B_MA13
DDR_B_D4 DDR_B_D1
DDR_B_DQS#0 DDR_B_DQS0
DDR_B_D3 DDR_B_D7
DDR_B_D21 DDR_B_D20
DDR_B_D22 DDR_B_D23
DDR_B_D36 DDR_B_D33
DDR_B_DQS#4 DDR_B_DQS4
DDR_B_D35 DDR_B_D39
DDR_B_D52 DDR_B_D49
DDR_B_D48 DDR_B_D53
R231
0_0402_5%
JDIMM2
VREF_DQ1VSS1
3
VSS2
5
DQ0
7
DQ1
9
VSS4
11
DM0
13
VSS5
15
DQ2
17
DQ3
19
VSS7
21
DQ8
23
DQ9
25
VSS9
27
DQS#1 DQS129RESET# VSS1131VSS12
33
DQ10
35
DQ11 VSS1337VSS14
39
DQ16
41
DQ17 VSS1543VSS16
45
DQS#2
47
DQS2
49
VSS18
51
DQ18
53
DQ19
55
VSS20
57
DQ24
59
DQ25 VSS2261DQS#3
63
DM3 VSS2365VSS24
67
DQ26
69
DQ27 VSS2571VSS26
73
CKE0
75
VDD1
77
NC1
79
BA2
81
VDD3
83
A12/BC#
85
A9
87
VDD5
89
A8
91
A5
93
VDD7
95
A3
97
A1
99
VDD9
101
CK0
103
CK0#
105
VDD11
107
A10/AP
109
BA0
111
VDD13
113
WE#
115
CAS#
117
VDD15
119
A13
121
S1#
123
VDD17
125
NCTEST
127
VSS27
129
DQ32
131
DQ33
133
VSS29
135
DQS#4
137
DQS4
139
VSS32
141
DQ34
143
DQ35
145
VSS34
147
DQ40
149
DQ41
151
VSS36
153
DM5
155
VSS37
157
DQ42
159
DQ43
161
VSS39
163
DQ48
165
DQ49
167
VSS41
169
DQS#6
171
DQS6
173
VSS44
175
DQ50
177
DQ51
179
VSS46
181
DQ56
183
DQ57
185
VSS48
187
DM7
189
VSS49
191
DQ58
193
DQ59
195
VSS51
197
SA0
199
VDDSPD
201
SA1
203
VTT1
205
G1
LCN_DAN06-K4406-0100
CONN@
2 4
DQ4
6
DQ5
8
VSS3
10
DQS#0
12
DQS0
14
VSS6
16
DQ6
18
DQ7
20
VSS8
22
DQ12
24
DQ13
26
VSS10
28
DM1
30 32 34
DQ14
36
DQ15
38 40
DQ20
42
DQ21
44 46
DM2
48
VSS17
50
DQ22
52
DQ23
54
VSS19
56
DQ28
58
DQ29
60
VSS21
62 64
DQS3
66 68
DQ30
70
DQ31
72
74
CKE1
76
VDD2
78
A15
80
A14
82
VDD4
84
A11
86
A7
88
VDD6
90
A6
92
A4
94
VDD8
96
A2
98
A0
100
VDD10
102
CK1
104
CK1#
106
VDD12
108
BA1
110
RAS#
112
VDD14
114
S0#
116
ODT0
118
VDD16
120
ODT1
122
NC2
124
VDD18
126
VREF_CA
128
VSS28
130
DQ36
132
DQ37
134
VSS30
136
DM4
138
VSS31
140
DQ38
142
DQ39
144
VSS33
146
DQ44
148
DQ45
150
VSS35
152
DQS#5
154
DQS5
156
VSS38
158
DQ46
160
DQ47
162
VSS40
164
DQ52
166
DQ53
168
VSS42
170
DM6
172
VSS43
174
DQ54
176
DQ55
178
VSS45
180
DQ60
182
DQ61
184
VSS47
186
DQS#7
188
DQS7
190
VSS50
192
DQ62
194
DQ63
196
VSS52
198
EVENT#
200
SDA
202
SCL
204
VTT2
206
G2
SP07000N300
DDR_B_D12 DDR_B_D9
DDR_B_DQS#1 DDR_B_DQS1
DDR_B_D13 DDR_B_D15
DDR_B_D25 DDR_B_D24
DIMM_DRAMRST# DDR_B_D30
DDR_B_D31 DDR_B_D45
DDR_B_D44
DDR_B_D47 DDR_B_D43
DDR_B_D61 DDR_B_D60
DDR_B_DQS#7 DDR_B_DQS7
DDR_B_D63 DDR_B_D62
DDRB_CKE1_DIMMB DDR_B_MA15
DDR_B_MA14 DDR_B_MA11
DDR_B_MA7 DDR_B_MA6
DDR_B_MA4 DDR_B_MA2
DDR_B_MA0 SB_CLK_DDR1
SB_CLK_DDR#1 DDR_B_BS1
DDR_B_RAS# DDRB_CS0_DIMMB#
SB_ODT0 SB_ODT1
+VREF_CA DDR_B_D5
DDR_B_D0
DDR_B_D2 DDR_B_D6
DDR_B_D16 DDR_B_D17
DDR_B_DQS#2 DDR_B_DQS2
DDR_B_D19 DDR_B_D18
DDR_B_D37 DDR_B_D32
DDR_B_D34 DDR_B_D38
DDR_B_D51 DDR_B_D55
DDR_B_DQS#6 DDR_B_DQS6
DDR_B_D54 DDR_B_D50
D_CK_SDATA
D_CK_SCLK
+0.675VS
Channel B
C
DIMM_DRAMRST# <4,15>
DDRB_CKE1_DIMMB <5>
SB_CLK_DDR1 <5> SB_CLK_DDR#1 <5>
DDR_B_BS1 <5> DDR_B_RAS# <5>
DDRB_CS0_DIMMB# <5> SB_ODT0 <15>
SB_ODT1 <15>
2.2U_0402_6.3V6M C141
0.1U_0402_16V4Z
1
1
@
2
2
D_CK_SDATA <7,15,39> D_CK_SCLK <7,15,39>
D
DDR_B_DQS#[0..7] <5>
DDR_B_DQS[0..7] <5>
DDR_B_D[0..63] <5>
DDR_B_MA[0..15] <5>
+VREF_CA <15>
C142
<Address: SA1:SA0=10>
E
DIMM_2 H:4mm DIS for Standard type UMA for Reverse type
A
B
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2013/10/01 2014/05/24
2013/10/01 2014/05/24
2013/10/01 2014/05/24
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
D
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Re v
Size Document Number Re v
Size Document Number Re v
Custom
Custom
Custom
Date : Sheet of
Date : Sheet of
Date : Sheet of
Compal Electronics, Inc.
DDRIII DIMMB
DDRIII DIMMB
DDRIII DIMMB
A5WAH M/B LA-B991P
A5WAH M/B LA-B991P
A5WAH M/B LA-B991P
E
16 54Friday, October 17, 2014
16 54Friday, October 17, 2014
16 54Friday, October 17, 2014
1.0
1.0
1.0
A
UGPU1A
PEG_HTX_C_GRX_P0<10> PEG_HTX_C_GRX_N0<10> PEG_HTX_C_GRX_P1<10> PEG_HTX_C_GRX_N1<10> PEG_HTX_C_GRX_P2<10> PEG_HTX_C_GRX_N2<10> PEG_HTX_C_GRX_P3<10> PEG_HTX_C_GRX_N3<10>
1 1
PEG_GTX_HRX_P0<10> PEG_GTX_HRX_N0<10> PEG_GTX_HRX_P1<10> PEG_GTX_HRX_N1<10> PEG_GTX_HRX_P2<10> PEG_GTX_HRX_N2<10> PEG_GTX_HRX_P3<10> PEG_GTX_HRX_N3<10>
2 2
VGA@
+3VSDGPU_AON
PEG_CLKREQ#<7>
3 3
1 2
R2009 10K_0402_5%
PEG_CLKREQ#
CLK_PEG_VGA<7>
CLK_PEG_VGA#<7>
PEX_TSTCLK_OUT+ PEX_TSTCLK_OUT-
@
12
R2010 200_0402_1%
R2011 2.49K_0402_1%
VGA@
12
PLTRST_VGA# PEX_TREMP
AG6
PEX_RX0
AG7
PEX_RX0_N
AF7
PEX_RX1
AE7
PEX_RX1_N
AE9
PEX_RX2
AF9
PEX_RX2_N
AG9
PEX_RX3
AG10
PEX_RX3_N
AF10
NC
AE10
NC
AE12
NC
AF12
NC
AG12
NC
AG13
NC
AF13
NC
AE13
NC
AE15
NC
AF15
NC
AG15
NC
AG16
NC
AF16
NC
AE16
NC
AE18
NC
AF18
NC
AG18
NC
AG19
NC
AF19
NC
AE19
NC
AE21
NC
AF21
NC
AG21
NC
AG22
NC
AC9
PEX_TX0
AB9
PEX_TX0_N
AB10
PEX_TX1
AC10
PEX_TX1_N
AD11
PEX_TX2
AC11
PEX_TX2_N
AC12
PEX_TX3
AB12
PEX_TX3_N
AB13
NC
AC13
NC
AD14
NC
AC14
NC
AC15
NC
AB15
NC
AB16
NC
AC16
NC
AD17
NC
AC17
NC
AC18
NC
AB18
NC
AB19
NC
AC19
NC
AD20
NC
AC20
NC
AC21
NC
AB21
NC
AD23
NC
AE23
NC
AF24
NC
AE24
NC
AG24
NC
AG25
NC
AE8
PEX_REFCLK
AD8
PEX_REFCLK_N
AC6
PEX_CLKREQ_N
AF22
PEX_TSTCLK_OUT
AE22
PEX_TSTCLK_OUT_N
AC7
PEX_RST_N
AF25
PEX_TERMP
GM108-ES-S-A1_FCBGA595
@
B
C
D
www.laptopblue.vn
Part 1 of 6
PCI EXPRESS
PEX_WAKE_NC
DACs
I2C GPIO
CLK
XTAL_OUTBUFF
GPIO0 GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6 GPIO7
OVERT
GPIO9 GPIO10 GPIO11 GPIO12 GPIO13 GPIO14 GPIO15 GPIO16 GPIO17 GPIO18 GPIO19 GPIO20 GPIO21
TSEN_VREF
I2CA_SCL I2CA_SDA
I2CB_SCL I2CB_SDA
I2CC_SCL
I2CC_SDA
I2CS_SCL I2CS_SDA
PLLVDD
SP_PLLVDD
XTAL_IN
XTAL_OUT XTAL_SSIN
NC NC NC
NC NC
NC NC
NC
C6 B2 D6 C7 F9 A3 A4 B6 A6 F8 C5 E7 D7 B4 B3 C3 D5 D4 C2 F7 E6 C4
AB6
AG3 AF4 AF3
AE3 AE4
W5 AE2 AF2
B7 A7
C9 C8
A9 B9
D9 D8
L6 M6
N6
C11
XTALIN
B10
XTALOUT XTAL_SSIN
A10
XTAL_OUTBUFF
C10
GC6_FB_EN
3VSDGPU_MAIN_EN GPU_EVENT#
GPIO8_OVERT GPIO9_ALERT
DGPU_VID ACIN_BUF
PSI
I2CS_SCL I2CS_SDA
+PLLVDD
GPU_PEX_RST_HOLD#
R2003 1.8K_0402_5%VGA@
1 2
R2004 1.8K_0402_5%VGA@
1 2
R2005 1.8K_0402_5%VGA@
1 2 1 2
R2006 1.8K_0402_5%VGA@ R2007 1.8K_0402_5%VGA@
1 2 1 2
R2008 1.8K_0402_5%VGA@
Place Under L6
VGA@
1 2
C2000 0.1U_0402_16V4Z
C2001
VGA@
1 2
+GPU_PLLVDD
Place Under M6
1 2
R2012 10K_0402_5%VGA@ R2013 10K_0402_5%VGA@
1 2
GC6_FB_EN <8>
3VSDGPU_MAIN_EN <40,51>
GPU_EVENT# <9>
N14x for GPIO8
N15x for OVERT
DGPU_VID <51>
PSI <51>
0.1U_0402_16V4Z
ACIN_BUF
D2000
RB751V-40_SOD323-2
VGA@
12
DGPU_AC_DETECT <9,36>
GPIO8_OVERT
GPIO9_ALERT
I2CS_SCL
I2CS_SDA
GPIO8_OVERT GPIO9_ALERT GPIO9_ALERT_GATE ACIN_BUF
GPU_EVENT# 3VSDGPU_MAIN_EN GPU_PEX_RST_HOLD# GC6_FB_EN
SYS_PEX_RST_MON# I2CS_SDA I2CS_SCL
PSI
VGA@
DMN66D0LDW-7_SOT363-6 Q2000A
VGA@
DMN66D0LDW-7_SOT363-6 Q2000B
+3VSDGPU_AON
VGA@
DMN66D0LDW-7_SOT363-6 Q2001A
+3VSDGPU_AON
VGA@
DMN66D0LDW-7_SOT363-6 Q2001B
10K_0804_8P4R_5%
10K_0804_8P4R_5%
R2056
@
1 2
R2000
1 2
R2001
R2052
PLTRST_VGA#
2
61
GPIO9_ALERT_GATE
5
34
2
61
5
34
RP2000
18 27 36 45
VGA@
RP2001
18 27 36 45
GC6@
12
10K_0402_5%
1.8K_0402_5%VGA@
1.8K_0402_5%VGA@
12
10K_0402_5%VGA@
GPU_OVERT <36>
GPU_ALERT <36>
EC_SMB_CK2 <7,36>
EC_SMB_DA2 <7,36>
+3VSDGPU_AON
+3VSDGPU_AON
+3VSDGPU_AON
GPIOII/O GPIO0 GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6 GPIO7 GPIO8 GPIO9 GPIO10
GPIO11
GPIO12 GPIO13 GPIO14 GPIO15 GPIO16 GPIO17 GPIO18 GPIO19 GPIO20 GPIO21 GPIO22 GPIO23 GPIO24
E
USAGE
GC6_FB_EN
I
O
MEM_VDD_CTL
O
LCD_BL_PWM
O
LCD_VCC
O
LCD_BL_EN
O
3V3_MAIN_EN
GPU_EVENT#
O
3D Vision SYS_PEX_RST_MON#
I
ALERT
I/O
MEM_VREF_CTL
O
O
PWM_VID
I
PWR_LEVEL
PSI
O
I HPD_A
HPD_C
I
RESERVED
HPD_D
I
HPD_E
I I
HPD_F or HPD_B Reserved
O
GPU_PEX_RST_HOLD#
D2001
2 3
BAV70W_SOT323-3
GC6@
R2016
1 2
NGC6@
0_0402_5%
+3VSDGPU_AON
5
U2001
VGA@
2
P
B
4
Y
1
A
G
+3VSDGPU_AON
3
12
1
DVT modify 11/20 use diode need to pull high use AND gate need to pull down
1
SYS_PEX_RST_MON#
R2055 10K_0402_5%
GC6@
1.5VS_DGPU_PWR_EN
12
R2014 10K_0402_5%
GC6@
12
PLTRST_VGA#
R2017 10K_0402_5%
VGA@
R2019 0_0402_5%
NGC6@
1 2
1.5VS_DGPU_PWR_EN <40,50>
SYS_PEX_RST_MON# <19>
B
PLL_VDD
0.1Ux1, 22Ux1 33ohm(ESR0.05)x1
SP_PLLVDD+VI D_PLLVDD
0.1Ux2, 4.7Ux1,22Ux1 180ohm(ESR0.2)x 1
PLT_RST#
D2002
2
3
BAT54A-7-F_SOT23-3
GC6@
GC6_FB_EN
GC6 2.0 funct i on
VGA_PWROK<40,51>
PLT_RST#<8,36,37>
4 4
DGPU_HOLD_RST#<8,9>
SYS_PEX_RST_MON#
GPU_PEX_RST_HOLD#
DGPU_HOLD_RST#
MC74VHC1G08DFT2G_SC70-5
A
38mA
17mA
4.7U_0603_6.3V6K
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
SM010019400 3000ma 33ohm@100mhz DCR 0.05
+PLLVDD
1
C2003
VGA@
22U_0603_6.3V6M
2
Near GPU
1 2
L2000 CHILISIN PBY160808T-330Y-N
SM010028480 1500ma 180ohm@100mhz DCR 0.18
+GPU_PLLVDD
C2006
VGA@
1
2
L2001 BLM18PG181SN1D_2P
1
C2007
VGA@
22U_0603_6.3V6M
2
Near GPU
2013/10/01 2014/05/24
2013/10/01 2014/05/24
2013/10/01 2014/05/24
VGA@
VGA@
1 2
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
+1.05VSDGPU
D
27MHZ_10PF_7V27000023
3
XTALOUT XTALIN
VGA@
C2004
Crystals must have a max ESR of 80 ohm
3
GND
1
VGA@
2
Title
Title
Title
Size Document Number Re v
Size Document Number Re v
Size Document Number Re v
Custom
Custom
Custom
Date : Sheet of
Date : Sheet of
Date : Sheet of
4
10P_0402_50V8J
DVT modify 11/27 TXC recommend from 18P change to 10P X2000 from SJ100009700 change to SJ10000G300
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
A5WAH M/B LA-B991P
A5WAH M/B LA-B991P
A5WAH M/B LA-B991P
1
1
GND
X2000
2
C2005
N15X PEG 1/9
N15X PEG 1/9
N15X PEG 1/9
E
1
VGA@
2
10P_0402_50V8J
17 54Friday, October 17, 2014
17 54Friday, October 17, 2014
17 54Friday, October 17, 2014
1.0
1.0
1.0
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