How it Works
Acer
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A
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Aspire E5-575
Schematic
48 pgs2.66 Mb0
Schematic
2 pgs4.18 Mb2

Acer Aspire_E5_575 Schematic

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Dr-Bios.com
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ZAA Serials SKL ULT SYSTEM BLOCK DIAGRAM
IV@ : iGPU EV@ : Optimus KBL15@ :For Key/B 15" KBL17@ : For Key/B 17" KBL@ : Key/B backlight TPM@ : TPM GS@ :G-SENSOR TDI@ : Touch PAD I2C TSU@ : Toutch Screen (USB) TSI@ : Toutch Screen (I2C) GT3@ : GT3 CPU NAC@ : Non IOAC IOAC@ : For IOAC
P23
SP@ : Special part GC6@ : for GC6 FPD@ : for 8 Pin Finger/P. GKA@ : For kill GPU A-chanle. GKB@ : For kill GPU B-chanle. ROM@ : For SKL or KBL TYC@ : For Type-C
P21
X'TAL 27MHz
TPS25810
PTN36242
PCIE-6
PCIE-5
VRAM
GDDR5/ 1.35V
eDP Conn.
RTD2166
P22
P21
P21
HDMI Conn.
USB3 Port MB side USB3 port 2 USB3 port 1
LAN_CRD_COMBO RTL8411
P19~20
P23
P24
MINI CARD WLAN+BT
10/100/1G
VGA Conn.
Type-C connector
P30
P28
P25
X'TAL 25MHz
D D
SKY LAKE ULT 15W
MCP 1356pins
DDR4-SODIMM CHA
DDR4-SODIMM CHB
SATA - HDD Mai n & 2'nd
SATA ODD
C C
POA Finger/ print
CCD(Camera)
Touch Screen
Blue Tooth
I/O board
I/O Board Conn.USB2 IO*2
B B
Small/B Audio jack
P27
P23
P23
P30
P28
D-MIC
P26
P12
P13
P27
P27
Dual Channel DDR4
SATA0
SATA1
USB2-9
USB2-7
USB2-6
USB2-5
USB2-4
USB2-3
P6
BATTERY
Azalia
IMC
DC+GT3e
42 mm X 24 mm
SATA
Integrated PCH
USB2.0
DMIC_CLK0 DMIC_DATA0
RTC
IHDA
LPC
P2~P10
PCI-E x4 TX/RX
USB3.0/2.0
USB3.0/2.0
PCI-E x1
PCI-E x2
CLK
eDP
DP-2
DP-1
CLK
CLK
I2C_0
SPI
PCIE1-4
X4
EDP
DDI2
DDI1
USB3-1 & USB3-2
USB2-1 & USB2-2
X'TAL
32.768KHz
X'TAL 24MHz
SPI ROM 8M+4M
X1
X4
GPU
N16S-GTR
N16S-GT1
P7
P14~P18
X4
+5V_S5
PTN3366BS
M.2 SSD
X2
P24
P28
X1
X1
BOM
Cardreader CONN. 2in 1
P25
RJ45
P25
K/B BL Con.
EC
IT8987
P29
HALL SENSOR
3
P23
Touch PAD
P29
remove TPM from SKL , KBL keeps it.---- for B2 add POA FUNCTION, , add 0hm*4 between EC to POA conn & server VST * 7 pcs POA ( change FP power from 3v to 5v )
P31
Fan Driver
(Fan signal)
TPM(option)
P29
P27
BQ24780S
Batery C harger
TPS51225R
+3V/+5V
RT8237CZQW
+1V_S5
NB681GD-Z
+VCCOPC/+VCCEOPIO
2
G5316RZ1D
+1.2VSUS
P33
ISL95859HRT Z-T
+VCORE/VCCSA/VCCGT
P34
P35
ISL95808
VCCSA
P36
Thermal Protection
P37
UP1658RQKF
+VGPU_CORE
P38-39
RT8068AZQW
+1.05V_GFX/+3V_GFX +1.5V_GFX
P39
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
P7
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Block Diagram
Block Diagram
Block Diagram
P41
P42
P43
ZAA
ZAA
ZAA
148Friday, February 05, 2016
148Friday, February 05, 2016
1
148Friday, February 05, 2016
1A
1A
1A
Int. D -MIC
A A
CH6221M9A00 CAP CHIP 22U 6.3V(+-20%,X5R,0805)H1.25 CH6221M9A01 CAP CHIP 22U 6.3V(+-20%,X5R,0805)H1.25 CH6221M9A02 CAP CHIP 22U 6.3V(+-20%,X5R,0805)H1.25
ALC25 5
AUDIO CODEC
Speaker*2
P26
P26
LED
P29
K/B Con.
P29
5
4
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Dr-Bios.com
AJ0QKKQVT00 -->CPU(1356P)KBL 1.7G QKKQ(FCBGA) -----no use AJ0QKKSUT00 -->CPU(1356P)KBL 2.4G QKKS(FCBGA) AJ0QKJWQT02 -->CPU(1356P)KBL-U 2.6G QKJW(BGA) QCI PN ---- C-test
4
3
2
1
i3-6100U AJSR2EUUT07 i5-6200U AJSR2EYUT07 i7-6500U AJSR2EZRT07 i5-6267U AJSR2JK8T02--no use
D D
HDMI
To RTS2166 iC
+VCCIO
C C
+1V_VCCST
CPU_THRMTRIP#
R5291K_4
CATERR#
R78849.9/F_4
+VCCIO
R465 1K_4
B B
H_PROCHOT#
H_PROCHOT#<31,32,37>
Avoid 125Mhz
BPM#[0:7] Trace Length 1~6 inches Length match < 300 mils
H_PECI (50ohm) Route on microstrip only Spacing >18 mils Trace Length: 0.4~6.125 iches
INT_ HDMIT X2N<24> INT_ HDMIT X2P<24> INT_ HDMIT X1N<24> INT_ HDMIT X1P<24> INT_ HDMIT X0N<24> INT_ HDMIT X0P<24>
INT_ HDMIC LK-<24> INT_ HDMIC LK+<24>
DDI2_TXN0<22> DDI2_TXP0<22> DDI2_TXN1<22> DDI2_TXP1<22>
HDMI_DDCCLK_SW<24>
HDMI_DDCDATA_SW<24>
PCH_ODD_EN<27>
eDP_RCOMP Trace length < 100 mils Trace width = 20 mils Trace spacing = 25 mils
H_PECI<31>
SM_RCOMP[0:2] Trace length < 500 mils Trace width = 12~15 mils Trace spacing = 20 mils
H_PECI
THRMTRIP#
DGPU_PW_CTRL#<4>
TP4395 TP4394 TP4392 TP4393
CRT_CLK CRT_DATA
TP4390
EDP_RCOMP
R15424.9/F_4
R531 499/F_4 R530 100/F_4
Skylake ULT (DISPLAY,eDP)
AT16 AU16
D63 A54 C65 C63 A65
C55 D55 B54 C56
A6
A7 BA5 AY5
H66 H65
SKL_ULT
DDI
DISPLAY SIDEBANDS
+3V_S5 +3V_S5
+3V_S5 +3V_S5
+3V_S5 +3V_S5
U35D
CATERR# PECI PROCHOT# THERMTRIP# SKTOCC#
CPU MISC
BPM#[0] BPM#[1] BPM#[2] BPM#[3]
GPP_E3/CPU_GP0 GPP_E7/CPU_GP1 GPP_B3/CPU_GP2 GPP_B4/CPU_GP3
PROC_POPIRCOMP PCH_OPIRCOMP OPCE_RCOMP OPC_RCOMP
SP@SKL_ULT/BGA
<PART_SYM_NUM>
SKL_ULT
+3V_S5 +3V_S5 +3V_S5 +3V_S5
TP65
TP89 TP90 TP64 TP62
R635 49.9/F_4 R646 49.9/F_4 R158 49.9/F_4 R162 49.9/F_4
U35A
E55
DDI1_TXN[0]
F55
DDI1_TXP[0]
E58
DDI1_TXN[1]
F58
DDI1_TXP[1]
F53
DDI1_TXN[2]
G53
DDI1_TXP[2]
F56
DDI1_TXN[3]
G56
DDI1_TXP[3]
C50
DDI2_TXN[0]
D50
DDI2_TXP[0]
C52
DDI2_TXN[1]
D52
DDI2_TXP[1]
A50
DDI2_TXN[2]
B50
DDI2_TXP[2]
D51
DDI2_TXN[3]
C51
DDI2_TXP[3]
L13
GPP_E18/DDPB_CTRLCLK
L12
GPP_E19/DDPB_CTRLDATA
N7
GPP_E20/DDPC_CTRLCLK
N8
GPP_E21/DDPC_CTRLDATA
N11
GPP_E22/DDPD_CTRLCLK
N12
GPP_E23/DDPD_CTRLDATA
E52
EDP_RCOMP
SP@SKL_ULT/BGA
CATERR#
H_PROCHOT#_RH_PROCHOT# CPU_THRMTRIP#
XDP_BP M#0 XDP_BP M#1 XDP_BP M#2 XDP_BP M#3
EDP
+3V_S5
GPP_E13/DDPB_HPD0
+3V_S5
GPP_E14/DDPC_HPD1
+3V_S5
GPP_E15/DDPD_HPD2 GPP_E16/DDPE_HPD3
+3V_S5 +3V_S5
<PART_SYM_NUM>
EDP_TXN[0] EDP_TXP[0] EDP_TXN[1] EDP_TXP[1] EDP_TXN[2] EDP_TXP[2] EDP_TXN[3] EDP_TXP[3]
EDP_AUXN EDP_AUXP
EDP_DISP_UTIL
DDI1_AUXN DDI1_AUXP DDI2_AUXN DDI2_AUXP DDI3_AUXN DDI3_AUXP
GPP_E17/EDP_HPD
EDP_BKLTEN
EDP_BKLTCTL
EDP_VDDEN
JTAG
PROC_TCK
PROC_TDI PROC_TDO PROC_TMS
PROC_TRST#
PCH_JTAG_TCK
PCH_JTAG_TDI PCH_JTAG_TDO PCH_JTAG_TMS
PCH_TRST#
JTAGX
C47 C46 D46 C45 A45 B45 A47 B47
E45 F45
B52
G50 F50 E48
DDI2_AUXN
F48
DDI2_AUXP
G46 F46
L9 L7
PCH_DP_HPD
L6 N9
R571 *short_4
L10
EDP_HPD
R12 R11
PCH_BRIGHT
U13
B61
XDP_TC K0
D60
XDP_TD I_CPU
A61
XDP_TD O_CPU
C60
XDP_TM S_CPU
B59
PCH_TRST#
B56
XDP_TC K1
D59
XDP_TD I
A56
XDP_TD O
C59
XDP_TM S
C61
PCH_TRST#
A59
XDP_TC K0
R546 *0_4 R553 *0_4
PCH_TypeC_UPFb#
EDP_TXN0 <23> EDP_TXP0 <23> EDP_TXN1 <23> EDP_TXP1 <23> EDP_TXN2 <23> EDP_TXP2 <23> EDP_TXN3 <23> EDP_TXP3 <23>
EDP_AUXN <23> EDP_AUXP <23>
PCH_BRIGHTDP_UTIL
DDI2_AUXN <22> DDI2_AUXP <22>
SIO_EXT_SCI#
PCH_BLON < 23> PCH_BRIGHT <23>
EDP_VDD_EN <23>
R796 *short_4 R795 *short_4 R797 *short_4
If use Intel D CI USB 3.0 fix ture ne ed to short
1. XDP_TDO <--> XDP_TDO_CPU
2. XDP_TDI <--> XDP_TDI_CPU
3. XDP_TMS <--> XDP_TMS_CPU
eDP Panel
For 4K
INT_ HDMI_ HPD <24 > PCH_DP_HPD <22> PCH_TypeC_UPFb# <21> SIO_EXT_SCI# <31> EDP_HPD <23>
PCH JTAG
JTAG_TCK,JTAG_TMS Trace Length < 9000mils
XDP_TD I_CPU
XDP_TD O_CPU
XDP_TM S_CPU
DDI2_AUXN
DDI2_AUXP
R533 *100K_4
R532 *100K_4
Change for leakage
CRT_CLK CRT_DATA
SIO_EXT_SCI#
PCH_TypeC_UPFb#
PCH_DP_HPD EDP_HPD
R577 *2.2K_4 R152 2.2K_4
R781 20K/F_4
R11251 20K/F_4
For Type-C change
R564 100K_4 R563 100K_4
100k pull-down on PCH side
Change to +1V_VCCST 11/6
XDP_TD O
XDP_TM S XDP_TD I
XDP_TC K0
XDP_TC K0 XDP_TC K1
PCH_TRST#
2/16 ,XDP_TCK1,XDP_ TMS don't need pull up or pull down
R559 51_4 R514 51_4 R515 51_4
R513 *1K_4
R558 51_4 R537 *51_4 R534 51_4
+3V
+3V_S5
+3V
+3V_S5
MP remove(Intel)
+1V_VCCST
5/29 XDP_TCK0 R558 Stuff
+1V_VCCST
+1V_VCCST
2
R488
*1K_4
1 3
Q5 MMBT3904-7-F
3
Q31
FDV301N
1
R74 1K_4
2
SYS_SHDN# <31,33,40>
3
+VCCIO <5,8,32,34,37,40> +1V_VCCST <5,8,9,37>
2
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Friday, February 05, 2016
Date: Sheet of
Friday, February 05, 2016
Date: Sheet of
Friday, February 05, 2016
PROJECT :
Skylake 1/4 (DDI/eDP)
Skylake 1/4 (DDI/eDP)
Skylake 1/4 (DDI/eDP)
ZAA
ZAA
ZAA
248
248
1
248
1A
1A
1A
CPU thermal trip
+1V_VCCST
U33
A A
IMVP_ PWRG D<37>
2
*74AUP1G07GW
5
NC1VCC
A
GND3Y
R478 *0_4
5
C628
*0.1u/16V_4
4
+3V
12
R485 10K_4
IMVP_ PWRG D_3V
IMVP_ PWRG D_3V <8>
IMVP_ PWRG D_3V
THRMTRIP#
4
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Dr-Bios.com
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Change Data and DQS to interleave.
SKL ULT (DDR3L)SKL ULT (DDR3L)
U35C
DDR1_DQ[0]/DDR0_DQ[16] DDR1_DQ[1]/DDR0_DQ[17] DDR1_DQ[2]/DDR0_DQ[18] DDR1_DQ[3]/DDR0_DQ[19] DDR1_DQ[4]/DDR0_DQ[20] DDR1_DQ[5]/DDR0_DQ[21] DDR1_DQ[6]/DDR0_DQ[22] DDR1_DQ[7]/DDR0_DQ[23] DDR1_DQ[8]/DDR0_DQ[24] DDR1_DQ[9]/DDR0_DQ[25] DDR1_DQ[10]/DDR0_DQ[26] DDR1_DQ[11]/DDR0_DQ[27] DDR1_DQ[12]/DDR0_DQ[28] DDR1_DQ[13]/DDR0_DQ[29] DDR1_DQ[14]/DDR0_DQ[30] DDR1_DQ[15]/DDR0_DQ[31] DDR1_DQ[16]/DDR0_DQ[48] DDR1_DQ[17]/DDR0_DQ[49] DDR1_DQ[18]/DDR0_DQ[50] DDR1_DQ[19]/DDR0_DQ[51] DDR1_DQ[20]/DDR0_DQ[52] DDR1_DQ[21]/DDR0_DQ[53] DDR1_DQ[22]/DDR0_DQ[54] DDR1_DQ[23]/DDR0_DQ[55] DDR1_DQ[24]/DDR0_DQ[56] DDR1_DQ[25]/DDR0_DQ[57] DDR1_DQ[26]/DDR0_DQ[58] DDR1_DQ[27]/DDR0_DQ[59] DDR1_DQ[28]/DDR0_DQ[60] DDR1_DQ[29]/DDR0_DQ[61] DDR1_DQ[30]/DDR0_DQ[62] DDR1_DQ[31]/DDR0_DQ[63] DDR1_DQ[32]/DDR1_DQ[16] DDR1_DQ[33]/DDR1_DQ[17] DDR1_DQ[34]/DDR1_DQ[18] DDR1_DQ[35]/DDR1_DQ[19] DDR1_DQ[36]/DDR1_DQ[20] DDR1_DQ[37]/DDR1_DQ[21] DDR1_DQ[38]/DDR1_DQ[22] DDR1_DQ[39]/DDR1_DQ[23] DDR1_DQ[40]/DDR1_DQ[24] DDR1_DQ[41]/DDR1_DQ[25] DDR1_DQ[42]/DDR1_DQ[26] DDR1_DQ[43]/DDR1_DQ[27] DDR1_DQ[44]/DDR1_DQ[28] DDR1_DQ[45]/DDR1_DQ[29] DDR1_DQ[46]/DDR1_DQ[30] DDR1_DQ[47]/DDR1_DQ[31] DDR1_DQ[48] DDR1_DQ[49] DDR1_DQ[50] DDR1_DQ[51] DDR1_DQ[52] DDR1_DQ[53] DDR1_DQ[54] DDR1_DQ[55] DDR1_DQ[56] DDR1_DQ[57] DDR1_DQ[58] DDR1_DQ[59] DDR1_DQ[60] DDR1_DQ[61] DDR1_DQ[62] DDR1_DQ[63]
SP@SKL_ULT/BGA
12
*0.1u/16V_4
M_B_A[13:0]
C750
SKL_ULT
DDR1_MA[5]/DDR1_CAA[0]/DDR1_MA[5] DDR1_MA[9]/DDR1_CAA[1]/DDR1_MA[9] DDR1_MA[6]/DDR1_CAA[2]/DDR1_MA[6] DDR1_MA[8]/DDR1_CAA[3]/DDR1_MA[8] DDR1_MA[7]/DDR1_CAA[4]/DDR1_MA[7]
DDR1_BA[2]/DDR1_CAA[5]/DDR1_BG[0] DDR1_MA[12]/DDR1_CAA[6]/DDR1_MA[12] DDR1_MA[11]/DDR1_CAA[7]/DDR1_MA[11]
DDR1_MA[15]/DDR1_CAA[8]/DDR1_ACT# DDR1_MA[14]/DDR1_CAA[9]/DDR1_BG[1]
DDR1_MA[13]/DDR1_CAB[0]/DDR1_MA[13]
DDR1_CAS#/DDR1_CAB[1]/DDR1_MA[15]
DDR1_WE#/DDR1_CAB[2]/DDR1_MA[14]
DDR1_RAS#/DDR1_CAB[3]/DDR1_MA[16]
DDR1_BA[0]/DDR1_CAB[4]/DDR1_BA[0]
DDR1_MA[2]/DDR1_CAB[5]/DDR1_MA[2]
DDR1_BA[1]/DDR1_CAB[6]/DDR1_BA[1] DDR1_MA[10]/DDR1_CAB[7]/DDR1_MA[10]
DDR1_MA[1]/DDR1_CAB[8]/DDR1_MA[1] DDR1_MA[0]/DDR1_CAB[9]/DDR1_MA[0]
DDR1_DQSN[0]/DDR0_DQSN[2] DDR1_DQSP[0]/DDR0_DQSP[2] DDR1_DQSN[1]/DDR0_DQSN[3] DDR1_DQSP[1]/DDR0_DQSP[3] DDR1_DQSN[2]/DDR0_DQSN[6] DDR1_DQSP[2]/DDR0_DQSP[6] DDR1_DQSN[3]/DDR0_DQSN[7] DDR1_DQSP[3]/DDR0_DQSP[7] DDR1_DQSN[4]/DDR1_DQSN[2] DDR1_DQSP[4]/DDR1_DQSP[2] DDR1_DQSN[5]/DDR1_DQSN[3] DDR1_DQSP[5]/DDR1_DQSP[3]
DDR CH - B
<PART_SYM_NUM>
DDR3_DRAMRST# <12,1 3>
2
DDR1_CKN[0] DDR1_CKN[1] DDR1_CKP[0] DDR1_CKP[1]
DDR1_CKE[0] DDR1_CKE[1] DDR1_CKE[2] DDR1_CKE[3]
DDR1_CS#[0] DDR1_CS#[1] DDR1_ODT[0] DDR1_ODT[1]
DDR1_MA[3] DDR1_MA[4]
DDR1_DQSN[6] DDR1_DQSP[6] DDR1_DQSN[7] DDR1_DQSP[7]
DDR1_ALERT#
DDR1_PAR DRAM_RESET# DDR_RCOMP[0] DDR_RCOMP[1] DDR_RCOMP[2]
M_B_A[13:0] <13>
AN45 AN46 AP45 AP46
AN56 AP55 AN55 AP53
BB42 AY42 BA42 AW42
AY48 AP50 BA48 BB48 AP48 AP52 AN50 AN48 AN53 AN52
BA43 AY43 AY44 AW44 BB44 AY47 BA44 AW46 AY46 BA46 BB46 BA47
AH66 AH65 AG69 AG70 AR66 AR65 AR61 AR60 AT38 AR38 AT32 AR32 AR25 AR27 AR22 AR21
AN43 AP43 AT13 AR18 AT18 AU18
M_B_A5 M_B_A9 M_B_A6 M_B_A8 M_B_A7
M_B_A12 M_B_A11
M_B_A13
M_B_A2
M_B_A10 M_B_A1 M_B_A0 M_B_A3 M_B_A4
M_B_ALERT#
CPU_DRAMRST#
SM_RCOMP_0 SM_RCOMP_1 SM_RCOMP_2
M_B_CLK0# <13> M_B_CLK1# <13>
M_B_CLK0 <13> M_B_CLK1 <13>
M_B_CKE0 <13> M_B_CKE1 <13>
M_B_CS#0 <13> M_B_CS#1 <13> M_B_ODT0_DIMM <13> M_B_ODT1_DIMM <13>
M_B_BG#0 <13>
M_B_ACT# <13> M_B_BG#1 <13>
M_B_CAS# <13> M_B_WE# <13> M_B_RAS# <13> M_B_BA#0 <13>
M_B_BA#1 <13>
M_B_DQS#0 <13> M_B_DQS0 <13> M_B_DQS#1 <13> M_B_DQS1 <13> M_B_DQS#2 <13> M_B_DQS2 <13> M_B_DQS#3 <13> M_B_DQS3 <13> M_B_DQS#4 <13> M_B_DQS4 <13> M_B_DQS#5 <13> M_B_DQS5 <13> M_B_DQS#6 <13> M_B_DQS6 <13> M_B_DQS#7 <13> M_B_DQS7 <13>
M_B_ALERT# <13> M_B_PARITY <13>
!"#$%&'$(
SM_RCOMP_0
SM_RCOMP_1
SM_RCOMP_2
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Friday, February 05, 2016
Date: Sheet of
Friday, February 05, 2016
Date: Sheet of
Friday, February 05, 2016
PROJECT :
Skylake 2/3 (DDR3 I/F)
Skylake 2/3 (DDR3 I/F)
Skylake 2/3 (DDR3 I/F)
R685120/F_4
R67880.6/F_4
R681100/F_4
ZAA
ZAA
ZAA
348
348
1
348
1A
1A
1A
M_A_A[13:0]
SKL_ULT
DDR0_MA[5]/DDR0_CAA[0]/DDR0_MA[5] DDR0_MA[9]/DDR0_CAA[1]/DDR0_MA[9] DDR0_MA[6]/DDR0_CAA[2]/DDR0_MA[6] DDR0_MA[8]/DDR0_CAA[3]/DDR0_MA[8] DDR0_MA[7]/DDR0_CAA[4]/DDR0_MA[7]
DDR0_BA[2]/DDR0_CAA[5]/DDR0_BG[0] DDR0_MA[12]/DDR0_CAA[6]/DDR0_MA[12] DDR0_MA[11]/DDR0_CAA[7]/DDR0_MA[11]
DDR0_MA[15]/DDR0_CAA[8]/DDR0_ACT# DDR0_MA[14]/DDR0_CAA[9]/DDR0_BG[1]
DDR0_MA[13]/DDR0_CAB[0]/DDR0_MA[13]
DDR0_CAS#/DDR0_CAB[1]/DDR0_MA[15]
DDR0_WE#/DDR0_CAB[2]/DDR0_MA[14]
DDR0_RAS#/DDR0_CAB[3]/DDR0_MA[16]
DDR0_BA[0]/DDR0_CAB[4]/DDR0_BA[0]
DDR0_MA[2]/DDR0_CAB[5]/DDR0_MA[2]
DDR0_BA[1]/DDR0_CAB[6]/DDR0_BA[1] DDR0_MA[10]/DDR0_CAB[7]/DDR0_MA[10]
DDR0_MA[1]/DDR0_CAB[8]/DDR0_MA[1] DDR0_MA[0]/DDR0_CAB[9]/DDR0_MA[0]
DDR0_DQSN[2]/DDR0_DQSN[4] DDR0_DQSP[2]/DDR0_DQSP[4] DDR0_DQSN[3]/DDR0_DQSN[5] DDR0_DQSP[3]/DDR0_DQSP[5] DDR0_DQSN[4]/DDR1_DQSN[0] DDR0_DQSP[4]/DDR1_DQSP[0] DDR0_DQSN[5]/DDR1_DQSN[1] DDR0_DQSP[5]/DDR1_DQSP[1] DDR0_DQSN[6]/DDR1_DQSN[4] DDR0_DQSP[6]/DDR1_DQSP[4] DDR0_DQSN[7]/DDR1_DQSN[5] DDR0_DQSP[7]/DDR1_DQSP[5]
DDR CH - A
<PART_SYM_NUM>
M_A_A[13:0] <12>
DDR0_CKN[0] DDR0_CKP[0] DDR0_CKN[1] DDR0_CKP[1]
DDR0_CKE[0] DDR0_CKE[1] DDR0_CKE[2] DDR0_CKE[3]
DDR0_CS#[0] DDR0_CS#[1] DDR0_ODT[0] DDR0_ODT[1]
DDR0_MA[3] DDR0_MA[4]
DDR0_DQSN[0] DDR0_DQSP[0] DDR0_DQSN[1] DDR0_DQSP[1]
DDR0_ALERT#
DDR0_PAR
DDR_VREF_CA DDR0_VREF_DQ DDR1_VREF_DQ
DDR_VTT_CNTL
AU53 AT53 AU55 AT55
BA56 BB56 AW56 AY56
AU45 AU43 AT45 AT43
BA51
M_A_A5
BB54
M_A_A9
BA52
M_A_A6
AY52
M_A_A8
AW52
M_A_A7
AY55 AW54
M_A_A12
BA54
M_A_A11
BA55 AY54
AU46
M_A_A13
AU48 AT46 AU50 AU52 AY51
M_A_A2
AT48 AT50
M_A_A10
BB50
M_A_A1
AY50
M_A_A0
BA50
M_A_A3
BB52
M_A_A4
AM70 AM69 AT69 AT70 BA64 AY64 AY60 BA60 BA38 AY38 AY34 BA34 BA30 AY30 AY26 BA26
AW50
M_A_ALERT#
AT52
AY67 AY68 BA67
AW67
DDR_VTT_CTRL
R621 *10K_4
+VREF_CA_CPU
+VREFDQ_SB_M3
M_A_CLK0# <12>
M_A_CLK0 <12>
M_A_CLK1# <12>
M_A_CLK1 <12>
M_A_CKE0 <12> M_A_CKE1 <12>
M_A_CS#0 <12> M_A_CS#1 <12> M_A_ODT0_DIMM <12> M_A_ODT1_DIMM <12>
M_A_BG#0 <12>
M_A_ACT# <12> M_A_BG#1 <12>
M_A_CAS# <12> M_A_WE# <12> M_A_RAS# <12> M_A_BA#0 <12>
M_A_BA#1 <12>
M_A_DQS#0 <12> M_A_DQS0 <12> M_A_DQS#1 <12> M_A_DQS1 <12> M_A_DQS#2 <12> M_A_DQS2 <12> M_A_DQS#3 <12> M_A_DQS3 <12> M_A_DQS#4 <12> M_A_DQS4 <12> M_A_DQS#5 <12> M_A_DQS5 <12> M_A_DQS#6 <12> M_A_DQS6 <12> M_A_DQS#7 <12> M_A_DQS7 <12>
M_A_ALERT# <12> M_A_PARITY <12>
+VREFDQ_SA_M3
+1.2VSUS
2
1 3
Q35 *DTC144EU
TP4344
+3V_S5
M_B_DQ[63:0]<13>
For GDDR5 remove
R682 *100K_4
DDR_VTTT_PG_CTRL <36>
M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8
M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63
AF65 AF64 AK65 AK64 AF66 AF67 AK67 AK66 AF70 AF68 AH71 AH68 AF71 AF69 AH70 AH69 AT66 AU66 AP65 AN65 AN66 AP66 AT65 AU65 AT61 AU61 AP60 AN60 AN61 AP61 AT60 AU60 AU40 AT40 AT37 AU37 AR40 AP40 AP37 AR37 AT33 AU33 AU30 AT30 AR33 AP33 AR30 AP30 AU27 AT27 AT25 AU25 AP27 AN27 AN25 AP25 AT22 AU22 AU21 AT21 AN22 AP22 AP21 AN21
M_A_DQ[63:0]<12>
D D
C C
B B
M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8
M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63
U35B
AL71
DDR0_DQ[0]
AL68
DDR0_DQ[1]
AN68
DDR0_DQ[2]
AN69
DDR0_DQ[3]
AL70
DDR0_DQ[4]
AL69
DDR0_DQ[5]
AN70
DDR0_DQ[6]
AN71
DDR0_DQ[7]
AR70
DDR0_DQ[8]
AR68
DDR0_DQ[9]
AU71
DDR0_DQ[10]
AU68
DDR0_DQ[11]
AR71
DDR0_DQ[12]
AR69
DDR0_DQ[13]
AU70
DDR0_DQ[14]
AU69
DDR0_DQ[15]
BB65
DDR0_DQ[16]/DDR0_DQ[32]
AW65
DDR0_DQ[17]/DDR0_DQ[33]
AW63
DDR0_DQ[18]/DDR0_DQ[34]
AY63
DDR0_DQ[19]/DDR0_DQ[35]
BA65
DDR0_DQ[20]/DDR0_DQ[36]
AY65
DDR0_DQ[21]/DDR0_DQ[37]
BA63
DDR0_DQ[22]/DDR0_DQ[38]
BB63
DDR0_DQ[23]/DDR0_DQ[39]
BA61
DDR0_DQ[24]/DDR0_DQ[40]
AW61
DDR0_DQ[25]/DDR0_DQ[41]
BB59
DDR0_DQ[26]/DDR0_DQ[42]
AW59
DDR0_DQ[27]/DDR0_DQ[43]
BB61
DDR0_DQ[28]/DDR0_DQ[44]
AY61
DDR0_DQ[29]/DDR0_DQ[45]
BA59
DDR0_DQ[30]/DDR0_DQ[46]
AY59
DDR0_DQ[31]/DDR0_DQ[47]
AY39
DDR0_DQ[32]/DDR1_DQ[0]
AW39
DDR0_DQ[33]/DDR1_DQ[1]
AY37
DDR0_DQ[34]/DDR1_DQ[2]
AW37
DDR0_DQ[35]/DDR1_DQ[3]
BB39
DDR0_DQ[36]/DDR1_DQ[4]
BA39
DDR0_DQ[37]/DDR1_DQ[5]
BA37
DDR0_DQ[38]/DDR1_DQ[6]
BB37
DDR0_DQ[39]/DDR1_DQ[7]
AY35
DDR0_DQ[40]/DDR1_DQ[8]
AW35
DDR0_DQ[41]/DDR1_DQ[9]
AY33
DDR0_DQ[42]/DDR1_DQ[10]
AW33
DDR0_DQ[43]/DDR1_DQ[11]
BB35
DDR0_DQ[44]/DDR1_DQ[12]
BA35
DDR0_DQ[45]/DDR1_DQ[13]
BA33
DDR0_DQ[46]/DDR1_DQ[14]
BB33
DDR0_DQ[47]/DDR1_DQ[15]
AY31
DDR0_DQ[48]/DDR1_DQ[32]
AW31
DDR0_DQ[49]/DDR1_DQ[33]
AY29
DDR0_DQ[50]/DDR1_DQ[34]
AW29
DDR0_DQ[51]/DDR1_DQ[35]
BB31
DDR0_DQ[52]/DDR1_DQ[36]
BA31
DDR0_DQ[53]/DDR1_DQ[37]
BA29
DDR0_DQ[54]/DDR1_DQ[38]
BB29
DDR0_DQ[55]/DDR1_DQ[39]
AY27
DDR0_DQ[56]/DDR1_DQ[40]
AW27
DDR0_DQ[57]/DDR1_DQ[41]
AY25
DDR0_DQ[58]/DDR1_DQ[42]
AW25
DDR0_DQ[59]/DDR1_DQ[43]
BB27
DDR0_DQ[60]/DDR1_DQ[44]
BA27
DDR0_DQ[61]/DDR1_DQ[45]
BA25
DDR0_DQ[62]/DDR1_DQ[46]
BB25
DDR0_DQ[63]/DDR1_DQ[47]
SP@SKL_ULT/BGA
For Sx ,stuff Q? in DDR_VTT_CNTL
+3V_S5 <2,4,6,7,8,9,11,21,25,27,28,29,31,33,35,36,41> +1.2VSUS <5,12,13,36>
DRAMRST
+1.2VSUS
A A
CPU DRAM
CPU_DRAMRST#
5
4
3
12
R679 470_4
R670 *short_4
Page 4
5
Dr-Bios.com
4
3
2
1
SKL ULT (SIDEBAND ) GPIO
H_PECI (50ohm) Route on microstrip only Spacing >18 mils Trace Length: 0.4~6.125 iches
H_PWRGOOD (50ohm)
D D
+3V_S5
PU 2.2K for touch pad I2C bus(400 KHz)
I2C0_SDA
R1672.2K_4
I2C0_SCL
R1662.2K_4
I2C1_SDA
R165*2.2K_4
I2C1_SCL
R169*2.2K_4
Trace Length: 1~11.25 inches
Touch PAD
Touch Screen
UART2 for RMT
+3V
+3V
C C
DGPU_PW_CTRL#
DGPU_PW_CTRL#<2>
R127 EV@100K_4
UMA Only
SG/Optimise
GPU Control PU/PD
VGPU_EN
R220*10K_4
DGPU_PWR_EN
R257*10K_4
GC6_FB_EN
R204*GC6@10K_4
20131015 For GC6 NV DG GC6_FB_EN PD.1A-1
R208 10K_4
DGPU_HOLD_RST#
high UMA Only
GPU power is control by PCH GPIO (Discrete, SG or Optimize)
low
DGPU_PW_CTRL#
DGPU_PWROK
DGPU_PWROK PD on GPU side
DGPU_PW_CTRL#
VGA H/W Signal
UMA
1
GPU
0
R115 *IV@1K_4
R110 *10K_4
Setup Menu
Hidden
UMA boot
Hidden
GPU boot
R196*10K_4
R256*100K_4
R199*GC6@10K_4
HDA
+3V
SPKR
PCH_AZ_CODEC_SYNC<26>
PCH_AZ_CODEC_BITCLK<26>
PCH_AZ_CODEC_SDOUT<26>
PCH_AZ_CODEC_SDIN0<26>
PCH_AZ_CODEC_RST#<26>
R624 *20K/F_4
545659-103
Add GPU Power Con trol Siganls
Touch PAD
Touch Screen
ESD request 2015/12/21
DGPU_HOLD_RST#<14>
DGPU_PWR_EN<42>
DGPU_PWROK<16> GC6_FB_EN<14,17>
DGPU_EVENT#<17>
ODD_PRSNT#<27>
C739 22P/50V_4
VGPU_EN<41>
ACCEL_INTA<29>
TP_INT_PCH<23>
I2C0_SDA<29>
I2C0_SCL<29>
I2C1_SDA<23>
I2C1_SCL<23>
C742 *10p/50V_4
R667 33_4 R644 33_4 R645 33_4
R660 33_4
TP4372 TP4373
Strapping
SPKR<26>
VGPU_EN DGPU_HOLD_RST# DGPU_PWR_EN GSPI0_MOSI
GC6_FB_EN
GSPI1_MOSI
TPD_INT#_D
UART2_RXD UART2_TXD UART2_RTS# UART2_CTS#
I2C0_SDA I2C0_SCL
I2C1_SDA I2C1_SCL
HDA_SYNC_R HDA_BCLK_R HDA_SDO_R
HDA_RST#_R
DMIC_CLK0_R DMIC_DATA0_R
SPKR
Skylake-U Strapping Table
Pin Name Strap description
GPP_B14 (SPKR)
B B
GPP_B18 (GSPI0_MOSI)
GPP_C2 (SMBALERT#)
GPP_B22 (GSPI1_MOSI)
GPP_C5 (SML0ALERT#)
SPI0_MOSI
SPI0_MISO
GPP_B23 (SML1ALERT# /PCHHOT#)
SPI0_IO2
A A
SPI0_IO3
HDA_SDO / I2S_TXD0
GPP_E19 (DDPB_CTRLDATA)
GPP_E21 (DDPC_CTRLDATA)
Top-Block Swap override PCH_PWROK
No reboot PCH_PWROK
TLS Confidentiality
Boot BIOS Strap Bit (BBS)
eSPI or LPC
Reserved
Reserved
Reserved
Reserved
Reserved
Flash Descriptor Security Override / Intel ME Debug Mode
Display Port B Det ected
Display Port C Detec ted
5
Sampled
RSMRST#
PCH_PWROK
RSMRST#
RSMRST#
RSMRST#
RSMRST#
RSMRST#
RSMRST#
PCH_PWROK
PCH_PWROK
PCH_PWROK
Configuration note
0 = *Disable T op Swap (iPD 20K)
1 = Enable Top Swap Mode
0 = *Disable No Reboot (iPD 20K)
1 = Enable No Reboot Mode
0 = *Disable I ntel ME Cryp to TLS(iPD 20K)
1 = Enable Int el ME Cryp to TLS
0 = *SPI (iP D 20K)
1 = LPC
0 = *LPC is sel ected for EC (iPD 20K)
1 = eSPI select ed for EC
+3V
+3V
+3V_S5
+3V
+3V_S5
(iPU 15 ~ 40K)
(iPU 15 ~ 40K)
(iPD 20K)
(iPU 15 ~ 40K)
(iPU 15 ~ 40K)
0 = *Enable secu rity in the Flash Description (iPD 20K)
1 = Disable Fl ash Descriptor Securi ty (Override)
0 = *Port B i s not detected (iPD 20K)
1 =Port B i s detected
0 = *Port C i s not detected (iPD 20K)
1 =Port C is det ected
4
R625 *1K_4
R619 *1K_4
R160 *10K_4
R207 *1K_4
change location to near CPU to prevent impact HDA_SDO signal
HDA_SDO_R
AN8 AP7 AP8 AR7
AM5
AN7 AP5 AN5
AB1 AB2
W4
AB3
AD1 AD2 AD3 AD4
U7 U6
U8 U9
AH9
AH10
AH11 AH12
AF11 AF12
BA22 AY22 BB22 BA21 AY21
AW22
J5
AY20
AW20
AK7 AK6 AK9
AK10
H5 D7
D8 C8
AW5
R586 *1K_4
R737 1K_4
U35F
LPSS ISH
GPP_B15/GSPI0_CS# GPP_B16/GSPI0_CLK GPP_B17/GSPI0_MISO GPP_B18/GSPI0_MOSI
GPP_B19/GSPI1_CS# GPP_B20/GSPI1_CLK GPP_B21/GSPI1_MISO GPP_B22/GSPI1_MOSI
GPP_C8/UART0_RXD GPP_C9/UART0_TXD GPP_C10/UART0_RTS# GPP_C11/UART0_CTS#
GPP_C20/UART2_RXD GPP_C21/UART2_TXD GPP_C22/UART2_RTS# GPP_C23/UART2_CTS#
GPP_C16/I2C0_SDA GPP_C17/I2C0_SCL
GPP_C18/I2C1_SDA GPP_C19/I2C1_SCL
GPP_F4/I2C2_SDA GPP_F5/I2C2_SCL
GPP_F6/I2C3_SDA GPP_F7/I2C3_SCL
GPP_F8/I2C4_SDA GPP_F9/I2C4_SCL
SP@SKL_ULT/BGA
U35G
AUDIO
HDA_SYNC/I2S0_SFRM HDA_BLK/I2S0_SCLK HDA_SDO/I2S0_TXD HDA_SDI0/I2S0_RXD HDA_SDI1/I2S1_RXD HDA_RST#/I2S1_SCLK GPP_D23/I2S_MCLK I2S1_SFR M I2S1_TX D
GPP_F1/I2S2_SFRM GPP_F0/I2S2_SCLK GPP_F2/I2S2_TXD GPP_F3/I2S2_RXD
GPP_D19/DMIC_CLK0 GPP_D20/DMIC_DATA0
GPP_D17/DMIC_CLK1 GPP_D18/DMIC_DATA1
+3V_S5
GPP_B14/SPKR
SP@SKL_ULT/BGA
SPKR
GSPI0_MOSI
GSPI1_MOSI
+3V_S5 +3V_S5 +3V_S5 +3V_S5
+3V_S5 +3V_S5 +3V_S5 +3V_S5
+3V_S5 +3V_S5 +3V_S5 +3V_S5
+3V_S5 +3V_S5 +3V_S5 +3V_S5
+3V_S5 +3V_S5
+3V_S5 +3V_S5
+1.8V_S5 +1.8V_S5
+1.8V_S5 +1.8V_S5
+1.8V_S5 +1.8V_S5
+3V_S5
+1.8V_S5 +1.8V_S5 +1.8V_S5 +1.8V_S5
+3V_S5 +3V_S5
+3V_S5 +3V_S5
ME_WR# <31>
3
SKL_ULT
+3V_S5 +3V_S5 +3V_S5 +3V_S5
+3V_S5 +3V_S5 +3V_S5 +3V_S5
SKL_ULT
+3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5
+3V_S5 +3V_S5
<PART_SYM_NUM>
SMBALERT# <7>
SML0ALERT# <7>
+3V_S5 +3V_S5 +3V_S5 +3V_S5
+3V_S5 +3V_S5
+3V_S5 +3V_S5
+1.8V_S5 +1.8V_S5
GPP_D13/ISH_UART0_RXD/SML0BDATA/I2C4B_SDA
GPP_D14/ISH_UART0_TXD/SML0BCLK/I2C4B_SCL
GPP_D16/ISH_UART0_CTS#/SML0BALERT#
GPP_C14/UART1_RTS#/ISH_UART1_RTS# GPP_C15/UART1_CTS#/ISH_UART1_CTS#
+3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5
<PART_SYM_NUM>
SDIO/SDXC
SD GPI SD GPI SD GPI SD GPI SD GPI SD GPI SD GPI SD GPI
GPP_A17/SD_PWR_EN#/ISH_GP7
GPP_D5/ISH_I2C0_SDA GPP_D6/ISH_I2C0_SCL
GPP_D7/ISH_I2C1_SDA GPP_D8/ISH_I2C1_SCL
GPP_F10/I2C5_SDA/ISH_I2C2_SDA GPP_F11/I2C5_SCL/ISH_I2C2_SCL
GPP_D15/ISH_UART0_RTS#
GPP_C12/UART1_RXD/ISH_UART1_RXD GPP_C13/UART1_TXD/ISH_UART1_TXD
GPP_A18/ISH_GP0 GPP_A19/ISH_GP1 GPP_A20/ISH_GP2 GPP_A21/ISH_GP3 GPP_A22/ISH_GP4 GPP_A23/ISH_GP5
GPP_A12/BM_BUSY#/ISH_GP6
SD_RCOMP
GPP_F23
AB11 AB13 AB12 W12 W11 W10 W8 W7
BA9 BB9
AB7
AF13
GPP_G0/SD_CMD GPP_G1/SD_DATA0 GPP_G2/SD_DATA1 GPP_G3/SD_DATA2 GPP_G4/SD_DATA3
GPP_G5/SD_CD# GPP_G6/SD_CLK
GPP_G7/SD_WP
GPP_A16/SD_1P8_SEL
+1.8V_S5
GPP_D9 GPP_D10 GPP_D11 GPP_D12
P2 P3 P4 P1
M4 N3
N1 N2
AD11 AD12
U1 U2 U3 U4
AC1 AC2 AC3 AB4
AY8 BA8 BB7 BA7 AY7 AW7 AP13
2
R174200/F_4
Touchpad INT
TPD_INT#<29,31>
Reserve UART FFC conn ector for Win 7 debug
UART2_RXD
R275 *49.9K/F_4
UART2_TXD
R280 *49.9K/F_4
UART2_RTS#
R283 *49.9K/F_4
UART2_CTS#
R290 *49.9K/F_4
UART2_RXD UART2_TXD UART2_RTS# UART2_CTS#
TPD_INT#_D
TP4354 TP4355 TP4356 TP4357
S5 S5
1
*TDI@2N7002K
R164 *short_4
+3V_S5 <2,3,6,7,8,9,11,21,25,27,28,29,31,33,35,36,41> +3V <2,6,7,8,9,12,13,14,16,22,23,24,25,26,27,28,29,31,33,34,35,36,37,40,41,42>
Size Document Nu mber Rev
Size Document Nu mber Rev
Size Document Nu mber Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
+3V_S5
+3V_S5
R177TDI@10K_4
+3V
2
3
TPD_INT#_D
Q20
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
Skylake 6/7 (PEG/DMI/FDI)
Skylake 6/7 (PEG/DMI/FDI)
Skylake 6/7 (PEG/DMI/FDI)
Friday, February 05, 2016
Friday, February 05, 2016
Friday, February 05, 2016
ZAA
ZAA
ZAA
448
448
1
448
1A
1A
1A
Page 5
5
Dr-Bios.com
Backside cap
C184
1U/6.3V_2
C243 22u/6.3V_6
C233 22u/6.3V_6
C226 22u/6.3V_6
C203 22u/6.3V_6
C219 22u/6.3V_6
C224 22u/6.3V_6
Backside cap
C214
C245
1U/6.3V_2
1U/6.3V_2
D D
C273
C272 22u/6.3V_6
C282 22u/6.3V_6
22u/6.3V_6
C676 10u/6.3V_4
C289 22u/6.3V_6
C258
C259
10u/6.3V_4
10u/6.3V_4
Backside cap
C189
1U/6.3V_2
C647 10u/6.3V_4
C252 1U/6.3V_4
Backside cap
C262
C212
1U/6.3V_2
C196
1U/6.3V_2
C201
1U/6.3V_2
1U/6.3V_2
C215
1U/6.3V_2
C227 1U/6.3V_4
Backside cap
C237
C228
1U/6.3V_2
Backside cap
For 2+3e CPU
Backside cap
C686
For 2+3e CPU
*GT3@10u/6.3V_4
+1.8V_PRIM+1.8V_S5
C269
1U/6.3V_2
1U/6.3V_2
C186 10u/6.3V_4
C197
1U/6.3V_2
+VCCCORE <37,38> +VCCOPC <35>
+VCCEOPIO <35>
+1.8V_S5 <8,9,10,40> +VCCGT <37,38>
+1V_VCCST <2,8,9,37>
+VCCIO <2,8,32,34,37,40> +VCCSA <37,39> +1.2VSUS <3, 12,13,36> +1V_SUS <34>
C181
1U/6.3V_2
+VCCEOPIO
C708
*GT3@10u/6.3V_4
+1.8V_PRIM
*GT3@10u/6.3V_4
C C
B B
A A
C709 *GT3@10u/6.3V_4
C687
R565
*GT3@0_6
5
C185 10u/6.3V_4
C194 1U/6.3V_4
C209
1U/6.3V_2
Backside cap
C682 *GT3@10u/6.3V_4
Backside cap
C158
C155
10u/6.3V_4
10u/6.3V_4
Backside cap
C188
C193
1U/6.3V_2
1U/6.3V_2
+1.2VSUS
Backside cap
+1V_SUS
+VCCIO
+1V_SUS
C318 10u/6.3V_4
C236 22u/6.3V_6
C651 10u/6.3V_4
C222
1U/6.3V_2
C246
1U/6.3V_2
C285
1U/6.3V_2
C684
C688
*GT3@1U/6.3V_2
*GT3@1U/6.3V_4
For 2+3e CPU
C232 10u/6.3V_4
C241 1U/6.3V_4
C328 10u/6.3V_4
C326 10u/6.3V_4
R194 *short_4
R550 *short_6
R135 *short_6
R112 *short_6
4
+VCCCORE
C255
C251
22u/6.3V_6
22u/6.3V_6
C657
C257
10u/6.3V_4
10u/6.3V_4
C235
1U/6.3V_2
C200
1U/6.3V_2
100 ohm near CPU
C681
*GT3@1U/6.3V_2
C151 10u/6.3V_4
C239
1U/6.3V_2
+VCCOPC
C685
*GT3@1U/6.3V_2
1.0V_CPU 3A
C218 10u/6.3V_4
C240
1U/6.3V_2
100 ohm Near CPU
Backside cap
C313
C308
1U/6.3V_2
1U/6.3V_2
Primary side cap
C323
C325
10u/6.3V_4
10u/6.3V_4
+VDDQC
C299
C286 10u/6.3V_4
1U/6.3V_2
Primary side cap
Backside cap
Primary side cap
4
For 2+3e CPU
+1.8V_PRIM
+VCCOPC
+VCCOPC_SRC<35>
681_AGND<35>
For 2+3e CPU
+VCCOPC_SRC 681_AGND
+VCCOPC
C683
*GT3@1U/6.3V_4
C223
C161
10u/6.3V_4
10u/6.3V_4
C204
C198
1U/6.3V_2
1U/6.3V_2
VCCGT_SEN SE<37> VSSGT_SE NSE<37>
C311
1U/6.3V_2
C327 10u/6.3V_4
+1V_VCCST
C677
1U/6.3V_4
+VCCOPC
+1.8V_PRIM
R172 *GT3@100/F_4
R634 *GT3@0_4 R636 *GT3@0_4
R176 *GT3@100/F_4
+VCCEOPIO
R633 *GT3@0_4 R632 *GT3@0_4
C689
*GT3@1U/6.3V_4
+VCCGT
C148 10u/6.3V_4
C206
1U/6.3V_2
C195
C205
1U/6.3V_2
1U/6.3V_4
+VCCGT
R155 100/F_4
R161 100/F_4
C312
1U/6.3V_2
+VCCSTG
C176
1U/6.3V_4
+VCCPLL
TP12
TP20
+1.2VSUS
C172
1U/6.3V_4
A30 A34 A39
A44 AK33 AK35 AK37 AK38 AK40 AL33 AL37 AL40 AM32 AM33 AM35 AM37 AM38
G30
K32
AK32
AB62
P62
V62
H63
G61
AC63 AE63
AE62 AG62
AL63 AJ62
A48
A53
A58
A62
A66 AA63 AA64 AA66 AA67 AA69 AA70 AA71 AC64 AC65 AC66 AC67 AC68 AC69 AC70 AC71
J43
J45
J46
J48
J50
J52
J53
J55
J56
J58
J60
K48
K50
K52
K53
K55
K56
K58
K60
L62
L63
L64
L65
L66
L67
L68
L69
L70
L71
M62
N63
N64
N66
N67
N69
J70
J69
AU23 AU28 AU35 AU42 BB23 BB32 BB41 BB47 BB51
AM40
A18
A22
AL23
K20
K21
SKL_ULT
U35L
VCC_A30
S0
VCC_A34 VCC_A39 VCC_A44 VCC_AK33 VCC_AK35 VCC_AK37 VCC_AK38 VCC_AK40 VCC_AL33 VCC_AL37 VCC_AL40 VCC_AM32 VCC_AM33 VCC_AM35 VCC_AM37 VCC_AM38 VCC_G30
RSVD_K32
RSVD_AK32
VCCOPC_AB62 VCCOPC_P62 VCCOPC_V62
VCC_OPC_1P8_H63
VCC_OPC_1P8_G61
VCCOPC_SENSE VSSOPC_SENSE
VCCEOPIO
S0
VCCEOPIO
VCCEOPIO_SENSE VSSEOPIO_SENSE
SP@SKL_ULT/BGA
SKL_ULT
U35M
CPU POWER 2 OF 4
VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT
S0
VCCGT
0.55~1.5V
VCCGT VCCGT VCCGT VCCGT
2+3e peak 6A
VCCGT
2+3e TPY 4A
VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT
VCCGT_SENSE VSSGT_SENSE
SP@SKL_ULT/BGA
U35N
SKL_ULT
CPU POWER 3 OF 4
S3
DDR3L
VDDQ_AU23 VDDQ_AU28
1.35V
VDDQ_AU35 VDDQ_AU42 VDDQ_BB23 VDDQ_BB32 VDDQ_BB41 VDDQ_BB47 VDDQ_BB51
VDDQC
VCCST
S3
1.0V
VCCSTG_A22
S0
VCCPLL_OC
S0
1.0V
VCCPLL_K20 VCCPLL_K21
S3
120mA
1.0V
SP@SKL_ULT/BGA
3
CPU POWER 1 OF 4
VCC
0.55V~1.5V
2+2 peak 24A 2+2 TPY 17A
2+3e peak 24A 2+3e TPY 17A
1.0V
S0
Sx
1.8V
GT3 CPU
3A
1.0V
<PART_SYM_NUM>
VCCGT
S0
0.55~1.5V
2+2 peak 31A 2+2 TPY 15A
2+3e peak 56A 2+3e TPY 17A
VCCGTX
2+2 X
VCCGTX_SENSE
VSSGTX_SENSE
<PART_SYM_NUM>
S0
0.85V/0.95V
3.0A
2A
S0
1.15V
2+2 peak 5A 2+2 TPY 4A 2+3e peak 5.1A 2+3e TPY 5A
120mA
40mA
1.0V
260mA
VCCIO_SENSE VSSIO_SENSE
VSSSA_SENSE
VCCSA_SENSE
<PART_SYM_NUM>
3
3A
50mA
VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT
VCCGTX_AK42 VCCGTX_AK43 VCCGTX_AK45 VCCGTX_AK46 VCCGTX_AK48 VCCGTX_AK50 VCCGTX_AK52 VCCGTX_AK53 VCCGTX_AK55 VCCGTX_AK56 VCCGTX_AK58 VCCGTX_AK60 VCCGTX_AK70
VCCGTX_AL43 VCCGTX_AL46 VCCGTX_AL50 VCCGTX_AL53 VCCGTX_AL56
VCCGTX_AL60 VCCGTX_AM48 VCCGTX_AM50 VCCGTX_AM52 VCCGTX_AM53 VCCGTX_AM56 VCCGTX_AM58 VCCGTX_AU58 VCCGTX_AU63 VCCGTX_BB57 VCCGTX_BB66
VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO
VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA
VCC_G32 VCC_G33 VCC_G35 VCC_G37 VCC_G38 VCC_G40 VCC_G42 VCC_J30 VCC_J33 VCC_J37 VCC_J40 VCC_K33 VCC_K35 VCC_K37 VCC_K38 VCC_K40 VCC_K42 VCC_K43
VCC_SENSE VSS_SENSE
VIDALERT#
VIDSCK
VIDSOUT
VCCSTG_G20
N70 N71 R63 R64 R65 R66 R67 R68 R69 R70 R71 T62 U65 U68 U71 W63 W64 W65 W66 W67 W68 W69 W70 W71 Y62
AK42 AK43 AK45 AK46 AK48 AK50 AK52 AK53 AK55 AK56 AK58 AK60 AK70 AL43 AL46 AL50 AL53 AL56 AL60 AM48 AM50 AM52 AM53 AM56 AM58 AU58 AU63 BB57 BB66
AK62 AL61
AK28 AK30 AL30 AL42 AM28 AM30 AM42
AK23 AK25 G23 G25 G27 G28 J22 J23 J27 K23 K25 K27 K28 K30
AM23 AM22
H21 H20
+VCCCORE
G32 G33 G35 G37 G38 G40 G42 J30 J33 J37 J40 K33 K35 K37 K38 K40 K42 K43
E32 E33
B63 A63 D64
G20
+VCCGT
TP17 TP14
R109 100/F_4
VSASS_SEN SE <37> VSA_SENSE <37>
R122 100/F_4
100 ohm near CPU
C174
1U/6.3V_4
+VCCGT
+VCCSA
R96 100/F_4
R98 100/ F_4
C199 47u/6.3V_8
C693 22u/6.3V_6
C692 22u/6.3V_6
C303 *GT3@22u/6.3V_6
C291 *GT3@10u/6.3V_4
+VCCIO
+VCCSA
C645
C666
47u/6.3V_8
47u/6.3V_8
C679
C667
10u/6.3V_4
10u/6.3V_4
+VCCCORE
+VCCSTG
Primary side cap
C190
C702
47u/6.3V_8
47u/6.3V_8
Primary side cap
C705
C178
22u/6.3V_6
22u/6.3V_6
Primary side cap
C202
C704
22u/6.3V_6
22u/6.3V_6
Primary side cap
C277
C310
22u/6.3V_6
*GT3@22u/6.3V_6
C281
C279
*GT3@10u/6.3V_4
*GT3@10u/6.3V_4
C284 10u/6.3V_4
C701
1U/6.3V_4
C254 10u/6.3V_4
C207
1U/6.3V_2
C114 10u/6.3V_4
2
Primary side cap
C144
C650
47u/6.3V_8
47u/6.3V_8
Primary side cap
C674
C664
10u/6.3V_4
10u/6.3V_4
100 ohm Near CPU
VCORE_SE NSE <37> VCORESS_ SENSE <37>
H_CPU_SVIDART# H_CPU_SVIDCLK H_CPU_SVIDDAT
C690 47u/6.3V_8
C706
C171
22u/6.3V_6
22u/6.3V_6
C4816
C694
22u/6.3V_6
22u/6.3V_6
C307
C302 *GT3@22u/6.3V_6
*GT3@22u/6.3V_6
Backside cap
C324
C316 *GT3@10u/6.3V_4
*GT3@10u/6.3V_4
For 2+3e CPU
Backside cap
C266
C283
1U/6.3V_2
10u/6.3V_4
Primary side cap
C700
C710
1U/6.3V_4
1U/6.3V_4
Backside cap
C247
C238
10u/6.3V_4
10u/6.3V_4
Backside cap
C278
C216
1U/6.3V_2
1U/6.3V_4
Primary side cap
C643
C641
10u/6.3V_4
10u/6.3V_4
2
C659 47u/6.3V_8
C673 10u/6.3V_4
SVID
C248 47u/6.3V_8
C707 22u/6.3V_6
C691 22u/6.3V_6
C274 22u/6.3V_6
C280
*GT3@10u/6.3V_4
Imax 3(A)
C297
1U/6.3V_2
C711
1U/6.3V_4
C229 10u/6.3V_4
C242 1U/6.3V_4
C165 10u/6.3V_4
C675 10u/6.3V_4
H_CPU_SVIDDAT
Place PU resistor close to CPU
Place PU resistor close to CPU
H_CPU_SVIDART#
H_CPU_SVIDCLK
C703 22u/6.3V_6
C275 22u/6.3V_6
C290 *GT3@10u/6.3V_4
C264
1U/6.3V_2
C221 10u/6.3V_4
C260
1U/6.3V_2
C642 10u/6.3V_4
C150 47u/6.3V_8
C697 47u/6.3V_8
C4732 47u/6.3V_8
C678
C663
10u/6.3V_4
10u/6.3V_4
+1V_VCCST
Layout note: need routing together and ALERT need between CLK and DATA.
C814
R138 100/F_4
R552 220/F_4
C298
1U/6.3V_2
C263 10u/6.3V_4
C267
1U/6.3V_2
C157 10u/6.3V_4
1000P/50V_4
+1V_VCCST
C696 47u/6.3V_8
C276 *GT3@22u/6.3V_6
C317
*GT3@10u/6.3V_4
C288 10u/6.3V_4
C249
1U/6.3V_2
C815 *1000P/50V_4
DATA & CLK must be equal (± 0.1 inch).
R134
54.9/F_4
1
C816
C817
*1000P/50V_4
*1000P/50V_4
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Friday, February 05, 2016
Date: Sheet of
Friday, February 05, 2016
Date: Sheet of
Friday, February 05, 2016
C819
C818
*1000P/50V_4
*1000P/50V_4
H_CPU_SVIDDAT < 37>
VR_SVID_ALE RT#_VCOR E <37>
H_CPU_SVIDCLK <37>
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
Skylake 12/13/1 4 (POWER)
Skylake 12/13/1 4 (POWER)
Skylake 12/13/1 4 (POWER)
1
ZAA
ZAA
ZAA
548
548
548
1A
1A
1A
Page 6
5
Dr-Bios.com
+3V <2,4,7,8,9,12,13,14,16,22,23,24,25,26,27,28,29,31,33,34,35,36,37,40,41,42> +3V_S5 <2,3,4,7,8,9,11,21,25,27,28,29,31,33,35,36,41> +3VPCU <9,11,23,25,26,27,28,29,31,32,33,40,41,42> +3V_RTC <8,9,31> +1V_S5 <9,34>
PEG_RX#0<14>
PEG_RX0<14>
D D
dGPU PEG*4
PEG_TX#0<14>
PEG_TX0<14>
PEG_RX#1<14>
PEG_RX1<14>
PEG_TX#1<14>
PEG_TX1<14>
PEG_RX#2<14>
PEG_RX2<14>
PEG_TX#2<14>
PEG_TX2<14>
PEG_RX#3<14>
PEG_RX3<14>
PEG_TX#3<14>
PEG_TX3<14>
C653 EV@0.22u/10V_4 C652 EV@0.22u/10V_4
C656 EV@0.22u/10V_4 C655 EV@0.22u/10V_4
C661 EV@0.22u/10V_4 C662 EV@0.22u/10V_4
C654 EV@0.22u/10V_4 C660 EV@0.22u/10V_4
For Thunderbolt
SATA_RXN0<27>
HDD
ODD
C C
LAN
WIFI
For M.2 SSD -NA
For M.2 SSD -1
B B
N16S VGA
M.2 SSD
For Thunderbolt
LANWLAN
A A
PCIE_RX5-_LAN<25> PCIE_RX5+_LAN<25>
PCIE_TX5-_LAN<25> PCIE_TX5+_LAN<25>
PCIE_RX6-_WLAN<28> PCIE_RX6+_WLAN<28>
PCIE_TX6-_WLAN<28> PCIE_TX6+_WLAN<28>
SATA_RXN3/PEG_RXN9_L0<28> SATA_RXP3/PEG_RXP9_L0<28>
SATA_TXN3/PEG_TXN9_L0<28>
SATA_TXP3/PEG_TXP9_L0<28> SATA_RXN3/PEG_RXN10_L1<28> SATA_RXP3/PEG_RXP10_L1<28>
SATA_TXN3/PEG_TXN10_L1<28>
SATA_TXP3/PEG_TXP10_L1<28>
CLK_PCIE_VGA#<14>
CLK_PCIE_VGA<14>
CLK_PEGA_REQ#<14>
NGFF_SSD_CLK#<28> NGFF_SSD_CLK<28>
PCIE_CLKREQ_NGFF_SSD#<28>
CLK_PCIE_LANN<25>
CLK_PCIE_LANP<25>
CLK_PCIE_LAN_REQ#<25>
CLK_PCIE_WLANN<28> CLK_PCIE_WLANP<28>
PCIE_CLKREQ_WLAN#<28>
CLK_PCIE_REQ0# CLK_PCIE_REQ1#
CLK_PCIE_REQ2#
CLK_PCIE_REQ3# CLK_PCIE_REQ4# CLK_PCIE_REQ5#
TP4389
TP4387
SATA_RXP0<27> SATA_TXN0<27> SATA_TXP0<27>
SATA_RXN1<27> SATA_RXP1<27> SATA_TXN1<27> SATA_TXP1<27>
C668 0.1u/16V_4 C669 0.1u/16V_4
C648 0.1u/16V_4 C649 0.1u/16V_4
R562 100/F_4
TP91 TP92
R235 *short_4
R11112 *short_4 R11113 *short_4 R11111 *short_4
TP22
R229 *short_4
R224 *short_4 J1
R234 10K_4 R215 10K_4
R227 *10K_4
R618 *10K_4 R228 10K_4 R223 10K_4
TP4380 TP4379 TP4382 TP4381
TP4385 TP4383 TP4386 TP4384
XDP_PRDY# XDP_PREQ# PIRQA#
+3V
C_PEG_TX#0 C_PEG_TX0
C_PEG_TX#1 C_PEG_TX1
C_PEG_TX#2 C_PEG_TX2
C_PEG_TX#3 C_PEG_TX3
PCIE_TX5­PCIE_TX5+
PCIE_TX6­PCIE_TX6+
PCIE_RCOMPN PCIE_RCOMPP
CLK_PCIE_REQ0#
NGFF_SSD_CLK#_C NGFF_SSD_CLK_C CLK_PCIE_REQ1#
CLK_PCIE_REQ2#
CLK_PCIE_REQ3#
CLK_PCIE_REQ4#
CLK_PCIE_REQ5#
Skylake ULT (GPU, SATA , ODD, CLK ,USB2&3)
H13 G13 B17 A17
G11 F11 D16 C16
H16 G16 D17 C17
G15 F15 B19 A19
F16 E16 C19 D19
G18 F18 D20 C20
F20 E20 B21 A21
G21 F21 D21 C21
E22 E23 B23 A23
F25 E25 D23 C23
F5 E5
D56 D61
BB11
E28 E27 D24 C24 E30 F30 A25 B25
D42 C42
AR10
B42 A42 AT7
D41 C41 AT8
D40 C40
AT10
B40 A40 AU8
E40 E38 AU7
5
4
U35H
PCIE/USB3/SATA
PCIE1_RXN/USB3_5_RXN PCIE1_RXP/USB3_5_RXP PCIE1_TXN/USB3_5_TXN PCIE1_TXP/USB3_5_TXP
PCIE2_RXN/USB3_6_RXN PCIE2_RXP/USB3_6_RXP PCIE2_TXN/USB3_6_TXN PCIE2_TXP/USB3_6_TXP
PCIE3_RXN PCIE3_RXP PCIE3_TXN PCIE3_TXP
PCIE4_RXN PCIE4_RXP PCIE4_TXN PCIE4_TXP
PCIE5_RXN PCIE5_RXP PCIE5_TXN PCIE5_TXP
PCIE6_RXN PCIE6_RXP PCIE6_TXN PCIE6_TXP
PCIE7_RXN/SATA0_RXN PCIE7_RXP/SATA0_RXP PCIE7_TXN/SATA0_T XN PCIE7_TXP/SATA0_T XP
PCIE8_RXN/SATA1A_RXN PCIE8_RXP/SATA1A_RXP PCIE8_TXN/SATA1A_T XN PCIE8_TXP/SATA1A_T XP
PCIE9_RXN PCIE9_RXP PCIE9_TXN PCIE9_TXP
PCIE10_RXN PCIE10_RXP PCIE10_TXN PCIE10_TXP
PCIE_RCOMPN PCIE_RCOMPP
PROC_PRDY# PROC_PREQ#
+3V_S5
GPP_A7/PIRQA#
PCIE11_RXN/SATA1B_RXN PCIE11_RXP/SATA1B_RXP PCIE11_TXN/SATA1B_T XN PCIE11_TXP/SATA1B_T XP PCIE12_RXN/SATA2_RXN PCIE12_RXP/SATA2_RXP PCIE12_TXN/SATA2_T XN PCIE12_TXP/SATA2_T XP
SP@SKL_ULT/BGA
U35J
CLKOUT_PCIE_N0 CLKOUT_PCIE_P0 GPP_B5/SRCCLKREQ0#
CLKOUT_PCIE_N1 CLKOUT_PCIE_P1 GPP_B6/SRCCLKREQ1#
CLKOUT_PCIE_N2 CLKOUT_PCIE_P2 GPP_B7/SRCCLKREQ2#
CLKOUT_PCIE_N3 CLKOUT_PCIE_P3 GPP_B8/SRCCLKREQ3#
CLKOUT_PCIE_N4 CLKOUT_PCIE_P4 GPP_B9/SRCCLKREQ4#
CLKOUT_PCIE_N5 CLKOUT_PCIE_P5 GPP_B10/SRCCLKREQ5#
SP@SKL_ULT/BGA
Rev:D add for EC reset RTC
4
SKL_ULT
CLOCK SIGNALS
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
CLR_CMOS<31>
SKL_ULT
SSIC / USB3
USB3_2_RXN/SSIC_1_RXN USB3_2_RXP/SSIC_1_RXP USB3_2_TXN/SSIC_1_TXN
USB3_2_TXP/SSIC_1_TXP
USB3_3_RXN/SSIC_2_RXN USB3_3_RXP/SSIC_2_RXP USB3_3_TXN/SSIC_2_TXN
USB3_3_TXP/SSIC_2_TXP
USB2
+3V_S5 +3V_S5 +3V_S5 +3V_S5
+3V_S5
+3V_S5 +3V_S5
+3V_S5 +3V_S5 +3V_S5
<PART_SYM_NUM>
+3V_S5
<PART_SYM_NUM>
CLR_CMOS CLR_CMOS
USB2_VBUSSENSE
GPP_E9/USB2_OC0# GPP_E10/USB2_OC1# GPP_E11/USB2_OC2# GPP_E12/USB2_OC3#
GPP_E4/DEVSLP0 GPP_E5/DEVSLP1 GPP_E6/DEVSLP2
GPP_E0/SATAXPCIE0/SATAGP0 GPP_E1/SATAXPCIE1/SATAGP1 GPP_E2/SATAXPCIE2/SATAGP2
+3V_S5
GPP_E8/SATALED#
CLKOUT_ITPXDP_N CLKOUT_ITPXDP_P
GPD8/SUSCLK
XTAL24_IN
XTAL24_OUT
XCLK_BIASREF
RTCX1 RTCX2
SRTCRST#
RTCRST#
2
R786 100K_4
USB3_1_RXN USB3_1_RXP USB3_1_TXN
USB3_1_TXP
USB3_4_RXN USB3_4_RXP USB3_4_TXN
USB3_4_TXP
USB2N_1 USB2P_1
USB2N_2 USB2P_2
USB2N_3 USB2P_3
USB2N_4 USB2P_4
USB2N_5 USB2P_5
USB2N_6 USB2P_6
USB2N_7 USB2P_7
USB2N_8 USB2P_8
USB2N_9 USB2P_9
USB2N_10 USB2P_10
USB2_COMP
USB2_ID
F43 E43
BA17
E37
XTAL24_IN
E35
XTAL24_OUT
E42
XCLK_BIASREF
AM18
RTC_X1
AM20
RTC_X2
AN18
SRTC_RST#
AM16
RTC_RST#
3
1
H8 G8 C13 D13
J6 H6 B13 A13
J10 H10 B15 A15
E10 F10 C15 D15
AB9 AB10
AD6 AD7
AH3 AJ3
AD9 AD10
AJ1 AJ2
AF6 AF7
AH1 AH2
AF8 AF9
AG1 AG2
AH7 AH8
AB6 AG3 AG4
A9 C9 D9 B9
J1 J2 J3
H2 H3 G4
H1
CLK_PCIE_XDPN CLK_PCIE_XDPP
SUSCLK
SRTC_RST#
Q6059 *2N7002K
3
TP4377 TP4378
USBCOMP
R178 113/F_4
USB2_ID
R587 1K_4 R778 1K_4
USB_OC0# USB_OC1# USB_OC2# USB_OC3#
DEVSLP0 SATA_DEVSLP1 SATA_DEVSLP2
SATAGP0 SATAGP1
R512 2.7K/F_4
3
USB3_RXN0 <30> USB3_RXP0 <30> USB3_TXN0 <30> USB3_TXP0 <30>
USB3_RXN1 <30> USB3_RXP1 <30> USB3_TXN1 <30> USB3_TXP1 <30>
USB3_RXN2 <21> USB3_RXP2 <21> USB3_TXN2 <21> USB3_TXP2 <21>
USB3_RXN3 <21> USB3_RXP3 <21> USB3_TXN3 <21> USB3_TXP3 <21>
USBP0- <30> USBP0+ <30>
USBP1- <30> USBP1+ <30>
USBP2- <30> USBP2+ <30>
USBP3- <30> USBP3+ <30>
USBP4- <28> USBP4+ <28>
USBP5- <23> USBP5+ <23>
USBP6- <23> USBP6+ <23>
USBP7- <21> USBP7+ <21>
USBP8- <27> USBP8+ <27>
USB_OC0# <30> USB_OC1# <30> USB_OC2# <30> USB_OC3# <21>
TP93 TP94
SUSCLK <28>
RTC_RST# <11>
1V power plane
0.71 checklist p14
MB USB3.0 ( Charger IC )
MB USB3.0
For TYPE-C
MB USB3.0 Charger IC )
MB USB3.0
DB USB2.0
For 17" DB use
BT
Touch Screen
CCD
For TYPE-C
POA
USBCOMP Impedance = 50 ohm Trace length < 500 m ils Trace spacing = 15 m ils
MB U3
DB U2
DEVSLP0 <27>
SATA_DEVSLP2 <28>
NGFF_SATA_DET <28>
+1V_S5
3
2
1
MB U3
For Type-C
RTC_RST#
Q6060 2N7002K
2
Add SSD ID 1/1 4
Hight is SSD , Low is ODD
SSD_ID<27>
Skylake-U userd 24 MHz (50 Ohm ESR) XTAL
XTAL24_IN XTAL24_OUT
Note: Change Y4 to 38.4 MHz(ESR 30 ohm) for Cannonlake U
RTC Clock 32.768KHz (RTC)
Trace length < 1000 mils
RTC Circuitry (RTC)
+3VPCU
On SKL voltage at VCCRTC does not exceed 3.2V
R304
1.5K/F_4
VCCRTC_2
R301
45.3K/F_4
2013/10/16 Chage +3V_RTC_0 to VCCTC_2.
1A-2
1. AHL03003057 DBV CR2032
2. AHL03003003 VDE CR2032
2
USB_OC0# USB_OC1# USB_OC2# USB_OC3#
R568 10K_4
R536 1M_4
C351 8.2p/50V_4
C362 8.2p/50V_4
1B-1
R308 1K_4
+3V_RTC_[0:2] Trace width = 20 m ils
12
BT1
BAT_CONN
1
PCH PU/PD
DEVSLP0 SATA_DEVSLP1 SATA_DEVSLP2 PIRQA#
SATAGP1
SATAGP0
C665 10P/50V_4
4
3
Y4 24MHz
1
2
C658 10P/50V_4
12
Y2
32.768KHZ
D7
+3V_RTC_2
+3V_RTC_1
BAT54C
Size Document Nu mber Rev
Size Document Nu mber Rev
Size Document Nu mber Rev
Date: Sheet of
Friday, February 05, 2016
Date: Sheet of
Friday, February 05, 2016
Date: Sheet of
Friday, February 05, 2016
+3V_S5
R541 10K_4 R540 10K_4 R543 10K_4 R542 10K_4
+3V
R573 *10K_4 R574 *10K_4 R575 *10K_4 R631 *10K_4
R569 *10K_4
+3V_S5
R570 100K_4
24MHz: BG624000078
38.4MHz : ?
CH01006JB08 -> 10p CH01506JB06 -> 15p CH-6806TB01 -> 6.8p
RTC_X1
R255 10M_4
RTC_X2
+3V_RTC
+3V_RTC
Trace width = 30 m ils
R299
20K/F_4
R300
20K/F_4
C381 1u/6.3V_4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
Skylake 9/10 (PEG/USB/CLK)
Skylake 9/10 (PEG/USB/CLK)
Skylake 9/10 (PEG/USB/CLK)
C380 1u/6.3V_4
C382 1u/6.3V_4
1
BG332768453 - > SEG
BG332768104 - > TXC
ZAA
ZAA
ZAA
RTC_RST#
12
*JUMP
SRTC_RST#
648
648
648
1A
1A
1A
Page 7
5
Dr-Bios.com
4
3
2
1
U35E
SPI0_CLK SPI0_MISO SPI0_MOSI SPI0_IO2 SPI0_IO3 SPI0_CS0# SPI0_CS1# SPI0_CS2#
GPP_D1/SPI1_CLK GPP_D2/SPI1_MISO
J4
GPP_D3/SPI1_MOSI GPP_D21/SPI1_IO2 GPP_D22/SPI1_IO3 GPP_D0/SPI1_CS#
CL_CLK CL_DATA CL_RST#
GPP_A0/RCIN#
GPP_A6/SERIRQ
SP@SKL_ULT/BGA
SPI - FLASH
SPI - TOUCH
C LINK
+3V_S5
+3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5
+3V_S5
+3V_S5
PCH_SPI_CLK PCH_SPI_SO
D D
PCH_SPI_SI PCH_SPI_IO2 PCH_SPI_IO3 PCH_SPI_CS0#
For M.2 wifi module must
SIO_RCIN#<31>
IRQ_SERIRQ<27,31>
C C
R652 *short_4
IRQ_SERIRQ
EC_RCIN#
AW3
AW2
AW13
AY11
AV2
AV3
AU4 AU3 AU2 AU1
M2 M3
V1 V2 M1
G3 G2 G1
SP@ socket P/N: DFHS08FS023 only for A-TEST
SPI ROM
Skylake
3.3V
B B
A A
Vender Size Quanta P/N Vender P/N
W25Q64FVSSIQWND
GD25B64CSIGRGGD
PCH_SPI_CLK_EC PCH_SPI_SI_EC PCH_SPI_SO_EC
R602 *short_4
SPI_CS0#_UR_ME
PCH_SPI_CLK_EC<31>
SPI_CS0#_UR_ME<31>
PCH_SPI_SI_EC<31>
PCH_SPI_SO_EC<31>
8M 8M
+3V_PCH_ME
AKE3EFP0N07
AKE2EZN0Q00
R591 10K_4
PCH_SPI_CS0#
Platform
SKL KBL
PCH_SPI_SO PCH_SPI_SO_EC
1A-13
+3V_PCH_ME
SKL_ULT
LPC
+3V_S5
<PART_SYM_NUM>
Winbound for SKL / Giga for KBL
PCH_SPI_CS0#
R650 15_4 R588 15_4
R649 1K_4
3.3K is original and for no support fast read func tion
SMBUS, SMLINK
+3V_S5 +3V_S5 +3V_S5
+3V_S5 +3V_S5 +3V_S5
+3V_S5 +3V_S5
GPP_B23/SML1ALERT#/PCHHOT#
+3V_S5
+3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5
+3V_S5 +3V_S5
+3V_S5
SPI_SO_8M
GPP_A1/LAD0/ESPI_IO0 GPP_A2/LAD1/ESPI_IO1 GPP_A3/LAD2/ESPI_IO2 GPP_A4/LAD3/ESPI_IO3
GPP_A5/LFRAME#/ESPI_CS#
GPP_A14/SUS_STAT#/ESPI_RESET#
GPP_A9/CLKOUT_LPC0/ESPI_CLK
GPP_A10/CLKOUT_LPC1
U41
1
2
3
4
ROM@W25Q64FV -- 8MB
SPI_WP_IO2_ME
PCH_SPI_IO2
PCH_SPI_IO3
R7
GPP_C0/SMBCLK
GPP_C1/SMBDATA
GPP_C2/SMBALERT#
GPP_C3/SML0CLK
GPP_C4/SML0DATA
GPP_C5/SML0ALERT#
GPP_C6/SML1CLK
GPP_C7/SML1DATA
PCH_MBCLK0_R
R8
PCH_MBDAT0_R
R10
R9
VGA_MBCLK
W2
VGA_MBDATA
W1
W3
SMB_ME1_CLK
V3
SMB_ME1_DAT
AM7
SML1ALERT#
SMBALERT#
SML0ALERT#
SMB1ALERT# <29>
eSPI change to 15 ohm
AY13
R659 *short_4
BA13
R640 *short_4
BB13
R653 *short_4
AY12
R668 *short_4
BA12 BA11
eSPI change to 15 ohm
AW9
R623 22_4
AY9 AW11
CLK
R626 22_4 R627 22_4
CLKRUN#
R11127 0_6
R11126 *0_6
8
7
SPI_HOLD_IO3_ME
6
SPI_CLK_8M
5
SPI_SI_8M
R687 15_4 R654 15_4
SPI_WP_IO2_ME
SPI_HOLD_IO3_ME
GPP_A8/CLKRUN#
+3V_S5
+3V_LDO_EC
CS#
IO1/DO
IO2/W P#
GND
VCC
IO3/HOLD #
IO0/DI
PCH_SPI_CLK_EC PCH_SPI_SI_EC
R589 15_4
R239 15_4
+3V <2,4,6,8,9,12,13,14,16,22,23,24,25,26,27,28,29,31,33,34,35,36,37,40,41,42> +3V_S5 <2,3,4,6,8,9,11,21,25,27,28,29,31,33,35,36,41>
LPC_LAD0 <27,28,31> LPC_LAD1 <27,28,31> LPC_LAD2 <27,28,31> LPC_LAD3 <27,28,31> LPC_LFRAME# <27,28,31>
CLK_PCI_EC <31>
PCLK_TPM <27>
CLKRUN# <27,31>
+3V_PCH_ME
C754 0.1u/16V_4
R698 1K_4
R684 15_4
R691 15_4
reserve for SPI fast read
Strapping
SMBALERT# <4>
SML0ALERT# <4>
ckl v0.71 p.24
C806 0.1u/16V_4
+3V_PCH_ME
PCH_SPI_CLK
PCH_SPI_SI
C747 *22p/50V_4
2/10 add C806 for EMI request , R748 no stuif f from E C site move at CPU site
C4723 *22p/50V_4
CLK_PCI_LPC <28>
EMI
SMBus(PCH)
S5
PCH_XDP_WLAN/S5 DDR_TP/S0
SMBus(EC)
CLKRUN# IRQ_SERIRQ EC_RCIN#
R630 8.2K/F_4 R629 10K_4 R639 10K_4
SMBus
PCH_MBCLK0_R PCH_MBDAT0_R VGA_MBDATA VGA_MBCLK
SML1ALERT#
Termination Resistor Requ irement for PCH PCHHOT# Pin Reserve PU 150 K resister
+3V
D2B change to 2.2k
Q32
PCH_MBDAT0_R
PCH_MBCLK0_R
2ND_MBCLK<17,31> 2ND_MBDATA<17,31>
5
2
6
2N7002DW
2ND_MBCLK 2ND_MBDATA
R5782.2K_4 R5802.2K_4 R5852.2K_4 R5822.2K_4
R205*15 0K_4
R576
2.2K_4
43
1
R171 *short_4 R175 *short_4
R572
2.2K_4
EC/S5
+3V
+3V_S5
+3V_S5
S0
CLK_SDATA <12,13,22,29>
CLK_SCLK <12,13,22,29>
SMB_ME1_CLK SMB_ME1_DAT
5
4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Friday, February 05, 2016
Date: Sheet of
Friday, February 05, 2016
Date: Sheet of
3
2
Friday, February 05, 2016
PROJECT :
Skylake 5 (SATA/HDA/SPI)
Skylake 5 (SATA/HDA/SPI)
Skylake 5 (SATA/HDA/SPI)
ZAA
ZAA
ZAA
1A
1A
748
748
1
748
1A
Page 8
5
Dr-Bios.com
4
3
2
1
U35K
+VCCIO
11/12 Reserve PU 10K
R544 *10K_4
D D
PROC_PWRGD
EC only PD, so PD 10K
PCH_SUSPWRACK
R11114
10K_4
Board ID
C C
R610 SP@10K_4 R612 10K_4 R614 10K_4 R595 *10K_4 R598 SP@10K_4 R605 SP@10K_4 R592 SP@10K_4
R606 *10K_4 R764 10K_4 R766 SP@10K_4
)'#"!*+!,
)'#"!*+!5
)'#"!*+!6
)'#"!*+!7
)'#"!*+!1
B B
No TPM
No touch panel
PLTRST# Buffer
A A
PCI_PLTRST#
RAM_ID1 RAM_ID2 RAM_ID3 Board_ID0 Board_ID1 Board_ID2 Board_ID3 Board_ID4
Board_ID5 Board_ID6 Board_ID7
234
-./0
VRAM X32 VRAM X16
IOACNon IOAC
G-sensor No G-sensor
TPM
touch panel
+VCCIO <2,5, 32,34,37,40> +3V_RTC <6,9,31> +3V <2,4,6,7,9,12,13,14,16,22,23,24,25,26,27,28,29,31,33,34,35,36,37,40,41,42> +3V_S5 <2,3,4,6,7,9,11,21,25,27,28,29,31,33,35,36,41>
+1.8V_S5 <5,9,10,40> +1V_VCCST <2,5,9,37>
+3V
C332 0.1u/16V_4
2
1
U14
3 5
TC7SH08FU
SYS_RESET#<11>
RSMRST#<31>
SYS_PWROK
PCH_SUSPWRACK<31>
PCIE_LAN_WAKE#<25,28>
R611 *SP@10K_4 R613 *10K_4 R615 *10K_4 R600 10K_4 R599 SP@10K_4 R608 SP@10K_4 R590 SP@10K_4 R593 10K_4
R607 10K_4 R765 *10K_4 R767 SP@10K_4
)'#"!*+!9
)'#"!*+!:
4
R214 100K_4
R655 *short_4
R554 10K_4
R556 *short_4 R643 *0_4
PCH_SUSPWRACK
TP4368
+1.8V_S5
14" 15/17")'#"!*+!8
Reserved (Default)
GPU--> KA (Kill A-chanel)
(Default)
PLTRST# <14,25,27,28,31 >
PCI_PLTRST# SYS_RESET# PCH_RSMRST#
PROC_PWRGD VCCST_PWRGD
SYS_PWROK_R EC_PWROK_R DPWROK_R PCH_ACPRESENT
R11140 *short_4
SUSACK#_R
PCIE_LAN_WAKE#
TP84
-./0234
Reserve
GPU--> KB (Kill B-chanel)
AN10
GPP_B13/PLTRST#
B5
SYS_RESET#
AY17
RSMRST#
A68
PROCPWRG D
B65
VCCST_PW RGD
B6
SYS_PWROK
BA20
PCH_PWROK
BB20
DSW_PWROK
AR13
GPP_A13/SUSWARN#/SUSPWRDNACK
AP11
GPP_A15/SUSACK#
BB15
WAKE#
AM15
GPD2/LAN_WAKE#
AW17
GPD11/LANPHYPC
AT15
GPD7/RSVD
SP@SKL_ULT/BGA
U35I
CSI-2
A36
CSI2_DN0
B36
CSI2_DP0
C38
CSI2_DN1
D38
CSI2_DP1
C36
CSI2_DN2
D36
CSI2_DP2
A38
CSI2_DN3
B38
CSI2_DP3
C31
CSI2_DN4
D31
CSI2_DP4
C33
CSI2_DN5
D33
CSI2_DP5
A31
CSI2_DN6
B31
CSI2_DP6
A33
CSI2_DN7
B33
CSI2_DP7
A29
CSI2_DN8
B29
CSI2_DP8
C28
CSI2_DN9
D28
CSI2_DP9
A27
CSI2_DN10
B27
CSI2_DP10
C27
CSI2_DN11
D27
CSI2_DP11
SP@SKL_ULT/BGA
Power Sequence
PCH_PWROK<31>
For platforms not supporting Deep Sx, connect directly to RSMRST#
SYSPWOK
SYS_PWROK
5
4
SKL_ULT
SYSTEM POWER MANAGEMENT
+3V_S5
I I
+3V_S5
+3V_S5 +3V_S5 +3V_S5
SKL_ULT
+1.8V_S5 +1.8V_S5 +1.8V_S5 +1.8V_S5 +1.8V_S5 +1.8V_S5 +1.8V_S5 +1.8V_S5
+1.8V_S5 +1.8V_S5 +1.8V_S5
+3V_S5
+3V_S5 +3V_S5
<PART_SYM_NUM>
GPP_D4/FLASHTRIG
+3V_S5
EMMC
GPP_F13/EMMC_DATA0 GPP_F14/EMMC_DATA1 GPP_F15/EMMC_DATA2 GPP_F16/EMMC_DATA3 GPP_F17/EMMC_DATA4 GPP_F18/EMMC_DATA5 GPP_F19/EMMC_DATA6 GPP_F20/EMMC_DATA7
GPP_F21/EMMC_RCLK
GPP_F22/EMMC_CLK
GPP_F12/EMMC_CMD
<PART_SYM_NUM>
+3V_S5 +3V_S5 +3V_S5 +3V_S5
+3V_S5 +3V_S5
+3V_S5 +3V_S5 +3V_S5
+3V_S5
GPP_B11/EXT_PWR_GATE#
CSI2_CLKN0
CSI2_CLKP0
CSI2_CLKN1
CSI2_CLKP1
CSI2_CLKN2
CSI2_CLKP2
CSI2_CLKN3
CSI2_CLKP3
CSI2_COMP
EMMC_RCOMP
Rev:D change to shortpad
EC_PWROK SYS_PWROK_R
No Deep Sx
DPWROK_R PCH_RSMRST#
R661 *short_4
+3V_S5
C168 *0.1u/16V_4
2
4
U8 *TC7SH08FU
R113 *0_4
R560 *short_4
EC_PWROK
1
3 5
GPD4/SLP_S3# GPD5/SLP_S4#
SLP_SUS# SLP_LAN#
GPD6/SLP_A#
GPP_A11/PME#
INTRU DER#
C37 D37 C32 D32 C29 D29 B26 A26
E13 B7
AP2 AP1 AP3 AN3 AN1 AN2 AM4 AM1
AM2 AM3 AP4
AT1
AT11 AP15 BA16 AY16
AN15 AW15 BB17 AN16
BA15 AY15 AU13
AU11 AP16
INTRUDER#
AM10
MPHY_EXT_PWR
AM11
PCH_VRALERT#
R145 100/F_4
RAM_ID1 RAM_ID2 RAM_ID3 Board_ID0 Board_ID1 Board_ID2 Board_ID3 Board_ID4
Board_ID5 Board_ID6 Board_ID7
R616200/F_4
SUSB# SUSC# PCH_SLP_S5#
PCH_SLP_SUS# PCH_SLP_LAN# PCH_SLP_WLAN# PCH_SLP_A#
PCH_PWRBTN#
PCH_BATLOW#
GPP_B12/SLP_S0#
GPD10/SLP_S5#
GPD9/SLP_WLAN#
GPD3/PWRBTN#
GPD1/ACPRESENT
GPD0/BATLOW#
GPP_B2/VRALERT#
Non Deep Sx
R647 *short_4
R131 *0_4
EC_PWROK_R
Rev:D change to shortpad
EC_PWROK < 31>
IMVP_PWRGD_3V <2>
R130 *10K_4
3
TP29
R249
1M_4
TP19
TP63
Board_ID4 <23>
REV:E tPLT17(max
200us) ->SLP_S3# assertion to IMVP VR_ON(VRON) deassert ion
VRON_R<35,37>
Stuff 1000P/50V
TP30 TP23
R677*short_4
R676*short_4
TP74
+3V_RTC
4
U50 *TC7SH08FU
R792 *short_4
VCCST_PWRGD
C136 1000P/50V_4
TP4367
SUSB# <11,31,33> SUSC# <11, 31> PCH_SLP_S5# <11>
TP4369
PCH_SLP_A# <11> DNBSWON# <31>
SB_ACDC <31>
+3V_S5
C813 *0.1u/16V_4
2
1
3 5
+1V_VCCST
R89 60.4/F_4
Shortpad change to 60.4 ohm. 11/6
REV:E tPLT15 (max 200us)
->SLP_S4# assertion to VDDQ(+1.35VSUS) ram p down start(SUSON)
SUSON_R<34,36>
SUSB#
VRON
VRON <31>
CRB is via +1.05V PGVCCST PWRGD
+3V_S5
U6
5
VCC
C164
R85
0.1u/16V_4
1K_4
VCCST_PWRGD_R
4
Y
74AUP1G07GW
PCH_VRALERT# SYS_RESET#
PCH_ACPRESENT PCH_BATLOW#
PCIE_LAN_WAKE#
MPHY_EXT_PWR
PCH_RSMRST# PCH_PWROK SYS_PWROK_R
+3V_S5
4
SUSON_R
U48 *TC7SH08FU
R790 *short_4
REV:E tPLT18 (max 200 us)
->SLP_S3# assertion to VCCIO VR(MAIND for +1V_S5 to +VCCIO) disabled
MAINON_R<33,36,40>
1
NC
2
VCCST_PWRGD_EN_L
A
3
GND
PCH_PWROK
HWPG<31>
Rev:D change netmane for HWPG
2
Change for leakage
R211 10K_4 R561 10K_4
R651 8.2K/F_4 R628 8.2K/F_4
R250 10K_4
R195 *1K_4
R642 10K_4 R648 10K_4 R555 10K_4
C811 *0.1u/16V_4
2
1
3 5
C823 *1000P/50V_4
HWPG
SUSC#
SUSON
4
U49 *TC7SH08FU
R791 *short_4
B2A S0->S5 & S0->S3 Power of sequence 1 us SUSB# -> VCCST_PWRGD
4
U47 TC7SH08FU
C824 *1000P/50V_4
R777 *0_4
Reserve 1000P/50 V
R103*0_4
R102*short_4
Size Document Nu mber Rev
Size Document Nu mber Rev
Size Document Nu mber Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
+3V_S5
+3V_S5
Rev:F add
SUSON <31>
+3V_S5
C812 *0.1u/16V_4
2
1
3 5
+3V_S5
C808 0.1u/16V_4
3 5
Friday, February 05, 2016
Friday, February 05, 2016
Friday, February 05, 2016
+3V
SUSB#
MAINON
2
1
VCCST_PWRGD_EN
MAINON <27,31>
SUSB#
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
Skylake 9/11 (PWROK/Board_ID)
Skylake 9/11 (PWROK/Board_ID)
Skylake 9/11 (PWROK/Board_ID)
ZAA
ZAA
ZAA
1
1A
1A
848
848
848
1A
Page 9
5
<2,4,6,7,8,12,13,14,16,22,23,24,25,26,27,28,29,31,33,34,35,36,37,40,41,42>
Dr-Bios.com
4
3
2
1
U35S
E68
D D
CFG4
R156 49.9/F_4
+1V_S5
C C
B B
CFG_RCOMP
R153 1.5K/F_4
B67 D65 D67 E70 C68 D68 C67
G69
G68 H70 G71 H69 G70
E63
E66
E60
AY2 AY1
K46 K45
AL25 AL27
C71 B70
A52
BA70 BA68
G65
E61
F71
F70
F63
F66
E8
D1 D3
F60
J71 J68
F65
F61
CFG[0] CFG[1] CFG[2] CFG[3] CFG[4] CFG[5] CFG[6] CFG[7] CFG[8] CFG[9] CFG[10] CFG[11] CFG[12] CFG[13] CFG[14] CFG[15]
CFG[16] CFG[17]
CFG[18] CFG[19]
CFG_RCOMP
ITP_PMOD E
RSVD_AY2 RSVD_AY1
RSVD_D1 RSVD_D3
RSVD_K46 RSVD_K45
RSVD_AL25 RSVD_AL27
RSVD_C71 RSVD_B70
RSVD_F60
RSVD_A52
RSVD_TP_BA70 RSVD_TP_BA68
RSVD_J71 RSVD_J68
VSS_F65 VSS_G65
RSVD_F61 RSVD_E61
SP@SKL_ULT/BGA
SKL_ULT
RESERVED SIGNALS -1
<PART_SYM_NUM>
RSVD_TP_BB68 RSVD_TP_BB69
RSVD_TP_AK13 RSVD_TP_AK12
RSVD_BB2 RSVD_BA3
RSVD_D5 RSVD_D4 RSVD_B2 RSVD_C2
RSVD_B3 RSVD_A3
RSVD_AW1
RSVD_E1 RSVD_E2
RSVD_BA4 RSVD_BB4
RSVD_A4 RSVD_C4
RSVD_A69 RSVD_B69
RSVD_AY3
RSVD_D71 RSVD_C70
RSVD_C54 RSVD_D54
VSS_AY71
ZVM#
RSVD_TP_AW71 RSVD_TP_AW70
MSM#
PROC_SELECT#
BB68 BB69
AK13 AK12
BB2 BA3
AU5
TP5
AT5
TP6
D5 D4 B2 C2
B3 A3
AW1
E1 E2
BA4 BB4
A4 C4
BB5
TP4
A69 B69
AY3
D71 C70
C54 D54
AY4
TP1
BB3
TP2
AY71 AR56
AW71 AW70
AP56 C64
Rev:D change to shortpa d
Rev:F Remove Short Jumper for all +1V_S5
+1V_S5
TP95
Rev:F reserve TP
+1V_S5
Rev:F Stuff C699
+1V_S5
+1V_S5
+1V_S5
+1V_S5
+3VPCU
+3V_S5
+3V
+1.5V
+3V_S5
R759 *short_4
Rev:D change to shortpad
R760 *short_4 R762 **GT3@0_4
R761 100K_4
+1V_S5
+3V_S5
+1V_S5
+1V_S5
+1V_VCCST
VCCPRIM_1P0 & VCCPRIM_CORE Short
AB19 AB20
C217 1U/6.3V_4
C698 1U/6.3V_4
C699 47u/6.3V_8
C695 1U/6.3V_4
R210 *0_6
R212 0_6
R789 0_6
R683 *0_6
R193
R186 *short_6
LPM_ZVM_N <35>
C793 1U/6.3V_4
C191 1U/6.3V_4
C182 47u/6.3V_8
C179 1U/6.3V_4
C225 *1U/6.3V_4
C748 1U/6.3V_4
*short_6
C192 1U/6.3V_4
C261 1U/6.3V_4
C173 1U/6.3V_4
For 2+3e CPU No Stuff
TP88
+VCCDSW_1P0
C7121U /6.3V_4
+VCCPDSW_3P3
C314*0.1U/16V_4
+VCCHDA
+VCCPSPI
+VCCPRIM_3P3
AF18 AF19
AB17
AD17 AD18
AJ17
AJ19
AJ16
AF20 AF21
AJ21
AK20
P18
V20 V21
AL1
K17
L1
N15 N16 N17 P15 P16
K15
L15
V15
Y18
T19 T20
N18
SKL_ULT
U35O
CPU POWER 4 OF 4
VCCPRIM_1P0 VCCPRIM_1P0 VCCPRIM_1P0
VCCPRIM_CORE VCCPRIM_CORE VCCPRIM_CORE VCCPRIM_CORE
DCPDSW_1P0
VCCMPHYAON_1P0 VCCMPHYAON_1P0
VCCMPHYGT_1P0_N15 VCCMPHYGT_1P0_N16 VCCMPHYGT_1P0_N17 VCCMPHYGT_1P0_P15 VCCMPHYGT_1P0_P16
VCCAMPHYPLL_1P0 VCCAMPHYPLL_1P0
VCCAPLL_1P0
VCCPRIM_1P0_AB17 VCCPRIM_1P0_Y18
VCCDSW_3P3_AD17 VCCDSW_3P3_AD18 VCCDSW_3P3_AJ17
VCCHDA
VCCSPI
VCCSRAM_1P0 VCCSRAM_1P0 VCCSRAM_1P0 VCCSRAM_1P0
VCCPRIM_3P3_AJ21
VCCPRIM_1P0_AK20
VCCAPLLEBB
SP@SKL_ULT/BGA
1.5V
3.3V
1.0V
1.0V
30mA
11mA
1.0V
642mA
1.0V
S5
1.0V
S5
1.0V
22mA
1.0V
1.0V
S5
1.0V
3.3V
118mA
3.3V
1.0V
696mA
S5
1.0V
1.258A
26mA
S5
S5
33mA
2.574A
696mA
44mA
S5
33mA 41mA
75mA with AJ21 pin
VCCPRIM_3P3_V19
1.0V
6mA
1.8V
<1mA
VCCRTCPRIM_3P3
3.0V+
RTC
1.0V
135mA
S5
S5
GPP_B0/CORE_VID0
+3V
GPP_B1/CORE_VID1
75mA
S5
696mA
S5
<PART_SYM_NUM>
VCCPGPPG
VCCPRIM_1P0_T1
VCCATS_1P8
VCCRTC_AK19 VCCRTC_BB14
GPIO Group Power Plane
AK15
VCCPGPPA VCCPGPPB VCCPGPPC VCCPGPPD VCCPGPPE VCCPGPPF
DCPRTC
VCCCLK1
VCCCLK2
VCCCLK3
VCCCLK4
VCCCLK5
VCCCLK6
+VCCPGPPA
AG15
+VCCPGPPB
Y16
+VCCPGPPC
Y15
+VCCPGPPD
T16
+VCCPGPPE
AF16
+VCCPGPPF
AD15
+VCCPGPPG
V19
+VCCPRIM_3P3
T1
+VCCPRIM_1P0
AA1
+VCCATS_1P8
AK17
+VCCPRTCPRIM_3P3
AK19 BB14
BB10
A14
K19
L21
N20
L19
A10
AN11
V0P85A_VID0
AN13
C250 1U/6.3V_4
C349 1U/6.3V_4
+VCCPRTC
C322 1U/6.3V_4
DCPRTC
C680 *1U/6.3V_4
C672 1U/6.3V_4
C292 *1U/6.3V_4 C268 1U/6.3V_4 C230 1U/6.3V_4
C265 *1U/6.3V_4 R198 *short_6 R185 *short_6 R182 *short_6 R187 *short_6 R179 *short_6 R192 *short_6 R188 *short_6
C256 1U/6.3V_4
C270 *1U/6.3V_4
R180 *short_6 R240 *short_6
C348 0.1U/16V_4
R252 *short_6
C352 0.1U/16V_4 C732 0.1U/16V_4
TP31
+3V_S5 +3V_S5
+3V_S5 +3V_S5
+3V_S5
+1.8V_S5
+3V_S5
R11131 *short_6
+1.8V_S5 +3V_S5
+3V_RTC
+1V_S5
+1V_S5
Pin Name Strap description Configuration
CFG[0] Stall reset sequence after PCU PLL lock until de-asserted
CFG[1]
CFG[2]
Reserved Configuration lane
PCI Express* Static x16 Lane Numbering Reversal
1 = *Normal Operation; No stall (iPU 3K)
0 = Stall
1 = *Normal Operation(iPU 3K)
0 = Lan number reversed
Note
H & S processor used only
+1V_S5 <6,34> +3VPCU <6,11,23,25,26,27,28,29,31,32,33,40,41,42> +3V_S5 <2,3,4,6,7,8,11,21,25,27,28,29,31,33,35,36,41> +3V
+1V_VCCST <2,5,8,37> +1.8V_S5 <5,8,10,40> +3V_RTC <6,8,31>
CFG[3] Reserved Configuration lane
CFG[4]
CFG[6:5] PCI Express* Bifunction
A A
eDP enable
CFG[7] PEG Training
CFG[19:8]
Reserved Configuration lane
5
1 = Disabled (iPU 3K)
0 = *Enabled
00 = 1x8, 2x4 PCI Expres s* 01 = reserved 10 = 2x8 PCI Express* 11 = 1x16 PCI Express*
1 = *PEG Train immediatedly follow RESET# de-asserti on (iPU 3K)
0 = PEG wait for B IOS for training
4
CFG4
R548 1K_4
H & S processor used only
H & S processor used only
3
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Friday, February 05, 2016
Date: Sheet of
Friday, February 05, 2016
Date: Sheet of
2
Friday, February 05, 2016
PROJECT :
Skylake PCH-LP 15/19 (POWER)
Skylake PCH-LP 15/19 (POWER)
Skylake PCH-LP 15/19 (POWER)
ZAA
ZAA
ZAA
1A
1A
948
948
1
948
1A
Page 10
5
Dr-Bios.com
4
3
2
1
Skylake ULT (GND)
A67
A70 AA2 AA4
AA65 AA68 AB15 AB16 AB18 AB21
AB8
AD13 AD16 AD19 AD20 AD21 AD62
AD8 AE64 AE65 AE66 AE67 AE68 AE69
AF1 AF10 AF15 AF17
AF2
AF4 AF63
AG16 AG17 AG18 AG19 AG20 AG21 AG71 AH13
AH6 AH63 AH64 AH67
AJ15 AJ18 AJ20
AJ4 AK11 AK16 AK18 AK21 AK22 AK27 AK63 AK68 AK69
AK8
AL2 AL28 AL32 AL35 AL38
AL4 AL45 AL48 AL52 AL55 AL58 AL64
A5
SKL_ULT
GND 1 OF 3
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
SP@SKL_ULT/BGA
D D
C C
B B
A A
5
U35P
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
<PART_SYM_NUM>
AL65 AL66 AM13 AM21 AM25 AM27 AM43 AM45 AM46 AM55 AM60 AM61 AM68 AM71 AM8 AN20 AN23 AN28 AN30 AN32 AN33 AN35 AN37 AN38 AN40 AN42 AN58 AN63 AP10 AP18 AP20 AP23 AP28 AP32 AP35 AP38 AP42 AP58 AP63 AP68 AP70 AR11 AR15 AR16 AR20 AR23 AR28 AR35 AR42 AR43 AR45 AR46 AR48 AR5 AR50 AR52 AR53 AR55 AR58 AR63 AR8 AT2 AT20 AT23 AT28 AT35 AT4 AT42 AT56 AT58
4
AT63 AT68
AT71 AU10 AU15 AU20 AU32 AU38
AV1 AV68 AV69 AV70 AV71
AW10 AW12 AW14 AW16 AW18 AW21 AW23 AW26 AW28 AW30 AW32 AW34 AW36 AW38 AW41 AW43 AW45 AW47 AW49 AW51 AW53 AW55 AW57
AW6 AW60 AW62 AW64 AW66
AW8
AY66
B10 B14 B18 B22 B30 B34 B39 B44 B48 B53 B58 B62 B66 B71
BA1 BA10 BA14 BA18
BA2 BA23 BA28 BA32 BA36
F68
BA45
SKL_ULT
GND 2 OF 3
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
<PART_SYM_NUM>
SP@SKL_ULT/BGA
U35Q
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
BA49 BA53 BA57 BA6 BA62 BA66 BA71 BB18 BB26 BB30 BB34 BB38 BB43 BB55 BB6 BB60 BB64 BB67 BB70 C1 C25 C5 D10 D11 D14 D18 D22 D25 D26 D30 D34 D39 D44 D45 D47 D48 D53 D58 D6 D62 D66 D69 E11 E15 E18 E21 E46 E50 E53 E56 E6 E65 E71 F1 F13 F2 F22 F23 F27 F28 F32 F33 F35 F37 F38 F4 F40 F42 BA41
3
G10 G22 G43 G45 G48
G52 G55 G58
G60 G63 G66 H15 H18 H71
J11 J13 J25 J28 J32 J35 J38 J42
K16 K18 K22 K61 K63 K64 K65 K66 K67 K68 K70 K71
L11 L16 L17
F8
VSS VSS VSS VSS VSS VSS
G5
VSS VSS VSS VSS
G6
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
J8
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
SKL_ULT
GND 3 OF 3
<PART_SYM_NUM>
SP@SKL_ULT/BGA
U35R
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
L18 L2 L20 L4 L8 N10 N13 N19 N21 N6 N65 N68 P17 P19 P20 P21 R13 R6 T15 T17 T18 T2 T21 T4 U10 U63 U64 U66 U67 U69 U70 V16 V17 V18 W13 W6 W9 Y17 Y19 Y20 Y21
AW69
RSVD_AW69
AW68
+1.8V_S5
R775 *0_4
C794
*1U/6.3V_4
Reserve 1uF no stuff in CPU U11,U12 ball support Cannonlake-U PCH
Size Document Numb er Rev
Size Document Numb er Rev
Size Document Numb er Rev
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
RSVD_AW68
AU56
RSVD_AU56
AW48
RSVD_AW48
C7
RSVD_C7
U12
RSVD_U12
U11
RSVD_U11
H11
RSVD_H11
Skylake 10/17/18 (GND)
Skylake 10/17/18 (GND)
Skylake 10/17/18 (GND)
Friday, February 05, 2016
Friday, February 05, 2016
Friday, February 05, 2016
SKL_ULT
U35T
SPARE
RSVD_F6 RSVD_E3
RSVD_C11
RSVD_B11
RSVD_A11 RSVD_D12 RSVD_C12
RSVD_F52
<PART_SYM_NUM>
SP@SKL_ULT/BGA
+1.8V_S5 <5,8,9,40>
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
1
ZAA
ZAA
ZAA
F6 E3 C11 B11 A11 D12 C12 F52
10 48
10 48
10 48
1A
1A
1A
Page 11
5
Dr-Bios.com
D D
C C
4
3
2
1
B B
R289 *0_6
Intel APS Fixture use
CN2
A A
*ACES_88511-180N
1
APS1
1
2
2
3
APS3
3
4
4
5
5
6
6
7
APS7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
R291 *0_6
R282 *0_4
R278 *0_6 R279 *0_4 R274 *0_4 R273 *0_4
R271 *0_6
R268 *0_4
R265 *0_4
R267 *0_4
APS3
+3V_S5
SYS_RESET#
R272 *0_6
SUSB# <8,31,33>
PCH_SLP_S5# <8> SUSC# < 8,31> PCH_SLP_A# <8>
RTC_RST# <6>
NBSWON# <29,31>
SYS_RESET# <8>
5
4
APS7APS1
+3VPCU
+3VPCU
+3V_S5 <2,3,4,6,7,8,9,21,25,27,28,29,31,33,35,36,41> +3VPCU <6,9,23,25,26,27,28,29,31,32,33,40,41,42>
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Friday, February 05, 2016
Date: Sheet of
Friday, February 05, 2016
Date: Sheet of
3
2
Friday, February 05, 2016
PROJECT :
CPU/PCH XDP
CPU/PCH XDP
CPU/PCH XDP
ZAA
ZAA
ZAA
11 48
11 48
11 48
1
1A
1A
1A
Page 12
5
Dr-Bios.com
4
3
2
1
M_A_A[13:0]<3>
D D
M_A_WE#<3> M_A_CAS#<3> M_A_RAS#<3>
M_A_ACT#<3> M_A_PARITY<3>
R10890 *1K_4
M_A_ODT0_DIMM<3> M_A_ODT1_DIMM<3>
CLK_SCLK<7,13,22,29> CLK_SDATA<7,13,22,29>
+1.2VSUS
M_A_ALERT#<3>
C1258 *0.1U/10V_4
Close to PCH
M_A_BA#0<3> M_A_BA#1<3> M_A_BG#0<3> M_A_BG#1<3>
M_A_CS#0<3> M_A_CS#1<3> M_A_CKE0<3> M_A_CKE1<3>
M_A_CLK0<3> M_A_CLK0#<3> M_A_CLK1<3> M_A_CLK1#<3>
R10880 *10K_4
R10886 10K_4
R10885 240/F_4
M_A_EVENT#
PM_THRM TRIP#<13>
R10889 *10K_4
CHA_SA2CHA_SA1CHA_SA0
R10877 10K_4
DDR3_DRAMRST#<3,13>
+1.2VSUS
C C
B B
R10872 *10K_4
R10882 10K_4
+3V
TP154 TP153
M_A_EVENT#
M_A_EVENT#
CHA_SA0 CHA_SA1 CHA_SA2
R10896 240/F_4 R10871 240/F_4 R10875 240/F_4 R10881 240/F_4 R10879 240/F_4 R10884 240/F_4 R10888 240/F_4 R10892 240/F_4
+1.2VSUS
M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13
M_A_CB0 M_A_CB1 M_A_CB2 M_A_CB3 M_A_CB4 M_A_CB5 M_A_CB6 M_A_CB7
P/N and F/P
JDIM1A
144
A0
133
A1
132
A2
131
A3
128
A4
126
A5
127
A6
122
A7
125
A8
121
A9
146
A10/AP
120
A11
119
A12
158
A13
151
A14/WE#
156
A15/CAS#
152
A16/RAS#
162
S2#/C0
165
S3#/C1
114
ACT#
143
PARITY
116
ALERT#
134
EVENT#
108
RESET#
150
BA0
145
BA1
115
BG0
113
BG1
149
S0#
157
S1#
109
CKE0
110
CKE1
137
CK0
139
CK0#
138
CK1
140
CK1#
155
ODT0
161
ODT1
253
SCL
254
SDA
256
SA0
260
SA1
166
SA2
92
CB0
91
CB1
101
CB2
105
CB3
88
CB4
87
CB5
100
CB6
104
CB7
12
DM0
33
DM1
54
DM2
75
DM3
178
DM4
199
DM5
220
DM6
241
DM7
96
DM8
8
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8
DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48
(260P)
DDR4 SODIMM 260 PIN
DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63
DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS8
DQS#0 DQS#1 DQS#2 DQS#3 DQS#4 DQS#5 DQS#6 DQS#7 DQS#8
M_A_DQ0
7
M_A_DQ4
20
M_A_DQ2
21
M_A_DQ6
4
M_A_DQ5
3
M_A_DQ1
16
M_A_DQ7
17
M_A_DQ3
28
M_A_DQ13
29
M_A_DQ8
41
M_A_DQ15
42
M_A_DQ10
24
M_A_DQ9
25
M_A_DQ12
38
M_A_DQ11
37
M_A_DQ14
50
M_A_DQ21
49
M_A_DQ16
62
M_A_DQ23
63
M_A_DQ22
46
M_A_DQ17
45
M_A_DQ20
58
M_A_DQ18
59
M_A_DQ19
70
M_A_DQ28
71
M_A_DQ29
83
M_A_DQ30
84
M_A_DQ26
66
M_A_DQ25
67
M_A_DQ24
79
M_A_DQ31
80
M_A_DQ27
174
M_A_DQ37
173
M_A_DQ33
187
M_A_DQ35
186
M_A_DQ39
170
M_A_DQ32
169
M_A_DQ36
183
M_A_DQ34
182
M_A_DQ38
195
M_A_DQ41
194
M_A_DQ40
207
M_A_DQ42
208
M_A_DQ45
191
M_A_DQ47
190
M_A_DQ44
203
M_A_DQ43
204
M_A_DQ46
216
M_A_DQ53
215
M_A_DQ49
228
M_A_DQ51
229
M_A_DQ55
211
M_A_DQ48
212
M_A_DQ52
224
M_A_DQ54
225
M_A_DQ50
237
M_A_DQ62
236
M_A_DQ59
249
M_A_DQ60
250
M_A_DQ61
232
M_A_DQ58
233
M_A_DQ63
245
M_A_DQ56
246
M_A_DQ57
13
M_A_DQS0
34
M_A_DQS1
55
M_A_DQS2
76
M_A_DQS3
179
M_A_DQS4
200
M_A_DQS5
221
M_A_DQS6
242
M_A_DQS7
97
M_A_DQS8
11
M_A_DQS#0
32
M_A_DQS#1
53
M_A_DQS#2
74
M_A_DQS#3
177
M_A_DQS#4
198
M_A_DQS#5
219
M_A_DQS#6
240
M_A_DQS#7
95
M_A_DQS#8
M_A_DQ[63:0] <3>
0-7
8-15
16-23
24-31
33-39
40-47
48-55
56-63
M_A_DQS[7:0] <3>
M_A_DQS#[7:0] <3>
M_A_DQS8
M_A_DQS#8
R10891
240/F_4
R10894
240/F_4
+1.2VSUS
+1.2VSUS
+1.2VSUS
2250mA
255
257 259
258
164
VREF_C A_DIM M0
2 6 10 14 18 22 26 30 36 40 44 48 52 56 60 64 68 72 78 82 86 90 94 98 102 106 168 172 176 180 184 188 192 196 202 206 210 214 218 222 226 230 234 238 244 248 252
261 262
R11170 *0_4
C1265 10U/6.3V_6
C1267 0.1U/10V_4
0.5A
600mA
JDIM1B
111
VDD1
112
VDD2
117
VDD3
118
VDD4
123
VDD5
124
VDD6
129
VDD7
130
VDD8
135
VDD9
136
VDD10
141
VDD11
142
VDD12
147
VDD13
148
VDD14
153
VDD15
154
VDD16
159
VDD17
160
VDD18
163
VDD19
1
VSS1
5
VSS2
9
VSS3
15
VSS4
19
VSS5
23
VSS6
27
VSS7
31
VSS8
35
VSS9
39
VSS10
43
VSS11
47
VSS12
51
VSS13
57
VSS14
61
VSS15
65
VSS16
69
VSS17
73
VSS18
77
VSS19
81
VSS20
85
VSS21
89
VSS22
93
VSS23
99
VSS24
103
VSS25
107
VSS26
167
VSS27
171
VSS28
175
VSS29
181
VSS30
185
VSS31
189
VSS32
193
VSS33
197
VSS34
201
VSS35
205
VSS36
209
VSS37
213
VSS38
217
VSS39
223
VSS40
227
VSS41
231
VSS42
235
VSS43
239
VSS44
243
VSS45
247
VSS46
251
VSS47
VDDSPD
VPP1 VPP2
VTT
VREF_C A
VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65 VSS66 VSS67 VSS68
(260P)
DDR4 SODIMM 260 PIN
VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80 VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94
GND GND
R11133 *short_4
+2.5V_SUS
DDR_VTTREF
+2.5V
+3V
Place these Caps near So-Dimm1.
1uF/10uF 4pcs on each side of connector
+1.2VSUS
C1244 1U/6.3V_4
+1.2VSUS <3,5,13,36> +3V <2,4,6,7,8,9,13,14,16,22,23,24,25,26,27,28,29,31,33,34,35,36,37,40,41,42> +2.5V_SUS <13,36> DDR_VTTREF <13,36>
+VDDQ <13,36>
A A
5
+VREF_CA_CPU <3>
4
C1271 1U/6.3V_4
C1260 1U/6.3V_4
C1273 1U/6.3V_4
C1253 1U/6.3V_4
C1256 1U/6.3V_4
C1254 1U/6.3V_4
C1261 1U/6.3V_4
C1263 10U/6.3V_6 C1247 10U/6.3V_6
C1272 10U/6.3V_6 C1248 10U/6.3V_6
C1262 10U/6.3V_6 C1246 10U/6.3V_6
C1250 10U/6.3V_6 C1264 10U/6.3V_6
DDR_VTTREF
+3V
C1251 1U/6.3V_4
C1275 1U/6.3V_4
C1249 1U/6.3V_4
C1245 1U/6.3V_4
C1270 10U/6.3V_6
C1276 0.1U/16V_4
C1268 10U/6.3V_6
VREF_C A_DIM M0
+2.5V_SUS
C1259 0.1U/16V_4
C1255 10U/6.3V_6
C1266 0.1U/16V_4
C1257 10U/6.3V_6
3
VREF DQ0 M1 Solution
+VREF_CA_CPU
1023 Change R10410 from 2ohm to 24.9ohn
C1252
0.022U/25V_4
2 1
R10878 2/F_6
R10873 24.9/F_4
2
+1.2VSUS
R10883 1K/F_4
VREF_C A_DIM M0
R10895 1K/F_4
R10887*0_4
+VDDQ
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Friday, February 05, 2016
Date: Sheet of
Friday, February 05, 2016
Date: Sheet of
Friday, February 05, 2016
PROJECT :
DDR4 DIMM-STD(5.2H) CHA
DDR4 DIMM-STD(5.2H) CHA
DDR4 DIMM-STD(5.2H) CHA
1
ZAA
ZAA
ZAA
12 48
12 48
12 48
1A
1A
1A
Page 13
5
Dr-Bios.com
4
3
2
1
M_B_A[13:0]<3>
D D
M_B_WE#<3> M_B_CAS#<3> M_B_RAS#<3>
M_B_ACT#<3> M_B_PARITY<3>
+1.2VSUS
R10928 240/F_4
M_B_EVENT#
PM_THRM TRIP#<12>
C C
B B
+3V
R10940
R10924 *10K_4
CHB_SA0 CHB_SA1 CHB_SA2
R10943 10K_4
10K_4
R10937 *10K_4
R10923 *10K_4
R10927 10K_4
M_B_ALERT#<3>
DDR3_DRAMRST#<3,12>
R10921 *1K_4
Close to PCH
M_B_BA#0<3> M_B_BA#1<3> M_B_BG#0<3> M_B_BG#1<3>
M_B_CS#0<3> M_B_CS#1<3> M_B_CKE0<3> M_B_CKE1<3>
M_B_CLK0<3> M_B_CLK0#<3> M_B_CLK1<3> M_B_CLK1#<3>
M_B_ODT0_DIMM<3> M_B_ODT1_DIMM<3>
CLK_SCLK<7,12,22,29> CLK_SDATA<7,12,22,29>
+1.2VSUS
For EMI RESERVE
+1.2VSUS
EC39 *120P/50V_4
EC48 *120P/50V_4
EC42 *120P/50V_4
EC49 120P/50V_4
EC46 *120P/50V_4
EC45 *120P/50V_4 EC 50 *0.1U/16V_4
A A
DDR_VTTREF
5
EC35 *120P/50V_4
EC40 *120P/50V_4
+1.2VSUS
EC47 *120P/50V_4
EC43 *120P/50V_4
EC38 *0.1U/16V_4
EC41 *0.1U/16V_4
EC37 *0.1U/16V_4EC44 *120P/50V_4
M_B_EVENT#
C1317 *0.1U/10V_4
M_B_EVENT#
CHB_SA0 CHB_SA1 CHB_SA2
R10931 240/F_4 R10936 240/F_4 R10933 240/F_4 R10939 240/F_4 R10941 240/F_4 R10922 240/F_4 R10942 240/F_4 R10925 240/F_4
+1.2VSUS
M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13
TP158 TP157
M_B_CB0
M_B_CB1 M_B_CB2 M_B_CB3
M_B_CB4
M_B_CB5 M_B_CB6 M_B_CB7
1uF/10uF 4pcs on each side of connector
+1.2VSUS DDR_VTTREF
P/N and F/P
JDIM2A
144
A0
133
A1
132
A2
131
A3
128
A4
126
A5
127
A6
122
A7
125
A8
121
A9
146
A10/AP
120
A11
119
A12
158
A13
151
A14/WE#
156
A15/CAS#
152
A16/RAS#
162
S2#/C0
165
S3#/C1
114
ACT#
143
PARITY
116
ALERT#
134
EVENT#
108
RESET#
150
BA0
145
BA1
115
BG0
113
BG1
149
S0#
157
S1#
109
CKE0
110
CKE1
137
CK0
139
CK0#
138
CK1
140
CK1#
155
ODT0
161
ODT1
253
SCL
254
SDA
256
SA0
260
SA1
166
SA2
92
CB0
91
CB1
101
CB2
105
CB3
88
CB4
87
CB5
100
CB6
104
CB7
12
DM0
33
DM1
54
DM2
75
DM3
178
DM4
199
DM5
220
DM6
241
DM7
96
DM8
8
DQ0
7
DQ1
20
DQ2
21
DQ3
4
DQ4
3
DQ5
16
DQ6
17
DQ7
28
DQ8
29
DQ9
41
DQ10
42
DQ11
24
DQ12
25
DQ13
38
DQ14
37
DQ15
50
DQ16
49
DQ17
62
DQ18
63
DQ19
46
DQ20
45
DQ21
58
DQ22
59
DQ23
70
DQ24
71
DQ25
83
DQ26
84
DQ27
66
DQ28
67
DQ29
79
DQ30
80
DQ31
174
DQ32
173
DQ33
187
DQ34
186
DQ35
170
DQ36
169
DQ37
183
DQ38
182
DQ39
195
DQ40
194
DQ41
207
DQ42
208
DQ43
191
DQ44
190
DQ45
203
DQ46
204
DQ47
216
DQ48
(260P)
215
DDR4 SODIMM 260 PIN
DQ49
228
DQ50
229
DQ51
211
DQ52
212
DQ53
224
DQ54
225
DQ55
237
DQ56
236
DQ57
249
DQ58
250
DQ59
232
DQ60
233
DQ61
245
DQ62
246
DQ63
13
DQS0
34
DQS1
55
DQS2
76
DQS3
179
DQS4
200
DQS5
221
DQS6
242
DQS7
97
DQS8
11
DQS#0
32
DQS#1
53
DQS#2
74
DQS#3
177
DQS#4
198
DQS#5
219
DQS#6
240
DQS#7
95
DQS#8
Place these Caps near So-Dimm0.
C1332 1U/6.3V_4
C1325 1U/6.3V_4
C1309 1U/6.3V_4
C1318 1U/6.3V_4
C1314 1U/6.3V_4
C1336 1U/6.3V_4
C1335 1U/6.3V_4
C1330 10U/6.3V_6
C1312 10U/6.3V_6
C1321 10U/6.3V_6
C1331 10U/6.3V_6
C1328 10U/6.3V_6
C1334 10U/6.3V_6
C1313 10U/6.3V_6
C1308 10U/6.3V_6
4
VREF_C A_DIM M1
+2.5V_SUS
+3V
M_B_DQ1 M_B_DQ4 M_B_DQ7 M_B_DQ3 M_B_DQ0 M_B_DQ5 M_B_DQ2 M_B_DQ6 M_B_DQ13 M_B_DQ9 M_B_DQ14 M_B_DQ15 M_B_DQ12 M_B_DQ8 M_B_DQ11 M_B_DQ10 M_B_DQ21 M_B_DQ17 M_B_DQ19 M_B_DQ22 M_B_DQ20 M_B_DQ16 M_B_DQ18 M_B_DQ23 M_B_DQ28 M_B_DQ25 M_B_DQ26 M_B_DQ31 M_B_DQ29 M_B_DQ24 M_B_DQ30 M_B_DQ27 M_B_DQ32 M_B_DQ36 M_B_DQ39 M_B_DQ35 M_B_DQ33 M_B_DQ37 M_B_DQ38 M_B_DQ34 M_B_DQ45 M_B_DQ40 M_B_DQ42 M_B_DQ47 M_B_DQ44 M_B_DQ41 M_B_DQ43 M_B_DQ46 M_B_DQ53 M_B_DQ49 M_B_DQ54 M_B_DQ55 M_B_DQ48 M_B_DQ52 M_B_DQ51 M_B_DQ50 M_B_DQ61 M_B_DQ60 M_B_DQ59 M_B_DQ62 M_B_DQ57 M_B_DQ56 M_B_DQ58 M_B_DQ63
M_B_DQS0 M_B_DQS1 M_B_DQS2 M_B_DQS3 M_B_DQS4 M_B_DQS5 M_B_DQS6 M_B_DQS7 M_B_DQS8
M_B_DQS#0 M_B_DQS#1 M_B_DQS#2 M_B_DQS#3 M_B_DQS#4 M_B_DQS#5 M_B_DQS#6 M_B_DQS#7 M_B_DQS#8
C1315 1U/6.3V_4
C1311 1U/6.3V_4EC36 *120P/50V_4
C1310 1U/6.3V_4
C1319 1U/6.3V_4
C1333 1U/6.3V_4C1337 1U/6.3V_4
C1323 0.1U/16V_4
C1327 10U/6.3V_6
C1320 0.1U/16V_4
C1324 10U/6.3V_6
C1326 0.1U/16V_4
C1316 10U/6.3V_6
M_B_DQ[63:0] <3>
0-7
8-15
16-23
24-31
32-39
40-47
48-55
56-63
M_B_DQS[7:0] <3>
M_B_DQS#[7:0] <3>
+VREFDQ_SB_M3
+1.2VSUS
+1.2VSUS
R10926
240/F_4
M_B_DQS8
+1.2VSUS
R10929
240/F_4
M_B_DQS#8
VREF DQ1 M1 Solution
+VREFDQ_SB_M3 VREF _CA_D IMM1
3
R10932 2/F_6
C1329
0.022U/25V_4
2 1
R10930
24.9/F_4
2250mA
+1.2VSUS
R10934 1K/F_4
R10938 1K/F_4
JDIM2B
111
VDD1
112
VDD2
117
VDD3
118
VDD4
123
VDD5
124
VDD6
129
VDD7
130
VDD8
135
VDD9
136
VDD10
141
VDD11
142
VDD12
147
VDD13
148
VDD14
153
VDD15
154
VDD16
159
VDD17
160
VDD18
163
VDD19
1
VSS1
5
VSS2
9
VSS3
15
VSS4
19
VSS5
23
VSS6
27
VSS7
31
VSS8
35
VSS9
39
VSS10
43
VSS11
47
VSS12
51
VSS13
57
VSS14
61
VSS15
65
VSS16
69
VSS17
73
VSS18
77
VSS19
81
VSS20
85
VSS21
89
VSS22
93
VSS23
99
VSS24
103
VSS25
107
VSS26
167
VSS27
171
VSS28
175
VSS29
181
VSS30
185
VSS31
189
VSS32
193
VSS33
197
VSS34
201
VSS35
205
VSS36
209
VSS37
213
VSS38
217
VSS39
223
VSS40
227
VSS41
231
VSS42
235
VSS43
239
VSS44
243
VSS45
247
VSS46
251
VSS47
VDDSPD
VPP1 VPP2
VTT
VREF_C A
VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65 VSS66 VSS67 VSS68
(260P)
DDR4 SODIMM 260 PIN
VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80 VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94
GND GND
+1.2VSUS <3,5,12,36> +3V <2,4,6,7,8,9,12,14,16,22,23,24,25,26,27,28,29,31,33,34,35,36,37,40,41,42> +2.5V_SUS <12,36> DDR_VTTREF <12,36>
+VDDQ <12,36> +VREFDQ_SB_M3 <3>
R10935*0_4
+VDDQ
2
255
257 259
258
164
VREF_C A_DIM M1
2 6 10 14 18 22 26 30 36 40 44 48 52 56 60 64 68 72 78 82 86 90 94 98 102 106 168 172 176 180 184 188 192 196 202 206 210 214 218 222 226 230 234 238 244 248 252
261 262
R11174 *0_4
C1322 10U/6.3V_6
C1338 0.1U/10V_4
0.5A
600mA
R11134 *short_4
+2.5V_SUS
DDR_VTTREF
+2.5V
+3V
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Friday, February 05, 2016
Date: Sheet of
Friday, February 05, 2016
Date: Sheet of
Friday, February 05, 2016
PROJECT :
DDR4 DIMM-RVS(5.2H) CHB
DDR4 DIMM-RVS(5.2H) CHB
DDR4 DIMM-RVS(5.2H) CHB
1
ZAA
ZAA
ZAA
13 48
13 48
13 48
1A
1A
1A
Page 14
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Dr-Bios.com
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3
4
5
6
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8
N16S-GT1-KA-A2 GM107-710-KA-A2 AJ0N16S0T22 B/S PN
U3002A
(;<*+'>!!BC%?%77,,@#
+1.05V_GFX
To be placed no fur ther from the GPU than bewteen the PS and GPU
C4000 EV@22U/6.3V_6 C4001 EV@22U/6.3V_6 C4002 EV@22U/6.3V_6
A A
B B
C C
D D
C4003 EV@22U/6.3V_6 C4004 EV@10U/6.3V_6 C4005 EV@10U/6.3V_6 C4006 EV@10U/6.3V_6 C4007 EV@10U/6.3V_6
PLACE NEAR BALLS
C4008 EV@1U/6.3V_4 C4009 EV@1U/6.3V_4 C4010 EV@1U/6.3V_4 C4011 EV@1U/6.3V_4
PLACE UNDER BGA
C4012 EV@4.7U/6.3V_4 C4014 EV@4.7U/6.3V_4
PLACE CLOSE TO BGA
C4026 EV@4.7U/6.3V_4 C4027 EV@1U/6.3V_4
C4028 EV@0.1u/16V_4 C4029 *EV@0.1U/16V_4 C4031 *EV@0.1U/16V_4
PLACE CLOSE TO GPU BALL S
+3V_GFX +3V_MAIN
1
>!!77%?%A8@#
PLACE CLOSE TO BGA
C4032 EV@4.7U/6.3V_4 C4033 EV@1U/6.3V_4
PLACE CLOSE TO GPU BALL S
C4034 EV@0.1u/16V_4
C4035 EV@0.1u/16V_4
AG19 AG21 AG22 AG24 AH21 AH25
AG13 AG15 AG16 AG18 AG25 AH15 AH18 AH26 AH27
AJ27 AK27 AL27 AM28 AN28
AC6
AJ28
AL11
AJ4 AJ5
C15 D19 D20 D23 D26 H31
T8
V32
Y1 Y2
Y3 AA1 AA2 AA3 AA4 AA5 AA6 AA7 AA8
J8
K8
L8
M8
SP@N16P-GT
PEX_IOVDD_1 PEX_IOVDD_2 PEX_IOVDD_3 PEX_IOVDD_4 PEX_IOVDD_5 PEX_IOVDD_6
PEX_IOVDDQ_1 PEX_IOVDDQ_2 PEX_IOVDDQ_3 PEX_IOVDDQ_4 PEX_IOVDDQ_5 PEX_IOVDDQ_6 PEX_IOVDDQ_7 PEX_IOVDDQ_8 PEX_IOVDDQ_9 PEX_IOVDDQ_10 PEX_IOVDDQ_11 PEX_IOVDDQ_12 PEX_IOVDDQ_13 PEX_IOVDDQ_14
NC_1 NC_2 NC_3 NC_4 NC_5 NC_6 NC_7 NC_8 NC_9 NC_10 NC_11 NC_12 NC_13 NC_14 NC_15 NC_16 NC_17 NC_18 NC_19 NC_20 NC_21 NC_22 NC_23 NC_24
3V3_AON_1 3V3_AON_2 3V3_MAIN_1 3V3_MAIN_2
2
[PEG Interface]
PEX_RX0
PEX_RX0_N
PEX_RX1
PEX_RX1_N
PEX_RX2
PEX_RX2_N
PEX_RX3
PEX_RX3_N
PEX_RX4
PEX_RX4_N
PEX_RX5
PEX_RX5_N
PEX_RX6
PEX_RX6_N
PEX_RX7
PEX_RX7_N
PEX_RX8
PEX_RX8_N
PEX_RX9
PEX_RX9_N
PEX_RX10
PEX_RX10_N
PEX_RX11
PEX_RX11_N
PEX_RX12
PEX_RX12_N
PEX_RX13
PEX_RX13_N
PEX_RX14
PEX_RX14_N
PEX_RX15
PEX_RX15_N
PEX_TX0
PEX_TX0_N
PEX_TX1
PEX_TX1_N
PEX_TX2
PEX_TX2_N
PEX_TX3
PEX_TX3_N
PEX_TX4
PEX_TX4_N
PEX_TX5
PEX_TX5_N
PEX_TX6
PEX_TX6_N
PEX_TX7
PEX_TX7_N
PEX_TX8
PEX_TX8_N
PEX_TX9
PEX_TX9_N
PEX_TX10
PEX_TX10_N
PEX_TX11
PEX_TX11_N
PEX_TX12
PEX_TX12_N
PEX_TX13
PEX_TX13_N
PEX_TX14
PEX_TX14_N
PEX_TX15
PEX_TX15_N
PEX_REFCLK
PEX_REFCLK_N
PEX_TSTCLK_OUT
PEX_TSTCLK_OUT_N
PEX_RST_N
PEX_CLKREQ_N
PEX_TERMP
TESTMODE
PEX_PLLVDD
PEX_PLL_HVDD PEX_SVDD_3V3
3.3V_AUX_NC
VDD_SENSE
GND_SENSE
3
AN12 AM12 AN14 AM14 AP14 AP15 AN15 AM15 AN17 AM17 AP17 AP18 AN18 AM18 AN20 AM20 AP20 AP21 AN21 AM21 AN23 AM23 AP23 AP24 AN24 AM24 AN26 AM26 AP26 AP27 AN27 AM27
AK14
PEG_RXP0_C
AJ14
PEG_RXN0_C
AH14
PEG_RXP1_C
AG14
PEG_RXN1_C
AK15
PEG_RXP2_C
AJ15
PEG_RXN2_C
AL16
PEG_RXP3_C
AK16
PEG_RXN3_C
AK17 AJ17 AH17 AG17 AK18 AJ18 AL19 AK19 AK20 AJ20 AH20 AG20 AK21 AJ21 AL22 AK22 AK23 AJ23 AH23 AG23 AK24 AJ24 AL25 AK25
AL13 AK13
AJ26
PEX_TSTCLK
AK26
PEX_TSTCLK#
AJ11
NC
AJ12
PEGX_RST#
AK12
PEX_CLKREQ#
AP29
PEX_TERMP
AK11
TESTMODE
AG26
PEX_PLLVDD
AH12 AG12
P8
L4
L5
(;<*=>!!*7>7%?%65,@#
3.3V_AUX
PEG_TX0 <6> PEG_TX#0 <6> PEG_TX1 <6> PEG_TX#1 <6> PEG_TX2 <6> PEG_TX#2 <6> PEG_TX3 <6> PEG_TX#3 <6>
C4015 EV@0.22U/10V_4 C4016 EV@0.22U/10V_4 C4017 EV@0.22U/10V_4 C4018 EV@0.22U/10V_4 C4020 EV@0.22U/10V_4 C4021 EV@0.22U/10V_4 C4022 EV@0.22U/10V_4 C4023 EV@0.22U/10V_4
CLK_PCIE_VGA <6> CLK_PCIE_VGA# <6>
R4006 *EV@200/F_4
R4008 EV@10K_4
R4009 EV@2.49K/F _4
R4011 EV@10K_4
(;<*(22>!!%?%58,@#
C4038EV@0.1u/16V_4 C4039EV@4.7U/6.3V_4
PLACE NEAR BGA
C4041EV@4.7U/6.3V_4
TP4000
VGA_VCCSENSE <41>
VGA_VSSSENSE <41>
4
PEGX_RST# <17>
+3V_GFX
N16S-GT1-KB-A2 GM107-710-KB-A2 AJSR2JK8T02 N16S-GTR-B-A2 GM108-770-A2 AJ0N16S0T24
3V MAIN POWER
3/11 GC6 timing issue from 200K change to 100K
R4000 EV@10K_4
R4002 EV@100K_4
3
2
Q4001 EV@2N7002K
1
+3V
SYS_PEX_RST_MON#<17>
2
1
C4030
U4001
3 5
GC6@74AHC1G09GW
GC6 FBVDDQ_EN
GC6_FB_EN<4,17>
GPU_PWR_GD<41>
6
PEG_RX0 <6> PEG_RX#0 <6> PEG_RX1 <6> PEG_RX#1 <6> PEG_RX2 <6> PEG_RX#2 <6> PEG_RX3 <6> PEG_RX#3 <6>
+3V_GFX
PEX_CLKREQ#
R4010 *short_6
C4036 EV@4.7U/6.3V_4
C4037 EV@1U/6.3V_4
C4040 EV@0.1u/16V_4
+3V_MAIN
2
31
Q4002
EV@2N7002KW_1 15MA
GC6:+3V_MAIN
GC6 Power control
+3V_MAIN_EN<17>
GC6 PEGX_RST#
DGPU_HOLD_RST#<4>
+1.05V_GFX
B2A
PLACE NEAR GPU
PLACE NEAR GPU
PLACE UNDER GPU BALLS
CLK_PEGA_REQ# <6>
5
+3V_GFX
R4001 EV@10K_4
PLTRST#<8,25,27,28,31>
EV@1000p/50V_4
+1.05V_GFX <15,16,42> +3V_GFX <16,17,31,42> +3V_MAIN <15,16,17> +3V <2,4,6,7,8,9,12,13,16,22,23,24,25,26,27,28,29,31,33,34,35,36,37,40,41,42>
+3V_GFX+3V_GFX
C4013
EV@0.022U/25V_4
2
C4019
EV@0.022U/25V_4
C4024 GC6@0.1U/16V_4
4
GPU_PEX_RST_HOLD#<17>
R11108 *short_4
RST_MON#
R4007
RST_MON# PEGX_RST#
GC6_FB_EN
GC6@BAT54CW_200MA
60mil
1
3
Q4000 EV@AO3413
60mil
R4003
*0_8
+3V_MAIN
N16V stuff not support GC6 2.0.
+3V
C4025 GC6@0.1U/16V_4
2
1
*NGC6@0_4
1
3
2
D4000
12
R4012 GC6@1M_4
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Friday, February 05, 2016
Date: Sheet of
Friday, February 05, 2016
Date: Sheet of
Friday, February 05, 2016
7
4
3 5
U4002 GC6@TC7SH08FU(F)
FBVDDQ_EN <42>
C3A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
N16 - 1/5 (PCIE)
N16 - 1/5 (PCIE)
N16 - 1/5 (PCIE)
+3V_GFX
ZAA
ZAA
ZAA
R4004 *GC6@10K_4
PEGX_RST#
R4005 GC6@100K_4
14 48
14 48
14 48
8
1A
1A
1A
Page 15
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Dr-Bios.com
FBA_CMD0<19> FBA_CMD1<19> FBA_CMD2<19> FBA_CMD3<19> FBA_CMD4<19>
FBA_CMD5<19>
FBA_CMD6<19> FBA_CMD7<19>
A A
B B
FBA_CMD8<19> FBA_CMD9<19> FBA_CMD10<19> FBA_CMD11<19> FBA_CMD12<19> FBA_CMD13<19> FBA_CMD14<19> FBA_CMD15<19> FBA_CMD16<19> FBA_CMD17<19>
FBA_CMD18<19>
FBA_CMD19<19> FBA_CMD20<19> FBA_CMD21<19> FBA_CMD22<19> FBA_CMD23<19> FBA_CMD24<19> FBA_CMD25<19> FBA_CMD26<19> FBA_CMD27<19> FBA_CMD28<19> FBA_CMD29<19> FBA_CMD30<19> FBA_CMD31<19>
FBA_DBI[7:0]<19>
FBA_EDC[7:0]<19>
FBA_CMD0 FBA_CMD1
FBA_CMD2 FBA_CMD3
FBA_CMD4
FBA_CMD5
FBA_CMD6 FBA_CMD7 FBA_CMD8 FBA_CMD9 FBA_CMD10 FBA_CMD11 FBA_CMD12 FBA_CMD13 FBA_CMD14 FBA_CMD15 FBA_CMD16 FBA_CMD17
FBA_CMD18 FBA_CMD19
FBA_CMD20 FBA_CMD21 FBA_CMD22 FBA_CMD23 FBA_CMD24 FBA_CMD25 FBA_CMD26 FBA_CMD27 FBA_CMD28 FBA_CMD29 FBA_CMD30 FBA_CMD31
FBA_DBI0 FBA_DBI1 FBA_DBI2 FBA_DBI3 FBA_DBI4 FBA_DBI5 FBA_DBI6 FBA_DBI7
FBA_EDC0 FBA_EDC1 FBA_EDC2 FBA_EDC3 FBA_EDC4 FBA_EDC5 FBA_EDC6 FBA_EDC7
GDDR5 NO USE
+1.35V_GFX
PLACE CLOSE TO GPU BALLS
C C
D D
C4100 EV@1U/6.3V_4 C4101 EV@1U/6.3V_4 C4102 EV@1U/6.3V_4 C4103 EV@1U/6.3V_4
C4104 EV@0.1U/16V_4 C4105 EV@0.1U/16V_4 C4106 EV@0.1U/16V_4 C4107 EV@0.1U/16V_4
PLACE CLOSE TO BGA
C4108 EV@4.7U/6.3V_4 C4109 EV@4.7U/6.3V_4 C4110 EV@4.7U/6.3V_4 C4113 EV@4.7U/6.3V_4 C4111 EV@10U/6.3V_6 C4115 EV@10U/6.3V_4
C4117 *EV@10U/6.3V_4 C4815 *EV@10U/6.3V_4
C4119 EV@22U/6.3V_6
B2A
1
U30
U29 R34 R33 U32 U33 U28 V28 V29 V30 U34 U31 V34 V33
Y32 AA31 AA29 AA28 AC34 AC33 AA32 AA33
Y28
Y29
W31
Y30 AA34
Y31
Y34
Y33
V31
P30
M32 AD31
AL29
AM32
AF34
M31
G31
E33
M33 AE31 AK30 AN33
AF33
M30
H30
E34
M34
AF30 AK31 AM34
AF32
AA27 AA30 AB27 AB33 AC27 AD27 AE27
AF27 AG27
B13 B19 E13 E19 H10 H11 H12 H13 H14 H18 H19 H20 H21 H22 H23 H24
M27 N27 P27 R27
Y27
B16 E16 H15 H16
V27 W27 W30 W33
T31
F31 F34
L27
T27 T30 T33
U3002B SP@N16P-GT
FBA_CMD0 FBA_CMD1 FBA_CMD2 FBA_CMD3 FBA_CMD4 FBA_CMD5 FBA_CMD6 FBA_CMD7 FBA_CMD8 FBA_CMD9 FBA_CMD10 FBA_CMD11 FBA_CMD12 FBA_CMD13 FBA_CMD14 FBA_CMD15 FBA_CMD16 FBA_CMD17 FBA_CMD18 FBA_CMD19 FBA_CMD20 FBA_CMD21 FBA_CMD22 FBA_CMD23 FBA_CMD24 FBA_CMD25 FBA_CMD26 FBA_CMD27 FBA_CMD28 FBA_CMD29 FBA_CMD30 FBA_CMD31
FBA_DQM0 FBA_DQM1 FBA_DQM2 FBA_DQM3 FBA_DQM4 FBA_DQM5 FBA_DQM6 FBA_DQM7
FBA_DQS_WP0 FBA_DQS_WP1 FBA_DQS_WP2 FBA_DQS_WP3 FBA_DQS_WP4 FBA_DQS_WP5 FBA_DQS_WP6 FBA_DQS_WP7
FBA_DQS_RN0 FBA_DQS_RN1 FBA_DQS_RN2 FBA_DQS_RN3 FBA_DQS_RN4 FBA_DQS_RN5 FBA_DQS_RN6 FBA_DQS_RN7
FBVDDQ_1 FBVDDQ_2 FBVDDQ_3 FBVDDQ_4 FBVDDQ_5 FBVDDQ_6 FBVDDQ_7 FBVDDQ_8 FBVDDQ_9 FBVDDQ_10 FBVDDQ_12 FBVDDQ_13 FBVDDQ_15 FBVDDQ_16 FBVDDQ_17 FBVDDQ_18 FBVDDQ_19 FBVDDQ_20 FBVDDQ_23 FBVDDQ_24 FBVDDQ_25 FBVDDQ_26 FBVDDQ_27 FBVDDQ_28 FBVDDQ_29
H8
FBVDDQ_30
H9
FBVDDQ_31 FBVDDQ_32 FBVDDQ_33 FBVDDQ_34 FBVDDQ_35 FBVDDQ_36 FBVDDQ_37 FBVDDQ_38 FBVDDQ_39 FBVDDQ_44
FBVDDQ_AON_1 FBVDDQ_AON_2 FBVDDQ_AON_3 FBVDDQ_AON_4 FBVDDQ_AON_5 FBVDDQ_AON_6 FBVDDQ_AON_7 FBVDDQ_AON_8
2
[MEMORY I/F A]
FBA_CLK0_N
FBA_CLK1_N
FBA_WCK01_N
FBA_WCK23_N
FBA_WCK45_N
FBA_WCK67_N
FB_DLL_AVDD
FBA_PLL_AVDD
FB_VDDQ_SENSE
FB_GND_SENSE
FB_CAL_PD_VDDQ
FB_CAL_PU_GND
FB_CALTERM_GND
2
FBA_D00 FBA_D01 FBA_D02 FBA_D03 FBA_D04 FBA_D05 FBA_D06 FBA_D07 FBA_D08 FBA_D09 FBA_D10 FBA_D11 FBA_D12 FBA_D13 FBA_D14 FBA_D15 FBA_D16 FBA_D17 FBA_D18 FBA_D19 FBA_D20 FBA_D21 FBA_D22 FBA_D23 FBA_D24 FBA_D25 FBA_D26 FBA_D27 FBA_D28 FBA_D29 FBA_D30 FBA_D31 FBA_D32 FBA_D33 FBA_D34 FBA_D35 FBA_D36 FBA_D37 FBA_D38 FBA_D39 FBA_D40 FBA_D41 FBA_D42 FBA_D43 FBA_D44 FBA_D45 FBA_D46 FBA_D47 FBA_D48 FBA_D49 FBA_D50 FBA_D51 FBA_D52 FBA_D53 FBA_D54 FBA_D55 FBA_D56 FBA_D57 FBA_D58 FBA_D59 FBA_D60 FBA_D61 FBA_D62 FBA_D63
FBA_CLK0
FBA_CLK1
FBA_CMD32 FBA_CMD33 FBA_CMD34 FBA_CMD35
FB_VREF
FBA_WCK01
FBA_WCK23
FBA_WCK45
FBA_WCK67
FB_CLAMP
3
NC NC NC NC NC NC NC NC
3
L28
VMA_DQ0
M29
VMA_DQ1
L29
VMA_DQ2
M28
VMA_DQ3
N31
VMA_DQ4
P29
VMA_DQ5
R29
VMA_DQ6
P28
VMA_DQ7
J28
VMA_DQ8
H29
VMA_DQ9
J29
VMA_DQ10
H28
VMA_DQ11
G29
VMA_DQ12
E31
VMA_DQ13
E32
VMA_DQ14
F30
VMA_DQ15
C34
VMA_DQ16
D32
VMA_DQ17
B33
VMA_DQ18
C33
VMA_DQ19
F33
VMA_DQ20
F32
VMA_DQ21
H33
VMA_DQ22
H32
VMA_DQ23
P34
VMA_DQ24
P32
VMA_DQ25
P31
VMA_DQ26
P33
VMA_DQ27
L31
VMA_DQ28
L34
VMA_DQ29
L32
VMA_DQ30
L33
VMA_DQ31
AG28
VMA_DQ32
AF29
VMA_DQ33
AG29
VMA_DQ34
AF28
VMA_DQ35
AD30
VMA_DQ36
AD29
VMA_DQ37
AC29
VMA_DQ38
AD28
VMA_DQ39
AJ29
VMA_DQ40
AK29
VMA_DQ41
AJ30
VMA_DQ42
AK28
VMA_DQ43
AM29
VMA_DQ44
AM31
VMA_DQ45
AN29
VMA_DQ46
AM30
VMA_DQ47
AN31
VMA_DQ48
AN32
VMA_DQ49
AP30
VMA_DQ50
AP32
VMA_DQ51
AM33
VMA_DQ52
AL31
VMA_DQ53
AK33
VMA_DQ54
AK32
VMA_DQ55
AD34
VMA_DQ56
AD32
VMA_DQ57
AC30
VMA_DQ58
AD33
VMA_DQ59
AF31
VMA_DQ60
AG34
VMA_DQ61
AG32
VMA_DQ62
AG33
VMA_DQ63
R30 R31 AB31 AC31
R28
FBA_DEBUG0_K
AC28
FBA_DEBUG1_K
R32
FBA_DEBUG0
AC32
FBA_DEBUG1
H26
K31 L30 H34 J34 AG30 AG31 AJ34 AK34
J30 J31 J32 J33 AH31 AJ31 AJ32 AJ33
E1
PS_FB_CLAMP
K27
FB_DLLAVDD
U27
FB_PLLAVDD
F1
FBVDDQ_SENSE
F2
FB_GND_SENSE
J27
FB_CAL_PD_VDDQ
H27
FB_CAL_PU_GND
H25
FB_CAL_TERM_GND
VMA_DQ0 <19> VMA_DQ1 <19> VMA_DQ2 <19> VMA_DQ3 <19> VMA_DQ4 <19> VMA_DQ5 <19> VMA_DQ6 <19> VMA_DQ7 <19> VMA_DQ8 <19> VMA_DQ9 <19> VMA_DQ10 <19> VMA_DQ11 <19> VMA_DQ12 <19> VMA_DQ13 <19> VMA_DQ14 <19> VMA_DQ15 <19> VMA_DQ16 <19> VMA_DQ17 <19> VMA_DQ18 <19> VMA_DQ19 <19> VMA_DQ20 <19> VMA_DQ21 <19> VMA_DQ22 <19> VMA_DQ23 <19>
VMA_DQ24 <19>
VMA_DQ25 <19>
VMA_DQ26 <19>
VMA_DQ27 <19> VMA_DQ28 <19> VMA_DQ29 <19> VMA_DQ30 <19> VMA_DQ31 <19> VMA_DQ32 <19> VMA_DQ33 <19> VMA_DQ34 <19> VMA_DQ35 <19> VMA_DQ36 <19> VMA_DQ37 <19> VMA_DQ38 <19> VMA_DQ39 <19> VMA_DQ40 <19> VMA_DQ41 <19> VMA_DQ42 <19> VMA_DQ43 <19> VMA_DQ44 <19> VMA_DQ45 <19> VMA_DQ46 <19> VMA_DQ47 <19> VMA_DQ48 <19> VMA_DQ49 <19> VMA_DQ50 <19>
VMA_DQ51 <19>
VMA_DQ52 <19> VMA_DQ53 <19> VMA_DQ54 <19> VMA_DQ55 <19> VMA_DQ56 <19> VMA_DQ57 <19> VMA_DQ58 <19> VMA_DQ59 <19> VMA_DQ60 <19> VMA_DQ61 <19> VMA_DQ62 <19> VMA_DQ63 <19>
VMA_CLK0 <19> VMA_CLK0# <19> VMA_CLK1 <19> VMA_CLK1# <19>
R4103*EV@60.4/F_4 R4105*EV@60.4/F_4
VMA_WCK01 <19> VMA_WCK01# <19> VMA_WCK23 <19> VMA_WCK23# <19> VMA_WCK45 <19> VMA_WCK45# <19> VMA_WCK67 <19> VMA_WCK67# <19>
R4114 EV@10K_4
DE)*(22#>!!%?%96@#
+1.35V_GFX
R4115 *EV@0_4
R4116 *EV@0_4
R4117 EV@40.2/F_4
R4118 EV@42.2/F_4
R4119 EV@60.4/F_4
PLACE CLOSE TO GPU BALLS
4
TP4106 TP4107
+1.35V_GFX
C4114 EV@0.1U/16V_4
C4116 EV@0.1U/16V_4
C4118 EV@10U/6.3V_4 C4812 EV@10U/6.3V_4
+1.35V_GFX
4
FBB_CMD0<20> FBB_CMD1<20> FBB_CMD2<20> FBB_CMD3<20> FBB_CMD4<20>
FBB_CMD5<20>
FBB_CMD6<20> FBB_CMD7<20> FBB_CMD8<20> FBB_CMD9<20> FBB_CMD10<20> FBB_CMD11<20> FBB_CMD12<20> FBB_CMD13<20> FBB_CMD14<20> FBB_CMD15<20> FBB_CMD16<20> FBB_CMD17<20>
FBB_CMD18<20>
FBB_CMD19<20> FBB_CMD20<20> FBB_CMD21<20> FBB_CMD22<20> FBB_CMD23<20> FBB_CMD24<20> FBB_CMD25<20> FBB_CMD26<20> FBB_CMD27<20> FBB_CMD28<20> FBB_CMD29<20> FBB_CMD30<20> FBB_CMD31<20>
FBB_DBI[7:0]<20>
FBB_EDC[7:0]<20>
GDDR5 NO USE
C4719 EV@0.1U/16V_4
C4721 EV@22U/6.3V_6
L4206*SP@HCB1005K F-330T30
L4100SP@HCB1005KF-330T30
B2A
5
U3002C SP@N16P-GT
D13 E14
F14 A12 B12 C14 B14 G15
F15 E15 D15 A14 D14 A15 B15 C17 D18 E18
F18 A20 B20 C18 B18 G18 G17
F17 D16 A18 D17 A17 B17 E17
E11
E3 A3
C9 F23 F27
C30 A24
D10
D5
C3
B9
E23 E28 B30 A23
D9
E4
B2
A9
D22 D28 A30 B23
FBB_CMD0 FBB_CMD1 FBC_CMD2 FBB_CMD3 FBB_CMD4 FBB_CMD5 FBB_CMD6 FBC_CMD7 FBB_CMD8 FBB_CMD9 FBB_CMD10 FBB_CMD11 FBB_CMD12 FBB_CMD13 FBB_CMD14 FBB_CMD15 FBB_CMD16 FBB_CMD17 FBB_CMD18 FBB_CMD19 FBB_CMD20 FBB_CMD21 FBB_CMD22 FBB_CMD23 FBB_CMD24 FBB_CMD25 FBB_CMD26 FBB_CMD27 FBB_CMD28 FBB_CMD29 FBC_CMD30 FBC_CMD31
FBC_DQM0 FBC_DQM1 FBC_DQM2 FBC_DQM3 FBC_DQM4 FBC_DQM5 FBC_DQM6 FBC_DQM7
FBC_DQS_WP0 FBC_DQS_WP1 FBC_DQS_WP2 FBC_DQS_WP3 FBC_DQS_WP4 FBC_DQS_WP5 FBC_DQS_WP6 FBC_DQS_WP7
FBC_DQS_RN0 FBC_DQS_RN1 FBC_DQS_RN2 FBC_DQS_RN3 FBC_DQS_RN4 FBC_DQS_RN5 FBC_DQS_RN6 FBC_DQS_RN7
L4207EV@HCB1005KF-330T30
+3V_MAIN
+1.05V_GFX
FBB_CMD0 FBB_CMD1
FBB_CMD2 FBB_CMD3
FBB_CMD4
FBB_CMD5
FBB_CMD6 FBB_CMD7 FBB_CMD8 FBB_CMD9 FBB_CMD10 FBB_CMD11 FBB_CMD12 FBB_CMD13 FBB_CMD14 FBB_CMD15 FBB_CMD16 FBB_CMD17
FBB_CMD18 FBB_CMD19
FBB_CMD20 FBB_CMD21 FBB_CMD22 FBB_CMD23 FBB_CMD24 FBB_CMD25 FBB_CMD26 FBB_CMD27 FBB_CMD28 FBB_CMD29 FBB_CMD30 FBB_CMD31
FBB_DBI0 FBB_DBI1 FBB_DBI2 FBB_DBI3 FBB_DBI4 FBB_DBI5 FBB_DBI6 FBB_DBI7
FBB_EDC0 FBB_EDC1 FBB_EDC2 FBB_EDC3 FBB_EDC4 FBB_EDC5 FBB_EDC6 FBB_EDC7
+1.05V_GFX
E3F%59;
E3F%59(
C574 close to K27 (under GPU)
C575 close to U27 (under GPU) C576 near to GPU
+1.35V_GFX <19,20,42> +1.05V_GFX <14,16,42>
5
6
MEMORY I/F C
6
FBC_D00 FBC_D01 FBC_D02 FBC_D03 FBC_D04 FBC_D05 FBC_D06 FBC_D07 FBC_D08 FBC_D09 FBC_D10 FBC_D11 FBC_D12 FBC_D13 FBC_D14 FBC_D15 FBC_D16 FBC_D17 FBC_D18 FBC_D19 FBC_D20 FBC_D21 FBC_D22 FBC_D23 FBC_D24 FBC_D25 FBC_D26 FBC_D27 FBC_D28 FBC_D29 FBC_D30 FBC_D31 FBC_D32 FBC_D33 FBC_D34 FBC_D35 FBC_D36 FBC_D37 FBC_D38 FBC_D39 FBC_D40 FBC_D41 FBC_D42 FBC_D43 FBC_D44 FBC_D45 FBC_D46 FBC_D47 FBC_D48 FBC_D49 FBC_D50 FBC_D51 FBC_D52 FBC_D53 FBC_D54 FBC_D55 FBC_D56 FBC_D57 FBC_D58 FBC_D59 FBC_D60 FBC_D61 FBC_D62 FBC_D63
FBC_CLK0
FBC_CLK0_N
FBC_CLK1
FBC_CLK1_N
FBB_CMD32 FBB_CMD33 FBB_CMD34 FBB_CMD35
FBB_WCK01
FBB_WCK01_N
FBB_WCK23
FBB_WCK23_N
FBB_WCK45
FBB_WCK45_N
FBB_WCK67
FBB_WCK67_N
FBB_PLL_AVDD
7
G9
VMB_DQ0
E9
VMB_DQ1
G8
VMB_DQ2
F9
VMB_DQ3
F11
VMB_DQ4
G11
VMB_DQ5
F12
VMB_DQ6
G12
VMB_DQ7
G6
VMB_DQ8
F5
VMB_DQ9
E6
VMB_DQ10
F6
VMB_DQ11
F4
VMB_DQ12
G4
VMB_DQ13
E2
VMB_DQ14
F3
VMB_DQ15
C2
VMB_DQ16
D4
VMB_DQ17
D3
VMB_DQ18
C1
VMB_DQ19
B3
VMB_DQ20
C4
VMB_DQ21
B5
VMB_DQ22
C5
VMB_DQ23
A11
VMB_DQ24
C11
VMB_DQ25
D11
VMB_DQ26
B11
VMB_DQ27
D8
VMB_DQ28
A8
VMB_DQ29
C8
VMB_DQ30
B8
VMB_DQ31
F24
VMB_DQ32
G23
VMB_DQ33
E24
VMB_DQ34
G24
VMB_DQ35
D21
VMB_DQ36
E21
VMB_DQ37
G21
VMB_DQ38
F21
VMB_DQ39
G27
VMB_DQ40
D27
VMB_DQ41
G26
VMB_DQ42
E27
VMB_DQ43
E29
VMB_DQ44
F29
VMB_DQ45
E30
VMB_DQ46
D30
VMB_DQ47
A32
VMB_DQ48
C31
VMB_DQ49
C32
VMB_DQ50
B32
VMB_DQ51
D29
VMB_DQ52
A29
VMB_DQ53
C29
VMB_DQ54
B29
VMB_DQ55
B21
VMB_DQ56
C23
VMB_DQ57
A21
VMB_DQ58
C21
VMB_DQ59
B24
VMB_DQ60
C24
VMB_DQ61
B26
VMB_DQ62
C26
VMB_DQ63
D12 E12 E20 F20
G14
FBB_DEBUG0_K
G20
FBB_DEBUG1_K
C12
FBB_DEBUG0
C20
FBB_DEBUG1
F8 E8 A5 A6 D24 D25 B27 C27
D6
NC
D7
NC
C6
NC
B6
NC
F26
NC
E26
NC
A26
NC
A27
NC
H17
FB_PLLAVDD
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Friday, February 05, 2016
Date: Sheet of
Friday, February 05, 2016
Date: Sheet of
Friday, February 05, 2016
7
VMB_DQ0 <20> VMB_DQ1 <20> VMB_DQ2 <20> VMB_DQ3 <20> VMB_DQ4 <20> VMB_DQ5 <20> VMB_DQ6 <20> VMB_DQ7 <20> VMB_DQ8 <20> VMB_DQ9 <20> VMB_DQ10 <20> VMB_DQ11 <20> VMB_DQ12 <20> VMB_DQ13 <20> VMB_DQ14 <20> VMB_DQ15 <20> VMB_DQ16 <20> VMB_DQ17 <20> VMB_DQ18 <20> VMB_DQ19 <20> VMB_DQ20 <20> VMB_DQ21 <20> VMB_DQ22 <20> VMB_DQ23 <20>
VMB_DQ24 <20>
VMB_DQ25 <20>
VMB_DQ26 <20>
VMB_DQ27 <20> VMB_DQ28 <20> VMB_DQ29 <20> VMB_DQ30 <20> VMB_DQ31 <20> VMB_DQ32 <20> VMB_DQ33 <20> VMB_DQ34 <20> VMB_DQ35 <20> VMB_DQ36 <20> VMB_DQ37 <20> VMB_DQ38 <20> VMB_DQ39 <20> VMB_DQ40 <20> VMB_DQ41 <20> VMB_DQ42 <20> VMB_DQ43 <20> VMB_DQ44 <20> VMB_DQ45 <20> VMB_DQ46 <20> VMB_DQ47 <20> VMB_DQ48 <20> VMB_DQ49 <20> VMB_DQ50 <20>
VMB_DQ51 <20>
VMB_DQ52 <20> VMB_DQ53 <20> VMB_DQ54 <20> VMB_DQ55 <20> VMB_DQ56 <20> VMB_DQ57 <20> VMB_DQ58 <20> VMB_DQ59 <20> VMB_DQ60 <20> VMB_DQ61 <20> VMB_DQ62 <20> VMB_DQ63 <20>
VMB_CLK0 <20> VMB_CLK0# <20> VMB_CLK1 <20> VMB_CLK1# <20>
R4100 *EV@60.4/F_4 R4102 *EV@60.4/F_4
VMB_WCK01 <20> VMB_WCK01# <20> VMB_WCK23 <20> VMB_WCK23# <20> VMB_WCK45 <20> VMB_WCK45# <20> VMB_WCK67 <20> VMB_WCK67# <20>
C262 close to H27 (under GPU)
B2A
C4112 EV@0.1U/16V_4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
N16 - 2/5 (Memory)
N16 - 2/5 (Memory)
N16 - 2/5 (Memory)
8
ZAA
ZAA
ZAA
15 48
15 48
15 48
8
TP4104 TP4105
+1.35V_GFX
1A
1A
1A
Page 16
1
Dr-Bios.com
A A
+3V_MAIN <14,15,17> +1.05V_GFX <14,15,42> +3V_GFX <14,17,31,42> +3V <2,4,6,7,8,9,12,13,14,22,23,24,25,26,27,28,29,31,33,34,35,36 ,37,40,41,42>
B B
C C
PLACE CLOSE TO GPU PLACE CLOSE TO BALLS
+1.05V_GFX
D D
+1.05V_GFX
L4200 EV@HCB1005KF-330T30
C4204
EV@22U/6.3V_6
L4201 EV@BLM15PX181SN1D_1.5A
C4208
EV@22U/6.3V_6
C4209
EV@4.7U/6.3V_4
1
2
NV_PLLVDD
C5092 Close to AE8
C5090 Close to AD7
C4210 EV@0.1U/16V_4
2
B2A
PLLVDD
(22>!!%?%6,,@#
C4205 EV@0.1U/16V_4
B2A
C4211 EV@0.1U/16V_4
AH8
AG8
AG9
AJ8
AF7
AG7
AF6
AG6
AF8
AN2
AB8
AC7 AC8
AD6
AG10
AP9
AP8
AD8
AE8
AD7
3
U3002D SP@N16P-GT
IFPAB_PLLVDD
IFPA_IOVDD
IFPB_IOVDD
IFPAB_RSET
IFPC_PLLVDD
IFPD_PLLVDD
IFPC_IOVDD
IFPD_IOVDD
IFPC_RSET
NC
IFPEF_PLLVDD
IFPE_IOVDD IFPF_IOVDD
IFPEF_RSET
DACA_VDD
DACA_VREF
DACA_RSET
PLLVDD
SP_PLLVDD
VID_PLLVDD
3
[IFPA/B_LVDS]
[IFPC/D_TMDS]
[IFPE/F_DP]
[DACA/B_CRT]
[XTAL IN]
4
IFPA_TXC
IFPA_TXC_N
IFPA_TXD0
IFPA_TXD0_N
IFPA_TXD1
IFPA_TXD1_N
IFPA_TXD2
IFPA_TXD2_N
IFPA_TXD3
IFPA_TXD3_N
IFPB_TXC
IFPB_TXC_N
IFPB_TXD4
IFPB_TXD4_N
IFPB_TXD5
IFPB_TXD5_N
IFPB_TXD6
IFPB_TXD6_N
IFPB_TXD7
IFPB_TXD7_N
IFPC_AUX_I2CW_SCL
IFPC_AUX_I2CW_SDA_N
IFPD_AUX_I2CX_SDA_N
IFPE_AUX_I2CY_SDA_N
IFPF_AUX_I2CZ_SDA_N
IFPC_L0
IFPC_L0_N
IFPC_L1
IFPC_L1_N
IFPC_L2
IFPC_L2_N
IFPC_L3
IFPC_L3_N
IFPD_AUX_I2CX_SCL
IFPD_L0
IFPD_L0_N
IFPD_L1
IFPD_L1_N
IFPD_L2
IFPD_L2_N
IFPD_L3
IFPD_L3_N
IFPE_AUX_I2CY_SCL
IFPE_L0
IFPE_L0_N
IFPE_L1
IFPE_L1_N
IFPE_L2
IFPE_L2_N
IFPE_L3
IFPE_L3_N
IFPF_AUX_I2CZ_SCL
IFPF_L0
IFPF_L0_N
IFPF_L1
IFPF_L1_N
IFPF_L2
IFPF_L2_N
IFPF_L3
IFPF_L3_N
DACA_RED
DACA_GREEN
DACA_BLUE
DACA_HSYNC
DACA_VSYNC
I2CA_SCL
I2CA_SDA
XTAL_IN
XTAL_OUT
XTAL_OUTBUFF
XTAL_SSIN
4
AM6 AN6 AP3 AN3 AN5 AM5 AL6
3V_MAIN_PWGD
AK6 AJ6 AH6
AJ9 AH9 AP6 AP5 AM7 AL7 AN8 AM8 AK8 AL8
+3V_MAIN
AG3 AG2 AK1 AJ1 AJ3 AJ2 AH3 AH4 AG5 AG4
AK3 AK2 AM1 AM2 AM3 AM4 AL3 AL4 AK4 AK5
AB3 AB4 AD2 AD3 AD1 AC1 AC2 AC3 AC4 AC5
AF3 AF2 AE3 AE4 AF4 AF5 AD4 AD5 AG1 AF1
AK9 AL10 AL9
AM9 AN9
R4 R5
I2CA _SCL I2CA _SDA
HWPG_1.35VGFX<42>
Reserve
XTAL_OUTBUFF
H3
XTAL27_IN
H2
XTAL27_OUT
J4
XTAL_OUTBUFF
H1
XTAL_SSIN
5
R4203 EV@4.7K_4
R4207 EV@4.7K_4
R4208EV@1.8K/F_4 R4209EV@1.8K/F_4
R4210 *EV@10K_4
R4211 EV@10K_4 R4212 EV@10K_4
5
2
C4201 *EV@100 0p/50V_4
+3V_GFX
6
Q4201
1 3
EV@MMBT3904-7-F
DGPU_POK2
C4203 *EV@100 0P/50V_4
6
2
+3V
R4201 EV@4.7K_4
C4200 EV@1000p/50V_4
DGPU_PGOK-1
Q4203 EV@METR3904-G
1 3
7
+3V_GFX
R4200 EV@1.5K/F_4
3V_MAIN_PWGD
2
Q4200
1 3
EV@DTC144EU
R4202 *EV@100 K/F_4
3V_MAIN_PWGD <41,42>
+1.05V_GFX and GPU core power EN
+3V_GFX
XTAL27_IN XTAL27_OUT
+3V
R4205 EV@4.7K_4
2
C4202 EV@1000P/50V_4
4 1
C4206 EV@10P/50V_4
EV@DTC144EUA
1 3
Y420 0
23
EV@27MHZ_10
R4204 EV@4.7K_4
Q4202
C4207 EV@10P/50V_4
DGPU_PWROK <4>
R4206 EV@100K/F_4
B2A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Friday, February 05, 2016
Date: Sheet of
Friday, February 05, 2016
Date: Sheet of
Friday, February 05, 2016
7
PROJECT :
N16 - 3/5 (Display)
N16 - 3/5 (Display)
N16 - 3/5 (Display)
ZAA
ZAA
ZAA
8
16 48
16 48
16 48
8
1A
1A
1A
Page 17
1
Dr-Bios.com
A A
+3V_GFX
2
U3002E SP@N16P-GT
[MIOA]
3
STRAP0 DG : STUFF 50KΩ PU TO 3.3V_AON
STRAP0 STRAP1 STRAP2 STRAP3 STRAP4
R4300 EV@49.9K/F_4
1 2
R4308 *EV@4.99K/F_4
4
5
6
Default setting : N16S-GTR, Sansung 4GB
GT1-KA/KB
R4301 *EV@45.3K/F_4
R4309 *EV@4.99K/F_4
R4302 *EV@15K/F_4
R4310 *EV@24.9K/F_4
R4303 *EV@34.8K/F_4
R4311 *EV@4.99K/F_4
R4304 *EV@20K/F_4
R4312 *EV@45.3K/F_4
ROM_SI ROM_SO ROM_SCLK
R4305 SP@4.99K/F_4
R4313 SP@4.99K/F_4
R4306 SP@4.99K/F_4
R4314 SP@4.99K/F_4
GTR
+3V_MAIN+3V_GFX
R4307 *EV@10K/F_4
R4315 EV@4.99K/F_4
7
(default)
N16S-GTR
N16S-GT1-KA
N16S-GT1-KB
Resistor P/N
4.99K---> CS24992FB26 10K ---> CS31002FB26 15K ---> CS31502FB24 20K ---> CS32002FB29
24.9K --->CS32492FB16
30.1K --->CS33012FB18
34.8K---> CS33482FB22
45.3K ---> CS34532FB18
49.9K ---> CS34992FB10
GB4b-128
GB4b-128
GB4b-128
8
DevIDPackage
0x134D
0x179c
0x179c
TP4300 TP4301 TP4303 TP4305 TP4307
GPU_OVT# GPU_ALERT
GPU_EVENT#_D
GPIO12_ACIN
+3V_MAIN_EN
SYS_PEX_RST_MON#
GPU_PEX_RST_HOLD#
GPIO10_VREF
DGPU_PSI
GPIO10_VREF
GC6_FB_EN_R
JTAG_TMS JTAG_TDI
JTAG_TCK JTAG_TRST#
JTAG_TCK JTAG_TMS JTAG_TDI
JTAG_TDO
JTAG_TRST#
I2CB_SCL I2CB_SDA
I2CC_SCL I2CC_SDA
GFX_SCL GFX_SDA
STRAP0 STRAP1 STRAP2 STRAP3 STRAP4
MULTISTRAP_REF_GND
R4345
Rx
EV@40.2K/F_4
+3V_GFX <14,16,31,42> +3V_MAIN <14,15,16>
AM10
JTAG_TCK
AP11
JTAG_TMS
AM11
JTAG_TDI
AP12
JTAG_TDO
AN11
JTAG_TRST_N
R7
I2CB_SCL
R6
I2CB_SDA
R2
I2CC_SCL
R3
I2CC_SDA
T4
I2CS_SCL
T3
I2CS_SDA
K4
THERMDN
K3
THERMDP
J2
STRAP0
J7
STRAP1
J6
STRAP2
J5
STRAP3
J3
STRAP4
J1
MULTIST RAP_REF_ GND
2
[MIOB]
[MISC_GPIO/I2C/JTAG/THER]
[MISC2_ROM]
P6
GPIO0
M3
GPIO1
L6
GPIO2
P5
GPIO3
P7
GPIO4
L7
GPIO5
M7
GPIO6
N8
GPIO7
L3
GPIO8
M2
GPIO9
L1
GPIO10
M5
GPIO11
N3
GPIO12
M4
GPIO13
N4
GPIO14
P2
GPIO15
R8
GPIO16
M6
GPIO17
R1
GPIO18
P3
GPIO19
P4
GPIO20
P1
GPIO21
H4
ROM_SCLK
H6
ROM_CS_N
H5
ROM_SI
H7
ROM_SO
L2
BUFRST_N
M1
OVERT
R4346
*EV@0_4
GPIO12 AC detect AC high DC low
3
4.99K
10K
15K
20K
24.9K
30.1K
34.8K
45.3K
PU +3V_MAIN
1010
1100
1101
1110
PD
00001000
00011001
0010
00111011
0100
0101
0110
01111111
Mutil-level mode strapping:
Rx=40.2k PD
1.ROM_SCLK =4.99K PD
2.ROM_SO = 4.99K PD for GTR ;
4.99K UP for GT1-KA/KB
3.ROM_SI= VRAM Configuration Table
4.STRAP0 = 49.9k PU
5.Strap4~1 = Reserve Pull up and Pull down
GC6_FB_EN_R
+3V_MAIN_EN GPU_EVENT#_D
SYS_PEX_RST_MON#
GPU_ALERT GPIO10_VREF
GPIO12_ACIN DGPU_PSI
GPU_PEX_RST_HOLD#
ROM_SCLK
ROM_SI ROM_SO
GPU_BUFRST
GPU_OVT#
GPIO12_ACIN
TP4302 TP4304 TP4306 TP4308
TP4309
GPU_PEX_RST_HOLD# <14>
R4343 *EV@10K_4
+3V_GFX
5
34
Q4301B EV@ME2N7002DKW-G_115MA
+3V_MAIN_EN <14>
SYS_PEX_RST_MON# <14>
GPIO10_VREF <19,20>
PWM-VID <41>
DGPU_PSI <41>
GC6_FB_EN_R
GPU_EVENT#_D
dGPU_OPP# <31>GPU_THROTTING#<32>
B2A
4
N16S-GTR V RAM Configuration T able:
4GbX2 (1GB)
4GbX4 (2GB)
8GbX2 (2GB)
8GbX4 (4GB)
N16S-GT1-KA/KB- A2 VRAM Configuration Table:
4GbX2 GDDR5 128MBx32,2500MHz (1GB)
4GbX4 (2GB)
(2GB)
8GbX4 (4GB)
ROM_SCLK 0000
ROM_SI
ROM_SO
STRAP0
STRAP1
STRAP2
STRAP3
+3V_GFX
2
Q4300A *EV@ME2N7002DKW-G_115MA
1
6
R4329 EV@0_4
+3V_GFX
5
Q4300B *EV@ME2N7002DKW-G_115MA
34
R4336 EV@0_4
GPU_OVT# dGPU_OTP#
STRAP4
R4328 *short_4
R4335 *short_4
2
1
Q4301A EV@ME2N7002DKW-G_115MA
5
6
0011 (0x3) 0110 (0x6)
0011 (0x3) 0110 (0x6)
0000 (0x0) 0001 (0x1)
0000 (0x0) 0001 (0x1)
0011 (0x3)
0011 (0x3) 0110 (0x6)
0000 (0x8) 0001 (0x9)
0000 (0x8) 0001 (0x9)
Strapping Bit3
RAMCFG[3]
DEVID_SEL
B2A
N16S-GTR-B-A2 GM108-770-A2 AJ0N16S0T24
DESCRIPTION
GDDR5 128MBx32,2500MHz GDDR5 128MBx32,2500MHz
GDDR5 256MBx16,2500MHz GDDR5 256MBx16,2500MHz
GDDR5 256MBx32,2500MHz GDDR5 256MBx32,2500MHz
GDDR5 512MBx16,2500MHz GDDR5 512MBx16,2500MHz
DESCRIPTION
GDDR5 128MBx32,2500MHz0110 (0x6)
GDDR5 256MBx16,2500MHz GDDR5 256MBx16,2500MHz
GDDR5 256MBx32,2500MHz8GbX2 GDDR5 256MBx32,2500MHz
GDDR5 512MBx16,2500MHz GDDR5 512MBx16,2500MHz
Logical
GC6_FB_EN <4,14>
DGPU_EVENT# <4>
dGPU_OTP# <31>
Strapping Bit2
SOR2_EXPOSED SOR1_EXPOSED SOR0_EXPOSEDSOR3_EXPOSED
RAMCFG[2]
PCIE_CFG
Keep footprin t to PU to 3V3_AON and PD to GND
Keep footprin t to PU to 3V3_AON and PD to GND
PEGX_RST# <14>
6
Vendor Vendor P/NROM_SI
SAMSUNG
K4G41325FC-HC03 --C die
HYNIX
H5GC4H24AJR-T2C --A die
SAMSUNG
K4G41325FC-HC03 --C die
HYNIX
H5GC4H24AJR-T2C --A die
SAMSUNG
K4G80325FB-HC03 --B die
MICRON
MT51J256M32HF-60:A--A die
SAMSUNG
K4G80325FB-HC03 --B die
MICRON
MT51J256M32HF-60:A--A die
N16S-GT1-KA-A2 GM107-710-KA-A2 AJ0N16S0T22 N16S-GT1-KB-A2 GM107-710-KB-A2 AJ0N16S0T23
AKG5PGDT505 AKG5PWUTW21
AKG5PGDT505 AKG5PWUTW21
AKG5QGDT502 AKG5LGUTL04
AKG5QGDT502 AKG5LGUTL04
Vendor Vendor P/NROM_SI
SAMSUNG
K4G41325FC-HC03 --C die
HYNIX
H5GC4H24AJR-T2C --A die
SAMSUNG
K4G41325FC-HC03 --C die
HYNIX
H5GC4H24AJR-T2C --A die
SAMSUNG
K4G80325FB-HC03 --B die
MICRON
MT51J256M32HF-60:A--A die
SAMSUNG
K4G80325FB-HC03 --B die
MICRON
MT51J256M32HF-60:A--A die
AKG5PGDT505 AKG5PWUTW21
AKG5PGDT505 AKG5PWUTW21
AKG5QGDT502 AKG5LGUTL04
AKG5QGDT502 AKG5LGUTL04
(GB4b-128)
GFX_SCL
GFX_SDA
R4341 EV@2.2K_4
+3V_GFX
LogicalLogical
Strapping Bit1
RAMCFG[1]
SMB_ALT_ADDR
R4342 EV@2.2K_4
4 3
1
Q4302
EV@ME2N7002DKW-G_115MA
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
7
Logical
Strapping Bit0
RAMCFG[0]
VGA_DEVICE
+3V_MAIN
GEH%=$)IJ%+J3KLM.3N
5
2
6
N16 - 4/5 (MISC)
N16 - 4/5 (MISC)
N16 - 4/5 (MISC)
Friday, February 05, 2016
Friday, February 05, 2016
Friday, February 05, 2016
2ND_MBCLK <7,31>
2ND_MBDATA <7,31>
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
STN P/N
STN P/N
ROM_SI
20K Pull down
34.8K Pull down
20K Pull down
34.8K Pull down
4.99K Pull down 10K Pull down
4.99K Pull down
10K Pull down
ROM_SI
20K Pull down
34.8K Pull down
20K Pull down
34.8K Pull down
4.99K Pull up 10K Pull up
4.99K Pull up 10K Pull up
Refer table
0000 ---GTR
1000 ---GT1/KA/KB
[Stuff 49.9K PU]
[Do Not Stuff]
ZAA
ZAA
ZAA
17 48
17 48
17 48
8
1A
1A
1A
R4316 EV@10K_4 R4317 EV@10K_4
R4318 EV@10K_4
R4319 EV@10K_4
R4320 *EV@10K_4
Page14 PU
R4321 EV@10K_4
R4322 EV@10K_4
R4323 *EV@10K_4
R4324 EV@10K_4
B B
R4325 EV@10K_4
R4326 EV@10K_4
Reserve PU/PD for Debug
+3V_MAIN
R4330 *EV@10K_4 R4331 *EV@10K_4
R4332 *EV@10K_4 R4334 EV@10K_4
R4337 EV @1.8K/F_4
C C
D D
R4338 EV @1.8K/F_4
R4339 EV @1.8K/F_4 R4340 EV @1.8K/F_4
+3V_GFX
R4344 *EV@10K_4
1
Page 18
1
Dr-Bios.com
>!!B<>!!%?%17#
+VGPU_CORE
A A
B B
C C
D D
AA12 AA14 AA16 AA19 AA21 AA23 AB13 AB15 AB17 AB18 AB20
AB22 AC12 AC14 AC16 AC19 AC21 AC23
M12 M14 M16 M19 M21 M23 N13 N15 N17 N18 N20 N22
R13 R15 R17 R18 R20 R22
U13 U15 U17 U18 U20 U22
W12 W14 W16 W19 W21 W23
P12 P14 P16 P19 P21 P23
T12 T14 T16 T19 T21 T23
V13 V15 V17 V18 V20 V22
Y13 Y15 Y18 Y17 Y20 Y22
U3002F SP@N16P-GT
VDD_001 VDD_002 VDD_003 VDD_004 VDD_005 VDD_006 VDD_007 VDD_008 VDD_009 VDD_010 VDD_011 VDD_012 VDD_013 VDD_014 VDD_015 VDD_016 VDD_017 VDD_018 VDD_019 VDD_020 VDD_021 VDD_022 VDD_023 VDD_024 VDD_025 VDD_026 VDD_027 VDD_028 VDD_029 VDD_030 VDD_031 VDD_032 VDD_033 VDD_034 VDD_035 VDD_036 VDD_037 VDD_038 VDD_039 VDD_040 VDD_041 VDD_042 VDD_043 VDD_044 VDD_045 VDD_046 VDD_047 VDD_048 VDD_049 VDD_050 VDD_051 VDD_052 VDD_053 VDD_054 VDD_055 VDD_056 VDD_057 VDD_058 VDD_059 VDD_060 VDD_061 VDD_062 VDD_063 VDD_064 VDD_065 VDD_066 VDD_067 VDD_068 VDD_069 VDD_070 VDD_071 VDD_072
+VGPU_CORE <41>
[GPU VDD]
1
2
+VGPU_CORE
U1
XVDD_001
U2
XVDD_002
U3
XVDD_003
U4
XVDD_004
U5
XVDD_005
U6
XVDD_006
U7
XVDD_007
U8
XVDD_008
V1
XVDD_009
V2
XVDD_010
V3
XVDD_011
V4
XVDD_012
V5
XVDD_013
V6
XVDD_014
V7
XVDD_015
V8
XVDD_016
W2
XVDD_017
W3
XVDD_018
W4
XVDD_019
W5
XVDD_020
W7
XVDD_021
W8
XVDD_022
Y4
XVDD_026
Y5
XVDD_027
Y6
XVDD_028
Y7
XVDD_029
Y8
XVDD_030
2
3
U3002G SP@N16P-GT
A2
GND_1
AA17
GND_2
AA18
GND_3
AA20
GND_4
AA22
GND_5
AB12
GND_6
AB14
GND_7
AB16
GND_8
AB19
GND_9
AB2
GND_10
AB21
GND_11
A33
GND_12
AB23
GND_13
AB28
GND_14
AB30
GND_15
AB32
GND_16
AB5
GND_17
AB7
GND_18
AC13
GND_19
AC15
GND_20
AC17
GND_21
AC18
GND_22
AA13
GND_23
AC20
GND_24
AC22
GND_25
AE2
GND_26
AE28
GND_27
AE30
GND_28
AE32
GND_29
AE33
GND_30
AE5
GND_31
AE7
GND_32
AH10
GND_33
AA15
GND_34
AH13
GND_35
AH16
GND_36
AH19
GND_37
AH2
GND_38
AH22
GND_39
AH24
GND_40
AH28
GND_41
AH29
GND_42
AH30
GND_43
AH32
GND_44
AH33
GND_45
AH5
GND_46
AH7
GND_47
AJ7
GND_48
AK10
GND_49
AK7
GND_50
AL12
GND_51
AL14
GND_52
AL15
GND_53
AL17
GND_54
AL18
GND_55
AL2
GND_56
AL20
GND_57
AL21
GND_58
AL23
GND_59
AL24
GND_60
AL26
GND_61
AL28
GND_62
AL30
GND_63
AL32
GND_64
AL33
GND_65
AL5
GND_66
AM13
GND_67
AM16
GND_68
AM19
GND_69
AM22
GND_70
AM25
GND_71
AN1
GND_72
AN10
GND_73
AN13
GND_74
AN16
GND_75
AN19
GND_76
AN22
GND_77
AN25
GND_78
AN30
GND_79
AN34
GND_80
AN4
GND_81
AN7
GND_82
AP2
GND_83
AP33
GND_84
B1
GND_85
B10
GND_86
B22
GND_87
B25
GND_88
B28
GND_89
B31
GND_90
B34
GND_91
B4
GND_92
B7
GND_93
C10
GND_94
C13
GND_95
C19
GND_96
C22
GND_97
C25
GND_98
C28
GND_99
C7
GND_100
3
4
[GPU GND]
4
GND_101 GND_102 GND_103 GND_104 GND_105 GND_106 GND_107 GND_108 GND_109 GND_110 GND_111 GND_112 GND_113 GND_114 GND_115 GND_116 GND_117 GND_118 GND_119 GND_120 GND_121 GND_122 GND_123 GND_124 GND_125 GND_126 GND_127 GND_128 GND_129 GND_130 GND_131 GND_132 GND_133 GND_134 GND_135 GND_136 GND_137 GND_138 GND_139 GND_140 GND_141 GND_142 GND_143 GND_144 GND_145 GND_146 GND_147 GND_148 GND_149 GND_150 GND_151 GND_152 GND_153 GND_154 GND_155 GND_156 GND_157 GND_158 GND_159 GND_160 GND_161 GND_162 GND_163 GND_164 GND_165 GND_166 GND_167 GND_168 GND_169 GND_170 GND_171 GND_172 GND_173 GND_174 GND_175 GND_176 GND_177 GND_178 GND_179 GND_180 GND_181 GND_182 GND_183 GND_184 GND_185 GND_186 GND_187 GND_188 GND_189 GND_190 GND_191 GND_192 GND_193 GND_194 GND_195 GND_196 GND_197 GND_198 GND_199 GND_200
GND_OPT_1
GND_OPT_2
D2 D31 D33 E10 E22 E25 E5 E7 F28 F7 G10 G13 G16 G19 G2 G22 G25 G28 G3 G30 G32 G33 G5 G7 K2 K28 K30 K32 K33 K5 K7 M13 M15 M17 M18 M20 M22 N12 N14 N16 N19 N2 N21 N23 N28 N30 N32 N33 N5 N7 P13 P15 P17 P18 P20 P22 R12 R14 R16 R19 R21 R23 T13 T15 T17 T18 T2 T20 T22 AG11 T28 T32 T5 T7 U12 U14 U16 U19 U21 U23 V12 V14 V16 V19 V21 V23 W13 W15 W17 W18 W20 W22 W28 Y12 Y14 Y16 Y19 Y21 Y23 AH11
C16
W32
5
+VGPU_CORE
5
6
C4400 EV@1U/6.3V_4 C4401 EV@1U/6.3V_4 C4402 EV@1U/6.3V_4 C4403 EV@1U/6.3V_4 C4404 EV@1U/6.3V_4 C4405 EV@1U/6.3V_4 C4406 EV@1U/6.3V_4 C4407 EV@1U/6.3V_4
C4408 EV@4.7U/6.3V_4 C4409 EV@4.7U/6.3V_4 C4410 EV@4.7U/6.3V_4 C4411 EV@4.7U/6.3V_4 C4412 EV@4.7U/6.3V_4
C4413 SP@4.7U/6.3V_4
C4414 EV@4.7U/6.3V_4 C4415 EV@4.7U/6.3V_4 C4416 EV@4.7U/6.3V_4
C4417 SP@4.7U/6.3V_4
C4418 EV@4.7U/6.3V_4
C4419 SP@4.7U/6.3V_4 C4420 *EV@4.7U/6.3V_4
C4421 EV@4.7U/6.3V_4 C4422 EV@4.7U/6.3V_4
C4423 EV@10U/6.3V_4 C4814 EV@10U/6.3V_4
12
C4424 EV@22U/6.3V_6
12
C4425 EV@22U/6.3V_6 C4426 EV@10U/6.3V_4 C4813 EV@10U/6.3V_4
12
C4427 EV@22U/6.3V_6
12
C4428 EV@22U/6.3V_6
12
C4429 EV@22U/6.3V_6 C4430 EV@4.7U/6.3V_4 C4431 EV@4.7U/6.3V_4
C4432 *EV@4.7U/6.3V_4
C4433 EV@4.7U/6.3V_4
C4434 EV@4.7U/6.3V_4
C4435 330u/2V_7343
+
6
7
8
PLACE UNDER GPU
B2A
B2A
B2A
B2A
PLACE NEAR GPU
B2A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Friday, February 05, 2016
Date: Sheet of
Friday, February 05, 2016
Date: Sheet of
Friday, February 05, 2016
7
PROJECT :
N16 - 5/5 (Power)
N16 - 5/5 (Power)
N16 - 5/5 (Power)
ZAA
ZAA
ZAA
18 48
18 48
18 48
8
1A
1A
1A
Page 19
1
Dr-Bios.com
VMA_DQ[63..0]<15>
FBA_CMD[31:0]<15>
FBA_DBI[7..0]<15>
FBA_EDC[7..0]<15 >
VMA_DQ[63..0]
FBA_DBI[7..0]
FBA_EDC[7..0]
Channel 0 <0-31>
MF=0 Non-mirrored
VRAM3000
M2 M4 N2 N4
T2 T4
A A
QD16~23
QD0~7
R4546 GKB@1 20/F_4 R4547 GKB@1 K_4
R4548 GKB@1 K_4
VMA_CLK1
R4527 GKB@80.6/F_4
VMA_CLK1#
+
GKB@0.1u/16V_4C453 2
1
VMA_WCK01 VMA_WCK01#
VMA_WCK23 VMA_WCK23#
FBA_EDC2
FBA_EDC0
FBA_DBI2
FBA_DBI0
VREFD_VMA1
16mils
VREFC_VMA1
VMA_WCK01<15>
B B
C C
D D
VMA_WCK01#<15>
VMA_WCK23<15> VMA_WCK23#<15>
VMA_CLK0#<15>
VMA_CLK0<15>
VMA_CLK0
R4526 GKB@80.6/F_4
VMA_CLK0#
+1.35V_GFX
C4523 GKB@3 30u/2V_73 43
C4537 GKB@10U/6.3V_6 C4542 GKB@10U/6.3V_6 C4547 GKB@10U/6.3V_6
201201117 Add C764 for EMI suggestion.
U2 U4
M13
VMA_DQ23
M11
VMA_DQ22
N13
VMA_DQ21
N11
VMA_DQ20
T13
VMA_DQ19
T11
VMA_DQ18
U13
VMA_DQ17
U11
VMA_DQ16
F13 F11 E13 E11 B13 B11 A13 A11
F2
VMA_DQ7
F4
VMA_DQ6
E2
VMA_DQ5
E4
VMA_DQ4
B2
VMA_DQ3
B4
VMA_DQ2
A2
VMA_DQ1
A4
VMA_DQ0
J5
FBA_CMD9
K4
FBA_CMD6
K5
FBA_CMD7
K10
FBA_CMD4
K11
FBA_CMD3
H10
FBA_CMD1
H11
FBA_CMD2
H5
FBA_CMD11
H4
FBA_CMD10
D4 D5
P4 P5
R2
R13 C13
C2
P2 P13 D13
D2
G3
FBA_CMD12
L3
FBA_CMD15
J3
FBA_CMD14
J11
VMA_CLK0#
J12
VMA_CLK0
G12
FBA_CMD0
L12
FBA_CMD5
J13 J10
SEN_A0
J2
FBA_CMD13
J1
A5
U5
A10 U10
J14
J4
FBA_CMD8
GKB@GDDR5
+1.35V_GFX +1.35V_GF X +1.35V_GFX +1.35V_GFX +1.35V_GFX +1.35V_GF X+1.35V_GFX +1.35V_GF X
R4511
GKB@931/F_4
R4510
GKB@549/F_4
VREFC_VMA1 VREFD_VMA1
R4528
GKB@1.33K/F_4
+1.35V_GFX +1.35V_GFX +1.35V_GFX +1.35V_GFX
2
For KB of GPU
3
Channel 0 <0-31>
MF=1 Mirrored
VRAM3004
DQ31 | DQ7 DQ30 | DQ6 DQ29 | DQ5 DQ28 | DQ4 DQ27 | DQ3 DQ26 | DQ2 DQ25 | DQ1 DQ24 | DQ0 DQ23 | DQ15 DQ22 | DQ14 DQ21 | DQ13 DQ20 | DQ12 DQ19 | DQ11 DQ18 | DQ10 DQ17 | DQ9 DQ16 | DQ8 DQ15 | DQ23 DQ14 | DQ22 DQ13 | DQ21 DQ12 | DQ20 DQ11 | DQ19 DQ10 | DQ18 DQ9 | DQ17 DQ8 | DQ16 DQ7 | DQ31 DQ6 | DQ30 DQ5 | DQ29 DQ4 | DQ28 DQ3 | DQ27 DQ2 | DQ26 DQ1 | DQ25 DQ0 | DQ24
RFU/A12/NC A7/A8 | A0/A10 A6/A11 | A1/A9 A5/BA1 | A3/ BA3 A4/BA2 | A2/ BA0 A3/BA3 | A5/ BA1 A2 /BA0 | A4 /BA2 A1/A9 | A6/A11 A0/A10 | A7/A8
WCK01 | WCK23 WCK01# | WCK23#
WCK23 | WCK01 WCK23# | WCK01#
EDC3 | EDC0 EDC2 | EDC1 EDC1 | EDC2 EDC0 | EDC3
DBI3# | DBI0# DBI2 #| DBI1# DBI1# | DBI2# DBI0# | DBI3#
RAS# | CAS# CAS# | RAS#
CKE# CK# CK
CS# | WE# WE# | CS#
ZQ SEN
RESET# MF
Vpp,N C Vpp,N C1
VREFD1 VREFD2
VREFC
ABI#
VREF_VMA1_MOS
R4512
*GKB@549/F_4
1 2
R4529
*GKB@1.33K/F_4
C4515 GKB@1u/6.3V_4 C4519 GKB@1u/6.3V_4 C4524 GKB@1u/6.3V_4 C4528 GKB@0.047u/10V_4 C4533 GKB@0.047u/10V_4
B1
VDDQ-B1
B3
VDDQ-B3
B12
VDDQ-B12
B14
VDDQ-B14
D1
VDDQ-D1
D3
VDDQ-D3
D12
VDDQ-D12
D14
VDDQ-D14
E5
VDDQ-E5
E10
VDDQ-E10
F1
VDDQ-F1
F3
VDDQ-F3
F12
VDDQ-F1 2
F14
VDDQ-F1 4
G2
VDDQ-G2
G13
VDDQ-G1 3
H3
VDDQ-H3
H12
VDDQ-H12
K3
VDDQ-K3
K12
VDDQ-K12
L2
VDDQ-L2
L13
VDDQ-L13
M1
VDDQ-M1
M3
VDDQ-M3
M12
VDDQ-M12
M14
VDDQ-M14
N5
VDDQ-N5
N10
VDDQ-N10
P1
VDDQ-P1
P3
VDDQ-P3
P12
VDDQ-P12
P14
VDDQ-P14
T1
VDDQ-T1
T3
VDDQ-T3
T12
VDDQ-T12
T14
VDDQ-T14
C5
VDD-C5
C10
VDD-C10
D11
VDD-D11
G1
VDD-G1
G4
VDD-G4
G11
VDD-G11
G14
VDD-G14
L1
VDD-L1
L4
VDD-L4
L11
VDD-L11
L14
VDD-L14
P11
VDD-P11
R5
VDD-R5
R10
VDD-R10
A1
VSSQ-A1
A3
VSSQ-A3
A12
VSSQ-A12
A14
VSSQ-A14
C1
VSSQ-C1
C3
VSSQ-C3
C4
VSSQ-C4
C11
VSSQ-C1 1
C12
VSSQ-C1 2
C14
VSSQ-C1 4
E1
VSSQ-E1
E3
VSSQ-E3
E12
VSSQ-E1 2
E14
VSSQ-E1 4
F5
VSSQ-F 5
F10
VSSQ-F 10
H2
VSSQ-H2
H13
VSSQ-H1 3
K2
VSSQ-K2
K13
VSSQ-K1 3
M5
VSSQ-M5
M10
VSSQ-M10
N1
VSSQ-N1
N3
VSSQ-N3
N12
VSSQ-N1 2
N14
VSSQ-N1 4
R1
VSSQ-R1
R3
VSSQ-R3
R4
VSSQ-R4
R11
VSSQ-R1 1
R12
VSSQ-R1 2
R14
VSSQ-R1 4
U1
VSSQ-V1
U3
VSSQ-V3
U12
VSSQ-V12
U14
VSSQ-V14
B5
VSS-B5
B10
VSS-B10
D10
VSS-D10
G5
VSS-G5
G10
VSS-G10
H1
VSS-H1
H14
VSS-H14
K1
VSS-K1
K14
VSS-K14
L5
VSS-L5
L10
VSS-L10
P10
VSS-P10
T5
VSS-T5
T10
VSS-T10
VRAM3000
R4513
*GKB@931/F_4
1 2
GKB@0.1u/16V_4C453 8 GKB@0.1u/16V_4C454 3 GKB@0.1u/16V_4C454 6 GKB@0.1u/16V_4C454 8 GKB@0.1u/16V_4C455 2
2
QD8~15
QD24~31
+1.35V_GFX
R4515
GKB@931/F_4
R4514
GKB@549/F_4
VREFC_VMA2 VREFD_VMA2
R4530
GKB@1.33K/F_4
C4512 GKB@1u/6.3V_4 C4516 GKB@1u/6.3V_4 C4520 GKB@1u/6.3V_4 C4525 GKB@1u/6.3V_4 C4529 GKB@0.047u/10V_4 C4534 GKB@0.047u/10V_4
VREF_VMA1_MOS
R4516
*GKB@549/F_4
1 2
R4531
*GKB@1.33K/F_4
GKB@0.1u/16V_4C453 9 GKB@0.1u/16V_4C454 4 GKB@0.1u/16V_4C454 9 GKB@0.1u/16V_4C455 3
VMA_WCK23 VMA_WCK23#
VMA_WCK01 VMA_WCK01#
FBA_EDC1
FBA_EDC3
FBA_DBI1
FBA_DBI3
R4549 GKB@120/F_4
R4550 GKB@1 K_4
R4551 GKB@1 K_4
16mils16mils
VREFD_VMA2
VREFC_VMA2
R4517
*GKB@931/F_4
3
M2
DQ31 | DQ7
M4
DQ30 | DQ6
N2
DQ29 | DQ5
N4
DQ28 | DQ4
T2
DQ27 | DQ3
T4
DQ26 | DQ2
U2
DQ25 | DQ1
U4
DQ24 | DQ0
M13
VMA_DQ15 VMA_DQ14 VMA_DQ13 VMA_DQ12 VMA_DQ11 VMA_DQ10 VMA_DQ9 VMA_DQ8
VMA_DQ31 VMA_DQ30 VMA_DQ29 VMA_DQ28 VMA_DQ27 VMA_DQ26 VMA_DQ25 VMA_DQ24
FBA_CMD9 FBA_CMD10 FBA_CMD11 FBA_CMD1 FBA_CMD2 FBA_CMD4 FBA_CMD3 FBA_CMD7 FBA_CMD6
FBA_CMD15 FBA_CMD12
FBA_CMD14 VMA_CLK0# VMA_CLK0 VMA_CLK1
FBA_CMD5 FBA_CMD0
FBA_CMD13
FBA_CMD8
1 2
DQ23 | DQ15
M11
DQ22 | DQ14
N13
DQ21 | DQ13
N11
DQ20 | DQ12
T13
DQ19 | DQ11
T11
DQ18 | DQ10
U13
DQ17 | DQ9
U11
DQ16 | DQ8
F13
DQ15 | DQ23
F11
DQ14 | DQ22
E13
DQ13 | DQ21
E11
DQ12 | DQ20
B13
DQ11 | DQ19
B11
DQ10 | DQ18
A13
DQ9 | DQ17
A11
DQ8 | DQ16
F2
DQ7 | DQ31
F4
DQ6 | DQ30
E2
DQ5 | DQ29
E4
DQ4 | DQ28
B2
DQ3 | DQ27
B4
DQ2 | DQ26
A2
DQ1 | DQ25
A4
DQ0 | DQ24
J5
RFU/A12/NC
K4
A7/A8 | A0/A10
K5
A6/A11 | A1/A9
K10
A5/BA1 | A3/ BA3
K11
A4/BA2 | A2/ BA0
H10
A3/BA3 | A5/ BA1
H11
A2 /BA0 | A4 /BA2
H5
A1/A9 | A6/A11
H4
A0/A10 | A7/A8
D4
WCK01 | WCK23
D5
WCK01# | WCK23#
P4
WCK23 | WCK01
P5
WCK23# | WCK01#
R2
EDC3 | EDC0
R13
EDC2 | EDC1
C13
EDC1 | EDC2
C2
EDC0 | EDC3
P2
DBI3# | DBI0#
P13
DBI2 #| DBI1#
D13
DBI1# | DBI2#
D2
DBI0# | DBI3#
G3
RAS# | CAS#
L3
CAS# | RAS#
J3
CKE#
J11
CK#
J12
CK
G12
CS# | WE#
L12
WE# | CS#
J13
ZQ
J10
SEN_A1
SEN
J2
RESET#
J1
MF
A5
Vpp,N C
U5
Vpp,N C1
A10
VREFD1
U10
VREFD2
J14
VREFC
J4
ABI#
GKB@GDDR5
SAMSUNG GDDR5 5Gbps 4Gb K4G41325FC-HC03 LF+HF 256*16 AKG5PGDT505 B/S PN HYNIX GDDR5 5Gbps 4Gb H5GC4H24AJR-T2C LF+HF 256*16 A-die AKG5PWUTW21 B/S PN MICRON GDDR5 5Gbps 8Gb MT51J256M32HF-60:A LF+HF AKG5LGUTL04 B/S PN SAMSUNG GDDR5 5Gbps 8Gb K4G80325FB-HC03 LF+HF AKG5QGDT502B/S PN
VREF_VMA1_MOS
3
Q4500
2
GKB@2N7002D
GPIO10_VREF <17,19,20> GPIO10_VREF <17,19,20>
1
C4513 GKB@1u/6.3V_4 C4517 GKB@1u/6.3V_4 C4521 GKB@1u/6.3V_4 C4526 GKB@1u/6.3V_4 C4527 G KB@1u/6.3V_4
GKB@0.1u/16V_4C453 0 GKB@0.1u/16V_4C453 5 GKB@0.1u/16V_4C454 0 *GKB@0.1u/16V_4C4 545 *GKB@0.1u/16V_4C4 550 *GKB@0.1u/16V_4C4 554
4
CHANNEL A: 1G/2G GDDR5 X16
MF=0 Non-mirrored
VMA_DQ55 VMA_DQ54 VMA_DQ53 VMA_DQ52 VMA_DQ51 VMA_DQ50 VMA_DQ49 VMA_DQ48
VMA_DQ39 VMA_DQ38 VMA_DQ37 VMA_DQ36 VMA_DQ35 VMA_DQ34 VMA_DQ33 VMA_DQ32
FBA_CMD25 FBA_CMD22 FBA_CMD23 FBA_CMD20 FBA_CMD19 FBA_CMD17 FBA_CMD18 FBA_CMD27 FBA_CMD26
VMA_WCK45 VMA_WCK45#
VMA_WCK67 VMA_WCK67#
FBA_EDC6 FBA_EDC5
FBA_DBI4 FBA_DBI7
FBA_CMD28 FBA_CMD31
FBA_CMD30 VMA_CLK1# VMA_CLK1#
FBA_CMD16 FBA_CMD21
R4552 GKB@1 20/F_4 R4553 GKB@1 K_4
FBA_CMD29
R4554 GKB@1 K_4
VREFD_VMA3
16mils16mils
VREFC_VMA3
FBA_CMD24
VDDQ-B1
VDDQ-B3 VDDQ-B12 VDDQ-B14
VDDQ-D1
VDDQ-D3 VDDQ-D12 VDDQ-D14
VDDQ-E5 VDDQ-E10
VDDQ-F1
VDDQ-F3 VDDQ-F1 2 VDDQ-F1 4
VDDQ-G2
VDDQ-G1 3
VDDQ-H3 VDDQ-H12
VDDQ-K3 VDDQ-K12
VDDQ-L2 VDDQ-L13
VDDQ-M1
VDDQ-M3
VDDQ-M12 VDDQ-M14
VDDQ-N5 VDDQ-N10
VDDQ-P1
VDDQ-P3 VDDQ-P12 VDDQ-P14
VDDQ-T1
VDDQ-T3 VDDQ-T12 VDDQ-T14
VDD-C5 VDD-C10 VDD-D11
VDD-G1
VDD-G4 VDD-G11 VDD-G14
VDD-L1
VDD-L4
VDD-L11 VDD-L14 VDD-P11
VDD-R5 VDD-R10
VSSQ-A1 VSSQ-A3
VSSQ-A12 VSSQ-A14
VSSQ-C1 VSSQ-C3 VSSQ-C4
VSSQ-C1 1 VSSQ-C1 2 VSSQ-C1 4
VSSQ-E1 VSSQ-E3
VSSQ-E1 2 VSSQ-E1 4
VSSQ-F 5
VSSQ-F 10
VSSQ-H2
VSSQ-H1 3
VSSQ-K2
VSSQ-K1 3
VSSQ-M5
VSSQ-M10
VSSQ-N1 VSSQ-N3
VSSQ-N1 2 VSSQ-N1 4
VSSQ-R1 VSSQ-R3 VSSQ-R4
VSSQ-R1 1 VSSQ-R1 2 VSSQ-R1 4
VSSQ-V1 VSSQ-V3
VSSQ-V12 VSSQ-V14
VSS-B5
VSS-B10 VSS-D10
VSS-G5 VSS-G10
VSS-H1
VSS-H14
VSS-K1
VSS-K14
VSS-L5 VSS-L10 VSS-P10
VSS-T5
VSS-T10
+1.35V_GFX +1.35V_GFX
B1 B3 B12 B14 D1 D3 D12 D14 E5 E10 F1 F3 F12 F14 G2 G13 H3 H12 K3 K12 L2 L13 M1 M3 M12 M14 N5 N10 P1 P3 P12 P14 T1 T3 T12 T14
C5 C10 D11 G1 G4 G11 G14 L1 L4 L11 L14 P11 R5 R10
A1 A3 A12 A14 C1 C3 C4 C11 C12 C14 E1 E3 E12 E14 F5 F10 H2 H13 K2 K13 M5 M10 N1 N3 N12 N14 R1 R3 R4 R11 R12 R14 U1 U3 U12 U14
B5 B10 D10 G5 G10 H1 H14 K1 K14 L5 L10 P10 T5 T10
VRAM3004
4
QD48~55
QD32~39 QD56~63
VMA_WCK45<15> VMA_WCK45#<15>
VMA_WCK67<15> VMA_WCK67#<15>
VMA_CLK1#<15>
VMA_CLK1<15>
+1.35V_GFX <15,20,42>
GKB@0.1u/16V_4C451 4 C4518 GKB@1u/6.3V_4 C4522 GKB@1u/6.3V_4
C4531 GKB@0.047u/10V_4 C4536 GKB@0.047u/10V_4
GKB@0.1u/16V_4C454 1
GKB@0.1u/16V_4C455 1
GKB@0.1u/16V_4C455 5
5
Channel 1 <32-63>
VDDQ-L2
VDD-C5 VDD-C10 VDD-D11
VDD-G1
VDD-G4 VDD-G11 VDD-G14
VDD-L1
VDD-L4 VDD-L11 VDD-L14 VDD-P11
VDD-R5 VDD-R10
VSSQ-A1 VSSQ-A3
VSSQ-F 5
VSSQ-V1 VSSQ-V3
VSS-B5 VSS-B10 VSS-D10
VSS-G5 VSS-G10
VSS-H1 VSS-H14
VSS-K1 VSS-K14
VSS-L5 VSS-L10 VSS-P10
VSS-T5 VSS-T10
2
VRAM3001
+1.35V_GFX
+1.35V_GFX+1.35V_GFX
B1 B3 B12 B14 D1 D3 D12 D14 E5 E10 F1 F3 F12 F14 G2 G13 H3 H12 K3 K12 L2 L13 M1 M3 M12 M14 N5 N10 P1 P3 P12 P14 T1 T3 T12 T14
C5 C10 D11 G1 G4 G11 G14 L1 L4 L11 L14 P11 R5 R10
A1 A3 A12 A14 C1 C3 C4 C11 C12 C14 E1 E3 E12 E14 F5 F10 H2 H13 K2 K13 M5 M10 N1 N3 N12 N14 R1 R3 R4 R11 R12 R14 U1 U3 U12 U14
B5 B10 D10 G5 G10 H1 H14 K1 K14 L5 L10 P10 T5 T10
VRAM3001
M2
DQ31 | DQ7 DQ30 | DQ6 DQ29 | DQ5 DQ28 | DQ4 DQ27 | DQ3 DQ26 | DQ2 DQ25 | DQ1 DQ24 | DQ0 DQ23 | DQ15 DQ22 | DQ14 DQ21 | DQ13 DQ20 | DQ12 DQ19 | DQ11 DQ18 | DQ10 DQ17 | DQ9 DQ16 | DQ8 DQ15 | DQ23 DQ14 | DQ22 DQ13 | DQ21 DQ12 | DQ20 DQ11 | DQ19 DQ10 | DQ18 DQ9 | DQ17 DQ8 | DQ16 DQ7 | DQ31 DQ6 | DQ30 DQ5 | DQ29 DQ4 | DQ28 DQ3 | DQ27 DQ2 | DQ26 DQ1 | DQ25 DQ0 | DQ24
RFU/A12/NC A7/A8 | A0/A10 A6/A11 | A1/A9 A5/BA1 | A3/ BA3 A4/BA2 | A2/ BA0 A3/BA3 | A5/ BA1 A2 /BA0 | A4 /BA2 A1/A9 | A6/A11 A0/A10 | A7/A8
WCK01 | WCK23 WCK01# | WCK23#
WCK23 | WCK01 WCK23# | WCK01#
EDC3 | EDC0 EDC2 | EDC1 EDC1 | EDC2 EDC0 | EDC3
DBI3# | DBI0# DBI2 #| DBI1# DBI1# | DBI2# DBI0# | DBI3#
RAS# | CAS# CAS# | RAS#
CKE# CK# CK
CS# | WE# WE# | CS#
ZQ SEN
RESET# MF
Vpp,N C Vpp,N C1
VREFD1 VREFD2
VREFC
ABI#
VDDQ-B1
VDDQ-B3 VDDQ-B12 VDDQ-B14
VDDQ-D1
VDDQ-D3
VDDQ-D12 VDDQ-D14
VDDQ-E5 VDDQ-E10
VDDQ-F1
VDDQ-F3 VDDQ-F1 2 VDDQ-F1 4
VDDQ-G2
VDDQ-G1 3
VDDQ-H3
VDDQ-H12
VDDQ-K3 VDDQ-K12
VDDQ-L13
VDDQ-M1
VDDQ-M3
VDDQ-M12 VDDQ-M14
VDDQ-N5
VDDQ-N10
VDDQ-P1
VDDQ-P3 VDDQ-P12 VDDQ-P14
VDDQ-T1
VDDQ-T3 VDDQ-T12 VDDQ-T14
VSSQ-A12 VSSQ-A14
VSSQ-C1
VSSQ-C3
VSSQ-C4 VSSQ-C1 1 VSSQ-C1 2 VSSQ-C1 4
VSSQ-E1
VSSQ-E3 VSSQ-E1 2 VSSQ-E1 4
VSSQ-F 10
VSSQ-H2 VSSQ-H1 3
VSSQ-K2 VSSQ-K1 3
VSSQ-M5
VSSQ-M10
VSSQ-N1
VSSQ-N3 VSSQ-N1 2 VSSQ-N1 4
VSSQ-R1
VSSQ-R3
VSSQ-R4 VSSQ-R1 1 VSSQ-R1 2 VSSQ-R1 4
VSSQ-V12 VSSQ-V14
SEN_A2
M4 N2 N4
U2
U4 M13 M11
N13 N11 T13 T11 U13 U11 F13 F11 E13 E11 B13 B11 A13 A11
K10 K11 H10 H11
H5
H4
D4
D5
R2
R13 C13
C2
P13 D13
D2
G3
J11
J12
G12
L12
J13
J10
U5
A10 U10
J14
T2 T4
F2 F4 E2 E4 B2 B4 A2 A4
J5 K4 K5
P4 P5
P2
L3
J3
J2 J1
A5
J4
GKB@GDDR5
FBA_CMD14 FBA_CMD30
CKE* is strap pin to set ODT value of memory chip
FBA_CMD13 FBA_CMD29
RST PD place @ the end of daisy-chain.
5
VREF_VMA3_MOS
3
Q4501
GKB@2N7002D
1
R4538 GKB@1 0K_4 R4541 GKB@1 0K_4
R4542 GKB@1 0K_4 R4543 GKB@1 0K_4
6
6
QD40~47
R4555 GKB@120/F_4
R4556 GKB@1 K_4
+1.35V_GFX
R4557 GKB@1 K_4
GKB@931/F_4
R4518
GKB@549/F_4
VREFC_VMA3 VREFD_VMA3
R4532
GKB@1.33K/F_4
GDDR5 Mode H Mapping
< 0-31 > < 32-63 > Memory
CMD0 CMD16 CS* CMD1 CMD17 A3_BA3 CMD2 CMD18 A2_BA0 CMD3 CMD19 A4_BA2 CMD4 CMD20 A5_BA1 CMD5 CMD21 WE* CMD6 CMD22 A7_A8 CMD7 CMD23 A6_A11 CMD8 CMD24 ABI* CMD9 CMD25 A12_RFU CMD10 CMD26 A0_A10 CMD11 CMD27 A1_A9 CMD12 CMD28 RAS* CMD13 CMD29 RST* CMD14 CMD30 CKE* CMD15 CMD31 CAS*
7
MF=1 Mirrored
VMA_DQ47 VMA_DQ46 VMA_DQ45 VMA_DQ44 VMA_DQ43 VMA_DQ42 VMA_DQ41 VMA_DQ40
VMA_DQ63 VMA_DQ62 VMA_DQ61 VMA_DQ60 VMA_DQ59 VMA_DQ58 VMA_DQ57 VMA_DQ56
FBA_CMD25 FBA_CMD26 FBA_CMD27 FBA_CMD17 FBA_CMD18 FBA_CMD20 FBA_CMD19 FBA_CMD23 FBA_CMD22
VMA_WCK67 VMA_WCK67#
VMA_WCK45 VMA_WCK45#
FBA_EDC7FBA_EDC4
FBA_DBI5FBA_DBI6
FBA_CMD31 FBA_CMD28
FBA_CMD30
VMA_CLK1
FBA_CMD21 FBA_CMD16
SEN_A3
FBA_CMD29
16mils16mils
VREFD_VMA4
16mils
VREFC_VMA4
FBA_CMD24
VREF_VMA3_MOS
R4519
R4520
*GKB@549/F_4
1 2
R4533
*GKB@1.33K/F_4
7
Channel 1 <32-63>
VRAM3005
M2
DQ31 | DQ7
M4
DQ30 | DQ6
N2
DQ29 | DQ5
N4
DQ28 | DQ4
T2
DQ27 | DQ3
T4
DQ26 | DQ2
U2
DQ25 | DQ1
U4
DQ24 | DQ0
M13
DQ23 | DQ15
M11
DQ22 | DQ14
N13
DQ21 | DQ13
N11
DQ20 | DQ12
T13
DQ19 | DQ11
T11
DQ18 | DQ10
U13
DQ17 | DQ9
U11
DQ16 | DQ8
F13
DQ15 | DQ23
F11
DQ14 | DQ22
E13
DQ13 | DQ21
E11
DQ12 | DQ20
B13
DQ11 | DQ19
B11
DQ10 | DQ18
A13
DQ9 | DQ17
A11
DQ8 | DQ16
F2
DQ7 | DQ31
F4
DQ6 | DQ30
E2
DQ5 | DQ29
E4
DQ4 | DQ28
B2
DQ3 | DQ27
B4
DQ2 | DQ26
A2
DQ1 | DQ25
A4
DQ0 | DQ24
J5
RFU/A12/NC
K4
A7/A8 | A0/A10
K5
A6/A11 | A1/A9
K10
A5/BA1 | A3/ BA3
K11
A4/BA2 | A2/ BA0
H10
A3/BA3 | A5/ BA1
H11
A2 /BA0 | A4 /BA2
H5
A1/A9 | A6/A11
H4
A0/A10 | A7/A8
D4
WCK01 | WCK23
D5
WCK01# | WCK23#
P4
WCK23 | WCK01
P5
WCK23# | WCK01#
R2
EDC3 | EDC0
R13
EDC2 | EDC1
C13
EDC1 | EDC2
C2
EDC0 | EDC3
P2
DBI3# | DBI0#
P13
DBI2 #| DBI1#
D13
DBI1# | DBI2#
D2
DBI0# | DBI3#
G3
RAS# | CAS#
L3
CAS# | RAS#
J3
CKE#
J11
CK#
J12
CK
G12
CS# | WE#
L12
WE# | CS#
J13
ZQ
J10
SEN
J2
RESET#
J1
MF
A5
Vpp,N C
U5
Vpp,N C1
A10
VREFD1
U10
VREFD2
J14
VREFC
J4
ABI#
GKB@GDDR5
R4521
*GKB@931/F_4
R4522
GKB@549/F_4
1 2
R4534
GKB@1.33K/F_4
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
B1
VDDQ-B1
B3
VDDQ-B3
B12
VDDQ-B12
B14
VDDQ-B14
D1
VDDQ-D1
D3
VDDQ-D3
D12
VDDQ-D12
D14
VDDQ-D14
E5
VDDQ-E5
E10
VDDQ-E10
F1
VDDQ-F1
F3
VDDQ-F3
F12
VDDQ-F1 2
F14
VDDQ-F1 4
G2
VDDQ-G2
G13
VDDQ-G1 3
H3
VDDQ-H3
H12
VDDQ-H12
K3
VDDQ-K3
K12
VDDQ-K12
L2
VDDQ-L2
L13
VDDQ-L13
M1
VDDQ-M1
M3
VDDQ-M3
M12
VDDQ-M12
M14
VDDQ-M14
N5
VDDQ-N5
N10
VDDQ-N10
P1
VDDQ-P1
P3
VDDQ-P3
P12
VDDQ-P12
P14
VDDQ-P14
T1
VDDQ-T1
T3
VDDQ-T3
T12
VDDQ-T12
T14
VDDQ-T14
C5
VDD-C5
C10
VDD-C10
D11
VDD-D11
G1
VDD-G1
G4
VDD-G4
G11
VDD-G11
G14
VDD-G14
L1
VDD-L1
L4
VDD-L4
L11
VDD-L11
L14
VDD-L14
P11
VDD-P11
R5
VDD-R5
R10
VDD-R10
A1
VSSQ-A1
A3
VSSQ-A3
A12
VSSQ-A12
A14
VSSQ-A14
C1
VSSQ-C1
C3
VSSQ-C3
C4
VSSQ-C4
C11
VSSQ-C1 1
C12
VSSQ-C1 2
C14
VSSQ-C1 4
E1
VSSQ-E1
E3
VSSQ-E3
E12
VSSQ-E1 2
E14
VSSQ-E1 4
F5
VSSQ-F 5
F10
VSSQ-F 10
H2
VSSQ-H2
H13
VSSQ-H1 3
K2
VSSQ-K2
K13
VSSQ-K1 3
M5
VSSQ-M5
M10
VSSQ-M10
N1
VSSQ-N1
N3
VSSQ-N3
N12
VSSQ-N1 2
N14
VSSQ-N1 4
R1
VSSQ-R1
R3
VSSQ-R3
R4
VSSQ-R4
R11
VSSQ-R1 1
R12
VSSQ-R1 2
R14
VSSQ-R1 4
U1
VSSQ-V1
U3
VSSQ-V3
U12
VSSQ-V12
U14
VSSQ-V14
B5
VSS-B5
B10
VSS-B10
D10
VSS-D10
G5
VSS-G5
G10
VSS-G10
H1
VSS-H1
H14
VSS-H14
K1
VSS-K1
K14
VSS-K14
L5
VSS-L5
L10
VSS-L10
P10
VSS-P10
T5
VSS-T5
T10
VSS-T10
VRAM3005
VREF_VMA3_MOS
R4523
GKB@931/F_4
R4524
*GKB@549/F_4
1 2
VREFC_VMA4 VREFD_VMA4
R4535
*GKB@1.33K/F_4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
GDDR5x16-VRAM-A
GDDR5x16-VRAM-A
GDDR5x16-VRAM-A
8
R4525
*GKB@931/F_4
8
1 2
ZAA
ZAA
ZAA
19 48Friday, February 05, 2016
19 48Friday, February 05, 2016
19 48Friday, February 05, 2016
1A
1A
1A
Page 20
1
Dr-Bios.com
VMB_DQ[63..0]<15>
FBB_CMD[31:0]<15>
FBB_DBI[7..0]<15>
FBB_EDC[7..0]<15 >
VMB_DQ[63..0]
FBB_CMD[31:0]
FBB_DBI[7..0]
FBB_EDC[7..0]
Channel 0 <0-31>
MF=0 Non-mirrored
VRAM3003
M2
DQ31 | DQ7
M4
DQ30 | DQ6
N2
DQ29 | DQ5
N4
DQ28 | DQ4
T2
DQ27 | DQ3
T4
DQ26 | DQ2
A A
QD16~23
QD0~7
FBB_CMD9 FBB_CMD6 FBB_CMD7 FBB_CMD4 FBB_CMD3 FBB_CMD1 FBB_CMD2 FBB_CMD11 FBB_CMD10
VMB_WCK01<15>
B B
C C
VMB_WCK01#<15>
VMB_WCK23<15> VMB_WCK23#<15>
VMB_CLK0#<15>
VMB_CLK0<15>
VMB_WCK01 VMB_WCK01#
VMB_WCK23 VMB_WCK23#
FBB_EDC2
FBB_EDC0
FBB_DBI2
FBB_DBI0
FBB_CMD12 FBB_CMD15
FBB_CMD14 VMB_CLK0# VMB_CLK0
FBB_CMD0 FBB_CMD5
R11089 GKA@1 20/F_4 R11090 GKA@1 K_4
FBB_CMD13
R11068 GKA@1 K_4
VREFD_VMB1
16mils
VREFC_VMB1
FBB_CMD8
VMB_DQ23 VMB_DQ22 VMB_DQ21 VMB_DQ20 VMB_DQ19 VMB_DQ18 VMB_DQ17 VMB_DQ16
VMB_DQ7 VMB_DQ6 VMB_DQ5 VMB_DQ4 VMB_DQ3 VMB_DQ2 VMB_DQ1 VMB_DQ0
SEN_B0
U2
DQ25 | DQ1
U4
DQ24 | DQ0
M13
DQ23 | DQ15
M11
DQ22 | DQ14
N13
DQ21 | DQ13
N11
DQ20 | DQ12
T13
DQ19 | DQ11
T11
DQ18 | DQ10
U13
DQ17 | DQ9
U11
DQ16 | DQ8
F13
DQ15 | DQ23
F11
DQ14 | DQ22
E13
DQ13 | DQ21
E11
DQ12 | DQ20
B13
DQ11 | DQ19
B11
DQ10 | DQ18
A13
DQ9 | DQ17
A11
DQ8 | DQ16
F2
DQ7 | DQ31
F4
DQ6 | DQ30
E2
DQ5 | DQ29
E4
DQ4 | DQ28
B2
DQ3 | DQ27
B4
DQ2 | DQ26
A2
DQ1 | DQ25
A4
DQ0 | DQ24
J5
RFU/A12/NC
K4
A7/A8 | A0/A10
K5
A6/A11 | A1/A9
K10
A5/BA1 | A3/ BA3
K11
A4/BA2 | A2/ BA0
H10
A3/BA3 | A5/ BA1
H11
A2 /BA0 | A4 /BA2
H5
A1/A9 | A6/A11
H4
A0/A10 | A7/A8
D4
WCK01 | WCK23
D5
WCK01# | WCK23#
P4
WCK23 | WCK01
P5
WCK23# | WCK01#
R2
EDC3 | EDC0
R13
EDC2 | EDC1
C13
EDC1 | EDC2
C2
EDC0 | EDC3
P2
DBI3# | DBI0#
P13
DBI2 #| DBI1#
D13
DBI1# | DBI2#
D2
DBI0# | DBI3#
G3
RAS# | CAS#
L3
CAS# | RAS#
J3
CKE#
J11
CK#
J12
CK
G12
CS# | WE#
L12
WE# | CS#
J13
ZQ
J10
SEN
J2
RESET#
J1
MF
A5
Vpp,N C
U5
Vpp,N C1
A10
VREFD1
U10
VREFD2
J14
VREFC
J4
ABI#
GKA@GDDR5
2
3
For KA of GPU
B1
VDDQ-B1
B3
VDDQ-B3
B12
VDDQ-B12
B14
VDDQ-B14
D1
VDDQ-D1
D3
VDDQ-D3
D12
VDDQ-D12
D14
VDDQ-D14
E5
VDDQ-E5
E10
VDDQ-E10
F1
VDDQ-F1
F3
VDDQ-F3
F12
VDDQ-F1 2 VDDQ-F1 4
VDDQ-G2
VDDQ-G1 3
VDDQ-H3
VDDQ-H12
VDDQ-K3
VDDQ-K12
VDDQ-L2
VDDQ-L13
VDDQ-M1
VDDQ-M3 VDDQ-M12 VDDQ-M14
VDDQ-N5 VDDQ-N10
VDDQ-P1
VDDQ-P3 VDDQ-P12 VDDQ-P14
VDDQ-T1
VDDQ-T3 VDDQ-T12 VDDQ-T14
VDD-C5 VDD-C10 VDD-D11
VDD-G1
VDD-G4 VDD-G11 VDD-G14
VDD-L1
VDD-L4 VDD-L11 VDD-L14
VDD-P11
VDD-R5
VDD-R10
VSSQ-A1
VSSQ-A3 VSSQ-A12 VSSQ-A14
VSSQ-C1
VSSQ-C3
VSSQ-C4 VSSQ-C1 1 VSSQ-C1 2 VSSQ-C1 4
VSSQ-E1
VSSQ-E3 VSSQ-E1 2 VSSQ-E1 4
VSSQ-F 5 VSSQ-F 10
VSSQ-H2 VSSQ-H1 3
VSSQ-K2 VSSQ-K1 3
VSSQ-M5
VSSQ-M10
VSSQ-N1
VSSQ-N3 VSSQ-N1 2 VSSQ-N1 4
VSSQ-R1
VSSQ-R3
VSSQ-R4 VSSQ-R1 1 VSSQ-R1 2 VSSQ-R1 4
VSSQ-V1
VSSQ-V3 VSSQ-V12 VSSQ-V14
VSS-B5 VSS-B10 VSS-D10
VSS-G5
VSS-G10
VSS-H1 VSS-H14
VSS-K1 VSS-K14
VSS-L5 VSS-L10 VSS-P10
VSS-T5 VSS-T10
F14 G2 G13 H3 H12 K3 K12 L2 L13 M1 M3 M12 M14 N5 N10 P1 P3 P12 P14 T1 T3 T12 T14
C5 C10 D11 G1 G4 G11 G14 L1 L4 L11 L14 P11 R5 R10
A1 A3 A12 A14 C1 C3 C4 C11 C12 C14 E1 E3 E12 E14 F5 F10 H2 H13 K2 K13 M5 M10 N1 N3 N12 N14 R1 R3 R4 R11 R12 R14 U1 U3 U12 U14
B5 B10 D10 G5 G10 H1 H14 K1 K14 L5 L10 P10 T5 T10
VRAM3003
QD8~15
QD24~31
R11106 GKA@120 /F_4
R11092 GKA@1 K_4
+1.35V_GFX
R11096 GKA@1 K_4
FBB_CMD9 FBB_CMD10 FBB_CMD11 FBB_CMD1 FBB_CMD2 FBB_CMD4 FBB_CMD3 FBB_CMD7 FBB_CMD6
VMB_WCK23 VMB_WCK23#
VMB_WCK01 VMB_WCK01#
FBB_EDC1
FBB_EDC3
FBB_DBI1
FBB_DBI3
FBB_CMD15 FBB_CMD12
FBB_CMD14 VMB_CLK0# VMB_CLK0 VMB_CLK1
FBB_CMD5 FBB_CMD0
FBB_CMD13
16mils16mils
VREFD_VMB2
VREFC_VMB2
FBB_CMD8
Channel 0 <0-31>
MF=1 Mirrored
VRAM3007
M2
DQ31 | DQ7
M4
DQ30 | DQ6
N2
DQ29 | DQ5
N4
DQ28 | DQ4
T2
DQ27 | DQ3
T4
DQ26 | DQ2
U2
DQ25 | DQ1
U4
DQ24 | DQ0
M13
VMB_DQ15 VMB_DQ14 VMB_DQ13 VMB_DQ12 VMB_DQ11 VMB_DQ10 VMB_DQ9 VMB_DQ8
VMB_DQ31 VMB_DQ30 VMB_DQ29 VMB_DQ28 VMB_DQ27 VMB_DQ26 VMB_DQ25 VMB_DQ24
SEN_B1
M11 N13 N11 T13 T11 U13 U11 F13 F11 E13 E11 B13 B11 A13 A11
F2 F4 E2 E4 B2 B4 A2 A4
J5 K4
K5 K10 K11 H10 H11
H5
H4
D4
D5
P4
P5
R2 R13 C13
C2
P2 P13 D13
D2
G3
L3
J3
J11 J12
G12
L12
J13 J10
J2
J1
A5
U5
A10 U10
J14
J4
GKA@GDDR5
DQ23 | DQ15 DQ22 | DQ14 DQ21 | DQ13 DQ20 | DQ12 DQ19 | DQ11 DQ18 | DQ10 DQ17 | DQ9 DQ16 | DQ8 DQ15 | DQ23 DQ14 | DQ22 DQ13 | DQ21 DQ12 | DQ20 DQ11 | DQ19 DQ10 | DQ18 DQ9 | DQ17 DQ8 | DQ16 DQ7 | DQ31 DQ6 | DQ30 DQ5 | DQ29 DQ4 | DQ28 DQ3 | DQ27 DQ2 | DQ26 DQ1 | DQ25 DQ0 | DQ24
RFU/A12/NC A7/A8 | A0/A10 A6/A11 | A1/A9 A5/BA1 | A3/ BA3 A4/BA2 | A2/ BA0 A3/BA3 | A5/ BA1 A2 /BA0 | A4 /BA2 A1/A9 | A6/A11 A0/A10 | A7/A8
WCK01 | WCK23 WCK01# | WCK23#
WCK23 | WCK01 WCK23# | WCK01#
EDC3 | EDC0 EDC2 | EDC1 EDC1 | EDC2 EDC0 | EDC3
DBI3# | DBI0# DBI2 #| DBI1# DBI1# | DBI2# DBI0# | DBI3#
RAS# | CAS# CAS# | RAS#
CKE# CK# CK
CS# | WE# WE# | CS#
ZQ SEN
RESET# MF
Vpp,N C Vpp,N C1
VREFD1 VREFD2
VREFC
ABI#
4
CHANNEL A: 1G/2G GDDR5 X16
MF=0 Non-mirrored
VMB_DQ55 VMB_DQ54 VMB_DQ53 VMB_DQ52 VMB_DQ51 VMB_DQ50 VMB_DQ49 VMB_DQ48
VMB_DQ39 VMB_DQ38 VMB_DQ37 VMB_DQ36 VMB_DQ35 VMB_DQ34 VMB_DQ33 VMB_DQ32
FBB_CMD25 FBB_CMD22 FBB_CMD23 FBB_CMD20 FBB_CMD19 FBB_CMD17 FBB_CMD18 FBB_CMD27 FBB_CMD26
VMB_WCK45 VMB_WCK45#
VMB_WCK67 VMB_WCK67#
FBB_EDC6 FBB_EDC5
FBB_DBI4 FBB_DBI7
FBB_CMD28 FBB_CMD31
FBB_CMD30 VMB_CLK1# VMB_CLK1#
FBB_CMD16 FBB_CMD21
R11075 GKA@1 20/F_4 R11083 GKA@1 K_4
FBB_CMD29
R11073 GKA@1 K_4
VREFD_VMB3
16mils16mils
VREFC_VMB3
FBB_CMD24
VDDQ-B1
VDDQ-B3 VDDQ-B12 VDDQ-B14
VDDQ-D1
VDDQ-D3 VDDQ-D12 VDDQ-D14
VDDQ-E5 VDDQ-E10
VDDQ-F1
VDDQ-F3 VDDQ-F1 2 VDDQ-F1 4
VDDQ-G2
VDDQ-G1 3
VDDQ-H3 VDDQ-H12
VDDQ-K3 VDDQ-K12
VDDQ-L2
VDDQ-L13 VDDQ-M1
VDDQ-M3 VDDQ-M12 VDDQ-M14
VDDQ-N5
VDDQ-N10
VDDQ-P1
VDDQ-P3 VDDQ-P12 VDDQ-P14
VDDQ-T1
VDDQ-T3 VDDQ-T12 VDDQ-T14
VDD-C5 VDD-C10 VDD-D11
VDD-G1
VDD-G4 VDD-G11 VDD-G14
VDD-L1
VDD-L4
VDD-L11 VDD-L14
VDD-P11
VDD-R5 VDD-R10
VSSQ-A1 VSSQ-A3
VSSQ-A12 VSSQ-A14
VSSQ-C1 VSSQ-C3 VSSQ-C4
VSSQ-C1 1 VSSQ-C1 2 VSSQ-C1 4
VSSQ-E1 VSSQ-E3
VSSQ-E1 2 VSSQ-E1 4
VSSQ-F 5
VSSQ-F 10
VSSQ-H2
VSSQ-H1 3
VSSQ-K2
VSSQ-K1 3
VSSQ-M5
VSSQ-M10
VSSQ-N1 VSSQ-N3
VSSQ-N1 2 VSSQ-N1 4
VSSQ-R1 VSSQ-R3 VSSQ-R4
VSSQ-R1 1 VSSQ-R1 2 VSSQ-R1 4
VSSQ-V1 VSSQ-V3
VSSQ-V12 VSSQ-V14
VSS-B5
VSS-B10 VSS-D10
VSS-G5 VSS-G10
VSS-H1
VSS-H14
VSS-K1
VSS-K14
VSS-L5 VSS-L10 VSS-P10
VSS-T5
VSS-T10
+1.35V_GFX +1.35V_GFX
B1 B3 B12 B14 D1 D3 D12 D14 E5 E10 F1 F3 F12 F14 G2 G13 H3 H12 K3 K12 L2 L13 M1 M3 M12 M14 N5 N10 P1 P3 P12 P14 T1 T3 T12 T14
C5 C10 D11 G1 G4 G11 G14 L1 L4 L11 L14 P11 R5 R10
A1 A3 A12 A14 C1 C3 C4 C11 C12 C14 E1 E3 E12 E14 F5 F10 H2 H13 K2 K13 M5 M10 N1 N3 N12 N14 R1 R3 R4 R11 R12 R14 U1 U3 U12 U14
B5 B10 D10 G5 G10 H1 H14 K1 K14 L5 L10 P10 T5 T10
VRAM3007
QD48~55
QD32~39 QD56~63
VMB_WCK45<15> VMB_WCK45#<15>
VMB_WCK67<15> VMB_WCK67#<15>
VMB_CLK1#<15>
VMB_CLK1<15>
5
SEN_B2
Channel 1 <32-63>
VRAM3002
M2
DQ31 | DQ7
M4
DQ30 | DQ6
N2
DQ29 | DQ5
N4
DQ28 | DQ4
T2
DQ27 | DQ3
T4
DQ26 | DQ2
U2
DQ25 | DQ1
U4
DQ24 | DQ0
M13
DQ23 | DQ15
M11
DQ22 | DQ14
N13
DQ21 | DQ13
N11
DQ20 | DQ12
T13
DQ19 | DQ11
T11
DQ18 | DQ10
U13
DQ17 | DQ9
U11
DQ16 | DQ8
F13
DQ15 | DQ23
F11
DQ14 | DQ22
E13
DQ13 | DQ21
E11
DQ12 | DQ20
B13
DQ11 | DQ19
B11
DQ10 | DQ18
A13
DQ9 | DQ17
A11
DQ8 | DQ16
F2
DQ7 | DQ31
F4
DQ6 | DQ30
E2
DQ5 | DQ29
E4
DQ4 | DQ28
B2
DQ3 | DQ27
B4
DQ2 | DQ26
A2
DQ1 | DQ25
A4
DQ0 | DQ24
J5
RFU/A12/NC
K4
A7/A8 | A0/A10
K5
A6/A11 | A1/A9
K10
A5/BA1 | A3/ BA3
K11
A4/BA2 | A2/ BA0
H10
A3/BA3 | A5/ BA1
H11
A2 /BA0 | A4 /BA2
H5
A1/A9 | A6/A11
H4
A0/A10 | A7/A8
D4
WCK01 | WCK23
D5
WCK01# | WCK23#
P4
WCK23 | WCK01
P5
WCK23# | WCK01#
R2
EDC3 | EDC0
R13
EDC2 | EDC1
C13
EDC1 | EDC2
C2
EDC0 | EDC3
P2
DBI3# | DBI0#
P13
DBI2 #| DBI1#
D13
DBI1# | DBI2#
D2
DBI0# | DBI3#
G3
RAS# | CAS#
L3
CAS# | RAS#
J3
CKE#
J11
CK#
J12
CK
G12
CS# | WE#
L12
WE# | CS#
J13
ZQ
J10
SEN
J2
RESET#
J1
MF
A5
Vpp,N C
U5
Vpp,N C1
A10
VREFD1
U10
VREFD2
J14
VREFC
J4
ABI#
GKA@GDDR5
VDDQ-B1
VDDQ-B3 VDDQ-B12 VDDQ-B14
VDDQ-D1
VDDQ-D3 VDDQ-D12 VDDQ-D14
VDDQ-E5 VDDQ-E10
VDDQ-F1
VDDQ-F3 VDDQ-F1 2 VDDQ-F1 4
VDDQ-G2 VDDQ-G1 3
VDDQ-H3 VDDQ-H12
VDDQ-K3 VDDQ-K12
VDDQ-L2
VDDQ-L13
VDDQ-M1
VDDQ-M3 VDDQ-M12 VDDQ-M14
VDDQ-N5 VDDQ-N10
VDDQ-P1
VDDQ-P3 VDDQ-P12 VDDQ-P14
VDDQ-T1
VDDQ-T3 VDDQ-T12 VDDQ-T14
VDD-C5 VDD-C10 VDD-D11
VDD-G1
VDD-G4 VDD-G11 VDD-G14
VDD-L1
VDD-L4 VDD-L11 VDD-L14 VDD-P11
VDD-R5
VDD-R10
VSSQ-A1 VSSQ-A3
VSSQ-A12 VSSQ-A14
VSSQ-C1 VSSQ-C3
VSSQ-C4 VSSQ-C1 1 VSSQ-C1 2 VSSQ-C1 4
VSSQ-E1
VSSQ-E3 VSSQ-E1 2 VSSQ-E1 4
VSSQ-F 5
VSSQ-F 10
VSSQ-H2 VSSQ-H1 3
VSSQ-K2 VSSQ-K1 3
VSSQ-M5 VSSQ-M10
VSSQ-N1
VSSQ-N3 VSSQ-N1 2 VSSQ-N1 4
VSSQ-R1
VSSQ-R3
VSSQ-R4 VSSQ-R1 1 VSSQ-R1 2 VSSQ-R1 4
VSSQ-V1
VSSQ-V3 VSSQ-V12 VSSQ-V14
VSS-B5 VSS-B10 VSS-D10
VSS-G5
VSS-G10
VSS-H1 VSS-H14
VSS-K1 VSS-K14
VSS-L5 VSS-L10 VSS-P10
VSS-T5 VSS-T10
B1 B3 B12 B14 D1 D3 D12 D14 E5 E10 F1 F3 F12 F14 G2 G13 H3 H12 K3 K12 L2 L13 M1 M3 M12 M14 N5 N10 P1 P3 P12 P14 T1 T3 T12 T14
C5 C10 D11 G1 G4 G11 G14 L1 L4 L11 L14 P11 R5 R10
A1 A3 A12 A14 C1 C3 C4 C11 C12 C14 E1 E3 E12 E14 F5 F10 H2 H13 K2 K13 M5 M10 N1 N3 N12 N14 R1 R3 R4 R11 R12 R14 U1 U3 U12 U14
B5 B10 D10 G5 G10 H1 H14 K1 K14 L5 L10 P10 T5 T10
VRAM3002
6
7
8
Channel 1 <32-63>
+1.35V_GFX+1.35V_GFX
QD40~47
R11084 GKA@120 /F_4
+1.35V_GFX
R11071 GKA@1 K_4
MF=1 Mirrored
VMB_DQ47 VMB_DQ46 VMB_DQ45 VMB_DQ44 VMB_DQ43 VMB_DQ42 VMB_DQ41 VMB_DQ40
VMB_DQ63 VMB_DQ62 VMB_DQ61 VMB_DQ60 VMB_DQ59 VMB_DQ58 VMB_DQ57 VMB_DQ56
FBB_CMD25 FBB_CMD26 FBB_CMD27 FBB_CMD17 FBB_CMD18 FBB_CMD20 FBB_CMD19 FBB_CMD23 FBB_CMD22
VMB_WCK67 VMB_WCK67#
VMB_WCK45 VMB_WCK45#
FBB_EDC7FBB_EDC4
FBB_DBI5FBB_DBI6
FBB_CMD31 FBB_CMD28
FBB_CMD30
VMB_CLK1
FBB_CMD21 FBB_CMD16
SEN_B3
R11069 GKA@1 K_4
FBB_CMD29
16mils16mils
VREFD_VMB4
16mils
VREFC_VMB4
FBB_CMD24
M2 M4 N2 N4 T2 T4 U2
U4 M13 M11 N13 N11
T13
T11 U13 U11 F13 F11 E13 E11 B13 B11 A13 A11
F2 F4 E2 E4 B2 B4 A2 A4
J5 K4
K5 K10 K11 H10 H11
H5
H4
D4
D5
P4
P5
R2 R13 C13
C2
P2 P13 D13
D2
G3
L3
J3
J11 J12
G12
L12
J13 J10
J2
J1
A5
U5
A10 U10
J14
J4
VRAM3006
GKA@GDDR5
DQ31 | DQ7 DQ30 | DQ6 DQ29 | DQ5 DQ28 | DQ4 DQ27 | DQ3 DQ26 | DQ2 DQ25 | DQ1 DQ24 | DQ0 DQ23 | DQ15 DQ22 | DQ14 DQ21 | DQ13 DQ20 | DQ12 DQ19 | DQ11 DQ18 | DQ10 DQ17 | DQ9 DQ16 | DQ8 DQ15 | DQ23 DQ14 | DQ22 DQ13 | DQ21 DQ12 | DQ20 DQ11 | DQ19 DQ10 | DQ18 DQ9 | DQ17 DQ8 | DQ16 DQ7 | DQ31 DQ6 | DQ30 DQ5 | DQ29 DQ4 | DQ28 DQ3 | DQ27 DQ2 | DQ26 DQ1 | DQ25 DQ0 | DQ24
RFU/A12/NC A7/A8 | A0/A10 A6/A11 | A1/A9 A5/BA1 | A3/ BA3 A4/BA2 | A2/ BA0 A3/BA3 | A5/ BA1 A2 /BA0 | A4 /BA2 A1/A9 | A6/A11 A0/A10 | A7/A8
WCK01 | WCK23 WCK01# | WCK23#
WCK23 | WCK01 WCK23# | WCK01#
EDC3 | EDC0 EDC2 | EDC1 EDC1 | EDC2 EDC0 | EDC3
DBI3# | DBI0# DBI2 #| DBI1# DBI1# | DBI2# DBI0# | DBI3#
RAS# | CAS# CAS# | RAS#
CKE# CK# CK
CS# | WE# WE# | CS#
ZQ SEN
RESET# MF
Vpp,N C Vpp,N C1
VREFD1 VREFD2
VREFC
ABI#
VDDQ-B1
VDDQ-B3 VDDQ-B12 VDDQ-B14
VDDQ-D1
VDDQ-D3 VDDQ-D12 VDDQ-D14
VDDQ-E5 VDDQ-E10
VDDQ-F1
VDDQ-F3 VDDQ-F1 2 VDDQ-F1 4
VDDQ-G2
VDDQ-G1 3
VDDQ-H3
VDDQ-H12
VDDQ-K3
VDDQ-K12
VDDQ-L2
VDDQ-L13
VDDQ-M1
VDDQ-M3
VDDQ-M12 VDDQ-M14
VDDQ-N5
VDDQ-N10
VDDQ-P1
VDDQ-P3
VDDQ-P12 VDDQ-P14
VDDQ-T1
VDDQ-T3 VDDQ-T12 VDDQ-T14
VDD-C5 VDD-C10 VDD-D11
VDD-G1
VDD-G4 VDD-G11 VDD-G14
VDD-L1
VDD-L4 VDD-L11 VDD-L14
VDD-P11
VDD-R5
VDD-R10
VSSQ-A1
VSSQ-A3 VSSQ-A12 VSSQ-A14
VSSQ-C1 VSSQ-C3
VSSQ-C4 VSSQ-C1 1 VSSQ-C1 2 VSSQ-C1 4
VSSQ-E1
VSSQ-E3 VSSQ-E1 2 VSSQ-E1 4
VSSQ-F 5
VSSQ-F 10
VSSQ-H2
VSSQ-H1 3
VSSQ-K2 VSSQ-K1 3
VSSQ-M5
VSSQ-M10
VSSQ-N1
VSSQ-N3 VSSQ-N1 2 VSSQ-N1 4
VSSQ-R1
VSSQ-R3
VSSQ-R4 VSSQ-R1 1 VSSQ-R1 2 VSSQ-R1 4
VSSQ-V1
VSSQ-V3 VSSQ-V12 VSSQ-V14
VSS-B5
VSS-B10
VSS-D10
VSS-G5
VSS-G10
VSS-H1
VSS-H14
VSS-K1
VSS-K14
VSS-L5 VSS-L10 VSS-P10
VSS-T5 VSS-T10
B1 B3 B12 B14 D1 D3 D12 D14 E5 E10 F1 F3 F12 F14 G2 G13 H3 H12 K3 K12 L2 L13 M1 M3 M12 M14 N5 N10 P1 P3 P12 P14 T1 T3 T12 T14
C5 C10 D11 G1 G4 G11 G14 L1 L4 L11 L14 P11 R5 R10
A1 A3 A12 A14 C1 C3 C4 C11 C12 C14 E1 E3 E12 E14 F5 F10 H2 H13 K2 K13 M5 M10 N1 N3 N12 N14 R1 R3 R4 R11 R12 R14 U1 U3 U12 U14
B5 B10 D10 G5 G10 H1 H14 K1 K14 L5 L10 P10 T5 T10
VRAM3006
VREF_VMB1_MOS
VMB_CLK0
R11094 GKA@80.6/F_4
VMB_CLK0#
D D
+1.35V_GFX
VMB_CLK1
R11098 GKA@80.6/F_4
VMB_CLK1#
+
C4701 GKA@3 30u/2V_73 43
GKA@0.1u/16V_4C470 5 C4706 GKA@10U/6.3V_6 C4689 GKA@10U/6.3V_6 C4674 GKA@10U/6.3V_6
201201117 Add C764 for EMI suggestion.
1
+1.35V_GFX +1.35V_GF X +1.35V_GFX +1.35V_GFX +1.35V_GFX +1.35V_GF X+1.35V_GFX +1.35V_GF X
R11081
*GKA@549/F_4
1 2
R11103
*GKA@1.33K/F_4
GKA@0.1u/16V_4C470 4 GKA@0.1u/16V_4C469 9 GKA@0.1u/16V_4C466 6 GKA@0.1u/16V_4C468 7
R11067
*GKA@931/F_4
2
1 2
R11101
GKA@549/F_4
R11091
GKA@1.33K/F_4
R11070
GKA@931/F_4
R11077
GKA@549/F_4
VREFC_VMB1 VREFD_VMB1
R11105
GKA@1.33K/F_4
+1.35V_GFX +1.35V_GFX +1.35V_GFX +1.35V_GFX
C4684 GKA@1u/6.3V_4 C4688 GKA@1u/6.3V_4 C4683 GKA@1u/6.3V_4 C4694 GKA@0.047u/10V_4 C4669 GKA@0.047u/10V_4
VREF_VMB1_MOS
R11085
GKA@931/F_4
VREFC_VMB2 VREFD_VMB2
C4668 GKA@1u/6.3V_4 C4676 GKA@1u/6.3V_4 C4697 GKA@1u/6.3V_4 C4692 GKA@1u/6.3V_4 C4695 GKA@0.047u/10V_4 C4708 GKA@0.047u/10V_4
R11074
*GKA@549/F_4
1 2
R11102
*GKA@1.33K/F_4
GKA@0.1u/16V_4C467 0 GKA@0.1u/16V_4C469 8 GKA@0.1u/16V_4C467 3 GKA@0.1u/16V_4C470 7
*GKA@931/F_4
VREF_VMB1_MOS
R11066
3
1 2
Q4509
2
GKA@2N7002D
3
GPIO10_VREF <17,19,20> GPIO10_VREF <17,19,20>
1
C4690 GKA@1u/6.3V_4 C4679 GKA@1u/6.3V_4 C4675 GKA@1u/6.3V_4 C4703 G KA@1u/6.3V_4 C4691 GKA@1u/6.3V_4
GKA@0.1u/16V_4C468 2 GKA@0.1u/16V_4C467 1 GKA@0.1u/16V_4C468 6 *GKA@0.1u/16V_4C4 709 *GKA@0.1u/16V_4C4 685 *GKA@0.1u/16V_4C4 680
+1.35V_GFX <15,19,42>
GKA@0.1u/16V_4C467 8
C4672 GKA@1u/6.3V_4
C4693 GKA@1u/6.3V_4 C4667 GKA@0.047u/10V_4 C4696 GKA@0.047u/10V_4
GKA@0.1u/16V_4C470 2 GKA@0.1u/16V_4C470 0 GKA@0.1u/16V_4C468 1 GKA@0.1u/16V_4C467 7
4
VREF_VMB3_MOS
3
Q4510
2
GKA@2N7002D
1
+1.35V_GFX
R11086 GKA@1 0K_4
FBB_CMD14
R11072 GKA@1 0K_4
FBB_CMD30
CKE* is strap pin to set ODT value of memory chip
FBB_CMD13 FBB_CMD29
R11080 GKA@1 0K_4 R11065 GKA@1 0K_4
RST PD place @ the end of daisy-chain.
5
VREF_VMB3_MOS
R11097
R11099
GKA@931/F_4
GKA@549/F_4
R11100
GKA@1.33K/F_4
6
1 2
VREFC_VMB3 VREFD_VMB3
*GKA@1.33K/F_4
GDDR5 Mode H Mapping
< 0-31 > < 32-63 > Memory
CMD0 CMD16 CS* CMD1 CMD17 A3_BA3 CMD2 CMD18 A2_BA0 CMD3 CMD19 A4_BA2 CMD4 CMD20 A5_BA1 CMD5 CMD21 WE* CMD6 CMD22 A7_A8 CMD7 CMD23 A6_A11 CMD8 CMD24 ABI* CMD9 CMD25 A12_RFU CMD10 CMD26 A0_A10 CMD11 CMD27 A1_A9 CMD12 CMD28 RAS* CMD13 CMD29 RST* CMD14 CMD30 CKE* CMD15 CMD31 CAS*
R11104
*GKA@549/F_4
R11076
R11078
*GKA@931/F_4
7
GKA@549/F_4
1 2
GKA@1.33K/F_4
R11095
R11093
VREF_VMB3_MOS
R11079
GKA@931/F_4
*GKA@549/F_4
1 2
VREFC_VMB4 VREFD_VMB4
*GKA@1.33K/F_4
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
GDDR5x16-VRAM-B
GDDR5x16-VRAM-B
GDDR5x16-VRAM-B
Date: Sheet of
Date: Sheet of
Date: Sheet of
R11088
*GKA@931/F_4
R11082
R11087
1 2
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
ZAA
ZAA
ZAA
20 48Friday, February 05, 2016
20 48Friday, February 05, 2016
20 48Friday, February 05, 2016
8
1A
1A
1A
Page 21
5
Dr-Bios.com
USB TYPE-C
USB TYPE-C
USB TYPE-CUSB TYPE-C
R819 *short_4
S=)6T,%;=!
USBP7+<6> USBP7-<6>
D D
C C
OPQR%&5*-=+'*%;=!
USB3_TYPC_TX2P_RE
USB3_TYPC_TX2N_RE
USB3_TYPC_TX3P_RE
USB3_TYPC_TX3N_RE
C4770
C4771
USB3_TYPC_RX2P_RE USB3_TYPC_RX2N_R E
C4763
C4762
USB3_TYPC_RX3P_RE
USB3_TYPC_TX2P_R
TYC@0.1u/25 V/X5R_4
USB3_TYPC_TX2N_R
TYC@0.1u/25 V/X5R_4
USB3_TYPC_TX3P_R
TYC@0.1u/25 V/X5R_4
USB3_TYPC_TX3N_R
TYC@0.1u/25 V/X5R_4
*TYC@DLP11SN900HL2L
L69
1 4 3
R818 *short_4
R821 *short_4
RP4
4 3 1
*TYC@DLP11SN900HL2L
R820 *short_4
R11199 *short_4
*TYC@DLP11SN900HL2L
4 3 1
RP2
R11196 *short_4
R11202 *short_4
*TYC@DLP11SN900HL2L
1 4 3
RP5
R11207 *short_4
R816 *short_4
*TYC@DLP11SN900HL2L
R817 *short_4
Close to connector
2
USB2_TYPC_7P_C USB2_TYPC_7N_C
2
2
2
RP3
1432
USB3_TYPC_TX2P_C USB3_TYPC_TX2N_C
USB3_TYPC_RX2P_C USB3_TYPC_RX2N_C
USB3_TYPC_TX3P_C USB3_TYPC_TX3N_C
USB3_TYPC_RX3P_C USB3_TYPC_RX3N_CUSB3_TYPC_RX3N_R E
USB3 Re-Driver
B B
USB3_RXN2<6> USB3_RXP2<6>
USB3_TXN2<6> USB3_TXP2<6>
USB3_RXN3<6> USB3_RXP3<6>
USB3_TXN3<6> USB3_TXP3<6>
A A
C394 TYC@0.1U/16V_4_X7R C4781 TYC@0.1U/16V_4_X7R
C4780 TYC@0.1U/16V_4_X7R C369 TYC@0.1U/16V_4_X7R
C4777 TYC@0.1U/16V_4_X7R C4776 TYC@0.1U/16V_4_X7R
C4779 TYC@0.1U/16V_4_X7R C4778 TYC@0.1U/16V_4_X7R
+3V_S5 3V_LR
5
USB3_TYPC_RX2N_C _RE USB3_TYPC_RX2P_C_ RE
USB3_TYPC_TX2N_C_ RE USB3_TYPC_TX2P_C_R E
USB3_TYPC_RX3N_C _RE USB3_TYPC_RX3P_C_ RE
3V_LR
USB3_TYPC_TX3N_C_ RE USB3_TYPC_TX3P_C_R E
L4209 TYC@BLM18PG181SN1D_0.5A
R0603
C4775 TYC@10U/6.3V_6 _X5R
U9
39
GND
38
GND
1
A1_OUTn
2
A1_OUTp
3
GND
4
B1_INn
5
B1_INp
6
I2C_EN
7
A2_OUTn
8
A2_OUTp
9
VDD
10
B2_INn
11
B2_INp
36
GND
37
GND
C4774
TYC@0.1U/16V_4 _X7R
C4773
TYC@0.1U/16V_4 _X7R
4
A_EQ0
R11210 *TYC@4.99K/F_4
A_DE0
A_EQ0
A_EQ1B_EQ0
A_DE1
31
30
28
TYC@PTN36242LBS
40
GND
41
GND
REXT
A_DE029A_DE1
A_EQ032A_EQ1
27
A1_INn
26
A1_INp
25
VDD
24
B1_OUTn
23
B1_OUTp
22
TST
21
A2_INn
20
A2_INp
19
GND
18
B2_OUTn
17
B2_OUTp
33
GND
34
GND
35
GND
PD#12B_EQ013B_EQ114B_DE015B_DE1
16
B_DE1
B_DE0
B_EQ1
A_EQ0 A_EQ1
B_EQ0 B_EQ1
010
0
10
11
TST : Low = Normal LFPS swing / Hight =Turn down LFPS swing
4
A_EQ1
B_EQ0 B_EQ1
A_DE0 A_DE1
B_DE0 B_DE1
TST
TST
R11209 *TYC@4.7K/F_4
9dB
3dB
6dB
7.5dB
EC_TypeC_EN_R<31>
EC_TypeC_CHG_HI<31>
R258 *TYC@0_4 R11211 *TYC@0_4
R206 *TYC@0_4 R11212 *TYC@0_4
R11213 *TYC@0_4 R254 *TYC@0_4
R11214 *TYC@0_4 R203 *TYC@0_4
R617 *TYC@4.7K/F_4
USB3_TYPC_RX2N_R E USB3_TYPC_RX2P_RE
3V_LR
USB3_TYPC_TX2N_RE USB3_TYPC_TX2P_RE
USB3_TYPC_RX3N_R E USB3_TYPC_RX3P_RE
USB3_TYPC_TX3N_RE USB3_TYPC_TX3P_RE
A_DE0 A_DE1
B_DE0 B_DE1
10
-3.5dB
no de-emphasis
-7dB
-5dB
00
10
11
3
Vendor suggest input cap 120u
C4772 TYC@150U/6.3V_3528
C4766 TYC@10U/6.3V/X5R_6 C4769 TYC@10U/6.3V/X5R_6
R11279*short_4
3V_LR
+5V_S5_V2
+
EC_TypeC_EN_R
TYPEC_CHG TYPEC_CHG_HI
25810_REF
25810_REF_RTN
R11204 TYC@100K/F_ 4
+TYPEC_VBUS_C +TYPEC_VBUS
+5V_S5
R11201 TYC@10K_4
25810_UFP#_G1
3
Q15
2
25810_UFP#
3
TYC@2N7002K
1
+3V_S5<2,3,4,6,7,8,9,11,25,27,28,29,31,33,35,36,41> +5V_S5<30,33,36,37,38,39,41> +5V_S5_V2<33>
+TYPEC_VBUS_C
U28
2
IN1
3
IN1
4
IN2
5
VAUX
6
TPS25810RVC
EN
7
CHG
8
CHG_HI
10
REF
9
REF_RTN
12
GND
Q6062
TYC@AON7401
5 2
4
25810_UFP#_G2
R11195 TYC@100K/F_4
3
Q17
2
TYC@2N7002K
1
USB3_TYPC_RX2P_C USB3_TYPC_RX2N_C
USB3_TYPC_TX3P_C USB3_TYPC_TX3N_C
OUT OUT
TI
CC1 CC2
FAULT#
LD_DET#
UFP# POL#
AUDIO#
DEBUG#
PwPd
GND24GND23GND22GND25GND26GND
TYC@TPS25810RVCR (QFN)
27
1
3
C4817 TYC_EMI@100p/50V_4
15
C4765 TYC@10U/6.3V/X5R_6
14
11
25810_CC1
13
25810_CC2
1
25810_FAULT#
20
25810_LD_DET#
19
25810_UFP#
18
25810_POL#
17
25810_AUO#
16
25810_DBG#
21
C4767 TYC@0.1U/25V_4
U4509
1
LINE-1
LINE-2
2
LINE-3
LINE-4
3
GND
4
LINE-6
LINE-5
LINE-85LINE-7
TYC@AZ1043-0 8F
Quanta P/NAMAZING P/NUSD BC104308Z00AZ1043-08F.R7G0.08TX RX ( USB3.0 GEN1 5G ) BC104508Z00AZ1045-08F.R7G0.08D+ D- SBU1 SBU2 CC1 CC2 BC005725Z00AZ5725-01F.R7G0.009 PD 5V ( follow ZAA)
2
25810_UFP#
25810_FAULT#
R11200 TYC@10K_4
9
USB3_TYPC_TX2N_CUSB3_TYPC_TX2P_C
8
7 6
USB3_TYPC_RX3N_CUSB3_TYPC_RX3P_C
2
R11280*short_4
R11281*short_4
󰼦󰼦󰼦󰼦󴫀󴫀󴫀󴫀󰺖󰺖󰺖󰺖󳺷󳺷󳺷󳺷
1
25810_FAULT#
R11206 TYC@100K/F_4
25810_LD_DET#
R11208 TYC@100K/F_4
25810_UFP#
R11193 *TYC@100K/F_4
25810_POL#
R11203 TYC@100K/F_4
25810_AUO#
R11197 TYC@100K/F_4
25810_DBG#
R11194 TYC@100K/F_4
TYPEC_CHG
R11205 TYC@100K/F_4
TYPEC_CHG_HI
R11198 TYC@100K/F_4
EC_TypeC_EN_R
R11278 TYC@10K_4
PCH_Typ eC_UPFb # <2>
USB_OC3# <6>
+TYPEC_VBUS
+TYPEC_VBUS
EC51 TYC@AZ5725-0 1F
USB3_TYPC_TX2P_C
USB3_TYPC_TX2N_C USB3_TYPC_RX2N_C
C4647 TYC@0.47u/25V_6
25810_CC1 TYPEC_SBU2
USB2_TYPC_7P_C
USB2_TYPC_7N_C USB2_TYPC_7P_C
TP143
C4649 TYC@0.47u/25V_6
USB3_TYPC_RX3N_C
USB3_TYPC_RX3P_C USB3_TYPC_TX3P_C
TYPEC_SBU1
C4818 TYC_EMI@100p/50V_4
C4768 TYC@0.1U/25V_4
C4764 TYC@0.1U/25V_4
A1
GND
A2
TX1+
A3
TX1-
A4
VBUS
A5
CC1
A6
D+
A7
D-
A8
SBU1
A9
VBUS
A10
RX2-
A11
RX2+
A12
GND
3
H-GND
4
H-GND
TYC@USB_Type_C
ub31-dx07b024xj1ar1000-24p-smt
USB2_TYPC_7P_C USB 2_TYPC_7N_C
1 2
3
4
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Friday, February 05, 2016
Date: Sheet of
Friday, February 05, 2016
Date: Sheet of
Friday, February 05, 2016
+3V_S5
+3V_S5
CN2021
B12
GND
B11
RX1+
B10
RX1-
B9
+TYPEC_VBUS+TYPEC_VBUS
VBUS
B8
SBU2
B7
D-
B6
D+
B5
CC2
B4
+TYPEC_VBUS+TYPEC_VBUS
VBUS
B3
TX2-
B2
TX2+
B1
GND
1
H-GND
2
H-GND
U4513
9
LINE-1
LINE-2
8
LINE-3
LINE-4
GND
7
LINE-6
LINE-5
6
LINE-85LINE-7
TYC@AZ1045-0 8F
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
Type-C 3 of 3
Type-C 3 of 3
Type-C 3 of 3
1
Mount at page2
USB3_TYPC_RX2P_C
C4648 TYC@0.47u/25V_6
USB2_TYPC_7N_C
25810_CC2
C4650 TYC@0.47u/25V_6
USB3_TYPC_TX3N_C
TYPEC_SBU2TYPEC_SBU1 25810_CC225810_CC1
ZAA
ZAA
ZAA
21 48
21 48
21 48
TP144
1A
1A
1A
Page 22
5
Dr-Bios.com
4
3
2
1
DP TO VGA
Close to CPU side of CAP.
DDI2_TXP0<2>
D D
DDI2_TXN0<2>
DDI2_TXP1<2>
DDI2_TXN1<2>
PCH_DP_HPD<2>
DDI2_AUXN<2>
DDI2_AUXP<2>
R10842 *short_4
R10843 *short_4
R10844 *short_4
R10845 *short_4
R10846 *short_4
R10847 *short_4
R10848 *short_4
CRT_TXP0
CRT_TXN0
CRT_TXP1
CRT_TXN1
CRT_HPD
CRT_AUXN
CRT_AUXP
AVCC33
AUX_CH_P
AUX_CH_N
VCCK_V12
LANE0_P
LANE0_N
LANE1_P
LANE1_N
R11190 *0_4 R11189 *0_4
U13
1
AVCC_33
2
AUX_P
3
AUX_N
4
AVCC_12
5
LANE0_P
6
LANE0_N
7
LANE1_P
8
LANE1_N
+3V
CIIC_SCL
CRT_HPD
32
31
EPAD
30
HPD
SMB_SCL
EXT1.2V_CTRL
33
RTD2166
POL29POL1/SPI_CEB10SPI_CLK11SPI_SI12SPI_SO13VCC_3314VGA_SCL15VGA_SDA
4.7K_4
R11187
4.7K_4 R11188
RTD_PIN11
CIIC_SDA
29XI28
SMB_SDA
RTD_PIN12
C4752
0.1U/16V_4
+3V
VCCK_V12
27
25
PVCC_3326VCCK_12
LDO_RSTB
+3V
TP4376
VDD_DAC_33
HVSYNC_PWR
16
DDCCLK
DDCDAT
GND
RED_P
GREEN_P
BLUE_P
HSYNC
VSYNC
C4751
C4754
0.1U/16V_4
2.2U/6.3V_4
24
23
CRT_RED
22
CRT_GRE
21
CRT_BLU
20
VDD_DAC_33
19
HSYNC
18
VSYNC
17
C4749
0.1U/16V_4
+3V +3V
R11285
4.7K_4
RTD_PIN11 RTD_PIN12
+5V
C4753
4.7U/6.3V_4
R11286
*4.7K_4
VDD_DAC_33
C4750
0.1U/16V_4
DDCDAT
DDCCLK
HSYNC
VSYNC
CRT_RED
CRT_GRE
CRT_BLU
VGA
DDCDAT <23>
DDCCLK <23>
HSYNC <23>
VSYNC <23>
CRT_RED <23 >
CRT_GRE <23>
CRT_BLU <23>
CLK_SDATA<7,12,13,29> CLK_SCLK<7,12,13,29>
Power
+3V +3V
C C
B B
L4
60ohm@100MHz_6
AVCC33 VDD_DAC_33
CRT_AUXN
CRT_AUXP
CRT_TXP0
CRT_TXN0
CRT_TXP1
CRT_TXN1
L4208
60ohm@100MHz_6
C343 0.1U/16V_4
C341 0.1U/16V_4
C335 0.1U/16V_4
C331 0.1U/16V_4
C329 0.1U/16V_4
C315 0.1U/16V_4
AUX_CH_N
AUX_CH_P
LANE0_P
LANE0_N
LANE1_P
LANE1_N
C4748
0.1U/16V_4
Note:
1- C1,C3,C4,C5,C11,C16, C21 should be placed c lose to chip
2- C5 shold be X5R material
3- R6, R7, R8 should be 75 ohm with +/-1%
4- Suggest to connect Pin 29 and Pin 30 to PCH SMBUS for debug purpos e.
5- This configuration is for internal ROM mode and using embedded LDO mode.
A A
+3V <2,4,6,7,8,9,12,13,14,16,23,24,25,26,27,28,29,31,33,34,35,36,37,40,41,42>
+5V <23,24,26,27,29,33,40>
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
5
4
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
3
2
Date: Sheet of
PROJECT :
RTD2166-CG
RTD2166-CG
RTD2166-CG
ZAA
ZAA
ZAA
1A
1A
22 48Friday, February 05, 2016
22 48Friday, February 05, 2016
1
22 48Friday, February 05, 2016
1A
Page 23
5
Dr-Bios.com
CRT
EDP_AUX_C EDP_AUX#_C
TP_RST#
C804 180P/50V_4
CRTHSYNC_B
U40
1
OE#
VCC
2
A
3
GND
*M74VHC1GT125DF2G
CRTVSYNC_B
U37
1
OE#
VCC
2
A
3
GND
*M74VHC1GT125DF2G
R448 *100K_4 R449 *100K_4 R444 *TSI@10K_4
R457 33_4
eDP FHD
USBP5+<6> USBP5-<6>
5
4
Y
5
4
Y
I2C1_SCL_C
R11269 *33_4
R11271 47_4
R11272 *33_4
PCH_BRIGHT<2>
USBP5+ USBP5-
R11267 *short_4 R11268 47_4
HSYNC<22>
D D
VSYNC<22>
C C
R447 *100K_4 R450 *100K_4
2013/12/12 change eDP pin define colayout FHD Panel for A2 stage
HSYNC
R11270 *short_4
VSYNC
Prevent ESD/EOS Layout near device
EDP_HPD<2>
B B
Touch Panel-I2C
Touch Panel-USB
eDP 4k*2k
+5V
C720
0.1u/16V_4
CRTHSYNC
+5V
C713
0.1u/16V_4
CRTVSYNC
VIN
C7
C9
4.7u/25V_8
1000p/50V_4
+3V VIN
1A-5
LCDVCC
EDP_AUXP<2> EDP_AUXN<2>
EDP_TXP1<2> EDP_TXN1<2>
EDP_TXP0<2> EDP_TXN0<2>
R6 *TSI@0_4 R5 *TSI@0_4
R4 TSU@0_4 R3 TSU@0_4
EDP_TXP2<2> EDP_TXN2<2>
TS_EN<31> EDP_TXP3<2> EDP_TXN3<2>
Board_ID4<8>
EDP_AUX EDP_AUX#
EDP_TXP1 EDP_TXN1
EDP_TXP0 EDP_TXN0
EDP_TXP2 EDP_TXN2
EDP_TXP3 EDP_TXP3_C EDP_TXN3
S5
+3V
2
3
Q1 *TSI@2N7002K
TP_INTTS_EN
R7
*TSI@10K_4
1
TP_INT
R443 *0_4
1C1-2 2014/03/11 Add R698 for TS_EN short TP_INT,
for issue debug.
Touch Panel interrupt
A A
TP_INT_PCH<4>
S5 S0
R8 *TSI@0_4
5
4
CRT_RED<22>
CRT_GRE<22>
CRT_BLU<22>
TP_PWR CCD_PWR
C578
C577
0.1u/16V_4 1000p/50V_4
MAX 1.5A
C580
R28 *short_8
+3V
+5V +3V
C4 .1U/16V_4 C2 .1U/16V_4
C10 .1U/16V_4 C8 .1U/16V_4
C13 .1U/16V_4 C12 .1U/16V_4
CCD-USB
C3224 .1U/16V_4 C3225 .1U/16V_4
C3227 .1U/16V_4 C3226 .1U/16V_4
R441 33_4
C803 180P/50V_4
Prevent ESD/EOS Layout near device
*1u/6.3V_4
R11 *short_6
R16 0_6 R19 *0_6
PCH_BRIGHT
EDP_HPD_R
USBP6+<6>
USBP6-<6>
TS_EN TS_EN_R
BOARD_ID4_TOUCH_S
Hall Sensor (HSR)
+3VPCU
Rev:D change to shortpad
D28 *VPORT_6
4
R435 *100K_4
R434 *short_6
21
C556
4.7U/6.3V_4
1
R222 75/F_4
C27
0.1u/10V_4
R15 *short_8 R14 *short_8
C581
LCDVCC_R
R2 *short_4 R1 *short_4
R442 *short_4
2
3
MR1 AH9249NTR-G1
+5V
C337
5.6p/16V_4
1 2 3 4 5
1 2 3 4 5
CN5
U36
1 2 GND_3/8 4 5
*RClamp0524P
U38
1 2 GND_3/8 4 5
*RClamp0524P
G_5
40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
G_0
C334
5.6p/16V_4
LVDS_CONN
G_4
G_1
R213
R219
75/F_4
75/F_4
CRTHSYNC CRTHSYNC
CRTVSYNC CRTVSYNC DDCCLK
CRT_R1 CRT_R1 CRT_G1
DDCDAT DDCDAT
C16
1000p/50V_4
V_BLIGHT
*1u/6.3V_4
CCD_PWR
TP_PWR TP_RST#
BL_ON
EDP_AUX_C EDP_AUX#_C
EDP_TXP1_C EDP_TXN1_C
EDP_TXP0_C EDP_TXN0_C
USBP6+_R USBP6-_RI2C1_SDA_C
EDP_TXP2_C EDP_TXN2_C
EDP_TXN3_C
TP_INT
R11129 *short_4
21
D23 *VPORT_6
LID#15
AL009132001 (default) AL008132004 AL008251000
3
Q21
3
1
OUT
IN
2
GND
AP2331SA-7
L7 BLM15BB220SN1D_6
L6 BLM15BB220SN1D_6
L5 BLM15BB220SN1D_6
C320
5.6p/16V_4
10
10
9
CRTVDD5CRTVDD5
9
7
7
6
DDCCLK
6
10
10
9
CRT_G1
9
7
7
6
CRT_B1CRT_B1
6
LID#15LID#
3
CRTVDD5
C319
*5.6p/16V_4
2
C304 *0.1u/16V_4
CRTVDD5
CRT_R1
CRT_G1
CRT_B1 CRTHSYNC
C333
C336
*5.6p/16V_4
*5.6p/16V_4
C305 *0.22u/6.3V_4
C300 *220p/50V_4
C301 0.1u/16V_4
*33P/50V_4
C716
*33P/50V_4
C718
C714 *10p/50V_4
C724 *10p/50V_4
6
7 2 8 3 9 4
10
5
1617
CRTVDD5
CRTVSYNC
CRTHSYNC
DDCCLK
DDCDAT
CN7
CRT CONN
LCD PowerLCD CONNECTOR
C41
1u/6.3V_4
+3V
R67 *short_4
R66 *short_4
EDP_VDD_EN_R
2
EDP_VDD_EN<2>
R37 *short_4
Touch screen level shift I2C(reserve)
S5
I2C1_SDA<4>
I2C1_SCL<4>
PCH_BLON<2>
PCH_BLON_R<31>
111
CRT_11
DDCDAT
CRTVSYNC
DDCCLK
TP75
DDCDAT <22>
DDCCLK <22>
+5V <22,24,26,27,29,33,40> +3V <2,4,6,7,8,9,12,13,14,16,22,24,25,26,27,28,29,31,33,34,35,36,37,40,41,42> VIN <26,27,32,33,34, 35,36,37,38,39,40,41,42>
12
13
14
15
2,nd
U1
6
IN
4
IN
3
ON/OFF
AP2821KTR-G1
R65
100K_4
2N7002DW
1
43
Q3
AL005245000
AL002821000
OUT
GND
GND
R9 *TSI@10K_4
R52
10K_4
BL#
5
4 3
+3V
R38
100K_4
R10 *TSI@0_4
Q2
6
2
5
*TSI@2N7002DW
R13 *TSI@0_4
PCH_BLON_C
1B-3 2013/12/10 change Q3.3 from +3V to +3VPCU.
1
DDCDAT DDCCLK
1
2
C33
5
*0.1u/16V_4
+3V
R12 *TSI@10K_4
+3V
2
I2C1_SDA_C
I2C1_SCL_C
R58
10K_4
6
1
S0
TPD->100kHz,TS=400Khz Intel design guide suggestion MCP PIN 10u. Per inch 3u TS=3x5inch 400kHz10~100u =2.4~0.4k. 100Khz 10~100u=9k~1k.
+3VPCU
BL_ON
2
Q4 DTC144EUA
1 3
Size Document Nu mber Rev
Size Document Nu mber Rev
Size Document Nu mber Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
CRTVDD5
R6202.2K_4 R6012.2K_4
LCDVCC
C35
C29
*2.2u/10V_8
R53 *100K_4
LID#
LID591#,EC intrnal PU
D1 1N4148WS
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
CRT/LVDS/CAMERA/LID
CRT/LVDS/CAMERA/LID
CRT/LVDS/CAMERA/LID
0.1u/16V_4
EC_FPBACK# <31>
1
C34
0.01u/50V_4
LID# <31>
ZAA
ZAA
ZAA
LCDVCC
C30
22u/6.3V_8
1A
1A
23 48Friday, February 05, 2016
23 48Friday, February 05, 2016
23 48Friday, February 05, 2016
1A
Page 24
5
Dr-Bios.com
D D
4
+3V
C4609
0.1U/16V_4_X7R
3
HDMI_MB_HPD HDMI_DDCDATA_MB
+3V
C4784
0.1U/16V_4_X7R
HDMI_EQ0 HDMI_EQ1HDMI_DDCCLK_MB
R11274 *10K_4
R11277 0_4
2
R11275 10K_4
R11276 *0_4
+3V+3V
1
24
23
22
21
20
HDMI_DDCDATA_SW<2>
HDMI_DDCCLK_SW<2>
INT_HDMITX0P<2> INT_HDMITX0N<2>
From PCH
C C
R322 2.2K_4
+3V
R319 2.2K_4
D31 RB501V-40
2 1
B B
A A
HDMI_5V
D30 RB501V-40
2 1
S5-input S0
INT_HDMI_HPD<2>
+3V <2,4,6,7,8,9,12,13,14,16,22,23,25,26,27,28,29,31,33,34,35,36,37,40,41,42> +5V <22,23,26,27,29,33,40> +1.5V <9,26,28,40>
INT_HDMITX1P<2> INT_HDMITX1N<2> INT_HDMITX2P<2> INT_HDMITX2N<2> INT_HDMICLK+<2> INT_HDMICLK-<2>
HDMI_DDCCLK_SW
HDMI_DDCDATA_SW
R722 *1M_4
1
R316 2.2K_4
R317 2.2K_4
+3V+3V
2
HDMI_DDCDATA_SW HDMI_DDCCLK_SW
INT_HDMITX1P INT_HDMITX1N INT_HDMITX2P INT_HDMITX2N INT_HDMICLK+ INT_HDMICLK-
HDMI_DDCCLK_MB
HDMI_DDCDATA_MB
C405 0.1u/16V_4 C398 0.1u/16V_4 C407 0.1u/16V_4 C406 0.1u/16V_4 C411 0.1u/16V_4 C408 0.1u/16V_4 C389 0.1u/16V_4 C387 0.1u/16V_4
INT_HDMITX0P_C_RINT_HDMITX0P
INT_HDMITX0N_C_RINT_HDMITX0N
INT_HDMITX1P_C_R
INT_HDMITX1N_C_R
INT_HDMITX2P_C_R INT_HDMITX2N_C_R INT_HDMICLK+_C_R
INT_HDMICLK-_C_R
C4783
0.1U/16V_4
GND
DDC_EN
SDA_SNK
HPD_SNK
TERM_EN
25
IN_D1-
26
IN_D1+
27
IN_D2-
28
IN_D2+
29
IN_D3-
30
IN_D3+
31
IN_D4-
32
IN_D4+
33
CEN_PAD
VDD1EQ12GND3REXT4HPD_SRC5SDA_SRC6SCL_SRC7EQ0
+3V
HDMI_EQ1
HDMI_MB_HPD_R
R11273 12.4K/F_4
EMI
3
Q41 *2N7002K
R718*short_4 D6
HDMI_MB_HPD_R
R11064 100K_4
INT_HDMITX2P_C
R315 *120/F_4
INT_HDMITX2N_C
INT_HDMITX1P_C
R314 *120/F_4
INT_HDMITX1N_C
INT_HDMITX0P_C
R312 *120/F_4
INT_HDMITX0N_C
INT_HDMICLK+_C
R303 *120/F_4
INT_HDMICLK-_C
5
4
U18
19
18
17
PTN3366BS
VDD
OE_N
SCL_SNK
HDMI_DDCCLK_SW
HDMI_DDCDATA_SW
8
HDMI_EQ0
OUT_D1-
OUT_D1+
OUT_D2-
OUT_D2+
OUT_D3-
OUT_D3+
OUT_D4-
OUT_D4+
GND GND GND GND
16 15 14 13 12 11 10 9
37 36 35 34
C4785
0.1U/16V_4_X7R
+3V
0.1U/16V_4_X7R
C4608
C4607
0.1U/16V_4_X7R
INT_HDMITX0P_C INT_HDMITX0N_C INT_HDMITX1P_C INT_HDMITX1N_C INT_HDMITX2P_C INT_HDMITX2N_C INT_HDMICLK+_C INT_HDMICLK-_C
0.1U/16V_4_X7R
C4786
C386
0.1U/16V_4_X7R
C413
0.1U/16V_4_X7R
C4787
0.1U/16V_4_X7R
HDMI connector
+5V
3
DDS AL002331000
3
Q26
IN
AP2331SA-7
GND
CN12
INT_HDMITX2P_C
INT_HDMITX2N_C INT_HDMITX1P_C
INT_HDMITX1N_C INT_HDMITX0P_C
INT_HDMITX0N_C INT_HDMICLK+_C
INT_HDMICLK-_C
HDMI_DDCCLK_MB
1
OUT
2
C383 *220p/50V_4
HDMI_MB_HPD
*AZ5125-01J
2
HDMI_DDCDATA_MB
HDMI_5V
R721 *short_4
12
R720 20K_4
HP_DET_CN
1
D2+
2
D2 Shield
3
D2-
4
D1+
5
D1 Shield
6
D1-
7
D0+
8
D0 Shield
9
D0-
10
CK+
11
CK Shield
12
CK-
13
CE Remote
14
NC
15
DDC CLK
16
DDC DATA
17
GND
18
+5V
19
HP DET
HDMI connector
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
20
SHELL1
23
GND
22
GND
21
SHELL2
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
HDMI (PTN3366BS)
HDMI (PTN3366BS)
HDMI (PTN3366BS)
1
ZAA
ZAA
ZAA
1A
1A
24 48Friday, February 05, 2016
24 48Friday, February 05, 2016
24 48Friday, February 05, 2016
1A
Page 25
5
Dr-Bios.com
LAN & Card reader Combo (LAN)
4
+3V <2,4,6,7,8,9,12,13,14,16,22,23,24,26,27,28,29,31,33,34,35,36,37,40,41,42> +3VPCU <6,9,11,23,26,27,28,29,31,32,33,40,41,42> +3V_S5 <2,3,4,6,7,8,9,11,21,27,28,29,31,33,35,36,41>
3
2
1
Card Reader (CRD)
Giga LAN (LAN)
LAN_XTALI
C460610p/50V_4
1
2
D D
C C
25MHZ
VDD10
VDD10
LANVCC
VDD10
LANVCC
+3V
Y1
MDI_0+ MDI_0-
MDI_1+ MDI_1­MDI_2+ MDI_2-
MDI_3+ MDI_3-
+3V3_SD_SW
4
3
LAN_XTAL2
R11264 2.49K/F _4
49
1 2 3 4 5 6 7 8
9 10 11 12
SP1 SP2 SP3 SP4 SP5 SP6
U15
E_PAD
MDIP0 MDIN0 AVDD10 MDIP1 MDIN1 MDIP2 MDIN2 AVDD10 MDIP3 MDIN3 HV_GIGA VDD3
RSET
10 mils
48
HV_GIGA
CARD_3V313SD_D114SD_D0/MS_D115SD_CLK/MS_D016SD_CMD/MS_D217SD_D3/MS_D318SD_D2/MS_CLK19VDDTX20HSIP21HSIN22REFCLK_P23REFCLK_N
47
46
RSET
LV_CEN
QFN48
TP44
44
43
42
MS_CD#
CKXTAL245CKXTAL1
41
SD_CD#
TP4335
40
LED0
C4603 *10P/50V_4
39
38
37
LED_CR
LED1/GPO
LANWAKEB
24
SP8
TP4333
C4604 *10P/50V_4
LED2
REG_OUT
ENSWREG
ISOLATEB PIN
PERSTBPIN
CLKREQBPIN
MS_BS/SD_WP#
EVDD10
PCIE_LAN_WAKE#_R
TP4336
TP4334
36 35
VDDREG
34 33
VDD1
32
VD33
31 30 29 28 27
DV33_18
26
HSON
25
HSOP
REGOUT
ENSWREG
ISOLATEB
PCIE_REQ_LAN#_R
VDD33/18
PCIE_RX5-_LAN_C PCIE_RX5+_LAN_C
VDDREG
R11258 *short_4
R11259 *short_4
SP7
C4602 0.1U/16V_4 C4601 0.1U/16V_4
CLK_PCIE_LANN <6> CLK_PCIE_LANP <6>
PCIE_TX5-_LAN <6> PCIE_TX5+_LAN <6>
R11266 *short_8
VDD10 LANVCC
LANVCC
PCIE_RX5-_LAN <6> PCIE_RX5+_LAN <6>
+3V
R11263 1K_4
R11262 15K_4
R11260 IOAC@0_4
R11261 NAC@0_4
IOAC_RST# <28,31>
PLTRST# <8,14,27,28,31>
R11254 *short_4
SP1
R11253 *short_4
SP2 SP3
R11255 *short_4C460510p/50V_4 R11136 *short_4
SP4
R11137 *short_4
SP5
R11138 *short_4 R11141*sh ort_4
SP6
R11139 *short_4
SP7
R11256 *short_4
SP8
Share Pin
SP1
SD_D1
SP2
SD_D0
SP3
SD_CLK
SP4
SD_CMD
SP5
SD_D3
SP6
SD_D2
SP7
SD_WP
SP8
SD_CD#
SP9
SP1=SD_D1
SP2=SD_D0=MS_D1
SP4=SD_CMD=MS_D2
SP5=SD_D3=MS_D3
SP6=SD_D2=MS_CLK
SP2=SD_D0=MS_D1
SP3=SD_CLK=MS_D0
SP4=SD_CMD=MS_D2
SP5=SD_D3=MS_D3
SP6=SD_D2=MS_CLK
SP7=SD_WP=MS_BS
MS_D1 MS_D0 MS_D2 MS_D3 MS_CLK MS_BS
MS_INS#
C4611 *10p/50V_4
C4612 *10p/50V_4
C4614 *10p/50V_4
C4613 *10p/50V_4
C4615 *10P/50V_4
SP1=SD_D1
+3V3_SD_SW
SP8=SD_CD#
SP7=SD_WP=MS_BS SP8=SD_CD# SP6=SD_D2=MS_CLK SP1=SD_D1 SP2=SD_D0=MS_D1
SP3=SD_CLK=MS_D0 +3V3_SD_SW
SP4=SD_CMD=MS_D2 SP5=SD_D3=MS_D3
EMI
reserve for EMI
C4618
4.7u/6.3V_4
SP3=SD_CLK=MS_D0
C4616
10P/50V_4
C4617
0.1u/16V_4
2'nd source
-->DFHS11FR170
CN4
11
WP
10
CD
9
DATA2
8
DATA1
7
DATA0
6
VSS2
5
SD_CLK_R
R6308 *2K/F_4
4 3 2 1
CLK VDD VSS1 CMD CD/DATA3
GND
GND12GND
13
16
NC
17
NC
GND
SD-CARD
14
15
LANVCC
40 mils (Iout=1A)
C370
Leakage circuit (MPC)
B B
CLK_PCIE_REQ4# have PU 10k.
CLK_PCIE_LAN_REQ#<6>
S0
PCIE_LAN_WAKE#<8,28>
IOAC_LAN_WAKE#<31>
Reserve IOAC No Stuff
+3VPCU
C4782
A A
*IOAC@0.1U/16V_4
LANPWR#<31>
1
R260 *IOAC@100K_4
R259 IOAC@10K_4
5
Q24 IOAC@AO3413
+3V
+3V
R281 *10K/F_4
2
3
Q25
2N7002K
R276 *0_4
EC_PCU LANVCC
R713 NAC@0_4
R715 IOAC@0_4
3
+3V_LAN
2
C368
*IOAC@1000p/50V_4
IOAC@0_8
3
Q39 IOAC@2N7002K
R709 NAC@0_4
R248
C366 10u/6.3V_6 C4600
+3V
1
2
R277 10K/F_4
MAIN POWER(3V_S0)
PCIE_REQ_LAN#_R
LANVCC
FAE suggest to change to 1K
R702 IOAC@1K_4
1
PCIE_LAN_WAKE#_R
LANVCC
+3V_S5
R247 NAC@2.2_8
C350
C367
0.1u/16V_4
C377
*0.1u/16V_4 C4599
*0.1u/16V_4
4
C354
0.1u/16V_4
0.1u/16V_4
For RTL8411B Place 0.1uF CAP close to each VDD33 pin-- 11, 32,48
RTL8411B (LDO mode)
REGOUT
40 mils (Iout=1A) 40 mils (Iout=1A)
R246
*short_8
C363
0.1u/16V_4
10 mils
VDD33/18
C4597
*4.7u/6.3V_4
Place close to pin 27
C361
C365
*4.7U/6.3V_4
0.1u/16V_4
close to each VDD10 pin-- 3, 8, 33, 46
C762
C4598
0.1U/16V_4
C760
0.1u/16V_4
VDD10
0.1u/16V_4
R11257
C757
0.1u/16V_4
*short_6
3
close to each VDD10 pin-- 20 (reserve)
C355
0.1u/16V_4
EVDD10
30 mils
C4596
1U/6.3V_4
Close to Pin20
C758 *1U/6.3V_4
C244
0.1U/16V_4
VDD10
C761 *0.1u/16V_4
VDDREG
Place connect to Pin35
40 mils
4.7U/6.3V_4
0.1U/16V_4
Tramsformer
DB0LL1LAN00 --> Main DB0Z06LAN00 --> 2'nd DB0X81LAN00 --> 2'nd
U42
1 2
MDI_3+
3
MDI_3-
4 5
MDI_2+
6
MDI_2-
7 8
MDI_1+
9
MDI_1-
10 11
MDI_0+
12
MDI_0-
C364
0.01U/50V_4
TCT1 TD1+ TD1-
TCT2 TD2+ TD2-
TCT3 TD3+ TD3-
TCT4 TD4+ TD4-
MCT1 MX1+ MX1-
MCT2 MX2+ MX2-
MCT3 MX3+ MX3-
MCT4 MX4+ MX4-
GND
TRANSFORMER
25
24
LAN_MCT0
23
LAN_MX3+
22
LAN_MX3-
21
LAN_MCT1
20
LAN_MX2+
19
LAN_MX2-
18
LAN_MCT2
17
LAN_MX1+
16
LAN_MX1-
15
LAN_MCT3
14
LAN_MX0+
13
LAN_MX0-
Layout:All termination signal should have 30 mil trace
4/20 REV:D add TP85 ~TP100 f or AZ chip ICT/ATE Capacitor test
2
RJ45 Connector
CN11
1
LAN_MX0+
0+
2
LAN_MX0-
0-
3
LAN_MX1+
1+
4
LAN_MX2+
2+
5
LAN_MX2-
2-
6
LAN_MX1-
1-
7
LAN_MX3+
3+
8
LAN_MX3-
R269 75/F_8
R262 75/F_8
R251 75/F_8
R11265 75/F_8
TERM9
C746 1000P/3KV_1808
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Friday, February 05, 2016
Date: Sheet of
Friday, February 05, 2016
Date: Sheet of
Friday, February 05, 2016
3-
RJ45
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
LAN_CRD_COMBO_RTL8411
LAN_CRD_COMBO_RTL8411
LAN_CRD_COMBO_RTL8411
1
10
11
12
9
9
10
11
12
ZAA
ZAA
ZAA
25 48
25 48
25 48
1A
1A
1A
Page 26
5
Dr-Bios.com
Codec(ADO)
D D
+1.5VA
C520
10u/6.3V_4
ADOGND
Place next to pin 40
Analog
Digital
L13
PVDD
PBY1608 08T-600 Y-N(60, 3A)
Close to Codec
C C
Tied at one point only under the codec or near the codec
R394 *0_4 R393 *0_4 R399 *0_4 R400 *0_4 R375 *0_4 R750 *short_4 C537 *1000p/50V_4
B B
C538 *0.1u/16V_4
ADOGND
Cap need near AVDD1 and AVDD2 power source input
C524
0.1u/16V_4
C510
10u/6.3V_4
C501
10u/6.3V_4
ADOGND
C529 10u/6.3V_4
C509
0.1u/16V_4
Low is power down amplifier output
C500
0.1u/16V_4
Rev:D change to shortpad
R367 *short_6
+3V
Rev:D change to shortpad
+5V_PVDD
L_SPK+
L_SPK-
R_SPK-
R_SPK+
PD#
TP34
+AZA_VDD
C485
0.1u/16V_4
DMIC_DAT_L
DMIC_CLK_L
Close to Codec
C52710u/6.3V_4
C5281U/6.3V_4
+AZA_VDD
35
36
CBN
CPVDD
37
CBP
38
AVSS2
39
LDO2-CAP
40
AVDD2
41
PVDD1
42
SPK-L+
43
SPK-L-
44
SPK-R-
45
SPK-R+
46
PVDD2
47
PDB
48
SPDIF-OUT
49
DGND
DVDD1GPIO0/DMIC-DATA2GPIO1/DMIC-CLK3DVSS4SDATA-OUT5BIT-CLK6LDO3-CAP7SDATA-IN8DVDD-IO9SYNC10RESETB11PCBEEP
DMIC_DAT
+AZA_VDD
C484 10u/6.3V_4
R371 *short_4
R370 22_4
C488 10p/50V_4
+3VPCU <6,9,11,23,25,27,28,29,31,32,33,40,41,42> +3V <2,4,6,7,8,9,12,13,14,16,22,23,24,25,27,28,29,31,33,34,35,36,37,40,41,42> +1.5V <9,28,40>
+5V <22,23,24,27,29,33,40>
Codec PWR 5V(ADO)
ANALOG DIGITAL
+5V
C525
A A
*0.1u/16V_4
C515
*10u/6.3V_6
L16 HCB2012KF220T60/6A/22ohm_8
U25
IN
GND
SHDN
*G923-330T1UF
4
OUT
5
SET
R395 *29.4K/F_4
R390 *10K/F_4
ADOGND
3
2
1
R401 *0_4
C730, C787 close U37 pin3 and L65
5
C523
*10u/6.3V_6
C5301U/6.3V_4
34
CPVEE
DMIC_CLK
+5VA
ADOGND
31
32
33
HP-OUT-L
HP-OUT-R
ALC255
R350 *short_4
DC-DET
C526
*0.1u/16V_4
4
HP-R2
HP-L2
LINE1-VREFO-L
LINE1-VREFO-R
MIC2-VREFO
CODEC_VREF
INT_AMIC-VREFO
Close to Codec
C535 2.2U/6.3V_4
C534 10u/6.3V_4
R397 100K_4
ADOGND
ADOGND
0.1u/16V_4
+5VA
C536
C532
10u/6.3V_4
Place next to pin 26
30
VREF
MIC2-VREFO
LINE1-VREFO-L
LINE1-VREFO-R
C481 10u/6.3V_4
ACZ_SDIN
U23
AVSS1
AVDD1
LDO1-CAP
LINE2-L
LINE2-R
LINE1-L
LINE1-R
NC
MIC-CAP
MIC2-R/SLEEVE
MIC2-L/RING2
MONO-OUT
SPDIFO/FRONT JD
MIC2/LIN2 JD
HP/LINE1 JD
12
PCBEEP
R359 33_4
C493 *22p/50V_4
24
23
22
LINE1-L
21
LINE1-R
20
R388 *short_6
analog digital
19
18
SLEEVE
17
RING2
16
15
14
13
1.6Vrms
C476 0.1u/16V_4
ADOGND
Rev:D change to shortpad
+3VPCU
C519 10u/6.3V_4
trace width of SLEEVE & RING2 are required at least 40mil and its length should be asshort as possible
Placement near Audio Codec
R383 200K_4
R378 100K_4
BEEP_1
R352 22K_4
C477 100p/50V_4
R354
10K_4
PCH_AZ_ CODEC _RST# <4>
PCH_AZ_ CODEC _SYNC <4>
DVDD_IO
PCH_AZ_ CODEC _SDIN 0 <4>
PCH_AZ_ CODEC _BITC LK <4>
PCH_AZ_ CODEC _SDOUT <4 >
25
26
27
28
29
Mute(ADO)
+AZA_VDD +1.5V
R372 1K_4
C494 *1u/10V_4
D15 *RB500V-40
D16 RB500V-40
R369 *10K_4
3
ADOGND
HP_JD#SENSEA
+3V
Analog
Digital
Change 47K to 22K for PCBEEP
D9 1N4148WS
D10 1N4148WS
CPU 3.3V
Rev:E change connect to +3V
R365 0_4
R366 *0_4
C489
C492
10u/6.3V_4
0.1u/16V_4
Place next to pin 9
2
3
Q29
*PJA138K
Far away rubber
+3V
C356 10u/6.3V_4 C353 0.1u/16V_4 C360 10p/50V_4
U17
1
VDD
2
LR
5
GND
6
GND
KMM40301026-18DS
Single DMIC
DUAL MAIN
Close to Codec
SPKR <4>
PCBEEP_E C <31>
+3V +1.5V
Rev:E change to 0402
1
PCH_AZ_ CODEC _RST#PD#
AMP_MUTE# <31>
2
DC-DET circuit(ADO)
DC-DET
D-Mic (MIC)
DATA
3
CLK
4
DMIC_DAT_L_R0
7
D2TVS/6pF_4
GND GND
12
8
C357*10p/50V_4
C374*10p/50V_4
D3TVS/6pF_4
12
R11186 *short_4
R11185 *short_4
R270
*0_4
R11181
*0_4
R344 *0_4
DMIC_CLK_LDMIC_CLK_L_R0
DMIC_DAT_L
R11047 *0_4
DMIC_CLK_L_R1
DMIC_DAT_L_R1
R11182 *0_4
DMIC_CLK_L2
DMIC_DAT_L2
+5V
R343 *100K_4
2
R11179 *0_4
R11180 *0_4
VIN
1 3
R345 *1M_6
Q27 *DTC144EU
+3V
+3V
+5V
C373 *10u/6.3V_4 C371 *0.1u/16V_4 C376 *10p/50V_4
1
2
5 6
*KBL17@KMM40301026-18DS
DUAL SECOND
DMIC_CLK_L1
DMIC_DAT_L1
C4734 *10u/6.3V_4 C4735 *0.1u/16V_4 C4733 *10p/50V_4
1
2
5 6
*KBL15@KMM40301026-18DS
DUAL SECOND
Single DMIC and Dual DIMC same PN: AL403010A00
2'nd -->AL403010000 (KMM40301026-18DZ)
Universal Audio Jack
MIC2-VREFO
HP-L2
HP-R2 HP-R3
LINE1-L
LINE1-VREFO-L
LINE1-VREFO-R
LINE1-R
SLEEVE
RING2
R407 2.2K_4
R424 2.2K_4
C552 4.7U/6.3V_4
R421 4.7K_4
R418 4.7K_4
C549 4.7U/6.3V_4
HEADPHONE/MIC/LINE combo (ADO)
R420& R422 change to 62 ohm -> 3/11
R408 *short_4
R425 *short_4
R422 62/F_4
R420 62/F_4
R423 *10K_4
Rev:D change to shortpad
R417 *10K_4
C547
100p/50V_4
ADOGND
C554
100p/50V_4
C553
100p/50V_4
C550
100p/50V_4
Codec PWR 1.5V(ADO)
1
Rev:D change to shortpad
R338 *short_6
3
1
DATA
DATA
PVDD
Q28 *AO3404
2
3
DMIC_CLK_L1
CLK
4
DMIC_DAT_L1
7
GND
8
GND
3
DMIC_CLK_L2
CLK
4
DMIC_DAT_L2
7
GND
8
GND
C456 *10u/6.3V_4
U16
VDD
LR
GND GND
U4512
VDD
LR
GND GND
SLEEVE_R
RING2_R
HP-L3
HP_JD#
To small/B
+1.5VA
D4*TVS/6pF_4
12
C379*10p/50V_4
C378*10p/50V_4
12
C4736*10p/50V_4
D4013*TVS/6pF_4
C4737*10p/50V_4
Combo Jack
SLEEVE_R <30>
RING2_R <30>
HP-R3 < 30>
D5*TVS/6pF_4
12
12
D4012*TVS/6pF_4
HP-L3 <30 >
HP_JD# <30>
ANALOG DIGITAL
4
Internal Speaker
40mil for each signal
R_SPK+
R419 *short_6
R_SPK-
R414 *short_6
L_SPK-
R406 *short_6
L_SPK+
R404 *short_6
Rev:D change to shortpad
4 ohm : 40mil for each signal
1003 change 0603type
C548
*68p/50V_4
C546
*68p/50V_4
C551
*68p/50V_4
R_SPK+_1 R_SPK-_1 L_SPK-_1 L_SPK+_1
C545
*68p/50V_4
1B-2 2013/12/04 Change PN and footprint.
1B-5 2013/12/17 Change CN14 pin define
3
SPK_CONN_4P
1 2 345
CN18
+1.5V
1U/6.3V_4
6
2
C541
L18 HCB1608KF-121T30_3A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Friday, February 05, 2016
Date: Sheet of
Friday, February 05, 2016
Date: Sheet of
Friday, February 05, 2016
PROJECT :
ALC255/HP/SPK
ALC255/HP/SPK
ALC255/HP/SPK
1
ZAA
ZAA
ZAA
4826
4826
4826
1A
1A
1A
Page 27
5
Dr-Bios.com
+5V <22,23,24,26,29,33,40>
2.5" SATA HDD (HDD) SATA ODD Connector
CN14
23
GND23
1
GND1
2
RXP RXN
GND2
TXN TXP
D D
GND3
3.3V
3.3V
3.3V GND GND GND
GND
RSVD
GND
GND24
HDD_CONN(on board)
5V 5V 5V
12V 12V 12V
SATA_TXP0_C
3
SATA_TXN0_C
4 5
SATA_RXN0_C
6
SATA_RXP0_C
7
8 9 10 11 12 13 14 15 16 17 18 19 20 21 22
24
DEVSLP0_R DEVSLP0
+5V_HDD
C522 0.01u/50V_4 C513 0.01u/50V_4
C507 0.01u/50V_4 C504 0.01u/50V_4
R351 *0_4
60mil
0.01u/50V_4
R326 *0_4
C437
0.01u/50V_4
ACCEL_ INT2
+3VPCU <6,9,11,23,25,26,28,29,31,32,33,40,41,42>
SATA_TXP0 <6 > SATA_TXN0 <6>
SATA_RXN0 <6> SATA_RXP0 <6>
DEVSLP0 <6>
1B-4
C435
C436
*0.1u/16V_4
C453
*0.1u/16V_4
ACCEL_ INT2 <29 >
C438
10u/6.3V_6
4
R339 *short_8
C457
+
*100u/6.3V_3528
3
CN9
14
GND14
1
GND1
2
RXP RXN
GND2
TXN
TXP
+5V
GND3
DP +5V +5V
RSVD
GND GND
GND15
C185Q2-11311-L
SATA_TXP1_C
3
SATA_TXN1_C
4 5
SATA_RXN1_C
6
SATA_RXP1_C
7
8
ODD_PRSNT#_ C
9 10 11 12 13
15
SSD_ID <6>
C726
0.01u/50V_4
R209 10K_4
C751 0.01u/50V_4 C749 0.01u/50V_4
C744 0.01u/50V_4 C743 0.01u/50V_4
R216 10K_4
C330 *15p/50V_4
C721
C733
0.01u/50V_4
*0.1u/16V_4
EC_ODD_EJ# <31>
+3V
SATA_TXP1 <6> SATA_TXN1 <6>
SATA_RXN1 <6> SATA_RXP1 <6>
R217 33_4
Prevent ESD/EOS Layout near device
+3V
C730
*0.1u/16V_4
+5VODD
C737
10u/6.3V_6
1A-8
2
+3V <2,4,6,7,8,9,12,13,14,16,22,23,24,25,26,28,29,31,33,34,35,36,3 7,40,41,42>
+3V_S5 <2,3,4,6,7,8,9,11,21,25,28,29,31,33,35,36,41>
+3V_LDO_EC <7,31,33>
C802 180P/50V_4
R657 *short_8
+
C740
*100u/6.3V_3528
ODD_PRSNT# <4>
+5V_ODD
1
Connect to G-sensor INT2
ODD Power (SATA)
C C
Reserve IOAC Power No Stuff
ODD_POWER<31>
PCH_ODD_EN<2>
B B
R704 IOAC@0_4
R703 *IOAC@0_4
12
ODD_EN
R692 *IOAC@100K
+3VPCU
12
R695 IOAC@1 00K
5
4 3
ODD_EN_Q
2
VIN
6
1
TPM NPCT650 (TPM)
+3V_S5
R745 *short_6
TPM@10u/6.3V_6C776 TPM@0.1u/16V_4C775 TPM@0.1u/16V_4C774 TPM@0.1u/16V_4C768
LPCPD
+3V3_TPM
15 18 21 24 20 27 19
13 17 28
26 31
LPC_LAD3<7,28,31> LPC_LAD2<7,28,31> LPC_LAD1<7,28,31> LPC_LAD0<7,28,31>
LPC_LFRAME#<7,28,31>
IRQ_S ERIRQ<7,31>
PCLK_TPM<7>
CLKRUN#<7,31> PLTRST#<8,14,25,28,31>
A A
3/4 EMI request add 33p near TPM IC
C807
CLKRUN#
TPM@33P/50V_4
PLTRST#
5
R743 *short_4 R742 *short_4
LPCPD
R744 *TPM@4.7K_4
LPC_LAD3 LPC_LAD2 LPC_LAD1 LPC_LAD0 LPC_LFRAME# IRQ_S ERIRQ PCLK_TPM
TPM_CLKRUN#CLKRUN# TPM_LRESET#
+5V
R686
12
IOAC@1 00K
IOAC@2 N700 2DW Q37
+3V3_TPM
22
U44
LAD3 LAD2/SPI_IRQ LAD1/MOSI LAD0/MISO LFRAME/SCS SERIRQ LCLK/SCLK
CLKRUN/GPIO04 LRESET/SPI_RST LPCPD
NC7 NC8
33
Q34 IOAC@A O6402 A
6 5 2 1
3
12
+3V3_TPM_VSB
8
14
VDD3
VDD1
VDD2
GND2
GND19GND323GND4
B.M.
16
MOD_EN_5V
1
GPIO0/XOR_OUT
32
4
ODD_EN_Q
C752 IOAC@0 .1u/ 25V_4
R725 *short_6
VSB
GPIO3/BADD
TPM@NPCT620/650_QFN32
GPX/GPIO2
GPIO1
TEST
NC1 NC2 NC3 NC4 NC5 NC6
4
TPM@10u/6.3V_6C767 TPM@0.1u/16V_4C766
PP
IOAC@D MN60 1K-7
4 3 30
29 6 5
2 7 10 11 12 25
+5V_ODD
R672 NAC@0_8
R673 IOAC@2 2_8
3
2
Q36
1
+3V_S5
TPM_PP GPX
TPM_BADD
BADD SELECTION
'1' - pin is left open. '0' - pin is pulled down.
R729 *TPM@10K_4
01EEh - EFh
7Eh - 7Fh
TP4358 TP4359 TP4360
TP4361
+5V
ZAA
ZAA
ZAA
POA_PWR
1A
1A
27 48Friday, February 05, 2016
27 48Friday, February 05, 2016
27 48Friday, February 05, 2016
1A
POA(FPD) for Intel Base plateform
SEL OE# Y+ Y-
H
XHi-ZHi-Z
M+ M-L
L
H
L
POA_FP_PWREN#<31>
USBP8+<6>
USBP8-<6>
+3VPCU
R2870 *short_4
*FPD_SP@0.01u/50V_4
USBP8+ USBP8- USBP8-_PI3
C3007
C3008
*FPD_SP@0.1U/16V/X7R_4
MAINON<8,31>
3
Spec define: High Active but USBON# is Low Active
D-D+
R2854
FPD@10K_4
Co-layout
R11290 *FPD_SP@0_4 R11291 *FPD_SP@0_4
R11298 FPD_SP@0_4 R11299 FPD_SP@0_4
USBP8+_PI3 USBP8-_PI3
R2868 *FPD_SP@10_4
USBP8+_PI3
USBP8+_R_COM USBP8-_R_COM
USBP8+_R_PI3 USBP8-_R_PI3
USBP8+_R_COM USBP8-_R_COM
POA_PWR
2
C4819
*1000p/50V_4
U1006
1
Y+
2 3 9
M-
Y-
M+
GND
D-
D+
VCC SEL10OE#
*FPD_SP@PI3USB102
R11302 *FPD_SP@0_4 R11303 *FPD_SP@0_4
R11300 FPD_SP@0_4 R11301 FPD_SP@0_4
Co-layout
C3001 *FPD@2.2u/16V_6
1
Q75 FPD@AO3413
3
20mil 20mil
C3000
FPD@4.7u/6.3V_4
4 5 6 7 8
2
V_POA_Q
C3002
FPD@0.01u/50V_4
POA_EN#<31> POA_PWR_INT#<31> POA_AUTH_ERR<31> POA_POWERREQ<31>
TP4396 TP4397
R2872 *short_4
R11296 *FPD_SP@0_4
USBP8-_R_PI3
USBP8+_R_PI3
R2855 *short_4
USBP8+_R USBP8-_R
+3V
+3VPCU
+3V_LDO_EC
USBP8+_R USBP8-_R
R11292 FPD_SP@0_4 R11293 FPD_SP@0_4 R11294 FPD_SP@0_4 R11295 FPD_SP@0_4
USBP8+_R USBP8-_R
EC52
*AZ5725-01F
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
R11297 *FPD_SP@0_4
R11289 *FPD_SP@0_4
R11287 FPD_SP@0_4
CN95
V_POA_R
EC53
*AZ5725-01F
HDD/ODD/TPM NPCT650
HDD/ODD/TPM NPCT650
HDD/ODD/TPM NPCT650
10 219 3 4 5 6 7 8
FPD@CONN_AOP
EMI
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
1
Page 28
5
Dr-Bios.com
4
3
2
1
NGFF_M.2 WiFi & BT (NGF)
CN10
NGFF
1
GND
USBP4+
USBP4+<6>
USBP4-
USBP4-<6>
D D
PCIE_TX6+_WLAN<6> PCIE_TX6-_WLAN<6>
PCIE_RX6+_WLAN<6> PCIE_RX6-_WLAN<6>
CLK_PCIE_WLANP<6>
CLK_PCIE_WLANN<6>
CLK_PCI_LPC<7>
LPC_LFRAME#<7,27,31>
PCIE_TX6+_WLAN PCIE_TX6-_WLAN
PCIE_RX6+_WLAN PCIE_RX6-_WLAN
CLK_PCIE_WLANP CLK_PCIE_WLANN
CLK_PCI_LPC LPC_LFRAME#
WLAN_CLKREQ# WLAN_WAKE_R#
R694 *0_4 R699 *0_4
CLK_PCI_LPC_C LPC_LFRAME#_C
For Debud Card use
C C
3
USB_D+
5
USB_D-
7
GND
9
SDIO CLK(O)
11
SDIO CMDIO)
13
SDIO DAT0(IO)
15
SDIO DAT1(IO)
17
SDIO DAT2(IO)
19
SDIO DAT3(IO)
21
SDIO Wake(I)
23
SDIO Reset
25
KEY1
27
KEY2
29
KEY3
31
KEY4
33
GND
35
PETp0
37
PETn0
39
GND
41
PERp0
43
PERn0
45
GND
47
REFCLKP0
49
REFCLKN0
51
GND
53
CLKREQ0#
55
PEWake0#
57
GND
59
PETp1
61
PETn1
63
GND
65
PERp1
67
PERn1
69
GND
71
Reserved1
73
Reserved2
75
GND
WLAN_NGFF CONN
3.3Vaux
3.3Vaux LED#1
PCM_CLK
PCM_SYNC
PCM_IN
PCM_OUT
LED#2
UART Wake
UART Rx
Key 5 Key 6 Key 7 Key 8
UART Tx UART CTS UART RTS
Clink RESET
CLink DATA
CLink CLK
COEX3 COEX2 COEX1
SUSCLK(32KHz)
PERST0# W_DISABLE#2 W_DISABLE#1
NFC I2C SM DATA
NFC I2C SM CLK
NFC I2C IRQ
NFC Reset# RESERVED3 RESERVED4 RESERVED5
3.3Vaux
3.3Vaux
GND
+WL_VDD+WL_VDD
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42
WIFI_SUSCLK
44 46 48 50 52
WLAN_RST#
54
BT_EN
56
RF_EN
58 60 62 64
LPC_LAD0_C
66
LPC_LAD1_C
68
LPC_LAD2_C
70
LPC_LAD3_C
72
+WL_VDD
74
10u/6.3V_6C340
0.1u/16V_4C755
0.1u/16V_4C753
0.1u/16V_4C735
APU Internal PU
0.1u/16V_4C731
APU External nu-PU
WLAN_CLKREQ#
S0
IOAC
WLAN_WAKE_R#
S0
BT_EN <31> RF_EN <31>
IOAC No Stuf f
PLTRST#
LPC_LAD0 LPC_LAD1 LPC_LAD2 LPC_LAD3
C821 180P/50V_4
R680 IOAC@0_4 R671 NAC@0_4
R688 *sh ort_4 R690 *sh ort_4 R693 *sh ort_4 R696 *sh ort_4
Rev:D change to shortpad
Leakage circuit (MPC)
+3V
R245
R242
4.7K_4
LPC_LAD0 <7,27,31> LPC_LAD1 <7,27,31> LPC_LAD2 <7,27,31> LPC_LAD3 <7,27,31>
2N7002DW
4.7K_4
4 3
1
R243 *0_4 R253 *0_4
IOAC_RS T# <25,31> PLTRST# <8,14,25,27,31>
+WL_VDD+WL_VDD
+3V
R241
5
2
6
Q23
*10K_4
WIFI card reset (IOAC) WIFI card reset (non-IOAC)
IOAC
EC_PCU
R244
*0_4
S0
PCIE_CLKREQ_WLAN# <6>
IOAC_W LAN_ WAK E# <31>
PCIE_LAN_WAKE# <8,25>
S0
Reserve only for Intel module no need to stuff by default 11/24
R716 **10 K_4
+3V_S5
SUSCLK<6>
SUSCLK
U43
NC1VCC
2
A
GND3Y
*74AUP1G07GW
Mini card +3V power enable
Low
Mini card +3V power disable
High
+3V_S5
5
C763
*0.1u/16V_4
4
C338 **0.1u/16V_4
Q22 IOAC@AO3413
1
2
Q38 *IOAC@AO341 3
1
2
Stuff
R237 NAC@0_8
C339 **0.1u/16V_4
3
+3V_WLAN
C344
*IOAC@1000p/50V_4
3
+3V_WLAN
C756
**IOAC@1000p/50V_4
+3V
+WL_VDD
R221
*short_8
+WL_VDD
C347
C346
*10u/6.3V_6
*0.1u/16V_4
+3VPCU
C345
R231
*IOAC@100K_4
R230
IOAC@10 K_4
WLANPWR#<31>
*IOAC@0.1U/16V_4
WLANPWR#
Reserve IOAC No Stuff
+WL_VDD
12
R714 *10K_4
WIFI_SUSCLK
Reserver +1.5v for WIFI module
+1.5V
C759
**IOAC@0.1U/16V_4
WLANPWR#
R712
**IOAC@100K_4
R710
*IOAC@10K_4
No Stu ff
+
10u/6.3V_6C1165
0.1u/10V_4C1166
0.1u/10V_4C1167
0.1u/10V_4C1168
0.1u/10V_4C1169
NGFF_SSD_CLK#<6>
NGFF_SSD_CLK<6>
NGFF_SATA_DET<6>
+3V3_SATA_N1 +3V
R948
*short_8
R959 *short_4 R958 *short_4
R11061 *short_4 R11062 *short_4
5
C1162 *150u/6.3V_3528
SATA_RXN3/PEG_RXN9_L0<6> SATA_RXP3/PEG_RXP9_L0<6>
SATA_TXN3/PEG_TXN9_L0<6>
SATA_TXP3/PEG_TXP9_L0<6>
SATA_RXP3/PEG_RXP10_L1<6>
SATA_RXN3/PEG_RXN10_L1<6>
SATA_TXN3/PEG_TXN10_L1<6>
B B
A A
SATA_TXP3/PEG_TXP10_L1<6>
10u/6.3V_6C1163
0.1u/10V_4C1164
SATA_RXN3/PEG_RXN9_L0_N SATA_RXP3/PEG_RXP9_L0_N
SATA_TXN3/PEG_TXN9_L0_N
0.1u/10V_4C1176
SATA_TXP3/PEG_TXP9_L0_N
0.1u/10V_4C1177 R956 *sh ort_4
SATA_RXP3/PEG_RXP10_L1_N SATA_RXN3/PEG_RXN10_L1_N
SATA_TXN3/PEG_TXN10_L1_N
0.1u/10V_4C4664
SATA_TXP3/PEG_TXP10_L1_N
0.1u/10V_4C4665
R961 1M_4
NGFF3_PEDET

+3V
R968
*0_4

R11284 10K_4
3
Q59
2
2N7002K
1
14” DFHS75FR307 ( TH=5.0 a-test) 15”/ 17” DFHS75FR299 ( TH=4.8 a-test)
CN23
1
GND
3
GND
5
PERn3
7
PERp3
9
GND
11
PETn3
13
PETp3/NOTCH
15
GND/NOTCH
17
PERn2/NOTCH
19
PERp2/NOTCH
21
GND/CONFIG_0
23
PETn2
25
PETp2
27
GND
29
PERn1
31
PERp1
33
GND
35
PETn1
37
PETp1
39
GND
41
PERn0/SATA-B+
43
PERp0/SATA-B-
45
GND
47
PETn0/SATA-A-
49
PETp0/SATA-A+
51
GND
53
REFCLKn
55
REFCLKp
57
GND
59
NOTCH
61
NOTCH
63
NOTCH
65
NOTCH
67
NC
69
PEDET
71
GND
73
GND
75
GND
NGFF
SUSCLK(32KHz)
GND76GND
3.3V
3.3V
DAS NOTCH/3.3V NOTCH/3.3V NOTCH/3.3V NOTCH/3.3V
DEVSLP
PERST#
CLKREQ#
PEWake#
NOTCH NOTCH NOTCH NOTCH
3.3V
3.3V
3.3V
SSD@SSD_NGFF_CONN
77
4
+3V3_SATA_N1
2 4
6
NC NC
NC NC NC NC NC NC NC NC NC
NC NC NC NC NC
N/C N/C
+3V3_SATA_N1_N +3V3_SATA_N1
8
10
TP108
12
14
16
18
20
22
24
26
28
30
32
34
36
38
DEVSLP_N1
40
42
44
46
48
50
NGFF1_RST#_SSD PLTRST#
52
PCIE_CLKREQ_NGFF_SSD#_R
54
56
58
60
62
64
+3V3_SATA_N1
66
68
70
72
74
TP109 TP150
R951
R957 *10K _4
*short_8
R960 *short_4 R11110 *s hort_4
SATA_DEVSLP2 <6>
PCIE_CLKREQ_NGFF_SSD# <6>
HOLE1
*HG-C354D134P2
67 5
8
4
9
123
HOLE6
*o-zab-2
6 5 4
123
HOLE25 *H-C217D217N
1
PAD1 *SPAD-ZAB-1NP
1
PAD2 *SPAD-ZAB-2NP
1
HOLE2
*HG-C354D134P2
67 5
8
4
9
123
HOLE7
*hg-tc354ic236bc236d118p2
8 9
123
HOLE16 H-TC217IC197BC197D126P2
1
3
67 5 4
PAD3 *SPAD-RE157X488NP
1
HOLE3
*HG-C354D134P2
8 9
123
HOLE8 H-C236I156D140P2
HOLE17
*hg-zab-2
8 9
PAD4 *SPAD-RE157X1282NP
67 5 4
1
123
1
GPU
67 5 4
K/B
HOLE4
*HG-C354D134P2
8 9
123
HOLE9 H-C236D140P2
1
HOLE18
*hg-zab-2
8 9
123
+3V <2,4,6,7,8,9,12,13,14,16,22,23,24,25,26,27,29,31,33,34,35,36,37,40,41,42> +3VPCU <6,9,11,23,25,26,27,29,31,32,33,40,41,42>
+3V_S5 <2,3,4,6,7,8,9,11,21,25,27,29,31,33,35,36,41> +1.5V <9,26,40>
PAD5 *SPAD-ZAB-3NP
1
67 5 4
67 5 4
PAD6 *SPAD-C298NP
1
PAD12 *SPAD-RE157X315NP
1
HOLE10 *H-TC236IC236BC256D161P2
1
HOLE20
HOLE19
*H-C87D87N
*H-ZAB-5
1
2
PAD8 *SPAD-C298NP
1
PAD13 *SPAD-C197NP
1
HOLE11 *H-TC236IC236BC256D161P2
1
HOLE21 *H-O146X87D146X87N
1
PAD7 *spad-re157x491np
1
1
PAD14 *o-zab-1
HOLE12 *H-TC236IC236BC256D161P2
HOLE22 *O-ZAA-1
PAD10 *SPAD-RE157X1267NP
1
1
1
PAD9 *SPAD-C276NP
1
HOLE23
*HG-C315D134P2
8 9
123
HOLE13 H-C256D161P2
PAD11 *SPAD-RE531X205NP
1
67 5 4
HOLE14 H-C256D161P2
1
1
M.2
1
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
Mini-Card/WL/3G/SIM
Mini-Card/WL/3G/SIM
Mini-Card/WL/3G/SIM
1
HOLE24
*HG-C315D134P2
8 9
123
HOLE15 H-C256D161P2
1
ZAA
ZAA
ZAA
28 48Friday, February 05, 201 6
28 48Friday, February 05, 201 6
28 48Friday, February 05, 201 6
67 5 4
1A
1A
1A
Page 29
5
Dr-Bios.com
KEYBOARD (KBC)
CN20
1
MX0
2
MX1
3
MX2
4
MX3
5
MX4
6
MX5
7
MX6
8
MX7
KBL15@KB_CONN
For 15"
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28
29 30
*VPORT_6
D34
D D
C C
MY17 MY16 MY15 MY14 MY13 MY12 MY11 MY10 MY9 MY8 MY7 MY6 MY5 MY4 MY3 MY2 MY1 MY0
2 1
MX0 <31> MX1 <31> MX2 <31> MX3 <31> MX4 <31> MX5 <31> MX6 <31>
MX7 <31> MY17 <31> MY16 <31> MY15 <31> MY14 <31> MY13 <31> MY12 <31> MY11 <31> MY10 <31> MY9 <31> MY8 <31> MY7 <31> MY6 <31> MY5 <31> MY4 <31> MY3 <31> MY2 <31> MY1 <31> MY0 <31>
R776 33_4
<EMI>
MX4 MX5 MX6 MX7 MY3 MY2 MY1 MY0 MY7 MY6 MY5 MY4 MY11 MY10 MY9 MY8 MX0 MX1 MX2 MX3 MY15 MY14 MY13 MY12
NBSWON#
C805 180P/50V_4
Prevent ESD/EOS Layout near device
C4788 *220p/50V_4 C4789 *220p/50V_4 C4790 *220p/50V_4 C4791 *220p/50V_4 C4792 *220p/50V_4 C4793 *220p/50V_4 C4794 *220p/50V_4 C4795 *220p/50V_4 C4796 *220p/50V_4 C4797 *220p/50V_4 C4798 *220p/50V_4 C4799 *220p/50V_4 C4800 *220p/50V_4 C4801 *220p/50V_4 C4802 *220p/50V_4 C4803 *220p/50V_4 C4804 *220p/50V_4 C4805 *220p/50V_4 C4806 *220p/50V_4 C4807 *220p/50V_4 C4808 *220p/50V_4 C4809 *220p/50V_4 C4810 *220p/50V_4 C4811 *220p/50V_4
NBSWON# < 11,31>
+3VPCU
RP1 *10K_10 P8R
10
9
MX4
8
MX6
7 4
MX5 MX7
1
MX3
2 3
MX2 MX0
56
MX1
KB_BL LED (KBC)
+5V+5V
R148
KBL@10K_4
KB_BL_LED<31>
B B
G-sensor(ACS)
to CPU to SATA HDD
A A
C425 *22P/50V_4
2
Q19
KBL@DTC144EU
1 3
R318 *short_6
+3V
ACCEL_INTA<4> ACCEL_INT2<27>
CLK_SDATA<7,12,13,22> CLK_SCLK<7,12,13,22>
+G_SEN_PW G_MBDATA_R
5
+G_SEN_PW
R334 *4.7K_4 R333 *4.7K_4
C187 KBL@2.2u/6.3V_4
1
Q18 KBL@AO3413
2
20mil 20mil
3
+5V_KB +5V_KB_R
C169
KBL@4.7u/6.3V_4
C428 GS@0.1U/16V_4
CLK_SDATA CLK_SCLK
+G_SEN_PWACCEL_INTA
G_MBDATA_R
G_MBCLK_R
R336 *short_4 R329 *short_4
R119 *short_4
C170
KBL@0.01u/50V_4
+G_SEN_PW
C412
GS@10u/6.3V_6
D8GS@RB500V-40 D35GS@RB500V-40
R337 *short_4
C454 *33P/50V_4
C431 *33P/50V_4
G_MBCLK_R
ACCEL_INTA_R ACCEL_INT2_R
G_MBDATA_R G_MBCLK_R
4
For 17"
CN2019
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28
29 30
KBL17@KB_CONN
*VPORT_6
U19
1
Vdd_IO
14
VDD
11
INT1
9
INT2
7
SA0
6
SDA
4
SCL
8
CS
GS@LIS3DHTR
4
MX0 MX1 MX2 MX3 MX4 MX5 MX6
MX7 MY17 MY16 MY15 MY14 MY13 MY12 MY11 MY10 MY9 MY8 MY7 MY6 MY5 MY4 MY3 MY2 MY1 MY0
R11107 33_4
D4002
2 1
For 17"+ 15"
KBL@KB_backlight
NC
NC
RESERVED RESERVED
GND GND GND GND
CN6
346 2 1
3
2014/01/13 Change TP power rail from +3V_S5
TOUCHPAD BOARD CONN (TPD I2C/PS2 co-lay)
TPD->100kHz,TS=400Khz Intel design guide suggestion MCP PIN 10u. Per inch 3u TS=3x5inch 400kHz10~100u =2.4~0.4k. 100Khz 10~100u=9k~1k.
R405 *short_4
*TDI@2N7002DW
S5 S5
I2C0_SDA<4> I2C0_SCL<4>
NBSWON#
CPU FAN (THM)
Prevent ESD/EOS Layout near device
SMB1ALERT#<7>
5
1
4 3
Q43
R403 *short_4
+3V_S5
FAN1_DAC<31>
POWER LED(UIF)
R402 *short_4
+3V_S5
TPCLK<31>
TPDATA<31>
6
2
5
+3V
R218
*10K_4
R436 *1M_4
R426 *1M_4
R427 *1M_4
R416
10K_4
I2C_TP_SDA_R I2C_TP_SCL_R
+5V
C321
2.2U/6.3V_4
1 2
FANPWR = 1.6*VSET
Power LED
2 3
10 15
5 12 13 16
PWRLED#<31>
SUSLED#<31>
Battery
BATLED0#<31>
BATLED1#<31>
3
R432 71.5/F_4
R433 130/F_4
Rev:E change
R428 *1M_4
R429 *1M_4
R430 71.5/F_4
R431 130/F_4
Rev:E change
1C-2
to +3V_SUS.
+3V_S5
R415
10K_4
R411 *short_4 R412 *short_4
R409*2.2K_4
R410*2.2K_4
U12
3
VIN2VO
5
GND
1
4
+3VPCU
+3V
+3VPCU
1 2
D26 *5.5 V/25V/410P_4
2 3
1
LED_AMBER/BLUE
1 2
D27 *5.5 V/25V/410P_4
+3VPCU
1 2
D24 *5.5 V/25V/410P_4
2 3
1
LED_AMBER/BLUE
D25 *5.5V/25V/410 P_4
6
/FON
GND
7
GND
8
VSET
GND
APL5606AKI
AL005606002
)KIR :5T8%30@%&=,:586E)58%%%UV%8B5A%"RW%;%
#@XRF%%57,%30@%&=557,6E)58%%%UV%8B5A%"RW%;%
Blue
LED1
Amber
Blue
LED2
Amber
1 2
2
L19 *short_6
PTP_PWR_EN#<31>
+TPVDD
C787
*0.1u/16V_4
I2C PU at CPU side
TPD_INT#<4,31>
FAN1_RPM<31>
TH_FAN_POW ERTH_ FAN_POWER
C723
2.2U/6.3V_4
1 2
R438 *short_4
R440 *0_4
R437 *short_4
R439 *0_4
2
C728
.01U/50V_4
+3VPCU
+3V_S5
2014/01/15 reserve TP power rail +3V_S5.1C-4
R752 0_6
1
C781
0.1u/16V_4
R754 *0_4
C788
*0.1u/16V_4
+3V
30mils
C719
*.01U/50V_4
+3VPCU <6,9,11,23,25,26,27,28,31,32,33,40,41,42> +3V_S5 <2,3,4,6,7,8,9,11,21,25,27,28,31,33,35,36,41> +5V <22,23,24,26,27,33,40> +3V <2,4,6,7,8,9,12,13,14,16,22,23,24,25,26,27,28,31,33,34,35,36,37,40,41,42>
+3VPCU
+3V_S5
1C1-1 2014/02/17 Add Q47 for PTP
power EN and soft up R694\C713.
*AO3413
Q42
2
C786 *1000p/50V_4
1A-12
R609
10K_4
+3VPCU
and C712\C686.
3
+
C783
C790
0.22u/10V_4
TPD_EN<31>
1A-5
2013/10/29 Change CN21 power rail to S5 change Q42 direction and net name, reseve PS2 PU to +3V.
CN8
1 2 3
FAN_3P
C555
39P/50V_4
for ESD
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
0.1u/16V_4
50mil
TPCLK_R TPDATA_R
I2C_TP_SDA_R I2C_TP_SCL_R TPD_INT# TPD_EN
2013/10/18 Change CN21 Pin8 for I2C/PS2 TPD idendify.
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
KB/TP/FAN
KB/TP/FAN
KB/TP/FAN
+TPVDD
1
CN17
8 7 6 5 4 3 219
10
TP_CONN
ZAA
ZAA
ZAA
1A
1A
29 48Friday, February 05, 2016
29 48Friday, February 05, 2016
1
29 48Friday, February 05, 2016
1A
Page 30
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Dr-Bios.com
USB Charger to 3.0 (UBC)
+5VPCU
80 mils (Iout=2A)
C483
1U/10V_4
USB_OC0#<6>
USB_BC_ON<31>
D D
GMT:AL003703000(G3703) TI:AL002544001(TPS2544) Silergy: AL055544000 (SLGC55544VTR)
USB_CHARGE_ON<31>
USB_CLT1<31>
+5VPCU
R364 100K_4
R360 10K_4 R356 10K_4
CTL2 CTL3
U22
1
IN
9
STATUS
13
FAULT
4
ILIM_SEL
5
EN
6
CTL1
7
CTL2 CTL38DP_OUT
TPS2544RTER
ILIM_LO
ILIM_HI
GND_PAD GND_PAD GND_PAD GND_PAD GND_PAD GND_PAD GND_PAD
DM_IN DP_IN
DM_OUT
OUT
12 15
ILIM_LO
16
ILIM_HI
17 14 18 19 20 21 22
11
USBP0-_C
10
USBP0+_C
2 3
4
(RILIM_LO 1.2A)
(RILIM_HI 2.3A)
iPAD charging current is about 2.1A so set on 2.3A
1.2A current limit of USB 3.0 SDP mode
USBP0- <6> USBP0+ <6>
+5VPCU <27,33,34,40,42> +5V_S5 <21,33,36,37,38,39,41> +3V <2,4,6,7,8,9,12,13,14,16,22,23,24,25,26,27,28,29,31,33,34,35,36,37,40,41,42>
80 mils (Iout=2A)
R377 20K/F_4
R376 39K/F_4
USBPWR0
+
C487 100u/6.3V_1206
C497 470P/50V_4
3
C496
0.1u/16V_4
2
1
CTL1 CTL2 CTL3 ILIM_SEL
SDP 1 1 1 0
CDP 1 1 1 1
DCP 0 1 1 X
RILIM_LO is optional and the ILIM_LO pin may be left unconnected if the following conditions are met:
1. ILIM_SEL is always set high
2. Load Detection - Port Power Management is not used
3. Mouse / Keyboard wake function is not used If conditions 1 and 2 are met but the mouse / keyboard wake function is also desired, it is recommended to use RILIM_LO < 80.6 kΩ. The following equation programs the typical current limit: (1) RILIM_XX corresponds to either RILIM_HI or RILIM_LO as appropriate.
IOS_typ(mA) = 50,250/{RILIM_XX(KΩ)+0.1}
USB 3.0 Connector (UB3)
+5V_S5
C424
1u/6.3V_4
C C
USBON#<31>
USB_OC1#<6>
USBON# USBP0+_R
U20
5
IN
OUT
GND
4
/EN
/OC
G524B2T11U
Enable: Low Active /2.5A BCD:AL002822000 GMT:AL000524007
Close USB3.0
1
2
3
470P/50V_4
USBPWR1
C450
0.1u/16V_4
C452 100U/6.3V_1206
USB3_TXN0<6> USB3_TXP0<6>
C451
USB3_RXN0<6> USB3_RXP0<6>
USBP0-_C
USBP0+_C
C518 *1.6P/50V_4
C517 *1.6P/50V_4
C499 0.1u/16V_4 C498 0.1u/16V_4
USB3_TXN0_C USB3_TXP0_C
R385 *short_4 R386 *short_4
R392 *short_4 R387 *short_4
R384 *short_4 R381 *short_4
USBP0-_R USBP0+_R
USB3_RXN0_R USB3_RXP0_R
USB3_TXN0_R USB3_TXP0_R
C511
*1.6P/50V_4
USBPWR0
C505
*1.6P/50V_4
CN16 USB3.0 CONN
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
VBUS D­D+ GND SSRX­SSRX+ GND SSTX­SSTX+
12
USBPWR0
USB3_TXP0_R
C502
0.1u/16V_4
USBP0-_R
11111010131312
USB3_RXP0_R
USB protection diodes for ESD.
USB protection diodes for ESD.
USB protection diodes for ESD.USB protection diodes for ESD. as close as possible to USB connector pins.
as close as possible to USB connector pins.
as close as possible to USB connector pins.as close as possible to USB connector pins.
U24
1
I/O 1
I/O 6
2
VDD
GND_2
3
NC_1
NC_2
4
I/O 2
I/O 5
5
I/O 3
I/O 4
GND_1
11
USB30_ESD_AZ1065-06F.R7G
10
USB3_TXN0_R
9
8
7
6
USB3_RXN0_R
USB3.0 conn, 2'nd : DFHS09FR679
+5V_S5
USBP1-<6>
USBP1+<6>
R342 *short_4 R348 *short_4
USB2.0 DB (UB2)
C4713
C4715
0.1u/16V_4
For 17" DB use
USBPWRD2
C4712 100U/6.3V_1206
C475 *1.6P/50V_4
USB3_RXN1<6> USB3_RXP1<6>
C469 *1.6P/50V_4
USB3_TXN1<6> USB3_TXP1<6>
C461 0.1u/16V_4 C459 0.1u/16V_4
USB3_TXN1_C USB3_TXP1_C
R355 *short_4 R353 *short_4
R341 *short_4 R340 *short_4
C4714
1u/6.3V_4
USBON#
B B
A A
USB_OC2#<6>
USBPWRD2
CN2020
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25
27
2628
DB_CONN
U4511
5
IN
OUT
GND
4
/EN
G524B2T11U
Enable: Low Active /2.5A BCD:AL002822000 GMT:AL000524007
+
C4711 100u/6.3V_12
USBP2+ USBP2-
USBP3+ USBP3-
ADOGND
1
2
3
/OC
USBP2+ <6>
USBP3+ <6>
HP_JD# <26>
Close USB3.0
USBP2- <6>
USBP3- <6>
SLEEVE_R <26>
RING2_R <26>
HP-L3 <26>
HP-R3 <26>
470P/50V_4
5
4
3
USBP1-_R USBP1+_R
USB3_RXN1_R USB3_RXP1_R
USB3_TXN1_R USB3_TXP1_R
C460
*1.6P/50V_4
2
USBPWR1
C458
*1.6P/50V_4
CN13 USB3.0 CONN
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
VBUS D­D+ GND SSRX­SSRX+ GND SSTX­SSTX+
12
USBPWR1
USB3_TXP1_R
C462
0.1u/16V_4
USBP1-_R
USB3_RXP1_R
11111010131312
USB protection diodes for ESD.
USB protection diodes for ESD.
USB protection diodes for ESD.USB protection diodes for ESD. as close as possible to USB connector pins.
as close as possible to USB connector pins.
as close as possible to USB connector pins.as close as possible to USB connector pins.
Size Document Nu mber Rev
Size Document Nu mber Rev
Size Document Nu mber Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
U21
1
I/O 1
10
USB3_TXN1_R
I/O 6
2
VDD
9
GND_2
3
NC_1
8
NC_2
4
I/O 2
7
USBP1+_R
I/O 5
5
I/O 3
6
USB3_RXN1_R
I/O 4 GND_1
11
USB30_ESD_AZ1065-06F.R7G
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
USB3/Charger/USB2 DB
USB3/Charger/USB2 DB
USB3/Charger/USB2 DB
1
ZAA
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1A
1A
30 48Friday, February 05, 2016
30 48Friday, February 05, 2016
30 48Friday, February 05, 2016
1A
Page 31
5
Dr-Bios.com
EC(KBC)
1 2
R368 100K_4
C491 1u/6.3V_4
R753 10K_4
C785 *0.1u/16V_4
R747 2 .2/F_6
D12 SDMK0340L-7-F
2 1
R751 3 3_4
C800 180 P/50V_4
WLANPWR#<28>
R746 3 3_4
C799 18 0P/50V_4
PCH_SPI_CLK_EC
C4726 *22p/50V_4
EMI
R11153 * short_4
Reserve switch for test (MP remove)
1
5
CLK_PCI_EC<7>
LPC_LFRAME#<7,27, 28>
TS_EN _C
+3V_LDO_E C
+3VPCU_EC and +3V_RTC minimum trace width 12mils.
D D
+3V_LDO_E C
TS_EN<23>
Prevent ESD/EOS Layout near device
C C
Prevent ESD/EOS Layout near device
EC_ODD_EJ#<27>
CLK_PCI_EC
R373
*22_4
C490 *10p/50V_4
B B
Output for TPS 2580 type-C enable
EC_TypeC_EN
+3V_LDO_E C
NBSWON#
A A
C514
0.1u/16V_4
PLTRST#<8,14,25,27,2 8>
PCH_SUSPWRACK<8>
IOAC_WLAN_W AKE#<2 8>
SW2 *POWER_SW
3 42
6
PCH_BLON_R<23>
IOAC_LAN_WAKE #<25>
DDR4_SUSON_2V5<36>
PCH_SPI_CLK_EC<7> SPI_CS0#_UR_ME<7>
PCH_SPI_SI_EC<7>
PCH_SPI_SO_EC<7>
L12 BLM15AG121SN1D(120,500MA)_4
12 mils
C771
C770
0.1u/16V_4
+3V
+3V_S5
LPC_LAD0<7,27,28> LPC_LAD1<7,27,28> LPC_LAD2<7,27,28> LPC_LAD3<7,27,28>
C822 18 0P/50V_4
R749 * short_4
TP77
IRQ_SERIRQ<7,27>
SIO_EXT_SCI#<2>
SIO_RCIN#<7>
KB_BL_LED<29>
DNBSWON#<8>
SUSB#<8,11,3 3>
EC_PWROK<8>
FAN1_DAC<29>
ME_WR#<4>
AMP_MUTE#<26>
ODD_POWER<27>
ACIN<32>
TEMP_ MBAT#<32>
PCBEEP_EC<26 >
+1V_S5_ON<34>
MY16<2 9> MY17<2 9>
S5_ON<33,40>
PTP_PWR_EN#<29>
MY0<29> MY1<29> MY2<29> MY3<29> MY4<29> MY5<29> MY6<29> MY7<29> MY8<29>
MY9<29> MY10<2 9> MY11<2 9> MY12<2 9> MY13<2 9> MY14<2 9> MY15<2 9>
EC_TypeC_EN_R <21>
0.1u/16V_4
R361 * 2.2/F_6 R779 2 .2/F_6
C777
0.1u/16V_4
PLTRST#_EC
PROCHOT_EC
SIO_A20GATE
WRST#
EC_TypeC_EN
+1V_S5_ON EC_ODD_EJ#_R
PCH_SPI_CLK_EC
TS_EN _C
S5_ON
C495
0.1u/16V_4
11/11 FAE suggestion pin106 +3V_RTC change to +3VPCU_EC
+A3VPCU
ECAGND
+3VPCU_EC
C780
0.1u/16V_4
+3V_EC
C482
0.1u/16V_4 U45
10
LAD0/GPM0(3)
9
LAD1/GPM1(3)
8
LAD2/GPM2(3)
7
LAD3/GPM3(3)
22
LPCRST#/GPD2
13
LPCCLK/GPM4(3)
6
LFRAME#/GPM5(3)
17
LPCPD#/GPE6
126
GA20/GPB5(3)
5
SERIRQ/GPM6(3)
15
ECSMI#/GPD4(3)
23
ECSCI#/GPD3
14
WRST#
4
KBRST#/GPB6(3)
16
PWUREQ#/BBO/SMCLK2ALT/GPC7(3)
113
CRX0/GPC0
123
CTX0/TMA0/GPB2(3)
80
DAC4/DCD0#/GPJ4(3)
119
DSR0#/GPG6
33
GINT/CTS0#/GPD5
88
PS2DAT1/RTS0#/GPF3
81
DAC5/RIG0#/GPJ5(3)
87
PS2CLK1/DTR0#/GPF2
109
TXD/SO UT0/GP B1
108
RXD/SIN0/GPB0
71
ADC5/DCD1#/GPI5(3)
72
ADC6/DSR1#/GPI6(3)
73
ADC7/CTS1#/GPI7(3)
35
RTS1#/GPE5
34
PWM7/RIG1#/GPA7
122
DTR1#/SBUSY/GPG1/ID7
95
CTX1/SOUT1/GPH2/SMDAT3/ID2
94
CRX1/SIN1/SMCLK3/GPH1 /ID1
105
FSCK/GPG7
101
FSCE#/GPG3
102
FMOSI/GPG4
103
FMISO/GPG5
56
KSO16/SMOSI/GPC3(3)
57
KSO17/SMISO/GPC5(3)
32
PWM6/SSCK/GPA6
100
SSCE0#/GPG2
125
SSCE1#/GPG0
36
KSO0/PD0
37
KSO1/PD1
38
KSO2/PD2
39
KSO3/PD3
40
KSO4/PD4
41
KSO5/PD5
42
KSO6/PD6
43
KSO7/PD7
44
KSO8/ACK#
45
KSO9/BUSY
46
KSO10/PE
51
KSO11/ERR#
52
KSO12/SLCT
53
KSO13
54
KSO14
55
KSO15
MX0<29> MX1<29> MX2<29> MX3<29> MX4<29> MX5<29> MX6<29> MX7<29>
5
4
+3VPCU_ECPL L
C772
0.1u/16V_4
106
127
74
84
82
AVCC
VSTBY
VSTBY(PLL)
EGAD/GPE1
VSTBY_FSPI
EGCS#/GPE283EGCLK/GPE3
C508
0.1u/16V_4
+3V_EC
VSTBY_FSPI
11
VCC
VSTBY26VSTBY50VSTBY92VSTBY
114
121
LPC
IT8987E/CX LQFP
CIR
UART port
EXTERNAL SERIAL FLASH
SPI ENABLE
KBMX
KSI0/STB#58KSI1/AFD#59KSI2/INIT#60KSI3/SLIN#61KSI462KSI563KSI664KSI7
Battery Detect Switch
BI<3 2>
4
VSS
VSS27VSS
VSS
1
65
49
91
R782*short_4
R783*0_4
R785*0_4
R784*0_4
Rev:D Add
SW4
3
BI
R11282 *0_4
Option either one
L22 BLM15AG121SN1D(120,500MA)_4
(For PLL Power)
BT_EN
3
20
19
97
93
GPH7
ID5/GPH598ID6/GPH699ID3/GPH396ID4/GPH4
L80LLAT/GPE7
L80HLAT/BAO/GPE0
CLKRUN#/ID0/GPH0
GPIO
WAKE UP
RING#/PWRFAIL#/CK 32KOUT/LPCRST#/GPB7
VSS
VCORE
AVSS
12
75
104
C778
ECAGND
0.1u/16V_4
L11
EC_GND
BLM15AG121SN1D(120,500MA)_4
2 14
+3VPCU_EC
SB_ACDC <8> POA_EN# <27> BT_EN <28>
POA_PWR_INT# <27> POA_POWERREQ <27>
EC_TypeC_CHG_HI <21>
USBON# <30>
USB_BC_ON <30> USB_CHARGE_ON <30>
CLKRUN# <7,2 7>
SMCLK0/GPB3 SMDAT0/GPB4
SM BUS
SMCLK1/GPC1 SMDAT1/GPC2
PECI/SMCLK2/GPF6(3)
SMDAT2/PECIRQT#/GPF7(3)
PS/2
PS2CLK0/CEC/TMB0/GPF0
PS2DAT0/TMB1/GPF1
PS2CLK2/GPF4 PS2DAT2/GPF5
PWM0/GPA0 PWM1/GPA1 PWM2/GPA2 PWM3/GPA3 PWM4/GPA4 PWM5/GPA5
PWM
TACH0A /GPD6 (3)
TACH1A /TMA1/ GPD7(3 )
TMRI0/ GPC4(3 ) TMRI1/ GPC6(3 )
PWRSW/GPE4
RI1#/GPD0(3)
RI2#/GPD1
ADC0/GPI0(3) ADC1/GPI1(3) ADC2/GPI2(3) ADC3/GPI3(3) ADC4/GPI4(3)
A/D D/A
TACH2/ GPJ0(3 )
GPJ1(3) DAC2/TACH0B/GPJ2(3) DAC3/TACH1B/GPJ3(3)
CLOCK
GPJ7 GPJ6
IT8987/CX
AJ089870F02 IT8987E/CX
3
PJA138K
1
Q40
3
VSTBY_FSPI
Prevent ESD/EOS Layout near device
C796 180P/50V_4
110
MBCLK
111
MBDATA
115
2ND_MBCLK
116
2ND_MBDATA
117
EC_PECR_R
118
R460 3 3_4
C801 180 P/50V_4
D4015
85 86 89 90
24 25 28
SUSLED#
29 30 31
47 48
120 124
107
NBSWON#
18 21
HWPG
112
ICMNT
66 67
C516 10u/6.3V_6
68 69 70
76 77
SYS_HWPG
78 79
2 128
C797 180P/50V_4
Reset SW (FSW)
Vgs = 1.5V
2
12
C765
*0.1u/25V_4
3
R11118
R11119
R190 3 3_4
R738 4 3_4
2 1
R349 3 3_4
MBCLK <32> MBDATA <32>
2ND_MBCLK <7,17>
2ND_MBDATA <7,17>
VARISTOR_4
IOAC_RST# <25,28>
EC_FPBACK# <23>
MAINON <8,27> USB_CLT1 <30>
ECAGND
R11283 * short_4
+3V_S5
0_4
*0_4
TPD_E N <29>
H_PECI <2>
LID#
LID# <23>
Prevent ESD/EOS Layout near device CY000220Z00 / CY402220B00
TPCLK <29 > TPDATA <29 >
PWRLED# <29> BATLED1# <29> SUSLED# <29> BATLED0# <29>
FAN1_RPM <29> POA_AUTH_ERR <27>
SUSON <8>
DGPU_OTP# <17>
NBSWON# <11,29> SUSC# <8,11> HWPG <8>
RSMRST# <8>
ICMNT <32>
DGPU_OPP# <17> VRON <8>
LANPWR# <25>
POA_FP_PWREN# <27>
SYS_HWPG <33>
PCH_PWROK <8>
CLR_CMOS <6>
Prevent ESD/EOS Layout near device
SM BUS ARRANGEMENT TABLE
SM Bus 1
Battery
SM Bus 2
PCH/VGA
SM Bus 3
SM Bus 4
+3V_RTC
12
R719 100K_4
BI_GATE
SW1
42
3
BI_SW
6
5
1
+3V_LDO_EC
Prevent ESD/EOS Layout near device
R774 3 3_4
C798 180P/50V_4
SYS_SHDN# <2,33,40>
TPD_IN T# <4,2 9>
R756 * 0_4
R757 * 0_4
R717 *10K_4
C764 *0.1u/16V_4
2
5
Q56
*PJ4N3KDW
4 3
2
RF_EN <28>
+3V_RTC
+3VPCU
WRST#
Vgs = 1.5V
6
1
2
NBSWON#
S5_ON
DGPU_OTP# DGPU_OPP#
MAINON
SUSON
VRON
PCH_SPI_SI_EC
PCH_SPI_SO_EC
SM BUS PU(KBC)
MBCLK
Battery module
UMA& VGA SKU Need Stuff
HWPG(KBC)
Reserve no stuff
MBDATA
2ND_MBCLK 2ND_MBDATA
PROCHOT_EC
DDR=1.5V, D1 DNP and D2 POP DDR=1.35V, D1 POP and D2 DNP
HWPG_1.5V<40>
HWPG_1.8VS 5<40>
HWPG_VDDR<36 >
HWPG_1VS5<34>
HWPG_+VCCOPC<3 5>
HWPG_2.5V<36>
1
+3V_LDO_E C
R730 1 0K_4
R741 1 0K_4
+3V_GFX
R740 E V@10K_4 R382 E V@10K_4
R389 1 00K_4
R739 1 00K_4
R463 1 00K_4
R735 * 10K_4
R736 * 10K_4
+3V_LDO_E C
R731 4.7K_4 R732 4.7K_4
+3V_S5
R733 2.2K_4 R734 2.2K_4
3
Q30
2
R380
100K_4
2N7002K
1
D18 RB500V-40
D11 *RB500V-40
D20 *RB500V-40
D17 *RB500V-40
SYS_HWPG
D4014 *RB500V-40
D14 *RB500V-40
D4001 *RB500V-40
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
H_PROCHOT# <2,32, 37>
+3V
R374 10K_4
HWPG
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
KBC IT8587
KBC IT8587
KBC IT8587
1
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1A
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31 48Friday, February 05, 2016
31 48Friday, February 05, 2016
31 48Friday, February 05, 2016
1A
Page 32
5
Dr-Bios.com
4
3
2
1
Double Check ADP-In Type
PC6
PR14 316K/F_4
100P/50V_4
5
PC133 1n/50V_4
PQ22 AON6414AL
PR5 20_1206
PC3
100P/50V_4
PR15 100K/F_4
3 2 1
4
PR165
4.02K/F_4
PC116
0.47u/25V_6
PR167 *short_4
PR177 *short_4
PR178 *short_4
PR170 *short_4
PR171 *short_4
PR172 *short_4
0.01u/50V_4
VA VA1
PD3
P4SMAFJ20A
PD8 SV1040
1
2
PMON
PR342 SP@12.7K/F_4
BI <31>
TEMP_MBAT# <31>
+3VPCU
3
ICMNT<31>
TP4366
+3VPCU
PR168 866K/F_4
PR3 137K/F_4
MBDATA
MBCLK
ICMNT
N3%JMI[[
PC13
0.1u/50V_6
D/C#
PC7
*100P/50V_4
PR16 10K_4
PR179 *10K_4
Power conn
4 3 2 1
D D
C C
UMA-(GT2)> 45 W adapter PR342 CS31 542FB14 15.4K 1/16W +-1% (0402) For 78W
UMA-(GT3)> 65 W adapter PR342 CS31 272FB17 12.7K 1/16W +-1% (0402) For 95W
Dis -65W adapter> PR342 CS31272FB17 12.7K 1/16W +-1% ( 0402) For 95W
Dis -90W adapter> PR342 CS31002FB26 10K 1/16W +-1% (0402) For 116W
B B
PJ3
PC128
0.1u/50V_6
ACIN<31>
PC126
0.1u/50V_6
PC125
*100p/50V_4
89 7 6 5 4 3
50458-00801-V01
2 1
10
PJ1
PR10 *0_4
PR8 100/F_4
PR6 100/F_4
PC124
2200p/50V_6
PR1 100K/F_4
PR4 100K/F_4
PR7 100/F_4
2 1
REGN6V
PMON<37>
BAT-V
TEMP_MBAT#
PR9 1M_4
Double Check BATT-In Type
PC9
*47p/50V_4
MBCLK <31>
MBDATA <31>
4
A A
PC8
*47p/50V_4
PDZ5.6B
5
2 1
2 1
PD2
PD1
PDZ5.6B
PC123
VA2
PC136
47n/50V_6
24780_CMSRC
24780_ACDRV
24780_VCC
24780_ACDET
24780_BM#
24780_CMPOUT
24780_ILIM
24780_CMPIN
PR11 100K_4
PR166
4.02K/F_4
PC5
PC115
0.1u/50V_6
0.1u/50V_6
2
3
CMSRC
ACP
4
ACDRV
28
VCC
6
ACDET
5
ACOK
11
SDA
12
SCL
7
BQ24780SRUYR
IADP
8
IDCH G
9
PMON
16
TB_STAT
14
CMPOUT
21
ILIM
13
CMPIN
PROCHOT
BATPRES
GND35GND36GND37GND
10
15
38
PR12 *short_4
TEMP_MBAT#
H_PROCHOT#
PR174 *100K_4
+VCCIO
Check PU high with HW side
PU5
GND
22
3
1
ACN
PAD29GND30GND31GND32GND33GND
PR13 *0_4
1 2
24780_ACP
24780_ACN
PC2
0.1u/50V_6
BATDRV
BATSRC
REGN
BTST
HIDRV
PHASE
LDODRV
SRN
34
PR213
0.01/F_0612
SRP
PR209 10_4
PR210 10_4
18
24780_BATDRV
17
24780_BATSRC
REGN6V
24
25
24780_BST
26
24780_DH
27
24780_LX
23
24780_DL
20
PR183 10/F _6
19
PR184 10/F _6
H_PROCHOT# <2,31,37>
PR173
*short_6
VIN
24780_ACN
PC141
0.1u/50V_6
24780_ACP
PR186 10/F_6
PC122
2.2u/10V_6
52
4
4
PQ20
AON7410
3
1
52
PQ21
AON7410
3
1
24780_SRP
24780_SRN
PC119 47n/50V_6
PC131
0.1u/25V_4
PC130
0.1u/25V_4
PC132
0.1u/25V_4
(34RF%Y0LF/RF%Y.FYI.M%FRJRFWR%6Z:,,6%[3F%G(S%M0F3MM.N/
3
24780_CMPOUT
2
PQ40 *EV@2N7002K
1
2
PQ1 AON6414AL
5
PC140 2200p/50V_6
PR2 *4.7_6
PC4 *680p/50V_6
4
VIN
PC117
2200p/50V_6
PL1
6.8uH_7X7X3
GPU_THROTTING# <17>
3 2 1
PR185 *short_6
PC118
10u/25V_8
PC1
*0.01u/50V_4
PR169
0.01/F_0612
1 2
PR176
*short_4
24780_SRP
24780_SRN
Size Docum ent Number Rev
Size Docum ent Number Rev
Size Docum ent Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
PR175 *short_4
REGN MAX voltage 6.5V V_ILIM=20*(VSRP-VSRN)=20*Ichg*Rsr =0.793V for 3.965A current limit
ILIM=0.793V Rsr = 0.01ohm
Charger (BQ24780S)
Charger (BQ24780S)
Charger (BQ24780S)
BAT-V
PC120
PC121
10U/25V_8
2200p/50V_6
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
1
BAT-V
10U/25V_8
ZAA
ZAA
ZAA
PC127
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VIN
12
+
PC6212 *33u/25V_6x4.5
D D
C C
+5VPCU
+5VPCU 5 Volt +/- 5% TDC : 10A PEAK : 13.4A OCP : 16A Width : 400mil
+
PC6227
220u/6.3V_6X4.2
OCP:16A
L(ripple current) =(9-5)*5/(1u*0.3M* 9) =7.407A Iocp=18-(7.4 07/2)=12.296A Vth=(12.296A*4.9mOhm)+1mV=61.252mV R(Ilim)=(61.252mV*8)/10uA ~49K
PC6226
0.1u/50V_6
PR6281
15.8K/F_4
PR6120 10K/F_4
PC6220
10u/25V_8
PL6013
1uH_7X7X3
PR6288 *4.7_6
2200p/50V_4
51225_SW1
*680p/50V_6
4
SYS_HWPG<31>
SYS_SHDN#<2,31,40>
PC6218
PQ6056 AON6978
2
D1
D1
D1
G1
1
S1/D2
9
8
G2
S2
S2
S2
567
PC6221
Rds(on)=4.9m ohm
Power auto recovery
+3VPCU
SYS_SHDN#
PR6278 *short_4
3V_LDO
0.1u/50V_6
PR6283 *short_4
PC6215
PR6296 0_6
PR6295 *0_6
PR6287
1/F_6
51225_EN1
PR6297 100K_4
51225_DH1
51225_VBST1
51225_SW1
51225_DL1
51225_FB1
+3V_LDO_EC
+3VPCU
PR6284
10K/F_4
7
PGOOD
20
EN1
16
DRVH1
17
VBST1
18
SW1
15
DRVL1
2
VFB1
14
VO1
3
VL 3V_LDO
PC6219 10u/6.3V_6
51225_VIN
12
13
VREG5
PU6010
RT6575AGQ W
CS11CS25VCLK
19
26
51225_CS1
51225_CS2
PR6122 113K/F_4
PR6124 4 9.9K/F_4
PC6100 0.1u/25V_4
3
VIN
VREG3
PR6125 *sho rt_6
PR6130 *sho rt_6
PR6280 10K/F_4
PC6098 4.7u/6.3V_6
6
EN2
10
DRVH2
9
VBST2
8
SW2
11
DRVL2
4
VFB2
21
GND
22
GND
GND23GND24GND25GND
2
PQ6054 AON7410
SYS_SHDN#
51225_DH2
PR6286
51225_VBST2
1/F_6
51225_SW2
51225_DL2
51225_FB2
OCP:11A
L(ripple current) =(9-3.3)*3.3/( 2.2u*0.355M*9) ~2.676A Iocp=11-(2.6 76/2)=9.662A Vth=(9.662A*14.5mOhm)+1mV=141.099mV R(Ilim)=(141.099mV*8)/10uA =112.88K
4
PC6213
0.1u/50V_6
4
PQ6053 AON7752
Rds(on)=14.5m ohm
1
VIN
PC6214
2200p/50V_4
52
3
1
52
PR6289 *4.7_6
3
1
PC6222
*680p/50V_6
PL6012
2.2uH_7X7X3
PC6216
10u/25V_8
+3VPCU
3.3 Volt +/- 5% TDC : 6.58A PEAK : 8.77A OCP : 11A Width : 280mil
PR6279
6.49K/F_4
PC6225
0.1u/50V_6
PR6121 10K/F_4
PC6224
220u/6.3V_6X4.2
+3VPCU
+
PC97 10U/6.3V_6
+5VPCU
PC85
0.1U/16V_4
PC88
0.1U/16V_4
PC90 1u/25V_4
13 14
4
3
PC84 *0.1U/16V_4
1000P/50V_4
VOUT1 VOUT1
VBIAS
ON1
1
APL3523A
PC175
TDC : 3.38A PEAK : 4.5A Width : 140mil
+5V_S5
+5V_S5_V1 for USB2.0/3.0 Port
B B
S5_ON<31,40>
PR6282 *short_4
+5VPCU
PR6285 *short_4
S5_ON MAINON_RS5_ON
Soft-Start
PC208 10U/6.3V_6
+5VPCU
PC189
0.1U/16V_4
PC180
0.1U/16V_4
PC185 1u/25V_4
13 14
4
3
PC214 *0.1U/16V_4
1000P/50V_4
VOUT1 VOUT1
VBIAS
ON1
1
APL3523A
PC210
TDC : 3A PEAK : 4A Width : 120mil
+5V_S5_V2
+5V_S5_V2 for PD Charger
A A
+5VPCU
PR6300 *short_4
S5_ON
PR6299 *short_4
+5VPCU
PC83 1u/25V_4
7
VIN12VIN1
VIN26VIN2
8
OUT2
9
OUT2
GND
PU11
GND
ON2
CT1
CT2
12
10
PC98 1000P/50V_4
11
15
5
PC91
0.1U/16V_4
PR6291 *short_4
PC87 *0.1U/16V_4
PC105 10U/6.3V_6
MAINON_R
TDC : 3.6A PEAK : 4.8A Width : 160mil
+5V
TDC : 1.65A PEAK : 2.2A Width : 80mil
+3V_S5
+5VPCU
PR6292 *short_4
PR6293 *short_4
PC173 10U/6.3V_6
+3VPCU
PC108
0.1U/16V_4
PC111
0.1U/16V_4
PC137 1u/25V_4
13 14
4
3
PC107 *0.1U/16V_4
1000P/50V_4
VOUT1 VOUT1
VBIAS
ON1
PC177
1
PU10
APL3523A
12
Soft-Start
ZRW Rev:E Reserve only no stuff
7
VIN12VIN1
VIN26VIN2
8
OUT2
9
OUT2
11
GND
PU20
12
15
GND
5
ON2
CT1
CT2
10
B2A S0->S5 & S0->S3 Power off s equenc e unde r 200 us SUSB# -> VCCIO
SUSB#<8 ,11,31>
+5VPCU
PR6290 *10K_4
3
2
PQ6057 *2N7002K
1
Soft-Start
5
4
3
2
+3VPCU
PC106 1u/25V_4
7
VIN12VIN1
VIN26VIN2
8
OUT2
9
OUT2
GND
GND
ON2
CT1
CT2
10
PC176 1000P/50V_4
3
2
1
PC114
11
0.1U/16V_4
15
5
PR6294 *short_4
PC112 *0.1U/16V_4
MAIND
MAIND <34,36,40>
PQ6058 *2N7002K
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
SYSTEM 5V/3V (RT6575AGQW)
SYSTEM 5V/3V (RT6575AGQW)
SYSTEM 5V/3V (RT6575AGQW)
Date: Sheet of
Date: Sheet of
Date: Sheet of
TDC : 3.15A PEAK : 4.2A Width : 140mil
+3V
PC174 10U/6.3V_6
MAINON_R <8,36,40>
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
ZAA
ZAA
ZAA
33 48Friday, February 05, 2016
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33 48Friday, February 05, 2016
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PU15
7
D D
HWPG_1VS5<31>
G5335-AGND-1
+5VPCU
+5VPCU
PR88 10/F_6
+3V
PR295 100K/F_4
PR94 *short_4
PR93 *0_4
PR87 *short_4
PC243 10U/6.3V_6
G5335-VCC-1
G5335-PWR GD-1
G5335-PFM-1
NC
21
VCC
1
PGOOD
3
PFM
Pulse-Skipping mode
+1V_S5_ON<31>
C C
PR83 *short_4
PC272
*0.047U/10V_4
0.047U/10V_4
G5335-EN-1
G5335-AGND-1
G5335-SS-1
PC89
G5335-AGND-1
2
EN
23
SS
4
G5335QT2U
TON
BST
PGND
PGND
PGND
PGND
PGND
AGND
LX LX LX LX LX LX
FB
IN
IN
IN
IN
8
9
22
24
6
G5335-TON-1
20
G5335-BST-1
10 11 16 17 18 25
12
13
14
15
19
4
5
G5335-LX-1
G5335-AGND-1
G5335-FB-1
Fsw=550KHz
PR97
73.2K/F_4
PR99
2.2/F_6
PC267
0.1U/25V_6
PC271 *0.01U/25V_4
PR98 *4.7_6
PC270 *680p/50V_6
3
PL15
0.68uH_7X7X3
1 2
2
VIN
PC269
*0.1U/25V_4
PC239
22U/6.3V_6
PC238
PC237
10u/25V_8
2200p/50V_6
PR86
5.1K/F_4
R1
PC234
22U/6.3V_6
PC242
PC245
22U/6.3V_6
PC248
22U/6.3V_6
22U/6.3V_6
PC268
PC236
*22U/6.3V_6
PC250
0.1U/16V_4
*22U/6.3V_6
PC235
*1000P/50V_4
1
+1V_S5
1.0 Volt +/- 5% TDC : 6.82A PEAK : 9.1A Width : 280mil
+1V_S5
R2
PR92 20K/F_4
G5335-AGND-1
Vo=0.8*(R1+R2)/R2 =1V
VFB=0.8V
PR82 *short_4
G5335-AGND-1
B B
SUSON_R<8,36>
A A
2
PQ6
DTC144EU
VIN VIN
PR141 1M_6
3
2
1 3
PR140 1M_6
1
4
PR139 22_8
PQ7 2N7002K
+1V_S5+1V_SUS
PR142 1M_6
3
2
PQ8
2N7002K
1
PC101 *2.2n/50V_4
3
2
PQ23 AO3404
1
+1V_SUS
PC6230 22u/6.3V_6
TDC : 0.18A PEAK : 0.24A Width : 20mil
MAIND<33,36,40>
MAINDSUSD
ZRW Rev F Add
ZRW Rev F Add
3
5
+1V_S5
52
4
PQ26
MDV1528Q
3
1
+VCCIO
PC6231 *22u/6.3V_6
2
TDC : 2.36A PEAK : 3.14A Width : 100mil
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
PROJECT :
+1V_S5 (G5335QT2U)
+1V_S5 (G5335QT2U)
+1V_S5 (G5335QT2U)
ZAA
ZAA
ZAA
34 48Friday, February 05, 2016
34 48Friday, February 05, 2016
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4
+3V_S5
3
2
1
PR292 *short_4
D D
+VCCOPC_3V3
VIN
PC99
VRON_R<8,37>
C C
LPM_ZVM_N<9>
HWPG_+VCCO PC<31>
B B
PR136 *short_4
+3V_S5
R697
**GT3@10K_4
PC228
*GT3@10u/25V_8
PR135
**GT3@100K/F_4
PR293
*GT3@100K/F_4
+3V
PC100
*GT3@10u/25V_8
PR289
*GT3@2200P/50V_4
+VCCOPC_EN
+VCCOPC_MODE
*GT3@100K/F_4
+VCCOPC_LP#
PR290 *short_4
1
VIN
PC229
*GT3@0.1U/25V_4
5
EN
7
MODE
6
LP#
13
PG
VR RailMode
VCCIO0 ohm
10
3V3
PU14
*GT3@NB681GD-Z
AGND
11
LP#
0
+VCCOPC Power only for 2+3e CPU
PC230 *GT3@1u/10V_4
BST
SW
VOUT
PGND
PR294
C1
C0
*short_6
9
+VCCOPC_VBST
8
+VCCOPC_SW
12
2
3
4
681_AGND <5>
VoC0C1
0VXX
PR291 *short_6
PC231 *GT3@0.1u/50V_6
PR344 *GT3@10/F_4
+VCCOPC_SRC <5>
PR286 *short_4PR280 *short_4 PR288 *short_4
PR287 *short_4
PL13
*GT3@0.68uH_7X7X3
VCCOPC_VID1VCCOPC_VID1_C
VCCOPC_VID0VCCOPC_VID0_C
PC226
*GT3@0.1u/16V_4
+3V_S5
R705 *GT3@10K_4
R706 **GT3@10K_4
PC222
*GT3@22uF/6.3V_6
R708 **GT3@10K_4
R707 *GT3@10K_4
PC225
*GT3@22uF/6.3V_6
VCCOPC_VID0 VCCOPC_VID1
PR6306 *short_8
PR6307 *short_8
PC223
*GT3@22uF/6.3V_6
+VCCOPC TDC : 4.5A PEAK : 6A Width : 200mil
+VCCOPC
+VCCEOPIO
Floating
PRIMCORE (MSM)
EDRAM/EOPIO100K
VCCEDRAM
1
10.95V
150K Other
A A
+VCCOPC<5>
VIN<23,26,27,32,33,34,36,37,38,39,40,41,42>
+3V<2,4,6,7,8,9,12,13,14,16,22,23,24,25,26,27,28,2 9,31,33,34,36,37,40,41,4 2>
+3V_S5<2,3,4,6,7,8,9,11,21,25,27,28,29,31,33,36,41>
5
4
00
0.8V
10
1.0V011
1111.05V
3
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
2
PROJECT :
+VCCOPC (NB681GD-Z)
+VCCOPC (NB681GD-Z)
+VCCOPC (NB681GD-Z)
ZAA
ZAA
ZAA
1
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+3V
PR107 100K/F_4
HWPG_VDDR<31>
D D
TDC : 0.38A PEAK : 0.5A Width : 20mil
C C
DDR_VTTT_PG_CTRL<3>
SUSON_R<8,34>
MAINON_R<8, 33,40>
TDC : 0.45A PEAK : 0.6A Width : 20mil
+VDDQ
PC212
0.1U/16V_4
1P35V_S3 1P35V_S5
PR6303 *0_4
PR6302 *0_4
PR267 *short_4
PR263 *short_4
PR257 *short_4
PR269
100/F_4
DDR_VTTREF
PC218
0.033U/10V_4
+1.2VSUS
1P35V_S3
PC196 *0.1U/16V_4
PC207 10U/6.3V_6
VID
PC198
+5V_S5
20
2
1
4
19
*10U/6.3V_6
PR281 *short_4
PR264 *short_4
Ref. Voltage
High
Low
OCP=9A L ripple current =(19-1.2)*1.2/(1u*500k*19) =2.248A Vtrip=9-(2.248/2)*14.5mohm
B B
=114.202mV Rlimit=114.202mV/5uA*10=228. 4Kohm
PC203 *0.1U/16V_4
VTT
VTTSNS
VTTGND
VTTREF
VLDOIN
PR265 *0_4
0.675V
0.75V
4
1P35V_S3
7
RT8231BGQW
GND
3
1P35V_S5
S58S3
PU21
VID
11
1P35V_VID
Ilimit=9A
PR250 232K/F_4
1P35V_TON
1P35V_PGOOD
1P35V_CS
9
13
10
CS
TON
PGOOD
UGATE
BOOT1
PHASE
LGATE
VDD
PAD
VDDQ5PGND
FB
6
21
14
1P35V_FB
1P35V_VDDQ
PR258
7.87K/F_4
PR266 10K/F_4
DDR=1.2V PR258=7.87K/F_4 PR266=10K/F_4
17
18
16
15
12
Fsw=500KHz
PR261
499K/F_4
1P35V_UGATE
1P35V_BOOT
1P35V_PHASE
1P35V_LGATE
1P35V_VDD
PR274
PC217 1U/6.3V_4
S4/S5
PR251
2.2/F_6
*short_4
3
PC202
0.1u/50V_6
+5V_S5
VIN<23,26,27,32,33,34,35,37,38,39,40,41,42>
+5V_S5<21,30,33,37,38,39,41>
DDR_VTTREF<12,13>
+VDDQ<12,13>
+1.2VSUS<3,5,12,13>
PQ24
AON7410
4
4
PQ25
AON7752
Rds(on)=14.5mohm
S5S3
1
1
1S3 (mainon off)S00
0
52
3
1
52
3
1
0.1U/25V_4
PR90 *4.7_6
PC197 *680p/50V_6
10u/25V_8
PC213
PC285
VDDQ VTT REF VTT
ON
ONON
OFF0 OFF
OFF
2
PC181
10u/25V_8
PL11
1uH_7X7X3
PC286
ONON
OFF
1
PC215
0.1U/16V_4
+1.2VSUS
1.2 Volt +/- 5% TDC : 5A PEAK : 6.67A OCP : 9A Width : 200mil
+1.2VSUS
PC219
PC194
22U/6.3V_8
22U/6.3V_8
PC216
22U/6.3V_8
+
PC284
PC205
22U/6.3V_8
VIN
PC283
2200P/50V_4
PR254 *short_4
0.1U/25V_4
*330u/2.5V_ 6X4.2
+2.5VSUS Power Rail For DDR4
+2.5V_SUS <12,13>
PR285 *short_6
+3V_S5
+3V
Check PU high w ith HW
HWPG_2.5 V<31>
SUSON_R
A A
DDR4_SUSON_2V5<31>
PR314
100K/F_4
PR304 *0_4
PR307 *short_4
PR306 *short_4
PR271 10K_4
PC240
5
1
0.47uF/4V_4
PU16
PG
EN
G5719CTB1U
R2
PC244
4.7U/6.3V_6
4
3
G5719LX2.5V
VIN
LX
2
GND
FB
6
R1
PR278
47.5K/F_4
PR302 15K/F_4
PL17
2.2uH/1.85A_2.5X2X1.2
PR273 *short_4
Vo=(0.6(R1+R2)/R2)
PC233
PC241
PC232
10u/6.3V_6
0.1U/16V_4
*10u/6.3V_6
+2.5V_SUS
2.5Volt +/- 5% TDC : 0.75A PEAK : 1A Width : 40mil
+2.5V_SUS
5
4
3
10/26 Reserve +2.5V for DDR4 VDDSPD
+2.5V_SUS
3
MAIND<33,34,40>
2
2
PQ6065 *AO3404
1
+2.5V
+2.5V <12,13,40>
TDC : 0.16A PEAK : 0.21A Width : 20mil
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
PROJECT :
DDR4_+1.2VSUS (RT8231B)
DDR4_+1.2VSUS (RT8231B)
DDR4_+1.2VSUS (RT8231B)
ZAA
ZAA
ZAA
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1A
36 48Friday, February 05, 2016
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4
3
2
1
Check PU high with HW
GT2 : PR6301 CS00002JB38 0 ohm
GT2 : PC17 Unstuff GT3 : PC17 CH3224K1B01 0.022U/25V
GT2 : PC18 Unstuff GT3 : PC18 CH3224K1B01 0.022U/25V
GT2 : PC134 CH 4104K9B03 0.1uF/2 5V
GT2 : PR198 CS 38872FB18 88.7K
GT2 : PR194 C S21912FB13 1.94K GT3 : PR194 CS2 2552FB01 2.55K
GT2 : PR203 C S37872FB15 78.7K GT3 : PR203 CS3 8872FB18 88.7K
GT2 : PR207 C S41622FB11 162K GT3 : PR20 7 CS41402FB14 140K
GT2 : PR201 C S21372FB19 1.37K GT3 : PR201 CS2 1502FB14 1.5K
GT2 : PR211 C S12372FB00 237 ohm GT3 : PR211 CS12672FB02 267 ohm
PC32
0.1u/25V_4
PR41
1K/F_4
PC25
*0.01u/50V_4
PC27 *0.01u/50V_4
PC29
0.01u/50V_4
Rail C
Rail A
PC33
0.1u/25V_4
PWM_C <39>
FCCM_C <39>
PR207
PWM_A <38 >
FCCM_A <38>
PC31
0.1u/25V_4
+VCCCORE
PR31 *10_4
PR39 *10_4
PR47 *s hort_4
PR46 *s hort_4
PR43 *s hort_4
PR42 *s hort_4
VRON_R<8,35>
+1V_VCCST
PR341
45.3/F_4
PC6228
1000P/50V_4
+3V +VCCIO
PR200
PR197
10K/F_4
*10K/F_4
*short_4
*short_4
+3V
PR25 *short_4
ISL95857_PSYS
ISL95857_IM ON_B
ISL95857_N TC_B
ISL95857_C OMP_B
ISL95857_F B_B
ISL95857_R TN_B
ISL95857_ISU MN_B
ISEN1_B <38>
ISEN2_B <38>
+5V_S5
PR26 *shor t_4
PR27 *shor t_4
PR29 *shor t_4
PR32
PR30
*short_4
PR28
PR196
*10K/F_4
PR202
PR340 100/F_4
PR40 10 _4
PR35 49.9/F_ 4
ISL95857_VR _HOT
ISL95857_VR _READY
ISL95857_VR _EN
1
PSYS
2
IMON_B
3
NTC_B
4
COMP_B
5
FB_B
6
RTN_B
7
ISUMP_B
8
ISUMN_B
9
ISEN1_B
10
ISEN2_B
41
EP
PC23 3 30P/50V_4
SP@88.7K/F_4
ISL95857_SD A
ISL95857_SC LK
40
39
VR_READY
VR_ENABLE
FCCM_B
PWM1_B12PWM2_B13IMON_A14NTC_A15COMP_A16FB_A
11
ISL95857_F CCM_B
ISL95857_PWM 1_B
PR236 4 70K_4_4700NTC
PR235 27.4 K/F_4
Close to VCORE MOS
PR224
13.7K/F_4
37
38
36
SCLK
ALERT#
VR_HOT#
PU1
ISL95859HRT Z-T
ISL95857_IM ON_A
ISL95857_NT C_A
ISL95857_PWM 2_B
PR199
PC24 33P/50V_4
+5V_S5
VIN
PR212 *short_8
PR204 1/F_6
PC35
PR203
PR206
63.4K/F_4
ISL95857_VIN
ISL95857_VCC
ISL95857_PRO G1
ISL95857_PRO G2
35
34
33
31
VIN
SDA
VCC
PROG132PROG2
PWM_C
FCCM_C
ISUMN_C
ISUMP_C
RTN_C
FB_C
COMP_C
IMON_C
PWM_A
FCCM_A
RTN_A18ISUMP_A19ISUMN_A
20
17
ISL95857_F B_A
ISL95857_RT N_A
ISL95857_ISUM N_A
ISL95857_CO MP_A
PR36
2K/F_4
PR34
4.87K/F_4
PC26
PR201 SP@1.37K/F_4
PC28 5 60P/50V_4
PC135 2200p/50 V_4
3
30
ISL95857_PW M_C
29
ISL95857_F CCM_C
28
ISL95857_ISU MN_C
27
26
ISL95857_R TN_C
25
ISL95857_F B_C
24
ISL95857_C OMP_C
23
ISL95857_IM ON_C
22
ISL95857_PW M_A
21
ISL95857_F CCM_A
499/F_4
1000P/50V_4
SP@78.7K/F_4
2200p/50V_4
0.1u/25V_4
PC34
PR211
SP@237/F_4
SVID near PU1
PR198 SP@8 8.7K/F_4
D D
no stuff
VCCGT_SENSE<5>
C C
VSSGT_SENSE<5>
PR191 *shor t_4
PR181 *shor t_4
no stuff
ISUMP_B<38>
Close to VCCGT Choke
ISUMN_B<38>
B B
0.1U/25V_4
PC22 33 0P/50V_4
PR225 13 .7K/F_4
PC21 33P/50 V_4
PC129
3300P/50V_4
+VCCGT
PR187 *10_4
*0.01U/50V_4 PR242
PR180 *10_4
PC10
PR193
2.61K/F_4
1 2
PR22
11K/F_4
1 2
PR241 10K/F_4_3435NTC
PC14
PR195
3K/F_4
PC11
1u/6.3V_4
12
PC134
Close to VCCGT MOS
PR227
470K_4_4700NTC
PR226 27.4K/F_ 4
PC12 *0.01U/50V_4
PC20
SP@0.1u/25V_4
0.022u/25V_4
PR24
1K/F_4
PC16
220p/50V_4
PR21
1K/F_4
ZRW REV:F add 1000p
2K/F_4
PR23
PR194
PC15
SP@1.91K/F_4
470P/50V_4
PC19
2200P/50V_4
PR192
SP@267/F_4
PC18 *GT3@0 .022U/25V_4
PC17 *GT3@0 .022U/25V_4
H_CPU_SVIDDAT<5>
VR_SVID_ALERT#_VC ORE<5>
H_CPU_SVIDCLK<5>
H_PROCHOT#<2,3 1,32>
IMVP_PWRGD<2>
PMON<32>
PR6301 SP@0_4
FCCM_B<38>
PWM1_B<38>
PWM2_B<38>
Rail B
Skylake-U U23e 15W/28W (1+2+1+1 Phase)
VCORE
Icc TDC PL2󶁪23A
Icc Max󶁪29A
A A
OCP󶁪35A
Fsw󶁪800KHz
VCORE L/L󶁪󶁪󶁪󶁪
R_DC_LL󶁪2.1mV/A
R_AC_LL󶁪2.1mV/A
VCCGT VCCGTU
Icc TDC PL2󶁪40A
Icc Max󶁪64A
OCP󶁪A
Fsw󶁪800KHz
VCCGT L/L 󶁪󶁪󶁪󶁪
R_DC_LL󶁪2mV/A
R_AC_LL󶁪2mV/A
5
VCCSA
Icc TDC PL2󶁪5A
Icc Max󶁪5A
OCP󶁪6A
Fsw󶁪800KHz
VCCSA L/L󶁪󶁪󶁪󶁪
R_DC_LL󶁪10.3mV/A
R_AC_LL󶁪10.3mV/A
VCCGTU merge to VCCGT
4
GT3 : PR19 CS41003F932 100KGT2 : PR19 Unstuff
GT3 : PR6301 Unstuff
GT3 : PR192 CS 13402FB00 340 ohmGT2 : PR192 CS 12802FB00 280 ohm
GT3 : PC134 CH 4152K9B02 0.15uF /10V
GT3 : PR198 CS 39312FB15 93.1K
GT3 : PR202 C S39762FB12 97.6KGT2 : PR202 CS3 8872FB18 88.7K
PC40
PR48
2200p/50V_4
1K/F_4
PR220
475/F_4
PR216
SP@162K_4
PC36 3 30P/50V_4
PC37 33P/50V_4
PC139
12
PR208
PC30
11K/F_4
10n/50V_4
1 2
no stuff
PR33 *shor t_4
PR38 *shor t_4
no stuff
2
PC39
PC43
0.1u/25V_4
0.015u/50V_4
2.49K/F_4
*2K/F_4
PR44
PC41
2200P/50V_4
*680P/50V_4
Close to Vcore Choke
PR243 10K/F_4_3435NTC
12
PR205
2.61K/F_4
VCORE_SENSE <5>
VCORESS_SENSE <5>
PC38
0.047U/10V_4
1 2
PR45
301/F_4
PC42
1000P/50V_4
PR217 2.05K/F_4
ISUMN_A <38 >
ISUMP_A <38>
IMVP8 Vcore Controller
Rail A󶁘󶁘󶁘󶁘1 phase󶁙󶁙󶁙󶁙󶁪󶁪󶁪󶁪VCORE Rail B󶁘󶁘󶁘󶁘2 phase󶁙󶁙󶁙󶁙󶁪󶁪󶁪󶁪VCCGT Rail C󶁘󶁘󶁘󶁘1 phase󶁙󶁙󶁙󶁙󶁪󶁪󶁪󶁪VCCSA
Close to
12
PR219 11K/F_4
PC46
*0.01U/50V_4
PC44 *0.01U/50V_4
PC45
0.01U/50V_4
VCCSA Choke
ISUMN_C <3 9>
10K/F_4_3435NTC
12
PR218
2.61K/F_4
ISUMP_C <39>
+VCCSA
PR51 *10_4
no stuff
PR50 *s hort_4
PR52 *s hort_4
PR49 *10_4
no stuff
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
PROJECT :
CPU_CORE (ISL95859HRTZ-T)
CPU_CORE (ISL95859HRTZ-T)
CPU_CORE (ISL95859HRTZ-T)
1
VSA_SENSE <5>
VSASS_SENSE <5>
ZAA
ZAA
ZAA
1A
1A
1A
37 48Friday, February 05, 2016
37 48Friday, February 05, 2016
37 48Friday, February 05, 2016
Page 38
5
Dr-Bios.com
VCORE
4
3
2
1
GT3 : PR19 CS4 1003F932 100KGT2 : PR19 Unstuff
VIN
PL4
4
12
+
PC6229
*33U/25V_6x4.5
DCR=0.66mOhm
PC164
PC161
22u/6.3V_8
0.1u/16V_4
+VCCCORE
+
+
PC168
PC59
PC162
22u/6.3V_8
330u/2V_7343
330u/2V_7343
PR55 *short_6
D D
+5V_S5
Rail A
PWM_A<37>
FCCM_A<37>
PC149
4.7U/10V_6
PR237 *short_4
PR238 *short_4
VCORE_VCC
PU8 AOZ5049QI
23
PVCC
24
VCC
1
PWM
2
FCCM
PGND
21
PC154
0.1U/50V_6
PR215 3.65K/F_6
PR214 10/F_6
PC51
2200P/50V_6
0.15uH_7X7X4
1 2
3
PC52
PC155
10u/25V_8
*short_6
PR231
10u/25V_8
PC144
0.1u/50V_6
ISUMP_A<37>
ISUMN_A<37>
PR60
2.2/F_6
PC58 1000P/50V_4
6
VIN
22
VIN
4
GH
3
VCORE_VBST
BOOT
5
VSWH
13
VCORE_PHASE
VSWH
19
GL
20
GL
PGND
9
VCORE
Icc TDC PL2󶁪23A
Icc Max󶁪29A
OCP󶁪35A
Fsw󶁪800KHz
VCORE L/L󶁪󶁪󶁪󶁪
R_DC_LL󶁪2.1mV/A
R_AC_LL󶁪2.1mV/A
VCCGT
C C
PR61 *short_6
+5V_S5
VCCGT_VCC1
VCCGT_VCC2
PU13 AO Z5049QI
23
PVCC
24
VCC
1
PWM
2
FCCM
PU7 *GT3@AOZ5049QI
23
PVCC
24
VCC
1
PWM
2
FCCM
PC146
4.7U/10V_6
Rail B
PWM1_B<37>
FCCM_B<37>
B B
VCCGT = 1 phase for U22 , 󰵖󰵖󰵖󰵖󰵓󰵓󰵓󰵓󰸿󰸿󰸿󰸿 VCCGT = 2 phase for U23e , 󰵓󰵓󰵓󰵓󰸿󰸿󰸿󰸿
+5V_S5
Rail B
PWM2_B<37>
FCCM_B
PR228 *short_4
PR229 *short_4
PR62
*short_6
PC147
PR233 *GT3@0_4
PR234 *GT3@0_4
*GT3@4.7U/10V_6
6
VIN
22
VIN
4
GH
3
VCCGT_VBST1
BOOT
5
VSWH
13
VCCGT_PHASE1
VSWH
19
GL
20
GL
PGND
PGND
9
21
6
VIN
22
VIN
4
GH
3
VCCGT_VBST2
BOOT
5
VSWH
13
VCCGT_PHASE2
VSWH
19
GL
20
GL
PGND
PGND
9
21
*short_6
*short_6
PR223
PR230
PC47
10u/25V_8
PC142
0.1u/50V_6
PR57
2.2/F_6
PC55 1000P/50V_4
ISUMP_B<37>
ISUMN_B<37>
PC49
*GT3@10u/25V_8
PC143 *GT3@0.1u/50V_6
PR58 *GT3@2.2/F_6
PC56 *GT3@1000P/50V_4
ISEN1_B
PC152
+VIN_VCCGT
PC148
PC150
10u/25V_8
0.1U/50V_6
0.15uH_7X7X4
1 2
PR20 3.65K/F_6
PR19 *GT3@100K/F_6
PR17 10/F_6
2015/10/2 FAE Suggestion
+VIN_VCCGT
PC153
*GT3@10u/25V_8
*GT3@0.1U/50V_6
*GT3@0.15uH_7X7X4
1 2
PC48
2200P/50V_6
PL2
3
4
PC50
*GT3@2200P/50V_6
PL3
3
4
PR6304 *short_37
12
+
PC138
33U/25V_6x4.5
DCR=0.66mOhm
PC170
PC159
22u/6.3V_8
0.1u/16V_4
GT2 : PR19 Uns tuff
GT3 : PR19 CS4 1003F932 100K
PR18 *GT3@100K/F_4
DCR=0.66mOhm
PC160
PC166
*GT3@0.1u/16V_4
*GT3@22u/6.3V_8
VIN
+VCCGT
+
PC172
PC163
22u/6.3V_8
330u/2V_7343
GT2 : PR19 Uns tuff
GT3 : PR19 CS4 1003F932 100K
ISEN2_B <3 7>
+VCCGT
+
PC158
PC167
*GT3@22u/6.3V_8
*GT3@330u/2V_7343
VCCGT
Icc TDC PL2󶁪40A
Icc Max󶁪64A
OCP󶁪A
Fsw󶁪800KHz
VCCGT L/L󶁪󶁪󶁪󶁪
R_DC_LL󶁪2mV/A
R_AC_LL󶁪2mV/A
ISUMP_B
PR190 *GT3@3.65K/F_6
ISEN2_B
ISUMN_B
PR189 *GT3@100K/F_6
PR182 *GT3@10/F_6
PR188 *GT3@100K/F_4
GT2 : PR19 Uns tuff
GT3 : PR19 CS4 1003F932 100K
ISEN1_B <37>
A A
2015/10/2 FAE Suggestion
+VCCCORE<5,37>
VIN<23,26,27,32,33 ,34,35,36,37,39 ,40,41,42>
+VCCGT<5,37>
5
4
3
+5V_S5<2 1,30,33,36,37,3 9,41>
2
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
VCORE/VCCGT (ISL95808HRZ- T)
VCORE/VCCGT (ISL95808HRZ- T)
VCORE/VCCGT (ISL95808HRZ- T)
ZAA
ZAA
ZAA
38 48Friday, February 05, 2016
38 48Friday, February 05, 2016
38 48Friday, February 05, 2016
1
1A
1A
1A
Page 39
5
Dr-Bios.com
D D
4
3
2
1
VCCSA
+5V_S5
PR56 *short_6
VIN
VCCSA
PC151
4.7U/10V_6
C C
VCCSA_VCC
Rail C
PWM_C<37>
FCCM_C<37 >
B B
PR239 *short_4
PR240 *short_4
PU9 AOZ5029QI-5
23
PVCC
24
VCC
1
PWM
2
FCCM
PGND
PGND
9
21
VIN VIN
GH
BOOT
VSWH VSWH
6 22
PC54
10u/25V_8
PC157
10u/25V_8
PC156
PC53
0.1U/50V_6
2200P/50V_6
Icc TDC PL2󶁪5A
Icc Max󶁪5A
4 3
VCCSA_VBST
5 13
VCCSA_SW
19
GL
20
GL
*short_6
PR232
PC145
0.1u/50V_6
PR59
2.2/F_6
PL5
0.47uH_7X7x3
1 2
3
4
DCR=4.2mOhm
PC169
PC171
0.1u/16V_4
+VCCSA
22u/6.3V_8
PC165
22u/6.3V_8
OCP󶁪6A
Fsw󶁪800KHz
VCCSA L/L󶁪󶁪󶁪󶁪
R_DC_LL󶁪10.3mV/A
R_AC_LL󶁪10.3mV/A
PC57 1000P/50V_4
ISUMP_ C<37>
ISUMN_ C<37>
PR222 3.65K/F_6
PR221 10/F_6
+VCCSA<5,37>
VIN<23,26,27,32,33,34,35,36,37,38,40,41,42>
+5V_S5<21,30,33,36,37,38,41>
A A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Num ber Rev
Size Document Num ber Rev
Size Document Num ber Rev
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
VCCSA (ISL95808HRZ-T)
VCCSA (ISL95808HRZ-T)
VCCSA (ISL95808HRZ-T)
PROJECT :
ZAA
ZAA
ZAA
1A
1A
1A
39 48Friday, February 05, 2016
39 48Friday, February 05, 2016
39 48Friday, February 05, 2016
1
Page 40
5
Dr-Bios.com
4
3
2
1
PC81 1u/6.3V_4
PC70 *1u/16V_6
PR54
100K_4
PR137 *22_8
3
PQ4 *2N7002K
1
+5VPCU
PR68 *short_4
4
2
3 8 9
PC61
*0.1u/50V_6
PR153 Change t o 220 ohm for bo bo sound issue.
+5V+3V
PR153 *220_8
3
2
PQ10 *2N7002K
1
PU2 YB1282PSP8
VPP
VEN
VIN GND GND
1
PGOOD
6
VO
5
NC
ADJ
7
VFB=0.8V
Vo =0.8(1+R1/R2) =1.5V
+VCCIO
PR138 22_8
3
2
PQ5 2N7002K
1
R1
R2
2
PR53 100K_4
PR121 30K/F_4
PR119 34K/F_4
+2.5V
PR6298 *22_8
3
PQ6066 *2N7002K
1
+3V
HWPG_1.5V <31>
PR1247 *short_8
PC71 10u/6.3V_6
VIN
PR148 1M_6
MAIND
3
2
PQ3 2N7002K
1
+1.5V
+1.5V
1.5Volt +/- 5% TDC : 0.49A PEAK : 0.66A Width : 20mil
PC103 2200p/50V_4
ZRW Rev:D Stuff
MAIND <33,34,36>
+5VPCU
PR81
PC75
*0.1u/50V_6
*short_4
PU6 YB1282PSP8
4
VPP
2
VEN
3
VIN
8
GND
9
GND
PGOOD
VO
NC
ADJ
7
VFB=0.8V
D D
S5_ON<31,33>
C C
+3VPCU
PR1250 *short_8
PC76
10u/6.3V_6
PC79 1u/6.3V_4
PC77 *1u/16V_6
PR69 *short_4
PR75
100K_4
PC78
0.1u/50V_6
Thermal protection
Need fine tune for thermal protect point
Note placement position
TEMP=85C
S5_ON
B B
2
PQ13
DTC144EU
VLVL
Check PU high with HW Check PU high with HW
PR73 100K_4
1
6
PR156
R1
5
VIN
1 3
43.2K/F_4
PR133 34K/F_4
R2
Vo =0.8(1+R1/R2) =1.8V
PD4 DA2J10100L
PR152 1M_6
1
2
3
PQ12 AO3409
PR154 *short_6
+3V
HWPG_1.8VS5 <31>
PR1249 *short_8
PC80 10u/6.3V_6
+1.8V_S5
+1.8V_S5
1.8Volt +/- 5% TDC : 0.08A PEAK : 0.06A Width : 20mil
SYS_SHDN# <2,31,33>
MAINON_R<8,33,36>
MAINON_R
+3VPCU
MAINON_RS5_ON
PR1248 *short_8
2
1 3
PR147 *100K/F_6
PQ11 DTC144EU
PC65
10u/6.3V_6
VIN
MAINON_ON_G
PR151 1M_6
PR150 1M_6
PR37 *short_4
PC74
0.1u/50V_6
2
PR144 200K/F_4
PR146
PR262
10K/F_4_3435NTC
3
2
S5_ON
A A
PQ9 2N7002K
1
1.47K/F_4
LM393_PIN2
2.469V
PR145 200K/F_4
3
2
5
6
84
+
-
+
-
1
PU4A AS393MTR-E1
7
PU4B AS393MTR-E1
PC104
0.1u/50V_6
PR155 200K_6
PC102
0.1u/50V_6
3
2
PQ14 2N7002K
1
For EC control thermal protection (output 3.3V)
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
PROJECT :
+1.8V/+1.5V/Thermal Protect
+1.8V/+1.5V/Thermal Protect
+1.8V/+1.5V/Thermal Protect
ZAA
ZAA
ZAA
40 48Friday, February 05, 2016
40 48Friday, February 05, 2016
1
40 48Friday, February 05, 2016
1A
1A
1A
Page 41
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Dr-Bios.com
D D
1658R-EN
PR276 EV@100K/F_4
3V_MAIN_PWGD<16,42>
VGPU_EN<4>
DGPU_PSI<17>
PWM-VID<17>
1658R-VREF
VIN
DGPU_PSI
PWM-VID
Double Check OCP SETTING
PR270 EV@13K/F_4
PC227 *EV@0.01U/50V_4
1 2
PR260 *EV@1/F_4
PR345 *short_4
PR253 *EV@0_4
PR255 *short_4
PR256 *short_4
1 2
PC206 EV@1u/10V_4
PR275
*EV@499K/F_4
Check PU High with HW side
PC187
R1
PR106
EV@20K/F_4
EV@2700P/50V_4
2
12
PC200
3
1
12
C
PR105 *EV@5.1K/F_4
PQ18 *EV@2N7002K
PR113
EV@20K/F_4
PR115
EV@2K/F_4
PR114
EV@18K/F_4
PR112
EV@0_4
R2
R3
R4
R5
+VGPU_CORE
C C
+3V_S5
DGPU_PSI
PR104 *EV@10K_4
PR102 *EV@0_4
+3VPCU
PR101 *EV@10K_4
Phase Number of Operation
PWM-SVID : Config B Check PWM-SVID by SKU
B B
Standby Function
*EV@1u/10V_4
4
PR268 EV@24.9K/F_4
PU19
9
1658R-OCS/CB
1658R-EN
1658R-PSI
1658R-VID
1658R-VREF
1658R-REFADJ
1658R-REFIN
OCS/CB
3
EN
4
PSI
5
VID
8
VREF
6
REFADJ
7
REFIN
PC178
*EV@0.01U/50V_4
12
PC110
*EV@22P/50V_4
+5V_S5
PR143 *short_6
1658R-PVCC
18
PVCC
UGATE1
PHASE1
LGATE1
EV@UP1658RQKF
UGATE2
PHASE2
LGATE2
FB
GND
11
21
1658R-FB
TP4363
PR277 *short_4
BOOT1
BOOT2
PGOOD
COMP
FBRTN
12
PC195 EV@1u/10V_4
1
1658R-BOOT1
2
1658R-UGATE1
20
1658R-PHASE1
19
1658R-LGATE1
15
1658R-BOOT2
14
1658R-UGATE2
16
1658R-PHASE2
17
1658R-LGATE2
13
1658R-PG
12
1658R-COMP
10
TP4362
1658R-FBRTN
PR279 *short_4
PR118
EV@16K/F_6
12
PC199
EV@4700P/25V_4
1 2
PR259 EV@10K_4
PR252 *short_4
12
PC221
EV@22P/50V_4
3
1658R-BOOT1
EV@0.22u/25V_6
1658R-UGATE1
1658R-PHASE1
1658R-LGATE1
+3V
GPU_PWR_GD <14>
1658R-BOOT2
EV@0.22u/25V_6
1658R-UGATE2
1658R-PHASE2
1658R-LGATE2
PR96 EV@2.2/F_6
PR95
EV@2.2/F_6
PC253
PC182
PQ33 EV@AON6414AL
PQ27 EV@AON6752
PQ30 EV@AON6414AL
PQ34 EV@AON6752
2
PQ41
5
4
213
5
4
213
EV@AON6414AL
5
4
213
5
4
213
PQ42 EV@AON6752
PC184
EV@2200p/50V_4
EV@0.36uH_10X10X4
PR89 EV@2.2/F_6
PC188 EV@1000p/50V_6
PL9
PC251
EV@0.1u/50V_6
PC86
EV@10u/25V_8
DCR=1.2m ohm
PC191
EV@0.1u/16V_4
1
VIN
12
PC254
EV@10u/25V_8
+
PC190
PC201
EV@10u/6.3V_8PC211
EV@330u/2V_7343
+
PC224
*EV@33U/25V_6x4.5
+VGPU_CORE
+
PC328
EV@330u/2.5V_6X4.2
RDSon=2.5mohm
VIN
PQ43 EV@AON6414AL
5
4
213
5
4
213
5
4
213
5
4
213
PQ44 EV@AON6752
PC209
EV@2200p/50V_4
EV@0.36uH_10X10X4
PR91 EV@2.2/F_6
PC183 EV@1000p/50V_6
PL10
PC179
EV@0.1u/50V_6
PC220
EV@10u/25V_8
DCR=1.2m ohm
PC192
PC193
EV@0.1u/16V_4
EV@10u/25V_8
+VGPU_CORE
+
+
PC186
PC204
EV@10u/6.3V_8
EV@330u/2V_7343
EV@330u/2.5V_6X4.2
PR84 *EV@100_4
VGA_VCCSENSE<14>
VGA_VSSSENSE<14>
PR163 *short_4
PR162 *short_4
PR85 *EV@100_4
Parallel
A A
5
4
Component Value
R1
R2
R3
R4
R5
C
Config B
20K
20K
2K
18K
0-ohm
2.7nF
3
RDSon=2.5mohm
2
N16P-GX(40W/GDDR5)
OpenVR Config:B
+VGPU_CORE Countinue current:51.1A Peak current:87A OCP:112A FSW:300KHz L/L=0mV/A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Friday, February 05, 2016 41 48
Date: Sheet of
Friday, February 05, 2016 41 48
Date: Sheet of
Friday, February 05, 2016 41 48
PROJECT :
+VGPU_CORE(UP1658RQKF)
+VGPU_CORE(UP1658RQKF)
+VGPU_CORE(UP1658RQKF)
\##
\##
\##
1
1A
1A
1A
Page 42
5
Dr-Bios.com
+1.05V_GFX<14,15,16> +3V_GFX<14,16,17,31> +1.35V_GFX<15,19,20>
Check PU High with HW side
D D
TP76
+3VPCU
HWPG_1.05 VGFX
PR318 *EV@100K/F_4
PC246
4
+3V
PC304
PR317
EV@0.01U/50V_4
554PG_0.95V
*short_4
PR312 EV@10/F_6
PC249
PC252
EV@10U/6.3V_6
EV@1U/6.3V_4
*EV@2200P/50V_4
PU18
4
PG
9
PVIN
10
PVIN
8
SVIN
11
GND
EV@RT8068AZQW
PR319
*EV@2.2/F_6
NC
LX
LX
NC
FB
EN
1
2
3
7
6
5
3
554LX_0.95V
554NC_0.95V
554FB_0.95V554SVIN_0.95V
554EN_0.95V
PC300
*EV@0.1u/16V_4
PL14
EV@1uH_7X7X3
PC301
*EV@22P/50V_4
PC247
*EV@68P/50V_4
PR321
*short_4
554FB_0.95V_S
R1
R2
3V_MAIN_PWGD
PR311
PR310 EV@7.5K/F_4
PR309 EV@10K/F_4
2
*short_4
PC302
PC303
EV@22U/6.3V_6
EV@0.1U/16V_4
Vo=0.6*(R1+R2)/R2
3V_MAIN_PWGD <16,41>
+1.05V_GFX TDC : 2.18 A PEAK : 2.9A Width : 100mil
+1.05V_GFX
1
VIN
C C
DGPU_PWR_EN<4>
PR160 *short_4
PC109
*EV@1u/10V_4
12
PR158 EV@100K_4
2
PQ15
1 3
EV@PDTC143TT
PR159 EV@1M_6
PR157 EV@1M_6
+3V_GFX
PR164 EV@22_8
3
2
PQ17 EV@2N7002K
1
PR161 EV@1M_6
DGPU_D
3
2
EV@2N7002K
1
PC113 *EV@2.2n/50V_4PQ 16
+3VPCUVIN
3
2
PQ19 EV@AO3404
1
+3V_GFX
+3V_GFX TDC : 0.26 A PEAK : 0.34A Width : 20mil
+1.35V_GFX for GDDR5
PU22
7
G5335-PFM
G5335-EN
G5335-SS
NC
21
VCC
1
PGOOD
3
PFM
2
EN
23
SS
EV@G5335QT2U
+5VPCU
PR111 EV@10/F_6
B B
HWPG_1.35 VGFX<16>
G5335-AGND
FBVDDQ_EN<14>
A A
PR296 EV@100K/F_4
+5VPCU
PR103 * EV@0_4
PR122 * short _4
+3V
PR110 *sh ort_4
PR109 *sh ort_4
Pulse-Skipping mode
*EV@0.047U/10V_4
EV@0.047U/10V_4
PC293
PC92
G5335-VCC
PC280 EV@10U/6.3V_6
G5335-PWRGD
G5335-AGND
G5335-AGND
PGND
PGND
PGND
PGND
PGND
AGND
8
IN
9
IN
22
IN
24
6
20
10 11 16 17 18 25
12
13
14
15
19
4
5
G5335-TON
G5335-BST
G5335-LX
G5335-FB
G5335-AGND
Fsw=550KHz
PR116 EV@73.2K/F_4
PR123 EV@2.2/F_6
G5335-AGND
PR117 *short_4
PC289 EV@0.1U/25V_6
PC292 *EV@0.01U/25V_4
PR120 *EV@4.7_6
PC290 *EV@680p/50V_6
IN
TON
BST
LX LX LX LX LX LX
FB
PL18
EV@0.68uH_7X7X3
1 2
PC291
*EV@0.1U/25V_4
PC277
PC276
EV@10u/25V_8
EV@2200p/50V_6
PC278
EV@22U/6.3V_6
PC281
PC273
EV@22U/6.3V_6
EV@22U/6.3V_6
VIN
PC279
EV@22U/6.3V_6
VFB=0.8V
+1.35V_GFX
1.35 Volt +/- 5% TDC : 8.55 A PEAK : 11.4A Width : 360mil
+1.35V_GFX
PC282
EV@22U/6.3V_6
*EV@22U/6.3V_6
PC287
EV@0.1U/16V_4
*EV@22U/6.3V_6
PC288
PC275
R1
PR108 EV@14K/F_4
PC274
*EV@1000P/50V_4
R2
Vo=0.8*(R1+R2)/R2 =1.35V
G5335-AGND
PR100 EV@20K/F_4
5
4
3
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Friday, February 05, 2016 42 48
Date: Sheet of
Friday, February 05, 2016 42 48
Date: Sheet of
2
Friday, February 05, 2016 42 48
PROJECT :
+1.35V_GFX/+1.05V_GFX/+3V_GFX
+1.35V_GFX/+1.05V_GFX/+3V_GFX
+1.35V_GFX/+1.05V_GFX/+3V_GFX
\##
\##
\##
1
1A
1A
1A
Page 43
1
Dr-Bios.com
VGA power up sequence
2
3
4
5
6
7
8
SKYLAKE PCH
GPP_B17
A A
+3VPCU
DGPU_PWR_EN
MOSFET
+3V_GFX
3V_MAIN_EN (GPU GPIO5)
MOSFET
3V_MAIN_PWGD
PG
+3V_MAIN
+1.05V_S5
3V_MAIN_PWGD
MOSFET +1.05V_GFX
PWM-VID (GPU GPIO11)
B B
VIN
3V_MAIN_PWGD
PWM
VGPU_PWRGD
+VGPU_CORE
VIN
OR Gate
FBVDDQ_EN
PWM
+1.35V_GFX
HWPG_1.35VGFX VGPU_PWRGD
DGPU_PWROK
EC_FB_CLAMP(EC)
GC6_FB_EN (GPU GPIO0 )
C C
GPP_B19
VGA Reset
PCH
PLTRST#
DGPU_HOLD_RST#
PEGX_RST#
PEX_RST timing
D D
I/O 3.3V
PEX_RST
Trise >= 1uS Tfail <=500nS
1
2
3
All 3.3V
NVVDD
PXE_VDD +1.05V
FBVDDQ
t>0
t>0
N15x Power on sequance
Notes: -All 3.3V includes all rails powered at 3.3V
-PEX_VDD 1.05V inculdes all rails that are shared
4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
5
6
Date: Sheet of
7
PROJECT :
GPU PWR CRL
GPU PWR CRL
GPU PWR CRL
ZAA
ZAA
ZAA
43 48Friday, February 05, 2016
43 48Friday, February 05, 2016
43 48Friday, February 05, 2016
8
1A
1A
1A
Page 44
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Dr-Bios.com
Battery Mode
Non Deep Sx
MAINON
+5V
+3V
+VCCIO
MAINON
9
8
21
22
17
21
11
10
12
21
8
18
19
23
24
28
27
29
24
12
2929
HWPG_VDDR
HWPG_1V_S5
HWPG_1.5V
PG
MAINON
SUSON
PG
+5V_S5
+3V_S5
S5_ON
+1.35VSUS
+VDDQ
+VDDQ_VTT
HWPG_VDDR
26
+1.5V
HWPG_1.5V
+5VPCU
3
+3VPCU
D D
3
S5 PWR
VIN
1
DDR VDDQ VR
S3
S5
C C
3
DDR_VTTT_PG_CTRL
+3VPCU
1.5V VR
EN
RUN PWR
B B
A A
+5VPCU
3
+3VPCU
3
9
+1V_S5
MOS1
MOS2
MOS3
G
VIN
1
+1V_S5
VR
EN
PG
+1V_S5
+1V_S5
HWPG_1VS5
4
VIN
3V/5V
VR
EN2
1
VL
+15V
EN1
NBSWON#
3 3
+3VPCU +5VPCU
5V_LDO
2
PWR BTN
7
30
HWPG
VRON
EC_PWROK
31C
32b
SVID
+1VSUS
VIN
1
IMVP VR
0 ohm
EN
PG
+1V_VCCST
+VCC_CORE
+VCCSA
+VCCGT
IMVP_PWRGD
VRON
33
33
33
34
32a
2
4
EC
MAINON
1721
SUSON
9
3
S5_ON
+1V_S5_ON
8
6
DPWROK
13
RSMRST#
14
ACPRESENT
DNBSWON#
15
SUSC#
SUSB#
PCH_SUSACK#
PCH_SUSPWARN#
PCH_SLP_SUS#
31b
PCH_PWROK
35
38
31C
31C
12
31b
36
16 20
IMVP_PWRGD
EC_PWROK
EC_PWROK
HWPG_1VS5
PCH_PWROK
SYS_PWROK
HWPG+1ms
2
Delay DSW power well 10ms
VCCST_PWRGD
31a
31C
EC_PWROK
PCH_CLK
PLTRST#
VCCST_PWRGD_EN
36
SYS_PWROK
10K ohm
1
CHARGER
DPWROK
RSMRST#
ACPRESENT
PWRBTN#
SLP_S4#
SLP_S3#
SUSACK
SUSWRAN
SLP_SUS#
VCCST_PWRGD
PCH_PWROK
PLTRST#
SYS_PWROK
38
PLTRST#
PROCPWRGD
SVID
SVID
37
BAT-VVIN
Battery
+3VPCU or +3V_S5
RESET#
DDR_PG_CTRL
22
3
DSW PWR
VCCPRIM PWR
VCCMPHY PWR
PCH
VCCSRAM PWR
VCCPGPPA PWR VCCPGPPB PWR VCCPGPPC PWR VCCPGPPD PWR VCCPGPPE PWR VCCPGPPG PWR VCCPGPPF PWR
CORE PWR
CPU
VDDQ PWR
VCCST PWR
SM_PG_CNTL1
VCCST_PWRGD
IMVP_PWRGD
VCCST_PWRGD_EN
34
HSIO PWR
CORE PWR
VR_READY
1
SPI PWR
PLL PWR
HDA PWR
VR_ENVRON
32a
+1V_S5
+1V_S5
+1.8V_S5
V1_MPHY
V1_MPHY
+1V_S5
+1V_S5
+1.5V
+3V_S5
+1.8V_S5
+VCCIN
+1.35VSUS
+1V_VCCST
37
CPU
5
4
3
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
Power Sequence
Power Sequence
Power Sequence
ZAA
ZAA
ZAA
44 48Friday, February 05, 2016
44 48Friday, February 05, 2016
44 48Friday, February 05, 2016
1
1A
1A
1A
Page 45
5
Dr-Bios.com
4
3
2
1
Skylake U Non-Deep Sx Platform Power on sequence
D D
C C
B B
A A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
5
4
3
PROJECT :
PROJECT :
Size Document Nu mber Rev
Size Document Nu mber Rev
Size Document Nu mber Rev
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
PROJECT :
Power on Sequence
Power on Sequence
Power on Sequence
ZAA
ZAA
ZAA
45 48Friday, February 05, 2016
45 48Friday, February 05, 2016
1
45 48Friday, February 05, 2016
2A
2A
2A
Page 46
5
Dr-Bios.com
4
3
2
1
󱬯󱬯󱬯󱬯󳴣󳴣󳴣󳴣󴞱󴞱󴞱󴞱defult 󴖤󴖤󴖤󴖤󳴣󳴣󳴣󳴣󴞱󴞱󴞱󴞱reserve
+5V_S5
SYS_HWPG
D D
EN1
EN1
5V
3V
PWRGDSYS_SHDN#
TPS51225
Vin
S5_Vout
S3_Vout
+5VPCU
+3VPCU
VIN
C C
PCH
HWPG_1VS5
PWRGD
VIN
B B
EC
Vin
+1V_S5_ON
+1.0V_S5
RT8237CZQW
EN
Vout
+1V_S5
EC
HWPG_VDDR
EC
MAINON
A A
EC
DDR_VTTT_PG_CTRL
S5 EN
S3 EN
PWRGDSUSON
+1.2VSUS
G5316RZ1D
Vin
S5_Vout
S3_Vout
+1.2VSUS
+VDDQ_VTT
+VDDQ
PCH
VIN
5
4
S5_ON
MAINON_R
S5_ON
MAINON_R
3V_MAIN_PWGD
dGPU_PWR_EN
MAIND
SUSON
+3V_S5
APL3523A
APL3523A
RT8068AZQW
AO3404
MDV1528Q
AO3404
Vin
S5_ON
SUSON
+1.8V_S5
PWRGD
G9661
EN
+5V
+3V_S5
+3V
+1.05V_GFX
+3V_GFX
+VCCIO
+1V_SUS
G5719
HWPG_1.8VS5
Vout
3
+2.5V_SUS
+1.8V_S5
VIN
VRON
SVID
VIN
VRON
SVID
VIN
VRON
SVID
VIN
VIN
+3V_PCU
3V_MAIN_PWGD
FBVDDQ_EN
+VCC_CORE
Vin
ISL95 859HR TZ-T
+VCCSA
Vin
ISL95 859HR TZ-T
+VCCGT
Vin
ISL95 859HR TZ-T
2
Vin
Vin
IMVP_ PWRGD
PWRGD
IMVP_ PWRGD
PWRGD
IMVP_ PWRGD
PWRGD
Vin
MAINON_R
PWRGD
+1.5V_GFX
RT8237
PWRGD
VGPU Core
up1658
EN
HWPG_1.35VGFX
EN
VIN
VIN
VIN
PWRGD
+1.5V
G9661
EN
VGPU_PWRGD
Vout
Vout
Vin
PWM_A FCCM_A
Vin
PWM_C FCCM_C
Vin
PWM1_B FCCM_B
HWPG_1.5V
Vout
+VGPU_CORE
+1.35V_GFX
AOZ5029QI
EN
AOZ5029QI
EN
ISL95 808
EN
Vout
Vout
Vout
+VCCCORE
+VCCSA
+VCCGT
+1.5V
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
PROJECT :
SKL PCH PWR CONTROL
SKL PCH PWR CONTROL
SKL PCH PWR CONTROL
ZAA
ZAA
ZAA
46 48Friday, February 05, 2016
46 48Friday, February 05, 2016
1
46 48Friday, February 05, 2016
1A
1A
1A
Page 47
1
Dr-Bios.com
2
3
4
5
6
7
8
+3V_S5
+3V
SDRAM
2.2K2.2K
R7
A A
SMB_PCH_CLK
R8
SMB_PCH_DAT
+3V
2N7002DW Level shift
CLK_SCLK
CLK_SDATA
2.2K2.2K
G-Sensor
XDP
Skylake U
+3V_S5
B B
R9
VGA_MBCLK
W2
VGA_MBDATA
+3V_S5
*2.2K*2.2K
W3
SMB_ME1_CLK
V3
SMB_ME1_DAT
+3V_S5
2.2K2.2K
+3V_S5
*2N7002DW Level shift
+3V_GFX
C C
2ND_MBCLK
115
2ND_MBDATA
116
00
2.2K2.2K
2.2K2.2K
+3V_MAIN
2N7002DW Level shift
GFX_SCL
GFX_SDA
VGA
EC
IT8987CX
D D
110
MBCLK
111 MBDATA
1
2
3
+3VPCU
4.7K4.7K
CHARGER
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
4
5
6
Date: Sheet of
7
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
SMBUS Block Diagram
SMBUS Block Diagram
SMBUS Block Diagram
ZAA
ZAA
ZAA
47 48Friday, February 05, 2016
47 48Friday, February 05, 2016
47 48Friday, February 05, 2016
8
1A
1A
1A
Page 48
5
Dr-Bios.com
Model
B-CHANGE
B0. Change FP from 0201 to 0402; C689,C688,C683,C194,C241,C227,C216,C242,C205,C252 for RDC request. B1. Change CN95, CN6, CN20,CN2019, CN7,JDIM1, JDIM2,CN10 of foot-print B2. Page 33 Mount PR6296, remove PR6295 for EC can't boot issue B3. Page 12 Delete R11170, mount R11133 for DDR4's SPD B4. Page 13 Delete R11174, mount R11134 for DDR4's SPD
D D
B5. Page 27 Change POA IC U1006's P/N. (AL000103006) B6. Page 28 Change CN23's P/N--- 5H; Reserve R11284 B7. Page 25 change R247 value from 0 to 2.2 Ohm (CS-2204FA00); Change R251, R262, R269, R11265 footprint from 0603 to 0805 (LAN)--(CS07504FA11) B8. Page 2 Mount R485 for THRMTRIP# B9. Page 17 Change R4314 & R4306 of value for KA/KB B10. Page 6 Mount Q6060 for CMOS issue B11. Page 31 Swap U45 Pin81 & Pin32 for DAC Fan; Add D4015 for ESD; Reserve R11282 for battery B12. Page 6 R512 Change P/N from 5% to 1 % (CS22702FB14) B13. Page 8 IOAC setting change into none IOAC R598 mount , R599 remove. B14. Page 29 Delete R328,R11109,R327,R347,R346,C4716,C4718,C4717,C4558 & Q6061; Add C321,C723,C728,C719,R218 & U12 for DAC Fan; Change CN8's P/N B15. Page 29 Change KB/BL connector CN's FP,P/N. (DFFC04FR111) & remove CN2018 for ME request B16. Page 29 Chage CP1~CP6 into 0402 size, from C4788~C4811 B17. Page 26 Change Speaker connector CN18's FP,P/N. (DFHD04MR176) B18. Page 26 Modify U16,U4512 pin2 to +3V , then off U16 & U4512 B19. Page 15 Change C4117,C4118 from 22U into 10U, and Add C4815, C4812 (10U-0402) for layout speace. B20. Page 18 Change C4423,C4426 from 22U into 10U, and Add C4813, C4814 (10U-0402) for layout speace. B21. Page 31 Change SW4's P/N & FP; Add R1283 for EC AUTO RECOVERY. B22. Page 28 Change Hole16's P/N & FP, Add Hole25, Hole26 for ME modify ; Add R11284 B23. Page 5 Change C202 value from 47U to 22U & add C4816 B24. Page 23 Change R11268,R11271 from 33 to 47 Ohm ; Change L5,L6,L7's P/N; Not mount C718,C716,C319,C333,C336 B25. Page 32 Change PJ3's FP B26. Page 30 Change U22's FP B27. Page 24 Change CN12's FP B28. Page 4 Change C739 from 10 to 22P & mount for EMI request B29. Page 21 Add C4817 & C4818 for EMI request
C C
B30. Page 2 Change R577 & R152 power to +3V_S5 for leakage B31. Page 8 Change R211 power to +3V_S5 for leakage B32. Page 22 Add R11285, R11286(reserve) B33. Page 21 Cancle co-layout R11225,R11226,R11227,R11228,R11229,R11230,R11231 & R11232. B34. Page 14 Change C356 & 362 for vendor recommend B35. Page 24 Mount R11277, Remove R11274 change to -4db
Power-CHANGE
B36. Page 33 Delete JP18, JP20 ,PR248,PR249,PR6127,PR6219,PR345,PR244,,PR247,PR246,PR266,PR272 B37. Page 34 Delete JP9 B38. Page 35 Delete JP16 B39. Page 36 Delete JP22,JP29 B40. Page 37 Change PR225,PR224's value from 10k to 13.7K; Add SP@ at PR194,PR203,PR207,PR202 B41. Page 38 Delete JP24, change JP25 to PR6304 B42. Page 39 Delete JP26 B43. Page 40 Delete PR6298,PQ6066,PR137,PQ4,PR153,PQ10; Change PU2 & PU6's P/N for ESD. B44. Page 41 Delete JP34 B45. Page 42 Delete JP10,JP35 B46. Change DDR solution to RT8231B

Change +1V_S5 solution to G5335

Change +1.35V_GFX solution to G5335

Revise LDO P/N to AL001282000 (YB1282PSP8)

LDO (PU2 & PU6) Pin4 adding 1u/6.3 B47. Page 37 Change PC10, PC20, PR192,PC28,PR211,PR220 & PC39 of value. B48. Page 25 Add R6308
B B
C-CHANGE C1. Change 0 Ohm to short pad & remove JP, R11,R14,R15,R28,R66,R67,R11129,R102,R194,R224,R229,R235,R790,R791,R792,R11111,R11112,R11113,R11140,R112,R135,R179,R180,R182,R185,R187, R188,R192,R193,R198,R240,R252,R11131,R164,R246,R339,R350,R11185,R11186,R550,R657,R718,R721,R782,R11153,R11283,R795,R796,R797,R816, R817,R818,R819,R820,R821,R11196,R11199,R11202,R11207,R11279,R11280,R11281,R948,R951,R956,R958,R959,R960,R11061,R11062,R11110,R11133, R11134,R11136,R11137,R11138,R11139,R11141,R11253,R11254,R11255,R11256,R11267,R11270,PR257,PR263,PR267,PR274,PR281,PR82,PR83,PR94. PR87,PR254,PR264,PR109,PR110,PR117,PR122,JP8,JP10,JP14,JP15,JP17,JP22,JP33,JP19,JP21 R4328,R4335,R2855,R2870,R318,R221,R403,R405,R742,R743,R725,R745,L19,R2872
C2. Page 31 remove SW2 -- power bottom C3. Page 29 Change CN20 & CN2019 K/B connector of P/N C4. Page 27 Delete Q76, R11288; Add C4819, R11290 ,R11291,R11298,R11299,R11302,R11303,R11300,R11301,R11292,R11293,R11294,R11295 for co-layout POA & PBA ; Reseeve EC52,EC53,R11289 & R11287 C5. Page 21 remove R11193, double mount at type-C C6. Page 32 for power request change short pad to 10 Ohm, location PR209 & PR210; Change PC115 of value C7. Page 8 remove R618, it can't mount, because none device. C8. Page 38 mount PC138 -- power request.
Date
CHANGE LIST
4
3
2
1
A A
U12,Q31,PR192
Quanta Computer I nc.
Quanta Computer I nc.
Quanta Computer I nc.
PROJECT :
ZAA
PROJECT :
ZAA
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Change list
Change list
Change list
ZAA
48 48Friday, February 05, 2016
48 48Friday, February 05, 2016
48 48Friday, February 05, 2016
5
DOC NO.
1A
1A
1A
PROJECT MODEL :
PART NUMBER: DRAWING BY: REVISON:
ZWA
APPROVED BY:
4
DATE:
3
2
1
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