Acer ASPIRE E5-523G Schematics
5
4
3
2
1
ZAB/ZAB A,B/ZYJA BLOCK DIAGRAM
DDR4-SODIMM1
P9
D D
DDR4-SODIMM2
P10
SATA - HDD
SATA - ODD
USB3 Con.
C C
USB3 Con.
P27
P27
P26
P
26
USB3 Type-C Con.
MUX
P28
B B
17" only
USB2 CONN
USB2 CONN
Phone Jack
P28
CC
P28
Azalia
AUDIO CODEC
ALC255-CG
A A
Speaker DMIC
P24 P24
5
P24
Channel A (TYP1)
Channel B (TYP1 & 3)
USB Charger
SLGC55544VTR
USB Redriver
POA
P31
I/O Board
FFC CONN
P27
SATA 0
SATA 1
USB2 - 6
USB3 - 2
USB2 - 5
P27
USB3 - 1
USB2 - 7
USB3 - 3
P28
USB2-4 (CCD)
USB2-5 (WLAN/BT)
USB2-3
USB2-0 & USB2-1
LED
P28
4
PCIE 0~3 (TYP1 & 3)
PCIE 4~7 (TYP1)
IMC
FP4
TDP: 15 W
PEG
TX/RX
Carrizo
(15h) 60h-6Fh
SATA0
Bristol
(15h) 65h-6Fh
I2C-0 (Touchpad)
I2C-1 (Touch Screen)I2C
STONEY
(15H) 70h-7Fh
SATA1
DP0
DP0
ROM 128 kB
3.3 V
X'TAL
32.768 kHz
X'TAL 48 MHz
BATT
P7
Repeater
DP1
USB3.0
USB2.0
CLK
HDA
APU
BGA 968
P2,3,4,5,6,7,8
LPC
DP1
DP2
DP2
GPP
SPI
RTC
SMBUS
EC
IT8987E/BX
K/B CONN
K/B BL CONN
P30 P18 P30 P29
P30
HALL SENSOR
FAN CONN
(DAC)
3
P19
P23
SPI ROM 8MB
1.8 V
G-Sensor
P25
PS/2
P32
Touch Pad
CONN
R16M GPU
R16M-M1-70 25W
R16M-M1-30 25W
DP to VGA
ASM 1061
P23
P6
NPCT650
ROM 128 kB
I2C-0 (TYP1&3)
S3_23mm X 23mm
P11,12,13,14,15
USB2-2 (Touch)
USB2-4 (CCD)
P20
X'TAL
20 MHz
GPP2
GPP1
USB2-2
GPP0
TPM
P25
P32
3.3 V
CZ@ :CARRIZO/BRISTOL (TYP1)
CZL@ :CARRIZO-L (TYP2)
TYP3@: STONEY
TYP13@ : CZ/BR & ST
TYP12@ : CZ/BR & CZL
TYP23@ : CZL & ST
2
1 channel,dual-rank
X'TAL
27 MHz
eDP/TS/CCD Con.
HDMI Con.
CRT Con.
M.2
SSD
LAN+Card Reader
RTL841B
X'TAL
25 MHz
P23
M.2
WLAN+BT w/ Debug
P16, P17
VRAM DDR3_256 Mb x16 *4 pcs = 2 GB
VRAM DDR3_256 Mb x16 *8 pcs = 4 GB
P18
P19
P20
P22
P21
Reset Button
P30, 32
BQ24737
Batery Charger
RT6575
3V/5V
RT8237
0.95V
G5316
+1.2VSUS
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Friday, January 29, 2016
Date: Sheet of
Friday, January 29, 2016
Date: Sheet of
Friday, January 29, 2016
VRAM
CZ@: CARRIZO/BRISTOL (TYP1)
SP@: special part
SP15@: 15" only
SP17@: 17" only
I2CT@: I2C TS
EV@ : GPU
Meso@: R16M-M1-70 GPU
Exo@ : R16M-M1-30 GPU
EV_SP@: GPU special part
EV_4G@: 8 pcs VRAM
TPM@ :TPM
GS@ :G-sensor
HDT@ : Debug
KBL@ :KB Backlight
IOAC@ :IOAC
NAC@:non-IOAC
FPD@ : POA
SSD@ : SSD
SRD@: SATA's Redriver
URD@: USB3's Redriver
RP@: HDMI Repeater
NRD@: no HDMI RPTR
TYP_C@: Type C solution
CRD@: Type-C's usb redriver
RJ45 CONN
C.R. CONN
P33
P34
P35
P36
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
Block Diagram
Block Diagram
Block Diagram
P21
P21
ZAB
ZAB
ZAB
1 45
1 45
1 45
P37, P38
ISL62771
CPU CORE / VDDNB
RT8068
1.8V
ISL62771
VGPU CORE
RT8068
GPU_POWER / VDDC_GFX
1
P39
P40
P41
1A
1A
1A
1
2
3
4
5
6
7
8
(CPU)
2
A A
LAN
WLAN
SD
1.05V VDDP only for CZ with DDR-2133 memory
If running DDR-1866 or slower memory,
Platform VDDP should be set to 0.95V
B B
TYP13: (196R_CS11962FB00)
CZL:(1.69K_CS21692FB01)
X4 : TYP3 (GEN3)
X4 : TYP2 (GEN2)
X8 : TYP1 (GEN3)
C C
VDDP_0.95V
PEG_RXP0[11]
PEG_RXN0[11]
PEG_RXP1[11]
PEG_RXN1[11]
PEG_RXP2[11]
PEG_RXN2[11]
PEG_RXP3[11]
PEG_RXN3[11]
PEG_RXP4[11]
PEG_RXN4[11]
PEG_RXP5[11]
PEG_RXN5[11]
PEG_RXP6[11]
PEG_RXN6[11]
PEG_RXP7[11]
PEG_RXN7[11]
PCIE_RXP0[21]
PCIE_RXN0[21]
PCIE_RXP1[22]
PCIE_RXN1[22]
PCIE_RXP2[23]
PCIE_RXN2[23]
R440 196/F_4
P_TX_ZVDD_095 P_RX_ZVDD_095
U10
P10
L10
U9
T6
T5
T9
T8
P7
P6
U7
P9
N6
N5
N9
N8
L7
L6
L9
K6
K5
K9
K8
J7
J6
U31B
P_GPP_RXP[0]
P_GPP_RXN[0]
P_GPP_RXP[1]
P_GPP_RXN[1]
P_GPP_RXP[2]
P_GPP_RXN[2]
P_GPP_RXP[3]
P_GPP_RXN[3]
P_ZVDDP
P_GFX_RXP[0]
P_GFX_RXN[0]
P_GFX_RXP[1]
P_GFX_RXN[1]
P_GFX_RXP[2]
P_GFX_RXN[2]
P_GFX_RXP[3]
P_GFX_RXN[3]
P_GFX_RXP[4]
P_GFX_RXN[4]
P_GFX_RXP[5]
P_GFX_RXN[5]
P_GFX_RXP[6]
P_GFX_RXN[6]
P_GFX_RXP[7]
P_GFX_RXN[7]
PCIE
P_GPP_TXP[0]
P_GPP_TXN[0]
P_GPP_TXP[1]
P_GPP_TXN[1]
P_GPP_TXP[2]
P_GPP_TXN[2]
P_GPP_TXP[3]
P_GPP_TXN[3]
P_ZVSS/P_RX_ZVDDP
P_GFX_TXP[0]
P_GFX_TXN[0]
P_GFX_TXP[1]
P_GFX_TXN[1]
P_GFX_TXP[2]
P_GFX_TXN[2]
P_GFX_TXP[3]
P_GFX_TXN[3]
P_GFX_TXP[4]
P_GFX_TXN[4]
P_GFX_TXP[5]
P_GFX_TXN[5]
P_GFX_TXP[6]
P_GFX_TXN[6]
P_GFX_TXP[7]
P_GFX_TXN[7]
R1
R2
R4
R3
N1
N2
N4
N3
U6
M2
M1
L1
L2
L4
L3
J1
J2
J4
J3
H2
H1
G1
G2
G4
G3
PCIE_TXP0_C
PCIE_TXN0_C
PCIE_TXP1_C
PCIE_TXN1_C
PCIE_TXP2_C
PCIE_TXN2_C
PEG_TXP0_C
PEG_TXN0_C
PEG_TXP1_C
PEG_TXN1_C
PEG_TXP2_C
PEG_TXN2_C
PEG_TXP3_C
PEG_TXN3_C
PEG_TXP4_C
PEG_TXN4_C
PEG_TXP5_C
PEG_TXN5_C
PEG_TXP6_C
PEG_TXN6_C
PEG_TXP7_C
PEG_TXN7_C
AC-coupling capactior(depend on GenX, not TYPE)
TYP1&3:(220nF)CH4222K9B04: Only Gen3 and Both of Gen2&3
TYP2 :(100nF)CH4103K1B08: Only Gen2
TYP2 no Gen3
C628 0.1U/16V/X7R_4
C629 0.1U/16V/X7R_4
C621 0.1U/16V/X7R_4
C622 0.1U/16V/X7R_4
C626 0.1U/16V/X7R_4
C627 0.1U/16V/X7R_4
R439 196/F_4
C568 EV@0.22u/10V_4
C569 EV@0.22u/10V_4
C566 EV@0.22u/10V_4
C565 EV@0.22u/10V_4
C570 EV@0.22u/10V_4
C571 EV@0.22u/10V_4
C564 EV@0.22u/10V_4
C563 EV@0.22u/10V_4
C572 EV_SP@0.22u/10V_4
C573 EV_SP@0.22u/10V_4
C562 EV_SP@0.22u/10V_4
C561 EV_SP@0.22u/10V_4
C574 EV_SP@0.22u/10V_4
C575 EV_SP@0.22u/10V_4
C559 EV_SP@0.22u/10V_4
C560 EV_SP@0.22u/10V_4
PCIE_TXP0 [21]
PCIE_TXN0 [21]
PCIE_TXP1 [22]
PCIE_TXN1 [22]
PCIE_TXP2 [23]
PCIE_TXN2 [23]
PEG_TXP0 [11]
PEG_TXN0 [11]
PEG_TXP1 [11]
PEG_TXN1 [11]
PEG_TXP2 [11]
PEG_TXN2 [11]
PEG_TXP3 [11]
PEG_TXN3 [11]
PEG_TXP4 [11]
PEG_TXN4 [11]
PEG_TXP5 [11]
PEG_TXN5 [11]
PEG_TXP6 [11]
PEG_TXN6 [11]
PEG_TXP7 [11]
PEG_TXN7 [11]
X4 : TYP3 (GEN3)
LAN
WLAN
SSDS
X4 : TYP2 (GEN2)
X8 : TYP1 (GEN3)
SP
@FP4
D D
1
2
3
4
FP4 REV 0.93
5
AC-coupling capactior(depend on GenX, not TYPE)
TYP1&3:(220nF)CH4222K9B04: Only Gen3 and Both of Gen2&3
TYP2 :(100nF)CH4103K1B08: Only Gen2
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
6
Date: Sheet of
FP4 PCIE I/F(1/7)
FP4 PCIE I/F(1/7)
FP4 PCIE I/F(1/7)
Monday, February 15, 2016
Monday, February 15, 2016
Monday, February 15, 2016
7
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
ZAB
ZAB
ZAB
2 45
2 45
2 45
8
1A
1A
1A
1
2
3
4
5
6
7
8
(CPU)
Channel A:CZ(TYP1) ONLY
U31A
M_A_A0
AE28
M_A_A1
M_A_A2
A A
M_MA_BG1[9]
MEM_MA_ACT#[9]
M_A_BS#0[9]
M_A_BS#1[9]
M_MA_BG0[9]
M_A_DM[7..0][9]
B B
M_A_DQS0[9]
M_A_DQS#0[9]
M_A_DQS1[9]
M_A_DQS#1[9]
M_A_DQS2[9]
M_A_DQS#2[9]
M_A_DQS3[9]
M_A_DQS#3[9]
M_A_DQS4[9]
M_A_DQS#4[9]
M_A_DQS5[9]
M_A_DQS#5[9]
M_A_DQS6[9]
M_A_DQS#6[9]
M_A_DQS7[9]
M_A_DQS#7[9]
M_A_CLK0[9]
M_A_CLK0#[9]
M_A_CLK1[9]
M_A_CLK1#[9]
TP28
TP21
M_A_RESET#[9]
+1.2VSUS
M_A_EVENT#[9]
M_A_CKE0[9]
M_A_CKE1[9]
M_A_ODT0[9]
M_A_ODT1[9]
M_A0_CS#0[9]
M_A0_CS#1[9]
M_A_RAS#[9]
M_A_CAS#[9]
M_A_WE#[9]
R646 *1K/F_4
R648 *1K/F_4
routed near APU
2015-11-10 SCL v1.11
TP25
TP26
TP27
TP29
TP57
TP64
C C
D D
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_BS#0
M_A_BS#1
M_MA_BG0
M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7
M_MA_CLK2_P
M_MA_CLK3_P
MEM_MA1_ODT0
MEM_MA1_ODT1
MEM_MA1_CS#0
MEM_MA1_CS#1
APU_MA_VREFDQ APU_MB_VREFDQ
APU_M_VREF_SUS
MA_ADD[0]
Y27
MA_ADD[1]
Y29
MA_ADD[2]
Y26
MA_ADD[3]
W28
MA_ADD[4]
W29
MA_ADD[5]
W26
MA_ADD[6]
U29
MA_ADD[7]
W25
MA_ADD[8]
U26
MA_ADD[9]
AG29
MA_ADD[10]
U27
MA_ADD[11]
T28
MA_ADD[12]
AK26
MA_ADD[13]
T26
MA_ADD[14]/MA_BG[1]
T25
MA_ADD[15]/MA_ACT_L
AG26
MA_BANK[0]
AG27
MA_BANK[1]
T29
MA_BANK[2]/MA_BG[0]
E19
MA_DM[0]
D21
MA_DM[1]
K21
MA_DM[2]
F29
MA_DM[3]
AP28
MA_DM[4]
AV26
MA_DM[5]
AR22
MA_DM[6]
BC22
MA_DM[7]
K29
MA_DM[8]
H19
MA_DQS_H[0]
G19
MA_DQS_L[0]
B22
MA_DQS_H[1]
A22
MA_DQS_L[1]
F23
MA_DQS_H[2]
E23
MA_DQS_L[2]
G27
MA_DQS_H[3]
F27
MA_DQS_L[3]
AP25
MA_DQS_H[4]
AP26
MA_DQS_L[4]
AW27
MA_DQS_H[5]
AV27
MA_DQS_L[5]
AV22
MA_DQS_H[6]
AU22
MA_DQS_L[6]
BA21
MA_DQS_H[7]
AY21
MA_DQS_L[7]
L27
MA_DQS_H[8]
L26
MA_DQS_L[8]
AE25
MA_CLK_H[0]
AE26
MA_CLK_L[0]
AD26
MA_CLK_H[1]
AD27
MA_CLK_L[1]
AB28
MA_CLK_H[2]
AB29
MA_CLK_L[2]
AB25
MA_CLK_H[3]
AB26
MA_CLK_L[3]
N29
MA_RESET_L
AE29
MA_EVENT_L
P27
MA_CKE0
P29
MA_CKE1
AK27
MA0_ODT[0]
AL26
MA0_ODT[1]
AH25
MA1_ODT[0]
AL25
MA1_ODT[1]
AH26
MA0_CS_L[0]
AL29
MA0_CS_L[1]
AH29
MA1_CS_L[0]
AL28
MA1_CS_L[1]
AG24
MA_RAS_L/MA_RAS_L_ADD[16]
AK29
MA_CAS_L/MA_CAS_L_ADD[15]
AH28
MA_WE_L/MA_WE_L_ADD[14]
B19
MA_VREFDQ
T32
M_VREF
S
P@FP4
MEMORY A
FP4 REV 0.93
MA_DATA[0]
MA_DATA[1]
MA_DATA[2]
MA_DATA[3]
MA_DATA[4]
MA_DATA[5]
MA_DATA[6]
MA_DATA[7]
MA_DATA[8]
MA_DATA[9]
MA_DATA[10]
MA_DATA[11]
MA_DATA[12]
MA_DATA[13]
MA_DATA[14]
MA_DATA[15]
MA_DATA[16]
MA_DATA[17]
MA_DATA[18]
MA_DATA[19]
MA_DATA[20]
MA_DATA[21]
MA_DATA[22]
MA_DATA[23]
MA_DATA[24]
MA_DATA[25]
MA_DATA[26]
MA_DATA[27]
MA_DATA[28]
MA_DATA[29]
MA_DATA[30]
MA_DATA[31]
MA_DATA[32]
MA_DATA[33]
MA_DATA[34]
MA_DATA[35]
MA_DATA[36]
MA_DATA[37]
MA_DATA[38]
MA_DATA[39]
MA_DATA[40]
MA_DATA[41]
MA_DATA[42]
MA_DATA[43]
MA_DATA[44]
MA_DATA[45]
MA_DATA[46]
MA_DATA[47]
MA_DATA[48]
MA_DATA[49]
MA_DATA[50]
MA_DATA[51]
MA_DATA[52]
MA_DATA[53]
MA_DATA[54]
MA_DATA[55]
MA_DATA[56]
MA_DATA[57]
MA_DATA[58]
MA_DATA[59]
MA_DATA[60]
MA_DATA[61]
MA_DATA[62]
MA_DATA[63]
MA_CHECK[0]
MA_CHECK[1]
MA_CHECK[2]
MA_CHECK[3]
MA_CHECK[4]
MA_CHECK[5]
MA_CHECK[6]
MA_CHECK[7]
MA_ZVDDIO_MEM_S
H17
J17
F20
H20
E17
F17
K18
E20
A21
C21
C23
D23
B20
B21
B23
A23
G22
H22
E25
G25
J20
E22
H23
J23
F26
E27
J26
J27
H25
E26
G28
G29
AN26
AP29
AR26
AP24
AN29
AN27
AR29
AR27
AU26
AV29
AU25
AW25
AU29
AU28
AW26
AT25
AV23
AW23
AV20
AW20
AR23
AT23
AR20
AT20
BB23
BB22
BB20
AY19
BA23
BC23
BC21
BB21
K26
K28
N26
N28
J29
K25
L29
N25
AD29
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
MA_ZVDDIO
R210 CZ@39.2/F_4
M_A_DQ[0..63] [9]
M_MB_BG1[10]
MEM_MB_ACT#[10]
M_B_BS#0[10]
M_B_BS#1[10]
M_MB_BG0[10]
M_B_DM[7..0][10]
M_B_DQS0[10]
M_B_DQS#0[10]
M_B_DQS1[10]
M_B_DQS#1[10]
M_B_DQS2[10]
M_B_DQS#2[10]
M_B_DQS3[10]
M_B_DQS#3[10]
M_B_DQS4[10]
M_B_DQS#4[10]
M_B_DQS5[10]
M_B_DQS#5[10]
M_B_DQS6[10]
M_B_DQS#6[10]
M_B_DQS7[10]
M_B_DQS#7[10]
M_B_CLK0[10]
M_B_CLK0#[10]
M_B_CLK1[10]
M_B_CLK1#[10]
M_B_RESET#[10]
M_B_EVENT#[10]
M_B_CKE0[10]
M_B_CKE1[10]
M_B0_ODT0[10]
M_B0_ODT1[10]
M_B0_CS#0[10]
M_B0_CS#1[10]
M_B_RAS#[10]
+1.2VSUS +1.2VSUS
M_B_CAS#[10]
M_B_WE#[10]
TP56
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7
AG31
MB_ADD[0]
AC30
MB_ADD[1]
AC31
MB_ADD[2]
AB32
MB_ADD[3]
AA32
MB_ADD[4]
AA33
MB_ADD[5]
AA31
MB_ADD[6]
Y33
MB_ADD[7]
AA30
MB_ADD[8]
W32
MB_ADD[9]
AG32
MB_ADD[10]
Y32
MB_ADD[11]
W33
MB_ADD[12]
AL31
MB_ADD[13]
W30
MB_ADD[14]/MB_BG[1]
V32
MB_ADD[15]/MB_ACT_L
AH32
MB_BANK[0]
AG33
MB_BANK[1]
W31
MB_BANK[2]/MB_BG[0]
D25
MB_DM[0]
D29
MB_DM[1]
E33
MB_DM[2]
J33
MB_DM[3]
AR30
MB_DM[4]
AW30
MB_DM[5]
BC30
MB_DM[6]
BC26
MB_DM[7]
N33
MB_DM[8]
B26
MB_DQS_H[0]
A26
MB_DQS_L[0]
B30
MB_DQS_H[1]
A30
MB_DQS_L[1]
F32
MB_DQS_H[2]
E32
MB_DQS_L[2]
K32
MB_DQS_H[3]
J32
MB_DQS_L[3]
AR32
MB_DQS_H[4]
AR33
MB_DQS_L[4]
AW32
MB_DQS_H[5]
AW33
MB_DQS_L[5]
BA29
MB_DQS_H[6]
AY29
MB_DQS_L[6]
BA25
MB_DQS_H[7]
AY25
MB_DQS_L[7]
P32
MB_DQS_H[8]
N32
MB_DQS_L[8]
AE33
MB_CLK_H[0]
AE32
MB_CLK_L[0]
AE30
MB_CLK_H[1]
AE31
MB_CLK_L[1]
AD32
MB_CLK_H[2]
AD33
MB_CLK_L[2]
AC33
MB_CLK_H[3]
AC32
MB_CLK_L[3]
T33
MB_RESET_L
AG30
MB_EVENT_L
U32
MB_CKE0
U33
MB_CKE1
AL30
MB0_ODT[0]
AM32
MB0_ODT[1]
AJ32
MB1_ODT[0]
AM33
MB1_ODT[1]
AJ33
MB0_CS_L[0]
AL32
MB0_CS_L[1]
AJ30
MB1_CS_L[0]
AL33
MB1_CS_L[1]
AH33
MB_RAS_L/MB_RAS_L_ADD[16]
AK32
MB_CAS_L/MB_CAS_L_ADD[15]
AJ31
MB_WE_L/MB_WE_L_ADD[14]
A19
MB_VREFDQ
S
P@FP4
MEMORY B
FP4 REV 0.93
U31I
M_B_DQ0
A25
MB_DATA[0]
MB_DATA[1]
MB_DATA[2]
MB_DATA[3]
MB_DATA[4]
MB_DATA[5]
MB_DATA[6]
MB_DATA[7]
MB_DATA[8]
MB_DATA[9]
MB_DATA[10]
MB_DATA[11]
MB_DATA[12]
MB_DATA[13]
MB_DATA[14]
MB_DATA[15]
MB_DATA[16]
MB_DATA[17]
MB_DATA[18]
MB_DATA[19]
MB_DATA[20]
MB_DATA[21]
MB_DATA[22]
MB_DATA[23]
MB_DATA[24]
MB_DATA[25]
MB_DATA[26]
MB_DATA[27]
MB_DATA[28]
MB_DATA[29]
MB_DATA[30]
MB_DATA[31]
MB_DATA[32]
MB_DATA[33]
MB_DATA[34]
MB_DATA[35]
MB_DATA[36]
MB_DATA[37]
MB_DATA[38]
MB_DATA[39]
MB_DATA[40]
MB_DATA[41]
MB_DATA[42]
MB_DATA[43]
MB_DATA[44]
MB_DATA[45]
MB_DATA[46]
MB_DATA[47]
MB_DATA[48]
MB_DATA[49]
MB_DATA[50]
MB_DATA[51]
MB_DATA[52]
MB_DATA[53]
MB_DATA[54]
MB_DATA[55]
MB_DATA[56]
MB_DATA[57]
MB_DATA[58]
MB_DATA[59]
MB_DATA[60]
MB_DATA[61]
MB_DATA[62]
MB_DATA[63]
MB_CHECK[0]
MB_CHECK[1]
MB_CHECK[2]
MB_CHECK[3]
MB_CHECK[4]
MB_CHECK[5]
MB_CHECK[6]
MB_CHECK[7]
MB_ZVDDIO_MEM_S
C25
C27
D27
B24
B25
B27
A27
A29
C29
B32
D32
B28
B29
A31
C31
E30
E31
G33
G32
C33
D33
G30
G31
J30
J31
L33
L32
H32
H33
L30
L31
AN31
AP32
AT32
AU32
AN33
AN32
AR31
AT33
AU30
AV32
BA33
AY32
AU33
AU31
AW31
AY33
BC31
BB30
BB28
AY27
BB32
BA31
BC29
BB29
BB27
BB26
BB24
AY23
BA27
BC27
BC25
BB25
N30
N31
R33
R32
M32
M33
R30
R31
AF32
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63
MB_ZVDDIO
R643 39.2/F_4
3
M_B_DQ[0..63] [10]M_A_A[13:0][9] M_B_A[13:0][10]
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Monday, February 15, 2016
Date: Sheet of
Monday, February 15, 2016
Date: Sheet of
1
2
3
4
5
6
Monday, February 15, 2016
7
PROJECT :
FP4 DDR I/F(2/7)
FP4 DDR I/F(2/7)
FP4 DDR I/F(2/7)
ZAB
ZAB
ZAB
3 45
3 45
3 45
8
1A
1A
1A
1
(CPU)
VDD_18
R633 300_4
R545 300_4
A A
Se
rial VID
VDD_18 VDD_18
R575
R590
*1K/F_4
*1K/F_4
B B
R586
*220_4
R576
*220_4
VFIX MODE
0
0
APU_PWRGD
APU_RST#
R578
R627
*1K/F_4
*2.2K_4
APU_SVC
APU_SVD
APU_PWRGD_SVID_REG
R617
*220_4
VID Override table (VDD)
SVDSVC
0
Boot Voltage
1.1V
1.0V
110 0.9V
11
HDT(Hardware Debug Tool ) Connector
C C
VDD_18 VDD_18 VDD_18
R160
HDT@1K/F_4
APU_TRST#
C218
D D
HDT@0.01u/50V_4
0.8V
R161 HDT@33_4
R162 HDT@10K/F_4
R163 HDT@10K/F_4
R164 HDT@10K/F_4
HDT_TRST# APU_PWROK_BUF
R596
*CZ@1K/F_4
R592
*CZ@220_4
2
R595
R605
*CZ@1K/F_4
*CZ@1K/F_4
R601
*CZ@220_4
APU_PWRGD_SVID_REG[38,39]
GFX_SVTAPU_SVT
GFX_SVC
GFX_SVD
PLACE HDT+ HEADER ON TOP
CN7
1
CPU_VDDIO
3
GND
5
GND
7
GND
9
CPU_TRST_L
11
CPU_DBRDY3
13
CPU_DBRDY2
15
CPU_DBRDY1
17
GND
19
CPU_VDDIO
*HDT@HDT
3
DP2_TX0[20]
APU_TCK
2
APU_TMS
4
HDT_APU_TDI
6
APU_TDO
8
10
APU_RST_L_BUF
12
APU_DBRDY
14
HDT_DBREQ#
16
APU_TEST19
18
APU_TEST18
20
DP2_TX0#[20]
DP2_TX1[20]
DP2_TX1#[20]
INT_HDMITX2P[19]
INT_HDMITX2N[19]
INT_HDMITX1P[19]
INT_HDMITX1N[19]
INT_HDMITX0P[19]
INT_HDMITX0N[19]
INT_HDMICLK+[19]
INT_HDMICLK-[19]
EDP_TX0[18]
EDP_TX0#[18]
EDP_TX1[18]
EDP_TX1#[18]
EDP_TXP2[18]
EDP_TXN2[18]
EDP_TXP3[18]
EDP_TXN3[18]
*APU_SVT & GFX_SVT need 0R in power side
R583 *short_4
R572 *short_4
R588 *shortCZ@0_4
R591 *shortCZ@0_4
R616 *short_4
R626 HDT@0_4
APU_PWRGD
APU_RST#
C663
*27p/50V_4
U33
1
1A
2
3
1Y
GND
VCC
2Y
2A
HDT@SN74LVC2G07DCKR
R564 HDT@0_4
R569 HDT@33_4
C674
*HDT@0.01u/50V_4
VGA
HDMI
eDP
DP 4k*2k
e
APU_SVT[38]
APU_SVC[38]
APU_SVD[38]
GFX_SVT[39]
GFX_SVC[39]
GFX_SVD[39]
APU_PWRGD_D
C703
*27p/50V_4
FOR DEBUG, PLACE THESE CAPS CLOSE TO APU
APU_RST#
APU_PWRGD_D APU_PWROK_BUF
CPU_TCK
CPU_TMS
CPU_TDI
CPU_TDO
CPU_PWROK_BUF
CPU_RST_L_BUF
CPU_DBRDY0
CPU_DBREQ_L
CPU_PLLTEST0
CPU_PLLTEST1
4
Soldermask openings for all bottom side vias/TPs unde
B6
DP2_TXP[0]
A6
DP2_TXN[0]
D7
DP2_TXP[1]
C7
DP2_TXN[1]
A7
DP2_TXP[2]
B7
DP2_TXN[2]
D9
DP2_TXP[3]
C9
DP2_TXN[3]
A2
DP1_TXP[0]
A3
DP1_TXN[0]
B4
DP1_TXP[1]
A4
DP1_TXN[1]
D5
DP1_TXP[2]
C5
DP1_TXN[2]
A5
DP1_TXP[3]
B5
DP1_TXN[3]
E2
DP0_TXP[0]
E1
DP0_TXN[0]
E3
DP0_TXP[1]
E4
DP0_TXN[1]
D1
DP0_TXP[2]
D2
DP0_TXN[2]
C1
DP0_TXP[3]
B1
DP0_TXN[3]
C15
APU_SVC_R
APU_SVD_R
GFX_SVC_R
GFX_SVD_R
APU_SIC
APU_SID
APU_RST#
APU_PWRGD
APU_PROCHOT#
APU_ALERT#
APU_TDI
APU_TDO
APU_TCK
APU_TMS
APU_TRST# APU_VSS_SENSE
APU_DBRDY
APU_DBREQ#
VDD_18
APU_RST_L_BUF
6
SVT0
D17
SVC0
D19
SVD0
B15
SVT1
B16
SVC1
A18
SVD1
CZL:3V_S0
B18
SIC
CZL:3V_S0
C17
SID
D15
RESET_L
C19
PWROK
A15
PROCHOT_L
B17
ALERT_L
H15
TDI
H14
TDO
D13
TCK
G15
TMS
J14
TRST_L
C13
DBRDY
A11
DBREQ_L
C719
HDT@0.1U/16V/X7R_4
U31C
DISPLAY/SVI2/JTAG/TEST
DP2 : Type 1 & 3 only
CZ:1.8_S0 CZL:3V_S0
(XX,PD)
(XX,PD)
CZ:1.8_S0 CZL:3V_S0
CZ:1.8_S0
CZL:3V_S0
CZL:3V_S0
FP4 REV 0.93
SP@FP4
DP_ZVSS
DP_AUX_ZVSS
DP_BLON
DP_DIGON
DP_VARY_BL
DP2_AUXP
DP2_AUXN
DP2_HPD
DP1_AUXP
DP1_AUXN
DP1_HPD
DP0_AUXP
DP0_AUXN
DP0_HPD
RSVD_1
TEMPIN0
TEMPIN1
TEMPIN2
TEMPINRETURN
TEST410
TEST411
TEST28_H
TEST28_L
DP_STEREOSYNC/TEST36
VDDCR_GFX_SENSE
VDDCR_NB_SENSE
VDDCR_CPU_SENSE
VDDP_SENSE
VSS_SENSE
CORE_PWM_PROCHOT#[33,34,38,39]
5
TEST10
TEST14
TEST15
TEST16
TEST17
TEST11
TEST18
TEST19
TEST31
TEST37
r FP4
DP_ZVSS
A9
DP_AUX_ZVSS
B9
G5
APU_DIGON
G6
APU_BLPWM
F11
H9
G9
E9
F7
E7
F5
F8
E8
G8
K24
RSVD
APU_TEMPIN0
E15
APU_TEMPIN1
E14
APU_TEMPIN2
E12
APU_TEMPRETURN
F14
APU_TEST410
AK24
APU_TEST411
AL24
APU_TEST4
P24
TEST4
APU_TEST5
N24
TEST5
AN24
TEST6
AB8
TEST9
Y9
APU_TEST14
B10
APU_TEST15
D11
APU_TEST16
A10
APU_TEST17
C11
APU_TEST11
B11
APU_TEST18
A14
APU_TEST19
B14
APU_TEST28_H
A13
APU_TEST28_L
B13
APU_TEST31
P26
DP_STEREOSYNC
E11
APU_TEST37
A17
H11
J12
G12
AY18
H12
THERM_ALERT#[31]
5
4
SMBUS (Internal Thermal sensor)
R562 HDT@1K/F_4
R563 HDT@1K/F_4
APU_TDI
APU_DBREQ#
HDT@1K/F_4
R565
R566 HDT@1K/F_4
R567 HDT@1K/F_4
R568 HDT@1K/F_4
C675
HDT@0.01u/50V_4
2ND_MBCLK[12,33]
3V_S5
(PU in EC side )
2ND_MBDATA[12,33]
R532 2K/F_4
R533 150/F_4
TP53
TP50
TP49
TP30
R527 *short_4
R550 *shortCZ@0_4
R573 *0_4
CRB CLOSE TO APU
3V_S0
5V_S0
6
APU_DISP_BLEN [18,33]
DP2_AUX [20]
DP2_AUX# [20]
DP2_HPD [20]
HDMI_DDCCLK_SW [19]
HDMI_DDCDATA_SW [19]
INT_HDMI_HPD [19]
EDP_AUX [18]
EDP_AUX# [18]
EDP_HPD [18]
TP20
TP15
TP12
TP10
R556 *0_4
TP19
TP24
TP23
TP22
R536 *1K/F_4
TP48
R537 *1K/F_4
R558 *1K/F_4
R557 *CZ@1K/F_4
R554 1K/F_4
R555 1K/F_4
TP54
TP51
R649 *39.2/F_4
R647 *39.2/F_4
R561 1K/F_4
R560 *1K/F_4
R607 *CZ@1K/F_4
R608 *CZ@1K/F_4
+3V
R635
5
10K/F_4
2
6
33S0_18S0
Q43
5
2
6
PJT138K
APU_VDDGFX_RUN_FB_H [39]
APU_VDDNB_RUN_FB_H [38]
APU_VDD_RUN_FB_H [38]
APU_VDDP_RUN_FB_H [36]
APU_VDD_RUN_FB_L [38]
APU_VDDGFX_RUN_FB_L [39]
APU_VDDP_RUN_FB_L [36]
33S0_18S0
Q41
APU_PROCHOT#
43
APU_ALERT#
1
PJT138K
APU_SIC
43
APU_SID
1
7
33S0_18S0
TYP13 : 1.8V
CZL : 3.3V
APU_BLPWM
APU_DIGON
TYP13 : 1.8V
CZL : 3.3V
DP2_AUX#
DP2_AUX
2
1
R467 *short_4
R237 *100K/F_4
R238 *100K/F_4
DNI: VGA doesn't need it.
VDD_18
33S0_18S0
VDD_18
M_TEST CONNECTION TBD
PU ->enable HDMI video/audio
PD->Disable HDMI audio
(APU_VDD_RUN_FB_L = APU_VDDNB_RUN_FB_L)
33S0_18S0
R639 1K/F_4
R641 1K/F_4
R638 1K/F_4
R636 1K/F_4
+3V
R517
10K/F_4
LCD 3.3V
3
Q36
PJA138K
EN:>1.5V
R642 *short_4
8
APU_DISP_PWM [18]
APU_DISP_ON [18]
+3V
APU_SIC
APU_SID
APU_ALERT#
APU_PROCHOT#
33S0_18S0VDD_18
4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Thursday, March 03, 2016
Date: Sheet of
Thursday, March 03, 2016
Date: Sheet of
1
2
3
4
5
6
Thursday, March 03, 2016
7
PROJECT :
FP4 DISPLAY/MISC(3/7)
FP4 DISPLAY/MISC(3/7)
FP4 DISPLAY/MISC(3/7)
ZAB
ZAB
ZAB
4 45
4 45
4 45
8
1A
1A
1A
1
2
3
4
5
6
7
8
(CPU)
VDD_18_S5
R418
15K/F_4
D11 RB500V-40
PCIE_WAKE#
LR_LED_L
S0A3
DNBSWON#
USB_OC1#
USB_OC2#
USB_OC3#
AGPIO8
S3_resume
CLK_SCLK
CLK_SDATA
CLK_REQ3_L
PCIE_REQ_GPU#_R
SYS_RST#
ACZ_RST#_R
ACZ_BCLK_R
ACZ_SYNC_R
ACZ_SDOUT_R
PCH_AZ_CODEC_SDIN0
AZ_SDIN1
AZ_SDIN2
ACZ_BCLK_R
I2C_SCL_TP
I2C_SDA_TP
I2C_SCL_TS
I2C_SDA_TS
10ms RC-delay (PU,PU)
C602
0.1u/16V_4
2015-11-10 SCL v1.11
1 2
RSMRST#[33]
SYS_RST# internal
40K pull up
A A
+3V_S5
R434 NAC@10K/F_4
R82 10K/F_4
R83 10K/F_4
R81 10K/F_4
R436 10K/F_4
R442 10K/F_4
R104 10K/F_4
R80 10K/F_4
R100 *10K/F_4
+3V
R603 2.2K_4
R589 2.2K_4
R602 10K/F_4
R598 10K/F_4
R156 10K/F_4
B B
R429 *10K/F_4
+3V_S5
J1
*SHORT_PAD
R159 CZ@1K/F_4
R544 CZ@1K/F_4
R529 CZ@1K/F_4
R528 CZ@1K/F_4
R531 *10K/F_4
R121 10K/F_4
R126 10K/F_4
R540 *10K/F_4
VDD_18
R609 2.2K_4
R610 2.2K_4
R495 SP@10K/F_4
R488 SP@10K/F_4
TYP13 :
I2C Touch interface:2.2K(CS22202JB18)
None I2C interface:10k(CS31002FB26)
CZL:NC
C C
PLTRST#[22,25,33]
PCIERST#[11,18,21,22,23]
PCIE_LAN_WAKE#[12,21,22]
APU_S5_MUX_CTRL[43]
APU_TypeC_UFP#[28]
PCIE_REQ_LAN#[21]
PCIE_CLKREQ_WLAN#[22]
PCIE_REQ_GPU#[12]
PCH_AZ_CODEC_BITCLK[24]
PCH_AZ_CODEC_SDIN0[24]
PCH_AZ_CODEC_RST#[24]
PCH_AZ_CODEC_SYNC[24]
PCH_AZ_CODEC_SDOUT[24]
C669 150P/50V_4
C643 150P/50V_4
DNBSWON#[33]
SUSB#[33]
SUSC#[33]
SIO_RCIN#[33]
SIO_A20GATE[33]
SIO_EXT_SCI#[33]
ACPRESENT[34] ACCEL_INTA [25]
R597 *EV@0_4
R541 33_4
R525 33_4
R530 33_4
R542 33_4
I2C_SCL_TP[30]
I2C_SDA_TP[30]
I2C_SCL_TS[18]
I2C_SDA_TS[18]
RTC_CLK[6]
SUS_CLK[22]
32.768KHZ
R553 33_4
R478 33_4
R433 *short_4
C615 *EV@100P/50V_4
TP52
TP55
CC_OC#[28]
USB_OC1#[27]
USB_OC2#[27]
USB_OC3#[27]
C63618p/50V_4
12
Y4
C63718p/50V_4
PCH_RSMRST#_R
SYS_PWRGD
SYS_RST#
PCIE_WAKE#
S0A3
APU_TEST0
APU_TEST1
APU_TEST2
SIO_EXT_SMI#
LR_LED_L
CLK_REQ3_L
PCIE_REQ_GPU#_R
ACZ_BCLK_R
AZ_SDIN1
AZ_SDIN2
ACZ_RST#_R
ACZ_SYNC_R
ACZ_SDOUT_R
R112 *33_4
R473
20M_4
LPC_RST#_R
PCIE_RST#
32K_X1
32K_X2
BB12
LPC_RST_L
AN7
PCIE_RST_L/EGPIO26
AE4
RSMRST_L
AE1
PWR_BTN_L/AGPIO0
BC9
PWR_GOOD
AF2
SYS_RESET_L/AGPIO1
AG2
WAKE_L/AGPIO2
AK7
SLP_S3_L
AH5
SLP_S5_L
AE8
S0A3_GPIO/AGPIO10
AH8
S5_MUX_CTRL/EGPIO42
(,PD)
AH6
TEST0
(,PD)
AK8
TEST1/TMS
(,PD)
AE3
TEST2
AY15
ESPI_RESET_L/KBRST_L/AGPIO129
BC19
GA20IN/AGPIO126
AD7
LPC_PME_L/AGPIO22
BB13
LPC_SMI_L/AGPIO86
AG3
AC_PRES/USB_OC4_L/IR_RX0/AGPIO23
AD5
IR_TX0/USB_OC5_L/AGPIO13
AL8
IR_TX1/USB_OC6_L/AGPIO14
AN8
IR_RX1/AGPIO15
AE2
IR_LED_L/LLB_L/AGPIO12
BC15
CLK_REQ0_L/SATA_IS0_L/SATA_ZP0_L/AGPIO92
BB17
CLK_REQ1_L/AGPIO115
BC17
CLK_REQ2_L/AGPIO116
BB18
CLK_REQ3_L/SATA_IS1_L/SATA_ZP1_L/EGPIO131
BB16
CLK_REQG_L/OSCIN/EGPIO132
AH9
USB_OC0_L/TRST_L/AGPIO16
AG1
USB_OC1_L/TDI/AGPIO17
AH2
USB_OC2_L/TCK/AGPIO18
AL9
USB_OC3_L/TDO/AGPIO24
AU6
AZ_BITCLK/I2S_BCLK_MIC
AR8
AZ_SDIN0/I2S_DATA_MIC[0]
AP6
AZ_SDIN1/I2S_LR_PLAYBACK
AR5
AZ_SDIN2/I2S_DATA_MIC[1]
AU9
AZ_RST_L/I2S_LR_MIC
AT9
AZ_SYNC/I2S_BCLK_PLAYBACK
AR7
AZ_SDOUT/I2S_DATA_PLAYBACK
BB10
I2C0_SCL/EGPIO145
BB9
I2C0_SDA/EGPIO146
BB7
I2C1_SCL/EGPIO147
BC7
I2C1_SDA/EGPIO148
3V_S5
AG7
RTCCLK
AT1
X32K_X1
AT2
X32K_X2
3V_S5? S0?
3V_S5
1.8V_S5
3V_S5
CZ:3V_S0 CZL:1.8V_S0
3V_S5
CZ ONLY
TPE13:1.8V_S0 CZL:3V
(PU,)
(,PD)
SYS PWRGD
SUSB#
D13 1N4148WS
D12 *1N4148W S
D14 *1N4148W S
EC_PWROK[33]
SYS_RST#[6]
Test mode setting (Follow AMD's suggestion)
+3V_S5
NC,no install by default
R101 *2.2K_4
R93 *1K/F_4
R426 *2.2K_4
APU_TEST0
APU_TEST1
APU_TEST2
R102 15K/F_4
R106 15K/F_4
R423 15K/F_4
HWPG[33]
TEST2 TEST1 TEST0 Description
0
0 0
D D
0
0
0
1
1
TMS
1 TMS
1
FCH TAP accessible from APU when TAPEN is asserted
FCH JTAG pins are overloaded for multiple
functions, in this configuration the FCH JTAG are
used as non-JTAG pins
1
Reserved
X
Reserved
FCH JTAG multi-function pins are configured as
JTAG pins, in this configuration the FCH TAP
0
can be accessed from FCH JTAG pins
Use on ATE only
1
Yuba JTAG enabled
2
3
VDDGFX_PD
D15 *CZ@RB500V-40
R447 CZ@47K_4
R435 **CZ@10K/F_4
2015.10.20 SCL v1.10 & DG v1.08
TYP1: No connect (**)
C616
**CZ@1000P/50V_4
2
4
3
Q34
**CZ@2N7002K
1
C620
*CZ@1U/6.3V_4
(CZ,CZL)
U31D
ACPI/SD/AZ/GPIO/RTC/I2C/UART/MISC
(PU,PU)
(PU,PU)
(PU,PU)
(PD,PU)
3V_S0
(PU,PU)
3V_S0
(PU,PU)
3V_S5
(PU,PU)
3V_S0
(PU,PU)
(PU,PU)
CZ ONLY
(PU,)
(PU,PU)
3V_S5
(PU,PU)
(PU,PU)
(,PU)
(PU,PU)
(PU,PU)
3V_S0
(PU,)
(PU,PU)
(PU,PU)
(PU,PU)
(PU,PU)
FP4 REV 0.93
S
P@FP4
+3V_S5
(,PU)
(,PU)
CZ:3V_S5 CZL:3V_S0
1.8V_S0
1.8V_S0
1.8V_S0
(,PU)
3V_S5
(,PD)
(,PD)
S5
(,PD)
CZ:1.8V_S0 CZL:1.8V_S5
CZ:1.8V_S0 CZL:1.8V_S5
5
4 3
VDDGFX_EN [39]VRON[33,38]
5
3V_S0
(PD,PU)
3V_S0
CZ:3V_S5 CZL:3V_S0
(PD,PU)
(PD,PU)
(PD,PU)
(PD,PU)
(PD,PU)
(PD,)
(PU,)
(PU,)
(PU,)
(PU,)
(PD,PU)
(PD,PU)
(PD,PU)
(PD,)
(PD,)
(PU,PU)
(PU,PU)
(PU,)
(PU,)
R458
100K/F_4
SD0_PWR_CTRL/AGPIO102
3.3V_S0
SCL0/I2C2_SCL/EGPIO113
SDA0/I2C2_SDA/EGPIO114
SDA1/I2C3_SDA/AGPIO20
(PU,PU)
(PD,)
3.3V_S5
(PD,PU)
(PD,PU)
(PD,PU)
(PD,PU)
(PD,PU)
3.3V_S0
AGPIO71/SGPIO_DATAOUT
AGPIO72/SGPIO_DATAIN
3.3V_S0
1.8V_S0
UART1_CTS_L/BT_I2S_BCLK/EGPIO140
UART1_RXD/BT_I2S_SDI/EGPIO141
UART1_TXD/BT_I2S_SDO/EGPIO143
UART1_INTR/BT_I2S_LRCLK/AGPIO144
6
2
Q33
2N7002DW
1
SD0_WP/EGPIO101
SD0_CD/AGPIO25
SD0_CLK/EGPIO95
SD0_CMD/EGPIO96
SD0_DATA0/EGPIO97
SD0_DATA1/EGPIO98
SD0_DATA2/EGPIO99
SD0_DATA3/EGPIO100
SD0_LED/EGPIO93
SCL1/I2C3_SCL/AGPIO19
AGPIO3
AGPIO4
AGPIO5
AGPIO6/LDT_RST
AGPIO7/LDT_PWROK
AGPIO8
AGPIO9
VDDGFX_PD/AGPIO39
AGPIO40
AGPIO64
AGPIO65
AGPIO66/SHUTDOWN_L
AGPIO68/SGPIO_CLK
AGPIO69/SGPIO_LOAD
SPKR/AGPIO91
BLINK/USB_OC7_L/AGPIO11
GENINT1_L/AGPIO89
GENINT2_L/AGPIO90
FANIN0/AGPIO84
FANOUT0/AGPIO85
UART0_CTS_L/EGPIO135
UART0_RXD/EGPIO136
UART0_RTS_L/EGPIO137
UART0_TXD/EGPIO138
UART0_INTR/AGPIO139
UART1_RTS_L/EGPIO142
+3V
R463
4.7K_4
C625
0.22u/10V_4
BB2
BB5
BC2
BOARD_ID4
BB4
BOARD_ID5
AY5
BOARD_ID0
BC3
BOARD_ID1
BA3
BOARD_ID2
BC5
BOARD_ID3
BA5
BB6
BA15
AY17
AG5
SCL1
AG4
SDA1
AL5
GEVENT2#
AL6
AGPIO4
AJ1
AJ3
AH1
AJ4
AGPIO8
AK5
AD8
S3_resume
AG8
AW15
AGPIO64
AU15
AT15
AGPIO66
AU12
AT14
AGPIO69AGPIO69
AR14
BC13
BA17
AN5
BB14
BA19
BC18
BB19
AY9
AW8
AV5
AV8
AW9
AV11
AU7
AT11
AR11
AP9
R457 *short_4
6
DGPU_PWREN_A
R99 10K/F_4
TP7
TP11
TP9
TP18
TP16
TP17
DGPU_RST_L [11]
ODD_PLUGIN# [26]
BOARD_ID4 [18]
CLK_SCLK [9,10,20,25]
CLK_SDATA [9,10,20,25]
TP3
TP2
GEVENT2# [6]
TP4
PCH_ODD_EN [26]
VDDGFX_PD [33]
S3 resume time measure point
Type 3 no these agpio pins,
only for type 1 & 2 !!!
SPKR [24]
AGPIO11 [6]
BB14 AMD change pin name to HVBEN_L : default NC
PE_PWRGD [42]
APU_TP_INT# [18]
APU_I2C_INT# [30]
DGPU_PWREN[42]
>1 mS delay is required between all MXM power rail stable
and MXM_PWREN(enables the module internal power)
DGPU_PWREN_A
SYS_PWRGDSYS_PWRGD_R
DGPU_PWREN
BOARD ID
+3V
R120 SP@10K/F_4
R110 SP@10K/F_4
R115 SP@10K/F_4
R107 IOAC@10K/F_4
R484 10K/F_4
R122 SP17@10K/F_4
ZYV
BOARD_ID4 Depend on cable => always PU, PD DNI
Touch cable PIN2 => NC
non-Touch cable PIN2 => GND
GPIO
BOARD_ID0
BOARD_ID1
BOARD_ID2
BOARD_ID3
BOARD_ID4
BOARD_ID5 17" 15"
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
FP4 GPIO/AZ/I2C/SD/UARTS(4/7)
FP4 GPIO/AZ/I2C/SD/UARTS(4/7)
FP4 GPIO/AZ/I2C/SD/UARTS(4/7)
Thursday, March 03, 2016
Thursday, March 03, 2016
Thursday, March 03, 2016
7
2015.10.20 SCL v1.10 & DG v1.08
TYP1: No connect (**)
+3V
R181
*EV@100K/F_6
R1
R178 *shortEV@0_4
CZ : mount R1
D1
D3
*EV_SP@RB500V-40
C258
EV@0.1u/16V_4
R182
*EV@1M/F_4
>1mS
BOARD_ID0
BOARD_ID1
BOARD_ID2
BOARD_ID3
BOARD_ID4
BOARD_ID5
High
dTPM
dGPU
non-G sensor
R119 SP@10K/F_4
R113 SP@10K/F_4
R114 SP@10K/F_4
R109 NAC@10K/F_4
R483 *10K/F_4
R125 SP15@10K/F_4
Low
iTPM
UMA
G sensor
IOAC non-IOAC
Touch
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
non-Touch
ZAB
ZAB
ZAB
DGPU_PWREN_A
5 45
5 45
5 45
8
5
1A
1A
1A
1
2
3
4
5
6
7
8
(CPU)
AU3
SATA_TXP0[26]
VDDP_0.95V
DEVSLP_HDD[26]
2
Y3
48MHz
4
CLK_PCI_EC[33]
PCLK_TPM[25]
CLK_LPC_DEBUG[22]
LPC_LAD0[22,25,33]
LPC_LAD1[22,25,33]
LPC_LAD2[22,25,33]
LPC_LAD3[22,25,33]
LPC_LFRAME#[22,25,33]
SERIRQ[25,33]
CLKRUN#[25,33]
LPCPD#[25]
CLK_LPC_DEBUG
PCLK_TPM
CLK_PCI_EC
SATA_TXN0[26]
SATA_RXN0[26]
SATA_RXP0[26]
SATA_TXP1[26]
SATA_TXN1[26]
SATA_RXN1[26]
SATA_RXP1[26]
R472 1K/F_4
R476 1K/F_4
R152 10K/F_4
+3V
R154 10K/F_4
R148 10K/F_4
R446 *shortEV@0_4
R445 *shortEV@0_4
R462 *short_4
R461 *short_4
R453 *short_4
R454 *short_4
R451 *short_4
R452 *short_4
13
R146 10K/F_4
R173 10K/F_4
CLK_PCIE_VGAP_C
CLK_PCIE_VGAN_C
CLK_PCIE_LANP_R
CLK_PCIE_LANN_R
CLK_PCIE_WLANP_C
CLK_PCIE_WLANN_C
CLK_PCIE_SSDP_C
CLK_PCIE_SSDN_C
R468
1M/F_4
R570 22_4
R612 22_4
R594 22_4
R543 *short_4
SATA_ZVSS
SATA_ZVDD
DEVSLP_HDD
DEVSLP_ODD
AGPIO130
TP6
TP8
48M_X1
48M_X2
LPCCLK0
LPCCLK1
TP44
LPC_CLKRUN#_R
SPI_CLK
SPI_CS#
EGPIO119
SPI_SO
SPI_SI
SPI_WP
SPI_HOLD#
AGPIO76
HDD
CLK_PCIE_VGAP[11]
CLK_PCIE_VGAN[11]
CLK_PCIE_LANP[21]
CLK_PCIE_LANN[21]
CLK_PCIE_WLANP[22]
CLK_PCIE_WLANN[22]
CLK_PCIE_SSDP[23]
CLK_PCIE_SSDN[23]
20160205_EMI
ODD
C623 5.6p/50V_4
C624 5.6p/50V_4
A A
B B
C688 *15P/50V_4
C700 *15P/50V_4
C677 15P/50V_4
C C
SATA_TX0P
AU4
SATA_TX0N
AV1
SATA_RX0N
AV2
SATA_RX0P
AY2
SATA_TX1P
AY1
SATA_TX1N
AW4
SATA_RX1N
AW3
SATA_RX1P
AW1
SATA_ZVSS
AW2
SATA_ZVDDP
AT17
DEVSLP[0]/EGPIO67
AT12
DEVSLP[1]/EGPIO70
BB15
SATA_ACT_L/AGPIO130
AU2
SATA_X1
AU1
SATA_X2
U4
GFX_CLKP
U3
GFX_CLKN
U1
GPP_CLK0P
U2
GPP_CLK0N
W4
GPP_CLK1P
W3
GPP_CLK1N
W1
GPP_CLK2P
W2
GPP_CLK2N
Y2
GPP_CLK3P
Y1
GPP_CLK3N
BC10
X25M_48M_OSC
T2
X48M_X1
T1
X48M_X2
AW14
LPCCLK0/EGPIO74
AY13
LPCCLK1/EGPIO75
BB11
LAD0
BA11
LAD1
AY11
LAD2
BA13
LAD3
AV14
LFRAME_L
BA1
ESPI_ALERT_L/LDRQ0_L
BC14
SERIRQ/AGPIO87
BC11
LPC_CLKRUN_L/AGPIO88
AE9
LPC_PD_L/AGPIO21
BC6
SPI_CLK/ESPI_CLK/EGPIO117
BB8
SPI_CS1_L/EGPIO118
AW7
SPI_CS2_L/ESPI_CS_L/EGPIO119
BA9
SPI_DI/ESPI_DATA/EGPIO120
AY7
SPI_DO/EGPIO121
AW11
SPI_WP_L/EGPIO122
BA7
SPI_HOLD_L/EGPIO133
AW12
SPI_TPM_CS_L/AGPIO76
1.8V_S0
1.8V_S0
CZ:3V_S0 CZL:3V_S5
CZ:3V_S0 CZL:3V_S5
CZ:3V_S0 CZL:3V_S5
CZ:3V_S0 CZL:3V_S5
U31E
CLK/SATA/USB/SPI/LPC
3V_S0
3V_S0
3V_S0
(PD,)
Port 0 & 1 : TYP13 Only
(PD,)
(PD,)
(PD,)
(PD,)
(PD,)
3V_S0
(PU,PU)
3V_S0
(,PU)
3V_S5
(PD,)
CZ:1.8V_S0 CZL:1.8V_S5
(PD,)
(PD,)
(PD,)
CZ:3V_S0 CZL:3V_S5
FP4 REV 0.93
SP
@FP4
(PD,)
USBCLK/25M_48M_OSC
USB_ZVSS
USB_HSD0P
USB_HSD0N
USB_HSD1P
USB_HSD1N
USB_HSD2P
USB_HSD2N
USB_HSD3P
USB_HSD3N
USB_HSD4P
USB_HSD4N
USB_HSD5P
USB_HSD5N
USB_HSD6P
USB_HSD6N
USB_HSD7P
USB_HSD7N
USB_SS_ZVSS
USB_SS_ZVDDP
USB_SS_0TXP
USB_SS_0TXN
USB_SS_0RXP
USB_SS_0RXN
USB_SS_1TXP
USB_SS_1TXN
USB_SS_1RXP
USB_SS_1RXN
USB_SS_2TXP
USB_SS_2TXN
USB_SS_2RXP
USB_SS_2RXN
USB_SS_3TXP
USB_SS_3TXN
USB_SS_3RXP
USB_SS_3RXN
(PD,)
AP8
AP5
AR2
AR1
AR3
AR4
AN2
AN1
AN3
AN4
AM1
AM2
AL2
AL1
AL3
AL4
AK2
AJ2
AD2
AD1
AA3
AA4
W9
W8
AA2
AA1
W5
W6
AC1
AC2
Y6
Y7
AC4
AC3
AB5
AB6
USB_ZVSS
USBSS_CALP
USBSS_CALN
TP5
R480 11.8K/F_4
USBP0+ [27]
USBP0- [27]
USBP1+ [27]
USBP1- [27]
USBP2+ [22]
USBP2- [22]
USBP3+ [32]
USBP3- [32]
USBP4+ [18]
USBP4- [18]
USBP5+ [27]
USBP5- [27]
USBP6+ [27]
USBP6- [27]
USBP7+ [28]
USBP7- [28]
R470 1K/F_4
R471 1K/F_4
USB30_TX1+ [27]
USB30_TX1- [27]
USB30_RX1+ [27]
USB30_RX1- [27]
USB30_TX2+ [27]
USB30_TX2- [27]
USB30_RX2+ [27]
USB30_RX2- [27]
USB30_TX3+ [28]
USB30_TX3- [28]
USB30_RX3+ [28]
USB30_RX3- [28]
USB2.0/DB
USB2.0/DB
WLAN/BT
POA
CCD
USB3 (Charger)
USB3.0
Type-C
USB3 (Charger)
USB3.0
Type-C
VDDP_0.95V_S5
SPI_CS# SPI_CS_A
SPI_CLK
C691 *22P/50V_4
SPI_SI
SPI_SO
33S5_18S0
SPI_WP SPI_WP_R
SPI EMI
R623 33_4
R606 33_4
R600 33_4
R611 33_4
R599 10K/F_4
R604 *short_4
SPI_SCK_A
SPI_SDI_A
SPI_SDO_A
SP@ socket P/N: DFHS08FS023 only for A-TEST
SPI ROM
TYP13
1.8V
Vender Size Quanta P/N
WND
GGD
EON
R629 *short_4
33S5_18S0
R615
10K/F_4
U32
1
CE#
6
SCK
5
SI
2
SO
3
WP#
W25Q64FWSSIG
AKE5EZN0N00 W25Q64FWSSIG
8M
8M
VDD
HOLD#
33S5_18S0VDD_18
8
7
4
VSS
GD25LQ64CSIGRAKE5EG-0Q00
8M
33S5_18S0
R618
10K/F_4
SPI_HOLD#
Vender P/N
6
C701
0.1u/16V_4
STRAPS PINS
+3V_S5
+3V_S5+3V_S5+3V+3V+3V +3V_S5
R581
*10K/F_4
LPCCLK0
LPCCLK1
LPC_LFRAME#
RTC_CLK[5]
GEVENT2#[5]
SYS_RST#[5]
AGPIO11[5]
R587
D D
1
2K/F_4
2
R593
10K/F_4
R559
*2K/F_4
R613
10K/F_4
R614
*2K/F_4
3
R117
10K/F_4
R116
*2K/F_4
R98
10K/F_4
R103
*2K/F_4
4
R430
10K/F_4
R431
*2K/F_4
R105
10K/F_4
R108
*2K/F_4
LPC_CLK0 LFRAME#
BOOT Fail Timer
PU
ENABLE
LPC_CLK1
Internal CLKGEN
DEFAULT
PD
BOOT Fail Timer
DISABLE
External CLKGEN
DEFAULT
5
SPI ROM
DEFAULT
LPC ROM
RTC_CLK
Coin battery
is on board.
GEVENT2# (AGPIO3)
CZ-L
1.8V SPI ROM
Int pull-up
Int pull-upInt pull-up
SYS_RST#
TYP13
Enhanced Reset logic normal reset mode
Int pull-up
AGPIO11(BLINK)
LDT_RST#/LDT_PWRGD
output to APU
DEFAULT DEFAULT DEFAULT DEFAULT
Coin battery
isn't on board.
6
3.3V SPI ROM
DEFAULT
Traditional Reset logic
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Thursday, March 03, 2016
Date: Sheet of
Thursday, March 03, 2016
Date: Sheet of
Thursday, March 03, 2016
7
short reset mode
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
FP4 SATA/USB/LPC/SPI(5/7)
FP4 SATA/USB/LPC/SPI(5/7)
FP4 SATA/USB/LPC/SPI(5/7)
ZAB
ZAB
ZAB
LDT_RST#/LDT_PWRGD
output to Pads
6 45
6 45
6 45
8
1A
1A
1A
1
(CPU)
C291
C295
22u/6.3V_6
22u/6.3V_6
22 uF * 8
0.22 uF * 6
A A
180 pF * 1
VDDP_0.95V
10 uF * 4
0.22 uF * 6
180 pF * 1
+1.5V +3V
VDD_18
C260
C265
0.22u/10V_4
B B
C C
10U/6.3V_4
C203
10U/6.3V_4
+1.2VSUS
C725
0.22u/10V_4
VDDCR_NB
C188
0.22u/10V_4
D D
C727
C300
0.22u/10V_4
0.22u/10V_4
C692
C704
22u/6.3V_6
22u/6.3V_6
R634 *short_4
C709
1U/6.3V_4
C202
0.22u/10V_4
DECOUPLING BETWEEN PROCESSOR AND DIMMs
ACROSS VDDIO AND VSS SPLIT
C717
0.22u/10V_4
4x0.22UF (0402)+2x180PF(0402)
C122
0.22u/10V_4
ACROSS VDDNB AND VSS SPLIT
C254
10U/6.3V_4
C292
22u/6.3V_6
C297
0.22u/10V_4
C705
22u/6.3V_6
C708
1U/6.3V_4
22 uF * 4
0.22 uF * 8
180 pF * 1
C301
0.22u/10V_4
C190
0.22u/10V_4
2
+VDDIO_AZ
VDDP_0.95V_S5+3V_S5VDD_18_S5
C256
0.22u/10V_4
C298
1U/6.3V_4
C318
0.22u/10V_4
C296
22u/6.3V_6
C314
0.22u/10V_4
C706
22u/6.3V_6
C211
22u/6.3V_6
C308
180P/50V_4
C96
0.22u/10V_4
C293
22u/6.3V_6
C322
0.22u/10V_4
C285
10u/6.3V_4
R213 *short_4
C215
0.22u/10V_4
C71
0.22u/10V_4
C274
10u/6.3V_4
C380
180P/50V_4
C77
0.22u/10V_4
C294
22u/6.3V_6
C315
0.22u/10V_4
C275
10u/6.3V_4
VDDP_0.95V
R142 *0_4
C187
0.22u/10V_4
C259
10u/6.3V_4
C302
180P/50V_4
C313
22u/6.3V_6
C728
180P/50V_4
C311
0.22u/10V_4
R1
R59 CZ@0_8
200mA
C324
10U/6.3V_4
VDDCR_FCH_ALWVDDCR_FCH_S5
C240
22u/6.3V_6
C283
22U/6.3V_6
C284
10u/6.3V_4
3
C330
22u/6.3V_6
for EMI reserve
C729
C329
180P/50V_4
180P/50V_4
C319
C287
0.22u/10V_4
0.22u/10V_4
TYP1 UMA & DIS tied to VDDP. (Stuff R1,C1,C2)
TYP3: Left unconencted. (DNI R1, R2, C1, C2)
VDDP_GFX
C1 C2
R2
R61
*SP@0_4
C106
CZ@10U/6.3V_4
VDD_33
C241
C230
0.22u/10V_4
22u/6.3V_6
Place under APU
C191
C250
22U/6.3V_6
22U/6.3V_6
C288
C245
10u/6.3V_4
10u/6.3V_4
RTC (RTC)
For EC reset RTC
CLR_CMOS[33]
C299
180P/50V_4
C290
0.22u/10V_4
1.5A
C183
CZ@0.22u/10V_4
1.5A
500mA
200mA
800mA
VDDCR_NB
C262
22U/6.3V_6
C312
10u/6.3V_4
R348
100K/F_4
C730
180P/50V_4
C289
180P/50V_4
VDDP_0.95V
2
+1.5V_RTC_RST#
3
1
4
+1.2VSUS
+VDDIO_AZ
200mA
7A
20MIL
Q26
2N7002K
C243
0.22u/10V_4
12
G1
*SHORT_PAD
P25
VDDIO_MEM_S3_1
P28
VDDIO_MEM_S3_2
T24
VDDIO_MEM_S3_3
T27
VDDIO_MEM_S3_4
U25
VDDIO_MEM_S3_5
U28
VDDIO_MEM_S3_6
V30
VDDIO_MEM_S3_7
V33
VDDIO_MEM_S3_8
W24
VDDIO_MEM_S3_9
W27
VDDIO_MEM_S3_10
Y25
VDDIO_MEM_S3_11
Y28
VDDIO_MEM_S3_12
Y30
VDDIO_MEM_S3_13
AB24
VDDIO_MEM_S3_14
AB27
VDDIO_MEM_S3_15
AB30
VDDIO_MEM_S3_16
AB33
VDDIO_MEM_S3_17
AD25
VDDIO_MEM_S3_18
AD28
VDDIO_MEM_S3_19
AD30
VDDIO_MEM_S3_20
AE24
VDDIO_MEM_S3_21
AE27
VDDIO_MEM_S3_22
AF30
VDDIO_MEM_S3_23
AF33
VDDIO_MEM_S3_24
AG25
VDDIO_MEM_S3_25
AG28
VDDIO_MEM_S3_26
AH24
VDDIO_MEM_S3_27
AH27
VDDIO_MEM_S3_28
AH30
VDDIO_MEM_S3_29
AK25
VDDIO_MEM_S3_30
AK28
VDDIO_MEM_S3_31
AK30
VDDIO_MEM_S3_32
AK33
VDDIO_MEM_S3_33
AL27
VDDIO_MEM_S3_34
AM30
VDDIO_MEM_S3_35
AR19
VDDIO_AUDIO
AE6
VDDP_GFX_2
AE5
VDDP_GFX_1
AP19
VDD_33_1
AP21
VDD_33_2
AP16
VDD_18_1
AP18
VDD_18_2
AP10
VDD_18_S5_1
AR9
VDD_18_S5_2
AP15
VDD_33_S5_1
AR15
VDD_33_S5_2
AN12
VDDP_S5_1
AP12
VDDP_S5_2
AP13
VDDCR_FCH_S5_1
AR12
VDDCR_FCH_S5_2
AW19
VDDP_6
AU17
VDDP_1
AU19
VDDP_2
AV17
VDDP_3
AV19
VDDP_4
AW17
VDDP_5
AL12
VDDCR_NB_1
AL13
VDDCR_NB_2
AL15
VDDCR_NB_3
AL18
VDDCR_NB_4
AL21
VDDCR_NB_5
AN13
VDDCR_NB_6
AN16
VDDCR_NB_7
AN19
VDDCR_NB_8
AN22
VDDCR_NB_9
AR17
VDDBT_RTC_G
R330 1K/F_4
C482
1U/6.3V_4
U31F
POWER
Type 1 only
FP4 REV 0.93
S
P@FP4
+1.5V_RTC
5
U8
VDDCR_CPU_1
W7
VDDCR_CPU_2
W12
VDDCR_CPU_3
W15
VDDCR_CPU_4
W18
VDDCR_CPU_5
W21
VDDCR_CPU_6
Y8
VDDCR_CPU_7
Y10
VDDCR_CPU_8
Y13
VDDCR_CPU_9
Y16
VDDCR_CPU_10
Y19
VDDCR_CPU_11
Y22
VDDCR_CPU_12
AB7
VDDCR_CPU_13
AB9
VDDCR_CPU_14
AB12
VDDCR_CPU_15
AB15
VDDCR_CPU_16
AB18
VDDCR_CPU_17
AB21
VDDCR_CPU_18
AD6
VDDCR_CPU_19
AD10
VDDCR_CPU_20
AD13
VDDCR_CPU_21
AD16
VDDCR_CPU_22
AD19
VDDCR_CPU_23
AD22
VDDCR_CPU_24
AE7
VDDCR_CPU_25
AE12
VDDCR_CPU_26
AK9
VDDCR_CPU_42
AG10
VDDCR_CPU_31
AK10
VDDCR_CPU_43
AG13
VDDCR_CPU_32
AK13
VDDCR_CPU_44
AG16
VDDCR_CPU_33
AK16
VDDCR_CPU_45
AG19
VDDCR_CPU_34
AK19
VDDCR_CPU_46
AG22
VDDCR_CPU_35
AK22
VDDCR_CPU_47
AH7
VDDCR_CPU_36
AE18
VDDCR_CPU_28
AE21
VDDCR_CPU_29
AH21
VDDCR_CPU_40
AG6
VDDCR_CPU_30
AH12
VDDCR_CPU_37
AN6
VDDCR_CPU_49
AH15
VDDCR_CPU_38
AH18
VDDCR_CPU_39
AL7
VDDCR_CPU_48
AK6
VDDCR_CPU_41
AE15
VDDCR_CPU_27
L8
VDDCR_GFX_14
L13
VDDCR_GFX_15
L16
VDDCR_GFX_16
L19
VDDCR_GFX_17
L22
VDDCR_GFX_18
N7
VDDCR_GFX_19
N12
VDDCR_GFX_20
N15
VDDCR_GFX_21
N18
VDDCR_GFX_22
N21
VDDCR_GFX_23
P8
VDDCR_GFX_24
P13
VDDCR_GFX_25
P16
VDDCR_GFX_26
P19
VDDCR_GFX_27
P22
VDDCR_GFX_28
T7
VDDCR_GFX_29
F12
VDDCR_GFX_1
F15
VDDCR_GFX_2
G11
VDDCR_GFX_3
G14
VDDCR_GFX_4
J8
VDDCR_GFX_5
J9
VDDCR_GFX_6
J11
VDDCR_GFX_7
K7
VDDCR_GFX_8
K12
VDDCR_GFX_9
K13
VDDCR_GFX_10
K15
VDDCR_GFX_11
K16
VDDCR_GFX_12
T12
VDDCR_GFX_30
T15
VDDCR_GFX_31
T18
VDDCR_GFX_32
T21
VDDCR_GFX_33
U13
VDDCR_GFX_34
U16
VDDCR_GFX_35
U19
VDDCR_GFX_36
U22
VDDCR_GFX_37
K19
VDDCR_GFX_13
Q27
AP2138N-1.5TRG1
3
1
20MIL20MIL
2
RTC CR2032 Coin Battery
DBV: AHL03003057
VDE: AHL03003003
JHT: AHL03003035
VDDCR_CPU
+3VRTC
Place under APU
C248
22U/6.3V_6
C251
22U/6.3V_6
C217
0.22u/10V_4
C233
0.22u/10V_4
VDDCR_GFX
C271
CZ@47U/6.3V_8
C253
CZ@22U/6.3V_6
C196
CZ@0.22u/10V_4
C227
CZ@0.22u/10V_4
C481
1U/6.3V_4
D9
BAT54CW
C267
22U/6.3V_6
C234
22U/6.3V_6
C221
0.22u/10V_4
C220
0.22u/10V_4
Place under APU
+3VPCU_R
+VCCRTC_2
6
C268
22U/6.3V_6
C232
22U/6.3V_6
C219
0.22u/10V_4
C206
0.22u/10V_4
C235
CZ@22U/6.3V_6
C255
CZ@22U/6.3V_6
C197
CZ@0.22u/10V_4
C228
CZ@0.22u/10V_4
R344 *short_4
20MIL
R345
1K/F_4
+BAT
20MIL
12
C270
CN1
RTC_2032
C269
47U/6.3V_8
C236
22U/6.3V_6
C210
0.22u/10V_4
C242
180P/50V_4
C239
CZ@22U/6.3V_6
CZ@22U/6.3V_6
C198
CZ@0.22u/10V_4
C226
CZ@0.22u/10V_4
+3VPCU
C249
47U/6.3V_8
C209
0.22u/10V_4
C252
CZ@47U/6.3V_8
C266
CZ@22U/6.3V_6
C199
CZ@0.22u/10V_4
C238
CZ@0.22u/10V_4
7
22 uF * 9
0.22 uF * 8
180 pF * 1
C195
CZ@22U/6.3V_6
C200
CZ@0.22u/10V_4
C304
CZ@180P/50V_4
22 uF * 9
0.22 uF * 9
180 pF * 1
8
7
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Thursday, March 03, 2016
Date: Sheet of
Thursday, March 03, 2016
Date: Sheet of
1
2
3
4
5
6
7
Thursday, March 03, 2016
PROJECT :
FP4 POWER(6/7)
FP4 POWER(6/7)
FP4 POWER(6/7)
ZAB
ZAB
ZAB
8
7 45
7 45
7 45
1A
1A
1A
1
2
3
4
5
6
7
8
(CPU)
8
U31G
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
GND
FP4 REV 0.93
SP
@FP4
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98
VSS_99
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
L28
M4
M30
N10
N13
N16
N19
N22
N27
P1
P2
P4
P5
P12
P15
P18
P21
P30
P33
T4
T10
T13
T16
T19
T22
T30
U5
U12
U15
U18
U21
U24
V1
V2
V4
W10
W13
W16
W19
W22
Y4
Y5
Y12
Y15
Y18
Y21
Y24
AB1
AB2
AB4
AB10
AB13
AB16
AB19
AB22
AD4
AD9
AD12
AD15
AD18
AD21
AD24
AE10
AE13
AE16
AE19
AE22
AF1
AF4
AG9
AG12
AG15
AG18
AG21
AH4
AH10
AH13
AH16
AH19
AH22
AK1
AK4
AK12
AK15
AK18
AL16
AL19
AL22
AM4
AN9
AN10
AN15
AN18
AN21
AN25
AN28
AP1
AP2
AP4
AP7
AP22
AP27
AP30
AP33
AR6
AR25
AR28
AT4
AT19
AT22
AT30
AU5
AU8
AU11
AU14
AU20
AU23
AU27
AV4
AV7
AV9
AV12
AV15
AV25
A A
B B
C C
A12
A16
A20
A24
A28
A32
B12
B33
D10
D12
D14
D16
D18
D20
D22
D24
D26
D28
D30
F19
F22
F25
F30
F33
G17
G20
G23
G26
H30
J15
J19
J22
J25
J28
K10
K22
K27
K30
K33
L12
L15
L18
L21
L25
A8
B2
B8
C3
D4
D6
D8
F1
F2
F4
F9
G7
H4
J5
K1
K2
K4
L5
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
VSS_146
VSS_147
VSS_148
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_154
VSS_155
VSS_156
VSS_157
VSS_158
VSS_159
VSS_160
VSS_161
VSS_162
VSS_163
VSS_164
VSS_165
VSS_166
VSS_167
VSS_168
VSS_169
VSS_170
VSS_171
VSS_172
VSS_173
VSS_174
VSS_175
VSS_176
VSS_177
VSS_178
VSS_179
VSS_180
VSS_181
VSS_182
VSS_183
VSS_184
VSS_185
VSS_186
U31H
GND
FP4 REV 0.93
SP
@FP4
VSS_187
VSS_188
VSS_189
VSS_190
VSS_191
VSS_192
VSS_193
VSS_194
VSS_195
VSS_196
VSS_197
VSS_198
VSS_199
VSS_200
VSS_201
VSS_202
VSS_203
VSS_204
VSS_205
VSS_206
VSS_207
VSS_208
VSS_209
VSS_210
VSS_211
VSS_212
VSS_213
VSS_215
VSS_214
AV30
AV33
AW22
AY4
AY6
AY8
AY10
AY12
AY14
AY16
AY20
AY22
AY24
AY26
AY28
AY30
BB1
BB33
BC4
BC8
BC12
BC16
BC20
BC24
BC28
BC32
L24
AL10
AK21
U30
U31
AN30
RSVD_2
RSVD_3
RSVD_4
U31J
FP4 REV 0.93
SP
@FP4
D D
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Monday, February 15, 2016
Date: Sheet of
Monday, February 15, 2016
Date: Sheet of
1
2
3
4
5
6
Monday, February 15, 2016
PROJECT :
FP4 GND(7/7)
FP4 GND(7/7)
FP4 GND(7/7)
7
ZAB
ZAB
ZAB
8 45
8 45
8 45
1A
1A
1A
8
5
SODIMM (SDM)
M_A_A[13:0][3]
D D
M_A_WE#[3]
M_A_CAS#[3]
M_A_RAS#[3]
+1.2VSUS
R251 CZ@1K/F_4
R252 CZ@1K/F_4
C C
B B
M_A_ALERT#
M_A_EVENT#
MEM_MA_ACT#[3]
R678 *shortCZ@0_4
M_A_EVENT#[3]
M_A_RESET#[3]
M_A_BS#0[3]
M_A_BS#1[3]
M_MA_BG0[3]
M_MA_BG1[3]
M_A0_CS#0[3]
M_A0_CS#1[3]
M_A_CKE0[3]
M_A_CKE1[3]
M_A_CLK0[3]
M_A_CLK0#[3]
M_A_CLK1[3]
M_A_CLK1#[3]
M_A_ODT0[3]
M_A_ODT1[3]
CLK_SCLK[5,10,20,25]
CLK_SDATA[5,10,20,25]
M_A_DM[7..0][3]
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
TP41
TP40
M_A_PARITY
M_A_ALERT#
M_A_EVENT#
M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7 M_A_DQS#7
4
JDIM1A
144
A0
133
A1
132
A2
131
A3
128
A4
126
A5
127
A6
122
A7
125
A8
121
A9
146
A10/AP
120
A11
119
A12
158
A13
151
A14/WE#
156
A15/CAS#
152
A16/RAS#
162
S2#/C0
165
S3#/C1
114
ACT#
143
PARITY
116
ALERT#
134
EVENT#
108
RESET#
150
BA0
145
BA1
115
BG0
113
BG1
149
S0#
157
S1#
109
CKE0
110
CKE1
137
CK0
139
CK0#
138
CK1
140
CK1#
155
ODT0
161
ODT1
253
SCL
254
SDA
256
SA0
260
SA1
166
SA2
92
CB0
91
CB1
101
CB2
105
CB3
88
CB4
87
CB5
100
CB6
104
CB7
12
DM0
33
DM1
54
DM2
75
DM3
178
DM4
199
DM5
220
DM6
241
DM7
96
DM8
CZ@DDR4-DIMM1_H=5.2_RVS
3
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
(260P)
DDR4 SODIMM 260 PIN
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8
DQS#0
DQS#1
DQS#2
DQS#3
DQS#4
DQS#5
DQS#6
DQS#7
DQS#8
M_A_DQ1
7
M_A_DQ2
20
M_A_DQ3
21
M_A_DQ4
4
M_A_DQ5
3
M_A_DQ6
16
M_A_DQ7
17
M_A_DQ8
28
M_A_DQ9
29
M_A_DQ10
41
M_A_DQ11
42
M_A_DQ12
24
M_A_DQ13
25
M_A_DQ14
38
M_A_DQ15
37
M_A_DQ16
50
M_A_DQ17
49
M_A_DQ18
62
M_A_DQ19
63
M_A_DQ20
46
M_A_DQ21
45
M_A_DQ22
58
M_A_DQ23
59
M_A_DQ24
70
M_A_DQ25
71
M_A_DQ26
83
M_A_DQ27
84
M_A_DQ28
66
M_A_DQ29
67
M_A_DQ30
79
M_A_DQ31
80
M_A_DQ32
174
M_A_DQ33
173
M_A_DQ34
187
M_A_DQ35
186
M_A_DQ36
170
M_A_DQ37
169
M_A_DQ38
183
M_A_DQ39
182
M_A_DQ40
195
M_A_DQ41
194
M_A_DQ42
207
M_A_DQ43
208
M_A_DQ44
191
M_A_DQ45
190
M_A_DQ46
203
M_A_DQ47
204
M_A_DQ48
216
M_A_DQ49
215
M_A_DQ50
228
M_A_DQ51
229
M_A_DQ52
211
M_A_DQ53
212
M_A_DQ54
224
M_A_DQ55
225
M_A_DQ56
237
M_A_DQ57
236
M_A_DQ58
249
M_A_DQ59
250
M_A_DQ60
232
M_A_DQ61
233
M_A_DQ62
245
M_A_DQ63
246
M_A_DQS0
13
M_A_DQS1
34
M_A_DQS2
55
M_A_DQS3
76
M_A_DQS4
179
M_A_DQS5
200
M_A_DQS6
221
M_A_DQS7
242
97
M_A_DQS#0
11
M_A_DQS#1
32
M_A_DQS#2
53
M_A_DQS#3
74
M_A_DQS#4
177
M_A_DQS#5
198
M_A_DQS#6
219
240
95
M_A_DQ0
8
M_A_DQ[63:0] [3]
0-7
8-15
16-23
24-31
33-39
40-47
48-55
56-63
M_A_DQS[7:0] [3]
M_A_DQS#[7:0] [3]
2250mA
+1.2VSUS
JDIM1B
111
VDD1
112
VDD2
117
VDD3
118
VDD4
123
VDD5
124
VDD6
129
VDD7
130
VDD8
135
VDD9
136
VDD10
141
VDD11
142
VDD12
147
VDD13
148
VDD14
153
VDD15
154
VDD16
159
VDD17
160
VDD18
163
VDD19
1
VSS1
5
VSS2
9
VSS3
15
VSS4
19
VSS5
23
VSS6
27
VSS7
31
VSS8
35
VSS9
39
VSS10
43
VSS11
47
VSS12
51
VSS13
57
VSS14
61
VSS15
65
VSS16
69
VSS17
73
VSS18
77
VSS19
81
VSS20
85
VSS21
89
VSS22
93
VSS23
99
VSS24
103
VSS25
107
VSS26
167
VSS27
171
VSS28
175
VSS29
181
VSS30
185
VSS31
189
VSS32
193
VSS33
197
VSS34
201
VSS35
205
VSS36
209
VSS37
213
VSS38
217
VSS39
223
VSS40
227
VSS41
231
VSS42
235
VSS43
239
VSS44
243
VSS45
247
VSS46
251
VSS47
CZ@DDR4-DIMM1_H=5.2_RVS
2
+3V
R236
*shortCZ@0_4
255
VDDSPD
VPP1
VPP2
VTT
VREF_CA
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
(260P)
DDR4 SODIMM 260 PIN
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
GND
GND
C384 CZ@1U/6.3V_4
257
259
C775 CZ@1U/6.3V_4
258
+VREF_CA_A0
164
2
6
10
14
18
22
26
30
36
40
44
48
52
56
60
64
68
72
78
82
86
90
94
98
102
106
168
172
176
180
184
188
192
196
202
206
210
214
218
222
226
230
234
238
244
248
252
261
262
+2.5VSUS
+SMDDR_VTT
C410
CZ@1000p/50V_4
(+2.5V_SUS)
0.5A
0.6A
1
9
ADDRESS A0
+1.2VSUS
+1.2VSUS
A A
+1.2VSUS
Place these Caps near So-Dimm A
C377
CZ@0.1u/16V_4
C402
*CZ@0.1u/16V_4
C403
CZ@180P/50V_4
C378
CZ@0.1u/16V_4
C401
*CZ@0.1u/16V_4
C327
CZ@22U/6.3V_6
5
C379
CZ@0.1u/16V_4
C773
*CZ@0.1u/16V_4
C328
CZ@22U/6.3V_6
C381
CZ@0.1u/16V_4
C404
*CZ@0.1u/16V_4
C917
CZ@22U/6.3V_6
C376
CZ@0.1u/16V_4
C405
*CZ@0.1u/16V_4
C918
CZ@22U/6.3V_6
C367
CZ@0.1u/16V_4
C406
*CZ@0.1u/16V_4
C919
CZ@22U/6.3V_6
+SMDDR_VTT
+2.5VSUS
C920
CZ@22U/6.3V_6
4
C417
CZ@4.7U/6.3V_4
(+MEM_VPP)
C409
CZ@180P/50V_4
C418
CZ@0.1u/16V_4
C776
CZ@0.1u/16V_4
C921
CZ@22U/6.3V_6
C774
CZ@0.1u/16V_4
From Power Chip (+0.6V)
+SMDDR_VREF
R270 *CZ@0_6
3mA
3
+1.2VSUS
R263
CZ@1K/F_4
R264
CZ@1K/F_4
+VREF_CA_A0
C412
CZ@0.1u/16V_4
C411
CZ@0.1u/16V_4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Friday, March 04, 2016
Date: Sheet of
Friday, March 04, 2016
Date: Sheet of
2
Friday, March 04, 2016
PROJECT :
DDR4 DIMM A0
DDR4 DIMM A0
DDR4 DIMM A0
ZAB
ZAB
ZAB
9 45
9 45
1
9 45
1A
1A
1A
5
SODIMM (SDM)
M_B_A[13:0][3]
D D
M_B_WE#[3]
M_B_CAS#[3]
M_B_RAS#[3]
+1.2VSUS
R760 1K/F_4
R761 1K/F_4
C C
B B
M_B_ALERT#
M_B_EVENT#
MEM_MB_ACT#[3]
M_B_DM[7..0][3]
M_B_EVENT#[3]
M_B_RESET#[3]
M_B0_CS#0[3]
M_B0_CS#1[3]
M_B_CLK0[3]
M_B_CLK0#[3]
M_B_CLK1[3]
M_B_CLK1#[3]
M_B0_ODT0[3]
M_B0_ODT1[3]
CLK_SCLK[5,9,20,25]
CLK_SDATA[5,9,20,25]
+3V
R312 *short_4
M_B_BS#0[3]
M_B_BS#1[3]
M_MB_BG0[3]
M_MB_BG1[3]
M_B_CKE0[3]
M_B_CKE1[3]
R764 4.7K_4
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
TP81
TP43
M_B_PARITY
M_B_ALERT#
M_B_EVENT#
M_B0_SA0
M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7 M_B_DQS#7
4
JDIM2A
144
A0
133
A1
132
A2
131
A3
128
A4
126
A5
127
A6
122
A7
125
A8
121
A9
146
A10/AP
120
A11
119
A12
158
A13
151
A14/WE#
156
A15/CAS#
152
A16/RAS#
162
S2#/C0
165
S3#/C1
114
ACT#
143
PARITY
116
ALERT#
134
EVENT#
108
RESET#
150
BA0
145
BA1
115
BG0
113
BG1
149
S0#
157
S1#
109
CKE0
110
CKE1
137
CK0
139
CK0#
138
CK1
140
CK1#
155
ODT0
161
ODT1
253
SCL
254
SDA
256
SA0
260
SA1
166
SA2
92
CB0
91
CB1
101
CB2
105
CB3
88
CB4
87
CB5
100
CB6
104
CB7
12
DM0
33
DM1
54
DM2
75
DM3
178
DM4
199
DM5
220
DM6
241
DM7
96
DM8
DDR4-DIMM2_H=5.2_STD
ADDRESS A2
3
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
(260P)
DDR4 SODIMM 260 PIN
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8
DQS#0
DQS#1
DQS#2
DQS#3
DQS#4
DQS#5
DQS#6
DQS#7
DQS#8
M_B_DQ1
7
M_B_DQ2
20
M_B_DQ3
21
M_B_DQ4
4
M_B_DQ5
3
M_B_DQ6
16
M_B_DQ7
17
M_B_DQ8
28
M_B_DQ9
29
M_B_DQ10
41
M_B_DQ11
42
M_B_DQ12
24
M_B_DQ13
25
M_B_DQ14
38
M_B_DQ15
37
M_B_DQ16
50
M_B_DQ17
49
M_B_DQ18
62
M_B_DQ19
63
M_B_DQ20
46
M_B_DQ21
45
M_B_DQ22
58
M_B_DQ23
59
M_B_DQ24
70
M_B_DQ25
71
M_B_DQ26
83
M_B_DQ27
84
M_B_DQ28
66
M_B_DQ29
67
M_B_DQ30
79
M_B_DQ31
80
M_B_DQ32
174
M_B_DQ33
173
M_B_DQ34
187
M_B_DQ35
186
M_B_DQ36
170
M_B_DQ37
169
M_B_DQ38
183
M_B_DQ39
182
M_B_DQ40
195
M_B_DQ41
194
M_B_DQ42
207
M_B_DQ43
208
M_B_DQ44
191
M_B_DQ45
190
M_B_DQ46
203
M_B_DQ47
204
M_B_DQ48
216
M_B_DQ49
215
M_B_DQ50
228
M_B_DQ51
229
M_B_DQ52
211
M_B_DQ53
212
M_B_DQ54
224
M_B_DQ55
225
M_B_DQ56
237
M_B_DQ57
236
M_B_DQ58
249
M_B_DQ59
250
M_B_DQ60
232
M_B_DQ61
233
M_B_DQ62
245
M_B_DQ63
246
M_B_DQS0
13
M_B_DQS1
34
M_B_DQS2
55
M_B_DQS3
76
M_B_DQS4
179
M_B_DQS5
200
M_B_DQS6
221
M_B_DQS7
242
97
M_B_DQS#0
11
M_B_DQS#1
32
M_B_DQS#2
53
M_B_DQS#3
74
M_B_DQS#4
177
M_B_DQS#5
198
M_B_DQS#6
219
240
95
M_B_DQ0
8
M_B_DQ[63:0] [3]
0-7
8-15
16-23
24-31
33-39
40-47
48-55
56-63
M_B_DQS[7:0] [3]
M_B_DQS#[7:0] [3]
2250mA
+1.2VSUS
JDIM2B
111
VDD1
112
VDD2
117
VDD3
118
VDD4
123
VDD5
124
VDD6
129
VDD7
130
VDD8
135
VDD9
136
VDD10
141
VDD11
142
VDD12
147
VDD13
148
VDD14
153
VDD15
154
VDD16
159
VDD17
160
VDD18
163
VDD19
1
VSS1
5
VSS2
9
VSS3
15
VSS4
19
VSS5
23
VSS6
27
VSS7
31
VSS8
35
VSS9
39
VSS10
43
VSS11
47
VSS12
51
VSS13
57
VSS14
61
VSS15
65
VSS16
69
VSS17
73
VSS18
77
VSS19
81
VSS20
85
VSS21
89
VSS22
93
VSS23
99
VSS24
103
VSS25
107
VSS26
167
VSS27
171
VSS28
175
VSS29
181
VSS30
185
VSS31
189
VSS32
193
VSS33
197
VSS34
201
VSS35
205
VSS36
209
VSS37
213
VSS38
217
VSS39
223
VSS40
227
VSS41
231
VSS42
235
VSS43
239
VSS44
243
VSS45
247
VSS46
251
VSS47
DDR4-DIMM2_H=5.2_STD
2
+3V
R289
*short_4
255
257
259
258
164
2
6
10
14
18
22
26
30
36
40
44
48
52
56
60
64
68
72
78
82
86
90
94
98
102
106
168
172
176
180
184
188
192
196
202
206
210
214
218
222
226
230
234
238
244
248
252
261
262
+VREF_CA_B0
C433 1U/6.3V_4
+2.5VSUS
C429 1U/6.3V_4
+SMDDR_VTT
C818
1000p/50V_4
(+2.5V_SUS)
0.5A
0.6A
VDDSPD
VPP1
VPP2
VTT
VREF_CA
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
(260P)
DDR4 SODIMM 260 PIN
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
GND
GND
1
10
+1.2VSUS
+1.2VSUS
A A
+1.2VSUS
Place these Caps near So-Dimm B
C453
0.1u/16V_4
C458
*0.1u/16V_4
C814
180P/50V_4
C452
0.1u/16V_4
C457
*0.1u/16V_4
C325
22U/6.3V_6
C326
22U/6.3V_6
5
C455
0.1u/16V_4
C816
*0.1u/16V_4
C922
22U/6.3V_6
C456
0.1u/16V_4
C459
*0.1u/16V_4
C923
22U/6.3V_6
C454
0.1u/16V_4
C388
*0.1u/16V_4
C924
22U/6.3V_6
C389
0.1u/16V_4
C815
*0.1u/16V_4
C925
22U/6.3V_6
+SMDDR_VTT
C926
22U/6.3V_6
+2.5VSUS
4
C464
4.7U/6.3V_4
C424
180P/50V_4
C465
0.1u/16V_4
C428
0.1u/16V_4
C427
0.1u/16V_4
From Power Chip
+SMDDR_VREF
R315 *0_6
3mA
3
+1.2VSUS
R313
1K/F_4
R314
1K/F_4
+VREF_CA_B0
C462
0.1u/16V_4
C817
0.1u/16V_4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Thursday, March 03, 2016
Date: Sheet of
Thursday, March 03, 2016
Date: Sheet of
2
Thursday, March 03, 2016
PROJECT :
DDR4 DIMM B0
DDR4 DIMM B0
DDR4 DIMM B0
ZAB
ZAB
ZAB
10 45
10 45
1
10 45
1A
1A
1A
5
4
3
2
1
(VGA)
U25A
PEG_RXP0_C
PEG_RXN0_C
PEG_RXP1_C
PEG_RXN1_C
PEG_RXP2_C
PEG_RXN2_C
PEG_RXP3_C
PEG_RXN3_C
PEG_RXP4_C
PEG_RXN4_C
PEG_RXP5_C
PEG_RXN5_C
PEG_RXP6_C
PEG_RXN6_C
PEG_RXP7_C
PEG_RXN7_C
PCIE_CALR_TX
PCIE_CALR_RX
C619 EV@0.22u/10V_4
C618 EV@0.22u/10V_4
C612 EV@0.22u/10V_4
C613 EV@0.22u/10V_4
C614 EV@0.22u/10V_4
C617 EV@0.22u/10V_4
C589 EV@0.22u/10V_4
C592 EV@0.22u/10V_4
C593 EV_SP@0.22u/10V_4
C590 EV_SP@0.22u/10V_4
C585 EV_SP@0.22u/10V_4
C582 EV_SP@0.22u/10V_4
C583 EV_SP@0.22u/10V_4
C586 EV_SP@0.22u/10V_4
C580 EV_SP@0.22u/10V_4
C577 EV_SP@0.22u/10V_4
AC-coupling capactior(depend on GenX, not TYPE)
TYP1&3:(220nF)CH4222K9B04: Only Gen3 and Both of Gen2&3
TYP2 :(100nF)CH4103K1B08: Only Gen2
GPU RESET
DGPU_RST_L[5]
PCIERST#[5,18,21,22,23]
R37 EV@1.69K/F_4
R36 EV@1K/F_4
3
+PCIE_VDDC_GFX
+3V_GFX
2
1
PEG_RXP0 [2]
PEG_RXN0 [2]
PEG_RXP1 [2]
PEG_RXN1 [2]
PEG_RXP2 [2]
PEG_RXN2 [2]
PEG_RXP3 [2]
PEG_RXN3 [2]
PEG_RXP4 [2]
PEG_RXN4 [2]
PEG_RXP5 [2]
PEG_RXN5 [2]
PEG_RXP6 [2]
PEG_RXN6 [2]
PEG_RXP7 [2]
PEG_RXN7 [2]
U26
EV@TC7SH08FU
3 5
C644
EV@0.1u/16V_4
4
X4 : TYP3 (GEN3)
X4 : TYP2 (GEN2)
X8 : TYP1 (GEN3)
PERST#_BUF
R479
*EV@100K/F_4
2
PERST#_BUF [12]
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Friday, March 18, 2016
Date: Sheet of
Friday, March 18, 2016
Date: Sheet of
Friday, March 18, 2016
PROJECT :
R16-M1-70/-30_S3_PCIE(1/7)
R16-M1-70/-30_S3_PCIE(1/7)
R16-M1-70/-30_S3_PCIE(1/7)
ZAB
ZAB
ZAB
1
TEST_PG
AF30
PCIE_RX0P
AE31
PCIE_RX0N
AE29
PCIE_RX1P
AD28
PCIE_RX1N
AD30
PCIE_RX2P
AC31
PCIE_RX2N
AC29
PCIE_RX3P
AB28
PCIE_RX3N
AB30
PCIE_RX4P
AA31
PCIE_RX4N
AA29
PCIE_RX5P
Y28
PCIE_RX5N
Y30
PCIE_RX6P
W31
PCIE_RX6N
W29
PCIE_RX7P
V28
PCIE_RX7N
V30
NC#V30
U31
NC#U31
U29
NC#U29
T28
NC#T28
T30
NC#T30
R31
NC#R31
R29
NC#R29
P28
NC#P28
P30
NC#P30
N31
NC#N31
N29
NC#N29
M28
NC#M28
M30
NC#M30
L31
NC#L31
L29
NC#L29
K30
NC#K30
CLOCK
AK30
PCIE_REFCLKP
AK32
PCIE_REFCLKN
N10
TEST_PG
AL27
PERSTB
EV_SP@R16-M1-70/30_S3
PCIE_TX0P
PCIE_TX0N
PCIE_TX1P
PCIE_TX1N
PCIE_TX2P
PCIE_TX2N
PCIE_TX3P
PCIE_TX3N
PCIE_TX4P
PCIE_TX4N
PCI EXPRESS INTERFACE
PCIE_TX5P
PCIE_TX5N
PCIE_TX6P
PCIE_TX6N
PCIE_TX7P
PCIE_TX7N
CALIBRATION
PCIE_CALR_TX
PCIE_CALR_RX
4
D D
X8 : TYP1 (GEN3)
C C
B B
A A
PEG_TXP0[2]
PEG_TXN0[2]
X4 : TYP3 (GEN3)
X4 : TYP2 (GEN2)
PEG_TXP1[2]
PEG_TXN1[2]
PEG_TXP2[2]
PEG_TXN2[2]
PEG_TXP3[2]
PEG_TXN3[2]
PEG_TXP4[2]
PEG_TXN4[2]
PEG_TXP5[2]
PEG_TXN5[2]
PEG_TXP6[2]
PEG_TXN6[2]
PEG_TXP7[2]
PEG_TXN7[2]
CLK_PCIE_VGAP[6]
CLK_PCIE_VGAN[6]
R124 EV@1K/F_4
PERST#_BUF
5
NC#W24
NC#W23
NC#V27
NC#U26
NC#U24
NC#U23
NC#T26
NC#T27
NC#T24
NC#T23
NC#P27
NC#P26
NC#P24
NC#P23
NC#M27
NC#N26
AH30
AG31
AG29
AF28
AF27
AF26
AD27
AD26
AC25
AB25
Y23
Y24
AB27
AB26
Y27
Y26
W24
W23
V27
U26
U24
U23
T26
T27
T24
T23
P27
P26
P24
P23
M27
N26
Y22
AA22
11
11 45
11 45
11 45
1A
1A
1A
5
(VGA)
The SMBus slave ID is default 0x41
Meso SCL/SDA PU : 47k ohm (CS34702JB21)
Ex
o SCL/SDA PU: 45.3kohm (CS34532FB18)
R155 *shortEV@0_ 4
PERST#_BUF[11]
2ND_MBDATA[4,33]
D D
2ND_MBCLK[4,33]
+3V_GFX
R620 EV@10K/F_4
R518 *EV@10K/F_4
R504 *EV@10K/F_4
R505 *EV@10K/F_4
R507 *EV@10K/F_4
R506 *EV@10K/F_4
R640 *EV@10K/F_4
R551 EV@10K/F_4
R143 *EV@5.1K/F_4
R622
R515 *EV@10K/F_4
C C
Peak Current Control (PCC) GPIO_6.
F
OR MESO ONLY
AMD GAE:GPIO_6 keep as unconnected, don’t stuff
the components on this relative circuitry
SYS_SHDN#[33,35 ,40]
to power IC
PERST#_BUF TEMP_FAIL
PCIE_REQ_GPU#[5]
GPIO_11, 12, and 13 FOR MESO ONLY,
E
XO become NC
B B
A A
C597 EV@8.2P/50V_ 4C
C600 EV@8.2P/50V_ 4C
+1.8V_GFX
EXO MLPS setting PD
MEXO no mount
EXO ONLY: stuff Ra=> disable MLPS
stuff Rb=> enable MLPS
+3V_GFX
EV@2N7002KDW
5
3 4
R166
*EV@4.7K_4
DGPUT_DATA
126
Q7A
Q7B
DGPUT_CLK
EV@2N7002KDW
+3V_GFX
+3V_GFX
R167
EV_SP@45.3K/F_4
R149
EV_SP@45.3K/F_4
PU/PD
DGPU_OPP#
R619 *EV@10K/F_4
GPU_PWM_PROCH OT#
DGPU_TDI
DGPU_TMS
DGPU_TDO
AMD GAE:Debug port TDO left as floating.
DGPU_TRSTB
PEX_CLKREQ#
ZYV doesn't PU PEX_CLKREQ#
VGA_ALERT
R123
TESTEN
EV@1K/F_4
TEMP_FAIL
EV@10K/F_4
D16 *EV@1N41 48WS
AMD GAE:CLKRFQ keep this pin as floating.
ZYV doesn't PD TEMP_FAIL
DGPU_TCK
GPU_PWM_PROCH OT#[41]
3
Q38
*EV@ME2N7002DS-G_300 MA
2
1
EVGA-XTALI
23
Y2
EV@27MHZ_10
4 1
EVGA-XTALO
L2 EV@BLM15 AG121SN1D(120/0.5)_ 4
1.8V(5mA TSVDD)
+3V_GFX
3
Q42
*EV@ME2N7002DS-G_300 MA
R415
EV@1M/F_4
C155
Exo@10U/6.3V_4
2
+3V_GFX
10u X1
1u X1
0.1u X1
GPU_THROTTING#[34]
DGPU_OPP[33]
to power IC
1
a
R
R522 *Exo@10K/F_4
Rb
R502 Exo@10K/F_4
C151
EV@1U/6.3V_4
DP_VDDC
EXO M
R621 *EV@0_4
+1.8V_GFX
+3V_GFX
R509 *EV@1K/F_4
C647
*EV@0.1u/16V_4
PEX_CLKREQ#
R47 EV@10K/F_4
R48 EV@10K/F_4
Exo@0.1U/16V_4X
ESO
1u X1120R beed x1
EV@2N7002K
DGPU_OPP
R497 Meso @10K/F_4
R519 Meso @10K/F_4
R524 *EV@10K/F_4
R501 *EV@10K/F_4
DGPU_OPP#
Q39
2
DGPUT_DATA
DGPUT_CLK
DGPU_OPP#
GPU_GPIO15
VGA_ALERT
TEMP_FAIL
GPU_GPIO20
DGPU_TRSTB
DGPU_TDI
DGPU_TCK
DGPU_TMS
DGPU_TDO
TESTEN
TP1
GPU_D+
GPU_D-
GPU_GPIO28
+1.8V_TSVDD
3
1
GPU_GPIO6
EVGA-XTALI
EVGA-XTALO
4
U25B
N9
DBG_DATA16
L9
DBG_DATA15
AE9
DBG_DATA14
Y11
DBG_DATA13
AE8
DBG_DATA12
AD9
DBG_DATA11
AC10
DBG_DATA10
AD7
DBG_DATA9
AC8
DBG_DATA8
AC7
DBG_DATA7
AB9
DBG_DATA6
AB8
DBG_DATA5
AB7
DBG_DATA4
AB4
DBG_DATA3
AB2
DBG_DATA2
Y8
DBG_DATA1
Y7
DBG_DATA0
W6
NC#W6
V6
NC#V6
AC5
NC#AC5
AC6
N#CAC6
AA5
NC#AA5
AA6
NC#AA6
U1
NC#U1/BP_0
U3
NC#U3/BP_1
Y6
NC#Y6
R1
SCL
R3
SDA
U6
GPIO_0
U8
SMBDATA
U7
SMBCLK
T9
GPIO_5_AC_BATT
T8
PCC/GPIO_6
T7
NC_GPIO_7
P10
GPIO_8_ROMSO
P4
GPIO_9_ROMSI
P2
GPIO_10_ROMSCK
N6
NC_GPIO_11
N5
NC_GPIO_12
N3
NC_GPIO_13
N1
GPIO_15_PWRCNT L_0
M4
GPIO_16
R6
GPIO_17_THERMAL_INT
M2
GPIO_19_CTF
P8
GPIO_20_PWRCNT L_1
P7
GPIO_21
N8
GPIO_22_ROMCSB
AK10
GPIO_29
AM10
GPIO_30
N7
CLKREQB
L6
JTAG_TRSTB
L5
JTAG_TDI
L3
JTAG_TCK
L1
JTAG_TMS
K4
JTAG_TDO
K7
TESTEN
AF24
NC#AF24
W8
NC_GENERICB
W7
NC_GENERICD
AD10
NC_GENERICE_HPD4
AJ9
NC#AJ9
AL9
DBG_CNTL0
AB16
PX_EN
AC16
NC_DBG_VREFG
AM28
XTALIN
AK28
XTALOUT
AC22
XO_IN
AB22
XO_IN2
T4
DPLUS
T2
DMINUS
R5
GPIO28_FDO
AD17
TSVDD
AC17
TSVSS
EV_SP@R16-M1-70/30_S3
DVO
I2C
GENERAL PURPOSE I/O
PLL/CLOCK
THERMAL
NC#AF2
NC#AF4
NC#AG3
DPA
NC#AG5
NC#AH3
NC#AH1
NC#AK3
NC#AK1
NC#AK5
NC#AM3
NC#AK6
NC#AM5
DPB
NC#AJ7
NC#AH6
NC#AK8
NC#AL7
DPC
NC#V4
NC#U5
NC#V2
NC#Y4
NC#W5
NC#Y2
NC#J8
NC#AA1/PLL_ANALOG_IN
NC#AA3/PLL_ANALOG_OU T
DCM/NC_R
NC_AVSSN#AK26
NC_AVSSN#AJ25
NC_AVSSN#AG25
DAC1
NC_HSYNC
NC_VSYNC/WAKEb
NC_RSET
NC_AVDD
NC_AVSSQ
NC_VDD1DI
NC_VSS1DI
NC_SVI2#1/GPIO_SVD
NC_SVI2#2/GPIO_SVT
NC_SVI2#3/GPIO_SVC
NC_GENLK_CLK
NC_GENLK_VSYNC
DAC2
NC_SWAPLOCKA
NC_SWAPLOCKB
DDC/AUX
NC_DDC1CLK
NC_DDC1DATA
NC_AUX1P
NC_AUX1N
NC_AUX2P
NC_AUX2N
NC#AE16
NC#AD16
NC_DDCVGACLK
NC_DDCVGADATA
NC_G
NC_B
NC
PS_0
PS_1
PS_2
PS_3
TS_A
AF2
AF4
AG3
AG5
AH3
AH1
AK3
AK1
AK5
AM3
AK6
AM5
AJ7
AH6
AK8
AL7
V4
U5
V2
Y4
W5
Y2
J8
AA1
AA3
Debug port for the die
AM26
AK26
AL25
AJ25
AH24
AG25
AH26
PCIE_WAKE#_GPU
AJ27
AD22
AG24
AE22
AE23
AD23
AM12
AK12
R498 Meso@0_4
AL11
AJ11
R500 Meso@0_4
AL13
AJ13
AG13
AH12
PS_0
AC19
PS_1
AD19
PS_2
AE17
PS_3
AE20
AE19
R65
*EV@0_4
AE6
AE5
AD2
AD4
AD13
AD11
AE16
AD16
AC1
TP47
AC3
TP45
3
DP_VDDR
EXO M
10u X1
1u X1
0.1u X1
+1.8V_GFX
C153
EV@10U/6.3V_4
+PCIE_VDDC_GFX
C61
Exo@10U/6.3V_4
DP_VDDC
EXO M
10u X1
1u X1
0.1u X1
TP46
R127
*Meso@16.2K/F_4
PLL_ANALOG_OUT: Provide a pull-down
resistor on the PCB (DNI).FOR TOPAZ ONLY
+3V_GFX
PCIeR Optimized Buffer Flush/Fill (OBFF)
R417
on WAKEB FOR TOPAZ ONLY
*MESO@10K/F_4
R403
EV@4.7K_4
1
R402
*EV@10K/F_4
GPU_SVD_R
GPU_SVT
GPU_SVC_R
ESO
10u X1
1u X1
C132
EV@1U/6.3V_4
C127
EV@1U/6.3V_4
ESO
1u X1
0.1u X1
2
Q31
3
*EV@ME2N7002DS-G_300 MA
U25G
AG15
NC_DP_VDDR#1
AG16
NC_DP_VDDR#2
AF16
NC_DP_VDDR#3
AG17
NC_DP_VDDR#4
AG18
NC_DP_VDDR#5
AG19
NC_DP_VDDR#6
AF14
C139
Exo@0.1U/16V_4X
C128
EV@0.1u/16V_4
DP_PVDD
AG20
NC_DP_VDDC#1
AG21
NC_DP_VDDC#2
AF22
NC_DP_VDDC#3
AG22
NC_DP_VDDC#4
AD14
DP_VDDC
AG14
NC_DP_VSSR#1
AH14
NC_DP_VSSR#2
AM14
NC_DP_VSSR#3
AM16
NC_DP_VSSR#4
AM18
NC_DP_VSSR#5
AF23
NC_DP_VSSR#6
AG23
NC_DP_VSSR#7
AM20
NC_DP_VSSR#8
AM22
NC_DP_VSSR#9
AM24
NC_DP_VSSR#10
AF19
NC_DP_VSSR#11
AF20
NC_DP_VSSR#12
AE14
DP_VSSR
AF17
NC_UPHYAB_DP_CALR
EV_SP@R16-M1-70/30_S3
0
110
1
PCIE_LAN_WAKE#
PS0[5:1]
P
PS2[5:1]
PS3[5:1]
PCIE_LAN_WAKE# [5,2 1,22]
+1.8V_GFX
+3V_GFX
S1[5:1]
+1.8V_GFX +1.8V_GFX+1.8V_GFX
R56
EV@8.45K/F_4
PS_0
R57
EV@2K/F_4
+1.8V_GFX
Rpu
R50
EV_SP@8.45K/F_4
R51
Rpd
EV_SP@2K/F_4
+1.8V_GFX
C150
Exo@0.1U/16V_4X
C124
Exo@0.1U/16V_4X
EXO
(M1-30)
11001
11001
11000
11xxx
PS_3
R63
*Meso@10K/F_4
R62
Meso@10K/F_4
MESO
(M1-70)
11001
11001
1000
1
11xxx
C98
*EV@0.01U/50V_4X
PS_3 [5,4] should be 11 due to this is no output/audio design
C93
*EV@680n/6.3V_4
NC/DP POWERDP POWER
S
VDSVC
00
2
AE11
NC#AE11
AF11
NC#AF11
AE13
NC#AE13
AF13
NC#AF13
AG8
NC#AG8
AG10
NC#AG10
AF6
NC#AF6
AF7
NC#AF7
AF8
NC#AF8
AF9
NC#AF9
AE1
NC#AE1
AE3
NC#AE3
AG1
NC#AG1
AG6
NC#AG6
AH5
NC#AH5
AF10
NC#AF10
AG9
NC#AG9
AH8
NC#AH8
AM6
NC#AM6
AM8
NC#AM8
AG7
NC#AG7
AG11
NC#AG11
AE10
NC#AE10
Output Voltage
1.1 Volts
EXTERNAL THERMAL SENSOR
DGPUT_CLK GPU_D+
DGPUT_DATA
VGA_ALERT
U30
8
7
6
4
*EV@G781P8
SCLK
SDA
ALERT#
OVERT#
+3V_GFX
1
VCC
2
DXP
3
DXN
5
GND
C668
*EV@0.1u/16V_4
C661
*EV@2200p/50V_4
1
GPU_D-
1.0 Volts
0.9 Volts
Exo Boot
1 0.8 Volts
EXO Level Shift
+1.8V_GFX
1
R84
Meso@10K/F_4
R90
*Meso@10K/F_4
PS_3[3:1]
00
0
001
010
011 6.98K 4.99K
100
101 3.24K 5.62K
GPU_SVD_R
GPU_SVC_R
Hynix / 2G
S
amsung / 2G
Samsung / 4G
GPU_SVD_R
GPU_SVC_R
VCCA
3
A
2
GND
Exo@G2129TL1U
1
VCCA
3
A
2
GND
Exo@G2129TL1U
peVendor/Total Size
256Mx16 *4,1000Mhz
256Mx16 *8,1000MhzHynix / 4G
256Mx16 *4,1000Mhz
256Mx16 *8,1000Mhz
VCCB
B
OE
VCCB
B
OE
+3V_GFX
U4
6
4
5
R70 Exo@10K/F_4
+3V_GFX+1.8V_GFX
U5
6
4
5
Vendor P/NTy
5TC4G63CFR-N0C
H
H5TC4G63CFR-N0C
K4W4G1646E-BC1A
K4W4G1646E-BC1A
GPU_GPIO15
GPU_GPIO20
GPU_SVT
+1.8V_GFX
R499 Meso @0_4
GPU_GPIO15
GPU_GPIO20
GPU_SVD_R
GPU_SVC_R
QCI STN B/S
AKD5PZDTW03
AKD5PZDTW03
AKD5PGDT504
AKD5PGDT504
+3V_GFX
R523
*Exo@10K/F_4
R503
Exo@10K/F_4
R87
Exo@10K/F_4
R79
*Exo@10K/F_4
GPU_SVT_R [41]
GPU_SVD_R [41]
GPU_SVC_R [41]
to power IC
u
NC
8.45K
4.53K 4.99K
BIT[5:4] C(nF)
680
BIT[3:1]
000
001
010
011
100
101
110
111
00
11082
0
1110NC
Rpu Rpd
8450
4750NC
2000
20004530
49906980
49904530
56203240
100003400
NC4750
R67
R1
EV@8.45K/F_4
R68
R2
EV@2K/F_4
GEN3(TYP1&3) :
R1 8.45K(CS28452FB12)
R2 2K(CS22002FB19)
GEN2(CZL):
R1 NC
R2 4.75K(CS24752FB12)
R75
*EV@0_4
PS_1
C117
*EV@0.01U/50V_4XC138
Quanta P/N====>
4.53K: CS24532FB08 4.99K: CS24992FB26
6.98K: CS26982FB01 3.24K: CS23242FB17
5.62K: CS25622FB18 8.45K: CS28452FB12
4.75K: CS24752FB12 2K: CS22002FB19
PS_2
R76
EV@4.75K/F_4
C126
*EV@0.01U/50V_4X
RpdRp
4.75K
2K
2K4.53K
12
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
ZAB
PROJECT :
ZAB
PROJECT :
Size D ocument Number Rev
Size D ocument Number Rev
Size D ocument Number Rev
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
R16-M1-70/-30_S3_Main(2/7)
R16-M1-70/-30_S3_Main(2/7)
R16-M1-70/-30_S3_Main(2/7)
Friday, March 18, 2016
Friday, March 18, 2016
Friday, March 18, 2016
1
ZAB
12 45
12 45
12 45
1A
1A
1A
5
4
3
2
1
(VGA)
U25E
AA27
PCIE_VSS#1
AB24
PCIE_VSS#2
AB32
D D
C C
B B
A A
PCIE_VSS#3
AC24
PCIE_VSS#4
AC26
PCIE_VSS#5
AC27
PCIE_VSS#6
AD25
PCIE_VSS#7
AD32
PCIE_VSS#8
AE27
PCIE_VSS#9
AF32
PCIE_VSS#10
AG27
PCIE_VSS#11
AH32
PCIE_VSS#12
K28
PCIE_VSS#13
K32
PCIE_VSS#14
L27
PCIE_VSS#15
M32
PCIE_VSS#16
N25
PCIE_VSS#17
N27
PCIE_VSS#18
P25
PCIE_VSS#19
P32
PCIE_VSS#20
R27
PCIE_VSS#21
T25
PCIE_VSS#22
T32
PCIE_VSS#23
U25
PCIE_VSS#24
U27
PCIE_VSS#25
V32
PCIE_VSS#26
W25
PCIE_VSS#27
W26
PCIE_VSS#28
W27
PCIE_VSS#29
Y25
PCIE_VSS#30
Y32
PCIE_VSS#31
M6
GND#56
N11
GND#57
N13
GND#58
N16
GND#59
N18
GND#60
N21
GND#61
P6
GND#62
P9
GND#63
R12
GND#64
R15
GND#65
R17
GND#66
R20
GND#67
T13
GND#68
T16
GND#69
T18
GND#70
T21
GND#71
T6
GND#72
U15
GND#73
U17
GND#74
U20
GND#75
U9
GND#76
V13
GND#77
V16
GND#78
V18
GND#79
Y10
GND#80
Y15
GND#81
Y17
GND#82
Y20
GND#83
AA11
GND#86
M12
GND#87
V11
GND#88
EV_SP@R16-M1-70/30_S3
GND
VSS_MECH#1
VSS_MECH#2
VSS_MECH#3
GND#1
GND#2
GND#3
GND#4
GND#5
GND#6
GND#7
GND#8
GND#9
GND#10
GND#11
GND#12
GND#13
GND#14
GND#15
GND#16
GND#17
GND#18
GND#19
GND#20
GND#21
GND#22
GND#23
GND#24
GND#25
GND#26
GND#27
GND#28
GND#29
GND#30
GND#31
GND#32
GND#33
GND#34
GND#35
GND#36
GND#37
GND#38
GND#39
GND#40
GND#41
GND#42
GND#43
GND#44
GND#45
GND#46
GND#47
GND#48
GND#49
GND#50
GND#51
GND#52
GND#53
GND#54
GND#55
GND#84
GND#85
A3
A30
AA13
AA16
AB10
AB15
AB6
AC9
AD6
AD8
AE7
AG12
AH10
AH28
B10
B12
B14
B16
B18
B20
B22
B24
B26
B6
B8
C1
C32
E28
F10
F12
F14
F16
F18
F2
F20
F22
F24
F26
F6
F8
G10
G27
G31
G8
H14
H17
H2
H20
H6
J27
J31
K11
K2
K22
K6
T11
R11
A32
AM1
AM32
U25F
LVDS CONTROL
NC_UPHYAB_TMDPA_TX0N
NC_UPHYAB_TMDPA_TX0P
NC_UPHYAB_TMDPA_TX1N
NC_UPHYAB_TMDPA_TX1P
NC_UPHYAB_TMDPA_TX2N
NC_UPHYAB_TMDPA_TX2P
NC_UPHYAB_TMDPA_TX3N
NC_UPHYAB_TMDPA_TX3P
NC_TXOUT_L3P
NC_TXOUT_L3N
TMDP
NC_UPHYAB_TMDPB_TX0N
NC_UPHYAB_TMDPB_TX0P
NC_UPHYAB_TMDPB_TX1N
NC_UPHYAB_TMDPB_TX1P
NC_UPHYAB_TMDPB_TX2N
NC_UPHYAB_TMDPB_TX2P
NC_UPHYAB_TMDPB_TX3N
NC_UPHYAB_TMDPB_TX3P
NC_TXOUT_U3P
NC_TXOUT_U3N
EV_SP@R16-M1-70/30_S3
AL15
AK14
AH16
AJ15
AL17
AK16
AH18
AJ17
AL19
AK18
AH20
AJ19
AL21
AK20
AH22
AJ21
AL23
AK22
AK24
AJ23
All the ASIC supplies must reach their respective
nominal voltages within 20 ms of the start of the
ramp-up sequence, though a shorter ramp-up
duration is preferred. The maximum slew rate on
all rails is 50 mV/µs.
It is recommended that the 3.3-V rail ramp up first
The 3.3-V, 1.8-V, and 0.95-V rails must reach their
ready state at least 10 µs before VDDC, VDDCI,
and VMEMIO start to ramp up.
For power down, reversing the ramp-up sequence is
recommended.
Power Up/Down Sequence
VDDR3
3.3V
+1.8V_VGA
10us
+PCIE_VDDC_GFX (0.95V)
+1.5V_GFX
+VGA_CORE
20ms
20ms
13
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
R16-M1-70/-30_S3_GND/LVDS/Strap(3/7)
R16-M1-70/-30_S3_GND/LVDS/Strap(3/7)
R16-M1-70/-30_S3_GND/LVDS/Strap(3/7)
Date: Sheet of
Friday, March 18, 2016
Date: Sheet of
Friday, March 18, 2016
Date: Sheet of
5
4
3
2
Friday, March 18, 2016
PROJECT :
1
ZAB
ZAB
ZAB
13 45
13 45
13 45
1A
1A
1A
5
4
3
2
1
(VGA)
D D
VDDR1
EXO MESO
10u X3
2.2u X5
0.1u X6
+1.5V_GFX
1.35V ( DDR3, MVDDQ = 1.35V@1.2A)
C145
Exo@10U/6.3V_4
C120
Meso@0.01u/50V_4
C C
C53
Exo@10U/6.3V_4
C54
EV@10U/6.3V_4
C118
Exo@0.1U/16V_4X
Meso Power VDD_GPIO33
MPLL_PVDD
EXO MESO
bead 220 X1
10u X1
1u X1
0.1u X1
SPLL_PVDD
EXO MESO
bead 120 X1
10u X1
1u X1
B B
0.1u X1
SPLL_VDDC
EXO M
bead 120 X1
10u X1
1u X1
0.1u X1
bead 220 X1
10u X2
1u X1
+1.8V_GFX
bead 120 X1
1u X1
10u X1
+1.8V_GFX
+PCIE_VDDC_GFX
ESO
bead 120 X1
1u X1
0.1u X1
EXO MESO
10u X1
1u X3
L3 EV@PBY160808T-221Y-N_6
Memory Phase Lock Loop Power :
1.8V @ 90mA
L1 EV@BLM15AG121SN1D(120/0.5)_4
Engine Phase Lock Loop Power :
analog power pin for engine PLL
1.8V @ 75mA
L4 EV@BLM15AG121SN1D(120/0.5)_4
Engine Phase Lock Loop Power :
digital power pin for engine PLL
0.95V @ 100mA
10u X1
2.2u X5
0.1u X1
0.01u X1
MESO Power VMEMIO
C140
EV@2.2U/10V_4
C116
Exo@0.1U/16V_4X
C69
EV@2.2U/10V_4
C134
Exo@0.1U/16V_4X
C159
EV@2.2U/10V_4
C109
Exo@0.1U/16V_4X
Meso Power VDD_GPIO18
10u X1
1u X1
0.1u X1
VDDR3
VDD_CT
EXO M
1u X1bead 120 X1
EV@1U/6.3V_4
C158
ESO
1u X1bead 120 X1
C171
Exo@10U/6.3V_4
Exo@0.1U/16V_4X
Exo@0.1U/16V_4X
Exo@10U/6.3V_4
C166
C161
C189
C81
Exo@10U/6.3V_4
C107
Exo@1U/6.3V_4
EV@10U/6.3V_4
EV@1U/6.3V_4
+0.95V_VGA_SPV10
EV@0.1u/16V_4
C108
EV@2.2U/10V_4
C92
Exo@0.1U/16V_4X
+1.8V_GFX
+3V_GFX
C182
C162
C181
VDD_GPIO18 @13mA
C86
Exo@0.1U/16V_4X
VDD_GPIO33@25mA
C113
Exo@1U/6.3V_4
MPV18
Meso@10U/6.3V_4
SPV18
EV@10U/6.3V_4
EV@1U/6.3V_4
C135
EV@2.2U/10V_4
C125
EV@0.1u/16V_4
C174
C160
C175
C63
EV@1U/6.3V_4
C110
EV@1U/6.3V_4
MPV18
SPV18
U25D
MEM I/O
H13
VDDR1#1
H16
VDDR1#2
H19
VDDR1#3
J10
VDDR1#4
J23
VDDR1#5
J24
VDDR1#6
J9
VDDR1#7
K10
VDDR1#8
K23
VDDR1#9
K24
VDDR1#10
K9
VDDR1#11
L11
VDDR1#12
L12
VDDR1#13
L13
VDDR1#14
L20
VDDR1#15
L21
VDDR1#16
L22
VDDR1#17
LEVEL
TRANSLATION
AA20
VDD_CT#1
AA21
VDD_CT#2
AB20
VDD_CT#3
AB21
VDD_CT#4
I/O
AA17
VDDR3#1
AA18
VDDR3#2
AB17
VDDR3#3
AB18
VDDR3#4
V12
NC_VDDR4#1
Y12
NC_VDDR4#2
U12
NC_VDDR4#3
PLL
L8
MPLL_PVDD
H7
SPLL_PVDD
H8
SPLL_VDDC
J7
SPLL_PVSS
EV_SP@R16-M1-70/30_S3
PCIE
PCIE_VDDC#10
PCIE_VDDC#11
PCIE_VDDC#12
CORE
POWER
VDDC/VARY_BL
VDDC/GENERICA
VDDC/GENERICC
VDDC/DDC2CLK
VDDC/DDC2DATA
VDDC/GPIO_18
VDDC/GPIO_14_HPD2
ISOLATED
CORE I/O
NC#W1/FB_VDDCI
NC#W3/FB_VSS
EXO doesn't support this function
(refer to GPU SCL)
NC#AB23
NC#AC23
NC#AD24
NC#AE24
NC#AE25
NC#AE26
NC#AF25
NC#AG26
PCIE_VDDC#1
PCIE_VDDC#2
PCIE_VDDC#3
PCIE_VDDC#4
PCIE_VDDC#5
PCIE_VDDC#6
PCIE_VDDC#7
PCIE_VDDC#8
PCIE_VDDC#9
VDDC#1
VDDC#2
VDDC#3
VDDC#4
VDDC#5
VDDC#6
VDDC#7
VDDC#8
VDDC#9
VDDC#10
VDDC#11
VDDC#12
VDDC#13
VDDC#14
VDDC#15
VDDC#16
VDDC#17
VDDC#18
VDDC#20
VDDC#21
VDDC#22
VDDC#23
VDDC#24
VDDC#25
VDDC#26
VDDC/DIGON
VDDC/HPD1
VDDC/GPIO_1
VDDC/GPIO_2
BIF_VDDC_1
BIF_VDDC_2
VDDCI#1
VDDCI#2
VDDCI#3
VDDCI#4
VDDCI#5
VDDCI#6
VDDCI#7
VDDCI#8
NC#FB_VDDC
NC#FB_VSS
AB23
AC23
AD24
AE24
AE25
AE26
AF25
AG26
L23
L24
L25
L26
M22
N22
N23
N24
R22
T22
U22
V22
AA15
N15
N17
R13
R16
R18
Y21
T12
T15
T17
T20
U13
U16
U18
V21
V15
V17
V20
Y13
Y16
Y18
AA12
M11
N12
U11
AB11
AB12
AB13
W9
AC11
AC13
AC14
U10
T10
W10
Y9
R21
U21
M13
M15
M16
M17
M18
M20
M21
N20
W1
R131 Meso@0_4
W3
R496 Meso@0_4
GPUVDDC_SENSE_R
AC20
GPUVSS_SENSE_R
AD20
AM30
PCIE_PVDD
PCIE_PVDD
EXO M
10u X1
1u X1
0.1u X1
0.01u X1
PCIE_VDDR : 1.8V @ 100mA
C83
Exo@0.1U/16V_4X
C84
EV@1U/6.3V_4
ESO
10u X1
1u X1
+1.8V_GFX
C91
EV@10U/6.3V_4
PCIE_VDDC : 0.95V @ 2.5A (GEN3.0)
C76
Exo@1U/6.3V_4
C75
EV@1U/6.3V_4
C68
EV@1U/6.3V_4
VDDC+VDDCI:0.85~1.1V(14.2A peak )( Ripple < 87.2mV)
C143
EV@2.2U/10V_4
C154
EV@2.2U/10V_4
C169
EV@10U/6.3V_4
+PCIE_VDDC_GFX
C131
Exo@0.1U/16V_4X
C144
EV@2.2U/10V_4
C95
EV@2.2U/10V_4
C170
EV@10U/6.3V_4
C115
EV@0.1u/16V_4
R401 Meso@0_4
R400 Meso@0_4
C123
EV@2.2U/10V_4
C130
EV@2.2U/10V_4
C133
EV@10U/6.3V_4
0.95V~1.1V(2A VDDCI)
C114
EV@0.1u/16V_4
+VGPU_CORE
GPUVDDC_SENSE [41]
GPUVSS_SENSE [41]
C85
Exo@0.01u/50V_4
+PCIE_VDDC_GFX
C67
EV@1U/6.3V_4
C88
EV@1U/6.3V_4
MESO Power VDDC
+VGPU_CORE
C141
EV@2.2U/10V_4
C89
EV@2.2U/10V_4
C157
EV@10U/6.3V_4
+VGPU_CORE
C121
EV@1U/6.3V_4
C79
EV@1U/6.3V_4
C111
EV@2.2U/10V_4
C90
EV@2.2U/10V_4
C163
Meso@10U/6.3V_4
C112
EV@1U/6.3V_4
PCIE_VDDC
EXO M
10u X2
1u X7
C78
EV@1U/6.3V_4
EXO MESO
10u X4
1u X30
C97
EV@2.2U/10V_4
C119
EV@2.2U/10V_4
C177
Meso@10U/6.3V_4
VDDCI
EXO M
10u X1
1u X3
0.1u X3
C137
EV@1U/6.3V_4
ESO
10u X1
1u X6
C80
EV@10U/6.3V_4
VDDC
C129
EV@2.2U/10V_4
C156
EV@2.2U/10V_4
ESO
10u X2
1u X3
0.1u X2
C176
EV@10U/6.3V_4
10u X6
2.2u X16
C73
Exo@10U/6.3V_4
C142
EV@2.2U/10V_4
C136
Meso@2.2U/10V_4
C193
Meso@10U/6.3V_4
14
A A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Friday, March 18, 2016
Date: Sheet of
Friday, March 18, 2016
Date: Sheet of
5
4
3
2
Friday, March 18, 2016
PROJECT :
R16-M1-70/-30_S3_Power(4/7)
R16-M1-70/-30_S3_Power(4/7)
R16-M1-70/-30_S3_Power(4/7)
ZAB
ZAB
ZAB
14 45
14 45
1
14 45
1A
1A
1A
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