Acer Aspire AOD255 Schematics
A
1 1
B
C
D
E
Compal Confidential
2 2
PAV70 DDR3 Schematics Document
Intel Pineview Processor with Tigerpoint + DDRIII
3 3
REV: 1.0
4 4
Security Classification
Security Classification
2010-06-25
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2006/08/18 2007/8/18
2006/08/18 2007/8/18
2006/08/18 2007/8/18
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
B
B
B
Date: Sheet of
Date: Sheet of
D
Date: Sheet of
Compal Electronics, Inc.
Cover Page
Cover Page
Cover Page
LA-6421P
LA-6421P
LA-6421P
1 39Friday, June 25, 2010
1 39Friday, June 25, 2010
1 39Friday, June 25, 2010
E
0.1
0.1
0.1
A
B
C
D
E
Compal Confidential
Clock Generator
CK505
page 8
Model Name : PAV50
File Name : LA-6421P
1 1
Thermal Sensor
EMC1402
2 2
page 5
MINI Card x1
3G
3 3
Power ON/OFF
DC IN
BATT IN
CHARGER
4 4
page 15
page 18
page 30
page 31
page 32
ZZZ
ZZZ
PCB
PCB
DA60000I610
DA60000I610
WLAN
page 26
DC/DC Interface
3VALW/5VALW
1.5VP/VCCP
0.89VP/1.8VP
0.75VS
page 29
page 33
page 34
page 35
CRT Conn
page 10
LCD Conn.
page 9
PCI-Express
10/100 Ethernet
AR8152
page 25
Transfermer
RJ45
RGB
LVDS
TPM
page 27
Int.KBD
page 19
DMI
X2 mode
GEN1
LPC BUS
Light Sensor
page27
Pineview
FCBGA 559
22x22mm
page 4,5,6
Tigerpoint
PCBGA360
17x17mm
page 11,12,13,14
LPC BUS
ENE KBC
KB926
page 17
Touch Pad
page19
Memory BUS(DDRIII)
1.5V DDRIII 667
SPI
SPI ROM
page 17
SATA
DDRIII-SO-DIMM
USB
HDA
HDD
page 16
Aralia Codec
ALC272
AMP & INT
Speaker
page 7
page 22
INT MIC HeadPhone &
MIC Jack
USB Port x2(L)
page 20
BlueTooth
page 15
CMOS CAM
page 9
3G
page 15
USB Port x1(R)
page 20
Card Reader
ENE6252
page 25
SD/MMC/MS
CONN
CPU_CORE
A
page 36
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2006/08/18 2007/8/18
2006/08/18 2007/8/18
2006/08/18 2007/8/18
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
B
B
B
Date: Sheet of
Date: Sheet of
D
Date: Sheet of
Compal Electronics, Inc.
Block Diagrams
Block Diagrams
Block Diagrams
LA-6421P
LA-6421P
LA-6421P
2 39Friday, June 25, 2010
2 39Friday, June 25, 2010
2 39Friday, June 25, 2010
E
0.1
0.1
0.1
A
1 1
B
C
D
E
Voltage Rails
S5
DescriptionPower Plane
VIN
B+
+CPU_CORE
+VCCP
+1.5VS
+1.5V
+0.89V Graphic core power rail
+3VALW
+3VS
+5VALW
2 2
+5VS
+VSB VSB always on power rail ON
+RTCVCC
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
STATE
Full ON
S1(Power On Suspend)
S3 (Suspend to RAM)
S4 (Suspend to Disk)
S5 (Soft OFF)
3 3
Adapter power supply (19V)
AC or battery power rail for power circuit.
Core voltage for CPU
0.75V switched power rail for DDR terminator+0.75VS
VCCP switched power rail
1.5V switched power rail
1.5V power rail for DDR
3.3V always on power rail
3.3V switched power rail
5V always on power rail
5V switched power rail
RTC power
SIGNAL
SLP_S3#
SLP_S4#
HIGH HIGH HIGH
HIGH
LOW
LOW LOW
LOWLOW
SLP_S5#
HIGHHIGHHIGH
HIGH
HIGH
LOW
+VALW
ON
ON
ON
ON
ON
S3S1
N/A N/A N/A
ON
ON OFF
ON
ON
ON
ON
ON
N/AN/AN/A
OFF
OFFON
OFF
OFFON
OFFOFFON
OFFOFFON
ON
OFF
OFF
ON ON*
OFF
OFF
ON ON*
OFF
OFFON
ON*
ONON
+V +VS Clock
ON
ON
ON
OFF
ON
OFF
OFF
OFF
OFF
ONON
LOW
OFF
OFF
OFF
BOARD ID Table(Page 17)
VCC
Ra
ID
0
1
PAV50
2
3
5
6
7
4 4
3.3V
100K
BRD ID
R01 (EVT)
R02 (DVT)
R03 (PVT)
R10A (MP)
R01 (EVT)4
R02 (DVT)
R03 (PVT)
R10A (MP)
Rb Vab-Typ
Vab-Min
0
8.2K
0.216V
18K
0.436V
33K
56K
1.036V
1.453V 1.759V
100K
1.935V 2.341V
200K
2.500V
NC
0V
0V
0.250V
0.503V
0.819V
1.185V
1.650V
2.200V
3.3V
Vab-Max
0V
0.289V
0.538V
0.875V0.712V
1.264V
3.3V
External PCI Devices
DEVICE REQ/GNT #
IDSEL #
No PCI Device
EC SM Bus1 address
Device
Smart Battery
Address
EC SM Bus2 address
ICH7M SM Bus address
Device
Clock Generator
(SLG8SP556VTR)
DDR DIMMA
Address
1101 001Xb
1010 000Xb
Device
EMC1402
PIRQ
Address
100_11000001 011X b
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2006/08/18 2007/8/18
2006/08/18 2007/8/18
2006/08/18 2007/8/18
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
B
B
B
Date: Sheet of
Date: Sheet of
D
Date: Sheet of
Compal Electronics, Inc.
Notes List
Notes List
Notes List
LA-6421P
LA-6421P
LA-6421P
3 39Monday, May 03, 2010
3 39Monday, May 03, 2010
3 39Monday, May 03, 2010
E
0.1
0.1
0.1
5
U71
U71
DMI_RX0_R
C435
C435
C436
C436
C437
C437
C438
C438
DMI_RX#0_R
DMI_RX1_R
DMI_RX#1_R
1 2
0.1U_0402_10V7K
0.1U_0402_10V7K
1 2
0.1U_0402_10V7K
0.1U_0402_10V7K
1 2
0.1U_0402_10V7K
0.1U_0402_10V7K
1 2
0.1U_0402_10V7K
0.1U_0402_10V7K
N455@
N455@
D D
C C
CLK_CPU_EXP#(8)
CLK_CPU_EXP(8)
U71
U71
N550@
N550@
DMI_RX0(13)
DMI_RX#0(13)
DMI_RX1(13)
DMI_RX#1(13)
F3
F2
H4
G3
N7
N6
R10
R9
N10
N9
K2
J1
M4
L3
DMI_RX0_R
DMI_RX#0_R
DMI_RX1_R
DMI_RX#1_R
U71A
U71A
DMI_RXP_0
DMI_RXN_0
DMI_RXP_1
DMI_RXN_1
EXP_CLKINN
EXP_CLKINP
EXP_TCLKINN
EXP_TCLKINP
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
PINEVIEW-M_FCBGA8559
PINEVIEW-M_FCBGA8559
PINEVIEW_M
PINEVIEW_M
+VCCP
REV = 1.1
REV = 1.1
DMI
DMI
Close to CPU
2010-1-18 modify
+1.5V
R1412
R1412
@
@
10K_0402_5%
10K_0402_5%
1 2
R1413
DRAMRST#_R DRAMRST#
B B
FAN1 Conn
EN_FAN1(17)
A A
R1413
1 2
0_0402_5%
0_0402_5%
DRAMRST# (7)
Modify follow KAV60 schematic 06/12
+5VS
+VCC_FAN1
1 2
R47 330 _0402_5%R47 330 _0402_5%
FAN_SPEED1(17)
5
1
2
3
4
1
C1151
C1151
0.01U_0402_16V7K
0.01U_0402_16V7K
2
U12
U12
APL5607KI-TRG_SO8
APL5607KI-TRG_SO8
+3VS
C312 2.2U_0603_10V6KC312 2.2U_0603_10V6K
1 2
EN
VIN
VOUT
VSET
12
1
2
8
GND
7
GND
6
GND
5
GND
R256
R256
10K_0402_5%
10K_0402_5%
C311
3G@C311
3G@
100P_0402_50V8J
100P_0402_50V8J
40mil
+VCC_FAN1
+5VS
3
N475@
N475@
DMI_TXP_0
DMI_TXN_0
DMI_TXP_1
DMI_TXN_1
EXP_RCOMPO
EXP_ICOMPI
EXP_RBIAS
1 OF 6
1 OF 6
H_PWRGD(5,13)
SLPIOVR#(13)
PLTRST#(5,13,15,17,25,26,27)
2
D19
@D19
@
DAN217_SC59
DAN217_SC59
1
1 2
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
C313
C313
1 2
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
C1150
C1150
1000P_0402_50V7K
1000P_0402_50V7K
1 2
1
2
3
ACES_85204-03001
ACES_85204-03001
4
RSVD_TP
RSVD_TP
RSVD
RSVD
RSVD
RSVD
XDP_PREQ#(5)
XDP_PRDY#(5)
XDP_BPM#3(5)
XDP_BPM#2(5)
XDP_BPM#1(5)
XDP_BPM#0(5)
XDP_TDO(5)
XDP_TRST#(5)
XDP_TCK(5)
C314
C314
JP12
JP12
1
2
3
CONN@
CONN@
4
G2
G1
H3
J2
L10
L9
L8
N11
P11
K3
L2
M2
N2
R354 1K_0402_5%@R354 1K_0402_5%@
R347 1K_0402_5%@R347 1K_04 02_5%@
CPU_ITP(8)
CPU_ITP#(8)
PLTRST#
XDP_TDI(5)
XDP_TMS(5)
4
G1
5
G2
3
DMI_TX0 (13)
DMI_TX#0 (13)
DMI_TX1 (13)
DMI_TX#1 (13)
R162
R162
R203
R203
49.9_0402_1%
49.9_0402_1%
750_0402_1%
750_0402_1%
T38T38
Must be placed within 500 mils from Pineview-M pins
T39T39
JP16
XDP_PREQ#
XDP_PRDY#
XDP_BPM#3
XDP_BPM#2
XDP_BPM#1
XDP_BPM#0
1 2
1 2
R348
R348
1 2
XDP_TDO
XDP_TRST#
XDP_TDI
XDP_TMS
XDP_TCK
XDP Reserve
XDP_TDI
XDP_TMS
XDP_TDO
XDP_PREQ#
XDP_TRST#
XDP_TCK
1K_0402_1%@
1K_0402_1%@
JP16
CONN@
CONN@
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
21
21
22
22
23
23
24
24
25
G1
26
G2
ACES_87151-24051
ACES_87151-24051
+VCCP
R341 51 +-1% 0402R341 51 +-1% 0402
1 2
R342 51 +-1% 0402R342 51 +-1% 0402
1 2
R343 51 +-1% 0402R343 51 +-1% 0402
1 2
R344 51 +-1% 0402R344 51 +-1% 0402
1 2
R345 51 +-1% 0402R345 51 +-1% 0402
1 2
R346 51 +-1% 0402R346 51 +-1% 0402
1 2
Modify D38 D39 D40 Pin define 08/13
XDP_PREQ#
XDP_TDO
XDP_TRST#
XDP_TDI
Security Classification
Security Classification
Security Classification
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2
3
1
Issued Date
Issued Date
Issued Date
D40
D40
XDP_TMS
XDP_TCK
PJDLC05C_SOT23-3
PJDLC05C_SOT23-3
3
2
DDR_A_DQS#[0..7](7)
DDR_A_D[0..63](7)
DDR_A_DM[0..7](7)
DDR_A_DQS[0..7](7)
DDR_A_MA[0..14](7)
DDR_A_WE#(7)
DDR_A_CAS#(7)
DDR_A_RAS#(7)
DDR_A_BS0(7)
DDR_A_BS1(7)
DDR_A_BS2(7)
DDR_CS#0(7)
DDR_CS#1(7)
DDR_CKE0(7)
DDR_CKE1(7)
M_ODT0(7)
M_ODT1(7)
M_CLK_DDR0(7)
M_CLK_DDR#0(7)
M_CLK_DDR1(7)
M_CLK_DDR#1(7)
DRAM_PWROK(7)
DRAM_PWROK
DDR_A_MA0
DDR_A_MA1
DDR_A_MA2
DDR_A_MA3
DDR_A_MA4
DDR_A_MA5
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA11
DDR_A_MA12
DDR_A_MA13
DDR_A_MA14
DDR_A_WE#
DDR_A_CAS#
DDR_A_RAS#
DDR_A_BS0
DDR_A_BS1
DDR_A_BS2
DDR_CS#0
DDR_CS#1
DDR_CKE0
DDR_CKE1
M_ODT0
M_ODT1
M_CLK_DDR0
M_CLK_DDR#0
M_CLK_DDR1
M_CLK_DDR#1
2010/01/18 DDR3 add
+1.5V +1.5V
12
R50
R50
1K_0402_1%
1K_0402_1%
12
2
R142
R142
1K_0402_1%
1K_0402_1%
2
3
D38
2
3
D39
D39
1
PJDLC05C_SOT23-3
PJDLC05C_SOT23-3
D38
1
Add 2009-6-17
2006/08/18 2007/8/18
2006/08/18 2007/8/18
2006/08/18 2007/8/18
0.1U_0402_10V7K
0.1U_0402_10V7K
C439
C439
1
PJDLC05C_SOT23-3
PJDLC05C_SOT23-3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
R243
R243
80.6_0402_1%
80.6_0402_1%
R242
R242
80.6_0402_1%
80.6_0402_1%
2
C440
C440
0.01U_0402_16V7K
0.01U_0402_16V7K
1
DRAM_PWROK
DRAMRST#_R
R370
R370
0_0402_5%
0_0402_5%
@
@
1 2
T40T40
T41T41
2
AH19
AJ18
AK18
AK16
AJ14
AH14
AK14
AJ12
AH13
AK12
AK20
AH12
AJ11
AJ24
AJ10
AK22
AJ22
AK21
AJ20
AH20
AK11
AH22
AK25
AJ21
AJ25
AH10
AH9
AK10
AK24
AH26
AH24
AK27
AG15
AF15
AD13
AC13
AC15
AD15
AF13
AG13
AD17
AC17
AB15
AB17
AB4
AK8
AB11
AB13
AL28
AK28
AJ26
AK29
AJ8
U71B
U71B
DDR_A_MA_0
DDR_A_MA_1
DDR_A_MA_2
DDR_A_MA_3
DDR_A_MA_4
DDR_A_MA_5
DDR_A_MA_6
DDR_A_MA_7
DDR_A_MA_8
DDR_A_MA_9
DDR_A_MA_10
DDR_A_MA_11
DDR_A_MA_12
DDR_A_MA_13
DDR_A_MA_14
DDR_A_WE#
DDR_A_CAS#
DDR_A_RAS#
DDR_A_BS_0
DDR_A_BS_1
DDR_A_BS_2
DDR_A_CS#_0
DDR_A_CS#_1
DDR_A_CS#_2
DDR_A_CS#_3
DDR_A_CKE_0
DDR_A_CKE_1
DDR_A_CKE_2
DDR_A_CKE_3
DDR_A_ODT_0
DDR_A_ODT_1
DDR_A_ODT_2
DDR_A_ODT_3
DDR_A_CK_0
DDR_A_CK_0#
DDR_A_CK_1
DDR_A_CK_1#
DDR_A_CK_3
DDR_A_CK_3#
DDR_A_CK_4
DDR_A_CK_4#
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD_TP
RSVD_TP
DDR_VREF
DDR_RPD
DDR_RPU
RSVD
PINEVIEW-M_FCBGA8559
PINEVIEW-M_FCBGA8559
PINEVIEW_M
PINEVIEW_M
DDR_A
DDR_A
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
REV = 1.1
REV = 1.1
2 OF 6
2 OF 6
N475@
N475@
DDR_A_DQS_0
DDR_A_DQS#_0
DDR_A_DM_0
DDR_A_DQ_0
DDR_A_DQ_1
DDR_A_DQ_2
DDR_A_DQ_3
DDR_A_DQ_4
DDR_A_DQ_5
DDR_A_DQ_6
DDR_A_DQ_7
DDR_A_DQS_1
DDR_A_DQS#_1
DDR_A_DM_1
DDR_A_DQ_8
DDR_A_DQ_9
DDR_A_DQ_10
DDR_A_DQ_11
DDR_A_DQ_12
DDR_A_DQ_13
DDR_A_DQ_14
DDR_A_DQ_15
DDR_A_DQS_2
DDR_A_DQS#_2
DDR_A_DM_2
DDR_A_DQ_16
DDR_A_DQ_17
DDR_A_DQ_18
DDR_A_DQ_19
DDR_A_DQ_20
DDR_A_DQ_21
DDR_A_DQ_22
DDR_A_DQ_23
DDR_A_DQS_3
DDR_A_DQS#_3
DDR_A_DM_3
DDR_A_DQ_24
DDR_A_DQ_25
DDR_A_DQ_26
DDR_A_DQ_27
DDR_A_DQ_28
DDR_A_DQ_29
DDR_A_DQ_30
DDR_A_DQ_31
DDR_A_DQS_4
DDR_A_DQS#_4
DDR_A_DM_4
DDR_A_DQ_32
DDR_A_DQ_33
DDR_A_DQ_34
DDR_A_DQ_35
DDR_A_DQ_36
DDR_A_DQ_37
DDR_A_DQ_38
DDR_A_DQ_39
DDR_A_DQS_5
DDR_A_DQS#_5
DDR_A_DM_5
DDR_A_DQ_40
DDR_A_DQ_41
DDR_A_DQ_42
DDR_A_DQ_43
DDR_A_DQ_44
DDR_A_DQ_45
DDR_A_DQ_46
DDR_A_DQ_47
DDR_A_DQS_6
DDR_A_DQS#_6
DDR_A_DM_6
DDR_A_DQ_48
DDR_A_DQ_49
DDR_A_DQ_50
DDR_A_DQ_51
DDR_A_DQ_52
DDR_A_DQ_53
DDR_A_DQ_54
DDR_A_DQ_55
DDR_A_DQS_7
DDR_A_DQS#_7
DDR_A_DM_7
DDR_A_DQ_56
DDR_A_DQ_57
DDR_A_DQ_58
DDR_A_DQ_59
DDR_A_DQ_60
DDR_A_DQ_61
DDR_A_DQ_62
DDR_A_DQ_63
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
1
AD3
AD2
AD4
AC4
AC1
AF4
AG2
AB2
AB3
AE2
AE3
AB8
AD7
AA9
AB6
AB7
AE5
AG5
AA5
AB5
AB9
AD6
AD8
AD10
AE8
AG8
AG7
AF10
AG11
AF7
AF8
AD11
AE10
AK5
AK3
AJ3
AH1
AJ2
AK6
AJ7
AF3
AH2
AL5
AJ6
AG22
AG21
AD19
AE19
AG19
AF22
AD22
AG17
AF19
AE21
AD21
AE26
AG27
AJ27
AE24
AG25
AD25
AD24
AC22
AG24
AD27
AE27
AE30
AF29
AF30
AG31
AG30
AD30
AD29
AJ30
AJ29
AE29
AD28
AB27
AA27
AB26
AA24
AB25
W24
W22
AB24
AB23
AA23
W27
Pineview(1/3)
Pineview(1/3)
Pineview(1/3)
LA-6421P
LA-6421P
LA-6421P
1
DDR_A_DQS0
DDR_A_DQS#0
DDR_A_DM0
DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7
DDR_A_DQS1
DDR_A_DQS#1
DDR_A_DM1
DDR_A_D8
DDR_A_D9
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15
DDR_A_DQS2
DDR_A_DQS#2
DDR_A_DM2
DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_DQS3
DDR_A_DQS#3
DDR_A_DM3
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31
DDR_A_DQS4
DDR_A_DQS#4
DDR_A_DM4
DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_DQS5
DDR_A_DQS#5
DDR_A_DM5
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47
DDR_A_DQS6
DDR_A_DQS#6
DDR_A_DM6
DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_DQS7
DDR_A_DQS#7
DDR_A_DM7
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63
4 39Monday, June 28, 2010
4 39Monday, June 28, 2010
4 39Monday, June 28, 2010
0.1
0.1
0.1
5
4
3
2
1
Add 470PF on H_SMI# for known issue 07/08
N475@
PINEVIEW_M
U71C
U71C
D12
T2T2
T12T12
T3T3
T4T4
D D
1 2
C C
B B
A A
T13T13
T5T5
T6T6
R1378
R1378
T7T7
T14T14
T8T8
1K_0402 _5%
1K_0402 _5%
T15T15
T9T9
T16T16
T10T10
T17T17
T11T11
T28T28
T37T37
T18T18
T19T19
T20T20
T21T21
T22T22
T23T23
T24T24
T25T25
H_THERMDA, H_THERMDC routing together.
Trace width / Spacing = 10 / 10 mil
+3VS
1
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C79
C79
1 2
2200P_0 402_50V7K
2200P_0 402_50V7K
C80
C80
XDP_RSVD_00
A7
XDP_RSVD_01
D6
XDP_RSVD_02
C5
XDP_RSVD_03
C7
XDP_RSVD_04
C6
XDP_RSVD_05
D8
XDP_RSVD_06
B7
XDP_RSVD_07
A9
XDP_RSVD_08
D9
XDP_RSVD_09
C8
XDP_RSVD_10
B8
XDP_RSVD_11
C10
XDP_RSVD_12
D10
XDP_RSVD_13
B11
XDP_RSVD_14
B10
XDP_RSVD_15
B12
XDP_RSVD_16
C11
XDP_RSVD_17
L11
RSVD
AA7
RSVD_TP
AA6
RSVD_TP
R5
RSVD_TP
R6
RSVD_TP
AA21
RSVD_TP
W21
RSVD_TP
T21
RSVD_TP
V21
RSVD_TP
PINEVIEW-M_FCBGA8559
PINEVIEW-M_FCBGA8559
H_THERM DA
H_THERM DC
5
PINEVIEW_M
CPU THERMAL SENSOR
U2
U2
1
VDD
2
DP
3
DN
4
THERM#
EMC1402 -1-ACZL-TR MSOP 8P SENSOR
EMC1402 -1-ACZL-TR MSOP 8P SENSOR
Address:100_1100
N475@
REV = 1.1
REV = 1.1
VGA
VGA
MISC
MISC
CRT_HSYNC
CRT_VSYNC
CRT_RED
CRT_GREEN
CRT_BLUE
CRT_IRTN
CRT_DDC_DATA
CRT_DDC_CLK
DAC_IREF
REFCLKINP
REFCLKINN
REFSSCLKINP
REFSSCLKINN
PM_EXTTS#_1/DPRSLPVR
PM_EXTTS#_0
PWROK
HPL_CLKINN
HPL_CLKINP
3 OF 6
3 OF 6
8
SMCLK
7
SMDATA
6
ALERT#
5
GND
RSTIN#
EC_SMB_ CK2
EC_SMB_ DA2
GMCH_CR T_HSYNC_R
M30
GMCH_CR T_VSYNC_R
M29
GMCH_CR T_R
N31
GMCH_CR T_G
P30
GMCH_CR T_B
P29
N30
L31
L30
P28
CPU_DRE FCLK
Y30
CPU_DRE FCLK#
Y29
CPU_SSC DREFCLK
AA30
CPU_SSC DREFCLK#
AA31
PM_EXTT S#1
K29
PM_EXTT S#0
J30
H_PW ROK
L5
PLTRST#
AA3
CLK_CPU _HPLCLK#
W8
CLK_CPU _HPLCLK
W9
R249 15_040 2_5%R249 15_040 2_5%
1 2
1 2
R247 15_040 2_5%R247 15_040 2_5%
GMCH_CR T_R (10)
GMCH_CR T_G (10)
GMCH_CR T_B (10 )
GMCH_CR T_DATA (10)
GMCH_CR T_CLK (10)
R201 665_040 2_1%R201 665_040 2_1%
0_0402_ 5%
0_0402_ 5%
R200
R200
PM_EXTT S#0 (7)
PLTRST# (4,13,15,17 ,25,26,27)
Modify 08/04
R305
H_PW ROK
R305
1 2
0_0402_ 5%
0_0402_ 5%
R306
R306
1 2
0_0402_ 5%
0_0402_ 5%
Place closed to chipset
GMCH_CR T_R
GMCH_CR T_G
GMCH_CR T_B
GMCH_EN BKL
EC_SMB_ CK2 (17,27 )
R58
R58
10K_040 2_5%
10K_040 2_5%
EC_SMB_ DA2 (17,2 7)
12
4
+3VS
GMCH_CR T_HSYNC (10)
GMCH_CR T_VSYNC (10 )
LVDS_AC LK#(9)
LVDS_AC LK(9)
LVDS_A0 #(9)
LVDS_A0(9)
LVDS_A1 #(9)
LVDS_A1(9)
LVDS_A2 #(9)
LVDS_A2(9)
R151
R151
2.37K_04 02_1%
CPU_DRE FCLK (8)
CPU_DRE FCLK# (8)
CPU_SSC DREFCLK (8)
CPU_SSC DREFCLK# (8)
Add INVT_PWM 05/11
PM_DPRS LPVR (1 3)
CLK_CPU _HPLCLK# (8)
CLK_CPU _HPLCLK (8)
@
@
R307
R307
1 2
150_040 2_1%
150_040 2_1%
R308
R308
1 2
150_040 2_1%
150_040 2_1%
R309
R309
1 2
150_040 2_1%
150_040 2_1%
R34
R34
100K_04 02_5%
100K_04 02_5%
VGATE (8,1 3,17,36)
PCH_POK (1 3,17)
GMCH_EN BKL(17)
INVT_PW M(9,17)
LVDS_SC L(9)
LVDS_SD A(9)
GMCH_EN VDD(9)
Del R323 05/11
XDP_TDI(4)
XDP_TDO(4)
XDP_TCK(4)
XDP_TMS(4)
XDP_TRS T#(4)
XDP_TCK
T58T58
XDP_TDI
T59T59
XDP_TDO
T60T60
XDP_TMS
T61T61
XDP_TRS T#
T62T62
H_PW RGD
T63T63
PM_EXTT S#0
Close to Processor
pin
Security Class ification
Security Class ification
Security Class ification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2006/08/ 18 2007/8/1 8
2006/08/ 18 2007/8/1 8
2006/08/ 18 2007/8/1 8
3
2.37K_04 02_1%
GMCH_EN BKL
0_0402_ 5%
0_0402_ 5%
R213
R213
XDP_BPM #0(4)
XDP_BPM #1(4)
XDP_BPM #2(4)
XDP_BPM #3(4)
H_THERM DA
H_THERM DC
+3VS
12
R143
R143
10K_040 2_5%
10K_040 2_5%
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
@
@
T48T48
T49T49
T50T50
T51T51
T55T55
XDP_TDI
XDP_TDO
XDP_TCK
XDP_TMS
XDP_TRS T#
Close to Processor
pin
U71D
U71D
U25
LA_CLKN
U26
LA_CLKP
R23
LA_DATAN_0
R24
LA_DATAP_0
N26
LA_DATAN_1
N27
LA_DATAP_1
R26
LA_DATAN_2
R27
LA_DATAP_2
R22
LIBG
J28
LVBG
N22
LVREFH
N23
LVREFL
L27
LBKLT_EN
L26
LBKLT_CTL
L23
LCTLA_CLK
K25
LCTLB_DATA
K23
LDDC_CLK
K24
LDDC_DATA
H26
LVDD_EN
G11
BPM_1_0#
E15
BPM_1_1#
G13
BPM_1_2#
F13
BPM_1_3#
B18
BPM_2_0#/RSVD
B20
BPM_2_1#/RSVD
C20
BPM_2_2#/RSVD
B21
BPM_2_3#/RSVD
G5
RSVD
D14
TDI
D13
TDO
B14
TCK
C14
TMS
C16
TRST#
D30
THRMDA_1
E30
THRMDC_1
C30
THRMDA_2/RSVD
D31
THRMDC_2/RSVD
PINEVIEW-M_FCBGA8559
PINEVIEW-M_FCBGA8559
H_PROCH OT#
+VCCP
R202
R202
68_0402 _5%
68_0402 _5%
2
N475@
4 OF 6
4 OF 6
REV = 1.1
REV = 1.1
CPU
CPU
ICH
ICH
H_GTLRE F
N475@
C939
@ C939
@
CPUPWRGOOD
1
2
1U_0603_10V6K
1U_0603_10V6K
PINEVIEW_M
PINEVIEW_M
LVDS
LVDS
placed within 0.5"
of processor pin.
Title
Title
Title
Size Docum ent Number Rev
Size Docum ent Number Rev
Size Docum ent Number Rev
B
B
B
Date: Sheet of
Date: Sheet of
Date: Sheet of
SMI#
A20M#
FERR#
LINT0
LINT1
IGNNE#
STPCLK#
DPRSTP#
DPSLP#
INIT#
PRDY#
PREQ#
THERMTRIP#
PROCHOT#
GTLREF
VSS
RSVD
RSVD
BCLKN
BCLKP
BSEL_0
BSEL_1
BSEL_2
VID_0
VID_1
VID_2
VID_3
VID_4
VID_5
VID_6
RSVD
RSVD
RSVD
RSVD
RSVD_TP
RSVD_TP
EXTBGREF
+VCCP
R144
R144
1K_0402 _1%
1K_0402 _1%
R155
R155
2K_0402 _1%
2K_0402 _1%
C1171
C1171
@
@
1 2
470P_04 02_50V7K
470P_04 02_50V7K
H_SMI#
E7
H7
H6
F10
F11
E5
F8
G6
G10
G8
E11
F15
E13
C18
W1
A13
H27
L6
E17
H10
J10
K5
H5
K6
H30
H29
H28
G30
G29
F29
E29
L7
D20
H13
D18
K9
D19
K7
H_A20M#
H_FERR#
H_INTR
H_NMI
H_IGNNE#
H_STPCL K#
H_DPRST P#
H_DPSLP #
H_INIT#
XDP_PRD Y#
XDP_PRE Q#
H_THERM TRIP#
H_PROCH OT#
H_PW RGD
H_GTLRE F
CLK_CPU _BCLK#
CLK_CPU _BCLK
CPU_BSE L0
CPU_BSE L1
CPU_BSE L2
CPU_VID0
CPU_VID1
CPU_VID2
CPU_VID3
CPU_VID4
CPU_VID5
CPU_VID6
T26T26
T27T27
H_EXTBG REF
H_SMI# (12)
H_A20M# (12)
H_FERR# (12)
H_INTR (12)
H_NMI (12)
H_IGNNE# (12)
H_STPCL K# (12)
H_DPRST P# (13 )
H_DPSLP # (13)
H_INIT# (12 )
XDP_PRD Y# (4)
XDP_PRE Q# (4 )
H_THERM TRIP# (12)
H_PW RGD (4,13)
CPU_BSE L0 (8)
CPU_BSE L1 (8)
CPU_BSE L2 (8)
CPU_VID0 (36)
CPU_VID1 (36)
CPU_VID2 (36)
CPU_VID3 (36)
CPU_VID4 (36)
CPU_VID5 (36)
CPU_VID6 (36)
H_EXTBG REF
C940
@ C940
@
1U_0603_10V6K
1U_0603_10V6K
CLK_CPU _BCLK# (8 )
CLK_CPU _BCLK (8)
+VCCP
1
2
placed within 0.5"
of processor pin.
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Pineview(2/3)
Pineview(2/3)
Pineview(2/3)
LA-6421P
LA-6421P
LA-6421P
5 39Thursday, June 03 , 2010
5 39Thursday, June 03 , 2010
5 39Thursday, June 03 , 2010
1
R244
R244
976_040 2_1%
976_040 2_1%
R156
R156
3.3K_040 2_1%
3.3K_040 2_1%
0.1
0.1
0.1
5
U71E
W14
W16
W18
W19
U71E
T13
VCCGFX
T14
VCCGFX
T16
VCCGFX
T18
VCCGFX
T19
VCCGFX
V13
VCCGFX
V19
VCCGFX
VCCGFX
VCCGFX
VCCGFX
VCCGFX
GFX/MCH
GFX/MCH
PINEVIEW_M
PINEVIEW_M
REV = 1.1
REV = 1.1
GFX supply current: 2.64A
+0.89V
D D
DDR supply current 2.27A
+1.5V
C268
C268
1
+1.5V
C C
C267
C267
22UF 6.3V M X5R 0805
22UF 6.3V M X5R 0805
B B
+1.8VS
2
22UF 6.3V M X5R 0805
22UF 6.3V M X5R 0805
1
1
+VCCP
DDR analog supp ly current: 1. 32A
2
2
C238
C238
C55
C55
1U_0402_6.3V6K
1U_0402_6.3V6K
R321
R321
12
0_0603_5%
0_0603_5%
+3VS
DAC & GIO & LGI supply current: 0.19A
+VCCP
LGI &DPLL supply current: 0.06A
+0.89V
C74
C74
A A
Modify to 2.2U 05/11
2
1
2.2U_0603_10V6K
2.2U_0603_10V6K
C82
C82
C83
C83
1
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1
C243
C243
2
22UF 6.3V M X5R 0805
22UF 6.3V M X5R 0805
C192
C192
1
2
1U_0603_10V6K
1U_0603_10V6K
+RING_EAST
+RING_WEST
C81
C81
1
2
1U_0402_6.3V6K
1U_0402_6.3V6K
C84
C84
C85
C85
1
1
1
2
2
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
@
@
1
1
C236
C236
2
2
1U_0603_10V6K
1U_0603_10V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
C189
C189
1
2
+VCC_CRT_DAC
1U_0603_10V6K
1U_0603_10V6K
C70
C70
C76
C76
C71
C71
1
1
1
2
2
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
Close Chipset pin
5
AK13
VCCSM
AK19
VCCSM
AK9
VCCSM
AL11
VCCSM
AL16
VCCSM
AL21
VCCSM
AL25
VCCSM
AK7
VCCCK_DDR
AL7
VCCCK_DDR
U10
VCCA_DDR
U5
VCCA_DDR
U6
VCCA_DDR
U7
VCCA_DDR
U8
VCCA_DDR
U9
VCCA_DDR
V2
VCCA_DDR
V3
VCCA_DDR
V4
VCCA_DDR
W10
VCCA_DDR
W11
VCCA_DDR
AA10
VCCACK_DDR
AA11
VCCACK_DDR
AA19
VCCD_AB_DPL
V11
VCCD_HMPLL
AC31
VCCSFR_AB_DPL
T30
VCCACRTDAC
T31
VCC_GIO
J31
VCCRING_EAST
C3
VCCRING_WEST
B2
VCCRING_WEST
C2
VCCRING_WEST
A21
VCC_LGI
PINEVIEW-M_FCBGA8559
PINEVIEW-M_FCBGA8559
C400
C400
C78
C78
C77
C77
C75
C75
1
1
1
2
2
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
5 OF 6
5 OF 6
DDR
DDR
EXP\CRT\PLL
EXP\CRT\PLL
C1217
C1217
1
1
2
2
10U_0603_6.3V6M
10U_0603_6.3V6M
0.1U_0402_10V6K
0.1U_0402_10V6K
4
N475@
N475@
CPU
CPU
POWER
POWER
VCCSENSE
VSSSENSE
VCCALVDS
VCCDLVDS
LVDS
LVDS
VCCA_DMI
VCCA_DMI
DMI
DMI
VCCA_DMI
VCCSFR_DMIHMPLL
del C1218 2010/04/14
Add C1217 2010/03/25
4
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCA
VCCP
VCCP
VCCP
RSVD
VCCP
1U_0402_6.3V6K
A23
A25
A27
B23
B24
B25
B26
B27
C24
C26
D23
D24
D26
D28
E22
E24
E27
F21
F22
F25
G19
G21
G24
H17
H19
H22
H24
J17
J19
J21
J22
K15
K17
K21
L14
L16
L19
L21
N14
N16
N19
N21
C29
B29
Y2
D4
B4
B3
V30
W31
T1
T2
T3
P2
AA1
E2
1U_0402_6.3V6K
VCCSENSE
VSSSENSE
+VCCP
Processor Core analog supply current: 0.08A
Legacy I/O supply current: 0.42A
+VCC_ALVD
+VCC_DLVD
CRT DAC & LVDS supply current : 0.15A
+VCC_DMI
DMI analog & PLL supply current: 0.54A
+DMI_HMPLL
Display PLL & DMIHMPLL supply current: 0.18A
1
C1162
C1162
0.1U_0402_10V6K
0.1U_0402_10V6K
2
1
C428
C428
2
1U_0402_6.3V6K
1U_0402_6.3V6K
VCCSENSE
VSSSENSE
VCCSENSE (36)
VSSSENSE (36)
1
C391
C391
0.01U_0402_16V7K
0.01U_0402_16V7K
2
T56T56
+VCCP
1U_0402_6.3V6K
1U_0402_6.3V6K
1
C429
C429
2
1
2
C430
C430
1
C431
C431
2
1U_0402_6.3V6K
1U_0402_6.3V6K
PLACE IN CAVITY
R32
R32
1 2
100_0402_1%
100_0402_1%
R31
R31
1 2
100_0402_1%
100_0402_1%
+1.5VS
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D
AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D
AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
22UF 6.3V M X5R 0805
22UF 6.3V M X5R 0805
1
1
C1152
C1152
C1154
C1154
2
2
22UF 6.3V M X5R 0805
22UF 6.3V M X5R 0805
+CPU_CORE
3
2
+CPU_CORE
1
C1153
C1153
22UF 6.3V M X5R 0805
22UF 6.3V M X5R 0805
2
+VCCP
0.1U_0402_10V6K
0.1U_0402_10V6K
100NH +-5% LL1608-FSLR10J
100NH +-5% LL1608-FSLR10J
2006/08/18 2007/8/18
2006/08/18 2007/8/18
2006/08/18 2007/8/18
+CPU_CORE
330U 2.5V Y
330U 2.5V Y
1
C1160
C1160
0.1U_0402_10V6K
0.1U_0402_10V6K
2
R20
R20
1 2
0_0603_5%
0_0603_5%
R21
R21
1 2
0_0603_5%
0_0603_5%
1U_0603_10V6K
1U_0603_10V6K
R28
R28
1 2
0_0805_5%
0_0805_5%
1U_0603_10V6K
1U_0603_10V6K
+1.8VS
R25
R25
1 2
MBK1608601YZF_2P
MBK1608601YZF_2P
R18
R18
1 2
0_0603_5%
0_0603_5%
R26
R26
1 2
C56
C56
22UF 6.3V M X5R 0805 H1.25
22UF 6.3V M X5R 0805 H1.25
R27
R27
1 2
0_0603_5%
0_0603_5%
Compal Secret Data
Compal Secret Data
Compal Secret Data
2 x 330uF(9mohm/2)
C275
C275
C86
C86
1
1
1U_0402_6.3V6K
1U_0402_6.3V6K
2
2
Close U71.D4
+RING_EAST
1
C242
C242
1U_0603_10V6K
1U_0603_10V6K
2
1
1
2
2
1
1
1U_0603_10V6K
1U_0603_10V6K
2
2
+VCC_CRT_DAC
1
C239
C239
10U_0805_10V4Z
10U_0805_10V4Z
2
+DMI_HMPLL
1
C69
C69
1U_0603_10V6K
1U_0603_10V6K
2
+VCC_ALVD
1
1
C1155
C1155
1U_0603_10V6K
1U_0603_10V6K
2
2
+VCC_DLVD
1
C235
C235
1U_0603_10V6K
1U_0603_10V6K
2
1
+
+
2
C241
C241
1U_0603_10V6K
1U_0603_10V6K
C237
C237
1
+
+
2
C1161
C1161
C64
C64
C68
C68
Deciphered Date
Deciphered Date
Deciphered Date
C278
C278
330U 2.5V Y
330U 2.5V Y
+RING_WEST
+VCC_DMI
Follow Intel check list change to 22uF 06/06
2
1
N475@
GND
GND
6 OF 6
6 OF 6
LA-6421P
LA-6421P
LA-6421P
N475@
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
F24
F28
F4
G15
G17
G22
G27
G31
H11
H15
H2
H21
H25
H8
J11
J13
J15
J4
K11
K13
K19
K26
K27
K28
K30
K4
K8
L1
L13
L18
L22
L24
L25
L29
M28
M3
N1
N13
N18
N24
N25
N28
N4
N5
N8
P13
P14
P16
P18
P19
P21
P3
P4
R25
R7
R8
T11
U22
U23
U24
U27
V14
V16
V18
V28
V29
W13
W2
W23
W25
W26
W28
W30
W4
W5
W6
W7
Y28
Y3
Y4
T29
6 39Tuesday, June 22, 2010
6 39Tuesday, June 22, 2010
6 39Tuesday, June 22, 2010
1
PINEVIEW_M
PINEVIEW_M
U71F
U71F
REV = 1.1
REV = 1.1
A11
VSS
A16
VSS
A19
VSS
A29
RSVD_NCTF
A3
RSVD_NCTF
A30
RSVD_NCTF
A4
RSVD_NCTF
AA13
VSS
AA14
VSS
AA16
VSS
AA18
VSS
AA2
VSS
AA22
VSS
AA25
VSS
AA26
VSS
AA29
VSS
AA8
VSS
AB19
VSS
AB21
VSS
AB28
VSS
AB29
VSS
AB30
VSS
AC10
VSS
AC11
VSS
AC19
VSS
AC2
VSS
AC21
VSS
AC28
VSS
AC30
VSS
AD26
VSS
AD5
VSS
AE1
VSS
AE11
VSS
AE13
VSS
AE15
VSS
AE17
VSS
AE22
VSS
AE31
VSS
AF11
VSS
AF17
VSS
AF21
VSS
AF24
VSS
AF28
VSS
AG10
VSS
AG3
VSS
AH18
VSS
AH23
VSS
AH28
VSS
AH4
VSS
AH6
VSS
AH8
VSS
AJ1
RSVD_NCTF
AJ16
VSS
AJ31
RSVD_NCTF
AK1
RSVD_NCTF
AK2
RSVD_NCTF
AK23
VSS
AK30
RSVD_NCTF
AK31
RSVD_NCTF
AL13
VSS
AL19
VSS
AL2
RSVD_NCTF
AL23
VSS
AL29
RSVD_NCTF
AL3
RSVD_NCTF
AL30
RSVD_NCTF
AL9
VSS
B13
VSS
B16
VSS
B19
VSS
B22
VSS
B30
RSVD_NCTF
B31
RSVD_NCTF
B5
VSS
B9
VSS
C1
RSVD_NCTF
C12
VSS
C21
VSS
C22
VSS
C25
VSS
C31
RSVD_NCTF
D22
VSS
E1
RSVD_NCTF
E10
VSS
E19
VSS
E21
VSS
E25
VSS
E8
VSS
F17
VSS
F19
VSS
PINEVIEW-M_FCBGA8559
PINEVIEW-M_FCBGA8559
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Pineview(3/3)
Pineview(3/3)
Pineview(3/3)
0.1
0.1
0.1
5
2010/01/18 DDR3 modify
+5VALW
D D
12
2
C1192
C1192
0.1U_0402_10V7K
0.1U_0402_10V7K
R1421
R1421
@
@
2.2U_0603_6.3V6K~D
2.2U_0603_6.3V6K~D
5
+1.5V
C1203
C1203
1 2
1K_0402_1%
1K_0402_1%
R1422
R1422
1 2
1K_0402_1%
1K_0402_1%
2.2U_0603_6.3V6K~D
2.2U_0603_6.3V6K~D
2.2U_0603_6.3V6K~D
2.2U_0603_6.3V6K~D
1
C129
C129
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C1204
C1204
1
2
1
1
C109
C109
C110
C110
2
2
PM_SLP_S4#(13,17)
SYSON(17,29,34)
C C
Layout Note:
Place near JDIMM1
2.2U_0603_6.3V6K~D
2.2U_0603_6.3V6K~D
330U 2.5V Y
330U 2.5V Y
1
1
+
+
C128
C128
C1194
C1194
2
2
B B
Layout Note:
Place near JDIMM1.203 & JDIMM1.204
+0.75VS
0.1U_0402_16V4Z
0.1U_0402_16V4Z
A A
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C1201
C1201
C1202
C1202
1
2
1
1
2
2
1
1K_0402_1%
1K_0402_1%
2
B
B
E
E
MMBT3904_SOT23
MMBT3904_SOT23
2.2U_0603_6.3V6K~D
2.2U_0603_6.3V6K~D
1
C130
C130
2
R1416
R1416
C
C
Q38
Q38
3 1
2.2U_0603_6.3V6K~D
2.2U_0603_6.3V6K~D
+1.5V
+1.5V
1
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C1195
C1195
1 2
1K_0402_1%
1K_0402_1%
1 2
1K_0402_1%
1K_0402_1%
R1417
R1417
0_0402_5%
0_0402_5%
Q39
Q39
MMBT3904_SOT23
MMBT3904_SOT23
C106
C106
1
2
R1424
R1424
R1426
R1426
+1.5V
C
C
12
1 2
E
E
3 1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
R1425
R1425
4
R1415
R1415
10K_0402_5%
10K_0402_5%
1
2
2
B
B
C105
C105
1
2
1K_0402_1%
1K_0402_1%
1 2
R1427
R1427
1K_0402_1%
1K_0402_1%
1 2
4
DRAM_PWROK
C1191
C1191
1U_0402_6.3V4Z
1U_0402_6.3V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C108
C108
1
2
+DDR_VREF_DQ
1
C115
C115
2
+DDR_VREF_CA
1
C117
C117
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
R1418
@ R1418
@
0_0402_5%
0_0402_5%
1 2
+1.5V_PG
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C107
C107
1
2
Layout Note:
Place near JDIMM1.1
Layout Note:
Place near JDIMM1.126
+DDR_VREF_DQ
DRAM_PWROK (4)
+1.5V_PG (34)
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C1197
C1197
C1196
C1196
1
1
2
2
Change C116,C141 to
SE076104K80 2010/04/06
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D
AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D
AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C112
C112
+3VS
3
C111
C111
1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
2.2U_0402_6.3VM
2.2U_0402_6.3VM
DDR_CKE0(4)
DDR_A_BS2(4)
M_CLK_DDR0(4)
M_CLK_DDR#0(4)
DDR_A_BS0(4)
DDR_A_WE#(4)
DDR_A_CAS#(4)
DDR_CS#1(4)
C116
C116
3
VSS3
DQS#0
DQS0
VSS6
VSS8
DQ12
DQ13
VSS10
DQ14
DQ15
DQ20
DQ21
VSS17
DQ22
DQ23
VSS19
DQ28
DQ29
VSS21
DQS3
DQ30
DQ31
CKE1
VDD2
VDD4
VDD6
VDD8
VDD10
CK1#
VDD12
RAS#
VDD14
ODT0
VDD16
ODT1
VDD18
VREF_CA
VSS28
DQ36
DQ37
VSS30
VSS31
DQ38
DQ39
VSS33
DQ44
DQ45
VSS35
DQS#5
DQS5
VSS38
DQ46
DQ47
VSS40
DQ52
DQ53
VSS42
VSS43
DQ54
DQ55
VSS45
DQ60
DQ61
VSS47
DQS#7
DQS7
VSS50
DQ62
DQ63
VSS52
EVENT#
VTT2
DQ4
DQ5
DQ6
DQ7
DM1
DM2
CK1
BA1
NC2
DM4
DM6
SDA
SCL
2
A15
A14
A11
A7
A6
A4
A2
A0
S0#
G2
2
+1.5V +1.5V
JDIM1
JDIM1
VREF_DQ1VSS1
3
DDR_A_D0
DDR_A_D1
1
DDR_A_DM0
DDR_A_D2
2
DDR_A_D3
DDR_A_D8
DDR_A_D9
DDR_A_DQS#1
DDR_A_DQS1
DDR_A_D10
DDR_A_D11
DDR_A_D16
DDR_A_D17
DDR_A_DQS#2
DDR_A_DQS2
DDR_A_D18
DDR_A_D19
DDR_A_D24
DDR_A_D25
DDR_A_DM3
DDR_A_D26
DDR_A_D27
DDR_CKE0
DDR_A_BS2
DDR_A_MA12
DDR_A_MA9
DDR_A_MA8
DDR_A_MA5
DDR_A_MA3
DDR_A_MA1
M_CLK_DDR0
M_CLK_DDR#0
DDR_A_MA10
DDR_A_BS0
DDR_A_WE#
DDR_A_CAS#
DDR_A_MA13
DDR_CS#1
DDR_A_D32
DDR_A_D33
DDR_A_DQS#4
DDR_A_DQS4
DDR_A_D34
DDR_A_D35
DDR_A_D40
DDR_A_D41
DDR_A_DM5
DDR_A_D42
DDR_A_D43
DDR_A_D48
DDR_A_D49
DDR_A_DQS#6
DDR_A_DQS6
DDR_A_D50
DDR_A_D51
DDR_A_D56
DDR_A_D57
DDR_A_DM7
DDR_A_D58
DDR_A_D59
R65 10K_ 0402_5%R65 10K_ 0402_5%
1 2
1
1
C141
C141
2
2
.1U_0402_16V7K
.1U_0402_16V7K
2006/08/18 2007/8/18
2006/08/18 2007/8/18
2006/08/18 2007/8/18
R66
R66
10K_0402_5%
10K_0402_5%
.1U_0402_16V7K
.1U_0402_16V7K
12
Compal Secret Data
Compal Secret Data
Compal Secret Data
VSS2
5
DQ0
7
DQ1
9
VSS4
11
DM0
13
VSS5
15
DQ2
17
DQ3
19
VSS7
21
DQ8
23
DQ9
25
VSS9
27
DQS#1
DQS129RESET#
VSS1131VSS12
33
DQ10
35
DQ11
VSS1337VSS14
39
DQ16
41
DQ17
VSS1543VSS16
45
DQS#2
47
DQS2
49
VSS18
51
DQ18
53
DQ19
55
VSS20
57
DQ24
59
DQ25
VSS2261DQS#3
63
DM3
VSS2365VSS24
67
DQ26
69
DQ27
VSS2571VSS26
73
CKE0
75
VDD1
77
NC1
79
BA2
81
VDD3
83
A12/BC#
85
A9
87
VDD5
89
A8
91
A5
93
VDD7
95
A3
97
A1
99
VDD9
101
CK0
103
CK0#
105
VDD11
107
A10/AP
109
BA0
111
VDD13
113
WE#
115
CAS#
117
VDD15
119
A13
121
S1#
123
VDD17
125
NCTEST
127
VSS27
129
DQ32
131
DQ33
133
VSS29
135
DQS#4
137
DQS4
139
VSS32
141
DQ34
143
DQ35
145
VSS34
147
DQ40
149
DQ41
151
VSS36
153
DM5
155
VSS37
157
DQ42
159
DQ43
161
VSS39
163
DQ48
165
DQ49
167
VSS41
169
DQS#6
171
DQS6
173
VSS44
175
DQ50
177
DQ51
179
VSS46
181
DQ56
183
DQ57
185
VSS48
187
DM7
189
VSS49
191
DQ58
193
DQ59
195
VSS51
197
SA0
199
VDDSPD
201
SA1
203
VTT1
205
G1
FOX_AS0A626-U4RN-7F
FOX_AS0A626-U4RN-7F
Deciphered Date
Deciphered Date
Deciphered Date
1
DDR_A_DQS#[0..7](4)
DDR_A_D[0..63](4)
2
DDR_A_D4
4
DDR_A_D5
6
8
DDR_A_DQS#0
10
DDR_A_DQS0
12
14
DDR_A_D6
16
DDR_A_D7
18
20
DDR_A_D12
22
DDR_A_D13
24
26
DDR_A_DM1
28
DRAMRST#
30
32
DDR_A_D14
34
DDR_A_D15
36
38
DDR_A_D20
40
DDR_A_D21
42
44
DDR_A_DM2
46
48
DDR_A_D22
50
DDR_A_D23
52
54
DDR_A_D28
56
DDR_A_D29
58
60
DDR_A_DQS#3
62
DDR_A_DQS3
64
66
DDR_A_D30
68
DDR_A_D31
70
72
DDR_CKE1
74
76
78
DDR_A_MA14
80
82
DDR_A_MA11
84
DDR_A_MA7
86
88
DDR_A_MA6
90
DDR_A_MA4
92
94
DDR_A_MA2
96
DDR_A_MA0
98
100
M_CLK_DDR1
102
M_CLK_DDR#1
104
106
DDR_A_BS1
108
DDR_A_RAS#
110
112
DDR_CS#0
114
M_ODT0
116
118
M_ODT1
120
122
124
126
128
DDR_A_D36
130
DDR_A_D37
132
134
DDR_A_DM4
136
138
DDR_A_D38
140
DDR_A_D39
142
144
DDR_A_D44
146
DDR_A_D45
148
150
DDR_A_DQS#5
152
DDR_A_DQS5
154
156
DDR_A_D46
158
DDR_A_D47
160
162
DDR_A_D52
164
DDR_A_D53
166
168
DDR_A_DM6
170
172
DDR_A_D54
174
DDR_A_D55
176
178
DDR_A_D60
180
DDR_A_D61
182
184
DDR_A_DQS#7
186
DDR_A_DQS7
188
190
DDR_A_D62
192
DDR_A_D63
194
196
PM_EXTTS#0
198
CLK_SMBDATA
200
CLK_SMBCLK
202
204
206
+0.75VS
C1199
C1199
DDR_A_DM[0..7](4)
DDR_A_DQS[0..7](4)
DDR_A_MA[0..14](4)
DRAMRST# (4)
DDR_CKE1 (4)
M_CLK_DDR1 (4)
M_CLK_DDR#1 (4)
DDR_A_BS1 (4)
DDR_A_RAS# (4)
DDR_CS#0 (4)
M_ODT0 (4)
M_ODT1 (4)
+DDR_VREF_CA
C1198
C1198
1
1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
2
PM_EXTTS#0 (5)
CLK_SMBDATA (8,15,27)
CLK_SMBCLK (8,15,27)
2.2U_0402_6.3VM
2.2U_0402_6.3VM
DIMM_A(REV)
4H
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
B
B
B
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
DDR3-SODIMMA
DDR3-SODIMMA
DDR3-SODIMMA
LA-6421P
LA-6421P
LA-6421P
7 39Tuesday, June 22, 2010
7 39Tuesday, June 22, 2010
7 39Tuesday, June 22, 2010
1
0.1
0.1
0.1
5
PCI
SRC
CPU
CLKSEL1
0
FSA
CLKSEL0
MHz
266
MHz
1000
MHz
MHz
33.30
14.318 96.0 48.0
DOT_96
MHz
USB
MHz
FSC FSB REF
CLKSEL2
0 1000 133 33.31 14.318 96.0 48.0
0 1001 200 33.30 14.318 96.0 48.0
0 1001 166 33.31 14.318 96.0 48.0
D D
1 1000 333 33.30 14.318 96.0 48.0
1 1000 100 33.31 14.318 96.0 48.0
1 1001 400 33.30 14.318 96.0 48.0
1 1 1
+3VS
R435
R435
10K_0402_5%
10K_0402_5%
1 2
CLK_EN
13
Q31
Q31
R52
R52
FSC
FSA
1 2
1K_0402_1%
1K_0402_1%
1 2
1 2
1 2
2
R76
R76
2.2K_0402_5%
2.2K_0402_5%
R69
R69
0_0402_5%
0_0402_5%
R119
R119
0_0402_5%
0_0402_5%
R98
R98
10K_0402_5%
10K_0402_5%
R84
R84
0_0402_5%
0_0402_5%
DTC115EUA_SC70-3
DTC115EUA_SC70-3
+VCCP
12
R68
@R68
@
470_0402_5%
470_0402_5%
12
12
R73
R73
1K_0402_5%
1K_0402_5%
@
@
+VCCP
12
R113
R113
470_0402_5%
470_0402_5%
12
R110
R110
@
@
0_0402_5%
0_0402_5%
+VCCP
12
R92
@R92
@
470_0402_5%
470_0402_5%
12
12
R87
R87
@
@
0_0402_5%
0_0402_5%
C161 33P 50V J NPO 0402C161 33P 50V J NPO 0402
C164 33P 50V J NPO 0402C164 33P 50V J NPO 0402
CLK_ENABLE#(36)
C C
Rename 06/06
CPU_BSEL0(5)
Add 1K follow
Intel check list 05/11
B B
A A
Follow Intel check list change to 27P 06/05
Follow Vendor check change to 22P 10/16
Follow Vendor check change to 33P 05/24
FSB
CPU_BSEL1(5)
CPU_BSEL2(5)
Reserved
+3VS
+1.5VS
del C1219 R1442 04/14
R86
@
@
For ITP_EN, 0 =SRC8/SRC8#; 1 = ITP/ITP#
For PCI4_SEL, 0 = Pin24/25 : DOT96 / DOT96#
Pin28/29 : LCDCLK / LCDCLK #
For PCI2_TME:0=Overclocking of CPU and SRC allowed
(ICS only) 1=Overclocking of CPU and SRC NOT allowed
CLK_XTAL_IN
12
Y1
Y1
14.31818MHZ L5020-14.31818-20
14.31818MHZ L5020-14.31818-20
CLK_XTAL_OUT
R86
TPM@
TPM@
Add R1443 for TPM 2010/03/25
1 = Pin24/25 : SRC_0 / SRC_0#
Pin28/29 : 27M/27M_SS
Routing the trace at least 10mil
5
4
Change C174 C175 to 10U_0603 05/14
R137
R137
1 2
+3VS
0_0603_5%
0_0603_5%
R138
R138
+VCCP
1 2
0_0603_5%
0_0603_5%
Add C1145 C1146 C1147 for EMI 06/12
Change co-lay net name to +1.5VM_CK505 07/03
@
@
1 2
R1348 0_0603_5%
R1348 0_0603_5%
1 2
R1349 0_0603_5%R1349 0_0603_5%
1
47P_0402_50V8J
47P_0402_50V8J
C1147
C1147
2
Change C1350 C1351 to 0402 type 06/24
CLK_PCH_48M(13)
CLK_PCH_14M(13)
R85
R85
10K_0402_5%
10K_0402_5%
@
@
1 2
ITP_EN PCI4_SEL PCI2_TME
R89
R89
10K_0402_5%
10K_0402_5%
1 2
4
+1.5VM_CK505
10U_0603_6.3V6M
10U_0603_6.3V6M
CLK_PCI_TPM(27)
CLK_PCI_LPC(17)
CLK_PCI_PCH(11)
+3VS+3VS +3VS
1 2
1 2
1
1
C1119
C1119
C140
C140
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
2
+VCCP
+1.5VS
1 2
C1221 10P_0402_50V8JC1221 10P_0402_50V8J
1 2
C390 10P_0402_50V8JC390 10P_0402_50V8J
1
C389
C389
2
15P 50V J NPO 0402
15P 50V J NPO 0402
R95
R95
10K_0402_5%
10K_0402_5%
@
@
R90
R90
10K_0402_5%
10K_0402_5%
+3VM_CK505
1
C1145
C1145
47P_0402_50V8J
47P_0402_50V8J
2
+1.05VM_CK505
1
C1146
C1146
47P_0402_50V8J
47P_0402_50V8J
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C160
C160
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
R1350 0_0402_5%
R1350 0_0402_5%
@
@
1 2
R1351 0_0402_5%R1351 0_0402_5%
1 2
1 2
R75 33_0402_5%R75 33_0402_5%
R104
R104
1 2
33_0402_5%
33_0402_5%
VGATE(5,13,17,36)
H_STP_CPU#(13)
H_STP_PCI#(13)
PCI2_TME
R1443
R1443
TPM@
TPM@
1 2
22_0402_5%
22_0402_5%
1 2
R86 33_0402_5%R86 33_0402_5%
1 2
R80 33_0402_5%R80 33_0402_5%
1
C388
C388
2
10P_0402_50V8J
10P_0402_50V8J
R71
R71
10K_0402_5%
10K_0402_5%
1 2
@
@
R77
R77
10K_0402_5%
10K_0402_5%
1 2
1
10U_0603_6.3V6M
10U_0603_6.3V6M
2
1
10U_0603_6.3V6M
10U_0603_6.3V6M
2
+3VM_CK505
1
C169
C169
2
+1.05VM_CK505
1
C173
C173
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
FSA
FSB
FSC
CLK_EN
1 2
R371
R371
0_0402_5%
0_0402_5%
@
@
CLK_XTAL_IN
CLK_XTAL_OUT
PCI4_SEL
ITP_EN
C174
C174
C175
C175
3
1
C172
C172
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
1
C139
C139
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
1
C138
C138
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C167
C167
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
1
C148
C148
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
1
C137
C137
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
1
C146
C146
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
2
1
C165
C165
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
IDT: SA00003H610
Realtek: SA00003H730
U4
U4
55
VDD_SRC
6
VDD_REF
12
VDD_PCI
72
VDD_CPU
19
VDD_48
27
VDD_PLL3
66
VDD_CPU_IO
31
VDD_PLL3_IO
62
VDD_SRC_IO
52
VDD_SRC_IO
23
VDD_IO
38
VDD_SRC_IO
20
USB_0/FS_A
2
FS_B/TEST_MODE
7
REF_0/FS_C/TEST_
8
REF_1
1
CKPWRGD/PD#
11
NC
53
CPU_STOP#
54
PCI_STOP#
5
XTAL_IN
4
XTAL_OUT
13
PCI_1
14
PCI_2
15
PCI_3
16
PCI_4/SEL_LCDCL
17
PCIF_5/ITP_EN
18
VSS_PCI
3
VSS_REF
22
VSS_48
26
VSS_IO
69
VSS_CPU
30
VSS_PLL3
34
VSS_SRC
59
VSS_SRC
42
VSS_SRC
73
VSS
SLG8SP556VTR_QFN72_10X10
SLG8SP556VTR_QFN72_10X10
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SE CRET INFORMATION. THIS SHEET MAY NOT B E TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DIVISI ON OF R&D
AND TRADE SE CRET INFORMATION. THIS SHEET MAY NOT B E TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DIVISI ON OF R&D
AND TRADE SE CRET INFORMATION. THIS SHEET MAY NOT B E TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DIVISI ON OF R&D
DEPARTMENT EX CEPT AS AUTHORIZ ED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHE ET NOR THE INFORMA TION IT CONTAINS
DEPARTMENT EX CEPT AS AUTHORIZ ED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHE ET NOR THE INFORMA TION IT CONTAINS
DEPARTMENT EX CEPT AS AUTHORIZ ED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHE ET NOR THE INFORMA TION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2007/10/15 2008/10/15
2007/10/15 2008/10/15
2007/10/15 2008/10/15
CPU_0
CPU_0#
CPU_1
CPU_1#
SRC_0/DOT_96
SRC_0#/DOT_96#
LCDCLK/27M
LCDCLK#/27M_SS
SRC_2
SRC_2#
SRC_3
SRC_3#
SRC_4
SRC_4#
SRC_6
SRC_6#
SRC_7
SRC_7#
SRC_8/CPU_ITP
SRC_8#/CPU_ITP#
SRC_9
SRC_9#
SRC_10
SRC_10#
SRC_11
SRC_11#
CLKREQ_3#
CLKREQ_4#
CLKREQ_6#
CLKREQ_7#
CLKREQ_9#
SLKREQ_10#
CLKREQ_11#
USB_1/CLKREQ_A#
Compal Secret Data
Compal Secret Data
Compal Secret Data
SDA
SCL
9
10
71
70
68
67
24
25
28
29
32
33
35
36
39
40
57
56
61
60
64
63
44
45
50
51
CLK_PCIE_WWAN
48
CLK_PCIE_WWAN#
47
37
41
58
65
43
49
46
21
Deciphered Date
Deciphered Date
Deciphered Date
CLK_SMBDATA
CLK_SMBCLK
CLK_CPU_BCLK
CLK_CPU_BCLK#
CLK_CPU_HPLCLK
CLK_CPU_HPLCLK#
CLK_CPU_DREFCLK
CLK_CPU_DREFCLK#
CPU_SSCDREFCLK
CPU_SSCDREFCLK#
CLK_PCIE_WLAN
CLK_PCIE_WLAN#
CLK_PCIE_SATA
CLK_PCIE_SATA#
CLK_PCIE_PCH
CLK_PCIE_PCH#
CLK_CPU_EXP
CLK_CPU_EXP#
CLK_PCIE_LAN
CLK_PCIE_LAN#
WLAN_CLKREQ#
LAN_CLKREQ#
WWAN_CLKREQ#
2
1
+3VS
R72
R72
2.2K_0402_5%
+3VS
2.2K_0402_5%
Q10A
Q10A
6 1
2
5
3
Q10B
Q10B
4
ICH_SMBDATA(13)
ICH_SMBCLK(13)
2N7002DW-T/R7_SOT363-6
2N7002DW-T/R7_SOT363-6
2N7002DW-T/R7_SOT363-6
2N7002DW-T/R7_SOT363-6
Change Q10 to SB00000DH00 2010/04/06
CLK_SMBDATA (7,15,27)
CLK_SMBCLK (7,15,27)
CLK_CPU_BCLK (5)
CLK_CPU_BCLK# (5)
CLK_CPU_HPLCLK (5)
CLK_CPU_HPLCLK# (5)
CPU_DREFCLK (5)
CPU_DREFCLK# (5)
CPU_SSCDREFCLK (5)
CPU_SSCDREFCLK# (5)
CLK_PCIE_WLAN (26)
CLK_PCIE_WLAN# (26)
CLK_PCIE_SATA (12)
CLK_PCIE_SATA# (12)
CLK_PCIE_PCH (13)
CLK_PCIE_PCH# (13)
CPU_ITP (4)
CPU_ITP# (4)
CLK_CPU_EXP (4)
CLK_CPU_EXP# (4)
CLK_PCIE_LAN (25)
CLK_PCIE_LAN# (25)
CLK_PCIE_WWAN (15)
CLK_PCIE_WWAN# (15)
SRC PORT LIST
PORT
SRC1
SRC2
SRC3
SRC4
SRC6
SRC7
SRC8
SRC9
SRC10
SRC11
Modify CLK SRC Port list 05/12
Add R107 05/04
WLAN_CLKREQ#
LAN_CLKREQ#
WWAN_CLKREQ#
DEVICE
CPU_SSCDREFCLK
PCIE_WLAN
PCIE_SATA
PCIE_PCH
CPU_ITP
CLK_CPU_EXP
PCIE_LAN
PCIE_WWAN
R121 10K_0402_5%R121 10K_0402_5%
R1430 4.7K_0402_5%R1430 4.7K_0402_5%
R107 10K_0402_5%R107 10K_0402_5%
REQ PORT LIST
DEVICEPORT
Add WWAN_CLKREQ# 05/04
WLAN_CLKREQ# (26)
REQ_3#
REQ_4#
PCIE_WLAN
REQ_6#
REQ_7#
LAN_CLKREQ# (25)
WWAN_CLKREQ# (15)
REQ_9#
REQ_10#
REQ_11#
PCIE_WWAN
REQ_A#
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
Clock Generator CK505
Clock Generator CK505
Clock Generator CK505
LA-6421P
LA-6421P
LA-6421P
1
8 39Thursday, June 03, 2010
8 39Thursday, June 03, 2010
8 39Thursday, June 03, 2010
R91
R91
2.2K_0402_5%
2.2K_0402_5%
CLK_SMBDATA
CLK_SMBCLK
12
12
12
+3VS
0.1
0.1
0.1
5
4
3
2
1
Change R577 to 0402 SIZE 06/16
NTR4101PT1G 1P SOT-23-3
NTR4101PT1G 1P SOT-23-3
+LCDVDD
12
R577
D D
2N7002W-T/R7_SOT323-3
2N7002W-T/R7_SOT323-3
GMCH_ENVDD(5)
C C
470_0402_5%
470_0402_5%
R174
R174
100K_0402_5%
100K_0402_5%
R577
Q4
Q4
1 2
+3VS
R578
R578
100K_0402_5%
100K_0402_5%
1 2
+LCDVDD_R
13
D
D
2
G
G
R579 4.7K_0402_5%
2
R579 4.7K_0402_5%
13
Q5
Q5
DTC115EUA_SC70-3
DTC115EUA_SC70-3
S
S
1
2
12
+LCDVDD
W=20mils W=20mils
C1105
C1105
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C1108
C1108
0.047U_0402_16V4Z
0.047U_0402_16V4Z
1
2
C1106
C1106
Q3
Q3
D
D
1 3
2
1
2
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
Change C1106 to 4.7U_0603 05/14
+3VS
S
S
@
G
G
@
1
C1107
C1107
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
2
+3VS
USB20_N3_1
+CAM_VCC
Modify 05/11
USB20_N3_1
USB20_P3_1
1
1
C1168
C1168
2
2
@
@
@
@
CMOS & LCD/PANEL BD. Conn.
+3VS
C1167
C1167
Modify JLVDS1 08/04
10P_0402_50V8J
10P_0402_50V8J
10P_0402_50V8J
Add R1444 R1445 2010/03/25
R14440_0402_5% MIC@ R14440_0402_5% MIC@
1 2
12
R14450_0402_5% CMIC@ R14450_0402_5% CM IC@
12
camera
L2
L2
+3VS
+CAM_VCC
DMIC_CLK (22)
DMIC_DATA (22)
LVDS_ACLK (5)
LVDS_ACLK# (5)
LVDS_A2 (5)
LVDS_A2# (5)
LVDS_A1 (5)
LVDS_A1# (5)
LVDS_A0 (5)
LVDS_A0# (5)
BKOFF# (17)
INVT_PWM (5,17)
+3VS
+LCDVDD
L1
L1
FBMA-L11-201209-221LMA30T_0805
FBMA-L11-201209-221LMA30T_0805
2
C1111
C1111
330P_0402_50V7K
330P_0402_50V7K
1
3G@
3G@
12
1
2
JLVDS1
JLVDS1
1
2
B B
A A
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
36
293033
32
ACES_88341-3000B001
ACES_88341-3000B001
CONN@
CONN@
USB20_P3_1
USB20_N3_1
LVDS_SDA
LVDS_SCL
INVT_PWMINVT_PWM
+LCDVDD_L
+LEDVDD
LVDS_ACLK
LVDS_ACLK#
LVDS_A2
LVDS_A2#
LVDS_A1
LVDS_A1#
LVDS_A0
LVDS_A0#
BKOFF#
FBMA-L11-201209-221LMA30T_0805
FBMA-L11-201209-221LMA30T_0805
LVDS_SCL
LVDS_SDA
(20 MIL)
B+
C1112
C1112
100P_0402_50V8J
100P_0402_50V8J
3G@
3G@
R1180
R1180
2.2K_0402_5%
2.2K_0402_5%
220P_0402_50V7K
220P_0402_50V7K
1 2
INVT_PWM
BKOFF#
C1156
C1156
3G@
3G@
R1181
R1181
1 2
2.2K_0402_5%
2.2K_0402_5%
LVDS_SCL (5)
LVDS_SDA (5)
12
12
C1109
C1109
1000P 50V K X7R 0402
1000P 50V K X7R 0402
3G@
3G@
For RF
10P_0402_50V8J
Add for RF 07/02
J1
J1
2
112
JUMP_43X39
JUMP_43X39
@
@
PJUSB208_SOT23-6
PJUSB208_SOT23-6
6
CH3
CH2
5
Vp
4
CH4
CH1
@
@
R11820_0402_5% R11820_0402_5%
@ L3
@
2
2
3
3
WCM2012F2S-900T04_0805
WCM2012F2S-900T04_0805
R11830_0402_5% R11830_0402_5%
Vn
D6
D6
12
L3
1
4
12
0.1U_0402_16V4Z
0.1U_0402_16V4Z
3
2
USB20_P3_1
1
USB20_N3
1
USB20_P3
USB20_P3
4
+CAM_VCC
1
C1113
C1113
2
Add D6 05/14
USB20_N3 (13)
USB20_P3 (13)
LCD POWER CIRCUIT
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D
AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D
AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2006/08/18 2007/8/18
2006/08/18 2007/8/18
2006/08/18 2007/8/18
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
B
B
B
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Compal Electronics, Inc.
LVDS /INVERTER
LVDS /INVERTER
LVDS /INVERTER
LA-6421P
LA-6421P
LA-6421P
9 39Friday, June 25, 2010
9 39Friday, June 25, 2010
9 39Friday, June 25, 2010
1
0.1
0.1
0.1
A
B
C
D
E
Close to CRT CONN for ESD.
2
D18
D18
@
@
PJDLC05C_SOT23-3
PJDLC05C_SOT23-3
CRT_DET(13)
3
D17
D17
1
PJDLC05C_SOT23-3
PJDLC05C_SOT23-3
High: CRT Plugged
CRT_DET
CRT_DET#
RED
GREEN
BLUE
+3VS
1 2
13
D
D
2
G
G
S
S
R149
R149
10K_0402_5%
10K_0402_5%
@
@
Q11
Q11
2N7002W-T/R7_SOT323-3
2N7002W-T/R7_SOT323-3
@
@
2
3
@
1
C304
C304
10P_0402_50V8J
10P_0402_50V8J
2
JVGA_HS
@
1
JVGA_VS
1 1
GMCH_CRT_R(5)
GMCH_CRT_G(5)
GMCH_CRT_B(5)
2 2
GMCH_CRT_HSYNC(5)
GMCH_CRT_VSYNC(5)
R255
R255
150_0402_1%
150_0402_1%
12
12
R250
R250
R253
R253
150_0402_1%
150_0402_1%
150_0402_1%
150_0402_1%
1 2
C301 0.1U_0402_16V4ZC301 0.1U_0402_16V4Z
C298 0.1U_0402_16V4ZC298 0.1U_0402_16V4Z
12
1 2
+5VS
1
5
P
OE#
A2Y
G
SN74AHCT1G125DCKR_SC70-5
SN74AHCT1G125DCKR_SC70-5
3
Modify C31- C308 C303 C307 C306 C304 BOM Structure 0615
Change L12. L14, L15 to SM01000C600 2010/04/06
U11
U11
4
+5VS
5
P
A2Y
G
3
CRT_HSYNC_1
1
U10
U10
OE#
SN74AHCT1G125DCKR_SC70-5
SN74AHCT1G125DCKR_SC70-5
CRT_VSYNC_1
4
C310
C310
10P_0402_50V8J
10P_0402_50V8J
1
C308
C308
2
10P_0402_50V8J
10P_0402_50V8J
1
1
C303
C303
2
2
10P_0402_50V8J
10P_0402_50V8J
L15
L15
CHENG-HANN MBK1005470YZF 0402
CHENG-HANN MBK1005470YZF 0402
1 2
L14
L14
CHENG-HANN MBK1005470YZF 0402
CHENG-HANN MBK1005470YZF 0402
1 2
L12
L12
CHENG-HANN MBK1005470YZF 0402
CHENG-HANN MBK1005470YZF 0402
1 2
C307
C307
10P_0402_50V8J
10P_0402_50V8J
1
2
1
C306
C306
10P_0402_50V8J
10P_0402_50V8J
2
CRT PORT
+CRT_VCC
3 3
+3VS
R246
R246
+CRT_VCC
12
12
R251
R251
2.2K_0402_5%
2.2K_0402_5%
3
VGA_DDC_DAT
VGA_DDC_CLK
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D
AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D
AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
12
12
2.2K_0402_5%
2.2K_0402_5%
R248
R248
R245
2.2K_0402_5%
2.2K_0402_5%
GMCH_CRT_DATA(5)
GMCH_CRT_CLK(5)
4 4
A
Change Q24 to SB00000DH00 2010/04/06
R245
+3VS
2.2K_0402_5%
2.2K_0402_5%
5
4
2
Q24B
Q24B
2N7002DW-T/R7_SOT363-6
2N7002DW-T/R7_SOT363-6
61
Q24A
Q24A
2N7002DW-T/R7_SOT363-6
2N7002DW-T/R7_SOT363-6
B
+5VS
D3
D3
W=40mils
2 1
RB491D_SC59-3
RB491D_SC59-3
Compal Secret Data
Compal Secret Data
2006/08/18 2007/8/18
2006/08/18 2007/8/18
2006/08/18 2007/8/18
C
Compal Secret Data
12/29
F1
F1
21
1.1A_6VDC_FUSE
1.1A_6VDC_FUSE
RED
VGA_DDC_DAT
GREEN
JVGA_HS
BLUE
JVGA_VS
VGA_DDC_CLK
Deciphered Date
Deciphered Date
Deciphered Date
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C142
C142
1 2
JCRT1
6
11
1
7
12
2
8
13
3
9
14
4
10
15
5
SUYIN_070546FR015M21RZR
SUYIN_070546FR015M21RZR
+CRT_VCC
D
Change JCRT1 P/N to SP010906182 06/22
CONN@JCR T1
CONN@
16
17
CRT_DET#
R1103
R1103
100K_0402_5%
100K_0402_5%
1 2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
B
B
B
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
CRT PORT
CRT PORT
CRT PORT
LA-6421P
LA-6421P
LA-6421P
E
0.1
0.1
10 39Tuesday, June 22, 2010
10 39Tuesday, June 22, 2010
10 39Tuesday, June 22, 2010
0.1
5
D D
CLK_PCI_P CH
12
R336
R336
@
@
33_0402 _5%
33_0402 _5%
1
C432
C432
@
@
22P_040 2_50V8J
22P_040 2_50V8J
2
For EMI, close to TigerPoint
C C
G_SENSO R_INT(27)
PCI_PIRQE#
Add for G-sensor interrupt 2010/03/11
B B
4
+3VS
8.2K_040 2_5%
R363
R363
10K_040 2_5%
10K_040 2_5%
@
@
R366
R366
@
@
8.2K_040 2_5%
CLK_PCI_P CH(8)
R362
R362
10K_040 2_5%
10K_040 2_5%
@
@
10K_040 2_5%
10K_040 2_5%
R29110K_040 2_5% R29110K_04 02_5%
R29210K_040 2_5% R29210K_04 02_5%
R2388.2K_040 2_5% R2388.2K_0402_ 5%
R2058.2K_040 2_5% R2058.2K_0402_ 5%
R2068.2K_040 2_5% R2068.2K_0402_ 5%
R2088.2K_040 2_5% R2088.2K_0402_ 5%
R2108.2K_040 2_5% R2108.2K_0402_ 5%
R2118.2K_040 2_5% R2118.2K_0402_ 5%
R2128.2K_040 2_5% R2128.2K_0402_ 5%
R2048.2K_040 2_5% R2048.2K_0402_ 5%
R3648.2K_040 2_5% R3648.2K_0402_ 5%
R3658.2K_040 2_5% R3658.2K_0402_ 5%
R233
R233
R2358.2K_040 2_5% R2358.2K_0402_ 5%
R2368.2K_040 2_5% R2368.2K_0402_ 5%
R2298.2K_040 2_5% R2298.2K_0402_ 5%
R2078.2K_040 2_5% R2078.2K_0402_ 5%
R2318.2K_040 2_5% R2318.2K_0402_ 5%
R2308.2K_040 2_5% R2308.2K_0402_ 5%
R2378.2K_040 2_5% R2378.2K_0402_ 5%
R2328.2K_040 2_5% R2328.2K_0402_ 5%
R2098.2K_040 2_5% R2098.2K_0402_ 5%
3
PCI_DEVSE L#
CLK_PCI_P CH
PCI_IRDY#
PCI_SERR#
PCI_STOP#
PCI_PLOCK #
PCI_TRDY#
PCI_PERR#
PCI_FRAME #
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
PCI_PIRQE#
PCI_PIRQF#
PCI_PIRQG#
PCI_PIRQH#
A5
PAR
B15
DEVSEL#
J12
PCICLK
A23
PCIRST#
B7
IRDY#
C22
PME#
B11
SERR#
F14
STOP#
A8
PLOCK#
A10
TRDY#
D10
PERR#
A16
FRAME#
A18
GNT1#
E16
GNT2#
G16
REQ1#
A20
REQ2#
G14
GPIO48/STRAP1#
A2
GPIO17/STRAP2#
C15
GPIO22
C9
GPIO1
B2
PIRQA#
D7
PIRQB#
B3
PIRQC#
H10
PIRQD#
E8
PIRQE#/GPIO2
D6
PIRQF#/GPIO3
H8
PIRQG#/GPIO4
F8
PIRQH#/GPIO5
D11
STRAP0#
K9
RSVD01
M13
RSVD02
U72A
U72A
TIGERPOINT_ES1_BGA360
TIGERPOINT_ES1_BGA360
TGP
TGP
PCI
PCI
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
C/BE0#
C/BE1#
C/BE2#
C/BE3#
1
1
B22
D18
C17
C18
B17
C19
B18
B19
D16
D15
A13
E14
H14
L14
J14
E10
C11
E12
B9
B13
L12
B8
A3
B5
A6
G12
H12
C8
D9
C7
C1
B1
H16
M15
C13
L16
2
1
STRAP2#
GPIO17
0
1
A A
1
5
STRAP1#
GPIO48
1
0
1
Boot BIOS
SPI
PCI
LPC
Security Class ification
Security Class ification
Security Class ification
2006/08/ 18 2007/8/1 8
2006/08/ 18 2007/8/1 8
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2006/08/ 18 2007/8/1 8
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Docum ent Number Rev
Size Docum ent Number Rev
Size Docum ent Number Rev
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Compal Electronics, Inc.
Tigerpoint(1/4)
Tigerpoint(1/4)
Tigerpoint(1/4)
LA-6421P
LA-6421P
LA-6421P
11 39T hursday, June 03, 2010
11 39T hursday, June 03, 2010
11 39T hursday, June 03, 2010
1
0.1
0.1
0.1
5
D D
C C
B B
+3VS
R294 8.2K_0402_5%R294 8.2K_0402_5%
4
TGP
TGP
AE6
SATA0RXN
AD6
SATA0RXP
AC7
SATA0TXN
AD7
SATA0TXP
AE8
SATA1RXN
AD8
SATA1RXP
AD9
SATA1TXN
AC9
SATA1TXP
SATA
SATA
AD4
SATA_CLKN
AC4
SATA_CLKP
SATARBIAS
SATALED#
A20GATE
A20M#
CPUSLP#
IGNNE#
INIT3_3V#
INIT#
INTR
FERR#
RCIN#
SERIRQ
SMI#
STPCLK#
THRMTRIP#
AD11
AC11
AD25
U16
Y20
Y21
Y18
AD21
AC25
AB24
Y22
T17
NMI
AC21
AA16
AA21
V18
AA20
SATARBIAS#
HOST
HOST
AE20
AD17
AC15
AD18
AA10
AA12
AD15
W10
AE21
AE18
AD19
AC17
AB13
AC13
AB15
AB16
AE24
AE23
AA14
AD16
AB11
AB10
AD23
U72C
U72C
R12
RSVD03
RSVD04
RSVD05
RSVD06
RSVD07
Y12
RSVD08
RSVD09
RSVD10
Y10
RSVD11
RSVD12
RSVD13
V12
RSVD14
RSVD15
RSVD16
RSVD17
U12
RSVD18
RSVD19
RSVD20
RSVD21
RSVD22
Y14
RSVD23
RSVD24
RSVD25
RSVD26
RSVD27
V14
RSVD28
RSVD29
RSVD30
RSVD31
GPIO36
3
SATA_DTX_C_IRX_N0 (16)
SATA_ITX_C_DRX_N0_R
SATA_ITX_C_DRX_P0_R
SATA_DTX_C_IRX_P0 (16)
0.01U_0402_16V7K
0.01U_0402_16V7K
C320.01U_0402_16V7K C320.01U_0402_16V7K
C31
C31
SATA_ITX_C_DRX_N0 (16)
SATA_ITX_C_DRX_P0 (16)
Del SATA1 04/30
CLK_PCIE_SATA# (8)
CLK_PCIE_SATA (8)
SATARBIAS
SATA_LED# SATA_LED#
GATEA20
H_A20M#
H_IGNNE#
H_INIT#
H_INTR
H_FERR#
H_NMI
KB_RST#
SERIRQ
H_SMI#
H_STPCLK#
R154 24.9_0402_1%R154 24.9_0402_1%
SATA_LED# (16)
GATEA20 (17)
H_A20M# (5)
H_IGNNE# (5)
H_INIT# (5)
H_INTR (5)
H_FERR# (5)
H_NMI (5)
KB_RST# (17)
SERIRQ (17,27)
H_SMI# (5)
H_STPCLK# (5)
Placed wit hin 500 mi ls of Tig er point c hipset pi n.
GATEA20
SERIRQ
+VCCP
12
56 ohm±5% pull-up resistor has
to be within 1" from the Tiger
R164
R164
Point chipset.
56_0402_5%
56_0402_5%
H_THERMTRIP# (5)
2
R45
R45
10K_0402_5%
10K_0402_5%
R293
R293
10K_0402_5%
10K_0402_5%
R312
R312
10K_0402_5%
10K_0402_5%
1
+3VS
3
3
H_FERR#
TIGERPOINT_ES1_BGA360
TIGERPOINT_ES1_BGA360
+VCCP
R198
R198
56_0402_5%
56_0402_5%
Close to TigerPoint
A A
5
pin
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D
AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D
AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2006/08/18 2007/8/18
2006/08/18 2007/8/18
2006/08/18 2007/8/18
C450
C450
H_A20M#
C451
C451
H_IGNNE#
C452
C452
H_INIT#
C453
C453
H_INTR
C454
C454
H_FERR#
C455
C455
H_NMI
C456
C456
H_SMI#
C457
C457
H_STPCLK#
Compal Secret Data
Compal Secret Data
Compal Secret Data
ESD request
@
@
100P_0402_50V8J
100P_0402_50V8J
1 2
@
@
100P_0402_50V8J
100P_0402_50V8J
1 2
@
@
100P_0402_50V8J
100P_0402_50V8J
1 2
@
@
100P_0402_50V8J
100P_0402_50V8J
1 2
@
@
100P_0402_50V8J
100P_0402_50V8J
1 2
@
@
100P_0402_50V8J
100P_0402_50V8J
1 2
@
@
100P_0402_50V8J
100P_0402_50V8J
1 2
@
@
100P_0402_50V8J
100P_0402_50V8J
1 2
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Compal Electronics, Inc.
Tigerpoint(2/4)
Tigerpoint(2/4)
Tigerpoint(2/4)
LA-6421P
LA-6421P
LA-6421P
1
0.1
0.1
12 39Thursday, June 03, 2010
12 39Thursday, June 03, 2010
12 39Thursday, June 03, 2010
0.1
Loading...