Acer Aspire 6530, Aspire 6530G Schematics

5

ZK3 BLOCK DIAGRAM

DDRII-SODIMM1

D D

DDRII-SODIMM2

CRT HDMI

LVDS

C C

MXM Module

PG 18

SATA - ODD

B B

E - SATA

PG 7,8

PG 7,8

HDMI

LVDS

CRT

SATA - HDD1

PG 24

SATA - HDD2

PG 24

PG 24

PG 30

PG 20

PG 19

PG 19

DDR II 667 MHZ

LVDS(2ch)

PCI-E X16

SATA0

SATA1

SATA4

SATA2

HT_LINK

HDMI

RX780/RS780M/RS780MC

A_LINK (X4)

4

AMD S1g2

Griffin Processor

(638 S1g2 socket)

PG 4,5,6

21mm X 21mm, 528pin BGA

PG 9,10,11,12

SB700

21mm X 21mm, 528pin BGA

4.5W(Ext)

4.3W(Int)

CPU_CLK
NBGFX_CLK
NBGPP_CLK
SBLINK_CLK

PCI-E, 1X (port2)

PCI-E, 1X (port0)

USB2.0 (P3)

PCI-E, 1X (port1)

PCI-E, 1X (port3)

USB2.0 (P6)

SBSRC_CLK

USB2.0 (P11)

USB2.0 (P9)

USB2.0 (P8)

USB2.0 (P5)

USB2.0 (P10)

Azalia

3

CLOCK GENERATOR

ICS9LPRS476AKLFT
SLG8SP628VTR
RTM880N-795

AR8121(Giga)

Mini Card (WLAN)

MINI CARD (TV)

NEW CARD

CCD

Fingerprint

Card Reader

Bluetooth

DOCKING

RJ45

PG 19

PG 31

PG 28

PG 22

PG 31

HOST 200MHz
PCIE 100MHz
USB 48MHz
REF 14MHz

PG 3

PG 22PG 21

PG 23

PG 23

PG 27

USB2.0 (P2/3)

USB2.0 (P0)

USB2.0 (P1)

USB2.0 (P7)

USB2.0 (P4)

Azalia Audio Codec

ALC888

2

CPU_CORE1
CPU_CORE2

CPU VDDNB_CORE

+NB_CORE

+1.35V_VDDHTTX

+2.5V
+1.5V
+1.2V
+1.1V_NB
+1.2V_S5

+1.8VSUS
+1.8V

+SMDDR_VTERM

+3VPCU
+3V_S5
+3VSUS
+3V
+5VPCU
+5V

USB2.0 MINI CARD Ports X2

(MB)

USB2.0 I/O Ports X1

(MB)

USB2.0 I/O Ports X1

(DB)

USB2.0 I/O Ports X1

(DB)

USB2.0 I/O Ports X2

PG 23

PG 30

PG 30

PG 30

PG 30(DB)

PG 25

CPU CORE

NB CORE

(1.0~1.2V)

+2.5V
+1.5V
+1.2V

+1.8VSUS
SMDDR
VTERM

3V/5V

PCB STACK UP

PG 35

LAYER 1 : TOP
LAYER 2 : GND
LAYER 3 : IN1

PG 36

LAYER 4 : IN2
LAYER 5 : VCC
LAYER 6 : BOT

Daughter Board

PG 38

MMB Board

USB Board

PG 37

Touch Pad board

Touch Pad board
(with Fingerprinter)

PG 34

1

01

PCI ROUTING TABLE

Device IDSEL#

OZ129 AD17

REQ#/GNT#

REQ0# / GNT0# INTE#

Interrupt

PG 13,14,15,16,17

PG 25

LPC

EC

MDC CONN

A A

WPCE775

MDC
Board

PG 32

RJ11

PORT-A

H.P/
SPDIF

PG 26

PORT-B

MIC
JACK

PG 26

Speaker Amplifier
G1441R51U

INT.
MIC

PG 26

INT.
S.P.

PG 26

PG 26

SPI

Quanta Computer Inc.

Quanta Computer Inc.

VR

FAN

Keyboard

PG 23 PG 31

5

PG 31

4

Flash
ROM

Touch
Pad

PG 32 PG 31

CIR

PG 32

Kill SW

PG 32

3

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Date: Sheet of

2

Date: Sheet of

Quanta Computer Inc.

PROJECT :

PROJECT :

PROJECT :

BLOCK DIAGRAM

BLOCK DIAGRAM

BLOCK DIAGRAM

ZK3

ZK3

ZK3

1 43Monday, August 18, 2008

1 43Monday, August 18, 2008

1

1 43Monday, August 18, 2008

1A

1A

1A

5

4

3

2

1

02

BD3G Power On Sequence

From AC,Battery VIN

D D

From PWM

From Power Button

From EC

+5VPCU +3VPCU
SYS_HWPG(PCU)
NBSWON#
S5_ON
+5V_S5

+3V_S5

From EC
From EC
From SB

From SB to EC

From EC

+1.2V_S5
RSMRST#
DNBSWON#
PCIE_WAKE#
SUSB#,SUSC#
SUSON

>10ms

>100ms

SUSON

+3VSUS +1.8VSUS SMDDR_VREF SMDDR_VTERM

From PWM

C C

From EC

HWPG_1.8V (SUS)
MAINON

MAINON

+5V +3V +2.5V +1.8V +1.5V +NB_CORE +1.1V_NB +1.35V_VDDHTTX

From PWM
From EC

HWPG_1.5V,HWPG_2.5V,GFXPG(MAIN) HWPG_1.2_NB
VRON
CPU_CORE0, CPU_CORE1, CPU VDDNB_CORE, +1.2V

From PWM

VRM_PWRGD (CPU)
HWPG

From EC

From SB
From SB
From SB

B B

From SB

ECPWROK
SB_PWRGD
NB_PWRGD
CPU_PWRGD
PLTRST# PCIRST#
CPU_LDT_RST#
CPU_LDT_STOP#

0ns~30ns

99ms~108ms

Items Function BTO Name Description

CIR

1

HDMI port

2

HDMI transmitter

3

HDMI-CEC

4

Discrete VGA

5

UMA

6

New Card

7

RJ11

8

RJ45-10/100

9

RJ45-1000

10

Option for RJ45-10/100 and RJ45-1000

11

TV

12

Cardbus

13

FM transmitter

14

Mainstream ID LED

15

Low cost ID LED

16

CCD

17

INT MIC

18

AMD Hyper Flash

19

North bridge(690MC/RS780MC)

20

North bridge(RX780)

21

PowerXpress

22

PowerXpress with UMA SKU

23

PowerXpress with Discrete VGA SKU

24

Power player/Power Shift

25

BOM naming rule

v

v

v

v

v

v

v

v

v

CIR@

HDM@

SI@

CEC@

EV@

IV@

NEW@

MD@

40@

55@

40@55@

TV@

CB@

FM@

MID@

LID@

CCD@

I_MIC@

HF@

MC@

RX@

PX@

PX@IV@

PX@EV@

PP@

Silicon image SiI 1392/1932

Renesas R8C/1B

External VGA stuff

Internal VGA stuff

Modem

Marvell 8040T(10/100)

Marvell 8055(Giga)

Option for 8040/8055

Only for AMD platform

Only for AMD platform

Only for AMD platform

Only for AMD platform

Only for AMD platform

Only for AMD platform

Only for AMD platform

*Note: EC will sampling SUSB# &
SUSC# every 5ms.

AMD SB700 SMBUS Table

CLK GEN RAM Mini Card (HD-Decoder) Mini-card(WL) New Card HDMI

SB700 SDATA0/SCLK0(+3V)

A A

SB700 SDATA1/SCLK1(+3V_S5)
SB700 SDATA2/SCLK2(+3V_S5)
Power
Reserve MOS ckt

5

V

VVVV

V

+3V +3V +3V (Atheros) +3V +3V_S5

+3V

VVVVV V

4

EC775 SDATA1/SCLK1(+3VPCU)
EC775 SDATA2/SCLK2(+3VPCU)
EC775 SDATA3/SCLK3(+3VPCU)
EC775 SDATA4/SCLK4(+3VPCU)
Power
Reserve MOS ckt

3

Battery CPU thermal Sensor EC EEPROM VGA thermal Sensor Touch Sensor HDMI CEC

V

+3VPCU +3V +3VPCU +3V +3VPCU +5VPCU

X X XV V V

EC SMBUS Table

V V

2

V V V

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

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Size Document Number Rev

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PROJECT :

SYSTEM INFORMATION

SYSTEM INFORMATION

SYSTEM INFORMATION

1

ZK3

ZK3

ZK3

2 43Monday, August 18, 2008

2 43Monday, August 18, 2008

2 43Monday, August 18, 2008

1A

1A

1A

5

4

3

2

1

CLK_GEN_SLG8SP628

+3V +3V_CLK_VDD +1.2V +1.2V_CLK_VDDIO

L46

L46

BK1608HS600

BK1608HS600

D D

C C

R522

R522

*10K_4

CLKREQ3#

CLKREQ2#

B:(10/25) Add WLAN & LAN CLKREQ circuit (BOI request)

B B

+3V_CLK_VDD

*10K_4

R521

R521

*10K_4

*10K_4

R523 8.2K_4R523 8.2K_4
R530 8.2K_4R530 8.2K_4

1

1

NEW_CLKREQ#
CLK_PD#

+3V

*RHU002N06

*RHU002N06

2

+3V

*RHU002N06

*RHU002N06

2

Q45

Q45

3

Q44

Q44

3

RX780 RS780CLOCKS name

NBGFX_CLKP
NBGFX_CLKN

MXM_REFCLKP
MXM_REFCLKN

A A

NBGPP_CLKP
NBGPP_CLKN

SBLINK_CLKP
SBLINK_CLKN RP1003 STUFF RP1003 STUFF

RP1001 STUFF

RP66 STUFF

RP1001 STUFF

RP66 NC

RP1005 STUFF RP1005 NC

5

C588

C588
22U/6.3V_8

22U/6.3V_8

+3V_CLK_48

L51

L51

BK1608HS600

BK1608HS600

+3V_CLK_VDD

CLKREQ_TV# (23)

CLKREQ_WLAN# (23)

12

C615

C615

2.2U/6.3V_6

2.2U/6.3V_6

R254 *0_6R254 *0_6

NEW_CLKREQ#(14,27)

Clock pin function

to NB for VGA reference clock

to M82-S external reference clock -RX780 only

to NB for RX780 for PCIEX2 interface reference clock only
RS780 is internal share with AC-LINK clock,RS780 not need

to NB for AC-LINK reference clock

C595

C595

0.1U/10V_4

0.1U/10V_4

+1.2V_CLK_VDDIO

PCLK_SMB(7,14,20,21,23,27)
PDAT_SMB(7,14,20,21,23,27)

T142T142

T139T139

C606 33p/50V_4C606 33p/50V_4

1 2

33p/50V_4

33p/50V_4
C611

C611

1 2

C593

C593

0.1U/10V_4

0.1U/10V_4

+3V_CLK_VDD+3V

CG_XIN
CG_XOUT

CLK_PD#

NEW_CLKREQ#

CLKREQ2#
CLKREQ3#

21

C589

C589

C620

C620

0.1U/10V_4

0.1U/10V_4

0.1U/10V_4

0.1U/10V_4

ICS9LPRS480 P/N :

SLG8SP628

RTM880N-796

4
16
26
35
40
48
55
56
63

11
17
25
34
47

1

7
10
18
24
33
43
46
52
60

61
62

2

3

51

23
45
44
39
38

CG_XIN

Y6

Y6

14.318MHZ

14.318MHZ
CG_XOUT

4

C599

C599

0.1U/10V_4

0.1U/10V_4

U29

U29

VDDDOT
VDDSRC
VDDATIG
VDDSB_SRC
VDDSATA
VDDCPU
VDDHTT
VDDREF
VDD48

VDDSRC_IO0
VDDSRC_IO1
VDDATIG_IO
VDDSB_SRC_IO
VDDCPU_IO

GND48
GNDDOT
GNDSRC0
GNDSRC1
GNDATIG
GNDSB_SRC
GNDSATA
GNDCPU
GNDHTT
GNDREF

X1
X2

SMBCLK
SMBDAT

PD#

CLKREQ0#
CLKREQ1#
CLKREQ2#
CLKREQ3#
CLKREQ4#

SLG8SP628

SLG8SP628

C598

C598

C616

C616

0.1U/10V_4

0.1U/10V_4

0.1U/10V_4

0.1U/10V_4

P/N : AL8SP628000

P/N : AL000880000

CPUK8_0C

SB_SRC0T
SB_SRC0C
SB_SRC1T
SB_SRC1C

QFN64

QFN64

SRC6T/SATAT

SRC6C/SATAC
SRC7T/27M_SS
SRC7C/27M_NS

HTT0T/66M

HTT0C/66M

REF0/SEL_HTT66

REF1/SEL_SATA

REF2/SEL_27

TGND065TGND166TGND267TGND368TGND469TGND570TGND671TGND772TGND873TGND9

+3V_CLK_VDD

R537

R537

8.2K_4

8.2K_4

R539

R539
*8.2K_4

*8.2K_4

C591

C591

0.1U/10V_4

0.1U/10V_4

CPUK8_0T

ATIG0T
ATIG0C
ATIG1T
ATIG1C

SRC0T
SRC0C
SRC1T
SRC1C
SRC2T
SRC2C
SRC3T
SRC3C
SRC4T
SRC4C

48MHz_0

74

10/17 Add 10p for EMI issue (Suggestion by Seligo)

R540

R540

8.2K_4

8.2K_4

CPUCLKN_R

49

NBGFX_CLKP_R NBGFX_CLKP

30

NBGFX_CLKN_R

29

MXM_REFCLKP_R CLK_MXM

28

MXM_REFCLKN_R

27

SBLINK_CLKP_R

37

SBLINK_CLKN_R

36

SBSRC_CLKP_R

32

SBSRC_CLKN_R

31

NBGPP_CLKP_R

22

NBGPP_CLKN_R

21

CLK_PCIE_NEW_R

20

CLK_PCIE_NEW#_R

19

CLK_PCIE_MINI_R

15

CLK_PCIE_MINI#_R

14

CLK_PCIE_MINI2_R

13

CLK_PCIE_MINI2#_R

12

CLK_PCIE_LAN_R

9

CLK_PCIE_LAN#_R

8

42
41
6
5

NBHT_REFCLKP_R NBHT_REFCLKP

54
53

CLK_48M_USB_R

64

SEL_HTT66

59

SEL_SATA

58
57

C600

C600
*10p/50V_4

*10p/50V_4

SEL_SATA
SEL_HTT66
SEL_27

R534

R534

8.2K_4

8.2K_4

3

CPUCLKP_R

50

RP43 0X2RP43 0X2

RP44 0X2RP44 0X2
RP45 EV@0X2RP45 EV@0X2

RP41 0X2RP41 0X2
RP42 0X2RP42 0X2

RP47 *0X2RP47 *0X2
RP48 0X2RP48 0X2
RP49 0X2RP49 0X2
RP51 0X2RP51 0X2
RP50 0X2RP50 0X2

T140T140
T138T138
T145T145
T144T144

RP46 0X2RP46 0X2

R536 158/F_4R536 158/F_4
R535 90.9/F_4R535 90.9/F_4

C624

C624
*10p/50V_4

*10p/50V_4

SEL_HTT66

SEL_HTT66

SEL_SATA

SEL_27

Clock chip has internal serial terminations
for differencial pairs, external resistors are
reserved for debug purpose.

Place within 0.5"
of CLKGEN

1
3

1
3
1
3

1
3
1
3

1
3
1
3
1
3
1
3
1
3

1
3

R548 22_4R548 22_4
R547 22_4R547 22_4

Ra

Rb

RES CHIP 130 1/16W +-1%(0402)L-F -->CS11302FB15
RES CHIP 158 1/16W +-1%(0402) -->CS11582FB00
RES CHIP 90.9 1/16W +-1%(0402) -->CS09092FB15
RES CHIP 82.5 1/16W +-1%(0402) -->CS08252FB11

R640 *110/F_4R640 *110/F_4
R641 *75/F_4R641 *75/F_4

(For SB A13)

* default

L47

L47

BK1608HS600

2
4

2
4
2
4

2
4
2
4

2
4
2
4
2
4
2
4
2
4

2
4

BK1608HS600

R528

R528

*261/F_4

*261/F_4

NBGFX_CLKN
CLK_MXM#

SBLINK_CLKP
SBLINK_CLKN
SBSRC_CLKP
SBSRC_CLKN

CLK_PCIE_NEW_C
CLK_PCIE_NEW_C#
CLK_PCIE_MINI1
CLK_PCIE_MINI1#
CLK_PCIE_TV
CLK_PCIE_TV#
CLK_PCIE_LAN
CLK_PCIE_LAN#

NBHT_REFCLKNNBHT_REFCLKN_R

CLK_48M_USB

EXT_NB_OSCSEL_27

C587

C587
22U/6.3V_8

22U/6.3V_8

RS780RX780

1.8V

82.5RRa

130RRb

66 MHz 3.3V single ended HTT clock

1

*0 100 MHz differential HTT clock

100 MHz non-spreading differential SRC clock

1*
0

100 MHz spreading differential SRC clock
27MHz and 27M SS outputs

1
0*

100 MHz SRC clock

1.1V

158R

90.9R

C604

C604

0.1U/10V_4

0.1U/10V_4

CPUCLKP
CPUCLKN

CLK_MXM (18)
CLK_MXM# (18)

SBLINK_CLKP (11)
SBLINK_CLKN (11)
SBSRC_CLKP (13)
SBSRC_CLKN (13)

NBGPP_CLKP
NBGPP_CLKN

CLK_PCIE_NEW_C (27)
CLK_PCIE_NEW_C# (27)
CLK_PCIE_MINI1 (23)
CLK_PCIE_MINI1# (23)
CLK_PCIE_TV (23)
CLK_PCIE_TV# (23)
CLK_PCIE_LAN (21)
CLK_PCIE_LAN# (21)

NBHT_REFCLKP (11)
NBHT_REFCLKN (11)

CLK_Card48 (28)
CLK_48M_USB (14)

EXT_NB_OSC (11)

2

C592

C592

0.1U/10V_4

0.1U/10V_4

CLK_14M_SB (13)

C617

C617

C594

C594

0.1U/10V_4

0.1U/10V_4

0.1U/10V_4

0.1U/10V_4

CPUCLKP (4)
CPUCLKN (4)

NBGFX_CLKP (11)
NBGFX_CLKN (11)

To MXM

To NB
To SB

NBGPP_CLKP (11)
NBGPP_CLKN (11)

To New Card
To Mini PCIE Slot
To Mini PCIE Slot
To LAN Controller

To NB

To SB

To NB

C625

C625

0.1U/10V_4

0.1U/10V_4

To CPU

RS780/RX780 for VGA

To NB

RX780 only

NB CLOCK INPUT TABLE

NB CLOCKS
HT_REFCLKP
HT_REFCLKN
REFCLK_P
REFCLK_N
GFX_REFCLK
GPP_REFCLK
GPPSB_REFCLK

Size Document Number Rev

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Date: Sheet of

Date: Sheet of

Date: Sheet of

C590

C590

0.1U/10V_4

0.1U/10V_4

To NB

RX780 RS780
100M DIFF
100M DIFF
14M SE (1.8V)
NC vref
100M DIFF
100M DIFF
100M DIFF

CLOCK GENERATOR_SLG8SP628

CLOCK GENERATOR_SLG8SP628

CLOCK GENERATOR_SLG8SP628

100M DIFF
100M DIFF
14M SE (1.1V)

100M DIFF(IN/OUT)*

NC or 100M DIFF OUTPUT

100M DIFF

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

PROJECT :

1

ZK3

ZK3

ZK3

3 43Monday, August 18, 2008

3 43Monday, August 18, 2008

3 43Monday, August 18, 2008

03

1A

1A

1A

5

+1.2V +1.2V_VLDT

R379 0_8R379 0_8
R373 0_8R373 0_8

D D

HT_NB_CPU_CAD_H[15..0](9)
HT_NB_CPU_CAD_L[15..0](9)
HT_NB_CPU_CLK_H[1..0](9)
HT_NB_CPU_CLK_L[1..0](9)
HT_NB_CPU_CTL_H[1..0](9)
HT_NB_CPU_CTL_L[1..0](9)
HT_CPU_NB_CAD_H[15..0](9)
HT_CPU_NB_CAD_L[15..0](9)
HT_CPU_NB_CLK_H[1..0](9)
HT_CPU_NB_CLK_L[1..0](9)
HT_CPU_NB_CTL_H[1..0](9)
HT_CPU_NB_CTL_L[1..0](9)

C C

+1.2V_VLDT

R458 20K/F_4R458 20K/F_4

+3V

CPU_LDT_REQ#_CPU

C489

C489

*100p/50V_4

*100p/50V_4

B B

+1.8VSUS

+1.8VSUS

+1.8VSUS

+1.8VSUS

CPU_PROCHOT_L#

A A

+1.2V_VLDT

R377 *51_4R377 *51_4
R376 *51_4R376 *51_4

2

Q41 *BSS138_NL/SOT23Q41 *BSS138_NL/SOT23

1

R439 0_6R439 0_6

R155 10K/F_4R155 10K/F_4

R142 300_4R142 300_4

CPU_MEMHOT_L#

R433 10K/F_4R433 10K/F_4

R437 300_4R437 300_4

C462 4.7U/6.3V_6C462 4.7U/6.3V_6
C461 4.7U/6.3V_6C461 4.7U/6.3V_6
C463 0.22U/6.3V_4C463 0.22U/6.3V_4
C464 180p/50V_4C464 180p/50V_4

HT_NB_CPU_CAD_H[15..0]
HT_NB_CPU_CAD_L[15..0]

HT_NB_CPU_CLK_H[1..0]

HT_NB_CPU_CLK_L[1..0]

HT_NB_CPU_CTL_H[1..0]

HT_NB_CPU_CTL_L[1..0]
HT_CPU_NB_CAD_H[15..0]
HT_CPU_NB_CAD_L[15..0]

HT_CPU_NB_CLK_H[1..0]

HT_CPU_NB_CLK_L[1..0]

HT_CPU_NB_CTL_H[1..0]

HT_CPU_NB_CTL_L[1..0]

HT_NB_CPU_CTL_H1
HT_NB_CPU_CTL_L1

CNTR_VREF

C522 0.1U/10V_4C522 0.1U/10V_4

R445 34.8K/F_4R445 34.8K/F_4

CNTR_VREF

3

C504

C504

*100p/50V_4

*100p/50V_4

1/31 leakage issue ,add R687, no stuff R686

2

2

Q40

Q40

1 3

MMBT3904

MMBT3904

R436 0_4R436 0_4

5

HT_NB_CPU_CAD_H0
HT_NB_CPU_CAD_L0
HT_NB_CPU_CAD_H1
HT_NB_CPU_CAD_L1
HT_NB_CPU_CAD_H2
HT_NB_CPU_CAD_L2
HT_NB_CPU_CAD_H3
HT_NB_CPU_CAD_L3
HT_NB_CPU_CAD_H4
HT_NB_CPU_CAD_L4
HT_NB_CPU_CAD_H5
HT_NB_CPU_CAD_L5
HT_NB_CPU_CAD_H6
HT_NB_CPU_CAD_L6
HT_NB_CPU_CAD_H7
HT_NB_CPU_CAD_L7
HT_NB_CPU_CAD_H8
HT_NB_CPU_CAD_L8
HT_NB_CPU_CAD_H9
HT_NB_CPU_CAD_L9
HT_NB_CPU_CAD_H10
HT_NB_CPU_CAD_L10
HT_NB_CPU_CAD_H11
HT_NB_CPU_CAD_L11
HT_NB_CPU_CAD_H12
HT_NB_CPU_CAD_L12
HT_NB_CPU_CAD_H13
HT_NB_CPU_CAD_L13
HT_NB_CPU_CAD_H14
HT_NB_CPU_CAD_L14
HT_NB_CPU_CAD_H15
HT_NB_CPU_CAD_L15

HT_NB_CPU_CLK_H0
HT_NB_CPU_CLK_L0
HT_NB_CPU_CLK_H1
HT_NB_CPU_CLK_L1

HT_NB_CPU_CTL_H0
HT_NB_CPU_CTL_L0
HT_NB_CPU_CTL_H1
HT_NB_CPU_CTL_L1

CPU_LDT_REQ# (11)

3/19 double check

Q16

Q16
MMBT3904

MMBT3904

CPU_MEMHOT#

13

+3V

R429

R429

*10K_4

*10K_4

CPU_PROCHOT_SB# (13)

BLM21PG221SN1D

BLM21PG221SN1D

+2.5V

CNTR_VREF

+1.2V_VLDT
+1.2V_VLDT
+1.2V_VLDT
+1.2V_VLDT

CPU_LDT_RST#

C202

C202

10U/6.3V_8

10U/6.3V_8

D1
D2
D3
D4

E3
E2
E1
F1
G3
G2
G1
H1

J1

K1

L3
L2

L1
M1
N3
N2
E5
F5
F3
F4
G5
H5
H3
H4
K3
K4

L5
M5
M3
M4

N5

P5

J3

J2

J5
K5

N1
P1
P3
P4

12

L20

L20

LS0805-100M-N

U27A

U27A

VLDT_A0
VLDT_A1
VLDT_A2
VLDT_A3

L0_CADIN_H0
L0_CADIN_L0
L0_CADIN_H1
L0_CADIN_L1
L0_CADIN_H2
L0_CADIN_L2
L0_CADIN_H3
L0_CADIN_L3
L0_CADIN_H4
L0_CADIN_L4
L0_CADIN_H5
L0_CADIN_L5
L0_CADIN_H6
L0_CADIN_L6
L0_CADIN_H7
L0_CADIN_L7
L0_CADIN_H8
L0_CADIN_L8
L0_CADIN_H9
L0_CADIN_L9
L0_CADIN_H10
L0_CADIN_L10
L0_CADIN_H11
L0_CADIN_L11
L0_CADIN_H12
L0_CADIN_L12
L0_CADIN_H13
L0_CADIN_L13
L0_CADIN_H14
L0_CADIN_L14
L0_CADIN_H15
L0_CADIN_L15

L0_CLKIN_H0
L0_CLKIN_L0
L0_CLKIN_H1
L0_CLKIN_L1

L0_CTLIN_H0
L0_CTLIN_L0
L0_CTLIN_H1
L0_CTLIN_L1

SOCKET_638_PIN

SOCKET_638_PIN

G1

G1
*SHORT_ PAD1

*SHORT_ PAD1

for debug only

CPU_MEMHOT# (14,32)

+1.8VSUS

EC_PROCHOT# (32)

3/19 double check

HT LINK

HT LINK

1

HWPG(32)

R396 300_4R396 300_4

CPU_THERMTRIP_L#

4

+CPUVDDA

C190

C190

4.7U/6.3V_6

4.7U/6.3V_6

VLDT_B0
VLDT_B1
VLDT_B2
VLDT_B3

L0_CADOUT_H0
L0_CADOUT_L0
L0_CADOUT_H1
L0_CADOUT_L1
L0_CADOUT_H2
L0_CADOUT_L2
L0_CADOUT_H3
L0_CADOUT_L3
L0_CADOUT_H4
L0_CADOUT_L4
L0_CADOUT_H5
L0_CADOUT_L5
L0_CADOUT_H6
L0_CADOUT_L6
L0_CADOUT_H7
L0_CADOUT_L7
L0_CADOUT_H8
L0_CADOUT_L8
L0_CADOUT_H9
L0_CADOUT_L9

L0_CADOUT_H10

L0_CADOUT_L10

L0_CADOUT_H11

L0_CADOUT_L11

L0_CADOUT_H12

L0_CADOUT_L12

L0_CADOUT_H13

L0_CADOUT_L13

L0_CADOUT_H14

L0_CADOUT_L14

L0_CADOUT_H15

L0_CADOUT_L15

L0_CLKOUT_H0

L0_CLKOUT_L0

L0_CLKOUT_H1

L0_CLKOUT_L1

L0_CTLOUT_H0

L0_CTLOUT_L0

L0_CTLOUT_H1

L0_CTLOUT_L1

2

3

Q42

Q42
BSS138_NL/SOT23

BSS138_NL/SOT23

+1.8VSUS

2

MMBT3904

MMBT3904

4

W/S= 15 mil/20mil

C177

C188

C188

0.22U/6.3V_4

0.22U/6.3V_4

C189

C189
3300p/50V_4

3300p/50V_4

C177
100U/6.3_3528

100U/6.3_3528

AMD Suggestion 3/29 modify

+1.2V_VLDT

AE2

+1.2V_VLDT

AE3

+1.2V_VLDT CPU_SVC_R

AE4

+1.2V_VLDT

AE5

HT_CPU_NB_CAD_H0

AD1

HT_CPU_NB_CAD_L0

AC1

HT_CPU_NB_CAD_H1

AC2

HT_CPU_NB_CAD_L1

AC3

HT_CPU_NB_CAD_H2

AB1

HT_CPU_NB_CAD_L2

AA1

HT_CPU_NB_CAD_H3

AA2

HT_CPU_NB_CAD_L3

AA3

HT_CPU_NB_CAD_H4

W2

HT_CPU_NB_CAD_L4

W3

HT_CPU_NB_CAD_H5

V1

HT_CPU_NB_CAD_L5

U1

HT_CPU_NB_CAD_H6

U2

HT_CPU_NB_CAD_L6

U3

HT_CPU_NB_CAD_H7

T1

HT_CPU_NB_CAD_L7

R1

HT_CPU_NB_CAD_H8

AD4

HT_CPU_NB_CAD_L8

AD3

HT_CPU_NB_CAD_H9

AD5

HT_CPU_NB_CAD_L9

AC5

HT_CPU_NB_CAD_H10

AB4

HT_CPU_NB_CAD_L10

AB3

HT_CPU_NB_CAD_H11

AB5

HT_CPU_NB_CAD_L11

AA5

HT_CPU_NB_CAD_H12

Y5

HT_CPU_NB_CAD_L12

W5

HT_CPU_NB_CAD_H13

V4

HT_CPU_NB_CAD_L13

V3

HT_CPU_NB_CAD_H14

V5

HT_CPU_NB_CAD_L14

U5

HT_CPU_NB_CAD_H15

T4

HT_CPU_NB_CAD_L15

T3

HT_CPU_NB_CLK_H0

Y1

HT_CPU_NB_CLK_L0

W1

HT_CPU_NB_CLK_H1

Y4

HT_CPU_NB_CLK_L1

Y3

HT_CPU_NB_CTL_H0

R2

HT_CPU_NB_CTL_L0

R3

HT_CPU_NB_CTL_H1

T5

HT_CPU_NB_CTL_L1

R5

+3V

R463

R463
1K/F_4

1K/F_4

CPU_LDT_RST_HTPA#

3

Q33

Q33

R349

R349

FDV301N

FDV301N

*10K_4

R369

R369
1K_4

1K_4

R360 *0_6R360 *0_6

*10K_4

1

2

1 3

Q32

Q32

C4604.7U/6.3V_6 C4604.7U/6.3V_6
C4660.22U/6.3V_4 C4660.22U/6.3V_4
C465180p/50V_4 C465180p/50V_4

AMD Suggestion 3/29 modify

AMD Suggestion 3/29 modify

T104T104

D37

D37
*BAS316

*BAS316

R362 100K_6R362 100K_6

CPU_THERMTRIP# (14)
SYS_SHDN# (34,39)

3

CPU CLK

CPUCLKP(3)
CPUCLKN(3)

Keep trace from resisor to CPU within 0.6"
keep trace from caps to CPU within 1.2"

CPUCLKIN
CPUCLKP

CPUCLKN

CPUCLKP
CPUCLKN

R456 169/F_4R456 169/F_4

C519 3900p/25V_4C519 3900p/25V_4
C514 3900p/25V_4C514 3900p/25V_4

CPU_LDT_STOP#(11,13)

CPU_LDT_RST#(13)

CPU_PWRGD(13)

SideBand Temp sense I2C

+1.2V_VLDT

CPU_VDD0_FB_H(35)
CPU_VDD0_FB_L(35)

CPU_VDD1_FB_H(35)
CPU_VDD1_FB_L(35)

+1.8VSUS

+1.8VSUS

R416 *300_4R416 *300_4

10/9 AMD suggest
remove MOS and connect directly

SB_SCLK3(14)

SB_SDATA3(14)

+1.8VSUS

CPU_SVC_R
CPU_SVD_R CPU_SVD
CPU_PWRGD

SB_SCLK3

SB_SDATA3

THERM_ALERT#_R

R420 1K/F_4R420 1K/F_4
R438 1K/F_4R438 1K/F_4

R440 0_4R440 0_4
R430 0_4R430 0_4
R444 0_4R444 0_4

R435 *220_4R435 *220_4
R422 *220_4R422 *220_4
R448 *220_4R448 *220_4

CPU Thermal monitor

ABCLK(32)

ABDATA(32)

THERM_ALERT#(15)

CPUFAN#_ON(31)

3

+CPUVDDA

CPUCLKIN#

CPU_LDT_RST#
CPU_PWRGD
CPU_LDT_STOP#
CPU_LDT_REQ#_CPU

R154 44.2/F_4R154 44.2/F_4
R152 44.2/F_4R152 44.2/F_4

place them to CPU within 1.5"

CPU_DBRDY

T21T21

CPU_TMS

T20T20

CPU_TCK

T15T15

CPU_TRST#

T96T96

CPU_TDI

T95T95

T94T94

R159*300_4 R159*300_4
R145*300_4 R145*300_4

R160 510/F_4R160 510/F_4
R151 510/F_4R151 510/F_4

R139300_4 R139300_4
R410*300_4 R410*300_4
R402300_4 R402300_4
R408*300_4 R408*300_4
R140*300_4 R140*300_4

R409 0_4R409 0_4

R387 *0_4R387 *0_4

R392 *0_4R392 *0_4

3

*BSS138_NL/SOT23

*BSS138_NL/SOT23

Serial VID

CPU_SVC

CPU_PWRGD_SVID_REG

+3V

Q11

Q11

2

RHU002N06

RHU002N06

3

3

1

+3V

Q13

Q13

2

RHU002N06

RHU002N06

1

+3V

R365

R365
*8.2K_4

*8.2K_4

3

+3V

R119 10K_4R119 10K_4

10/30 change to G781

W/S= 15 mil/20mil

+CPUVDDA
+CPUVDDA

CPUCLKIN
CPUCLKIN#

CPU_SIC
CPU_SID
CPU_ALERT

CPU_HTREF0
CPU_HTREF1

CPUTEST23

CPUTEST18
CPUTEST19

CPUTEST25H
CPUTEST25L

CPUTEST21
CPUTEST20
CPUTEST24
CPUTEST22
CPUTEST12
CPUTEST27

CNTR_VREF

CPU_SIC

2

Q30

Q30

2

Q31*2N7002E-LF Q31*2N7002E-LF

2

U27D

U27D

F8

VDDA1

F9

VDDA2

A9

CLKIN_H

A8

CLKIN_L

B7

RESET_L

A7

PWROK

F10

LDTSTOP_L

C6

AF4
AF5

AE6

R6

P6
F6

E6
Y6

AB6
G10

AA9
AC9
AD9

AF9
AD7

H10

G9

E9
E8

AB8

AF7

AE7

AE8
AC8

AF8

C2

AA6

A3
A5
B3
B5

C1

R386

R386
390_4

390_4

CPU_SID

CPU_ALERT

1

+3V

R117

R117
*10K_4

*10K_4
THERM_ALERT#_R

1

+1.8VSUS

THERMTRIP_L

PROCHOT_L

LDTREQ_L
SIC

SID
ALERT_L

HT_REF0
HT_REF1

VDD0_FB_H

VDDIO_FB_H

VDD0_FB_L

VDDIO_FB_L

VDD1_FB_H

VDDNB_FB_H

VDD1_FB_L

VDDNB_FB_L

DBRDY
TMS
TCK
TRST_L
TDI

TEST23
TEST18

TEST19
TEST25_H

TEST25_L
TEST21

TEST20
TEST24
TEST22
TEST12
TEST27

TEST9
TEST6

RSVD1
RSVD2
RSVD3
RSVD4
RSVD5

SOCKET_638_PIN

SOCKET_638_PIN

2/4 pull up R691 CPU_BDREQ# to avoid noise cause system shut down

R391

R391
390_4

390_4

CPU_SVC (35)
CPU_SVD (35)
CPU_PWRGD_SVID_REG (35)

R107

R107

R112

R112

10K_4

10K_4

10K_4

10K_4

MAX6657,G781P8,W83L771G

<check list>
Layout Note:Routing 10:10 mils and away
from noise source with ground gard

2

CPU_LDT_RST#
CPU_LDT_STOP#

CPU_LDT_REQ#_CPU
CPU_PWRGD

M11

KEY1

W18

KEY2

A6

SVC

A4

SVD

AF6
AC7
AA8

MEMHOT_L

W7

THERMDC

W8

THERMDA

W9
Y9

H6
G6

CPU_DBREQ#

E10

DBREQ_L

TEST28_H

TEST28_L

TEST29_H

TEST29_L

CPU_TDO

AE9

TDO

CPUTEST28H

J7

CPUTEST28L

H8

CPUTEST17

D7

TEST17

CPUTEST16

E7

TEST16

CPUTEST15

F7

TEST15

CPUTEST14

C7

TEST14

C3

TEST7

K8

TEST10

C4

TEST8

CPUTEST29H

C9

CPUTEST29L

C8

H18

RSVD10

H19

RSVD9

AA7

RSVD8

D5

RSVD7

C5

RSVD6

+1.8VSUS

R395

R395
1K/F_4

1K/F_4

+3V

2/19 change G781 to G786P81U

R105

R105
200_6

200_6

U10

U10

8

VCC

SCLK

7

DXP

SDA

6

DXN

ALERT#

4

GND

OVERT#

G786P81U

G786P81U

ADDRESS: 98H

1

R454300_4 R454300_4

+1.8V

R166300_4 R166300_4

R434300_4 R434300_4
R443300_4 R443300_4

H_THERMDC
H_THERMDA

+1.8V

CPU_SVD_R

CPU_THERMTRIP_L#
CPU_PROCHOT_L#
CPU_MEMHOT_L#

CPU_THERMDC
CPU_THERMDA

VDDIO_FB_H
VDDIO_FB_L

T22T22
T16T16

T29T29
T26T26

T34T34
T33T33

C498

C498
*0.1U/10V_4

*0.1U/10V_4

R113 0_4R113 0_4
R110 0_4R110 0_4

VDDIO_FB_H

VDDIO_FB_L

CPU_VDDNB_FB_H (35)
CPU_VDDNB_FB_L (35)

1/30 leakage issue , change
+1.8Vsus to +1.8V

10/9 AMD suggest

1. pull up CPU_PWRGD to +1.8SUS

2. pop R5563 pull up to +1.8SUS

T40T40
T97T97

R150*300_4 R150*300_4
R157*300_4 R157*300_4

HDT Connector

R168

R168
300_4

300_4

CPU_DBREQ#

VFIX MODE

SVC SVD Voltage Output

0 0
001
1
1 1

LM86VCC

C101

C101

0.1U/10V_4

0.1U/10V_4

C105

C105
2200p/50V_4

2200p/50V_4
H_THERMDC

R118 *0_4R118 *0_4

H_THERMDA

1
2
3
5

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

VID Override Circuit

1.4V

1.2V

1.0V

0.8V

2/18 G781 reverse R718 0 ohm for
Griffin CPU

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

PROJECT :

S1g2 HT, CTL I/F 1/3

S1g2 HT, CTL I/F 1/3

S1g2 HT, CTL I/F 1/3

ZK3

ZK3

ZK3

4 43Monday, August 18, 2008

4 43Monday, August 18, 2008

4 43Monday, August 18, 2008

1

04

1A

1A

1A

A

B

C

D

E

+SMDDR_VTERM +SMDDR_VTERM

PLACE THEM CLOSE TO
CPU WITHIN 1"

R431 39.2/F_4R431 39.2/F_4

MEM_MA0_ODT0(7,8)
MEM_MA0_ODT1(7,8)

MEM_MA0_CS#0(7,8)
MEM_MA0_CS#1(7,8)

MEM_MA_CLK1_P(7)
MEM_MA_CLK1_N(7)
MEM_MA_CLK7_P(7)
MEM_MA_CLK7_N(7)

MEM_MA_BANK0(7,8)
MEM_MA_BANK1(7,8)
MEM_MA_BANK2(7,8)

MEM_MA_RAS#(7,8)
MEM_MA_CAS#(7,8)
MEM_MA_WE#(7,8)

MEM_MA_CKE0(7,8)
MEM_MA_CKE1(7,8)

R432 39.2/F_4R432 39.2/F_4

T46T46

T85T85
T86T86

T81T81
T77T77

T73T73
T78T78

T79T79
T74T74

A

+1.8VSUS

4 4

MEM_MA_ADD[0..15](7,8)

3 3

2 2

1 1

M_ZP
M_ZN

MEM_MA_RESET#

MEM_MA1_ODT0
MEM_MA1_ODT1

CPU_MA1_CS_L0
CPU_MA1_CS_L1

CPU_MA_CLK_H5
CPU_MA_CLK_L5

CPU_MA_CLK_H4
CPU_MA_CLK_L4

MEM_MA_ADD0
MEM_MA_ADD1
MEM_MA_ADD2
MEM_MA_ADD3
MEM_MA_ADD4
MEM_MA_ADD5
MEM_MA_ADD6
MEM_MA_ADD7
MEM_MA_ADD8
MEM_MA_ADD9
MEM_MA_ADD10
MEM_MA_ADD11
MEM_MA_ADD12
MEM_MA_ADD13
MEM_MA_ADD14
MEM_MA_ADD15

MEM_MB_CLK7_P

MEM_MB_CLK7_N
MEM_MB_CLK1_P

MEM_MB_CLK1_N

U27B

U27B

D10

VTT1

C10

VTT2

B10

VTT3

AD10

VTT4

AF10

MEMZP

AE10

MEMZN

H16

RSVD_M1

T19

MA0_ODT0

V22

MA0_ODT1

U21

MA1_ODT0

V19

MA1_ODT1

T20

MA0_CS_L0

U19

MA0_CS_L1

U20

MA1_CS_L0

V20

MA1_CS_L1

J22

MA_CKE0

J20

MA_CKE1

N19

MA_CLK_H5

N20

MA_CLK_L5

E16

MA_CLK_H1

F16

MA_CLK_L1

Y16

MA_CLK_H7

AA16

MA_CLK_L7

P19

MA_CLK_H4

P20

MA_CLK_L4

N21

MA_ADD0

M20

MA_ADD1

N22

MA_ADD2

M19

MA_ADD3

M22

MA_ADD4

L20

MA_ADD5

M24

MA_ADD6

L21

MA_ADD7

L19

MA_ADD8

K22

MA_ADD9

R21

MA_ADD10

L22

MA_ADD11

K20

MA_ADD12

V24

MA_ADD13

K24

MA_ADD14

K19

MA_ADD15

R20

MA_BANK0

R23

MA_BANK1

J21

MA_BANK2

R19

MA_RAS_L

T22

MA_CAS_L

T24

MA_WE_L

SOCKET_638_PIN

SOCKET_638_PIN

+SMDDR_VTERM

C534

C534

4.7U/6.3V_6

4.7U/6.3V_6

+SMDDR_VTERM

C520

C520

1000p/50V_4

1000p/50V_4

C544

C544

1.5p/50V_4

1.5p/50V_4

C545

C545

1.5p/50V_4

1.5p/50V_4

W10

MEM:CMD/CTRL/CLK

MEM:CMD/CTRL/CLK

VTT5
VTT6
VTT7
VTT8
VTT9

VTT_SENSE

MEMVREF

RSVD_M2

MB0_ODT0
MB0_ODT1
MB1_ODT0

MB0_CS_L0
MB0_CS_L1
MB1_CS_L0

MB_CKE0
MB_CKE1

MB_CLK_H5

MB_CLK_L5

MB_CLK_H1

MB_CLK_L1

MB_CLK_H7

MB_CLK_L7

MB_CLK_H4

MB_CLK_L4

MB_ADD0
MB_ADD1
MB_ADD2
MB_ADD3
MB_ADD4
MB_ADD5
MB_ADD6
MB_ADD7
MB_ADD8

MB_ADD9
MB_ADD10
MB_ADD11
MB_ADD12
MB_ADD13
MB_ADD14
MB_ADD15

MB_BANK0
MB_BANK1
MB_BANK2

MB_RAS_L
MB_CAS_L

MB_WE_L

AC10
AB10
AA10
A10

CPU_VTT_SENSE

Y10

MEMVREF_CPU

W17

MEM_MB_RESET#

B18
W26

W23

MEM_MB1_ODT0

Y26
V26

W25
U22

J25
H26

CPU_MB_CLK_H5

P22

CPU_MB_CLK_HL5

R22
A17
A18
AF18
AF17

CPU_MB_CLK_H4

R26

CPU_MB_CLK_L4

R25
P24

N24
P26
N23
N26
L23
N25
L24
M26
K26
T26
L26
L25
W24
J23
J24

R24
U26
J26

U25
U24
U23

Place close to socket

C507

C499

C499

4.7U/6.3V_6

4.7U/6.3V_6

C201

C201

1000p/50V_4

1000p/50V_4

Close to CPU within 1500 mils

C507

4.7U/6.3V_6

4.7U/6.3V_6

C529

C529

1000p/50V_4

1000p/50V_4

B

4.7U/6.3V_6

4.7U/6.3V_6

1000p/50V_4

1000p/50V_4

MEM_MB_ADD0
MEM_MB_ADD1
MEM_MB_ADD2
MEM_MB_ADD3
MEM_MB_ADD4
MEM_MB_ADD5
MEM_MB_ADD6
MEM_MB_ADD7
MEM_MB_ADD8
MEM_MB_ADD9
MEM_MB_ADD10
MEM_MB_ADD11
MEM_MB_ADD12
MEM_MB_ADD13
MEM_MB_ADD14
MEM_MB_ADD15

C533

C533

C176

C176

MEM_MA_CLK7_P

MEM_MA_CLK7_N
MEM_MA_CLK1_P

MEM_MA_CLK1_N

750 mA

CPU_VTT_SENSE (37)

T113T113

MEM_MB0_ODT0 (7,8)
MEM_MB0_ODT1 (7,8)

T82T82

MEM_MB0_CS#0 (7,8)
MEM_MB0_CS#1 (7,8)

T76T76

MEM_MB_CKE0 (7,8)
MEM_MB_CKE1 (7,8)

T83T83
T80T80

MEM_MB_CLK1_P (7)
MEM_MB_CLK1_N (7)
MEM_MB_CLK7_P (7)

MEM_MB_CLK7_N (7)
T75T75
T84T84

MEM_MB_BANK0 (7,8)

MEM_MB_BANK1 (7,8)

MEM_MB_BANK2 (7,8)

MEM_MB_RAS# (7,8)

MEM_MB_CAS# (7,8)

MEM_MB_WE# (7,8)

C200

C200

0.22U/6.3V_4

0.22U/6.3V_4

C185

C185

180p/50V_4

180p/50V_4

+1.8VSUS

R192

R192

2K/F_4

2K/F_4

R179

R179

2K/F_4

2K/F_4

MEM_MB_ADD[0..15] (7,8)

C530

C530

0.22U/6.3V_4

0.22U/6.3V_4

1.5p/50V_4

1.5p/50V_4

1.5p/50V_4

1.5p/50V_4

C171

C171

180p/50V_4

180p/50V_4

C532

C532

C557

C557

0.22U/6.3V_4

0.22U/6.3V_4

C511

C511

C517

C517

180p/50V_4

180p/50V_4

+SMDDR_VREF

R173

R173
*0_4

*0_4

C218

C218

0.1U/10V_4

0.1U/10V_4

0.22U/6.3V_4

0.22U/6.3V_4

180p/50V_4

180p/50V_4

C199

C199

C528

C528

MEM_MB_DATA[0..63](7)

Reserved

1000p/50V_4

1000p/50V_4

MEM_MB_DM[0..7](7)

C

C210

C210

Processor Memory Interface

U27C

U27C

MEM_MB_DATA0
MEM_MB_DATA1
MEM_MB_DATA2
MEM_MB_DATA3
MEM_MB_DATA4
MEM_MB_DATA5
MEM_MB_DATA6
MEM_MB_DATA7
MEM_MB_DATA8
MEM_MB_DATA9
MEM_MB_DATA10
MEM_MB_DATA11
MEM_MB_DATA12
MEM_MB_DATA13
MEM_MB_DATA14
MEM_MB_DATA15
MEM_MB_DATA16
MEM_MB_DATA17
MEM_MB_DATA18
MEM_MB_DATA19
MEM_MB_DATA20
MEM_MB_DATA21
MEM_MB_DATA22
MEM_MB_DATA23
MEM_MB_DATA24
MEM_MB_DATA25
MEM_MB_DATA26
MEM_MB_DATA27
MEM_MB_DATA28
MEM_MB_DATA29
MEM_MB_DATA30
MEM_MB_DATA31
MEM_MB_DATA32
MEM_MB_DATA33
MEM_MB_DATA34
MEM_MB_DATA35
MEM_MB_DATA36
MEM_MB_DATA37
MEM_MB_DATA38
MEM_MB_DATA39
MEM_MB_DATA40
MEM_MB_DATA41
MEM_MB_DATA42
MEM_MB_DATA43
MEM_MB_DATA44
MEM_MB_DATA45
MEM_MB_DATA46
MEM_MB_DATA47
MEM_MB_DATA48
MEM_MB_DATA49
MEM_MB_DATA50
MEM_MB_DATA51
MEM_MB_DATA52
MEM_MB_DATA53
MEM_MB_DATA54
MEM_MB_DATA55
MEM_MB_DATA56
MEM_MB_DATA57
MEM_MB_DATA58
MEM_MB_DATA59
MEM_MB_DATA60
MEM_MB_DATA61
MEM_MB_DATA62
MEM_MB_DATA63

MEM_MB_DM0
MEM_MB_DM1
MEM_MB_DM2
MEM_MB_DM3
MEM_MB_DM4
MEM_MB_DM5
MEM_MB_DM6
MEM_MB_DM7

MEM_MB_DQS0_P(7)
MEM_MB_DQS0_N(7)
MEM_MB_DQS1_P(7)
MEM_MB_DQS1_N(7)
MEM_MB_DQS2_P(7)
MEM_MB_DQS2_N(7)
MEM_MB_DQS3_P(7)
MEM_MB_DQS3_N(7)
MEM_MB_DQS4_P(7)
MEM_MB_DQS4_N(7)
MEM_MB_DQS5_P(7)
MEM_MB_DQS5_N(7)
MEM_MB_DQS6_P(7)
MEM_MB_DQS6_N(7)
MEM_MB_DQS7_P(7)
MEM_MB_DQS7_N(7)

AA24
AA23
AD24
AE24
AA26
AA25
AD26
AE25
AC22
AD22
AE20
AF20
AF24
AF23
AC20
AD20
AD18
AE18
AC14
AD14
AF19
AC18
AF16
AF15
AF13
AC12
AB11

AE14
AF14
AF11
AD11

AB26
AE22
AC16
AD12

AC25
AC26
AF21
AF22
AE16
AD16
AF12
AE12

C11
A11
A14
B14
G11
E11
D12
A13
A15
A16
A19
A20
C14
D14
C18
D18
D20
A21
D24
C25
B20
C20
B24
C24
E23
E24
G25
G26
C26
D26
G23
G24

Y11

A12
B16
A22
E25

C12
B12
D16
C16
A24
A23
F26
E26

MB_DATA0
MB_DATA1
MB_DATA2
MB_DATA3
MB_DATA4
MB_DATA5
MB_DATA6
MB_DATA7
MB_DATA8
MB_DATA9
MB_DATA10
MB_DATA11
MB_DATA12
MB_DATA13
MB_DATA14
MB_DATA15
MB_DATA16
MB_DATA17
MB_DATA18
MB_DATA19
MB_DATA20
MB_DATA21
MB_DATA22
MB_DATA23
MB_DATA24
MB_DATA25
MB_DATA26
MB_DATA27
MB_DATA28
MB_DATA29
MB_DATA30
MB_DATA31
MB_DATA32
MB_DATA33
MB_DATA34
MB_DATA35
MB_DATA36
MB_DATA37
MB_DATA38
MB_DATA39
MB_DATA40
MB_DATA41
MB_DATA42
MB_DATA43
MB_DATA44
MB_DATA45
MB_DATA46
MB_DATA47
MB_DATA48
MB_DATA49
MB_DATA50
MB_DATA51
MB_DATA52
MB_DATA53
MB_DATA54
MB_DATA55
MB_DATA56
MB_DATA57
MB_DATA58
MB_DATA59
MB_DATA60
MB_DATA61
MB_DATA62
MB_DATA63

MB_DM0
MB_DM1
MB_DM2
MB_DM3
MB_DM4
MB_DM5
MB_DM6
MB_DM7

MB_DQS_H0
MB_DQS_L0
MB_DQS_H1
MB_DQS_L1
MB_DQS_H2
MB_DQS_L2
MB_DQS_H3
MB_DQS_L3
MB_DQS_H4
MB_DQS_L4
MB_DQS_H5
MB_DQS_L5
MB_DQS_H6
MB_DQS_L6
MB_DQS_H7
MB_DQS_L7

SOCKET_638_PIN

SOCKET_638_PIN

D

MEM:DATA

MEM:DATA

MA_DATA0
MA_DATA1
MA_DATA2
MA_DATA3
MA_DATA4
MA_DATA5
MA_DATA6
MA_DATA7
MA_DATA8

MA_DATA9
MA_DATA10
MA_DATA11
MA_DATA12
MA_DATA13
MA_DATA14
MA_DATA15
MA_DATA16
MA_DATA17
MA_DATA18
MA_DATA19
MA_DATA20
MA_DATA21
MA_DATA22
MA_DATA23
MA_DATA24
MA_DATA25
MA_DATA26
MA_DATA27
MA_DATA28
MA_DATA29
MA_DATA30
MA_DATA31
MA_DATA32
MA_DATA33
MA_DATA34
MA_DATA35
MA_DATA36
MA_DATA37
MA_DATA38
MA_DATA39
MA_DATA40
MA_DATA41
MA_DATA42
MA_DATA43
MA_DATA44
MA_DATA45
MA_DATA46
MA_DATA47
MA_DATA48
MA_DATA49
MA_DATA50
MA_DATA51
MA_DATA52
MA_DATA53
MA_DATA54
MA_DATA55
MA_DATA56
MA_DATA57
MA_DATA58
MA_DATA59
MA_DATA60
MA_DATA61
MA_DATA62
MA_DATA63

MA_DM0
MA_DM1
MA_DM2
MA_DM3
MA_DM4
MA_DM5
MA_DM6
MA_DM7

MA_DQS_H0

MA_DQS_L0

MA_DQS_H1

MA_DQS_L1

MA_DQS_H2

MA_DQS_L2

MA_DQS_H3

MA_DQS_L3

MA_DQS_H4

MA_DQS_L4

MA_DQS_H5

MA_DQS_L5

MA_DQS_H6

MA_DQS_L6

MA_DQS_H7

MA_DQS_L7

MEM_MA_DATA0

G12

MEM_MA_DATA1

F12

MEM_MA_DATA2

H14

MEM_MA_DATA3

G14

MEM_MA_DATA4

H11

MEM_MA_DATA5

H12

MEM_MA_DATA6

C13

MEM_MA_DATA7

E13

MEM_MA_DATA8

H15

MEM_MA_DATA9

E15

MEM_MA_DATA10

E17

MEM_MA_DATA11

H17

MEM_MA_DATA12

E14

MEM_MA_DATA13

F14

MEM_MA_DATA14

C17

MEM_MA_DATA15

G17

MEM_MA_DATA16

G18

MEM_MA_DATA17

C19

MEM_MA_DATA18

D22

MEM_MA_DATA19

E20

MEM_MA_DATA20

E18

MEM_MA_DATA21

F18

MEM_MA_DATA22

B22

MEM_MA_DATA23

C23

MEM_MA_DATA24

F20

MEM_MA_DATA25

F22

MEM_MA_DATA26

H24

MEM_MA_DATA27

J19

MEM_MA_DATA28

E21

MEM_MA_DATA29

E22

MEM_MA_DATA30

H20

MEM_MA_DATA31

H22

MEM_MA_DATA32

Y24

MEM_MA_DATA33

AB24

MEM_MA_DATA34

AB22

MEM_MA_DATA35

AA21

MEM_MA_DATA36

W22

MEM_MA_DATA37

W21

MEM_MA_DATA38

Y22

MEM_MA_DATA39

AA22

MEM_MA_DATA40

Y20

MEM_MA_DATA41

AA20

MEM_MA_DATA42

AA18

MEM_MA_DATA43

AB18

MEM_MA_DATA44

AB21

MEM_MA_DATA45

AD21

MEM_MA_DATA46

AD19

MEM_MA_DATA47

Y18

MEM_MA_DATA48

AD17

MEM_MA_DATA49

W16

MEM_MA_DATA50

W14

MEM_MA_DATA51

Y14

MEM_MA_DATA52

Y17

MEM_MA_DATA53

AB17

MEM_MA_DATA54

AB15

MEM_MA_DATA55

AD15

MEM_MA_DATA56

AB13

MEM_MA_DATA57

AD13

MEM_MA_DATA58

Y12

MEM_MA_DATA59

W11

MEM_MA_DATA60

AB14

MEM_MA_DATA61

AA14

MEM_MA_DATA62

AB12

MEM_MA_DATA63

AA12

MEM_MA_DM0

E12

MEM_MA_DM1

C15

MEM_MA_DM2

E19

MEM_MA_DM3

F24

MEM_MA_DM4

AC24

MEM_MA_DM5

Y19

MEM_MA_DM6

AB16

MEM_MA_DM7

Y13
G13

H13
G16
G15
C22
C21
G22
G21
AD23
AC23
AB19
AB20
Y15
W15
W12
W13

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

S1G2 DDRII MEMORY I/F 2/3

S1G2 DDRII MEMORY I/F 2/3

S1G2 DDRII MEMORY I/F 2/3

MEM_MA_DATA[0..63] (7)

MEM_MA_DM[0..7] (7)

MEM_MA_DQS0_P (7)
MEM_MA_DQS0_N (7)
MEM_MA_DQS1_P (7)
MEM_MA_DQS1_N (7)
MEM_MA_DQS2_P (7)
MEM_MA_DQS2_N (7)
MEM_MA_DQS3_P (7)
MEM_MA_DQS3_N (7)
MEM_MA_DQS4_P (7)
MEM_MA_DQS4_N (7)
MEM_MA_DQS5_P (7)
MEM_MA_DQS5_N (7)
MEM_MA_DQS6_P (7)
MEM_MA_DQS6_N (7)
MEM_MA_DQS7_P (7)
MEM_MA_DQS7_N (7)

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

PROJECT :

E

ZK3

ZK3

ZK3

05

5 43Monday, August 18, 2008

5 43Monday, August 18, 2008

5 43Monday, August 18, 2008

1A

1A

1A

5

U27E

U27E

G4

VDD0_1

H2

VDD0_2

J9

VDD0_3

J11

VDD0_4

J13

VDD0_5

D D

CPU VDDNB_CORE

3A

+1.8VSUS

2A

C C

B B

J15

VDD0_6

K6

VDD0_7

K10

VDD0_8

K12

VDD0_9

K14

VDD0_10

L4

VDD0_11

L7

VDD0_12

L9

VDD0_13

L11

VDD0_14

L13

VDD0_15

L15

VDD0_16

M2

VDD0_17

M6

VDD0_18

M8

VDD0_19

M10

VDD0_20

N7

VDD0_21

N9

VDD0_22

N11

VDD0_23

K16

VDDNB_1

M16

VDDNB_2

P16

VDDNB_3

T16

VDDNB_4

V16

VDDNB_5

H25

VDDIO1

J17

VDDIO2

K18

VDDIO3

K21

VDDIO4

K23

VDDIO5

K25

VDDIO6

L17

VDDIO7

M18

VDDIO8

M21

VDDIO9

M23

VDDIO10

M25

VDDIO11

N17

VDDIO12

SOCKET_638_PIN

SOCKET_638_PIN

VDD1_1
VDD1_2
VDD1_3
VDD1_4
VDD1_5
VDD1_6
VDD1_7
VDD1_8

VDD1_9
VDD1_10
VDD1_11
VDD1_12
VDD1_13
VDD1_14
VDD1_15
VDD1_16
VDD1_17
VDD1_18
VDD1_19
VDD1_20
VDD1_21
VDD1_22
VDD1_23
VDD1_24
VDD1_25
VDD1_26

VDDIO27
VDDIO26
VDDIO25
VDDIO24
VDDIO23
VDDIO22
VDDIO21
VDDIO20
VDDIO19
VDDIO18
VDDIO17
VDDIO16
VDDIO15
VDDIO14
VDDIO13

CPU_CORE1CPU_CORE0 CPU_CORE0

P8
P10
R4
R7
R9
R11
T2
T6
T8
T10
T12
T14
U7
U9
U11
U13
U15
V6
V8
V10
V12
V14
W4
Y2
AC4
AD2

Y25
V25
V23
V21
V18
U17
T25
T23
T21
T18
R17
P25
P23
P21
P18

+1.8VSUS

4

U27F

U27F

AA4

VSS1

AA11

VSS2

AA13

VSS3

AA15

VSS4

AA17

VSS5

AA19

VSS6

AB2

VSS7

AB7

VSS8

AB9

VSS9

AB23

VSS10

AB25

VSS11

AC11

VSS12

AC13

VSS13

AC15

VSS14

AC17

VSS15

AC19

VSS16

AC21

VSS17

AD6

VSS18

AD8

VSS19

AD25

VSS20

AE11

VSS21

AE13

VSS22

AE15

VSS23

AE17

VSS24

AE19

VSS25

AE21

VSS26

AE23

VSS27

B4

VSS28

B6

VSS29

B8

VSS30

B9

VSS31

B11

VSS32

B13

VSS33

B15

VSS34

B17

VSS35

B19

VSS36

B21

VSS37

B23

VSS38

B25

VSS39

D6

VSS40

D8

VSS41

D9

VSS42

D11

VSS43

D13

VSS44

D15

VSS45

D17

VSS46

D19

VSS47

D21

VSS48

D23

VSS49

D25

VSS50

E4

VSS51

F2

VSS52

F11

VSS53

F13

VSS54

F15

VSS55

F17

VSS56

F19

VSS57

F21

VSS58

F23

VSS59

F25

VSS60

H7

VSS61

H9

VSS62

H21

VSS63

H23

VSS64

J4

VSS65

SOCKET_638_PIN

SOCKET_638_PIN

VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98

VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129

3

J6
J8
J10
J12
J14
J16
J18
K2
K7
K9
K11
K13
K15
K17
L6
L8
L10
L12
L14
L16
L18
M7
M9
AC6
M17
N4
N8
N10
N16
N18
P2
P7
P9
P11
P17
R8
R10
R16
R18
T7
T9
T11
T13
T15
T17
U4
U6
U8
U10
U12
U14
U16
U18
V2
V7
V9
V11
V13
V15
V17
W6
Y21
Y23
N6

22U/6.3V_8

22U/6.3V_8

CPU_CORE1

CPU VDDNB_CORE

DECOUPLING BETWEEN PROCESSOR AND DIMMs
PLACE CLOSE TO PROCESSOR AS POSSIBLE

+1.8VSUS

+1.8VSUS

BOTTOM SIDE DECOUPLING

C181

C181

C148

C148

22U/6.3V_8

22U/6.3V_8

C151

C151

22U/6.3V_8

22U/6.3V_8

22U/6.3V_8

22U/6.3V_8

C220

C220

22U/6.3V_8

22U/6.3V_8

22U/6.3V_8

22U/6.3V_8

C272

C272

4.7U/6.3V_6

4.7U/6.3V_6

0.22U/6.3V_4

0.22U/6.3V_4

C264

C264

4.7U/6.3V_6

4.7U/6.3V_6

0.22U/6.3V_4

0.22U/6.3V_4

C179

C179

C221

C221

C260

C260

C261

C261

2

C167

C167

22U/6.3V_8

22U/6.3V_8

22U/6.3V_8

22U/6.3V_8

C219

C219

22U/6.3V_8

22U/6.3V_8

C263

C263

0.01U/16V_4

0.01U/16V_4

22U/6.3V_8

22U/6.3V_8

C150

C150

+1.8VSUS

C284

C284

4.7U/6.3V_6

4.7U/6.3V_6

C158

C158

C149

C149

22U/6.3V_8

22U/6.3V_8

22U/6.3V_8

22U/6.3V_8
C243

C243

4.7U/6.3V_6

4.7U/6.3V_6

C262

C262

0.01U/16V_4

0.01U/16V_4

C147

C147

0.22U/6.3V_4

0.22U/6.3V_4

0.22U/6.3V_4

0.22U/6.3V_4

C228

C228

22U/6.3V_8

22U/6.3V_8

C274

C274

C266

C266

180p/50V_4

180p/50V_4

C194

C194

0.22U/6.3V_4

0.22U/6.3V_4

C143

C143

0.01U/16V_4

0.01U/16V_4

C163

C163

0.01U/16V_4

0.01U/16V_4

C229

C229

0.22U/6.3V_4

0.22U/6.3V_4

C273

C273

C193

C193

180p/50V_4

180p/50V_4

C196

C196

180p/50V_4

180p/50V_4

C245

C245

0.22U/6.3V_4

0.22U/6.3V_4

C267

C267

0.22U/6.3V_4

0.22U/6.3V_4

1

C157

C157

0.01U/16V_4

0.01U/16V_4

C203

C203

180p/50V_4

180p/50V_4

06

C233

C233

180p/50V_4

180p/50V_4

PROCESSOR POWER AND GROUND

A A

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

PROJECT :

S1G2 PWR & GND 3/3

S1G2 PWR & GND 3/3

S1G2 PWR & GND 3/3

ZK3

ZK3

ZK3

1A

1A

6 43Monday, August 18, 2008

6 43Monday, August 18, 2008

6 43Monday, August 18, 2008

1

1A

5

+1.8VSUS +1.8VSUS

103

111

104

112

MEM_MA_ADD[0..15](5,8)

D D

MEM_MA_BANK[0..2](5,8)

MEM_MA_DQS0_P(5)
MEM_MA_DQS1_P(5)
MEM_MA_DQS2_P(5)
MEM_MA_DQS3_P(5)
MEM_MA_DQS4_P(5)
MEM_MA_DQS5_P(5)
MEM_MA_DQS6_P(5)

MEM_MA_CLK1_P(5)
MEM_MA_CLK1_N(5)
MEM_MA_CLK7_P(5)
MEM_MA_CLK7_N(5)

MEM_MA_CKE0(5,8)
MEM_MA_CKE1(5,8)

MEM_MA_RAS#(5,8)
MEM_MA_CAS#(5,8)
MEM_MA_WE#(5,8)
MEM_MA0_CS#0(5,8)
MEM_MA0_CS#1(5,8)

MEM_MA0_ODT0(5,8)
MEM_MA0_ODT1(5,8)

PDAT_SMB(3,14,20,21,23,27)
PCLK_SMB(3,14,20,21,23,27)

MEM_MA_DQS7_P(5)
MEM_MA_DQS0_N(5)

MEM_MA_DQS1_N(5)
MEM_MA_DQS2_N(5)
MEM_MA_DQS3_N(5)
MEM_MA_DQS4_N(5)
MEM_MA_DQS5_N(5)
MEM_MA_DQS6_N(5)
MEM_MA_DQS7_N(5)

+3V

C323

C323

2.2U/6.3V_6

2.2U/6.3V_6

C C

B B

A A

C322

C322

0.1U/10V_4

0.1U/10V_4

MEM_MA_ADD0
MEM_MA_ADD1
MEM_MA_ADD2
MEM_MA_ADD3
MEM_MA_ADD4
MEM_MA_ADD5
MEM_MA_ADD6
MEM_MA_ADD7
MEM_MA_ADD8

MEM_MA_ADD9
MEM_MA_ADD10
MEM_MA_ADD11
MEM_MA_ADD12
MEM_MA_ADD13
MEM_MA_ADD14
MEM_MA_ADD15

MEM_MA_BANK0
MEM_MA_BANK1
MEM_MA_BANK2

MEM_MA_DM0
MEM_MA_DM1
MEM_MA_DM2
MEM_MA_DM3
MEM_MA_DM4
MEM_MA_DM5
MEM_MA_DM6
MEM_MA_DM7

DIM1_SA0
DIM1_SA1

PDAT_SMB
PCLK_SMB

C339

C339

0.1U/10V_4

0.1U/10V_4

C320

C320

1000p/50V_4

1000p/50V_4

102

A0

101

A1

100

105

116

107
106

130
147
170
185

131
148
169
188

129
146
167
186

164
166

108
113
109
110
115

114
119

198
200

195
197

199

VDD081VDD182VDD287VDD388VDD495VDD596VDD6

A2

99

A3

98

A4

97

A5

94

A6

92

A7

93

A8

91

A9
A10

90

A11

89

A12
A13

86

A14

84

A15
BA0

BA1

85

BA2

10

DM0

26

DM1

52

DM2

67

DM3
DM4
DM5
DM6
DM7

13

DQS0

31

DQS1

51

DQS2

70

DQS3
DQS4
DQS5
DQS6
DQS7

11

DQS0

29

DQS1

49

DQS2

68

DQS3
DQS4
DQS5
DQS6
DQS7

30

CK0

32

CK0
CK1
CK1

79

CKE0

80

CKE1
RAS

CAS
WE
S0
S1

ODT0
ODT1

SA0
SA1

SDA
SCL

VDDspd

1

VREF

2

VSS0

3

VSS1

8

VSS2

9

VSS3

12

VSS4

15

VSS5

18

VSS6

21

VSS7

24

VSS8

27

VSS9

28

VSS10

33

VSS11

34

VSS12

39

VSS13

40

VSS14

41

VSS15

42

VSS16

47

VSS17

48

VSS18

53

VSS19

54

VSS20

SO-DIMM

SO-DIMM

59

117

VDD8

VDD7

VDD9

VDD10

VSS31

VSS30

VSS29

VSS2878VSS2777VSS2672VSS2571VSS2466VSS2365VSS2260VSS21

127

122

121

H=5.2

R571 10K/F_4R571 10K/F_4
R576 10K/F_4R576 10K/F_4

SMbus address A0

5

4

118

CN26

CN26

MEM_MA_DATA0

5

DQ0

MEM_MA_DATA1

7

DQ1

MEM_MA_DATA2

17

VDD11

DQ2

MEM_MA_DATA3

19

DQ3

MEM_MA_DATA4

4

DQ4

MEM_MA_DATA5

6

DQ5

MEM_MA_DATA6

14

DQ6

MEM_MA_DATA7

16

DQ7

MEM_MA_DATA8

23

DQ8

MEM_MA_DATA9

25

DQ9

MEM_MA_DATA10

35

DQ10

MEM_MA_DATA11

37

DQ11

MEM_MA_DATA12

20

DQ12

MEM_MA_DATA13

22

DQ13

MEM_MA_DATA14

36

DQ14

MEM_MA_DATA15

38

DQ15

MEM_MA_DATA16

43

DQ16

MEM_MA_DATA17

45

DQ17

MEM_MA_DATA18

55

DQ18

MEM_MA_DATA19

57

DQ19

MEM_MA_DATA20

44

DQ20

MEM_MA_DATA21

46

DQ21

MEM_MA_DATA22

56

DQ22

MEM_MA_DATA23

58

DQ23

MEM_MA_DATA24

61

DQ24

MEM_MA_DATA25

63

DQ25

MEM_MA_DATA26

73

DQ26

MEM_MA_DATA27

75

DQ27

MEM_MA_DATA28

62

DQ28

MEM_MA_DATA29

64

DQ29

MEM_MA_DATA30

74

DQ30

MEM_MA_DATA31

76

DQ31

MEM_MA_DATA36

123

DQ32

MEM_MA_DATA37

125

DQ33

MEM_MA_DATA35

135

DQ34

MEM_MA_DATA39

137

DQ35

MEM_MA_DATA38

124

DQ36

MEM_MA_DATA32

126

DQ37

MEM_MA_DATA33

134

DQ38

MEM_MA_DATA34

136

DQ39

MEM_MA_DATA40

141

DQ40

MEM_MA_DATA41

143

DQ41

MEM_MA_DATA46

151

DQ42

MEM_MA_DATA47

153

DQ43

MEM_MA_DATA44

140

DQ44

MEM_MA_DATA45

142

DQ45

MEM_MA_DATA42

152

DQ46

MEM_MA_DATA43

154

DQ47

MEM_MA_DATA52

157

DQ48

MEM_MA_DATA49

159

DQ49

MEM_MA_DATA54

173

DQ50

MEM_MA_DATA55

175

DQ51

MEM_MA_DATA53

158

DQ52

MEM_MA_DATA48

160

DQ53

MEM_MA_DATA51

174

DQ54

MEM_MA_DATA50

176

DQ55

MEM_MA_DATA61

179

DQ56

MEM_MA_DATA60

181

DQ57

MEM_MA_DATA63

189

DQ58

MEM_MA_DATA62

191

DQ59

MEM_MA_DATA56

180

DQ60

MEM_MA_DATA57

182

DQ61

MEM_MA_DATA58

192

DQ62

MEM_MA_DATA59

194

DQ63

MEMHOT_SODIMM#_1

50

NC1

MEM_MA_RESET#1

69

NC2

83

NC3

120

NC4

MEM_MA_NC5

163

NC/TEST

196

VSS56

193

VSS55

190

VSS54

187

VSS53

184

VSS52

183

VSS51

178

VSS50

177

VSS49

172

VSS48

171

VSS47

168

VSS46

165

VSS45

162

VSS44

161

VSS43

156

VSS42

155

VSS41

150

VSS40

149

VSS39

145

VSS38

144

VSS37

139

VSS36

138

VSS35

133

VSS34

VSS33

VSS32

132

128

DDR SO-DIMM SOCKET 1.8V

DDR SO-DIMM SOCKET 1.8V

DIM1_SA0
DIM1_SA1

4

MEM_MA_DATA[0..63] (5)

T148T148

T146T146

T147T147

+0.9VSMVREF_DIMM+0.9VSMVREF_DIMM

+0.9VSMVREF_DIMM+SMDDR_VREF

R261 *0_4R261 *0_4

Only for reserved

1/18 Change CN23 footprint from
DDR-C-1734071-200P to
DDR-C-1734071-200P-BD3A (SMT open
issue)

3

MEM_MB_ADD[0..15](5,8) MEM_MB_DATA[0..63] (5)

MEM_MB_BANK[0..2](5,8)

MEM_MB_DM[0..7](5)MEM_MA_DM[0..7](5)

MEM_MB_DQS0_P(5)
MEM_MB_DQS1_P(5)
MEM_MB_DQS2_P(5)
MEM_MB_DQS3_P(5)
MEM_MB_DQS4_P(5)
MEM_MB_DQS5_P(5)
MEM_MB_DQS6_P(5)
MEM_MB_DQS7_P(5)

MEM_MB_DQS0_N(5)
MEM_MB_DQS1_N(5)
MEM_MB_DQS2_N(5)
MEM_MB_DQS3_N(5)
MEM_MB_DQS4_N(5)
MEM_MB_DQS5_N(5)
MEM_MB_DQS6_N(5)
MEM_MB_DQS7_N(5)

MEM_MB_CLK1_P(5)
MEM_MB_CLK1_N(5)
MEM_MB_CLK7_P(5)
MEM_MB_CLK7_N(5)

MEM_MB_CKE0(5,8)
MEM_MB_CKE1(5,8)

MEM_MB_RAS#(5,8)
MEM_MB_CAS#(5,8)

MEM_MB_WE#(5,8)
MEM_MB0_CS#0(5,8)
MEM_MB0_CS#1(5,8)

MEM_MB0_ODT0(5,8)
MEM_MB0_ODT1(5,8)

+3V

C321

C324

C324

2.2U/6.3V_6

2.2U/6.3V_6

+0.9VSMVREF_DIMM

C321

0.1U/10V_4

0.1U/10V_4

+1.8VSUS

R263

R263
2K/F_4

2K/F_4

R262

R262
2K/F_4

2K/F_4

MEM_MB_ADD0
MEM_MB_ADD1
MEM_MB_ADD2
MEM_MB_ADD3
MEM_MB_ADD4
MEM_MB_ADD5
MEM_MB_ADD6
MEM_MB_ADD7
MEM_MB_ADD8

MEM_MB_ADD9
MEM_MB_ADD10
MEM_MB_ADD11
MEM_MB_ADD12
MEM_MB_ADD13
MEM_MB_ADD14
MEM_MB_ADD15

MEM_MB_BANK0
MEM_MB_BANK1
MEM_MB_BANK2

MEM_MB_DM0
MEM_MB_DM1
MEM_MB_DM2
MEM_MB_DM3
MEM_MB_DM4
MEM_MB_DM5
MEM_MB_DM6
MEM_MB_DM7

DIM2_SA0
DIM2_SA1

PDAT_SMB
PCLK_SMB

C340

C340

0.1U/10V_4

0.1U/10V_4

C319

C319
1000p/50V_4

1000p/50V_4

102

A0

101

A1

100

105

116

107
106

130
147
170
185

131
148
169
188

129
146
167
186

164
166

108
113
109
110
115

114
119

198
200

195
197

199

VDD081VDD182VDD287VDD388VDD495VDD596VDD6

A2

99

A3

98

A4

97

A5

94

A6

92

A7

93

A8

91

A9
A10

90

A11

89

A12
A13

86

A14

84

A15
BA0

BA1

85

BA2

10

DM0

26

DM1

52

DM2

67

DM3
DM4
DM5
DM6
DM7

13

DQS0

31

DQS1

51

DQS2

70

DQS3
DQS4
DQS5
DQS6
DQS7

11

DQS0

29

DQS1

49

DQS2

68

DQS3
DQS4
DQS5
DQS6
DQS7

30

CK0

32

CK0
CK1
CK1

79

CKE0

80

CKE1
RAS

CAS
WE
S0
S1

ODT0
ODT1

SA0
SA1

SDA
SCL

VDDspd

1

VREF

2

VSS0

3

VSS1

8

VSS2

o

9

VSS3

12

VSS4

15

VSS5

18

VSS6

21

VSS7

24

VSS8

27

VSS9

28

VSS10

33

VSS11

34

VSS12

39

VSS13

40

VSS14

41

VSS15

42

VSS16

47

VSS17

48

VSS18

53

VSS19

54

VSS20

59

DIM2_SA0
DIM2_SA1

SMbus address A2

3

2

103

111

104

112

117

118

VDD8

VDD7

VDD9

VDD10

VDD11

NC/TEST

SO-DIMM

SO-DIMM

VSS33

VSS32

VSS31

VSS30

VSS29

VSS2878VSS2777VSS2672VSS2571VSS2466VSS2365VSS2260VSS21

132

128

127

122

121

R260 10K/F_4R260 10K/F_4
R259 10K/F_4R259 10K/F_4

2

CN29

CN29

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8

DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

NC1

NC2

NC3

NC4

VSS56
VSS55
VSS54
VSS53
VSS52
VSS51
VSS50
VSS49
VSS48
VSS47
VSS46
VSS45
VSS44
VSS43
VSS42
VSS41
VSS40
VSS39
VSS38
VSS37
VSS36
VSS35
VSS34

H=9.2

MEM_MB_DATA4

5

MEM_MB_DATA5

7

MEM_MB_DATA2

17

MEM_MB_DATA3

19

MEM_MB_DATA0

4

MEM_MB_DATA1

6

MEM_MB_DATA6

14

MEM_MB_DATA7

16

MEM_MB_DATA13

23

MEM_MB_DATA12

25

MEM_MB_DATA11

35

MEM_MB_DATA10

37

MEM_MB_DATA8

20

MEM_MB_DATA9

22

MEM_MB_DATA14

36

MEM_MB_DATA15

38

MEM_MB_DATA16

43

MEM_MB_DATA17

45

MEM_MB_DATA18

55

MEM_MB_DATA19

57

MEM_MB_DATA20

44

MEM_MB_DATA21

46

MEM_MB_DATA22

56

MEM_MB_DATA23

58

MEM_MB_DATA24

61

MEM_MB_DATA25

63

MEM_MB_DATA26

73

MEM_MB_DATA27

75

MEM_MB_DATA28

62

MEM_MB_DATA29

64

MEM_MB_DATA30

74

MEM_MB_DATA31

76

MEM_MB_DATA37

123

MEM_MB_DATA36

125

MEM_MB_DATA34

135

MEM_MB_DATA35

137

MEM_MB_DATA33

124

MEM_MB_DATA32

126

MEM_MB_DATA38

134

MEM_MB_DATA39

136

MEM_MB_DATA40

141

MEM_MB_DATA45

143

MEM_MB_DATA47

151

MEM_MB_DATA46

153

MEM_MB_DATA44

140

MEM_MB_DATA41

142

MEM_MB_DATA43

152

MEM_MB_DATA42

154

MEM_MB_DATA52

157

MEM_MB_DATA53

159

MEM_MB_DATA50

173

MEM_MB_DATA51

175

MEM_MB_DATA48

158

MEM_MB_DATA49

160

MEM_MB_DATA54

174

MEM_MB_DATA55

176

MEM_MB_DATA56

179

MEM_MB_DATA60

181

MEM_MB_DATA58

189

MEM_MB_DATA59

191

MEM_MB_DATA61

180

MEM_MB_DATA57

182

MEM_MB_DATA62

192

MEM_MB_DATA63

194

MEMHOT_SODIMM#_2

50

MEM_MB_RESET#2

69
83
120

MEM_MB_NC5

163

196
193
190
187
184
183
178
177
172
171
168
165
162
161
156
155
150
149
145
144
139
138
133

+3V

T87T87

T141T141

T143T143

DDR SO-DIMM SOCKET 1.8V

DDR SO-DIMM SOCKET 1.8V

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

PROJECT :

DDR2 SODIMMS: A/B CHANNEL

DDR2 SODIMMS: A/B CHANNEL

DDR2 SODIMMS: A/B CHANNEL

1

07

ZK3

ZK3

ZK3

1A

1A

7 43Monday, August 18, 2008

7 43Monday, August 18, 2008

7 43Monday, August 18, 2008

1

1A

5

4

3

2

1

4
2
4
2
4
2
4
2
2
4
4
2
2
4
4
2

2
4
2
4

4
2

4
2

2
4

4
2

MEM_MA_ADD[0..15]
MEM_MA_BANK[0..2]

+SMDDR_VTERM

3
1
3
1
3
1
3
1
1
3
3
1
1
3
3
1

1
3
1
3

3
1

3
1

1
3

3
1

C288 0.1U/10V_4C288 0.1U/10V_4
C309 0.1U/10V_4C309 0.1U/10V_4
C315 0.1U/10V_4C315 0.1U/10V_4
C338 0.1U/10V_4C338 0.1U/10V_4
C313 0.1U/10V_4C313 0.1U/10V_4
C331 0.1U/10V_4C331 0.1U/10V_4
C317 0.1U/10V_4C317 0.1U/10V_4
C348 0.1U/10V_4C348 0.1U/10V_4

C286 0.1U/10V_4C286 0.1U/10V_4
C327 0.1U/10V_4C327 0.1U/10V_4
C311 0.1U/10V_4C311 0.1U/10V_4
C347 0.1U/10V_4C347 0.1U/10V_4

C356 0.1U/10V_4C356 0.1U/10V_4
C349 0.1U/10V_4C349 0.1U/10V_4
C289 0.1U/10V_4C289 0.1U/10V_4
C310 0.1U/10V_4C310 0.1U/10V_4

+1.8VSUS

+1.8VSUS

+1.8VSUS

+1.8VSUS

+1.8VSUS

+1.8VSUS

+1.8VSUS

+1.8VSUS

MEM_MB_ADD[0..15](5,7)
MEM_MB_BANK[0..2](5,7)

MEM_MB_CKE0(5,7)

MEM_MB_WE#(5,7)
MEM_MB_CAS#(5,7)
MEM_MB0_ODT1(5,7)
MEM_MB0_CS#1(5,7)
MEM_MB_CKE1(5,7)

MEM_MB0_CS#0(5,7)MEM_MA0_CS#0(5,7)
MEM_MB_RAS#(5,7)

MEM_MB0_ODT0(5,7)

MEM_MB_CKE0
MEM_MB_BANK2
MEM_MB_ADD12
MEM_MB_ADD9
MEM_MB_ADD8
MEM_MB_ADD5
MEM_MB_ADD3
MEM_MB_ADD1
MEM_MB_ADD10
MEM_MB_BANK0
MEM_MB_WE#
MEM_MB_CAS#
MEM_MB0_ODT1
MEM_MB0_CS#1
MEM_MB_CKE1
MEM_MB_ADD15

MEM_MB_ADD11
MEM_MB_ADD14

MEM_MB_ADD6
MEM_MB_ADD7

MEM_MB_ADD2
MEM_MB_ADD4

MEM_MB_BANK1
MEM_MB_ADD0

MEM_MB0_CS#0
MEM_MB_RAS#MEM_MA_RAS#

MEM_MB0_ODT0
MEM_MB_ADD13

+1.8VSUS+1.8VSUS

MEM_MA_ADD[0..15](5,7)
MEM_MA_BANK[0..2](5,7)

MEM_MA_BANK2
MEM_MA_ADD12

D D

C C

MEM_MA_CKE0(5,7)

MEM_MA_WE#(5,7)
MEM_MA_CAS#(5,7)
MEM_MA0_ODT1(5,7)
MEM_MA0_CS#1(5,7)

MEM_MA_CKE1(5,7)

MEM_MA_RAS#(5,7)

MEM_MA0_ODT0(5,7)

MEM_MA_CKE0
MEM_MA_ADD9
MEM_MA_ADD5
MEM_MA_ADD8
MEM_MA_ADD3
MEM_MA_ADD1
MEM_MA_BANK0
MEM_MA_ADD10
MEM_MA_WE#
MEM_MA_CAS#
MEM_MA0_ODT1
MEM_MA0_CS#1
MEM_MA_ADD15
MEM_MA_CKE1

MEM_MA_ADD14
MEM_MA_ADD6
MEM_MA_ADD11
MEM_MA_ADD7

MEM_MA_ADD2
MEM_MA_ADD4

MEM_MA_BANK1
MEM_MA_ADD0

MEM_MA0_CS#0

MEM_MA_ADD13
MEM_MA0_ODT0

RP29 47_4P2R_4RP29 47_4P2R_4
RP30 47_4P2R_4RP30 47_4P2R_4
RP31 47_4P2R_4RP31 47_4P2R_4
RP32 47_4P2R_4RP32 47_4P2R_4
RP33 47_4P2R_4RP33 47_4P2R_4
RP27 47_4P2R_4RP27 47_4P2R_4
RP28 47_4P2R_4RP28 47_4P2R_4
RP34 47_4P2R_4RP34 47_4P2R_4

RP35 47_4P2R_4RP35 47_4P2R_4
RP36 47_4P2R_4RP36 47_4P2R_4

RP37 47_4P2R_4RP37 47_4P2R_4

RP40 47_4P2R_4RP40 47_4P2R_4

RP38 47_4P2R_4RP38 47_4P2R_4

RP39 47_4P2R_4RP39 47_4P2R_4

PLACE CLOSE TO PROCESSOR
WITHIN 1.5 INCH

MEM_MB_ADD[0..15]
MEM_MB_BANK[0..2]

RP12 47_4P2R_4RP12 47_4P2R_4

4

3

2

RP13 47_4P2R_4RP13 47_4P2R_4
RP14 47_4P2R_4RP14 47_4P2R_4
RP15 47_4P2R_4RP15 47_4P2R_4
RP16 47_4P2R_4RP16 47_4P2R_4
RP17 47_4P2R_4RP17 47_4P2R_4
RP18 47_4P2R_4RP18 47_4P2R_4
RP20 47_4P2R_4RP20 47_4P2R_4

RP21 47_4P2R_4RP21 47_4P2R_4

RP22 47_4P2R_4RP22 47_4P2R_4

RP23 47_4P2R_4RP23 47_4P2R_4

RP24 47_4P2R_4RP24 47_4P2R_4

RP25 47_4P2R_4RP25 47_4P2R_4

RP26 47_4P2R_4RP26 47_4P2R_4

PLACE CLOSE TO PROCESSOR
WITHIN 1.5 INCH

1

4

3

2

1

4

3

2

1

4

3

2

1

2

1

4

3

2

1

4

3

4

3

2

1

2

1

4

3

4

3

2

1

4

3

2

1

4

3

2

1

2

1

4

3

2

1

4

3

4

3

2

1

+SMDDR_VTERM

C316 0.1U/10V_4C316 0.1U/10V_4
C328 0.1U/10V_4C328 0.1U/10V_4
C314 0.1U/10V_4C314 0.1U/10V_4
C293 0.1U/10V_4C293 0.1U/10V_4
C312 0.1U/10V_4C312 0.1U/10V_4
C292 0.1U/10V_4C292 0.1U/10V_4
C357 0.1U/10V_4C357 0.1U/10V_4
C290 0.1U/10V_4C290 0.1U/10V_4
C355 0.1U/10V_4C355 0.1U/10V_4
C291 0.1U/10V_4C291 0.1U/10V_4
C354 0.1U/10V_4C354 0.1U/10V_4
C307 0.1U/10V_4C307 0.1U/10V_4
C318 0.1U/10V_4C318 0.1U/10V_4

C346 0.1U/10V_4C346 0.1U/10V_4
C287 0.1U/10V_4C287 0.1U/10V_4
C308 0.1U/10V_4C308 0.1U/10V_4

08

+1.8VSUS

+1.8VSUS

+1.8VSUS

+1.8VSUS

+1.8VSUS

+1.8VSUS

+1.8VSUS

+1.8VSUS

C285

C278

C278

0.1U/10V_4

0.1U/10V_4

C282

C282

0.1U/10V_4

0.1U/10V_4

C276

C276

0.1U/10V_4

0.1U/10V_4

C281

C281

0.1U/10V_4

0.1U/10V_4

C283

C283

0.1U/10V_4

0.1U/10V_4

C285

0.1U/10V_4

0.1U/10V_4

PLACE CLOSE TO SOCKET( PER EMI/EMC)

B B

A A

5

4

3

C294

C294

0.1U/10V_4

0.1U/10V_4

C326

C326

0.1U/10V_4

0.1U/10V_4

C352

C352

0.1U/10V_4

0.1U/10V_4

PLACE CLOSE TO SOCKET( PER EMI/EMC)

2

C330

C353

C353

0.1U/10V_4

0.1U/10V_4

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

C330

0.1U/10V_4

0.1U/10V_4

DDR2 SODIMMS TERMINATIONS

DDR2 SODIMMS TERMINATIONS

DDR2 SODIMMS TERMINATIONS

C275

C275

0.1U/10V_4

0.1U/10V_4

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

PROJECT :

ZK3

ZK3

ZK3

8 43Monday, August 18, 2008

8 43Monday, August 18, 2008

8 43Monday, August 18, 2008

1

1A

1A

1A

5

HT_CPU_NB_CAD_H0
HT_CPU_NB_CAD_L0
HT_CPU_NB_CAD_H1
HT_CPU_NB_CAD_L1
HT_CPU_NB_CAD_H2
HT_CPU_NB_CAD_L2
HT_CPU_NB_CAD_H3
HT_CPU_NB_CAD_L3
HT_CPU_NB_CAD_H4
HT_CPU_NB_CAD_L4
HT_CPU_NB_CAD_H5
HT_CPU_NB_CAD_L5

D D

C C

HT_CPU_NB_CAD_H6
HT_CPU_NB_CAD_L6
HT_CPU_NB_CAD_H7
HT_CPU_NB_CAD_L7

HT_CPU_NB_CAD_H8
HT_CPU_NB_CAD_L8
HT_CPU_NB_CAD_H9
HT_CPU_NB_CAD_L9
HT_CPU_NB_CAD_H10
HT_CPU_NB_CAD_L10
HT_CPU_NB_CAD_H11
HT_CPU_NB_CAD_L11
HT_CPU_NB_CAD_H12
HT_CPU_NB_CAD_L12
HT_CPU_NB_CAD_H13
HT_CPU_NB_CAD_L13
HT_CPU_NB_CAD_H14
HT_CPU_NB_CAD_L14
HT_CPU_NB_CAD_H15
HT_CPU_NB_CAD_L15

HT_CPU_NB_CLK_H0
HT_CPU_NB_CLK_L0
HT_CPU_NB_CLK_H1
HT_CPU_NB_CLK_L1

HT_CPU_NB_CTL_H0
HT_CPU_NB_CTL_L0
HT_CPU_NB_CTL_H1
HT_CPU_NB_CTL_L1

HT_RXCALP
HT_RXCALN

4

Y25
Y24
V22
V23
V25

V24
U24
U25

T25

T24

P22

P23

P25

P24
N24
N25

AC24
AC25
AB25
AB24
AA24
AA25

Y22

Y23

W21
W20

V21

V20
U20
U21
U19
U18

T22

T23

AB23
AA22

M22
M23
R21
R20

C23

A24

U26A

U26A

HT_RXCAD0P
HT_RXCAD0N
HT_RXCAD1P
HT_RXCAD1N
HT_RXCAD2P
HT_RXCAD2N
HT_RXCAD3P
HT_RXCAD3N
HT_RXCAD4P
HT_RXCAD4N
HT_RXCAD5P
HT_RXCAD5N
HT_RXCAD6P
HT_RXCAD6N
HT_RXCAD7P
HT_RXCAD7N

HT_RXCAD8P
HT_RXCAD8N
HT_RXCAD9P
HT_RXCAD9N
HT_RXCAD10P
HT_RXCAD10N
HT_RXCAD11P
HT_RXCAD11N
HT_RXCAD12P
HT_RXCAD12N
HT_RXCAD13P
HT_RXCAD13N
HT_RXCAD14P
HT_RXCAD14N
HT_RXCAD15P
HT_RXCAD15N

HT_RXCLK0P
HT_RXCLK0N
HT_RXCLK1P
HT_RXCLK1N

HT_RXCTL0P
HT_RXCTL0N
HT_RXCTL1P
HT_RXCTL1N

HT_RXCALP
HT_RXCALN

RS780(RX780)

RS780(RX780)

PART 1 OF 6

PART 1 OF 6

HYPER TRANSPORT CPU I/F

HYPER TRANSPORT CPU I/F

HT_TXCAD0P
HT_TXCAD0N
HT_TXCAD1P
HT_TXCAD1N
HT_TXCAD2P
HT_TXCAD2N
HT_TXCAD3P
HT_TXCAD3N
HT_TXCAD4P
HT_TXCAD4N
HT_TXCAD5P
HT_TXCAD5N
HT_TXCAD6P
HT_TXCAD6N
HT_TXCAD7P
HT_TXCAD7N

HT_TXCAD8P
HT_TXCAD8N
HT_TXCAD9P

HT_TXCAD9N
HT_TXCAD10P
HT_TXCAD10N
HT_TXCAD11P
HT_TXCAD11N
HT_TXCAD12P
HT_TXCAD12N
HT_TXCAD13P
HT_TXCAD13N
HT_TXCAD14P
HT_TXCAD14N
HT_TXCAD15P
HT_TXCAD15N

HT_TXCLK0P
HT_TXCLK0N
HT_TXCLK1P
HT_TXCLK1N

HT_TXCTL0P
HT_TXCTL0N
HT_TXCTL1P
HT_TXCTL1N

HT_TXCALP
HT_TXCALN

HT_NB_CPU_CAD_H0

D24

HT_NB_CPU_CAD_L0

D25

HT_NB_CPU_CAD_H1

E24

HT_NB_CPU_CAD_L1

E25

HT_NB_CPU_CAD_H2

F24

HT_NB_CPU_CAD_L2

F25

HT_NB_CPU_CAD_H3

F23

HT_NB_CPU_CAD_L3

F22

HT_NB_CPU_CAD_H4

H23

HT_NB_CPU_CAD_L4

H22

HT_NB_CPU_CAD_H5

J25

HT_NB_CPU_CAD_L5

J24

HT_NB_CPU_CAD_H6

K24

HT_NB_CPU_CAD_L6

K25

HT_NB_CPU_CAD_H7

K23

HT_NB_CPU_CAD_L7

K22

HT_NB_CPU_CAD_H8

F21

HT_NB_CPU_CAD_L8

G21

HT_NB_CPU_CAD_H9

G20

HT_NB_CPU_CAD_L9

H21

HT_NB_CPU_CAD_H10

J20

HT_NB_CPU_CAD_L10

J21

HT_NB_CPU_CAD_H11

J18

HT_NB_CPU_CAD_L11

K17

HT_NB_CPU_CAD_H12

L19

HT_NB_CPU_CAD_L12

J19

HT_NB_CPU_CAD_H13

M19

HT_NB_CPU_CAD_L13

L18

HT_NB_CPU_CAD_H14

M21

HT_NB_CPU_CAD_L14

P21

HT_NB_CPU_CAD_H15

P18

HT_NB_CPU_CAD_L15

M18

HT_NB_CPU_CLK_H0

H24

HT_NB_CPU_CLK_L0

H25

HT_NB_CPU_CLK_H1

L21

HT_NB_CPU_CLK_L1

L20

HT_NB_CPU_CTL_H0

M24

HT_NB_CPU_CTL_L0

M25

HT_NB_CPU_CTL_H1

P19

HT_NB_CPU_CTL_L1

R18

HT_TXCALP

B24

HT_TXCALN

B25

3

HT_CPU_NB_CAD_H[15..0]
HT_CPU_NB_CAD_L[15..0]
HT_CPU_NB_CLK_H[1..0]
HT_CPU_NB_CLK_L[1..0]
HT_CPU_NB_CTL_H[1..0]
HT_CPU_NB_CTL_L[1..0]
HT_NB_CPU_CAD_H[15..0]
HT_NB_CPU_CAD_L[15..0]
HT_NB_CPU_CLK_H[1..0]
HT_NB_CPU_CLK_L[1..0]
HT_NB_CPU_CTL_H[1..0]
HT_NB_CPU_CTL_L[1..0]

2

HT_CPU_NB_CAD_H[15..0] (4)

HT_CPU_NB_CAD_L[15..0] (4)

HT_CPU_NB_CLK_H[1..0] (4)

HT_CPU_NB_CLK_L[1..0] (4)

HT_CPU_NB_CTL_H[1..0] (4)

HT_CPU_NB_CTL_L[1..0] (4)

HT_NB_CPU_CAD_H[15..0] (4)

HT_NB_CPU_CAD_L[15..0] (4)

HT_NB_CPU_CLK_H[1..0] (4)

HT_NB_CPU_CLK_L[1..0] (4)

HT_NB_CPU_CTL_H[1..0] (4)

HT_NB_CPU_CTL_L[1..0] (4)

11/4 modify

1

08

signals RS780 RX780

HT_TXCALP

HT_TXCALN

HT_RXCALP

HT_RXCALN

R641R655

R461 301/F_4R461 301/F_4R460 301/F_4R460 301/F_4

R641
300 ohm 1%

R655
300 ohm 1%

R641

1.21k ohm 1%

R655

1.21k ohm 1%

RES CHIP 1.21K 1/16W +-1%(0402)
P/N : CS21212FB18

RES CHIP 300 1/16W +-1%(0402)
P/N : CS13002FB00

A12 version
RS780M AJ067400T05 100-CK2612(216-0674008-00)
RS780MC AJ067400T06 100-CK2613(216-0674010-00)
RX781 AJ067400T10 100-CK2642(215-0674024)
SB700 AJA12FG0T18 100-CK2614(218S7EALA12FG)

U26D

4

AB12
AE16

V11
AE15
AA12
AB16
AB14
AD14
AD13
AD15
AC16
AE13
AC14

AD16
AE17
AD17

W12

AD18
AB13
AB18

V14

V15

W14

AE12
AD12

Y14

Y12

U26D

MEM_A0(NC)
MEM_A1(NC)
MEM_A2(NC)
MEM_A3(NC)
MEM_A4(NC)
MEM_A5(NC)
MEM_A6(NC)
MEM_A7(NC)
MEM_A8(NC)
MEM_A9(NC)
MEM_A10(NC)
MEM_A11(NC)
MEM_A12(NC)
MEM_A13(NC)

MEM_BA0(NC)
MEM_BA1(NC)
MEM_BA2(NC)

MEM_RASb(NC)
MEM_CASb(NC)
MEM_WEb(NC)
MEM_CSb(NC)
MEM_CKE(NC)
MEM_ODT(NC)

MEM_CKP(NC)
MEM_CKN(NC)

MEM_COMPP(NC)
MEM_COMPN(NC)

RS780(RX780)

RS780(RX780)

A13 version
RS780M AJ067400T18 100-CK2699(216-0674022)
RS780MC AJ067400T20 100-CK2704(216-0674024)
RX781 AJ067400T21 100-CK2706(215-0674034)
A12 version
SB700 AJA12FG0T18

B B

A A

5

This block is for UMA RS780 only , RX780 can
remove all component

PAR 4 OF 6

PAR 4 OF 6

MEM_DQ0/DVO_VSYNC(NC)

MEM_DQ1/DVO_HSYNC(NC)

MEM_DQ2/DVO_DE(NC)
MEM_DQ3/DVO_D0(NC)

MEM_DQ4(NC)
MEM_DQ5/DVO_D1(NC)
MEM_DQ6/DVO_D2(NC)
MEM_DQ7/DVO_D4(NC)
MEM_DQ8/DVO_D3(NC)
MEM_DQ9/DVO_D5(NC)

MEM_DQ10/DVO_D6(NC)
MEM_DQ11/DVO_D7(NC)

MEM_DQ12(NC)

MEM_DQ13/DVO_D9(NC)
MEM_DQ14/DVO_D10(NC)
MEM_DQ15/DVO_D11(NC)

MEM_DQS0P/DVO_IDCKP(NC)
MEM_DQS0N/DVO_IDCKN(NC)

MEM_DQS1P(NC)
MEM_DQS1N(NC)

MEM_DM0(NC)

MEM_DM1/DVO_D8(NC)

SBD_MEM/DVO_I/F

SBD_MEM/DVO_I/F

IOPLLVDD18(NC)

IOPLLVDD(NC)
IOPLLVSS(NC)

MEM_VREF(NC)

AA18
AA20
AA19
Y19
V17
AA17
AA15
Y15
AC20
AD19
AE22
AC18
AB20
AD22
AC22
AD21

Y17
W18
AD20
AE21

W17
AE19

+1.8_IOPLLVDD18_NB

AE23

+1.1V_IOPLLVDD

AE24
AD23
AE18

3

R371 *0_6R371 *0_6
R370 *0_6R370 *0_6

without Side-Port NU 4/8

IOPLLVDD- memory PLL
not applicable to RX780

2/1 R480,R479 no stuff when RS780M without
side port / RX781

+1.8V

+1.1V_NB

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

PROJECT :

RS740/RS780-HT LINK I/F 1/5

RS740/RS780-HT LINK I/F 1/5

RS740/RS780-HT LINK I/F 1/5

ZK3

ZK3

ZK3

9 43Monday, August 18, 2008

9 43Monday, August 18, 2008

9 43Monday, August 18, 2008

1

1A

1A

1A

5

U26B
PEG_RXP15
PEG_RXN15
PEG_RXP14
PEG_RXN14
PEG_RXP13

PEG_RXP12
PEG_RXN12
PEG_RXP11
PEG_RXN11
PEG_RXP10

D D

C C

GLAN_RXN(21)

PCIE_SB_NB_RX0P(13)
PCIE_SB_NB_RX0N(13)
PCIE_SB_NB_RX1P(13)
PCIE_SB_NB_RX1N(13)
PCIE_SB_NB_RX2P(13)
PCIE_SB_NB_RX2N(13)
PCIE_SB_NB_RX3P(13)
PCIE_SB_NB_RX3N(13)

PEG_RXN10
PEG_RXP9
PEG_RXN9
PEG_RXP8
PEG_RXN8
PEG_RXP7
PEG_RXN7
PEG_RXP6
PEG_RXN6
PEG_RXP5
PEG_RXN5
PEG_RXP4
PEG_RXN4
PEG_RXP3
PEG_RXN3
PEG_RXP2
PEG_RXN2
PEG_RXP1
PEG_RXN1
PEG_RXP0
PEG_RXN0

T9T9

T10T10
PCIE_RXP1(27)
PCIE_RXN1(27)
PCIE_RXP2(23)
PCIE_RXN2(23)
PCIE_RXP3(23)
PCIE_RXN3(23)

PCIE_RXP1
PCIE_RXN1
PCIE_RXP2
PCIE_RXN2
PCIE_RXP3
PCIE_RXN3
GLAN_RXP
GLAN_RXN

U26B

D4

GFX_RX0P

C4

GFX_RX0N

A3

GFX_RX1P

B3

GFX_RX1N

C2

GFX_RX2P

C1

GFX_RX2N

E5

GFX_RX3P

F5

GFX_RX3N

G5

GFX_RX4P

G6

GFX_RX4N

H5

GFX_RX5P

H6

GFX_RX5N

J6

GFX_RX6P

J5

GFX_RX6N

J7

GFX_RX7P

J8

GFX_RX7N

L5

GFX_RX8P

L6

GFX_RX8N

M8

GFX_RX9P

L8

GFX_RX9N

P7

GFX_RX10P

M7

GFX_RX10N

P5

GFX_RX11P

M5

GFX_RX11N

R8

GFX_RX12P

P8

GFX_RX12N

R6

GFX_RX13P

R5

GFX_RX13N

P4

GFX_RX14P

P3

GFX_RX14N

T4

GFX_RX15P

T3

GFX_RX15N

AE3

GPP_RX0P

AD4

GPP_RX0N

AE2

GPP_RX1P

AD3

GPP_RX1N

AD1

GPP_RX2P

AD2

GPP_RX2N

V5

GPP_RX3P

W6

GPP_RX3N

U5

GPP_RX4P

U6

GPP_RX4N

U8

GPP_RX5P

U7

GPP_RX5N

AA8

SB_RX0P

Y8

SB_RX0N

AA7

SB_RX1P

Y7

SB_RX1N

AA5

SB_RX2P

AA6

SB_RX2N

W5

SB_RX3P

Y5

SB_RX3N

RS780(RX780)

RS780(RX780)

PART 2 OF 6

PART 2 OF 6

PCIE I/F GFX

PCIE I/F GFX

PCIE I/F GPP

PCIE I/F GPP

PCIE I/F SB

PCIE I/F SB

PCE_CALRP(PCE_BCALRP)
PCE_CALRN(PCE_BCALRN)

4

GFX_TX0P
GFX_TX0N
GFX_TX1P
GFX_TX1N
GFX_TX2P
GFX_TX2N
GFX_TX3P
GFX_TX3N
GFX_TX4P
GFX_TX4N
GFX_TX5P
GFX_TX5N
GFX_TX6P
GFX_TX6N
GFX_TX7P
GFX_TX7N
GFX_TX8P
GFX_TX8N
GFX_TX9P

GFX_TX9N
GFX_TX10P
GFX_TX10N
GFX_TX11P
GFX_TX11N
GFX_TX12P
GFX_TX12N
GFX_TX13P
GFX_TX13N
GFX_TX14P
GFX_TX14N
GFX_TX15P
GFX_TX15N

GPP_TX0P
GPP_TX0N
GPP_TX1P
GPP_TX1N
GPP_TX2P
GPP_TX2N
GPP_TX3P
GPP_TX3N
GPP_TX4P
GPP_TX4N
GPP_TX5P
GPP_TX5N

SB_TX0P
SB_TX0N
SB_TX1P
SB_TX1N
SB_TX2P
SB_TX2N
SB_TX3P
SB_TX3N

A5
B5
A4
B4
C3
B2
D1
D2
E2
E1
F4
F3
F1
F2
H4
H3
H1
H2
J2
J1
K4
K3
K1
K2
M4
M3
M1
M2
N2
N1
P1
P2

AC1
AC2
AB4
AB3
AA2
AA1
Y1
Y2
Y4
Y3
V1
V2

AD7
AE7
AE6
AD6
AB6
AC6
AD5
AE5

AC8
AB8

C_PEG_TXP15
C_PEG_TXN15
C_PEG_TXP14
C_PEG_TXN14
C_PEG_TXP13
C_PEG_TXN13PEG_RXN13
C_PEG_TXP12
C_PEG_TXN12
C_PEG_TXP11
C_PEG_TXN11
C_PEG_TXP10
C_PEG_TXN10
C_PEG_TXP9
C_PEG_TXN9
C_PEG_TXP8
C_PEG_TXN8
C_PEG_TXP7
C_PEG_TXN7
C_PEG_TXP6
C_PEG_TXN6
C_PEG_TXP5
C_PEG_TXN5
C_PEG_TXP4
C_PEG_TXN4
C_PEG_TXP3
C_PEG_TXN3
C_PEG_TXP2
C_PEG_TXN2
C_PEG_TXP1
C_PEG_TXN1
C_PEG_TXP0
C_PEG_TXN0

PCIE_TXP1_C
PCIE_TXN1_C
PCIE_TXP2_C
PCIE_TXN2_C
PCIE_TXP3_C
PCIE_TXN3_C
PCIE_TXP4_C
PCIE_TXN4_C

A_TX0P_CA_TX0P_C
A_TX0N_CA_TX0N_C
A_TX1P_CA_TX1P_C
A_TX1N_CA_TX1N_C
A_TX2P_C
A_TX2N_C
A_TX3P_C
A_TX3N_C

NB_PCIECALRP
NB_PCIECALRN

C565 EV@0.1U/10V_4C565 EV@0.1U/10V_4
C568 EV@0.1U/10V_4C568 EV@0.1U/10V_4
C561 EV@0.1U/10V_4C561 EV@0.1U/10V_4
C563 EV@0.1U/10V_4C563 EV@0.1U/10V_4
C556 EV@0.1U/10V_4C556 EV@0.1U/10V_4
C560 EV@0.1U/10V_4C560 EV@0.1U/10V_4
C543 EV@0.1U/10V_4C543 EV@0.1U/10V_4
C549 EV@0.1U/10V_4C549 EV@0.1U/10V_4
C538 EV@0.1U/10V_4C538 EV@0.1U/10V_4
C542 EV@0.1U/10V_4C542 EV@0.1U/10V_4
C535 EV@0.1U/10V_4C535 EV@0.1U/10V_4
C537 EV@0.1U/10V_4C537 EV@0.1U/10V_4
C525 EV@0.1U/10V_4C525 EV@0.1U/10V_4
C527 EV@0.1U/10V_4C527 EV@0.1U/10V_4
C518 EV@0.1U/10V_4C518 EV@0.1U/10V_4
C523 EV@0.1U/10V_4C523 EV@0.1U/10V_4
C512 EV@0.1U/10V_4C512 EV@0.1U/10V_4
C516 EV@0.1U/10V_4C516 EV@0.1U/10V_4
C506 EV@0.1U/10V_4C506 EV@0.1U/10V_4
C509 EV@0.1U/10V_4C509 EV@0.1U/10V_4
C496 EV@0.1U/10V_4C496 EV@0.1U/10V_4
C502 EV@0.1U/10V_4C502 EV@0.1U/10V_4
C492 EV@0.1U/10V_4C492 EV@0.1U/10V_4
C494 EV@0.1U/10V_4C494 EV@0.1U/10V_4
C490 EV@0.1U/10V_4C490 EV@0.1U/10V_4
C491 EV@0.1U/10V_4C491 EV@0.1U/10V_4
C486 EV@0.1U/10V_4C486 EV@0.1U/10V_4
C488 EV@0.1U/10V_4C488 EV@0.1U/10V_4
C483 EV@0.1U/10V_4C483 EV@0.1U/10V_4
C485 EV@0.1U/10V_4C485 EV@0.1U/10V_4
C476 EV@0.1U/10V_4C476 EV@0.1U/10V_4
C477 EV@0.1U/10V_4C477 EV@0.1U/10V_4

C112 0.1U/10V_4C112 0.1U/10V_4
C115 0.1U/10V_4C115 0.1U/10V_4
C104 0.1U/10V_4C104 0.1U/10V_4
C100 0.1U/10V_4C100 0.1U/10V_4
C106 0.1U/10V_4C106 0.1U/10V_4
C107 0.1U/10V_4C107 0.1U/10V_4
C124 0.1U/10V_4C124 0.1U/10V_4
C120 0.1U/10V_4C120 0.1U/10V_4

C445 0.1U/10V_4C445 0.1U/10V_4
C446 0.1U/10V_4C446 0.1U/10V_4
C450 0.1U/10V_4C450 0.1U/10V_4
C449 0.1U/10V_4C449 0.1U/10V_4
C451 0.1U/10V_4C451 0.1U/10V_4
C452 0.1U/10V_4C452 0.1U/10V_4
C448 0.1U/10V_4C448 0.1U/10V_4
C447 0.1U/10V_4C447 0.1U/10V_4

R101 1.27K/F_4R101 1.27K/F_4
R100 2K/F_4R100 2K/F_4

3

PEG_TXP15
PEG_TXN15
PEG_TXP14
PEG_TXN14
PEG_TXP13
PEG_TXN13
PEG_TXP12
PEG_TXN12
PEG_TXP11
PEG_TXN11
PEG_TXP10
PEG_TXN10
PEG_TXP9
PEG_TXN9
PEG_TXP8
PEG_TXN8
PEG_TXP7
PEG_TXN7
PEG_TXP6
PEG_TXN6
PEG_TXP5
PEG_TXN5
PEG_TXP4
PEG_TXN4
PEG_TXP3
PEG_TXN3
PEG_TXP2
PEG_TXN2
PEG_TXP1
PEG_TXN1
PEG_TXP0
PEG_TXN0

T11T11
T12T12

PCIE_TXP1 (27)

PCIE_TXN1 (27)

PCIE_TXP2 (23)

PCIE_TXN2 (23)

PCIE_TXP3 (23)

PCIE_TXN3 (23)

GLAN_TXP (21)GLAN_RXP(21)

GLAN_TXN (21)

PCIE_NB_SB_TX0P (13)
PCIE_NB_SB_TX0N (13)
PCIE_NB_SB_TX1P (13)
PCIE_NB_SB_TX1N (13)
PCIE_NB_SB_TX2P (13)
PCIE_NB_SB_TX2N (13)
PCIE_NB_SB_TX3P (13)
PCIE_NB_SB_TX3N (13)

+1.1V_NB

PEG_RXN[15:0](18)

PEG_RXP[15:0](18)

TO EPRESS CARD
TO WLAN
TO MINI CARD
TO PCIE-LAN

PEG_RXN[15:0]
PEG_RXP[15:0]

Close to North Bridge

C_PEG_TXP15
C_PEG_TXN15

C_PEG_TXP14
C_PEG_TXN14

C_PEG_TXP13
C_PEG_TXN13

C_PEG_TXP12
C_PEG_TXN12

2

PEG_TXN[15:0]
PEG_TXP[15:0]

PEG_TXN[15:0] (18)
PEG_TXP[15:0] (18)

BTO

Close to North Bridge

C251 IV@0.1U/10V_4C251 IV@0.1U/10V_4
C253 IV@0.1U/10V_4C253 IV@0.1U/10V_4

C242 IV@0.1U/10V_4C242 IV@0.1U/10V_4
C247 IV@0.1U/10V_4C247 IV@0.1U/10V_4

C232 IV@0.1U/10V_4C232 IV@0.1U/10V_4
C241 IV@0.1U/10V_4C241 IV@0.1U/10V_4

C223 IV@0.1U/10V_4C223 IV@0.1U/10V_4
C226 IV@0.1U/10V_4C226 IV@0.1U/10V_4

NOTE:

RS780MC no support Graphic / HDMI

1

INT_HDMITXP2 (20)
INT_HDMITXN2 (20)

INT_HDMITXP1 (20)
INT_HDMITXN1 (20)

INT_HDMITXP0 (20)
INT_HDMITXN0 (20)

INT_HDMITXP3 (20)
INT_HDMITXN3 (20)

To HDMI CONN

9

11/4 modify

B B

A A

RX780/RS740/RS780 difference table (PCIE LINK)

NB_PCIECALRP

GPP4

GPP5

5

RS740 RX780/RS780

562R (GND)

NC

NC

1.27K (GND)

GPP4

GPP5

RS780 Display Port Support (muxed on GFX)

DP0

DP1

4

GFX_TX0,TX1,TX2 and TX3
AUX0 and HPD0

GFX_TX4,TX5,TX6 and TX7
AUX1 and HPD1

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

3

2

Date: Sheet of

PROJECT :

RS740/RS780-PCIE I/F 2/5

RS740/RS780-PCIE I/F 2/5

RS740/RS780-PCIE I/F 2/5

ZK3

ZK3

ZK3

1A

1A

10 43Monday, August 18, 2008

10 43Monday, August 18, 2008

10 43Monday, August 18, 2008

1

1A

5

RX780: Powered from the 1.8-V rail
and driven by SB600 LDT_RST#, or
SB700 LDT_RST# or A_RST#.
RS780: Powered from the 3.3-V rail
and driven by SB600 LDT_RST#, or
SB700 LDT_RST# or A_RST#.

RS780

D D

NB_PLTRST#(13)

North Bridge RESET

RX780

+1.1V_NB

10/9 add 2K pull up to DDCDAT /DDCCLK for RX780

R177 *2.2K_4R177 *2.2K_4

R178 *2.2K_4R178 *2.2K_4

NB_PLTRST#

INT_CRT_DDCDAT

INT_CRT_DDCCLK

11/4 no stuff for RS780M/MC/RX781

12/22 stuff R48 2.2K for power play

C C

STRP_DATA

selects Loading of straps from
EPROM
1 : use default vaule , default
0 : I2C Master can load strap
values from EEPROM
if connected, or use default
values if not connected
RX780 --RS780_AUX_CAL
RS780 -- SUS_ATAT

Enables Debug Bus acess
through memory T/O pads and GPIO.

B B

1 : Enable RX780 , Default
0 : Disable RX780

R191 *10K/F_4R191 *10K/F_4

R196 2.2K_4R196 2.2K_4

+3V

RS780_AUX_CAL

RX780

R468 *3K_4R468 *3K_4

RX780

Reserved only

Enables Debug Bus acess
through memory T/O pads and GPIO.
1 : Enable RS780 , Default
0 : Disable RS780
(RS780 use VSYNC#)

Indicates if memory Side port
is available or not
0: available RS780 , Default
1: Not available RS780
( RS780 use HSYNC#)

A A

10/19 RS780M Databook rev 1.01 define High disable

5

INT_VSYNC

INT_HSYNC

RS780

R462 3K_4R462 3K_4
R465 *3K_4R465 *3K_4

RS780

R464 3K_4R464 3K_4
R467 *3K_4R467 *3K_4

4

+3V_AVDD_NB
+1.8V_AVDDDI_NB
+1.8V_AVDDQ_NB

R210 0_4R210 0_4
R194 0_4R194 0_4

R200

R200

INT_LVDS_EDIDDATA
INT_LVDS_EDIDCLK
IV_HDMI_DDCDATA
IV_HDMI_DDCCLK

T108T108
T109T109

T107T107

+3V_AVDD_NB

C172

C172
10U/6.3V_6

10U/6.3V_6

+1.8V_PLLVDD18

C175

C175
22U/6.3V_8

22U/6.3V_8

20mils width

C240

C240

2.2U/6.3V_6

2.2U/6.3V_6

20mils width

C225

C225

2.2U/6.3V_6

2.2U/6.3V_6

INT_CRT_RED
INT_CRT_GRN
INT_CRT_BLU

INT_HSYNC
INT_VSYNC
INT_CRT_DDCDAT
INT_CRT_DDCCLK

DAC_RSET_NBDAC_RSET_NB
+1.1V_PLLVDD

+1.8V_PLLVDD18

+1.8V_VDDA18HTPLL
+1.8V_VDDA18PCIEPLL

NB_PLTRST#
NB_PWRGD_IN
NB_LDT_STOP#
NB_ALLOW_LDTSTOP

NBHT_REFCLKP
NBHT_REFCLKN

NBGFX_CLKP
NBGFX_CLKN

NBGPP_CLKP
NBGPP_CLKN

SBLINK_CLKP
SBLINK_CLKN

RS740_DFT_GPIO1

R201 0_4R201 0_4

+1.1V_NB

INT_CRT_RED(18)
INT_CRT_GRN(18)
INT_CRT_BLU(18)

INT_HSYNC(18)

INT_VSYNC(18)
INT_CRT_DDCDAT(18)
INT_CRT_DDCCLK(18)

NB_PWRGD_IN(17)

NBHT_REFCLKP(3)

NBHT_REFCLKN(3)

EXT_NB_OSC(3)

+1.1V_NB

NBGFX_CLKP(3)
NBGFX_CLKN(3)
NBGPP_CLKP(3)
NBGPP_CLKN(3)
SBLINK_CLKP(3)

SBLINK_CLKN(3)

INT_LVDS_EDIDDATA(19)
INT_LVDS_EDIDCLK(19)

SDVO_CTRLDATA(20)
SDVO_CTRLCLK(20)

AVDD-DAC Analog
not applicable to
RX780

PLLVDD18 - Graphics PLL
not applicable to RX780

+3V

+3V

R183 IV@140/F_4R183 IV@140/F_4
R181 IV@150/F_4R181 IV@150/F_4
R182 IV@150/F_4R182 IV@150/F_4

R163 IV@715/F_6R163 IV@715/F_6

4.7K_4

4.7K_4
R184

R184

L23

L23

+3V

BLM18PG221SN1D

BLM18PG221SN1D

+1.8V

L27

L27

BLM18PG221SN1D

BLM18PG221SN1D

C236

C236
10U/6.3V_8

10U/6.3V_8

+1.8V

VDDA18PCIEPLL -PCIE PLL

L28

L28

BLM18PG221SN1D

BLM18PG221SN1D

4.7K_4

4.7K_4

+NB_CORE_ON(36)

11/4 no stuff for RS780M/MC

+1.8V_VDDA18PCIEPLL

VDDA18HTPLL -HT LINK PLL

L26

L26

BLM18PG221SN1D

BLM18PG221SN1D

4

+1.8V_VDDA18HTPLL

3

U26C

U26C

F12

AVDD1(NC)

E12

AVDD2(NC)

F14

AVDDDI(NC)

G15

AVSSDI(NC)

H15

AVDDQ(NC)

H14

AVSSQ(NC)

E17

C_Pr(DFT_GPIO5)

F17

Y(DFT_GPIO2)

F15

COMP_Pb(DFT_GPIO4)

G18

RED(DFT_GPIO0)

G17

REDb(NC)

E18

GREEN(DFT_GPIO1)

F18

GREENb(NC)

E19

BLUE(DFT_GPIO3)

F19

BLUEb(NC)

A11

DAC_HSYNC(PWM_GPIO4)

B11

DAC_VSYNC(PWM_GPIO6)

E8

DAC_SDA(PCE_TCALRN)

F8

DAC_SCL(PCE_RCALRN)

G14

DAC_RSET(PWM_GPIO1)

A12

PLLVDD(NC)

D14

PLLVDD18(NC)

B12

PLLVSS(NC)

H17

VDDA18HTPLL

D7

VDDA18PCIEPLL1

E7

VDDA18PCIEPLL2

D8

SYSRESETb

A10

POWERGOOD

C10

LDTSTOPb

C12

ALLOW_LDTSTOP

C25

HT_REFCLKP

C24

NB_REFCLK_P
NB_REFCLK_N

STRP_DATA

RS780_AUX_CAL

BLM18PG221SN1D

BLM18PG221SN1D

+1.8V

L29

L29

1/31 voltage leakage issue
remove Q5,Q3,R83,R80,R97
stuff R88,R77

E11
F11

T2
T1

U1
U2

V4
V3

A9
B9
B8
A8
B7

A7
B10
G11

C8

L22

L22

R197 0_6R197 0_6

BLM18PG221SN1D

BLM18PG221SN1D

CPU_LDT_STOP#(4,13)

CPU_LDT_REQ#(4)

ALLOW_LDTSTOP(13)

3

HT_REFCLKN
REFCLK_P/OSCIN(OSCIN)

REFCLK_N(PWM_GPIO3)
GFX_REFCLKP

GFX_REFCLKN
GPP_REFCLKP

GPP_REFCLKN
GPPSB_REFCLKP(SB_REFCLKP)

GPPSB_REFCLKN(SB_REFCLKN)
I2C_DATA

I2C_CLK
DDC_DATA/AUX0N(NC)
DDC_CLK/AUX0P(NC)
AUX1P(NC)
AUX1N(NC)

STRP_DATA
RSVD
AUX_CAL(NC)

RS780(RX780)

RS780(RX780)

+1.8V_AVDDDI_NB

I

I/O

I/O

+1.1V_PLLVDD

C192

C192

2.2U/6.3V_6

2.2U/6.3V_6

C162

C162

2.2U/6.3V_6

2.2U/6.3V_6

+1.8V_AVDDQ_NB

C246

C246

2.2U/6.3V_6

2.2U/6.3V_6

Q18

Q18
*BSS138_NL/SOT23

*BSS138_NL/SOT23

Q17

Q17

*BSS138_NL/SOT23

*BSS138_NL/SOT23

R214 0_4R214 0_4

PART 3 OF 6

PART 3 OF 6

TXOUT_L2N(DBG_GPIO0)
TXOUT_L3N(DBG_GPIO2)

TXOUT_U1P(PCIE_RESET_GPIO3)
TXOUT_U1N(PCIE_RESET_GPIO2)

TXOUT_U3P(PCIE_RESET_GPIO5)

CRT/TVOUT

CRT/TVOUT

TXCLK_LP(DBG_GPIO1)

TXCLK_LN(DBG_GPIO3)
TXCLK_UP(PCIE_RESET_GPIO4)
TXCLK_UN(PCIE_RESET_GPIO1)

LVTM

LVTM

PM

PM

I

LVDS_DIGON(PCE_TCALRP)

LVDS_BLON(PCE_RCALRP)

LVDS_ENA_BL(PWM_GPIO2)

CLOCKs PLL PWR

CLOCKs PLL PWR

MIS.

MIS.

TVCLKIN(PWM_GPIO5)

THERMALDIODE_P

THERMALDIODE_N

PLLVDD - Graphics PLL
not applicable to
RX780

AVDDI-DAC Digital
not applicable to RX780

AVDDQ-DAC Bandgap Reference
not applicable to RX780

+1.8V +VDDG_NB

2

+1.8V

3

+VDDG_NB

2

3

1

R219 0_4R219 0_4

RS780

1

R208 0_4R208 0_4

RS780

TXOUT_L0P(NC)
TXOUT_L0N(NC)
TXOUT_L1P(NC)
TXOUT_L1N(NC)
TXOUT_L2P(NC)

TXOUT_L3P(NC)

TXOUT_U0P(NC)
TXOUT_U0N(NC)

TXOUT_U2P(NC)
TXOUT_U2N(NC)

TXOUT_U3N(NC)

VDDLTP18(NC)

VSSLTP18(NC)

VDDLT18_1(NC)
VDDLT18_2(NC)
VDDLT33_1(NC)
VDDLT33_2(NC)

VSSLT1(VSS)
VSSLT2(VSS)
VSSLT3(VSS)
VSSLT4(VSS)
VSSLT5(VSS)
VSSLT6(VSS)
VSSLT7(VSS)

TMDS_HPD(NC)

HPD(NC)

TESTMODE

R215

R215
*4.7K_4

*4.7K_4

NB_LDT_STOP#

R209

R209
*4.7K_4

*4.7K_4

NB_ALLOW_LDTSTOP

2

A22
B22
A21
B21
B20
A20
A19
B19

B18
A18
A17
B17
D20
D21
D18
D19

B16
A16
D16
D17

A13
B13

A15
B15
A14
B14

C14
D15
C16
C18
C20
E20
C22

+1.8V_VDDLTP18_NB

+1.8V_VDDLT_18_NB

+3V_VDLT33_NB

INT_TXLOUT0+ (18)
INT_TXLOUT0- (18)
INT_TXLOUT1+ (18)
INT_TXLOUT1- (18)
INT_TXLOUT2+ (18)
INT_TXLOUT2- (18)

T111T111
T106T106

INT_TXUOUT0+ (18)
INT_TXUOUT0- (18)
INT_TXUOUT1+ (18)
INT_TXUOUT1- (18)
INT_TXUOUT2+ (18)
INT_TXUOUT2- (18)

T110T110
T105T105

INT_TXLCLKOUT+ (18)
INT_TXLCLKOUT- (18)
INT_TXUCLKOUT+ (18)
INT_TXUCLKOUT- (18)

1

11/01 exchange LVDS_PWM /LVDS_BLON

E9
F7
G12

TMDS_HPD0

D9

TMDS_HPD1

D10

SUS_STAT#_NB

D12

R_NB_THRMDA

AE8

R_NB_THRMDC

AD8

TEST_EN

D13

1/17 RX781 connect to GND
C104,C110,C646,C98,C136,C103,C118 change to CS00003J951

+1.8V

BLM18PG221SN1D

BLM18PG221SN1D

L44

L44

BLM21PG221SN1D

BLM21PG221SN1D

L24

L24

R203

R203

1.82K/F_4

1.82K/F_4

2.2U/6.3V_6

2.2U/6.3V_6

4.7U/6.3V_6

4.7U/6.3V_6

T39T39

R211 0_4R211 0_4

T89T89
T90T90

C173

C173

C215

C215

0.1U/10V_4

0.1U/10V_4

RX780

RS780

*BLM21PG221SN1D

*BLM21PG221SN1D

VDDLT33 - LVDS or DVI/HDMI ANALOG
RS740 only

2

INT_LVDS_DIGON (19)
L_BKLT_CTRL (19)
INT_LVDS_BLON (19)

R205

R205
IV@0_4

IV@0_4

TMDS_HPD# (20)

SUS_STAT# (14)

R252

R252
*3K_4

*3K_4

+1.8V_VDDLTP18_NB

VDDLTP18 - LVDS or DVI/HDMI PLL
not applicable to RX780

+1.8V_VDDLT_18_NB

1/17 RX781 no stuff them

C207

C207

L2,L12,C124,L52,R76,L17,L51,L10,C115

VDDLT18 - LVDS or
DVI/HDMI digital
not applicable to
RX780

R218 *0_6R218 *0_6

+1.8V +VDDG_NB

R217 *0_6R217 *0_6

+3V

L43

L43

+3V

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

+3V_VDLT33_NB

C540

C540

*2.2U/6.3V_6

*2.2U/6.3V_6

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

PROJECT :

RS740/RS780-SYSTEM I/F 3/5

RS740/RS780-SYSTEM I/F 3/5

RS740/RS780-SYSTEM I/F 3/5

1

ZK3

ZK3

ZK3

11

11 43Monday, August 18, 2008

11 43Monday, August 18, 2008

11 43Monday, August 18, 2008

1A

1A

1A

5

4

3

2

1

D11

E14

E15

J12

K14

M11

AB11

VSS28

J15

VSS5

VSS29

AB15

AB17

VSS7

VSS8

VSS6

VSS30

VSS31

VSS32

AB19

AE20

C98

C98

0.1U/10V_4

0.1U/10V_4

C548

C548

0.1U/10V_4

0.1U/10V_4

C128

C128

0.1U/10V_4

0.1U/10V_4

C122

C122

0.1U/10V_4

0.1U/10V_4

L15

VDDPCIE_1
VDDPCIE_2
VDDPCIE_3
VDDPCIE_4
VDDPCIE_5
VDDPCIE_6
VDDPCIE_7
VDDPCIE_8

VDDPCIE_9
VDDPCIE_10
VDDPCIE_11
VDDPCIE_12
VDDPCIE_13
VDDPCIE_14
VDDPCIE_15
VDDPCIE_16
VDDPCIE_17

VDDC_1
VDDC_2
VDDC_3
VDDC_4
VDDC_5
VDDC_6
VDDC_7
VDDC_8

VDDC_9
VDDC_10
VDDC_11

POWER

POWER

VDDC_12
VDDC_13
VDDC_14
VDDC_15
VDDC_16
VDDC_17
VDDC_18
VDDC_19
VDDC_20
VDDC_21
VDDC_22

VDD_MEM1(NC)
VDD_MEM2(NC)
VDD_MEM3(NC)
VDD_MEM4(NC)
VDD_MEM5(NC)
VDD_MEM6(NC)

VDDG33_1(NC)
VDDG33_2(NC)

PIN NAME
VDDHT
VDDHTRX
VDDHTTX
VDDA18PCIE

VDD18_MEM
VDDPCIE
VDDC
VDD_MEM
VDDG33
IOPLLVDD18

VSS9

VSS10

VSS34

VSS33

K11

AB21

U26E

U26E

J17

VDDHT_1

K16
L16

M16

P16

R16

T16

H18
G19

F20
E21

D22

B23
A23

AE25
AD24
AC23
AB22
AA21

Y20

W19

V18

U17

T17

R17

P17

M17

J10
P10
K10

M10

L10

T10

R10
AA9

AB9
AD9
AE9
U10

AE11
AD11

W9

H9

Y9

F9
G9

PART 5/6

PART 5/6

VDDHT_2
VDDHT_3
VDDHT_4
VDDHT_5
VDDHT_6
VDDHT_7

VDDHTRX_1
VDDHTRX_2
VDDHTRX_3
VDDHTRX_4
VDDHTRX_5
VDDHTRX_6
VDDHTRX_7

VDDHTTX_1
VDDHTTX_2
VDDHTTX_3
VDDHTTX_4
VDDHTTX_5
VDDHTTX_6
VDDHTTX_7
VDDHTTX_8
VDDHTTX_9
VDDHTTX_10
VDDHTTX_11
VDDHTTX_12
VDDHTTX_13

VDDA18PCIE_1
VDDA18PCIE_2
VDDA18PCIE_3
VDDA18PCIE_4
VDDA18PCIE_5
VDDA18PCIE_6
VDDA18PCIE_7
VDDA18PCIE_8
VDDA18PCIE_9
VDDA18PCIE_10
VDDA18PCIE_11
VDDA18PCIE_12
VDDA18PCIE_13
VDDA18PCIE_14
VDDA18PCIE_15

VDDG18_1(VDD18_1)
VDDG18_2(VDD18_2)
VDD18_MEM1(NC)
VDD18_MEM2(NC)

RS780(RX780)

RS780(RX780)

H7

U26F

U26F

D D

C C

VSSAPCIE1A2VSSAPCIE2B1VSSAPCIE3D3VSSAPCIE4D5VSSAPCIE5E4VSSAPCIE6G1VSSAPCIE7G2VSSAPCIE8G4VSSAPCIE9

PART 6/6

PART 6/6

VSSAHT1

VSSAHT2

VSSAHT3

VSSAHT4

VSSAHT5

VSSAHT6

VSSAHT7

VSSAHT8

E22

D23

H19

G22

G24

G25

VDDHT - HT
LINK digital
I/O for
RX780/RS780

J22

A25

VDDHTRX - HT
LINK RX I/O for
RX780/RS780

+1.2V 2A for RS780M+SB700

L39

L39

+1.2V

BLM21PG221SN1D

BLM21PG221SN1D

+1.35V for
A1-1 chip
bug , A1-2
can remove

B B

VDDA18PCIE ­PCIE TX stage
I/O for
RX780/RS780

A A

VDDHTTX - HT
LINK TX I/O for
RX780/RS780

+1.8V 1A for RS780M+SB700

L9

+1.8V

BLM21PG221SN1D

BLM21PG221SN1D

L9

VDD18 - RS780 I/O
transform

L7

VSSAPCIE10J4VSSAPCIE11R7VSSAPCIE12L1VSSAPCIE13L2VSSAPCIE14L4VSSAPCIE15

VSSAPCIE16M6VSSAPCIE17N4VSSAPCIE18P6VSSAPCIE19R1VSSAPCIE20R2VSSAPCIE21R4VSSAPCIE22V7VSSAPCIE23U4VSSAPCIE24V8VSSAPCIE25V6VSSAPCIE26W1VSSAPCIE27W2VSSAPCIE28W4VSSAPCIE29W7VSSAPCIE30W8VSSAPCIE31Y6VSSAPCIE32

VSSAHT9

VSSAHT10

VSSAHT11

VSSAHT12

VSSAHT13

VSSAHT14

VSSAHT15

VSSAHT16

VSSAHT17

VSSAHT18

VSSAHT19

VSSAHT21

VSSAHT22

VSSAHT23

VSSAHT24

VSSAHT25

VSSAHT20

L17

L22

L24

L25

N22

M20

+1.1V_NB

0.6A

0.45A

P20

V19

R19

R22

R24

R25

U22

H20

W22

W24

W25

+1.1V 2A for RS780M

L8

L8
BLM21PG221SN1D

BLM21PG221SN1D

330U/2.5_3528

330U/2.5_3528

L45

L45
BLM21PG221SN1D

BLM21PG221SN1D

C559

C559

330U/2.5_3528

330U/2.5_3528

0.5A

C456

C456

4.7U/6.3V_6

4.7U/6.3V_6

12/14 del L15 stuff L36 for A12

600mA

C108

C108

C111

C111

4.7U/6.3V_6

4.7U/6.3V_6

4.7U/6.3V_6

4.7U/6.3V_6

+1.8V

VDD18_MEM For UMA RS780 only
Not applicable to RX780
memory I/O transform

+1.8V

GROUND

GROUND

VSSAHT26

VSSAHT27

VSS11

VSS12

VSS13

L12

Y21

N13

M14

AD25

C99

C99

C135

C135

0.1U/10V_4

0.1U/10V_4

C117

C117

0.1U/10V_4

0.1U/10V_4

R180 0_6R180 0_6

R372 0_6R372 0_6

AA4

AB5

VSS14

P12

P15

AB1

AB7

VSSAPCIE33

VSSAPCIE34

VSSAPCIE35

VSS15

VSS16

VSS17

R11

R14

C110

C110

0.1U/10V_4

0.1U/10V_4

AC3

AC4

AE1

AE4

AB2

AE14

VSS2

VSS3G8VSS4

VSS1

VSSAPCIE36

VSSAPCIE37

VSSAPCIE38

VSSAPCIE39

VSSAPCIE40

VSS18

VSS19

VSS20

VSS21

VSS22

VSS23

VSS24

VSS25

VSS26

VSS27

T12

V12

U15

W11

Y18

W15

AA14

AC12

+1.1V_VDDHT

C131

C131

0.1U/10V_4

0.1U/10V_4

+1.1V_VDDHTRX

C553

C553

0.1U/10V_4

0.1U/10V_4

+1.2V_VDDHTTX

C116

C116

0.1U/10V_4

0.1U/10V_4

+1.8V_VDDA18PCIE

C134

C134

0.1U/10V_4

0.1U/10V_4

U14

U11

C141

C141

0.1U/10V_4

0.1U/10V_4

C153

C153

0.1U/10V_4

0.1U/10V_4

C113

C113

0.1U/10V_4

0.1U/10V_4

0.005A

C161

C161
1U/10V_4

1U/10V_4

0.005A

C458

C458
*1U/10V_4

*1U/10V_4

+1.8V_VDDG18_NB

+1.8V_VDD18_MEM

1/17 RX781 no stuff them
R484

1/17 RX781 connect to GND
C616 change to CS00002JB38

RX780/RS780 POWER DIFFERENCE TABLE

RX780

+1.1V
+1.1V
+1.2V
+1.8V
+1.8VVDDG18
NC
+1.1V +1.1V +1.8V
+1.1V
NC

+1.8V/1.5V

NC

+1.1V_VDD_PCIE

A6
B6
C6
D6
E6
F6
G7
H8
J9
K9
M9
L9
P9
R9
T9
V9
U9

K12
J14
U16
J11
K15
M12
L14
L11
M13
M15
N12
N14
P11
P13
P14
R12
R15
T11
T15
U12
T14
J16

AE10
AA11
Y11
AD10
AB10
AC10

H11
H12

C103

C103

0.1U/10V_4

0.1U/10V_4

C123

C123

0.1U/10V_4

0.1U/10V_4

C130

C130

0.1U/10V_4

0.1U/10V_4

+1.8V_VDD_MEM

+3V_VDDG33

C156

C156

0.1U/10V_4

0.1U/10V_4

PIN NAME

RS780

IOPLLVDD

+1.1V
+1.1V

AVDDDI

+1.2V

AVDDQ

+1.8V

PLLVDD

+1.8V

PLLVDD18

+1.8V

VDDA18PCIEPLL
VDDA18HTPLL

+1.1V

VDDLTP18

+3.3V

VDDLT18

+1.8VNC

VDDLT33

C125

C125

C142

C142

1U/10V_4

1U/10V_4

0.1U/10V_4

0.1U/10V_4

C145

C145

C114

C114

0.1U/10V_4

0.1U/10V_4

0.1U/10V_4

0.1U/10V_4

C140

C140

0.1U/10V_4

0.1U/10V_4

10/18 follow AMD design guide 1.0

1.8V(0.15A)

R195 0_6R195 0_6

C217

C217

0.1U/10V_4

0.1U/10V_4

RX780 RS780

NC

+1.1V

NC

+3.3VAVDD
NC +1.8V
NC +1.8V

+1.1V

NC
NC

+1.8V

+1.8V
+1.8V

+1.8V

+1.8V

NC

+1.8V

NC
NC

NC

0.7A

C187

C187
1U/10V_4

1U/10V_4

C118

C118

0.1U/10V_4

0.1U/10V_4

C129

C129

0.1U/10V_4

0.1U/10V_4

R103 *0_6R103 *0_6
R102 0_6R102 0_6

RS780

3.3V(0.03A)

VDD33 - 3.3V I/O
Not applicable to RX780

VDDPCIE - PCIE-E Main power

R96 0_8R96 0_8

C169

C169

4.7U/6.3V_6

4.7U/6.3V_6

2/13 EMI
stuff C804~C807 for +NB_CORE

VDDC - Core Logic power

7A

C87

C87

C444

C444

0.1U/10V_4

C443

C443

10U/6.3V_8

10U/6.3V_8

0.1U/10V_4

+1.8V

+3V

10U/6.3V_8

10U/6.3V_8

+1.1V_NB

C459

C459

C455

C455

0.1U/10V_4

0.1U/10V_4

0.1U/10V_4

0.1U/10V_4

VDD_MEM For UMA RS780 only
Not applicable to RX780
memory I/O transform

12

C453

C453

0.1U/10V_4

0.1U/10V_4

+NB_CORE

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

PROJECT :

RS740/RS780-POWER5/5

RS740/RS780-POWER5/5

RS740/RS780-POWER5/5

ZK3

ZK3

ZK3

1A

1A

12 43Monday, August 18, 2008

12 43Monday, August 18, 2008

12 43Monday, August 18, 2008

1

1A

5

4

3

2

1

2/4 reserve C800 PLTRST#

Q47

Q47
MMBT3904

MMBT3904

13

2

ZK3

ZK3

ZK3

13

+3V

C605

C605
1U/10V_4

1U/10V_4

13 43Monday, August 18, 2008

13 43Monday, August 18, 2008

13 43Monday, August 18, 2008

C607

C607

0.1U/10V_4

0.1U/10V_4

1A

1A

1A

R424 562/F_4R424 562/F_4
R423 2.05K/F_4R423 2.05K/F_4

T98T98
T18T18

T93T93
T92T92

T35T35
T19T19

T91T91
T36T36

T38T38
T41T41

T27T27
T31T31

T17T17
T25T25

T32T32
T13T13

T23T23

R141 *1K_4R141 *1K_4

R514 33_4R514 33_4
R491 33_4R491 33_4

C479 0.1U/10V_4C479 0.1U/10V_4
C480 0.1U/10V_4C480 0.1U/10V_4
C474 0.1U/10V_4C474 0.1U/10V_4
C473 0.1U/10V_4C473 0.1U/10V_4
C481 0.1U/10V_4C481 0.1U/10V_4
C482 0.1U/10V_4C482 0.1U/10V_4
C471 0.1U/10V_4C471 0.1U/10V_4
C472 0.1U/10V_4C472 0.1U/10V_4

PCIE_NB_SB_TX0P
PCIE_NB_SB_TX0N
PCIE_NB_SB_TX1P
PCIE_NB_SB_TX1N
PCIE_NB_SB_TX2P
PCIE_NB_SB_TX2N
PCIE_NB_SB_TX3P
PCIE_NB_SB_TX3N

+1.2V_PCIE_PVDD

C484

C484
10U/6.3V_8

10U/6.3V_8

R642 *0_4R642 *0_4

(For SB A13)

ALLOW_LDTSTOP
CPU_PROCHOT_SB#
CPU_PWRGD
CPU_LDT_STOP#
CPU_LDT_RST#

A_RST#_SB

A_RX0P_C
A_RX0N_C
A_RX1P_C
A_RX1N_C
A_RX2P_C
A_RX2N_C
A_RX3P_C
A_RX3N_C

PCIE_CALRP_SB
PCIE_CALRN_SB

40mA

C155

C155
1U/10V_4

1U/10V_4

SBSRC_CLKPSBSRC_CLKPSBSRC_CLKPSBSRC_CLKP
SBSRC_CLKNSBSRC_CLKNSBSRC_CLKNSBSRC_CLKNSBSRC_CLKNSBSRC_CLKNSBSRC_CLKNSBSRC_CLKN

NB_DISP_CLKP
NB_DISP_CLKN

NB_HT_CLKP
NB_HT_CLKN

CPU_HT_CLKP
CPU_HT_CLKN

SLT_GFX_CLKP
SLT_GFX_CLKN

GPP_CLK0P
GPP_CLK0N

GPP_CLK1P
GPP_CLK1N

GPP_CLK2P
GPP_CLK2N

GPP_CLK3P
GPP_CLK3N

T30T30

RTC_X1

RTC_X2

4

U28A

U28A

N2

A_RST#

V23

PCIE_TX0P

V22

PCIE_TX0N

V24

PCIE_TX1P

V25

PCIE_TX1N

U25

PCIE_TX2P

U24

PCIE_TX2N

T23

PCIE_TX3P

T22

PCIE_TX3N

U22

PCIE_RX0P

U21

PCIE_RX0N

U19

PCIE_RX1P

V19

PCIE_RX1N

R20

PCIE_RX2P

R21

PCIE_RX2N

R18

PCIE_RX3P

R17

PCIE_RX3N

T25

PCIE_CALRP

T24

PCIE_CALRN

P24

PCIE_PVDD

P25

PCIE_PVSS

N25

PCIE_RCLKP/NB_LNK_CLKP

N24

PCIE_RCLKN/NB_LNK_CLKN

K23

NB_DISP_CLKP

K22

NB_DISP_CLKN

M24

NB_HT_CLKP

M25

NB_HT_CLKN

P17

CPU_HT_CLKP

M18

CPU_HT_CLKN

M23

SLT_GFX_CLKP

M22

SLT_GFX_CLKN

J19

GPP_CLK0P

J18

GPP_CLK0N

L20

GPP_CLK1P

L19

GPP_CLK1N

M19

GPP_CLK2P

M20

GPP_CLK2N

N22

GPP_CLK3P

P22

GPP_CLK3N

L18

25M_48M_66M_OSC

J21

25M_X1

J20

25M_X2

A3

X1

B3

X2

F23

ALLOW_LDTSTP

F24

PROCHOT#

F22

LDT_PG

G25

LDT_STP#

G24

LDT_RST#

SB700

SB700

IC CTRL(528P) SB700 A11(218S7EALA11FG)
P/N : AJALA110T00

100MHZ

RTC XTAL

RTC XTAL

SB700

SB700

Part 1 of 5

Part 1 of 5

PCI EXPRESS INTERFACE

PCI EXPRESS INTERFACE

CPU

CPU

CLOCK GENERATOR

CLOCK GENERATOR

LPC

LPC

LDRQ1#/GNT5#/GPIO68

BMREQ#/REQ5#/GPIO65

RTC

RTC

PCICLK0
PCICLK1
PCICLK2
PCICLK3
PCICLK4

PCICLK5/GPIO41

PCI CLKS

PCI CLKS

PCIRST#

FRAME#

PCI INTERFACE

PCI INTERFACE

DEVSEL#

REQ3#/GPIO70
REQ4#/GPIO71

GNT3#/GPIO72
GNT4#/GPIO73

CLKRUN#

INTE#/GPIO33
INTF#/GPIO34
INTG#/GPIO35
INTH#/GPIO36

LPCCLK0
LPCCLK1

LFRAME#

LDRQ0#

SERIRQ

RTCCLK

INTRUDER_ALERT#

3

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8

AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

CBE0#
CBE1#
CBE2#
CBE3#

IRDY#

TRDY#

PAR

STOP#
PERR#
SERR#
REQ0#
REQ1#
REQ2#

GNT0#
GNT1#
GNT2#

LOCK#

LAD0
LAD1
LAD2
LAD3

VBAT

P4
P3
P1
P2
T4
T3

N1

U2
P7
V4
T1
V3
U1
V1
V2
T2
W1
T9
R6
R7
R5
U8
U5
Y7
W8
V9
Y8
AA8
Y4
Y3
Y2
AA2
AB4
AA1
AB3
AB2
AC1
AC2
AD1
W2
U7
AA7
Y1
AA6
W5
AA5
Y5
U6
W6
W4
V7
AC3
AD4
AB7
AE6
AB6
AD2
AE4
AD5
AC6
AE5
AD6
V5

AD3
AC4
AE2
AE3

G22
E22
H24
H23
J25
J24
H25
H22
AB8
AD7
V15

C3
C2
B2

PORT_C#

PE_GPIO1

PCI_CLK0_R
PCI_CLK2_R

PCI_CLK3_R
PCI_CLK4_R
PCI_CLK5_R

PCIRST#_L

AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30

T49T49
T125T125

T124T124

CLKRUN#_R

LOCK#

INTE#
INTF#

T58T58

INTG#
INTH#

T126T126

LPC_CLK0
LPC_CLK1
LAD0
LAD1
LAD2
LAD3
LFRAME#
LDRQ0#_SB
LDRQ1#_SB
SB_GPIO65
SERIRQ

RTC_CLK
INTRUDER_ALERT#

R242 510_4R242 510_4

C255

C255

0.1U/10V_4

0.1U/10V_4

T71T71

R506 22_4R506 22_4
R508 22_4R508 22_4
R234 22_4R234 22_4
R485 22_4R485 22_4

R520 33_4R520 33_4

AD23 (17)
AD24 (17)
AD25 (17)
AD26 (17)
AD27 (17)

AD28 (17)
T156T156
T157T157

T119T119
T127T127

T56T56

R476 0_4R476 0_4

R148 22_4R148 22_4
R427 22_4R427 22_4

T28T28
T61T61
T50T50

T132T132

LAD0 (23,32)
LAD1 (23,32)
LAD2 (23,32)
LAD3 (23,32)
LFRAME# (23,32)

SERIRQ (32)

RTC_CLK (17)

T59T59

PCIRST#

All the PCI bus has
build-in Pull-UP/Down
resistors

RTC

+3VPCU

VCCRTC

D47 CH500H-40D47 CH500H-40

CLKRUN# (32)

T129T129
T128T128

PCLK_DEBUG (17,23)
PCLK_591 (17,32)

2

PCI_CLK2 (17)
PCI_CLK3 (17)
PCI_CLK4 (17)
PCI_CLK5 (17)

PCIRST# (23)

A11 default PCICLK5
A12 default GPIO41

PE_GPIO1

R228 8.2K_4R228 8.2K_4
R227 *8.2K_4R227 *8.2K_4

SB_GPIO65

R216 10K_4R216 10K_4

Maybe can remove

VCCRTC

D46

D46
CH500H-40

CH500H-40

R532

R532
1K_6

1K_6

CN34

CN34

1

1

2

2

RTC_BAT

RTC_BAT
53261-0210-2P-L

53261-0210-2P-L
DFHD02MS784

DFHD02MS784

+5VPCU

R571+R667 = (5V - 0.2V-2V)/0.2mA = 14k

R529

R529

68.1K/F_4

68.1K/F_4

R531

R531
150K/F_6

150K/F_6T123T123

4/14
R527, change from 2k to 0.
R524 change from 2K to 16K
R529,change from 6.8k to 68.1k
R531 change form 15k to 150k

VCCRTC

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

12

G3

G3
*SHORT_PAD

*SHORT_PAD

R543

R543

0_4

0_4

R524

R524

SB700-PCIE/PCI/CPU/LPC 1/4

SB700-PCIE/PCI/CPU/LPC 1/4

SB700-PCIE/PCI/CPU/LPC 1/4

VCCRTC_3

16K/F_4

16K/F_4

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

PROJECT :

1

NB_PLTRST#(11)

C576

C576

PLTRST#

*0.1U/10V_4

*0.1U/10V_4

D D

PLACE THESE
PCIE AC
COUPLING CAPS
CLOSE TO U600

+1.2V

PLTRST#(18,21,23,27,28,32)

PCIE_SB_NB_RX0P(10)
PCIE_SB_NB_RX0N(10)
PCIE_SB_NB_RX1P(10)
PCIE_SB_NB_RX1N(10)
PCIE_SB_NB_RX2P(10)
PCIE_SB_NB_RX2N(10)
PCIE_SB_NB_RX3P(10)
PCIE_SB_NB_RX3N(10)

PCIE_NB_SB_TX0P(10)

To RS780

PCIE_NB_SB_TX0N(10)
PCIE_NB_SB_TX1P(10)
PCIE_NB_SB_TX1N(10)
PCIE_NB_SB_TX2P(10)
PCIE_NB_SB_TX2N(10)
PCIE_NB_SB_TX3P(10)
PCIE_NB_SB_TX3N(10)

+1.2V_PCIE_VDDR

L13 BLM18PG221SN1DL13 BLM18PG221SN1D

PCIE_PVDD-- PCIE PLL POWER

R483

R483

*20M_6

*20M_6

A_RST#_SB

R281

R281
1K_4

1K_4

Y5

Y5

4

32.768KHZ

32.768KHZ

R499 20M_6R499 20M_6

C570

C570
18p/50V_4

18p/50V_4

23

1

B test

RTC_X1

RTC_X2

C579

C579
18p/50V_4

18p/50V_4

SBSRC_CLKP(3)
SBSRC_CLKN(3)

CLK_14M_SB(3)

+1.8V

ALLOW_LDTSTOP(11)

CPU_PROCHOT_SB#(4)

CPU_PWRGD(4)

CPU_LDT_STOP#(4,11)

CPU_LDT_RST#(4)

C C

B B

A A

1/31 voltage leakage remove R349

5