Acer Aspire 5935 Schematics

ZZZ8
ZZZ8
PCB
PCB
A
DAZ@
DAZ@
DAZ04300100
DAZ04300100
B
C
D
E
1 1
2 2
3 3
ZZZ1
ZZZ1
PCB
PCB
ZZZ2
ZZZ2
PCB
PCB
ZZZ3
ZZZ3
PCB
PCB
ZZZ4
ZZZ4
PCB
PCB
ZZZ5
ZZZ5
PCB
PCB
ZZZ6
ZZZ6
PCB
PCB
ZZZ7
ZZZ7
PCB
PCB
DA2@
DA2@
MAIN BOARD
DA600007E10
DA600007E10
DA2@
DA2@
E board
DA40000A910
DA40000A910
DA2@
DA2@
FP board
DA600007D10
DA600007D10
DA2@
DA2@
Function board
DA40000AA10
DA40000AA10
DA2@
DA2@
USB board
DA40000AB10
DA40000AB10
DA2@
DA2@
IO board
DA40000AC10
DA40000AC10
DA2@
DA2@
Power board
DA40000AD10
DA40000AD10
Compal Confidential
KAQB0 M/B Schematics Document
Intel Penryn Processor with Cantiga + DDRIII + ICH9M
2009-03-27
REV:1.0
4 4
Security Classification
Security Classification
http://laptop-motherboard-schematic.blogspot.com/
A
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2007/09/29 2007/09/29
2007/09/29 2007/09/29
2007/09/29 2007/09/29
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
D
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC,MB A5011
SCHEMATIC,MB A5011
SCHEMATIC,MB A5011
401673
401673
401673
E
B
B
B
of
of
of
143Thursday, April 30, 2009
143Thursday, April 30, 2009
143Thursday, April 30, 2009
A
B
C
D
E
Compal Confidential
Model Name : KAQB0 File Name : LA5011P P/N:DA60000B110
1 1
HDMI Conn.
5 IN 1
Card Reader JMB380
LS-5017
2 2
1394 Conn.
LS-501A
UMA SKU
HDMI board
7318 Level shift
page 21
page25
TMDS
Fan Control
LCD Conn.
multiplex
PI3LVD1012 PI3V512QE
MXM III VGA/B
PCI-Express
page4
page23
LVDS
page21
CRT Conn.
page24
multiplex
PCI-Express
16X
PCI-Express
Intel Montevina Processor
uPGA-478 Package
(Socket P)
H_A#(3..35) H_D#(0..63)
LVDS
FSB
800/1066MHz
Intel Cantiga
uFCBGA-1329
page7,8,9,10,11,12
DMI
Intel ICH9-M
page4,5,6
C-Link
Thermal Sensor
EMC1402-1-ACZL
DDR3 800 MHz 1.5/0.75V
page4
Dual Channel
USB Bus
Clock Generator
ICS9LPRS387
page15
DDR3-SO-DIMM X2
BANK 0, 1, 2, 3
Bluetooth Conn
page32
page13,14
LS-5015
Finger Print
SS801U
page32
CMOS
port 2
CDROM CONN
page32
page32
S-ATA
BGA-676
page16,17,18,19
port 3
E-SATA Conn.
page20
3.3V 24.576MHz/48Mhz
LPC BUS
ENE KB926
page20
Touch Pad
page32
LS-5017
MINI Card 1,2
WLAN TV tuner
LS-501A
page20
HDMI board
7318 Level shift
page 21
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
page31
GMCH HDA
page7
Int.KBD
page31
BIOS
page30
2007/09/20 2008/09/20
2007/09/20 2008/09/20
2007/09/20 2008/09/20
Deciphered Date
Deciphered Date
Deciphered Date
HD Audio
HDA Codec
UMA SKU
ALC889X
APA2051 APA3011
Audio AMP
page28
Phone Jack x3
page28
D
USB conn x3
3.3V 48MHz
page29
MXM SPDIF
page27
Audio AMP
page28
Subwoofer
page28
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
B
B
B
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC,MB A5011
SCHEMATIC,MB A5011
SCHEMATIC,MB A5011
401673
401673
401673
port 0
New Card Socket
LS-5017
MINI Card 1,2
WLAN
TV tuner
page20page29
LAN(GbE)
BROADCOM BCM5764
page26
SATA HDD Conn.
RJ45
page25
3 3
page20
RTC CKT.
page17
LS-5011
Backlight sensor Conn
Power On/Off CKT.
page33
DC/DC Interface CKT.
page34
Power Circuit DC/DC
4 4
page35,36,37,38,39,40,41
ENE-SB3520
page33
LS-5012
Launch sensor Conn
ENE-SB3520
LS-5013
page33
Media sensor Conn
CYPRESS-CY8C20434
LS-5014
page33
VR/B Conn
SW EC05E1210401 2
http://laptop-motherboard-schematic.blogspot.com/
A
LEVEL ALPS
page28
LS-5015
Finger Print
SS801U
LS-5016
page32
USB & TV Conn
page29
LS-5018
POWER SAVING Conn
LS-5019
Touch pad Button Conn
B
page27
E
Camera 1.3M
page23
of
of
of
243Thursday, April 30, 2009
243Thursday, April 30, 2009
243Thursday, April 30, 2009
B
B
B
A
Voltage Rails
State
S0
S1
S3
S5 S4/AC
S5 S4/ Battery only
S5 S4/AC & Battery don't exist
1 1
O MEANS ON X MEANS OFF
power plane
+5VS +3VS +1.5VS +0.75V
+B
O O O O O
X
+5VALW
+3VALW
O O O O
X XX X
+1.5V
O
XX X
+VCCP +CPU_CORE
+1.8VS
OO OO
X
X
SMBUS Control Table
Symbol Note :
: means Digital Ground
: means Analog Ground
@ : means just reserve , no build DEBUG@ : means just reserve for debug.
SOURCE
INVERTER BATT EEPROM
SERIAL SENSOR
THERMAL (CPU)
SODIMM CLK CHIP
MINI CARD
LCD
I2C / SMBUS ADDRESSING
DEVICE
DDR SO-DIMM 0 DDR SO-DIMM 1 CLOCK GENERATOR (EXT.)
HEX
A0
D2
ADDRESS
1 0 1 0 0 0 0 0 1 0 1 0 0 1 0 0A4 1 1 0 1 0 0 1 0
http://laptop-motherboard-schematic.blogspot.com/
SMB_EC_CK1 SMB_EC_DA1
SMB_EC_CK2 SMB_EC_DA2
SMB_CK_CLK1 SMB_CK_DAT1 ICH9
LCD_CLK LCD_DAT
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
KB926
KB926
Cantiga
2007/09/29 2007/09/29
2007/09/29 2007/09/29
2007/09/29 2007/09/29
X X
X XX
Deciphered Date
Deciphered Date
Deciphered Date
VV
XX X
X XX
XX
V
X
X
X
X
VVV
XX
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
401673
401673
401673
XX X
X X
X
SCHEMATIC,MB A5011
SCHEMATIC,MB A5011
SCHEMATIC,MB A5011
V
of
of
of
343Thursday, April 30, 2009
343Thursday, April 30, 2009
343Thursday, April 30, 2009
B
B
B
5
4
3
2
1
D D
XDP_TDI
+3VS
0.1U_0402_16V4ZC20.1U_0402_16V4Z
C3
C3
1 2
2200P_0402_50V7K
2200P_0402_50V7K
+5VS
1 2
0_0402_5%
0_0402_5%
R1007
R1007
XDP_TMS
XDP_TRST# XDP_TCK
1
2
H_A#[3..16](7)
H_ADSTB#0(7)
H_REQ#0(7) H_REQ#1(7) H_REQ#2(7) H_REQ#3(7) H_REQ#4(7)
C C
B B
A A
http://laptop-motherboard-schematic.blogspot.com/
H_A#[17..35](7)
H_ADSTB#1(7)
H_A20M#(17)
H_FERR#(17)
H_IGNNE#(17) H_STPCLK#(17)
H_INTR(17)
H_NMI(17) H_SMI#(17)
T6T6
+VCCP
B
B
E
H_PROCHOT# OCP#
H_IERR#
E
3 1
Q2
@
Q2
@
MMBT3904_SOT23
MMBT3904_SOT23
+VCCP
5
12
@
@ R17
R17 56_0402_5%
56_0402_5%
2
C
C
R18
R18 56_0402_5%
56_0402_5%
1 2
H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16 H_ADSTB#0
H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4
H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 H_A#32 H_A#33 H_A#34 H_A#35 H_ADSTB#1
H_A20M# H_FERR# H_IGNNE#
H_STPCLK# H_INTR H_NMI H_SMI#
TEST7
JCPU1A
JCPU1A
J4
ADDR GROUP 0 ADDR GROUP 1
ADDR GROUP 0 ADDR GROUP 1
A[3]#
L5
A[4]#
L4
A[5]#
K5
A[6]#
M3
A[7]#
N2
A[8]#
J1
A[9]#
N3
A[10]#
P5
A[11]#
P2
A[12]#
L2
A[13]#
P4
A[14]#
P1
A[15]#
R1
A[16]#
M1
ADSTB[0]#
K3
REQ[0]#
H2
REQ[1]#
K2
REQ[2]#
J3
REQ[3]#
L1
REQ[4]#
Y2
A[17]#
U5
A[18]#
R3
A[19]#
W6
A[20]#
U4
A[21]#
Y5
A[22]#
U1
A[23]#
R4
A[24]#
T5
A[25]#
T3
A[26]#
W2
A[27]#
W5
A[28]#
Y4
A[29]#
U2
A[30]#
V4
A[31]#
W3
A[32]#
AA4
A[33]#
AB2
A[34]#
AA3
A[35]#
V1
ADSTB[1]#
A6
A20M#
A5
FERR#
C4
IGNNE#
D5
STPCLK#
C6
LINT0
B4
LINT1
A3
SMI#
M4
RSVD[01]
N5
RSVD[02]
T2
RSVD[03]
V3
RSVD[04]
B2
RSVD[05]
C3
RSVD[06]
D2
RSVD[07]
D22
RSVD[08]
D3
RSVD[09]
F6
RSVD[10]
FOX_PZ4782A-274M-41_Merom
FOX_PZ4782A-274M-41_Merom CONN@
CONN@
OCP# (18)
DEFER#
DRDY# DBSY#
LOCK#
CONTROL
CONTROL
RESET#
RS[0]# RS[1]# RS[2]#
TRDY#
BPM[0]# BPM[1]# BPM[2]# BPM[3]#
PRDY# PREQ#
TRST#
XDP/ITP SIGNALS
XDP/ITP SIGNALS
THERMAL
THERMAL
PROCHOT#
THERMDA THERMDC
ICH
ICH
THERMTRIP#
H CLK
H CLK
BCLK[0] BCLK[1]
RESERVED
RESERVED
ADS# BNR#
BPRI#
BR0#
IERR#
INIT#
HIT#
HITM#
TCK
TDO TMS
DBR#
H_ADS#
H1
H_BNR#
E2
H_BPRI#
G5
H_DEFER#
H5
H_DRDY#
F21
H_DBSY#
E1
H_BR0#
F1
H_IERR#
D20
H_INIT#
B3
H_LOCK#
H4
H_RESET#
C1
H_RS#0
F3
H_RS#1
F4
H_RS#2
G3
H_TRDY#
G2
H_HIT#
G6
H_HITM#
E4 AD4
AD3 AD1 AC4 AC2
XDP_BPM#5
AC1
XDP_TCK
AC5
XDP_TDI
AA6
TDI
AB3
XDP_TMS
AB5
XDP_TRST#
AB6
XDP_DBRESET#
C20
H_PROCHOT# D21 A24
H_THERMDC_R
B25
H_THERMTRIP#
C7
CLK_CPU_BCLK
A22
CLK_CPU_BCLK#
A21
4
H_ADS# (7) H_BNR# (7)
H_BPRI# (7)
H_DEFER# (7) H_DRDY# (7) H_DBSY# (7)
H_BR0# (7)
T1T1
H_INIT# (17) H_LOCK# (7) H_RESET# (7)
H_RS#0 (7)
H_RS#1 (7)
H_RS#2 (7)
H_TRDY# (7)
H_HIT# (7) H_HITM# (7)
R13 68_0402_5%R13 68_0402_5%
1 2
R14 0_0402_5%R14 0_0402_5%
1 2
R15 0_0402_5%R15 0_0402_5%
1 2
H_THERMTRIP# (7,17)
CLK_CPU_BCLK (15) CLK_CPU_BCLK# (15)
H_THERMDA, H_THERMDC routing together, Trace width / Spacing = 10 / 10 mil
PJSOT05C-LF-T7_SOT23-3
PJSOT05C-LF-T7_SOT23-3
PJSOT05C-LF-T7_SOT23-3
PJSOT05C-LF-T7_SOT23-3
XDP_DBRESET# (18)
+VCCP
H_THERMDAH_THERMDA_R H_THERMDC
2007/09/011
+VCC_FAN1
EN_FAN1(31)
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2007/09/29 2007/09/29
2007/09/29 2007/09/29
2007/09/29 2007/09/29
EN_FAN1
Deciphered Date
Deciphered Date
Deciphered Date
R60 150_0402_1%R60 150_0402_1% R50 39_0402_1%R50 39_0402_1%
2
3
D28
D28
1
R62 56_0402_5%R62 56_0402_5% R49 54.9_0402_1%R49 54.9_0402_1%
2
3
D29
D29
1
C2
H_THERMDA H_THERMDC
Address:100_1100
C638
C638
1 2
10U_0805_10V4Z
10U_0805_10V4Z
U19
U19
1
VEN
2
VIN
3
VO
4
VSET
1
C949
C949
G990P11U SOP
G990P11U SOP
0.1U_0402_16V4Z
0.1U_0402_16V4Z SA00002GW00
SA00002GW00
2
@
@
FAN_SPEED1(31)
2
1 2 1 2
1 2 1 2
U1
U1
1
VDD
2
D+
3
D-
4
THERM
ADT7421ARMZ-REEL_MSOP8
ADT7421ARMZ-REEL_MSOP8
GND GND GND GND
+3VS
+VCCP
SA00001Z700
SA00001Z700
SMB_EC_CK2
SCLK
SDATA
ALERT/THERM2
GND
8 7 6 5
SMB_EC_DA2
R195
R195
1 2
10K_0402_5%
10K_0402_5%
SMB_EC_CK2 (31)
SMB_EC_DA2 (31)
+3VS
FAN1 Conn
+5VS
12
D53
D53 1SS355_SOD323-2
8 7 6 5
12
R538
R538 10K_0402_5%
10K_0402_5%
1
C641
C641 1000P_0402_50V7K
1000P_0402_50V7K
2
40mil
+VCC_FAN1
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
401673
401673
401673
Date: Sheet
Date: Sheet
Date: Sheet
1SS355_SOD323-2
D54
D54
1 2
BAS16_SOT23-3
BAS16_SOT23-3
C639
C639
1 2
10U_0805_10V4Z
10U_0805_10V4Z
C640
C640
1000P_0402_50V7K
1000P_0402_50V7K
1 2
JP32
JP32
1
1
2
2
3
3
4
GND
5
GND
E&T_3801-F03N-01R
E&T_3801-F03N-01R CONN@
CONN@
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
SCHEMATIC,MB A5011
SCHEMATIC,MB A5011
SCHEMATIC,MB A5011
1
B
B
B
of
of
of
443Thursday, April 30, 2009
443Thursday, April 30, 2009
443Thursday, April 30, 2009
5
4
3
2
1
H_D#[0..15](7)
D D
H_DSTBN#0(7) H_DSTBP#0(7) H_DINV#0(7) H_D#[16..31](7)
C C
R21 1K_0402_5%@R21 1K_0402_5%@ R22 1K_0402_5%@R22 1K_0402_5%@
H_DSTBN#1(7) H_DSTBP#1(7) H_DINV#1(7)
1 2 1 2
CPU_BSEL0(15) CPU_BSEL1(15) CPU_BSEL2(15)
T2T2 T3T3 T4T4 T5T5
H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 H_DSTBN#0 H_DSTBP#0 H_DINV#0
H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 H_DSTBN#1 H_DSTBP#1 H_DINV#1
V_CPU_GTLREF
TEST1 TEST2 TEST3 TEST4 TEST5 TEST6
CPU_BSEL0 CPU_BSEL1 CPU_BSEL2
JCPU1B
JCPU1B
E22
D[0]#
F24
D[1]#
E26
D[2]#
G22
D[3]#
F23
D[4]#
G25
D[5]#
E25
D[6]#
E23
D[7]#
K24
D[8]#
G24
D[9]#
J24
D[10]#
J23
D[11]#
H22
D[12]#
F26
D[13]#
K22
D[14]#
H23
D[15]#
J26
DSTBN[0]#
H26
DSTBP[0]#
H25
DINV[0]#
N22
D[16]#
K25
D[17]#
P26
D[18]#
R23
D[19]#
L23
D[20]#
M24
D[21]#
L22
D[22]#
M23
D[23]#
P25
D[24]#
P23
D[25]#
P22
D[26]#
T24
D[27]#
R24
D[28]#
L25
D[29]#
T25
D[30]#
N25
D[31]#
L26
DSTBN[1]#
M26
DSTBP[1]#
N24
DINV[1]#
AD26
GTLREF
AF26
C23 D25 C24
AF1 A26
B22 B23 C21
MISC
MISC
TEST1 TEST2 TEST3 TEST4 TEST5 TEST6
BSEL[0] BSEL[1] BSEL[2]
FOX_PZ4782A-274M-41_Merom
FOX_PZ4782A-274M-41_Merom CONN@
CONN@
D[32]# D[33]# D[34]#
DATA GRP 0
DATA GRP 0
D[35]# D[36]# D[37]# D[38]# D[39]# D[40]# D[41]# D[42]# D[43]# D[44]# D[45]# D[46]#
DATA GRP 2
DATA GRP 2
D[47]# DSTBN[2]# DSTBP[2]#
DINV[2]#
D[48]#
D[49]#
D[50]#
D[51]#
DATA GRP 1
DATA GRP 1
D[52]#
D[53]#
D[54]#
D[55]#
D[56]#
D[57]#
D[58]#
D[59]#
D[60]#
D[61]#
D[62]#
D[63]# DSTBN[3]#
DATA GRP 3
DATA GRP 3
DSTBP[3]#
DINV[3]# COMP[0]
COMP[1] COMP[2] COMP[3]
DPRSTP#
DPSLP#
DPWR#
PWRGOOD
SLP#
PSI#
Y22 AB24 V24 V26 V23 T22 U25 U23 Y25 W22 Y23 W24 W25 AA23 AA24 AB25 Y26 AA26 U22
AE24 AD24 AA21 AB22 AB21 AC26 AD20 AE22 AF23 AC25 AE21 AD21 AC22 AD23 AF22 AC23 AE25 AF24 AC20
R26 U26 AA1 Y1
E5 B5 D24 D6 D7 AE6
H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 H_DSTBN#2 H_DSTBP#2 H_DINV#2
H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63 H_DSTBN#3 H_DSTBP#3 H_DINV#3
COMP0 COMP1 COMP2 COMP3
H_DPRSTP# H_DPSLP# H_DPWR# H_PWRGOOD H_CPUSLP# H_PSI#
layout note: Route TEST3 & TEST5 traces on ground referenced layer to the TPs
CPU_BSEL CPU_BSEL2 CPU_BSEL1
B B
166
200
01
0
1
266 0 0 0
CPU_BSEL0
1
0
V_CPU_GTLREF
+VCCP
12
R27
R27 1K_0402_1%
1K_0402_1%
12
R29
R29 2K_0402_1%
2K_0402_1%
H_D#[32..47] (7)
H_DSTBN#2 (7) H_DSTBP#2 (7) H_DINV#2 (7) H_D#[48..63] (7)
H_DSTBN#3 (7) H_DSTBP#3 (7) H_DINV#3 (7)
H_DPRSTP# (7,17,41)
H_DPSLP# (17) H_DPWR# (7) H_PWRGOOD (17)
H_CPUSLP# (7) H_PSI# (41)
R24
R24
R23
R23 12
54.9_0402_1%
54.9_0402_1%
Resistor placed within
0.5" of CPU pin.Trace should be at least 25 mils away from any other toggling signal. COMP[0,2] trace width is 18 mils. COMP[1,3] trace width is 4 mils.
12
27.4_0402_1%
27.4_0402_1%
54.9_0402_1%
54.9_0402_1%
R25
R25 12
27.4_0402_1%
27.4_0402_1%
+VCC_CORE +VCC_CORE
R26
R26 12
JCPU1C
JCPU1C
A7
VCC[001]
A9
VCC[002]
A10
VCC[003]
A12
VCC[004]
A13
VCC[005]
A15
VCC[006]
A17
VCC[007]
A18
VCC[008]
A20
VCC[009]
B7
VCC[010]
B9
VCC[011]
B10
VCC[012]
B12
VCC[013]
B14
VCC[014]
B15
VCC[015]
B17
VCC[016]
B18
VCC[017]
B20
VCC[018]
C9
VCC[019]
C10
VCC[020]
C12
VCC[021]
C13
VCC[022]
C15
VCC[023]
C17
VCC[024]
C18
VCC[025]
D9
VCC[026]
D10
VCC[027]
D12
VCC[028]
D14
VCC[029]
D15
VCC[030]
D17
VCC[031]
D18
VCC[032]
E7
VCC[033]
E9
VCC[034]
E10
VCC[035]
E12
VCC[036]
E13
VCC[037]
E15
VCC[038]
E17
VCC[039]
E18
VCC[040]
E20
VCC[041]
F7
VCC[042]
F9
VCC[043]
F10
VCC[044]
F12
VCC[045]
F14
VCC[046]
F15
VCC[047]
F17
VCC[048]
F18
VCC[049]
F20
VCC[050]
AA7
VCC[051]
AA9
VCC[052]
AA10
VCC[053]
AA12
VCC[054]
AA13
VCC[055]
AA15
VCC[056]
AA17
VCC[057]
AA18
VCC[058]
AA20
VCC[059]
AB9
VCC[060]
AC10
VCC[061]
AB10
VCC[062]
AB12
VCC[063]
AB14
VCC[064]
AB15
VCC[065]
AB17
VCC[066]
AB18
VCC[067]
FOX_PZ4782A-274M-41_Merom
FOX_PZ4782A-274M-41_Merom
VCC[068] VCC[069] VCC[070] VCC[071] VCC[072] VCC[073] VCC[074] VCC[075] VCC[076] VCC[077] VCC[078] VCC[079] VCC[080] VCC[081] VCC[082] VCC[083] VCC[084] VCC[085] VCC[086] VCC[087] VCC[088] VCC[089] VCC[090] VCC[091] VCC[092] VCC[093] VCC[094] VCC[095] VCC[096] VCC[097] VCC[098] VCC[099] VCC[100]
VCCP[01] VCCP[02] VCCP[03] VCCP[04] VCCP[05] VCCP[06] VCCP[07] VCCP[08] VCCP[09] VCCP[10] VCCP[11] VCCP[12] VCCP[13] VCCP[14] VCCP[15] VCCP[16]
VCCA[01] VCCA[02]
VCCSENSE
VSSSENSE
AB20 AB7 AC7 AC9 AC12 AC13 AC15 AC17 AC18 AD7 AD9 AD10 AD12 AD14 AD15 AD17 AD18 AE9 AE10 AE12 AE13 AE15 AE17 AE18 AE20 AF9 AF10 AF12 AF14 AF15 AF17 AF18 AF20
R19 0_0402_5%R19 0_0402_5%
G21
R20 0_0402_5%R20 0_0402_5%
V6 J6 K6 M6 J21 K21 M21 N21 N6 R21 R6 T21 T6 V21 W21
B26 C26
AD6
VID[0]
AF5
VID[1]
AE5
VID[2]
AF4
VID[3]
AE3
VID[4]
AF3
VID[5]
AE2
VID[6]
VCCSENSE
AF7
AE7
.
. CONN@
CONN@
+VCCP
1 2 1 2
1
+
+
C6
C6 330U_D2E_2.5VM_R15
330U_D2E_2.5VM_R15
2
0814 Change to 220uF 0819 Change to C_D2E
VSSSENSE
CPU_VID0 (41) CPU_VID1 (41) CPU_VID2 (41) CPU_VID3 (41) CPU_VID4 (41) CPU_VID5 (41) CPU_VID6 (41)
VCCSENSE (41)
VSSSENSE (41)
1
C7
2
10U_0805_6.3V6MC710U_0805_6.3V6M
Length match within 25 mils. The trace width/space/other is 20/7/25.
+VCC_CORE
R28 100_0402_1%R28 100_0402_1%
1 2
R30 100_0402_1%R30 100_0402_1%
1 2
1
2
0.01U_0402_16V7KC80.01U_0402_16V7K
Near pin B26
VCCSENSE
VSSSENSE
+1.5VS
C8
Close to CPU pin AD26 within 500mils.
A A
Security Classification
Security Classification
http://laptop-motherboard-schematic.blogspot.com/
5
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2007/09/29 2007/09/29
2007/09/29 2007/09/29
2007/09/29 2007/09/29
Deciphered Date
Deciphered Date
Deciphered Date
2
Close to CPU pin within 500mils.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC,MB A5011
SCHEMATIC,MB A5011
SCHEMATIC,MB A5011
401673
401673
401673
1
of
of
of
543Thursday, April 30, 2009
543Thursday, April 30, 2009
543Thursday, April 30, 2009
B
B
B
5
D D
C C
B B
JCPU1D
JCPU1D A4 A8
A11 A14 A16 A19 A23 AF2
B6 B8
B11 B13 B16 B19 B21 B24
C5 C8
C11 C14 C16 C19
C2
C22 C25
D1 D4 D8
D11 D13 D16 D19 D23 D26
E3 E6 E8
E11 E14 E16 E19 E21 E24
F5 F8
F11 F13 F16 F19
F2
F22 F25
G4 G1
G23 G26
H3 H6
H21 H24
J2 J5
J22 J25
K1 K4
K23 K26
L3 L6
L21 L24
M2
M5 M22 M25
N1
N4 N23 N26
VSS[082]
VSS[001] VSS[002]
VSS[083]
VSS[003]
VSS[084]
VSS[004]
VSS[085]
VSS[005]
VSS[086]
VSS[006]
VSS[087]
VSS[007]
VSS[088]
VSS[008]
VSS[089]
VSS[009]
VSS[090]
VSS[010]
VSS[091]
VSS[011]
VSS[092]
VSS[012]
VSS[093]
VSS[013]
VSS[094]
VSS[014]
VSS[095]
VSS[015]
VSS[096]
VSS[016]
VSS[097]
VSS[017]
VSS[098]
VSS[018]
VSS[099]
VSS[019]
VSS[100]
VSS[020]
VSS[101]
VSS[021]
VSS[102]
VSS[022]
VSS[103]
VSS[023]
VSS[104]
VSS[024]
VSS[105]
VSS[025]
VSS[106]
VSS[026]
VSS[107]
VSS[027]
VSS[108]
VSS[028]
VSS[109]
VSS[029]
VSS[110]
VSS[030]
VSS[111]
VSS[031]
VSS[112]
VSS[032]
VSS[113]
VSS[033]
VSS[114]
VSS[034]
VSS[115]
VSS[035]
VSS[116]
VSS[036]
VSS[117]
VSS[037]
VSS[118]
VSS[038]
VSS[119]
VSS[039]
VSS[120]
VSS[040]
VSS[121]
VSS[041]
VSS[122]
VSS[042]
VSS[123]
VSS[043]
VSS[124]
VSS[044]
VSS[125]
VSS[045]
VSS[126]
VSS[046]
VSS[127]
VSS[047]
VSS[128]
VSS[048]
VSS[129]
VSS[049]
VSS[130]
VSS[050]
VSS[131]
VSS[051]
VSS[132]
VSS[052]
VSS[133]
VSS[053]
VSS[134]
VSS[054]
VSS[135]
VSS[055]
VSS[136]
VSS[056]
VSS[137]
VSS[057]
VSS[138]
VSS[058]
VSS[139]
VSS[059]
VSS[140]
VSS[060]
VSS[141]
VSS[061]
VSS[142]
VSS[062]
VSS[143]
VSS[063]
VSS[144]
VSS[064]
VSS[145]
VSS[065]
VSS[146]
VSS[066]
VSS[147] VSS[148]
VSS[067] VSS[068]
VSS[149]
VSS[069]
VSS[150]
VSS[070]
VSS[151]
VSS[071]
VSS[152]
VSS[072]
VSS[153]
VSS[073]
VSS[154]
VSS[074]
VSS[155]
VSS[075]
VSS[156]
VSS[076]
VSS[157]
VSS[077]
VSS[158]
VSS[078]
VSS[159]
VSS[079]
VSS[160]
VSS[080]
VSS[161]
VSS[081]P3VSS[162]
VSS[163]
FOX_PZ4782A-274M-41_Merom
FOX_PZ4782A-274M-41_Merom
P6 P21 P24 R2 R5 R22 R25 T1 T4 T23 T26 U3 U6 U21 U24 V2 V5 V22 V25 W1 W4 W23 W26 Y3 Y6 Y21 Y24 AA2 AA5 AA8 AA11 AA14 AA16 AA19 AA22 AA25 AB1 AB4 AB8 AB11 AB13 AB16 AB19 AB23 AB26 AC3 AC6 AC8 AC11 AC14 AC16 AC19 AC21 AC24 AD2 AD5 AD8 AD11 AD13 AD16 AD19 AD22 AD25 AE1 AE4 AE8 AE11 AE14 AE16 AE19 AE23 AE26 A2 AF6 AF8 AF11 AF13 AF16 AF19 AF21 A25 AF25
.
. CONN@
CONN@
4
+VCC_CORE
Place these capacitors on L8 (North side,Secondary Layer)
+VCC_CORE
Place these capacitors on L8 (North side,Secondary Layer)
+VCC_CORE
Place these capacitors on L8 (Sorth side,Secondary Layer)
+VCC_CORE
Place these capacitors on L8 (Sorth side,Secondary Layer)
Mid Frequence Decoupling
+VCC_CORE
C41
C41
330U_D2E_2.5VM_R9
330U_D2E_2.5VM_R9
1
C46
C46
0.1U_0402_10V6K
0.1U_0402_10V6K
2
+VCCP
1
C45
C45
0.1U_0402_10V6K
0.1U_0402_10V6K
2
330U_D2E_2.5VM_R9
330U_D2E_2.5VM_R9
1
C9
C9 10U_0805_6.3V6M
10U_0805_6.3V6M
2
1
C17
C17 10U_0805_6.3V6M
10U_0805_6.3V6M
2
1
C25
C25 10U_0805_6.3V6M
10U_0805_6.3V6M
2
1
C33
C33 10U_0805_6.3V6M
10U_0805_6.3V6M
2
1
+
+
C42
C42
2
1
+
+
2
1
C10
C10 10U_0805_6.3V6M
10U_0805_6.3V6M
2
1
C18
C18 10U_0805_6.3V6M
10U_0805_6.3V6M
2
1
C26
C26 10U_0805_6.3V6M
10U_0805_6.3V6M
2
1
C34
C34 10U_0805_6.3V6M
10U_0805_6.3V6M
2
330U_D2E_2.5VM_R9
330U_D2E_2.5VM_R9
1
+
+
C43
C43
2
330U_D2E_2.5VM_R9
330U_D2E_2.5VM_R9
0814 Change to C_D2E
Place these inside socket cavity on L8 (North side Secondary)
1
C47
C47
0.1U_0402_10V6K
0.1U_0402_10V6K
2
3
C44
C44
1
C11
C11 10U_0805_6.3V6M
10U_0805_6.3V6M
2
1
C19
C19 10U_0805_6.3V6M
10U_0805_6.3V6M
2
1
C27
C27 10U_0805_6.3V6M
10U_0805_6.3V6M
2
1
C35
C35 10U_0805_6.3V6M
10U_0805_6.3V6M
2
1
+
+
2
1
C48
C48
0.1U_0402_10V6K
0.1U_0402_10V6K
2
1
C12
C12 10U_0805_6.3V6M
10U_0805_6.3V6M
2
1
C20
C20 10U_0805_6.3V6M
10U_0805_6.3V6M
2
1
C28
C28 10U_0805_6.3V6M
10U_0805_6.3V6M
2
1
C36
C36 10U_0805_6.3V6M
10U_0805_6.3V6M
2
1
C49
C49
0.1U_0402_10V6K
0.1U_0402_10V6K
2
1
C13
C13 10U_0805_6.3V6M
10U_0805_6.3V6M
2
1
C21
C21 10U_0805_6.3V6M
10U_0805_6.3V6M
2
1
C29
C29 10U_0805_6.3V6M
10U_0805_6.3V6M
2
1
C37
C37 10U_0805_6.3V6M
10U_0805_6.3V6M
2
1
C50
C50
0.1U_0402_10V6K
0.1U_0402_10V6K
2
2
1
C14
C14 10U_0805_6.3V6M
10U_0805_6.3V6M
2
1
C22
C22 10U_0805_6.3V6M
10U_0805_6.3V6M
2
1
C30
C30 10U_0805_6.3V6M
10U_0805_6.3V6M
2
1
C38
C38 10U_0805_6.3V6M
10U_0805_6.3V6M
2
1
C15
C15 10U_0805_6.3V6M
10U_0805_6.3V6M
2
1
C23
C23 10U_0805_6.3V6M
10U_0805_6.3V6M
2
1
C31
C31 10U_0805_6.3V6M
10U_0805_6.3V6M
2
1
C39
C39 10U_0805_6.3V6M
10U_0805_6.3V6M
2
1
C16
C16 10U_0805_6.3V6M
10U_0805_6.3V6M
2
1
C24
C24 10U_0805_6.3V6M
10U_0805_6.3V6M
2
1
C32
C32 10U_0805_6.3V6M
10U_0805_6.3V6M
2
1
C40
C40 10U_0805_6.3V6M
10U_0805_6.3V6M
2
1
A A
Security Classification
Security Classification
http://laptop-motherboard-schematic.blogspot.com/
5
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2007/09/29 2007/09/29
2007/09/29 2007/09/29
2007/09/29 2007/09/29
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
2
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC,MB A5011
SCHEMATIC,MB A5011
SCHEMATIC,MB A5011
401673
401673
401673
1
B
B
B
of
of
of
643Thursday, April 30, 2009
643Thursday, April 30, 2009
643Thursday, April 30, 2009
5
U2A
M11
N12
N10
AD14
AA8
AA13
AA9 AA11 AD11 AD10 AD13 AE12
AE9
AA2
AD8
AA3
AD3
AD7 AE14
AF3
AC1
AE3
AC3 AE11
AE8
AG2
AD6
C12
F2 G8 F8
E6 G2 H6 H2
F6 D4 H3 M9
J1
J2
J6
P2
L2 R2 N9
L6 M5
J3 N2 R1 N5 N6
P13
N8
L7 M3
Y3
Y6
Y10 Y12 Y14
Y7 W2
Y9
C5
E3
E11
A11 B11
U2A
H_D#_0 H_D#_1 H_D#_2 H_D#_3 H_D#_4 H_D#_5 H_D#_6 H_D#_7 H_D#_8 H_D#_9 H_D#_10 H_D#_11 H_D#_12 H_D#_13 H_D#_14 H_D#_15 H_D#_16 H_D#_17 H_D#_18 H_D#_19 H_D#_20 H_D#_21 H_D#_22 H_D#_23 H_D#_24 H_D#_25 H_D#_26 H_D#_27 H_D#_28 H_D#_29 H_D#_30 H_D#_31 H_D#_32 H_D#_33 H_D#_34 H_D#_35 H_D#_36 H_D#_37 H_D#_38 H_D#_39 H_D#_40 H_D#_41 H_D#_42 H_D#_43 H_D#_44 H_D#_45 H_D#_46 H_D#_47 H_D#_48 H_D#_49 H_D#_50 H_D#_51 H_D#_52 H_D#_53 H_D#_54 H_D#_55 H_D#_56 H_D#_57 H_D#_58 H_D#_59 H_D#_60 H_D#_61 H_D#_62 H_D#_63
H_SWING H_RCOMP
H_CPURST# H_CPUSLP#
H_AVREF H_DVREF
CANTIGA_1p0
CANTIGA_1p0
+VCCP
12
R46
R46
221_0603_1%
221_0603_1%
12
R54
R54
100_0402_1%
100_0402_1%
0.1U_0402_16V4Z
0.1U_0402_16V4Z
H_SWNG
1
C59
C59
2
H_ADSTB#_0 H_ADSTB#_1
H_BREQ#
H_DEFER#
HPLL_CLK
HPLL_CLK#
H_DPWR#
HOST
HOST
H_DRDY#
H_DINV#_0 H_DINV#_1 H_DINV#_2 H_DINV#_3
H_DSTBN#_0 H_DSTBN#_1 H_DSTBN#_2 H_DSTBN#_3
H_DSTBP#_0 H_DSTBP#_1 H_DSTBP#_2 H_DSTBP#_3
H_REQ#_0 H_REQ#_1 H_REQ#_2 H_REQ#_3 H_REQ#_4
change logic define by EC
+VCCP
H_D#[0..63](5)
D D
C C
H_RESET#(4)
H_CPUSLP#(5)
B B
Layout Note: H_RCOMP / H_VREF / H_SWNG
trace width and spacing is 10/20
+VCCP
12
R45
R45
1K_0402_1%
1K_0402_1%
12
2K_0402_1%
2K_0402_1%
A A
H_VREF
1
C58
C58
R52
R52
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63
H_SWNG H_RCOMP
H_RESET# H_CPUSLP#
H_VREF
H_RCOMP
12
R53
R53
24.9_0402_1%
24.9_0402_1%
Near B3 pinwithin 100 mils from NB
MCH_TSATN#
http://laptop-motherboard-schematic.blogspot.com/
5
H_A#_3 H_A#_4 H_A#_5 H_A#_6 H_A#_7 H_A#_8
H_A#_9 H_A#_10 H_A#_11 H_A#_12 H_A#_13 H_A#_14 H_A#_15 H_A#_16 H_A#_17 H_A#_18 H_A#_19 H_A#_20 H_A#_21 H_A#_22 H_A#_23 H_A#_24 H_A#_25 H_A#_26 H_A#_27 H_A#_28 H_A#_29 H_A#_30 H_A#_31 H_A#_32 H_A#_33 H_A#_34 H_A#_35
H_ADS#
H_BNR# H_BPRI#
H_DBSY#
H_HIT#
H_HITM# H_LOCK# H_TRDY#
H_RS#_0 H_RS#_1 H_RS#_2
12
1 2
4
A14 C15 F16 H13 C18 M16 J13 P16 R16 N17 M13 E17 P17 F17 G20 B19 J16 E20 H16 J20 L17 A17 B17 L16 C21 J17 H20 B18 K17 B20 F21 K21 L20
H12 B16 G17 A9 F11 G12 E9 B10 AH7 AH6 J11 F9 H9 E12 H11 C9
J8 L3 Y13 Y1
L10 M7 AA5 AE6
L9 M8 AA6 AE5
B15 K13 F13 B13 B14
B6 F12 C8
R64
R64
54.9_0402_1%
54.9_0402_1% R68
R68
330_0402_5%
330_0402_5%
4
H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16 H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 H_A#32 H_A#33 H_A#34 H_A#35
H_ADS# H_ADSTB#0 H_ADSTB#1 H_BNR# H_BPRI# H_BR0# H_DEFER# H_DBSY# CLK_MCH_BCLK CLK_MCH_BCLK# H_DPWR# H_DRDY# H_HIT# H_HITM# H_LOCK# H_TRDY#
H_DINV#0 H_DINV#1 H_DINV#2 H_DINV#3
H_DSTBN#0 H_DSTBN#1 H_DSTBN#2 H_DSTBN#3
H_DSTBP#0 H_DSTBP#1 H_DSTBP#2 H_DSTBP#3
H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4
H_RS#0 H_RS#1 H_RS#2
Layout Note: V_DDR_MCH_REF trace width and spacing is 20/20.
+3VS
12
R63
R63 1K_0402_5%
1K_0402_5%
C
C
Q5
Q5
2
B
B
MMBT3904_SOT23-3
MMBT3904_SOT23-3
E
E
<BOM Structure>
<BOM Structure>
3 1
H_A#[3..35] (4)
SMRCOMP_VOH
H_ADS# (4) H_ADSTB#0 (4) H_ADSTB#1 (4) H_BNR# (4) H_BPRI# (4) H_BR0# (4) H_DEFER# (4) H_DBSY# (4) CLK_MCH_BCLK (15) CLK_MCH_BCLK# (15) H_DPWR# (5) H_DRDY# (4) H_HIT# (4) H_HITM# (4) H_LOCK# (4) H_TRDY# (4)
H_DINV#0 (5) H_DINV#1 (5) H_DINV#2 (5) H_DINV#3 (5)
H_DSTBN#0 (5) H_DSTBN#1 (5) H_DSTBN#2 (5) H_DSTBN#3 (5)
H_DSTBP#0 (5) H_DSTBP#1 (5) H_DSTBP#2 (5) H_DSTBP#3 (5)
H_REQ#0 (4) H_REQ#1 (4) H_REQ#2 (4) H_REQ#3 (4) H_REQ#4 (4)
H_RS#0 (4) H_RS#1 (4) H_RS#2 (4)
PLT_RST#(16,18,20,26)
H_THERMTRIP#(4,17)
DPRSLPVR(18,41)
normal:low over temp:high
MCH_TSATN_EC# (31)
3
0915 ADD PM@
R71
@ R71
@
0_0402_5%
0_0402_5%
1 2
R72
@ R72
@
0_0402_5%
0_0402_5%
1 2
R73
@ R73
@
0_0402_5%
0_0402_5%
1 2
R74
@ R74
@
0_0402_5%
0_0402_5%
1 2
+3VS
R38
R38
1 2
10K_0402_5%
10K_0402_5% R39
R39
1 2
10K_0402_5%
10K_0402_5% R40
R40
1 2
10K_0402_5%
10K_0402_5%
MCH_CLKSEL0 MCH_CLKSEL1 MCH_CLKSEL2
T75T75 T76T76 T77T77
R1432 2.2K_0402_5%R1432 2.2K_0402_5%
1 2
T80T80 T82T82
T83T83
T86T86
+3VS
T89T89
1 2
R1843 4.02K_0402_1% @R1843 4.02K_0402_1% @
H_DPRSTP#(5,17,41)
DDR3
CFG5 CFG6 CFG7
CFG10 CFG12
CFG13
CFG16
CFG19 CFG20
PM_BMBUSY# H_DPRSTP# PM_EXTTS#0
R67 0_0402_5%R67 0_0402_5%
1 2
GMCH_PWROK PLT_RST#_NBPLT_RST# THERMTRIP# DPRSLPVR
@
@
1
C55
C55
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2007/09/29 2007/09/29
2007/09/29 2007/09/29
2007/09/29 2007/09/29
12
R31
R31 1K_0402_1%
1K_0402_1%
12
12
R33
R33 1K_0402_1%
1K_0402_1%
PM_EXTTS#0_1
+1.5V
DDR3
CLK_MCH_DREFCLK
CLK_MCH_DREFCLK#
MCH_SSCDREFCLK
MCH_SSCDREFCLK#
MCH_CLKSEL0(15) MCH_CLKSEL1(15) MCH_CLKSEL2(15)
PM_BMBUSY#(18)
1 2
R520 100_0402_5%R520 100_0402_5%
12
R44
R44 1K_0402_1%
1K_0402_1%
12
R47
R47 1K_0402_1%
1K_0402_1%
3
+1.5V
1
1
C52
C52
C51
C51
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
2
3.01K_0402_1%
3.01K_0402_1%
1
C53
C53
C54
C54
2
2
R32
R32
1
2
0.01U_0402_25V7K
0.01U_0402_25V7K
0.01U_0402_25V7K
0.01U_0402_25V7K
PM_EXTTS#0
PM_EXTTS#0_1
CLKREQ#_7
DDR3
PM_EXTTS#0_1(13,14)
1 2
R41 0_0402_5%R41 0_0402_5%
+V_DDR3_MCH_REF
1
C57
C57
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
U2B
U2B
M36
RSVD1
N36
RSVD2
R33
RSVD3
T33
RSVD4
AH9
RSVD5
AH10
RSVD6
AH12
RSVD7
AH13
RSVD8
K12
RSVD9
AL34
RSVD10
AK34
RSVD11
AN35
RSVD12
AM35
RSVD13
T24
RSVD14
B31
RSVD15
B2
RSVD16
M1
RSVD17
AY21
RSVD20
BG23
RSVD22
BF23
RSVD23
BH18
RSVD24
BF18
RSVD25
T25
CFG_0
R25
CFG_1
P25
CFG_2
P20
CFG_3
P24
CFG_4
C25
CFG_5
N24
CFG_6
M24
CFG_7
E21
CFG_8
CFG9
C23
CFG_9
C24
CFG_10
N21
CFG_11
P21
CFG_12
T21
CFG_13
R20
CFG_14
M20
CFG_15
L21
CFG_16
H21
CFG_17
P29
CFG_18
R28
CFG_19
T28
CFG_20
R29
PM_SYNC#
B7
PM_DPRSTP#
N33
PM_EXT_TS#_0
P32
PM_EXT_TS#_1
AT40
PWROK
AT11
RSTIN#
T20
THERMTRIP#
R32
DPRSLPVR
BG48
NC_1
BF48
NC_2
BD48
NC_3
BC48
NC_4
BH47
NC_5
BG47
NC_6
BE47
NC_7
BH46
NC_8
BF46
NC_9
BG45
NC_10
BH44
NC_11
BH43
NC_12
BH6
NC_13
BH5
NC_14
BG4
NC_15
BH3
NC_16
BF3
NC_17
BH2
NC_18
BG2
NC_19
BE2
NC_20
BG1
NC_21
BF1
NC_22
BD1
NC_23
BC1
NC_24
F1
NC_25
A47
NC_26
CANTIGA_1p0
CANTIGA_1p0
Deciphered Date
Deciphered Date
Deciphered Date
2
M_CLK_DDR0
AP24
SA_CK_0 SA_CK_1 SB_CK_0 SB_CK_1
SA_CK#_0 SA_CK#_1 SB_CK#_0 SB_CK#_1
SA_CKE_0 SA_CKE_1
RSVD
RSVD
CFG
CFG
PM
PM
NC
NC
2
SB_CKE_0 SB_CKE_1
SA_CS#_0 SA_CS#_1 SB_CS#_0 SB_CS#_1
SA_ODT_0 SA_ODT_1 SB_ODT_0 SB_ODT_1
SM_RCOMP
SM_RCOMP#
SM_RCOMP_VOH SM_RCOMP_VOL
SM_VREF
SM_PWROK
SM_REXT
SM_DRAMRST# DPLL_REF_CLK
DDR CLK/ CONTROL/COMPENSATION
DDR CLK/ CONTROL/COMPENSATION
DPLL_REF_CLK#
DPLL_REF_SSCLK
DPLL_REF_SSCLK#
PEG_CLK
PEG_CLK#
CLK
CLK
DMI_RXN_0 DMI_RXN_1 DMI_RXN_2 DMI_RXN_3
DMI_RXP_0 DMI_RXP_1 DMI_RXP_2 DMI_RXP_3
DMI_TXN_0 DMI_TXN_1 DMI_TXN_2 DMI_TXN_3
DMI_TXP_0 DMI_TXP_1 DMI_TXP_2
DMI
DMI
DMI_TXP_3
GFX_VID_0 GFX_VID_1 GFX_VID_2 GFX_VID_3 GFX_VID_4
GFX_VR_EN
GRAPHICS VID
GRAPHICS VID
CL_CLK
CL_DATA
CL_PWROK
CL_RST# CL_VREF
MEHDA
MEHDA
DDPC_CTRLCLK
DDPC_CTRLDATA
SDVO_CTRLCLK
SDVO_CTRLDATA
CLKREQ#
ICH_SYNC#
TSATN#
MISC
MISC
HDA_BCLK HDA_RST#
HDA_SDI
HDA_SDO
HDA_SYNC
M_CLK_DDR1
AT21
M_CLK_DDR2
AV24
M_CLK_DDR3
AU20
M_CLK_DDR#0
AR24
M_CLK_DDR#1
AR21
M_CLK_DDR#2
AU24
M_CLK_DDR#3
AV20
DDR_CKE0_DIMMA
BC28
DDR_CKE1_DIMMA
AY28
DDR_CKE2_DIMMB
AY36
DDR_CKE3_DIMMB
BB36
DDR_CS0_DIMMA#
BA17
DDR_CS1_DIMMA#
AY16
DDR_CS2_DIMMB#
AV16
DDR_CS3_DIMMB#SMRCOMP_VOL
AR13
M_ODT0
BD17
M_ODT1
AY17
M_ODT2
BF15
M_ODT3
AY13
SMRCOMP
BG22
SMRCOMP#
BH21
SMRCOMP_VOH
BF28
SMRCOMP_VOL
BH28
+V_DDR3_MCH_REF
AV42
SM_PWROK
AR36
SM_REXT
BF17
SM_DRAMRST#
BC36
CLK_MCH_DREFCLK
B38
CLK_MCH_DREFCLK#
A38
MCH_SSCDREFCLK
E41
MCH_SSCDREFCLK#
F41
CLK_MCH_3GPLL
F43
CLK_MCH_3GPLL#
E43
DMI_TXN0
AE41
DMI_TXN1
AE37
DMI_TXN2
AE47
DMI_TXN3
AH39
DMI_TXP0
AE40
DMI_TXP1
AE38
DMI_TXP2
AE48
DMI_TXP3
AH40
DMI_RXN0
AE35
DMI_RXN1
AE43
DMI_RXN2
AE46
DMI_RXN3
AH42
DMI_RXP0
AD35
DMI_RXP1
AE44
DMI_RXP2
AF46
DMI_RXP3
AH43
B33
ICH_PWROK(18)
B32 G33 F33 E33
C34
CL_CLK0
AH37
CL_DATA0
AH36 AN36
1 2
CL_RST#
AJ35
CL_VREF
AH34
N28 M28
SDVO_SCLK
G36
SDVO_SDAT
E36
CLKREQ#_7
K36
MCH_ICH_SYNC#
H36
MCH_TSATN#
B12
HDA_BITCLK_MCH
B28
HDA_RST_MCH#
B30
HDA_SDIN1_MCH
B29
HDA_SDOUT_MCH
C29
HDA_SYNC_MCH
A28
Title
Title
Title
SCHEMATIC,MB A5011
SCHEMATIC,MB A5011
SCHEMATIC,MB A5011
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
401673
401673
401673
Date: Sheet
Date: Sheet
Date: Sheet
R34 80.6_0402_1%R34 80.6_0402_1% R35 80.6_0402_1%R35 80.6_0402_1%
R37 499_0402_1%R37 499_0402_1%
VGATE(18,41)
R51
R51
0_0402_5%
0_0402_5%
T36T36 T37T37
33_0402_5%
33_0402_5%
UMA@ R109
UMA@
1 2
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
1
M_CLK_DDR0 (13) M_CLK_DDR1 (13) M_CLK_DDR2 (14) M_CLK_DDR3 (14)
M_CLK_DDR#0 (13) M_CLK_DDR#1 (13) M_CLK_DDR#2 (14) M_CLK_DDR#3 (14)
DDR_CKE0_DIMMA (13) DDR_CKE1_DIMMA (13) DDR_CKE2_DIMMB (14) DDR_CKE3_DIMMB (14)
DDR_CS0_DIMMA# (13) DDR_CS1_DIMMA# (13) DDR_CS2_DIMMB# (14) DDR_CS3_DIMMB# (14)
M_ODT0 (13) M_ODT1 (13) M_ODT2 (14) M_ODT3 (14)
1 2 1 2
R1101
R1101
1 2
0_0402_5%
0_0402_5%
1 2
SM_DRAMRST# (13,14)
CLK_MCH_DREFCLK (15) CLK_MCH_DREFCLK# (15) MCH_SSCDREFCLK (15) MCH_SSCDREFCLK# (15)
CLK_MCH_3GPLL (15) CLK_MCH_3GPLL# (15)
DMI_TXN0 (18) DMI_TXN1 (18) DMI_TXN2 (18) DMI_TXN3 (18)
DMI_TXP0 (18) DMI_TXP1 (18) DMI_TXP2 (18) DMI_TXP3 (18)
DMI_RXN0 (18) DMI_RXN1 (18) DMI_RXN2 (18) DMI_RXN3 (18)
DMI_RXP0 (18) DMI_RXP1 (18) DMI_RXP2 (18) DMI_RXP3 (18)
VGATE
1 2
R55 0_0402_5%@R55 0_0402_5%@
ICH_PWROK
1 2
R66 0_0402_5%R66 0_0402_5%
CL_CLK0 (18) CL_DATA0 (18)
ICH_PWROK CL_RST# (18)
C56
C56
0.1U_0402_16V4Z
0.1U_0402_16V4Z
SDVO_SCLK (21) SDVO_SDAT (21)
CLKREQ#_7 (15)
MCH_ICH_SYNC# (18)
R109
HDA_BITCLK_MCH (17)
HDA_RST_MCH# (17) HDA_SDOUT_MCH (17)
HDA_SYNC_MCH (17)
1
+1.5V
DDR3_SM_PWROK (30,39)
GMCH_PWROK
+VCCP
12
R42
R42 1K_0402_1%
1K_0402_1%
12
1
511_0402_1%
511_0402_1%
R43
R43
2
HDA_SDIN1 (17)
of
of
of
743Thursday, April 30, 2009
743Thursday, April 30, 2009
743Thursday, April 30, 2009
DDR3
DDR3
B
B
B
5
D D
DDR_A_D[0..63](13)
C C
B B
DDR_A_D0 DDR_A_D1 DDR_A_D2 DDR_A_D3 DDR_A_D4 DDR_A_D5 DDR_A_D6 DDR_A_D7 DDR_A_D8 DDR_A_D9 DDR_A_D10 DDR_A_D11 DDR_A_D12 DDR_A_D13 DDR_A_D14 DDR_A_D15 DDR_A_D16 DDR_A_D17 DDR_A_D18 DDR_A_D19 DDR_A_D20 DDR_A_D21 DDR_A_D22 DDR_A_D23 DDR_A_D24 DDR_A_D25 DDR_A_D26 DDR_A_D27 DDR_A_D28 DDR_A_D29 DDR_A_D30 DDR_A_D31 DDR_A_D32 DDR_A_D33 DDR_A_D34 DDR_A_D35 DDR_A_D36 DDR_A_D37 DDR_A_D38 DDR_A_D39 DDR_A_D40 DDR_A_D41 DDR_A_D42 DDR_A_D43 DDR_A_D44 DDR_A_D45 DDR_A_D46 DDR_A_D47 DDR_A_D48 DDR_A_D49 DDR_A_D50 DDR_A_D51 DDR_A_D52 DDR_A_D53 DDR_A_D54 DDR_A_D55 DDR_A_D56 DDR_A_D57 DDR_A_D58 DDR_A_D59 DDR_A_D60 DDR_A_D61 DDR_A_D62 DDR_A_D63
AJ38
AJ41 AN38 AM38
AJ36
AJ40
AM44 AM42
AN43 AN44 AU40 AT38 AN41 AN39 AU44 AU42 AV39 AY44 BA40 BD43 AV41 AY43 BB41 BC40 AY37 BD38 AV37 AT36 AY38 BB38 AV36
AW36
BD13 AU11 BC11 BA12 AU13 AV13 BD12 BC12
AU10 BA11
AN10
AM11
AM5
AN12
AM13
AJ11
AJ12
BB9 BA9
AV9 BD9
AY8 BA6 AV5 AV7 AT9 AN8 AU5 AU6 AT5
AJ9 AJ8
U2D
U2D
SA_DQ_0 SA_DQ_1 SA_DQ_2 SA_DQ_3 SA_DQ_4 SA_DQ_5 SA_DQ_6 SA_DQ_7 SA_DQ_8 SA_DQ_9 SA_DQ_10 SA_DQ_11 SA_DQ_12 SA_DQ_13 SA_DQ_14 SA_DQ_15 SA_DQ_16 SA_DQ_17 SA_DQ_18 SA_DQ_19 SA_DQ_20 SA_DQ_21 SA_DQ_22 SA_DQ_23 SA_DQ_24 SA_DQ_25 SA_DQ_26 SA_DQ_27 SA_DQ_28 SA_DQ_29 SA_DQ_30 SA_DQ_31 SA_DQ_32 SA_DQ_33 SA_DQ_34 SA_DQ_35 SA_DQ_36 SA_DQ_37 SA_DQ_38 SA_DQ_39 SA_DQ_40 SA_DQ_41 SA_DQ_42 SA_DQ_43 SA_DQ_44 SA_DQ_45 SA_DQ_46 SA_DQ_47 SA_DQ_48 SA_DQ_49 SA_DQ_50 SA_DQ_51 SA_DQ_52 SA_DQ_53 SA_DQ_54 SA_DQ_55 SA_DQ_56 SA_DQ_57 SA_DQ_58 SA_DQ_59 SA_DQ_60 SA_DQ_61 SA_DQ_62 SA_DQ_63
CANTIGA_1p0
CANTIGA_1p0
DDR SYSTEM MEMORY A
DDR SYSTEM MEMORY A
SA_BS_0 SA_BS_1 SA_BS_2
SA_RAS# SA_CAS#
SA_WE#
SA_DM_0 SA_DM_1 SA_DM_2 SA_DM_3 SA_DM_4 SA_DM_5 SA_DM_6 SA_DM_7
SA_DQS_0 SA_DQS_1 SA_DQS_2 SA_DQS_3 SA_DQS_4 SA_DQS_5 SA_DQS_6
SA_DQS_7 SA_DQS#_0 SA_DQS#_1 SA_DQS#_2 SA_DQS#_3 SA_DQS#_4 SA_DQS#_5 SA_DQS#_6 SA_DQS#_7
SA_MA_0 SA_MA_1 SA_MA_2 SA_MA_3 SA_MA_4 SA_MA_5 SA_MA_6 SA_MA_7 SA_MA_8
SA_MA_9 SA_MA_10 SA_MA_11 SA_MA_12 SA_MA_13 SA_MA_14
4
DDR_A_BS0
BD21 BG18 AT25
BB20 BD20 AY20
AM37 AT41 AY41 AU39 BB12 AY6 AT7 AJ5
AJ44 AT44 BA43 BC37 AW12 BC8 AU8 AM7 AJ43 AT43 BA44 BD37 AY12 BD8 AU9 AM8
BA21 BC24 BG24 BH24 BG25 BA24 BD24 BG27 BF25 AW24 BC21 BG26 BH26 BH17 AY25
DDR_A_BS1 DDR_A_BS2
DDR_A_RAS# DDR_A_CAS# DDR_A_WE#
DDR_A_DM0 DDR_A_DM1 DDR_A_DM2 DDR_A_DM3 DDR_A_DM4 DDR_A_DM5 DDR_A_DM6 DDR_A_DM7
DDR_A_DQS0 DDR_A_DQS1 DDR_A_DQS2 DDR_A_DQS3 DDR_A_DQS4 DDR_A_DQS5 DDR_A_DQS6 DDR_A_DQS7 DDR_A_DQS#0 DDR_A_DQS#1 DDR_A_DQS#2
DDR_A_DQS#3
DDR_A_DQS#4 DDR_A_DQS#5 DDR_A_DQS#6 DDR_A_DQS#7
DDR_A_MA0 DDR_A_MA1 DDR_A_MA2 DDR_A_MA3 DDR_A_MA4 DDR_A_MA5 DDR_A_MA6 DDR_A_MA7 DDR_A_MA8 DDR_A_MA9 DDR_A_MA10 DDR_A_MA11 DDR_A_MA12 DDR_A_MA13 DDR_A_MA14
DDR_A_BS0 (13) DDR_A_BS1 (13) DDR_A_BS2 (13)
DDR_A_RAS# (13) DDR_A_CAS# (13) DDR_A_WE# (13)
DDR_A_DM[0..7] (13)
DDR_A_DQS[0..7] (13)
DDR_A_DQS#[0..7] (13)
DDR_A_MA[0..14] (13)
3
DDR_B_D[0..63](14)
DDR_B_D0 DDR_B_D1 DDR_B_D2 DDR_B_D3 DDR_B_D4 DDR_B_D5 DDR_B_D6 DDR_B_D7 DDR_B_D8 DDR_B_D9 DDR_B_D10 DDR_B_D11 DDR_B_D12 DDR_B_D13 DDR_B_D14 DDR_B_D15 DDR_B_D16 DDR_B_D17 DDR_B_D18 DDR_B_D19 DDR_B_D20 DDR_B_D21 DDR_B_D22 DDR_B_D23 DDR_B_D24 DDR_B_D25 DDR_B_D26 DDR_B_D27 DDR_B_D28 DDR_B_D29 DDR_B_D30 DDR_B_D31 DDR_B_D32 DDR_B_D33 DDR_B_D34 DDR_B_D35 DDR_B_D36 DDR_B_D37 DDR_B_D38 DDR_B_D39 DDR_B_D40 DDR_B_D41 DDR_B_D42 DDR_B_D43 DDR_B_D44 DDR_B_D45 DDR_B_D46 DDR_B_D47 DDR_B_D48 DDR_B_D49 DDR_B_D50 DDR_B_D51 DDR_B_D52 DDR_B_D53 DDR_B_D54 DDR_B_D55 DDR_B_D56 DDR_B_D57 DDR_B_D58 DDR_B_D59 DDR_B_D60 DDR_B_D61 DDR_B_D62 DDR_B_D63
AK47 AH46 AP47 AP46
AJ46
AJ48 AM48 AP48 AU47 AU46 BA48 AY48 AT47 AR47 BA47 BC47 BC46 BC44 BG43 BF43 BE45 BC41 BF40 BF41 BG38 BF38 BH35 BG35 BH40 BG39 BG34 BH34 BH14 BG12 BH11
BG8 BH12 BF11
BF8
BG7
BC5
BC6
AY3
AY1
BF6
BF5
BA1
BD3
AV2
AU3
AR3
AN2
AY2
AV1
AP3
AR1
AH1
AM2
AM3
AH3
AL1 AL2 AJ1
AJ3
U2E
U2E
CANTIGA_1p0
CANTIGA_1p0
SB_DQ_0 SB_DQ_1 SB_DQ_2 SB_DQ_3 SB_DQ_4 SB_DQ_5 SB_DQ_6 SB_DQ_7 SB_DQ_8 SB_DQ_9 SB_DQ_10 SB_DQ_11 SB_DQ_12 SB_DQ_13 SB_DQ_14 SB_DQ_15 SB_DQ_16 SB_DQ_17 SB_DQ_18 SB_DQ_19 SB_DQ_20 SB_DQ_21 SB_DQ_22 SB_DQ_23 SB_DQ_24 SB_DQ_25 SB_DQ_26 SB_DQ_27 SB_DQ_28 SB_DQ_29 SB_DQ_30 SB_DQ_31 SB_DQ_32 SB_DQ_33 SB_DQ_34 SB_DQ_35 SB_DQ_36 SB_DQ_37 SB_DQ_38 SB_DQ_39 SB_DQ_40 SB_DQ_41 SB_DQ_42 SB_DQ_43 SB_DQ_44 SB_DQ_45 SB_DQ_46 SB_DQ_47 SB_DQ_48 SB_DQ_49 SB_DQ_50 SB_DQ_51 SB_DQ_52 SB_DQ_53 SB_DQ_54 SB_DQ_55 SB_DQ_56 SB_DQ_57 SB_DQ_58 SB_DQ_59 SB_DQ_60 SB_DQ_61 SB_DQ_62 SB_DQ_63
2
DDR_B_BS0
BC16
SB_BS_0 SB_BS_1 SB_BS_2
SB_RAS#
SB_CAS#
SB_WE#
SB_DM_0 SB_DM_1 SB_DM_2 SB_DM_3 SB_DM_4 SB_DM_5 SB_DM_6 SB_DM_7
SB_DQS_0 SB_DQS_1 SB_DQS_2 SB_DQS_3 SB_DQS_4 SB_DQS_5 SB_DQS_6
SB_DQS_7 SB_DQS#_0 SB_DQS#_1 SB_DQS#_2 SB_DQS#_3 SB_DQS#_4 SB_DQS#_5 SB_DQS#_6 SB_DQS#_7
SB_MA_0 SB_MA_1 SB_MA_2 SB_MA_3 SB_MA_4 SB_MA_5 SB_MA_6 SB_MA_7 SB_MA_8
SB_MA_9 SB_MA_10 SB_MA_11 SB_MA_12 SB_MA_13 SB_MA_14
DDR SYSTEM MEMORY B
DDR SYSTEM MEMORY B
BB17 BB33
AU17 BG16 BF14
AM47 AY47 BD40 BF35 BG11 BA3 AP1 AK2
AL47 AV48 BG41 BG37 BH9 BB2 AU1 AN6 AL46 AV47 BH41 BH37 BG9 BC2 AT2 AN5
AV17 BA25 BC25 AU25 AW25 BB28 AU28 AW28 AT33 BD33 BB16 AW33 AY33 BH15 AU33
DDR_B_BS1 DDR_B_BS2
DDR_B_RAS# DDR_B_CAS# DDR_B_WE#
DDR_B_DM0 DDR_B_DM1 DDR_B_DM2 DDR_B_DM3 DDR_B_DM4 DDR_B_DM5 DDR_B_DM6 DDR_B_DM7
DDR_B_DQS0 DDR_B_DQS1 DDR_B_DQS2 DDR_B_DQS3 DDR_B_DQS4 DDR_B_DQS5 DDR_B_DQS6 DDR_B_DQS7 DDR_B_DQS#0 DDR_B_DQS#1 DDR_B_DQS#2 DDR_B_DQS#3 DDR_B_DQS#4 DDR_B_DQS#5 DDR_B_DQS#6 DDR_B_DQS#7
DDR_B_MA0 DDR_B_MA1 DDR_B_MA2 DDR_B_MA3 DDR_B_MA4 DDR_B_MA5 DDR_B_MA6 DDR_B_MA7 DDR_B_MA8 DDR_B_MA9 DDR_B_MA10 DDR_B_MA11 DDR_B_MA12 DDR_B_MA13 DDR_B_MA14
1
DDR_B_BS0 (14) DDR_B_BS1 (14) DDR_B_BS2 (14)
DDR_B_RAS# (14) DDR_B_CAS# (14) DDR_B_WE# (14)
DDR_B_DM[0..7] (14)
DDR_B_DQS[0..7] (14)
DDR_B_DQS#[0..7] (14)
DDR_B_MA[0..14] (14)
A A
Security Classification
Security Classification
http://laptop-motherboard-schematic.blogspot.com/
5
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2007/09/29 2007/09/29
2007/09/29 2007/09/29
2007/09/29 2007/09/29
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
2
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC,MB A5011
SCHEMATIC,MB A5011
SCHEMATIC,MB A5011
401673
401673
401673
1
B
B
B
of
of
of
843Thursday, April 30, 2009
843Thursday, April 30, 2009
843Thursday, April 30, 2009
DDC2_CLK
DDC2_DATA
5
DPST_PWM(22)
R227 100K_0402_5%R227 100K_0402_5%
IGPU_L_BKLT_EN(22)
+3VS
DDC2_CLK(22) DDC2_DATA(22)
ENAVDD(23)
LVDS_A_C-(22) LVDS_A_C+(22) LVDS_B_C-(22) LVDS_B_C+(22)
LVDS_A_0-(22) LVDS_A_1-(22) LVDS_A_2-(22)
LVDS_A_0+(22) LVDS_A_1+(22) LVDS_A_2+(22)
LVDS_B_0-(22) LVDS_B_1-(22) LVDS_B_2-(22)
LVDS_B_0+(22) LVDS_B_1+(22) LVDS_B_2+(22)
R880 75_0402_1%R880 75_0402_1% R881 75_0402_1%R881 75_0402_1% R882 75_0402_1%R882 75_0402_1%
M_BLUE(24) M_GREEN(24) M_RED(24)
3VDDCCL(24) 3VDDCDA(24)
CRT_HSYNC(24) CRT_VSYNC(24)
R91 0_0402_5%R91 0_0402_5% R57 10K_0402_5%R57 10K_0402_5%
R58 10K_0402_5%R58 10K_0402_5% DDC2_CLK DDC2_DATA
ENAVDD
LVDS_A_C­LVDS_A_C+ LVDS_B_C­LVDS_B_C+
LVDS_A_0­LVDS_A_1­LVDS_A_2-
LVDS_A_0+ LVDS_A_1+ LVDS_A_2+
LVDS_B_0­LVDS_B_1­LVDS_B_2-
LVDS_B_0+ LVDS_B_1+ LVDS_B_2+
R87 0_0402_5%R87 0_0402_5% R88 0_0402_5%R88 0_0402_5%
M_BLUE M_GREEN M_RED
R552
R552
R553
R553
R554
R554
3VDDCCL 3VDDCDA CRT_HSYNC
CRT_VSYNC
DPST_PWM
12
ENABLT_R
1 2 1 2
R59 2.37K_0402_1%R59 2.37K_0402_1%
1 2
R92 0_0402_5%R92 0_0402_5%
12 12 12
1 2 1 2 1 2
1 2 1 2
GMCH_TV_COMPS GMCH_TV_LUMA GMCH_TV_CRMA
TV_DCONSEL_0 TV_DCONSEL_1
150_0402_1%
150_0402_1% 150_0402_1%
150_0402_1% 150_0402_1%
150_0402_1%
R85 30.1_0402_1%R85 30.1_0402_1% R86 30.1_0402_1%R86 30.1_0402_1%
R89
R89
0_0402_5%
0_0402_5%
@
@
R90
R90
0_0402_5%
0_0402_5%
@
@
1 2
R81
R81
1.02K_0402_1%
1.02K_0402_1%
+3VS
R570
R570
R571
R571
2.2K_0402_5%
1 2
2.2K_0402_5%
1 2
2.2K_0402_5%
2.2K_0402_5%
D D
For Crestline:2.4kohm For Calero: 1.5Kohm For Cantiga: 2.37Kohm
C C
B B
L32 G32 M32
M33 K33
J33
M29 C44 B43 E37 E38 C41 C40 B37 A37
H47 E46 G40 A40
H48 D45 F40 B40
A41 H38 G37
J37 B42
G38 F37 K37
F25 H25 K25
H24
C31 E32
E28 G28
J28 G29 H32
J32
J29 E29
L29
U2C
U2C
CANTIGA_1p0
CANTIGA_1p0
4
L_BKLT_CTRL L_BKLT_EN L_CTRL_CLK
L_CTRL_DATA L_DDC_CLK L_DDC_DATA
L_VDD_EN LVDS_IBG LVDS_VBG LVDS_VREFH LVDS_VREFL LVDSA_CLK# LVDSA_CLK LVDSB_CLK# LVDSB_CLK
LVDSA_DATA#_0 LVDSA_DATA#_1 LVDSA_DATA#_2 LVDSA_DATA#_3
LVDSA_DATA_0 LVDSA_DATA_1 LVDSA_DATA_2 LVDSA_DATA_3
LVDSB_DATA#_0 LVDSB_DATA#_1 LVDSB_DATA#_2 LVDSB_DATA#_3
LVDSB_DATA_0 LVDSB_DATA_1 LVDSB_DATA_2 LVDSB_DATA_3
TVA_DAC TVB_DAC TVC_DAC
TV_RTN
TV_DCONSEL_0 TV_DCONSEL_1
CRT_BLUE CRT_GREEN CRT_RED CRT_IRTN CRT_DDC_CLK
CRT_DDC_DATA CRT_HSYNC CRT_TVO_IREF CRT_VSYNC
R56
10mils
T37
PEG_COMPI
PEG_RX#_0 PEG_RX#_1 PEG_RX#_2 PEG_RX#_3 PEG_RX#_4 PEG_RX#_5 PEG_RX#_6 PEG_RX#_7 PEG_RX#_8
PEG_RX#_9 PEG_RX#_10 PEG_RX#_11 PEG_RX#_12 PEG_RX#_13 PEG_RX#_14 PEG_RX#_15
PEG_RX_0 PEG_RX_1 PEG_RX_2 PEG_RX_3 PEG_RX_4 PEG_RX_5 PEG_RX_6 PEG_RX_7 PEG_RX_8
PEG_RX_9 PEG_RX_10 PEG_RX_11 PEG_RX_12 PEG_RX_13 PEG_RX_14 PEG_RX_15
PEG_TX#_0 PEG_TX#_1 PEG_TX#_2 PEG_TX#_3 PEG_TX#_4 PEG_TX#_5 PEG_TX#_6 PEG_TX#_7 PEG_TX#_8 PEG_TX#_9
PEG_TX#_10 PEG_TX#_11 PEG_TX#_12 PEG_TX#_13 PEG_TX#_14 PEG_TX#_15
PEG_TX_0
PEG_TX_1
PEG_TX_2
PEG_TX_3
PEG_TX_4
PEG_TX_5
PEG_TX_6
PEG_TX_7
PEG_TX_8
PEG_TX_9 PEG_TX_10 PEG_TX_11 PEG_TX_12 PEG_TX_13 PEG_TX_14 PEG_TX_15
T36
H44 J46 L44 L40 N41 P48 N44 T43 U43 Y43 Y48 Y36 AA43 AD37 AC47 AD39
H43 J44 L43 L41 N40 P47 N43 T42 U42 Y42 W47 Y37 AA42 AD36 AC48 AD40
J41 M46 M47 M40 M42 R48 N38 T40 U37 U40 Y40 AA46 AA37 AA40 AD43 AC46
J42 L46 M48 M39 M43 R47 N37 T39 U36 U39 Y39 Y46 AA36 AA39 AD42 AD46
PEG_COMPO
LVDS
LVDS
TV
TV
PCI-EXPRESS GRAPHICS
PCI-EXPRESS GRAPHICS
VGA
VGA
R56
1 2
49.9_0402_1%
49.9_0402_1%
PCIE_GTX_C_MRX_N15 PCIE_GTX_C_MRX_N14 PCIE_GTX_C_MRX_N13 PCIE_GTX_C_MRX_N12 PCIE_GTX_C_MRX_N11 PCIE_GTX_C_MRX_N10 PCIE_GTX_C_MRX_N9 PCIE_GTX_C_MRX_N8 PCIE_GTX_C_MRX_N7 PCIE_GTX_C_MRX_N6 PCIE_GTX_C_MRX_N5 PCIE_GTX_C_MRX_N4 PCIE_GTX_C_MRX_N3 PCIE_GTX_C_MRX_N2 PCIE_GTX_C_MRX_N1 PCIE_GTX_C_MRX_N0
PCIE_GTX_C_MRX_P15 PCIE_GTX_C_MRX_P14 PCIE_GTX_C_MRX_P13 PCIE_GTX_C_MRX_P12 PCIE_GTX_C_MRX_P11 PCIE_GTX_C_MRX_P10 PCIE_GTX_C_MRX_P9 PCIE_GTX_C_MRX_P8 PCIE_GTX_C_MRX_P7 PCIE_GTX_C_MRX_P6 PCIE_GTX_C_MRX_P5 PCIE_GTX_C_MRX_P4 PCIE_GTX_C_MRX_P3 PCIE_GTX_C_MRX_P2 PCIE_GTX_C_MRX_P1 PCIE_GTX_C_MRX_P0
PCIE_MTX_GRX_N15 PCIE_MTX_C_GRX_N15 PCIE_MTX_GRX_N14 PCIE_MTX_C_GRX_N14 PCIE_MTX_GRX_N13 PCIE_MTX_C_GRX_N13 PCIE_MTX_GRX_N12 PCIE_MTX_C_GRX_N12 PCIE_MTX_GRX_N11 PCIE_MTX_C_GRX_N11 PCIE_MTX_GRX_N10 PCIE_MTX_C_GRX_N10
PCIE_MTX_GRX_N6 PCIE_MTX_C_GRX_N6
PCIE_MTX_GRX_P15 PCIE_MTX_C_GRX_P15 PCIE_MTX_GRX_P14 PCIE_MTX_C_GRX_P14 PCIE_MTX_GRX_P13 PCIE_MTX_C_GRX_P13 PCIE_MTX_GRX_P12 PCIE_MTX_C_GRX_P12 PCIE_MTX_GRX_P11 PCIE_MTX_C_GRX_P11 PCIE_MTX_GRX_P10 PCIE_MTX_C_GRX_P10 PCIE_MTX_GRX_P9 PCIE_MTX_C_GRX_P9 PCIE_MTX_GRX_P8 PCIE_MTX_C_GRX_P8 PCIE_MTX_GRX_P7 PCIE_MTX_C_GRX_P7 PCIE_MTX_GRX_P6 PCIE_MTX_C_GRX_P6 PCIE_MTX_GRX_P5 PCIE_MTX_C_GRX_P5 PCIE_MTX_GRX_P4 PCIE_MTX_C_GRX_P4 PCIE_MTX_GRX_P3 PCIE_MTX_C_GRX_P3 PCIE_MTX_GRX_P2 PCIE_MTX_C_GRX_P2 PCIE_MTX_GRX_P1 PCIE_MTX_C_GRX_P1 PCIE_MTX_GRX_P0 PCIE_MTX_C_GRX_P0
3
+VCC_PEG
PCIE_GTX_C_MRX_N[0..15] PCIE_GTX_C_MRX_P[0..15]
PCIE_MTX_C_GRX_N[0..15] PCIE_MTX_C_GRX_P[0..15]
C264 0.1U_0402_16V7KC264 0.1U_0402_16V7K
1 2
C252 0.1U_0402_16V7KC252 0.1U_0402_16V7K
1 2
C261 0.1U_0402_16V7KC261 0.1U_0402_16V7K
1 2
C308 0.1U_0402_16V7KC308 0.1U_0402_16V7K
1 2
C242 0.1U_0402_16V7KC242 0.1U_0402_16V7K
1 2
C235 0.1U_0402_16V7KC235 0.1U_0402_16V7K
1 2
C229 0.1U_0402_16V7KC229 0.1U_0402_16V7K
1 2
C219 0.1U_0402_16V7KC219 0.1U_0402_16V7K
1 2
C251 0.1U_0402_16V7KC251 0.1U_0402_16V7K
1 2
C262 0.1U_0402_16V7KC262 0.1U_0402_16V7K
1 2
C266 0.1U_0402_16V7KC266 0.1U_0402_16V7K
1 2
C250 0.1U_0402_16V7KC250 0.1U_0402_16V7K
1 2
C238 0.1U_0402_16V7KC238 0.1U_0402_16V7K
1 2
C232 0.1U_0402_16V7KC232 0.1U_0402_16V7K
1 2
C223 0.1U_0402_16V7KC223 0.1U_0402_16V7K
1 2
C218 0.1U_0402_16V7KC218 0.1U_0402_16V7K
1 2
PEGCOMP trace width and spacing is 20/25 mils.
PCIE_GTX_C_MRX_N[0..15] (21) PCIE_GTX_C_MRX_P[0..15] (21)
PCIE_MTX_C_GRX_N[0..15] (21) PCIE_MTX_C_GRX_P[0..15] (21)
C260 0.1U_0402_16V7KC260 0.1U_0402_16V7K
1 2
C309 0.1U_0402_16V7KC309 0.1U_0402_16V7K
1 2
C265 0.1U_0402_16V7KC265 0.1U_0402_16V7K
1 2
C267 0.1U_0402_16V7KC267 0.1U_0402_16V7K
1 2
C237 0.1U_0402_16V7KC237 0.1U_0402_16V7K
1 2
C231 0.1U_0402_16V7KC231 0.1U_0402_16V7K
1 2
C222 0.1U_0402_16V7KC222 0.1U_0402_16V7K
1 2
C210 0.1U_0402_16V7KC210 0.1U_0402_16V7K
1 2
C255 0.1U_0402_16V7KC255 0.1U_0402_16V7K
1 2
C254 0.1U_0402_16V7KC254 0.1U_0402_16V7K
1 2
C263 0.1U_0402_16V7KC263 0.1U_0402_16V7K
1 2
C307 0.1U_0402_16V7KC307 0.1U_0402_16V7K
1 2
C236 0.1U_0402_16V7KC236 0.1U_0402_16V7K
1 2
C230 0.1U_0402_16V7KC230 0.1U_0402_16V7K
1 2
C220 0.1U_0402_16V7KC220 0.1U_0402_16V7K
1 2
C208 0.1U_0402_16V7KC208 0.1U_0402_16V7K
1 2
2
1
Strap Pin Table
CFG[2:0] FSB Freq select
CFG[4:3] Reserved
CFG5 (DMI select)
CFG6
CFG6
CFG7 (Intel Management Engine Crypto strap)
CFG8
CFG9 (PCIE Graphics Lane Reversal)
CFG10 (PCIE Lookback enable)
CFG11 CFG[13:12] (XOR/ALLZ)
PCIE_MTX_C_GRX_N9PCIE_MTX_GRX_N9
PCIE_MTX_C_GRX_N8PCIE_MTX_GRX_N8
PCIE_MTX_C_GRX_N7PCIE_MTX_GRX_N7 PCIE_MTX_C_GRX_N5PCIE_MTX_GRX_N5
PCIE_MTX_C_GRX_N4PCIE_MTX_GRX_N4
PCIE_MTX_C_GRX_N3PCIE_MTX_GRX_N3
PCIE_MTX_C_GRX_N2PCIE_MTX_GRX_N2
PCIE_MTX_C_GRX_N1PCIE_MTX_GRX_N1
PCIE_MTX_C_GRX_N0PCIE_MTX_GRX_N0
CFG16 (FSB Dynamic ODT)
CFG19 (DMI Lane Reversal)
CFG20 (PCIE/SDVO concurrent)
000 = FSB 1066MHz 010 = FSB 800MHz 011 = FSB 667MHz
Others = Reserved
0 = DMI x 2
1 = DMI x 4
0 = The iTPM Host Interface is enable
1 = The iTPM Host Interface is disable
0 =(TLS)chiper suite with no confidentiality
*
*
1 =(TLS)chiper suite with confidentiality
Reserved
0 = Reverse Lane,15->0, 14->1
1 = Normal Operation,Lane Number in order
0 = Enable
1 = Disable
Reserved
00 = Reserved
01 = XOR Mode Enabled
10 = All Z Mode Enabled
*
ReservedCFG[15:14]
(Default)11 = Normal Operation
*
*
0 = Disabled
1 = Enabled
*
ReservedCFG[18:17]
0 = Normal Operation
(Lane number in Order)
*
1 = Reverse Lane
0 = Only PCIE or SDVO is operational.
*
1 = PCIE/SDVO are operating simu.
*
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2007/09/29 2007/09/29
2007/09/29 2007/09/29
2007/09/29 2007/09/29
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
2
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC,MB A5011
SCHEMATIC,MB A5011
SCHEMATIC,MB A5011
401673
401673
401673
1
B
B
B
of
943Thursday, April 30, 2009
of
943Thursday, April 30, 2009
of
943Thursday, April 30, 2009
http://laptop-motherboard-schematic.blogspot.com/
5
+3VS_DAC_CRT
0.022U_0402_16V7K
0.022U_0402_16V7K
4.7U_0805_10V4Z
4.7U_0805_10V4Z C871
C871
C73
C73
1
R527
R527
2
0_0402_5% @
0_0402_5% @
1 2
D D
C C
B B
0.1U_0402_16V4Z
0.1U_0402_16V4Z
A A
4.7U_0805_10V4Z
4.7U_0805_10V4Z
R528
R528
0_0402_5% @
0_0402_5% @
1 2
R529
R529
0_0402_5% @
0_0402_5% @
+1.05VS_HPLL
+1.05VS_MPLL
C92
C92
+3VS_DAC_BG
1
2
C655
C655
C63
C63
1 2
R530
R530
1 2
0_0402_5% @
0_0402_5% @
C82
C82
1
2
1
2
@
@
R536 0_0402_5%
R536 0_0402_5%
1
2
0.022U_0402_16V7K
0.022U_0402_16V7K
C60
C60
1
2
+1.05VS_DPLLA
1
+
+
2
220U_D2_4VM_R15
220U_D2_4VM_R15
0.1U_0402_16V4Z
0.1U_0402_16V4Z C78
C78
1
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z C83
C83
1
2
12
R884
R884
1
C803
C803 22U_0805_6.3V6M
22U_0805_6.3V6M
2
+3VS_TVDAC
C110
C110
1
2
1 2
1
2
C61
C61
1
2
C65
C65
1
2
C79
C79
10U_0805_10V4Z
10U_0805_10V4Z
0.5_0603_1%
0.5_0603_1%
0.022U_0402_16V7K
0.022U_0402_16V7K
+3VS
L49
L49
1 2
BLM18PG181SN1D_0603
BLM18PG181SN1D_0603
0.1U_0402_16V4Z
0.1U_0402_16V4Z C74
C74
L47
L47
1 2
BLM18PG181SN1D_0603
BLM18PG181SN1D_0603
10U_0805_10V4Z
10U_0805_10V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z C62
C62
1
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
10U_0805_10V4Z
10U_0805_10V4Z
C66
C66
1
2
L51
L51
1 2
0_1210_5%
0_1210_5%
10U_0805_10V4Z
10U_0805_10V4Z
1
2
L54
L54
1 2
BLM18PG181SN1D_0603
BLM18PG181SN1D_0603
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
2
+VCCP
+VCCP
L52
L52
1 2
MBK2012121YZF_2P
MBK2012121YZF_2P
L53
L53
1 2
MBK2012121YZF_2P
MBK2012121YZF_2P
C111
C111
+3VS
L48
L48
1 2
0_1210_5%
0_1210_5%
+1.05VS_PEGPLL
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
2
+3VS
+VCCP
+1.5VS
+VCCP
+VCCP+1.05VS_DPLLB
+1.5VS
+1.5VS_TVDAC
0.022U_0402_16V7K
0.022U_0402_16V7K
1
C85
C85
C84
C84
2
+3VS
+1.5VS_QDAC
C112
C112
http://laptop-motherboard-schematic.blogspot.com/
5
4
L1
L1
1 2
BLM18PG121SN1D_0603
BLM18PG121SN1D_0603
10U_0805_10V4Z
10U_0805_10V4Z
C98
C98
C99
C99
1
2
R104
@R104
@
1 2
0_0603_5%
0_0603_5%
R105
R105
1 2
0_0603_5%
0_0603_5%
220U_D2_4VM_R15
220U_D2_4VM_R15
1
+
+
C86
C86
2
R111
R111
1 2
0_0603_5%
0_0603_5%
C94
C94
1U_0603_10V4Z
1U_0603_10V4Z
R525
R525
1 2
0_0402_5%
0_0402_5%
0814 Add R,C
R107
R107
1 2
0.1U_0402_16V4Z
0.1U_0402_16V4Z 0_0805_5%
0_0805_5%
1
2
0.022U_0402_16V7K
0.022U_0402_16V7K
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C113
C113
1
1
2
2
4
<BOM Structure>
<BOM Structure>
1
2
R108
R108
1 2
0_0805_5%
0_0805_5%
1
2
R533
R533
+VCCP
+1.5VS_PEG_BG
C81
C81
0.1U_0402_16V4Z
0.1U_0402_16V4Z
22U_0805_6.3V6M
22U_0805_6.3V6M
1
C800
C800
2
+1.05VS_A_SM_CK
1
C802
C802
2
22U_0805_6.3V6M
22U_0805_6.3V6M
C475
C475
@
@
0_0402_5%
0_0402_5%
1 2
+1.5VS
R120
R120
1 2
100_0603_1%
100_0603_1%
+1.8V_TXLVDS
+1.05VS_A_SM
C88
C88
1U_0603_10V4Z
1U_0603_10V4Z
C96
C96
1
2
VCC_HDA
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
2
+1.5VS
+3VS_DAC_CRT
+3VS_DAC_BG
+1.05VS_DPLLA +1.05VS_DPLLB
+1.05VS_HPLL +1.05VS_MPLL
1
C80
C80
1000P_0402_50V7K
1000P_0402_50V7K
2
+1.05VS_PEGPLL
DDR3:747.5mA
4.7U_0805_10V4Z
4.7U_0805_10V4Z
1
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C97
C97
1
2
+3VS_TVDAC
+1.5VS_TVDAC
+1.5VS_QDAC +1.05VS_HPLL +1.05VS_PEGPLL
+1.8V_LVDS
3
U2H
U2H
73mA
B27
VCCA_CRT_DAC_1
A26
VCCA_CRT_DAC_2
2.68mA
A25
VCCA_DAC_BG
B25
VSSA_DAC_BG
F47
L48 AD1 AE1
J48
J47
AD48
AA48
AR20 AP20 AN20 AR17 AP17 AN17 AT16 AR16
1
C89
C89
1U_0603_10V4Z
1U_0603_10V4Z
2
AP16
DDR3:37.95mA
AP28 AN28 AP25 AN25 AN24 AM28 AM26 AM25 AL25 AM24 AL24 AM23 AL23
B24
A24
A32
M25
L28
AF1
AA47
M38
L37
+1.8V_LVDS
10U_0805_10V4Z
10U_0805_10V4Z
1 2
R534 0_0402_5% @R534 0_0402_5% @
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
64.8mA
VCCA_DPLLA
64.8mA
VCCA_DPLLB
24mA
VCCA_HPLL
139.2mA
VCCA_MPLL
13.2mA
VCCA_LVDS VSSA_LVDS
414uA
VCCA_PEG_BG
50mA
VCCA_PEG_PLL
VCCA_SM_1 VCCA_SM_2 VCCA_SM_3 VCCA_SM_4 VCCA_SM_5 VCCA_SM_6 VCCA_SM_7 VCCA_SM_8 VCCA_SM_9
VCCA_SM_CK_1 VCCA_SM_CK_2 VCCA_SM_CK_3 VCCA_SM_CK_4 VCCA_SM_CK_5 VCCA_SM_CK_NCTF_1 VCCA_SM_CK_NCTF_2 VCCA_SM_CK_NCTF_3 VCCA_SM_CK_NCTF_4 VCCA_SM_CK_NCTF_5 VCCA_SM_CK_NCTF_6 VCCA_SM_CK_NCTF_7 VCCA_SM_CK_NCTF_8
TVA 24.15mA TVB 39.48mA TVX 24.15mA
VCCA_TV_DAC_1 VCCA_TV_DAC_2
50mA
VCC_HDA
58.67mA
VCCD_TVDAC
48.363mA
VCCD_QDAC
157.2mA
VCCD_HPLL VCCD_PEG_PLL
VCCD_LVDS_1 VCCD_LVDS_2
60.31mA
CANTIGA_1p0
CANTIGA_1p0
1
2
50mA
R115
R115
1 2
0_0603_5%
0_0603_5%
C105
C105
C106
1U_0603_10V4Z
C106
1U_0603_10V4Z
1
2
2007/09/29 2007/09/29
2007/09/29 2007/09/29
2007/09/29 2007/09/29
CRTPLLA PEGA SM
CRTPLLA PEGA SM
A LVDS
A LVDS
POWER
POWER
A CK
A CK
TV
TV
HDA
HDA
D TV/CRT
D TV/CRT
LVDS
LVDS
852mA
VTT_1 VTT_2 VTT_3 VTT_4 VTT_5 VTT_6 VTT_7 VTT_8
VTT_9 VTT_10 VTT_11 VTT_12 VTT_13 VTT_14 VTT_15
VTT
VTT
VTT_16 VTT_17 VTT_18 VTT_19 VTT_20 VTT_21 VTT_22 VTT_23 VTT_24 VTT_25
321.35mA
VCC_AXF_1 VCC_AXF_2 VCC_AXF_3
AXF
AXF
124mA
VCC_SM_CK_1 VCC_SM_CK_2 VCC_SM_CK_3 VCC_SM_CK_4
SM CK
SM CK
VCC_TX_LVDS
VCC_HV_1
105.3mA
VCC_HV_2 VCC_HV_3
HV
HV
VCC_PEG_1
1732mA
VCC_PEG_2 VCC_PEG_3 VCC_PEG_4 VCC_PEG_5
PEG
PEG
VCC_DMI_1 VCC_DMI_2 VCC_DMI_3 VCC_DMI_4
DMI
DMI
456mA
VTTLF1 VTTLF2 VTTLF3
VTTLF
VTTLF
+1.8V
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
U13 T13 U12 T12 U11 T11 U10 T10 U9 T9 U8 T8 U7 T7 U6 T6 U5 T5 V3 U3 V2 U2 T2 V1 U1
B22 B21 A21
BF21 BH20 BG20 BF20
DDR3:149.5mA
K47 C35
B35 A35
V48 U48 V47 U47 U46
AH48 AF48 AH47 AG47
A8 L1 AB2
+VCCP
0.47U_0603_10V7K
0.47U_0603_10V7K
C102
C102
2
C64
C64
+V1.05VS_AXF
+1.5V_SM_CK
+1.8V_TXLVDS
+VCC_PEG
+1.05VS_DMI
0.47U_0603_10V7K
0.47U_0603_10V7K
C103
C103
1
2
2
220U_D2_4VM_R15
220U_D2_4VM_R15
1
+
+
2
1
C70
C70
2
C104
C104
1
2
C67
C67
0.47U_0603_10V7K
0.47U_0603_10V7K
C71
C71
DDR3
+3VS_HV
C101
C101
0.47U_0603_10V7K
0.47U_0603_10V7K
1
2
1
+V1.05VS_AXF
10U_0805_10V4Z
4.7U_0805_10V4Z
4.7U_0805_10V4Z
1
2
4.7U_0805_10V4Z
4.7U_0805_10V4Z
2.2U_0805_16V4Z
2.2U_0805_16V4Z
1
1
C72
C72
2
2
220U_D2_4VM_R15
220U_D2_4VM_R15
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
2
D3
D3
2 1
+VCCP +3VS_HV
CH751H-40PT_SOD323-2
CH751H-40PT_SOD323-2
Title
Title
Title
SCHEMATIC,MB A5011
SCHEMATIC,MB A5011
SCHEMATIC,MB A5011
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
401673
401673
401673
Date: Sheet
Date: Sheet
Date: Sheet
10U_0805_10V4Z
C68
C68
1
2
+1.5V_SM_CK
0.1U_0402_16V4Z
0.1U_0402_16V4Z
10U_0805_10V4Z
10U_0805_10V4Z
C77
C77
1
@
@
1
C75
C75
2
2
+1.8V_TXLVDS
40 mils
1000P_0402_50V7K
1000P_0402_50V7K
C108
C108
C107
C107
1
2
1 2
R531 0_0402_5% @R531 0_0402_5% @
+VCC_PEG
10U_0805_10V4Z
10U_0805_10V4Z
1
C91
C91
1
+
+
C90
C90
2
2
+1.05VS_DMI
R112
R112
1 2
0_0603_5%
0_0603_5%
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C100
C100
1
2
+3VS
R113
R113
1 2
10_0402_5%
10_0402_5%
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
1
1U_0603_10V4Z
1U_0603_10V4Z
1
2
DDR3
1 2
C76
C76
1
2
10U_0805_10V4Z
10U_0805_10V4Z
1
2
1
C801
C801
2
+VCC_PEG
R114
R114
1 2
0_0402_5%
0_0402_5%
R99
R99
1 2
0_0603_5%
0_0603_5%
C69
C69
L50
L50
1 2
MBK1608121YZF_0603
MBK1608121YZF_0603
R883
R883 1_0402_1%
1_0402_1%
10U_0805_10V4Z
10U_0805_10V4Z
R116
R116
1 2
0_0603_5%
0_0603_5%
J1
J1 JUMP_43X79
JUMP_43X79 @
@
2
112
4.7U_0805_10V4Z
4.7U_0805_10V4Z
of
of
of
10 43Thursday, April 30, 2009
10 43Thursday, April 30, 2009
10 43Thursday, April 30, 2009
+VCCP
+VCCP
+1.5V
+1.8V
B
B
B
5
4
3
2
1
W28 V28 W26 V26 W25 V25 W24 V24 W23 V23 AM21 AL21 AK21 W21 V21 U21 AM20 AK20 W20 U20 AM19 AL19 AK19 AJ19 AH19 AG19 AF19 AE19 AB19 AA19 Y19 W19 V19 U19 AM17 AK17 AH17 AG17 AF17 AE17 AC17 AB17 Y17 W17 V17 AM16 AL16 AK16 AJ16 AH16 AG16 AF16 AE16 AC16 AB16 AA16 Y16 W16 V16 U16
AV44 BA37 AM40 AV21 AY5 AM10 BB13
+VGFX_CORE
VCCSM_LF1 VCCSM_LF2 VCCSM_LF3 VCCSM_LF4 VCCSM_LF5 VCCSM_LF6 VCCSM_LF7
C133 0.22U_0603_10V7KC133 0.22U_0603_10V7K
C132 0.1U_0402_16V4ZC132 0.1U_0402_16V4Z
C131 0.1U_0402_16V4ZC131 0.1U_0402_16V4Z
1
1
1
2
1
2
2
2
C136 1U_0603_10V4ZC136 1U_0603_10V4Z
C137 1U_0603_10V4ZC137 1U_0603_10V4Z
C135 0.47U_0402_6.3V6KC135 0.47U_0402_6.3V6K
C134 0.22U_0603_10V7KC134 0.22U_0603_10V7K
1
1
1
2
2
2
U2G
U2G
AP33
DDR3:4140mA
10U_0805_10V4Z
10U_0805_10V4Z
10U_0805_10V4Z
10U_0805_10V4Z
1
C118
C118
1
+
+
2
2
0317 change value
VCC_AXG: 6326.84mA
4.7U_0603_6.3V6M
4.7U_0603_6.3V6M
1
C115
C115
2
VCC_SM_BA36 VCC_SM_BB24 VCC_SM_BD16
VCC_SM_AW16 VCC_SM_AT13
10U_0805_10V4Z
10U_0805_10V4Z
1
+
+
C128
C128
2
10U_0805_10V4Z
10U_0805_10V4Z
1
2
0.01U_0402_16V7K
0.01U_0402_16V7K
C119
C119
1
2
1
C116
C116
2
+VGFX_CORE
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
C129
C129
C130
C130
2
2
T42PAD T42PAD T43PAD T43PAD
C120
C120
2
1
330U_D2E_2.5VM_R15
330U_D2E_2.5VM_R15
@
@
2
1U_0603_10V4Z
1U_0603_10V4Z
330U_D2E_2.5VM_R15
330U_D2E_2.5VM_R15
1
C878
C878 @
@
2
0.1U_0402_16V7K
0.1U_0402_16V7K
+1.5V
C117
C117
+VGFX_CORE+VCCP
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
R537
R537
2
0_0402_5%
0_0402_5%
1 2
1 C126
C126
C127
C127
2
1
C879
C879 @
@
0.1U_0402_16V7K
0.1U_0402_16V7K
2
C114
C114
0.22U_0402_10V4Z
0.22U_0402_10V4Z
1
2
U2F
AG34 AC34 AB34 AA34
AM33
AK33
AJ33 AG33 AF33
AE33 AC33 AA33
W33
AH28 AF28 AC28 AA28
AJ26 AG26 AE26 AC26 AH25 AG25 AF25 AG24
AJ23 AH23 AF23
Y34 V34
U34
Y33 V33
U33
T32
U2F
VCC_1 VCC_2 VCC_3 VCC_4 VCC_5 VCC_6 VCC_7 VCC_8 VCC_9 VCC_10 VCC_11 VCC_12
VCC_13 VCC_14 VCC_15 VCC_16 VCC_17 VCC_18 VCC_19 VCC_20 VCC_21 VCC_22 VCC_23 VCC_24 VCC_25 VCC_26 VCC_27 VCC_28 VCC_29 VCC_30 VCC_31 VCC_32 VCC_33 VCC_34
VCC_35
CANTIGA_1p0
CANTIGA_1p0
VCC CORE
VCC CORE
POWER
POWER
VCC_NCTF_1 VCC_NCTF_2 VCC_NCTF_3 VCC_NCTF_4 VCC_NCTF_5 VCC_NCTF_6 VCC_NCTF_7 VCC_NCTF_8
VCC_NCTF_9 VCC_NCTF_10 VCC_NCTF_11 VCC_NCTF_12 VCC_NCTF_13 VCC_NCTF_14 VCC_NCTF_15 VCC_NCTF_16 VCC_NCTF_17 VCC_NCTF_18 VCC_NCTF_19 VCC_NCTF_20 VCC_NCTF_21 VCC_NCTF_22 VCC_NCTF_23 VCC_NCTF_24 VCC_NCTF_25 VCC_NCTF_26 VCC_NCTF_27 VCC_NCTF_28 VCC_NCTF_29 VCC_NCTF_30 VCC_NCTF_31
VCC NCTF
VCC NCTF
VCC_NCTF_32 VCC_NCTF_33 VCC_NCTF_34 VCC_NCTF_35 VCC_NCTF_36 VCC_NCTF_37 VCC_NCTF_38 VCC_NCTF_39 VCC_NCTF_40 VCC_NCTF_41 VCC_NCTF_42 VCC_NCTF_43 VCC_NCTF_44
VCC_SM_BA36 VCC_SM_BB24 VCC_SM_BD16 VCC_SM_AW16 VCC_SM_AT13
+VCCP
AM32 AL32 AK32 AJ32 AH32 AG32 AE32 AC32 AA32 Y32 W32 U32 AM30 AL30 AK30 AH30 AG30 AF30 AE30 AC30 AB30 AA30 Y30 W30 V30 U30 AL29 AK29 AJ29 AH29 AG29 AE29 AC29 AA29 Y29 W29 V29 AL28 AK28 AL26 AK26 AK25 AK24 AK23
C875
C875 @
@
0.1U_0402_16V7K
0.1U_0402_16V7K
1
2
R106
R106
1 2
0_0805_5%
0_0805_5% @
@
112
J3 JUMP_43X79
J3 JUMP_43X79
1
C876
C876 @
@
2
0.1U_0402_16V7K
0.1U_0402_16V7K
DDR3
C877
C877 @
@
0.1U_0402_16V7K
0.1U_0402_16V7K
+VCCP
D D
0.1U_0402_16V4Z
0.22U_0402_10V4Z
0.22U_0402_10V4Z
10U_0805_10V4Z
C121
C121
10U_0805_10V4Z
1
C122
C122
1
+
+
2
2
220U_D2_4VM_R15
220U_D2_4VM_R15
C C
B B
A A
0.1U_0402_16V4Z
0.22U_0402_10V4Z
0.22U_0402_10V4Z
C125
C123
C123
1
2
C125
C124
C124
1
1
2
2
AN33 BH32 BG32 BF32 BD32 BC32 BB32 BA32 AY32
AW32
AV32 AU32 AT32 AR32 AP32 AN32 BH31 BG31 BF31 BG30 BH29 BG29 BF29 BD29 BC29 BB29 BA29 AY29
AW29
AV29 AU29 AT29 AR29 AP29
BA36 BB24 BD16
BB21 AW16 AW13
AT13
AE25
AB25
AA25
AE24
AC24
AA24
AE23
AC23
AB23
AA23
AJ21 AG21 AE21 AC21 AA21
AH20 AF20 AE20 AC20 AB20 AA20
AM15
AL15 AE15
AJ15 AH15 AG15 AF15 AB15 AA15
AN14 AM14
AJ14 AH14
Y26
Y24
Y21
T17 T16
Y15 V15 U15
U14 T14
VCC_SM_1 VCC_SM_2 VCC_SM_3 VCC_SM_4 VCC_SM_5 VCC_SM_6 VCC_SM_7 VCC_SM_8 VCC_SM_9 VCC_SM_10 VCC_SM_11 VCC_SM_12 VCC_SM_13 VCC_SM_14 VCC_SM_15 VCC_SM_16 VCC_SM_17 VCC_SM_18 VCC_SM_19 VCC_SM_20 VCC_SM_21 VCC_SM_22 VCC_SM_23 VCC_SM_24 VCC_SM_25 VCC_SM_26 VCC_SM_27 VCC_SM_28 VCC_SM_29 VCC_SM_30 VCC_SM_31 VCC_SM_32 VCC_SM_33 VCC_SM_34 VCC_SM_35
VCC_SM_36/NC VCC_SM_37/NC VCC_SM_38/NC VCC_SM_39/NC VCC_SM_40/NC VCC_SM_41/NC VCC_SM_42/NC
6326.84mA
VCC_AXG_1 VCC_AXG_2 VCC_AXG_3 VCC_AXG_4 VCC_AXG_5 VCC_AXG_6 VCC_AXG_7 VCC_AXG_8 VCC_AXG_9 VCC_AXG_10 VCC_AXG_11 VCC_AXG_12 VCC_AXG_13 VCC_AXG_14 VCC_AXG_15 VCC_AXG_16 VCC_AXG_17 VCC_AXG_18 VCC_AXG_19 VCC_AXG_20 VCC_AXG_21 VCC_AXG_22 VCC_AXG_23 VCC_AXG_24 VCC_AXG_25 VCC_AXG_26 VCC_AXG_27 VCC_AXG_28 VCC_AXG_29 VCC_AXG_30 VCC_AXG_31 VCC_AXG_32 VCC_AXG_33 VCC_AXG_34 VCC_AXG_35 VCC_AXG_36 VCC_AXG_37 VCC_AXG_38 VCC_AXG_39 VCC_AXG_40 VCC_AXG_41 VCC_AXG_42
VCC_AXG_SENSE VSS_AXG_SENSE
CANTIGA_1p0
CANTIGA_1p0
VCC_AXG_NCTF_10 VCC_AXG_NCTF_11 VCC_AXG_NCTF_12 VCC_AXG_NCTF_13 VCC_AXG_NCTF_14 VCC_AXG_NCTF_15 VCC_AXG_NCTF_16 VCC_AXG_NCTF_17 VCC_AXG_NCTF_18 VCC_AXG_NCTF_19 VCC_AXG_NCTF_20 VCC_AXG_NCTF_21 VCC_AXG_NCTF_22
POWER
POWER
VCC_AXG_NCTF_23 VCC_AXG_NCTF_24 VCC_AXG_NCTF_25 VCC_AXG_NCTF_26 VCC_AXG_NCTF_27 VCC_AXG_NCTF_28 VCC_AXG_NCTF_29 VCC_AXG_NCTF_30
VCC SMVCC GFX
VCC SMVCC GFX
VCC_AXG_NCTF_31 VCC_AXG_NCTF_32 VCC_AXG_NCTF_33 VCC_AXG_NCTF_34 VCC_AXG_NCTF_35 VCC_AXG_NCTF_36 VCC_AXG_NCTF_37 VCC_AXG_NCTF_38 VCC_AXG_NCTF_39 VCC_AXG_NCTF_40 VCC_AXG_NCTF_41 VCC_AXG_NCTF_42 VCC_AXG_NCTF_43 VCC_AXG_NCTF_44 VCC_AXG_NCTF_45 VCC_AXG_NCTF_46 VCC_AXG_NCTF_47 VCC_AXG_NCTF_48 VCC_AXG_NCTF_49 VCC_AXG_NCTF_50 VCC_AXG_NCTF_51 VCC_AXG_NCTF_52 VCC_AXG_NCTF_53 VCC_AXG_NCTF_54 VCC_AXG_NCTF_55 VCC_AXG_NCTF_56
VCC GFX NCTF
VCC GFX NCTF
VCC_AXG_NCTF_57 VCC_AXG_NCTF_58 VCC_AXG_NCTF_59 VCC_AXG_NCTF_60
VCC_AXG_NCTF_1 VCC_AXG_NCTF_2 VCC_AXG_NCTF_3 VCC_AXG_NCTF_4 VCC_AXG_NCTF_5 VCC_AXG_NCTF_6 VCC_AXG_NCTF_7 VCC_AXG_NCTF_8 VCC_AXG_NCTF_9
VCC_SM_LF1 VCC_SM_LF2 VCC_SM_LF3 VCC_SM_LF4 VCC_SM_LF5 VCC_SM_LF6 VCC_SM_LF7
VCC SM LF
VCC SM LF
http://laptop-motherboard-schematic.blogspot.com/
5
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2007/09/29 2007/09/29
2007/09/29 2007/09/29
2007/09/29 2007/09/29
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
2
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC,MB A5011
SCHEMATIC,MB A5011
SCHEMATIC,MB A5011
401673
401673
401673
1
B
B
B
of
of
of
11 43Thursday, April 30, 2009
11 43Thursday, April 30, 2009
11 43Thursday, April 30, 2009
5
U2I
U2I
AU48
VSS_1
AR48
VSS_2
AL48
VSS_3
BB47
VSS_4
AW47
VSS_5
AN47
VSS_6
AJ47
VSS_7
AF47
D D
C C
B B
A A
AD47 AB47
BD46 BA46 AY46 AV46 AR46
AM46
BF44 AH44 AD44 AA44
BC43 AV43 AU43
AM43
BG42 AY42 AT42 AN42
AJ42
AE42
BD41 AU41
AM41
AH41 AD41 AA41
BG40 BB40 AV40 AN40
AT39
AM39
AJ39
AE39
BH38 BC38 BA38 AU38 AH38 AD38 AA38
BF37 BB37
AW37
AT37 AN37
AJ37
BG36 BD36 AK15 AU36
Y47 T47 N47 L47 G47
V46 R46 P46 H46 F46
Y44 U44 T44
M44
F44
J43
C43
N42
L42
Y41
U41
T41 M41 G41
B41
H40
E40
N39
L39
B39
Y38 U38
T38
J38
F38 C38
H37 C37
VSS_8 VSS_9 VSS_10 VSS_11 VSS_12 VSS_13 VSS_14 VSS_15 VSS_16 VSS_17 VSS_18 VSS_19 VSS_20 VSS_21 VSS_22 VSS_23 VSS_24 VSS_25 VSS_26 VSS_27 VSS_28 VSS_29 VSS_30 VSS_31 VSS_32 VSS_33 VSS_34 VSS_35 VSS_36 VSS_37 VSS_38 VSS_39 VSS_40 VSS_41 VSS_42 VSS_43 VSS_44 VSS_45 VSS_46 VSS_47 VSS_48 VSS_49 VSS_50 VSS_51 VSS_52 VSS_53 VSS_54 VSS_55 VSS_56 VSS_57 VSS_58 VSS_59 VSS_60 VSS_61 VSS_62 VSS_63 VSS_64 VSS_65 VSS_66 VSS_67 VSS_68 VSS_69 VSS_70 VSS_71 VSS_72 VSS_73 VSS_74 VSS_75 VSS_76 VSS_77 VSS_78 VSS_79 VSS_80 VSS_81 VSS_82 VSS_83 VSS_84 VSS_85 VSS_86 VSS_87 VSS_88 VSS_89 VSS_90 VSS_91 VSS_92 VSS_93 VSS_94 VSS_95 VSS_96 VSS_97 VSS_98 VSS_99
CANTIGA_1p0
CANTIGA_1p0
VSS
VSS
VSS_100 VSS_101 VSS_102 VSS_103 VSS_104 VSS_105 VSS_106 VSS_107 VSS_108 VSS_109 VSS_110 VSS_111 VSS_112 VSS_113 VSS_114 VSS_115 VSS_116 VSS_117 VSS_118 VSS_119 VSS_120 VSS_121 VSS_122 VSS_123 VSS_124 VSS_125 VSS_126 VSS_127 VSS_128 VSS_129 VSS_130 VSS_131 VSS_132 VSS_133 VSS_134 VSS_135 VSS_136 VSS_137 VSS_138 VSS_139 VSS_140 VSS_141 VSS_142 VSS_143 VSS_144 VSS_145 VSS_146 VSS_147 VSS_148 VSS_149 VSS_150 VSS_151 VSS_152 VSS_153 VSS_154 VSS_155 VSS_156 VSS_157 VSS_158 VSS_159 VSS_160 VSS_161 VSS_162 VSS_163 VSS_164 VSS_165 VSS_166 VSS_167 VSS_168 VSS_169 VSS_170 VSS_171 VSS_172 VSS_173 VSS_174 VSS_175 VSS_176 VSS_177 VSS_178 VSS_179 VSS_180 VSS_181 VSS_182 VSS_183 VSS_184 VSS_185 VSS_186 VSS_187 VSS_188 VSS_189 VSS_190 VSS_191 VSS_192 VSS_193 VSS_194 VSS_195 VSS_196 VSS_197 VSS_198 VSS_199
4
AM36 AE36 P36 L36 J36 F36 B36 AH35 AA35 Y35 U35 T35 BF34 AM34 AJ34 AF34 AE34 W34 B34 A34 BG33 BC33 BA33 AV33 AR33 AL33 AH33 AB33 P33 L33 H33 N32 K32 F32 C32 A31 AN29 T29 N29 K29 H29 F29 A29 BG28 BD28 BA28 AV28 AT28 AR28 AJ28 AG28 AE28 AB28 Y28 P28 K28 H28 F28 C28 BF26 AH26 AF26 AB26 AA26 C26 B26 BH25 BD25 BB25 AV25 AR25 AJ25 AC25 Y25 N25 L25 J25 G25 E25 BF24 AD12 AY24 AT24 AJ24 AH24 AF24 AB24 R24 L24 K24 J24 G24 F24 E24 BH23 AG23 Y23 B23 A23 AJ6
3
U2J
U2J
BG21
VSS_199
L12
VSS_200
AW21
VSS_201
AU21
VSS_202
AP21
VSS_203
AN21
VSS_204
AH21
VSS_205
AF21
VSS_206
AB21
VSS_207
R21
VSS_208
M21
VSS_209
J21
VSS_210
G21
VSS_211
BC20
VSS_212
BA20
VSS_213
AW20
VSS_214
AT20
VSS_215
AJ20
VSS_216
AG20
VSS_217
Y20
VSS_218
N20
VSS_219
K20
VSS_220
F20
VSS_221
C20
VSS_222
A20
VSS_223
BG19
VSS_224
A18
VSS_225
BG17
VSS_226
BC17
VSS_227
AW17
VSS_228
AT17
VSS_229
BA16 AU16
AN16
BG15 AC15
W15
BG14 AA14
BG13 BC13 BA13
AN13
AJ13
AE13
BF12 AV12 AT12
AM12
AA12
BD11 BB11 AY11 AN11 AH11
BG10 AV10 AT10
AJ10 AE10 AA10
AM9
R17 M17 H17 C17
N16 K16 G16 E16
A15
C14
N13 L13 G13 E13
J12
A12
Y11 N11 G11 C11
M10 BF9 BC9 AN9
AD9
G9
B9 BH8 BB8 AV8 AT8
VSS_230 VSS_231 VSS_232 VSS_233
VSS_235 VSS_237
VSS_238 VSS_239 VSS_240 VSS_241 VSS_242 VSS_243 VSS_244 VSS_245 VSS_246 VSS_247 VSS_248 VSS_249 VSS_250 VSS_251 VSS_252
VSS_255 VSS_256 VSS_257 VSS_258 VSS_259 VSS_260 VSS_261 VSS_262 VSS_263 VSS_264 VSS_265 VSS_266 VSS_267 VSS_268 VSS_269 VSS_270 VSS_271 VSS_272 VSS_273
VSS_275 VSS_276 VSS_277 VSS_278 VSS_279 VSS_280 VSS_281 VSS_282 VSS_283 VSS_284 VSS_285 VSS_286 VSS_287 VSS_288 VSS_289 VSS_290 VSS_291 VSS_292 VSS_293 VSS_294 VSS_295 VSS_296
CANTIGA_1p0
CANTIGA_1p0
VSS
VSS
VSS SCB
VSS SCB
VSS_297 VSS_298 VSS_299 VSS_300 VSS_301 VSS_302 VSS_303 VSS_304 VSS_305 VSS_306 VSS_307 VSS_308 VSS_309 VSS_310 VSS_311 VSS_312 VSS_313 VSS_314 VSS_315 VSS_316 VSS_317 VSS_318 VSS_319 VSS_320 VSS_321 VSS_322 VSS_323 VSS_324 VSS_325
VSS_327 VSS_328 VSS_329 VSS_330 VSS_331 VSS_332 VSS_333 VSS_334 VSS_335 VSS_336 VSS_337 VSS_338 VSS_339 VSS_340 VSS_341 VSS_342 VSS_343 VSS_344 VSS_345 VSS_346 VSS_347 VSS_348 VSS_349 VSS_350
VSS_351 VSS_352 VSS_353 VSS_354
VSS_NCTF_1 VSS_NCTF_2 VSS_NCTF_3 VSS_NCTF_4 VSS_NCTF_5 VSS_NCTF_6 VSS_NCTF_7 VSS_NCTF_8
VSS_NCTF_9 VSS_NCTF_10 VSS_NCTF_11 VSS_NCTF_12 VSS_NCTF_13 VSS_NCTF_14
VSS NCTF
VSS NCTF
VSS_NCTF_15 VSS_NCTF_16
VSS_SCB_1 VSS_SCB_2 VSS_SCB_3 VSS_SCB_4 VSS_SCB_5
NC_26 NC_27 NC_28 NC_29 NC_30 NC_31 NC_32 NC_33 NC_34 NC_35
NC
NC
NC_36 NC_37 NC_38 NC_39 NC_40 NC_41 NC_42
2
AH8 Y8 L8 E8 B8 AY7 AU7 AN7 AJ7 AE7 AA7 N7 J7 BG6 BD6 AV6 AT6 AM6 M6 C6 BA5 AH5 AD5 Y5 L5 J5 H5 F5 BE4
BC3 AV3 AL3 R3 P3 F3 BA2 AW2 AU2 AR2 AP2 AJ2 AH2 AF2 AE2 AD2 AC2 Y2 M2 K2 AM1 AA1 P1 H1
U24 U28 U25 U29
AF32 AB32 V32 AJ30 AM29 AF29 AB29 U26 U23 AL20 V20 AC19 AL17 AJ17 AA17 U17
BH48 BH1 A48 C1 A3
E1 D2 C3 B4 A5 A6 A43 A44 B45 C46 D47 B47 A46 F48 E48 C48 B48
1
http://laptop-motherboard-schematic.blogspot.com/
5
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2007/09/29 2007/09/29
2007/09/29 2007/09/29
2007/09/29 2007/09/29
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
2
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC,MB A5011
SCHEMATIC,MB A5011
SCHEMATIC,MB A5011
401673
401673
401673
1
B
B
B
of
of
of
12 43Thursday, April 30, 2009
12 43Thursday, April 30, 2009
12 43Thursday, April 30, 2009
5
DDR_A_DQS#[0..7](8)
DDR_A_D[0..63](8)
DDR_A_DM[0..7](8)
DDR_A_DQS[0..7](8)
DDR_A_MA[0..14](8)
D D
J2
+RTCVCC
R1102
R1102
1 2
100_0402_5%
100_0402_5%
J2
1 2
JOPEN @
JOPEN @
for Clear CMOS
Layout Note:
C C
Layout Note: Place near JP4.203 & JP4.204
B B
Place near JP4
+1.5V
10U_0603_6.3V6M
10U_0603_6.3V6M
1
C785
C785
C784
C784
2
1
2
1U_0603_10V4Z
1U_0603_10V4Z
10U_0603_6.3V6M
10U_0603_6.3V6M
+0.75V
Layout Note: Place these 4 Caps near Command and Control signals of DIMMA
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
1
1
C787
C787
C788
C160
C160
C788
2
1U_0603_10V4Z
1U_0603_10V4Z
1U_0603_10V4Z
1U_0603_10V4Z
2
2
C161
C161
1
1
C786
C786
2
1U_0603_10V4Z
1U_0603_10V4Z
2
2
C159
C159
1
1
+1.5V
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
1
1
C789
C789
2
2
10U_0805_6.3V6M
10U_0805_6.3V6M
1
C804
C804
C162
C162
2
0.1U_0402_16V4Z
C146
C146
C147
C147
1
1
2
2
EMI 1215
1
C671
A A
http://laptop-motherboard-schematic.blogspot.com/
C671
10P_0402_50V8J
10P_0402_50V8J
2
5
1
12
C672
C672
C675
C675
47P_0402_50V8J
47P_0402_50V8J
120P_0402_50V8
120P_0402_50V8
2
C642
C642
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2.2U_0805_16V4Z
2.2U_0805_16V4Z
1
2
C148
C148
1
2
4
1K_0402_1%
1K_0402_1%
C209
C209
1
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z 1
2
4
C149
C149
+1.5V
12
R540
R540
12
R541
R541 1K_0402_1%
1K_0402_1%
+V_DDR3_DIMM_REF
1
+
+
C140
C140 330U_D2E_2.5VM_R7
330U_D2E_2.5VM_R7
2
3
+V_DDR3_DIMM_REF
DDR_A_D0 DDR_A_D1
DDR_A_DM0 DDR_A_D2
DDR_A_D3 DDR_A_D8
DDR_A_D9 DDR_A_DQS#1
DDR_A_DQS1 DDR_A_D10
DDR_A_D11 DDR_A_D16
DDR_A_D17 DDR_A_DQS#2
DDR_A_DQS2 DDR_A_D18
DDR_A_D19 DDR_A_D24
DDR_A_D25 DDR_A_DM3 DDR_A_D26
DDR_A_D27
DDR_CKE0_DIMMA(7)
DDR_A_BS2(8)
M_CLK_DDR0(7) M_CLK_DDR#0(7)
DDR_A_BS0(8)
DDR_A_WE#(8)
DDR_A_CAS#(8) M_ODT0 (7)
DDR_CS1_DIMMA#(7)
+3VS
C163
C163
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
DDR_CKE0_DIMMA
DDR_A_BS2 DDR_A_MA12
DDR_A_MA9 DDR_A_MA8
DDR_A_MA5 DDR_A_MA3
DDR_A_MA1 M_CLK_DDR0
M_CLK_DDR#0 DDR_A_MA10
DDR_A_BS0 DDR_A_WE#
DDR_A_CAS# DDR_A_MA13
DDR_CS1_DIMMA#
DDR_A_D32 DDR_A_D33
DDR_A_DQS#4 DDR_A_DQS4
DDR_A_D34 DDR_A_D35
DDR_A_D40 DDR_A_D41
DDR_A_DM5 DDR_A_D42
DDR_A_D43 DDR_A_D48
DDR_A_D49 DDR_A_DQS#6
DDR_A_DQS6 DDR_A_D50
DDR_A_D51 DDR_A_D56
DDR_A_D57 DDR_A_DM7 DDR_A_D58
DDR_A_D59
R124 10K_0402_5%R124 10K_0402_5%
1 2
1
1
C164
C164
2
2
0.1U_0402_16V4Z
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
0.1U_0402_16V4Z
2007/09/29 2007/09/29
2007/09/29 2007/09/29
2007/09/29 2007/09/29
+1.5V +1.5V
JDIMM2
JDIMM2
1
VREF_DQ
3
VSS
5
DQ0
7
DQ1
9
VSS
11
DM0
13
VSS
15
DQ2
17
DQ3
19
VSS
21
DQ8
23
DQ9
25
VSS
27
DQS1#
29
DQS1
31
VSS
33
DQ10
35
DQ11
37
VSS
39
DQ16
41
DQ17
43
VSS
45
DQS2#
47
DQS2
49
VSS
51
DQ18
53
DQ19
55
VSS
57
DQ24
59
DQ25
61
VSS
63
DM3
65
VSS
67
DQ26
69
DQ27
71
VSS
73
CKE0
75
VDD
77
NC
79
BA2
81
VDD
83
A12/BC#
85
A9
87
VDD
89
A8
91
A5
93
VDD
95
A3
97
A1
99
VDD
101
CK0
103
CK0#
105
VDD
107
A10/AP
109
BA0
111
VDD
113
WE#
115
CAS#
117
VDD
119
A13
121
S1#
123
VDD
125
TEST
127
VSS
129
DQ32
131
DQ33
133
VSS
135
DQS4#
137
DQS4
139
VSS
141
DQ34
143
DQ35
145
VSS
147
DQ40
149
DQ41
151
VSS
153
DM5
155
VSS
157
DQ42
159
DQ43
161
VSS
163
DQ48
165
DQ49
167
VSS
169
DQS6#
171
DQS6
173
VSS
175
DQ50
177
DQ51
179
VSS
181
DQ56
183
DQ57
185
VSS
187
DM7
189
VSS
191
DQ58
193
DQ59
195
VSS
197
SA0
199
VDDSPD
201
SA1
203
VTT
205
GND1
207
GND2
FOX_AS0A626-U2RN-7F
FOX_AS0A626-U2RN-7F CONN@
CONN@
Deciphered Date
Deciphered Date
Deciphered Date
R123
R123
10K_0402_5%
10K_0402_5%
12
+0.75V
VSS DQ4 DQ5
VSS
DQS0#
DQS0
VSS DQ6 DQ7
VSS
DQ12 DQ13
VSS DM1
RESET#
VSS
DQ14 DQ15
VSS
DQ20 DQ21
VSS DM2
VSS
DQ22 DQ23
VSS
DQ28 DQ29
VSS
DQS3#
DQS3
VSS
DQ30 DQ31
VSS
CKE1
VDD
VDD
VDD
VDD
VDD
CK1
CK1#
VDD
BA1
RAS#
VDD
ODT0
VDD
ODT1
VDD
VREF_CA
VSS
DQ36 DQ37
VSS DM4
VSS
DQ38 DQ39
VSS
DQ44 DQ45
VSS
DQS5#
DQS5
VSS
DQ46 DQ47
VSS
DQ52 DQ53
VSS DM6
VSS
DQ54 DQ55
VSS
DQ60 DQ61
VSS
DQS7#
DQS7
VSS
DQ62 DQ63
VSS
EVENT#
SDA
SCL
VTT
BOSS1 BOSS2
2
2
DDR_A_D4
4
DDR_A_D5
6 8
DDR_A_DQS#0
10
DDR_A_DQS0
12 14
DDR_A_D6
16
DDR_A_D7
18 20
DDR_A_D12
22
DDR_A_D13
24 26
DDR_A_DM1
28
SM_DRAMRST#
30 32
DDR_A_D14
34
DDR_A_D15
36 38
DDR_A_D20
40
DDR_A_D21
42 44
DDR_A_DM2
46 48
DDR_A_D22
50
DDR_A_D23
52 54
DDR_A_D28
56
DDR_A_D29
58 60
DDR_A_DQS#3
62
DDR_A_DQS3
64 66
DDR_A_D30
68
DDR_A_D31
70 72
DDR_CKE1_DIMMA
74 76 78
A15 A14
A11
A7 A6
A4 A2
A0
S0#
NC
2
80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204
206 208
DDR_A_MA14 DDR_A_MA11
DDR_A_MA7 DDR_A_MA6
DDR_A_MA4 DDR_A_MA2
DDR_A_MA0 M_CLK_DDR1
M_CLK_DDR#1 DDR_A_BS1
DDR_A_RAS# DDR_CS0_DIMMA#
M_ODT0 M_ODT1
DDR_VREF_CA_DIMMA DDR_A_D36
DDR_A_D37 DDR_A_DM4 DDR_A_D38
DDR_A_D39 DDR_A_D44
DDR_A_D45 DDR_A_DQS#5
DDR_A_DQS5 DDR_A_D46
DDR_A_D47 DDR_A_D52
DDR_A_D53 DDR_A_DM6 DDR_A_D54
DDR_A_D55 DDR_A_D60
DDR_A_D61 DDR_A_DQS#7
DDR_A_DQS7 DDR_A_D62
DDR_A_D63 PM_EXTTS#0_1
CLK_SMBDATA CLK_SMBCLK
+0.75V
1
SM_DRAMRST# (7,14)
DDR_CKE1_DIMMA (7)
M_CLK_DDR1 (7) M_CLK_DDR#1 (7)
DDR_A_BS1 (8) DDR_A_RAS# (8)
DDR_CS0_DIMMA# (7)
1
2
+V_DDR3_DIMM_REF
0.1U_0402_16V4Z
0.1U_0402_16V4Z 1
C791
C791
2
M_ODT1 (7)
R542
R542
1 2
0_0402_5%
0_0402_5%
PM_EXTTS#0_1 (7,14)
CLK_SMBDATA (14,15) CLK_SMBCLK (14,15)
C790
C790
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
DDR3 SO-DIMM A REVERSE
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC,MB A5011
SCHEMATIC,MB A5011
SCHEMATIC,MB A5011
401673
401673
401673
1
of
of
of
13 43Thursday, April 30, 2009
13 43Thursday, April 30, 2009
13 43Thursday, April 30, 2009
B
B
B
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