Acer Aspire 3 A315-56 Schematic

A

Vinafix.com

1 1

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C

D

E

Compal Confidential

FH5LI MB Schematic Document

2 2

3 3

LA-J801P

Rev:1.0

2019.10.30

4 4

Security Class ification

Security Class ification

Security Class ification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2017/11/ 23 2018/09/ 01

2017/11/ 23 2018/09/ 01

2017/11/ 23 2018/09/ 01

C

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Cover Sheet

Cover Sheet

Cover Sheet

Size Document N umber Rev

Size Document N umber Rev

Size Document N umber Rev

Custom

Custom

Custom

D

FH5LI M/B LA-H801P

FH5LI M/B LA-H801P

FH5LI M/B LA-H801P

Date: Sheet of

Date: Sheet of

Date: Sheet of

1 102Wednesd ay, October 30, 20 19

1 102Wednesd ay, October 30, 20 19

1 102Wednesd ay, October 30, 20 19

E

1.0

1.0

1.0

A

Vinafix.com

B

C

D

E

HDMI Conn.

eDP

Interleaved Memory

DDR4-ON BOARD 4G 8Gbx16

page 40

1 1

DDI2

HDMI x 4 lanes

page 38

eDP

DDI

Intel Ice Lake U

Memory BUS

Dual Channel

1.2V DDR4 2666/3200

USB 3.0
conn x1

USB3 port 1
USB2 port 1

260pin DDR4-SO-DIMM X1

USB 2.0
conn x2

USB2 port3 (MB)
USB2 port4(SUB)

CMOS
Camera

USB2 port 7

page 24

page 23

Processor

page 68

2 2

6.0 Gb/s

(SATA2)

SATA Gen 3

NGFF
WLAN

USB2 port 10

PCIe 1.0

2.5GT/s

port 10support CNVi

page 52

PCIe 1.0

2.5GT/s

port 9

LAN(GbE)
Realtek 8111H

page 51

PCIE 3.0 x4
8GT/s
Port 13-16

SATA Gen 3

6.0 Gb/s

port 0
(

SATA0)

SATA HDD
Conn.

Flexible IO

SATA Gen 1

1.5. Gb/s

port 1
(SATA1A)

SATA ODD
Conn.

ICL-U 4+2

Ice Lake PCH-LP

50x25 mm

15W
1526pin BGA

page 06~19

USBx8

HD Audio

SPI

page 72 page 38

48MHz

3.3V 24MHz

page 71

HDA Codec
ALC255

page 56

Card Reader
RTS5140
Reserved

USB2 port 8(SUB)

Touch
Screen

USB2 port 6

page 38

Finger
Printer

USB2 port 5

RJ45 conn.

3 3

page 67

eSPI BUS

CLK=24MHz

SPI ROM
128Mb

page 9

ENE
KB9052

RTC CKT.

page 11

Fan Control

page 77

Int.KBD

Power On/Off CKT.

page 63

4 4

DC/DC Interface CKT.

page 78

Power Circuit DC/DC

page 81~100

A

Sub Board

LS-H781P
IO/B

page 73

LS-H783P
LID/B

page 63

page 63

B

page 58

Touch Pad
PS2 (from EC) / I2C (from SOC)

USB2 port 8 (FP)

page 63

Security Class ification

Security Class ification

Security Class ification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2018/12/ 27 2019/12/ 27

2018/12/ 27 2019/12/ 27

2018/12/ 27 2019/12/ 27

C

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Int. Speaker UAJ

page 56

D

Int. DMIC

on Camera

page 38

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document N umber Rev

Size Document N umber Rev

Size Document N umber Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

Block Diagrams

Block Diagrams

Block Diagrams

FH5LI M/B LA-H801P

FH5LI M/B LA-H801P

FH5LI M/B LA-H801P

page 56

1.0

1.0

1.0

2 102Tuesday, October 15 , 2019

2 102Tuesday, October 15 , 2019

2 102Tuesday, October 15 , 2019

E

A

Vinafix.com

B

C

D

E

Board ID Table for AD channel

Vcc 3.3V +/- 5%

Board ID

1 1

100K +/- 1%Ra

0
1
2
3
4
5
6
7

0 0 V
12K +/- 1% 0.347 V 0.345 V 0.360 V
15K +/- 1%
20K +/- 1%
27K +/- 1%
33K +/- 1%
43K +/- 1%
56K +/- 1%

Rb V min

BID

0.423 V 0.430 V 0.438 V

V typ

BID

0 V 0.300 V

V

BID

max

EC AD3

0x00 - 0x13
0x14 - 0x1E
0x1F - 0x25

PCB Revision

0.1(EVT)

1.0(PVT)

1.0(MP)

0x26 - 0x300.541 V 0.550 V 0.559 V
0x31 - 0x3A0.691 V 0.702 V 0.713 V
0x3B - 0x450.807 V 0.819 V 0.831 V
0x46 - 0x540.978 V 0.992 V 1.006 V
0x55 - 0x641.169 V 1.185 V 1.200 V

Power State

STATE

S0 (Full ON) ON ON ON ONHIGH HIGH HIGH

S3 (Suspend to RAM)

S4 (Suspend to Disk)

S5 (Soft OFF)

SIGNAL

SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock

LOW HIGH

LOWLOW

HIGH

HIGH

ONONON

ON

OFF

OFFLOW LOW LOW

OFF

OFF

OFF

OFF

OFF

OFF

Voltage Rails

Power Plane Description

+19V_VIN

BOM Structure Table

BOM Option Table

Item BOM Structure

Unpop @

G Sensor GSEN@

2 2

For Intel CMC

CNVi CNVI@

EMI/ESD requirement EMC@ / XEMC@

BOM select 15@

TPM TPM@
Finger Print

SATA/ODD select

MD BOM Select

CONN@Connector

255@/256@CODEC
3S@For over 3 cell battery
CMC@

@RF@RF requirement

FP@/FPEMC@

FP3V@/FP5V@Finger print power

RD@/NRD@/ODD@

NOX76@/X76DSAM@/
X76DMIC@/X76DHYN@/

+12.6V_BATT Battery power supply N/A

+19VB

+VCCIN

+VCCIN_AUX CPU and PCH merged auxiliary power rail

+0.6VS_VTT DDR +0.6VS power rail for DDR terminator .

+1.05VO_OUT_FET FIVR output of PCH to platform 1.05V Power Gates ON

+1.05V_VCCST Sustain voltage for CPU standby modes ON

+1.05VS_VCCSTG Gated sustain voltage for CPU standby modes ON

+1.2V_VDDQ

+1.8VALW_PRIM +1.8V Always power rail

+1.8VS System +1.8V power rail ON

+3VLP +19VB to +3VLP power rail for suspend power ON

+3VALW System +3VALW always on power rail ON

+3VS ONSystem +3V power rail

+5VALW ON

+5VS System +5V power rail

+RTCVCC RTC Battery Power ON

Adapter power supply

AC or battery power rail for power circuit.

Core voltage for CPU

DDR4 +1.2V Power Rail

1.2V power rail for CPU digital PLL+1.2V_VCCPLL_OC

+3VALW power for PCH suspend rails+3VALW_PRIM

+5V Always power rail

Memory related SPD@/DDP@/MEM@

MB Stage EVT@/DVT@/PVT@/MP@

Premium/Volume PREM@/VOL@
CPU i3@/i5@

3 3

DAZ PCB@

S0
N/A

N/A

ON

ON

ON

ON

ON

ON

ON

S3

S4/S5

N/AN/A

N/A N/A

N/AN/A

OFF OFF

OFF

OFF

OFFOFF

ON

OFF

OFFON

OFF/ON OFF

OFF

ON

ON OFF

ON

ON*1

OFF

OFF

ON

ON

ON

ON*1

ON ON*1ON

OFF

OFF

ON

ON

OFFOFF

ON ON

Note : ON*1 means power plane is ON only when WOL enable and RTC wake at BIOS setting, otherwise it is OFF.

ON*2 power plane is ON when DGPU turn on

43 level BOM table

431ALBBOL01

431ALBBOL02

4 4

SMT MB AJ801 FH 5LI I31005D1 H DMI

SMT MB AJ801 FH 5LI I51035D1 H DMI

A

BOM Structure43 Level Description

255@/3S@/MEM@/15@/VOL@/CNVI@/CMC@/SDP@/MP@/FP@/FP3V@/i3@/NRD@/PCB@
255@/3S@/MEM@/15@/VOL@/CNVI@/CMC@/SDP@/MP@/FP@/FP3V@/i5@/NRD@/PCB@

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

Compal Secret Data

Compal Secret Data

2018/12/27 2019/12/27

2018/12/27 2019/12/27

2018/12/27 2019/12/27

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

D

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Notes List

Notes List

Notes List

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

FH5LI M/B LA-H801P

FH5LI M/B LA-H801P

FH5LI M/B LA-H801P

Date: Sheet of

Date: Sheet of

Date: Sheet of

E

3 102Tuesday, October 15, 2019

3 102Tuesday, October 15, 2019

3 102Tuesday, October 15, 2019

1.0

1.0

1.0

A

Vinafix.com

VR_ON

JUMP
(PJZ1)

JUMP
(PJG1)

ADAPTER

1 1

BATTERY

CHARGER
(PU301)

LDO

+3VLP

+19VB

SYSON

SM_PG_CTRL

EC_ON

RT8207PGQW
(PUM1)

SY8288CRAC
(PU501)

1.8VALW_PG

RT3612EBGQW
(PUZ1)

RT6543AGQW
(PUG1)

+1.2VP

+0.6VSP

+5VALWP

JUMP
(PJ501)

JUMP
(PJM3)

JUMP
(PJM4)

+5VALW

+VCCIN

+VCCIN_AUX

+1.2V_VDDQ

+0.6VS_VTT

SUSP#

USB_EN

B

AOZ1331DI
(UQ1)

JLID1
(LID/B)

JIO1
(IO/B)

EM5201V
(UC11)

SY6288C20AAC
(US21)

+1.2V_VCCPLL_OC_P

+5VS_OUT

+USB3_VCCB

PREM@

VOL@

R-Short
(RC3970)

JUMP
(JPQ2)

JUMP
(JPC10)

+5VS

JUMP
(JPC6)

C

+USB3_VCCA

+1.2V_VCCPLL_OC

KBL_EN

R-Short
(RX8)

AP2330W
(UY1)

0 ohm
(RO3)

0 ohm
(RO26)

JUMP
(JPA1)

R-Short
(RF1)

SY6288C20AAC
(U1)

+TS_PWR

+HDMI_5V_OUT

+5VS_HDD

+5VS_ODD

+VDDA

+VCC_FAN1

+5VS_BL

D

E

SY8286BRAC

3V_EN

(PU301)

2 2

3 3

ICL-U FIVR
(UC1)

JUMP
(PJ301)

+1.05VO_OUT_FET
(BY2,CB2,CC1)

+3VALW+3VALWP

VCCST_EN_LS

VCCSTG_EN_LS

SYSON

LAN_PWR_EN

TP_PWR_EN

WLAN_ON

FP_PWR_EN

SUSP#

EN_1.8VALW

EM5201V
(UC9)

G2898KD1U
(UC14)

R-Short
(RC173)

JUMP
(JPC7)

G9661MF11U
(PUM2)

SY6288C20AAC
(UL1)

SY6288C20AAC
(UK1)

SY6288C20AAC
(UM1)

SY6288C20AAC
(UK6)FP@

R-Short
(RW1)

AOZ1331DI
(UQ2)

SY8032ABC
(PU1801)

+3VALW_DSW

+3VALW_PRIM

+2.5VP

+3V_LAN

+3V_PTP

+3VS_WLAN

+FP_VCC

+3VALW_TPM

+3VS_OUT

PREM@

+1.05V_VCCST_SINGLE

VOL@

+1.05V_VCCST_DUAL

+1.8VALWP

0Ohm
(RC3989)

0Ohm
(RC3981)

JUMP
(JPQ1)

JUMP
(JPC16)

PREM@

R-Short
(LC2)

R-Short
(RC154)

+3VS

JUMP
(PJ1802)

+1.05V_VCCST

0Ohm
(RC414)

+1.05V_VCCST_P

0Ohm
(RC413)

+1.05VS_VCCSTG

+3VALW_HDA

+3VALW_SPI

+1.8VALW_PRIM

SUSP#

G2898KD1U
(UC14)

EM5201V
(UC12)

SOC_ENVDD

0 ohm
(RK3)@

0 ohm
(RM9)

R-Short
(RW2)@

R-Short
(RA2)

R-Short
(RA5)

JEDP1
(CAMERA)

JMIC1
(4DMIC)

+1.8V_PRIM_SOC_P

+1.8VS

SY6288C20AAC
(UX1)

+3V_PTP

+3VS_SSD_NGFF

+3VS_TPM

+3VS_DVDDIO

+3VS_DVDD

VOL@

R-Short
(RC407)

PREM@

R-Short
(RA6)

+LCDVDD

JUMP
(JPC5)

+1.8VS_VDDA

+1.8V_PRIM_SOC

4 4

HCB2012KF
(LX1) 3S@

A

+INVPWR_B+

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

C

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

D

Compal Secret Data

Compal Secret Data

Compal Secret Data

2018/12/27 2019/12/27

2018/12/27 2019/12/27

2018/12/27 2019/12/27

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Power Rail

Power Rail

Power Rail

Size Document Numb er Rev

Size Document Numb er Rev

Size Document Numb er Rev

Custom

Custom

Custom

FH5LI M/B LA -H801P

FH5LI M/B LA -H801P

FH5LI M/B LA -H801P

Date: Sheet of

Date: Sheet of

Date: Sheet of

E

4 102T uesday, Oc tober 15, 2 019

4 102T uesday, Oc tober 15, 2 019

4 102T uesday, Oc tober 15, 2 019

1.0

1.0

1.0

5

Vinafix.com

4

3

2

1

D D

C C

B B

FH5LI_EVT Power Sequence

BIOS ver: V0.01T015
EC: ver: V0.01T08B

Plug in

+19VB

+3VLP

→

EC_ON

+5VALW

ON/OFFBTN#

3V_EN

+3VALW

SPOK_3V

+1.8VALW_PRIM

1.8VALW_PG

+VCCIN_AUX

VCC_AUX_PWRGD

VCCIN_AUX_CORE_VID

VCCST_OVERRIDE_LS VCCST_OVERRIDE_LS

EC_VCCST_EN

+1.05V_VCCST

EC_RSMRST#

(DSW_PWROK)

AC_PRESENT

PBTN_OUT#

SLP_S4#

SLP_S3#

SYSON

+1.2V_VDDQ

+2.5V_VPP

USP#

S

+5VS

+3VS

+1.8VS

SM_PG_CTRL

+0.6VS_VTT

209.9us

→

2.144ms

★

→

98.52ms

→

567.3us

→

702.5us

→

644.6us

→

279.6us

→

779.9us

→

314.7us

2.383ms

→

→

4.565ms

→

4.261ms

★

→

31.4ms

→

10.09ms

→

121.1ms

11.52ms

AC mode

Power On

←→

→

20ms

→

23.76ms

6.44ms

→

→

515.9us

→

1.25ms

→

28.04ms

→

→

→

S3

S3 Resume

Power Off

+19VB

+3VLP

EC_ON

+5VALW

ON/OFFBTN#

→

19.97us

683us

→

→

38.59us

→

1.118ms

→

43.75us

→

43.89us

13.7ms

811us

→

→

4.906ms

→

4.223ms

814.3us

→

→

121.1us

→

3.463us

→

1.006ms

→

922.5us

25.83ms

→ 7.833us

→

1.56ms

1.18ms

741us

→

20.21ms

→

4.897us

2.588ms

→

8.698ms

→

600.9us

→

4.599us

693.9us

→

→

→

1.563ms

→

1.170ms

→

763.3us

→

20.19ms

→

5.291us

9.894us

→

→

→

4.841us

→

392.9us

2.163ms

→

402.6us

923us

→

→

→

3.976us

9.59s

→

→

10.99us

9.301us

→

3V_EN

+3VALW

SPOK_3V

+1.8VALW_PRIM

1.8VALW_PG

+VCCIN_AUX

EC_VCCST_EN

+1.05V_VCCST

EC_RSMRST#

(DSW_PWROK)

AC_PRESENT

PBTN_OUT#

SLP_S4#

SLP_S3#

SYSON

+1.2V_VDDQ

+2.5V_VPP

SUSP#

+1.8VS

SM_PG_CTRL

+0.6VS_VTT

+5VS

+3VS

6.098us

→

EC_VCCST_PG_R

VR_ON

+

VCCIN

PCH_PWROK

SYSPWROK

PLT_RST#

A A

5

20.26ms

→

20.28ms

→

1.964ms

9.98ms

→

120.5ms

→

122ms

→

4

→

4.772us

→

1.742us

32.3us

→

174.3us

→

182.2us

→

319.3us

→

→

20.16ms

20.18ms

→

1.966ms

→

9.940ms

→

120.9ms

→

124.7ms

→

3

→

2.198us

→

105.7us

→

147.6us

→

155.5us

→

348.8us

→

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2019/07/12 2019/12/31

2019/07/12 2019/12/31

2019/07/12 2019/12/31

2

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

EC_VCCST_PG_R

VR_ON

+

VCCIN

CH_PWROK

P

SYSPWROK

PLT_RST#

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Power Sequence

Power Sequence

Power Sequence

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

FH5LI M/B LA-H801P

FH5LI M/B LA-H801P

FH5LI M/B LA-H801P

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

5 100Tuesday, October 15, 2019

5 100Tuesday, October 15, 2019

5 100Tuesday, October 15, 2019

1.0

1.0

1.0

A

Vinafix.com

B

C

D

E

1 1

EDP_TXN 0<38>
EDP_TXP 0<38>
EDP_TXN 1<38>
EDP_TXP 1<38>

<eDP>

<HDMI>

2 2

HDMI DDC (Port 2)

EDP_VDDEN:
100K PD on load swith side

3 3

+3VALW _PRIM

1 2

RC164 10K_040 2_5%

1 2

RC165 10K_040 2_5%

EDP_TXN 2<38>
EDP_TXP 2<38>
EDP_TXN 3<38>
EDP_TXP 3<38>

EDP_AUX N<38>
EDP_AUX P<38>

SOC_DP2 _N0<40>
SOC_DP2 _P0<40>
SOC_DP2 _N1<40>
SOC_DP2 _P1<40>
SOC_DP2 _N2<40>
SOC_DP2 _P2<40>
SOC_DP2 _N3<40>
SOC_DP2 _P3<40>

SOC_DP2 _CTRL_CLK<40>
SOC_DP2 _CTRL_DATA<40>

SOC_GPP _E19

1

TP@

CPU_EDP _HPD<38>

SOC_DP2 _HPD<40>

SOC_ENV DD<38 >

SOC_BKL _PWM<38>

USB_OC1 #
USB_OC2 #

T302

T509

T510

T511

ENBKL<58>

TP@

TP@

TP@

T512
T303

T306

T301

TP@
TP@

TP@

TP@

SOC_GPP _E21

1

SOC_GPP _D10

1

SOC_GPP _D12

1

SOC_GPP _A19

1

SOC_GPP _A20

1

USB_OC1 #
USB_OC2 #
SOC_GPP _E17

1

ENBKL

RSVD_1

DISP_UTILS

1

DISP_RCOM P

12

RC350
150_040 2_1%

UC1A

Y5

DDIA_TXN_0

Y3

DDIA_TXP_0

Y1

DDIA_TXN_1

Y2

DDIA_TXP_1

V2

DDIA_TXN_2

V1

DDIA_TXP_2

V3

DDIA_TXN_3

V5

DDIA_TXP_3

W4

DDIA_AUX_N

W3

DDIA_AUX_P

AE3

DDIB_TXN_0

AE5

DDIB_TXP_0

AE2

DDIB_TXN_1

AE1

DDIB_TXP_1

AC5

DDIB_TXN_2

AC3

DDIB_TXP_2

AC1

DDIB_TXN_3

AC2

DDIB_TXP_3

AD3

DDIB_AUX_N

AD4

DDIB_AUX_P

DP15

GPP_E22/DDPA_CTRLCLK/PCIE_LNK_DOWN

DJ17

GPP_E23/DDPA_CTRLDATA/BK4/SBK4

DL40

GPP_H16/DDPB_CTRLCLK

DP42

GPP_H17/DDPB_CTRLDATA

DL17

GPP_E18/DDP1_CTRLCLK/TBT_LSX0_TXD

DK17

GPP_E19/DDP1_CTRLDATA/TBT_LSX0_RXD

DN17

GPP_E20/DDP2_CTRLCLK/TBT_LSX1_TXD

DP17

GPP_E21/DDP2_CTRLDATA/TBT_LSX1_RXD

DK34

GPP_D9/ISH_SPI_CS_N/DDP3_CTRLCLK/GSPI2_CS0_N/TBT_LSX2_TXD

DL34

GPP_D10/ISH_SPI_CLK/DDP3_CTRLDATA/GSPI2_CLK/TBT_LSX2_RXD

DN33

GPP_D11/ISH_SPI_MISO/DDP4_CTRLCLK/GSPI2_MISO/TBT_LSX3_TXD

DL33

GPP_D12/ISH_SPI_MOSI/DDP4_CTRLDATA/GSPI2_MOSI/TBT_LSX3_RXD

DW11

GPP_E14/DPPE_HPDA/DISP_MISCA

CV42

GPP_A18/DDSP_HPDB/DISP_MISCB

CV39

GPP_A19/DDSP_HPD1/DISP_MISC1

CY43

GPP_A20/DDSP_HPD2/DISP_MISC2

CR41

GPP_A14/USB_OC1_N/DDSP_HPD3/DISP_MISC3

CT41

GPP_A15/USB_OC2_N/DDSP_HPD4/DISP_MISC4

DV14

GPP_E17

DN21

EDP_VDDEN

DL19

EDP_BKLTEN

DU19

EDP_BKLTCTL

J3

RSVD_1

D2

DISP_UTILS

R2

DISP_RCOMP

ICL-U_BGA1 526

@

DDI

1 0f 19

TBT / USB / DP

GPP_A17/DISP_MISCC

TCP0_TX_N0
TCP0_TX_P0
TCP0_TX_N1

TCP0_TX_P1
TCP0_TXRX_N0
TCP0_TXRX_P0
TCP0_TXRX_N1
TCP0_TXRX_P1

TCP0_AUX_N
TCP0_AUX_P

TCP1_TX_N0

TCP1_TX_P0

TCP1_TX_N1

TCP1_TX_P1
TCP1_TXRX_N0
TCP1_TXRX_P0
TCP1_TXRX_N1
TCP1_TXRX_P1

TCP1_AUX_N
TCP1_AUX_P

TCP2_TX_N0

TCP2_TX_P0

TCP2_TX_N1

TCP2_TX_P1
TCP2_TXRX_N0
TCP2_TXRX_P0
TCP2_TXRX_N1
TCP2_TXRX_P1

TCP2_AUX_N
TCP2_AUX_P

TCP3_TX_N0

TCP3_TX_P0

TCP3_TX_N1

TCP3_TX_P1
TCP3_TXRX_N0
TCP3_TXRX_P0
TCP3_TXRX_N1
TCP3_TXRX_P1

TCP3_AUX_N
TCP3_AUX_P

TC_RCOMP_N
TC_RCOMP_P

GPP_A21
GPP_A22

BB5
BB6
AV6
AV5
BH2
BH1
BF1
BF2

AY5
AY6

AR5
AR6
AL5
AL3
BD2
BD1
BB1
BB2

AN3
AN5

BF6
BF5
BJ5
BJ6
BL1
BL2
BM2
BM1

BG6
BG5

BP6
BP5
BV5
BV6
BR1
BR2
BT2
BT1

BT6
BT5

AY1
AY2

CT38
CV43
CV41

TC_RCOM P_N
TC_RCOM P_P

TPM_PIRQ#
TS_EN

PCB DAZ

ZZZ

PCB@ DAZ2W V00100

PCB FH5L I LA-J801P LS-H781P/H783P

Ice Lake-U CPU SKU
i3-1005G1 i5-1035G1

UC1

ICL-U_BGA1 526

S IC FJ8068 904310007 SRG KF D1 1.2G FCBGA
SA0000C VQ30
i3@

1 2

RC351 150_040 2_1%

TPM_PIRQ# < 66>

TS_EN <38,58 >

UC1

ICL-U_BGA1 526

S IC FJ8068 904368700 SRG KG D1 1G FCBGA
SA0000C UQ20
i5@

Reserve Test Po int

GPP_E19
TBT LSX #0 PINS VCCIO CONFIGURATION
NO INTERNAL PU/PD

HIGH: 3.3V
LOW: 1.8V

GPP_E21
TBT LSX #1 PINS VCCIO CONFIGURATION
INTERNAL PD 20K

HIGH: 3.3V
LOW: 1.8V

4 4

GPP_D10
TBT LSX #2 PINS VCCIO CONFIGURATION
NO INTERNAL PU/PD

HIGH: 3.3V
LOW: 1.8V

GPP_D12
TBT LSX #3 PINS VCCIO CONFIGURATION
NO INTERNAL PU/PD

HIGH: 3.3V
LOW: 1.8V

A

B

RSVD_1:
Follow 573129_I CL_U_DDR4_SODI MM_HW_SCH_RN

1 2

RC348 100K_04 02_5%

1 2

RC422 100K_04 02_5%

Security Class ification

Security Class ification

Security Class ification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

RSVD_1

ENBKL

2019/04/ 12 2020/04/ 12

2019/04/ 12 2020/04/ 12

2019/04/ 12 2020/04/ 12

C

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document N umber Rev

Size Document N umber Rev

Size Document N umber Rev

Date: Sheet of

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

ICL-U(1/14)DDI,EDP

ICL-U(1/14)DDI,EDP

ICL-U(1/14)DDI,EDP

FH5LI M/B LA-H801P

FH5LI M/B LA-H801P

FH5LI M/B LA-H801P

1.0

1.0

1.0

6 102Tuesday, October 15 , 2019

6 102Tuesday, October 15 , 2019

6 102Tuesday, October 15 , 2019

E

+3VS

Vinafix.com

A

B

C

D

E

1 2

@

RC3984
10K_040 2_5%

Reserve

1 1

VCCIN_AUX _CORE_ALERT# _R<17>

2 2

EC_SCI#_R

+3VALW _PRIM

+1.05V_V CCST

H_PROCH OT#<58,84>

+3VALW _PRIM

12

RC371
100K_04 02_5%

1 2

RC3990 1 00K_0402_5%

1 2

RC11 49.9_040 2_1%

1 2

RC12 1K_0402 _5%

CC4 0.1U_02 01_10V6K

EMC@

CC130 0.1U_020 1_10V6K

XEMC@

1 2

RC366 49.9_ 0402_1%

1 2

RC365 49.9_ 0402_1%

H_PROCH OT#

DC10

1 2

RB751V-4 0_SOD323-2

SCS0000 0Z00

EC_SLP_ S0IX#

12

12

+1.05VS_ VCCSTG_OUT_L GC

12

RC6
1K_0402 _5%

1 2

RC7
499_040 2_1%

EC_SLP_ S0IX#<58>

EC_SCI#<58>

H_PROCH OT#

EC_TP_INT #<58,63>

CATERR#

H_THERM TRIP#

H_PECI

PROC_PO PIRCOMP
PCH_OPIRC OMP

H_PECI<58>

1

CC1

EMC@

100P_02 01_50V8J

2

EC_SLP_ S0IX#

CATERR#
H_PECI
H_PROCH OT#_R
H_THERM TRIP#

PROC_PO PIRCOMP
PCH_OPIRC OMP

XDP_ITP_P MODE

EC_SCI#_R

12

RC39910_04 02_5% @

TP_INT#

12

RC39630_04 02_5%

SOC_GPP _E6
SOC_GPP _H2

UC1D

J4

CATERR#

CD5

PECI

C3

PROCHOT#

E3

THRMTRIP#

CJ41

PROC_POPIRCOMP

DU3

PCH_OPIRCOMP

A14

RSVD_25

B14

RSVD_26

DL15

DBG_PMODE

DV11

GPP_E3/CPU_GP0

DT11

GPP_E7/CPU_GP1

CR38

GPP_B3/CPU_GP2

CR39

GPP_B4/CPU_GP3

DT12

GPP_E6

DJ38

GPP_H2/CNV_BT_I2S_SDO

DL38

GPP_H19/TIME_SYNC0

ICL-U_BGA1 526

@

JTAG

4 of 19

PROC_TCK

PROC_TDI
PROC_TDO
PROC_TMS

PROC_TRST#

PCH_TRST#

PCH_TCK

PCH_TDI
PCH_TDO
PCH_TMS

PCH_JTAGX

PROC_PRDY#
PROC_PREQ#

check XDP /DCI

< PU/PD for CMC Debug >

P3
K5
K3
P4
N1

N5
R5
K1
K2
N3
N2

P6
M6

SOC_XDP _TCK0
SOC_XDP _TDI
SOC_XDP _TDO
SOC_XDP _TMS
SOC_XDP _TRST#

SOC_XDP _TRST#
PCH_JTA G_TCK1

SOC_XDP _TDI

SOC_XDP _TDO
SOC_XDP _TMS
SOC_XDP _TCK0

XDP_PRD Y#
XDP_PRE Q#

T497TP@
T2TP@

SOC_XDP _TMS

SOC_XDP _TDI

SOC_XDP _TDO

XDP_PRE Q#

SOC_XDP _TCK0

PCH_JTA G_TCK1

SOC_XDP _TRST#

1 2

RC13 51_04 02_5%CMC@

1 2

RC14 51_04 02_5%CMC@

1 2

RC15 51_04 02_5%CMC@

1 2

RC17 51_04 02_5%@

CMC@

1 2

RC20 51_04 02_5%

1 2

RC22 51_04 02_5%@

1 2

RC21 51_04 02_5%@

+1.05VS_ VCCSTG_OUT_L GC

XDP_ITP_PMODE
DFX TEST MODE
INTERNAL PD 20K
HIGH: DFX TEST MODE DISABLED(DEFAULT)

3 3

4 4

A

LOW: DFX TES TMODE ENABLED

+1.05VO_ OUT_FET

RC18 1K_0402 _5%CMC@

RC19 1K_0402 _5%@

1 2

1 2

XDP_ITP_P MODE

+3VALW _PRIM

RC370 100K_04 02_5%

RC3965 100K_04 02_5%@

B

SOC_GPP_E6
JTAG ODT DISABLE
NO INTERNAL PU/PD
HIGH: JTAG ODT ENABLED
LOW: JTAG ODT DISABLED

1 2

1 2

Security Class ification

Security Class ification

Security Class ification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

SOC_GPP _E6

+3VALW _PRIM

2019/04/ 12 2020/04/ 12

2019/04/ 12 2020/04/ 12

2019/04/ 12 2020/04/ 12

C

GPP_H2
MAF/SAF STRAP
INTERNAL PD 20K
HIGH: Slave Attached Flash Sharing (SAFS) is enabled.
LOW: Master Attached Flash Sharing (MAFS) is enabled.
(Default)

1 2

RC389 2.2K_040 2_5%@

1 2

RC3966 2.2K_040 2_5%@

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

SOC_GPP _H2

D

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document N umber Rev

Size Document N umber Rev

Size Document N umber Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

ICL-U(1/14)DDI,MSIC,XDP

ICL-U(1/14)DDI,MSIC,XDP

ICL-U(1/14)DDI,MSIC,XDP

FH5LI M/B LA-H801P

FH5LI M/B LA-H801P

FH5LI M/B LA-H801P

E

7 102Tuesday, October 15 , 2019

7 102Tuesday, October 15 , 2019

7 102Tuesday, October 15 , 2019

1.0

1.0

1.0

5

Vinafix.com

4

3

2

1

Follow Intel DDR4 NIL

DDR4: Refer to 575034_ICL_U42_DDR4_T3_6L_Core_Schematics_Rev0p7

D D

DDR_A_D[0..15]<23>

DDR_A_D[16..31]<23>

DDR_A_D[32..47]<23>

C C

DDR_A_D[48..63]<23>

DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7
DDR_A_D8
DDR_A_D9
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15
DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31
DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47
DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63

SM_RCOMP0

12

RC25100_0402_1%

SM_RCOMP1

12

RC26100_0402_1%

SM_RCOMP2

12

RC27100_0402_1%

UC1B

LP4(NIL) / DDR4(NIL) LP4(NIL) / DDR4(NIL)

CA48

DDRA_DQ0_0/DDR0_DQ0_0

CA47

DDRA_DQ0_1/DDR0_DQ0_1

CA49

DDRA_DQ0_2/DDR0_DQ0_2

BV49

DDRA_DQ0_3/DDR0_DQ0_3

CA45

DDRA_DQ0_4/DDR0_DQ0_4

BV47

DDRA_DQ0_5/DDR0_DQ0_5

BV45

DDRA_DQ0_6/DDR0_DQ0_6

BV48

DDRA_DQ0_7/DDR0_DQ0_7

CC42

DDRA_DQ1_0/DDR0_DQ1_0

CC39

DDRA_DQ1_1/DDR0_DQ1_1

CC43

DDRA_DQ1_2/DDR0_DQ1_2

CE38

DDRA_DQ1_3/DDR0_DQ1_3

CC38

DDRA_DQ1_4/DDR0_DQ1_4

CE39

DDRA_DQ1_5/DDR0_DQ1_5

CE42

DDRA_DQ1_6/DDR0_DQ1_6

CE43

DDRA_DQ1_7/DDR0_DQ1_7

BT48

DDRA_DQ2_0/DDR0_DQ2_0

BT47

DDRA_DQ2_1/DDR0_DQ2_1

BT49

DDRA_DQ2_2/DDR0_DQ2_2

BN49

DDRA_DQ2_3/DDR0_DQ2_3

BT45

DDRA_DQ2_4/DDR0_DQ2_4

BN47

DDRA_DQ2_5/DDR0_DQ2_5

BN45

DDRA_DQ2_6/DDR0_DQ2_6

BN48

DDRA_DQ2_7/DDR0_DQ2_7

BV42

DDRA_DQ3_0/DDR0_DQ3_0

BV39

DDRA_DQ3_1/DDR0_DQ3_1

BV43

DDRA_DQ3_2/DDR0_DQ3_2

BW38

DDRA_DQ3_3/DDR0_DQ3_3

BV38

DDRA_DQ3_4/DDR0_DQ3_4

BW39

DDRA_DQ3_5/DDR0_DQ3_5

BW42

DDRA_DQ3_6/DDR0_DQ3_6

BW43

DDRA_DQ3_7/DDR0_DQ3_7

AY48

DDRB_DQ0_0/DDR0_DQ4_0

AY47

DDRB_DQ0_1/DDR0_DQ4_1

AY49

DDRB_DQ0_2/DDR0_DQ4_2

AU45

DDRB_DQ0_3/DDR0_DQ4_3

AY45

DDRB_DQ0_4/DDR0_DQ4_4

AU47

DDRB_DQ0_5/DDR0_DQ4_5

AU48

DDRB_DQ0_6/DDR0_DQ4_6

AU49

DDRB_DQ0_7/DDR0_DQ4_7

AY42

DDRB_DQ1_0/DDR0_DQ5_0

AY38

DDRB_DQ1_1/DDR0_DQ5_1

AY43

DDRB_DQ1_2/DDR0_DQ5_2

BB39

DDRB_DQ1_3/DDR0_DQ5_3

AY39

DDRB_DQ1_4/DDR0_DQ5_4

BB38

DDRB_DQ1_5/DDR0_DQ5_5

BB42

DDRB_DQ1_6/DDR0_DQ5_6

BB43

DDRB_DQ1_7/DDR0_DQ5_7

AR48

DDRB_DQ2_0/DDR0_DQ6_0

AR47

DDRB_DQ2_1/DDR0_DQ6_1

AR49

DDRB_DQ2_2/DDR0_DQ6_2

AM45

DDRB_DQ2_3/DDR0_DQ6_3

AR45

DDRB_DQ2_4/DDR0_DQ6_4

AM47

DDRB_DQ2_5/DDR0_DQ6_5

AM48

DDRB_DQ2_6/DDR0_DQ6_6

AM49

DDRB_DQ2_7/DDR0_DQ6_7

AT42

DDRB_DQ3_0/DDR0_DQ7_0

AT39

DDRB_DQ3_1/DDR0_DQ7_1

AR43

DDRB_DQ3_2/DDR0_DQ7_2

AT38

DDRB_DQ3_3/DDR0_DQ7_3

AR38

DDRB_DQ3_4/DDR0_DQ7_4

AR39

DDRB_DQ3_5/DDR0_DQ7_5

AR42

DDRB_DQ3_6/DDR0_DQ7_6

AT43

DDRB_DQ3_7/DDR0_DQ7_7

D47

DDR_RCOMP_0

E46

DDR_RCOMP_1

C47

DDR_RCOMP_2

ICL-U_BGA1526

@

2 of 19

DDRA_CLK_N/DDR0_CLK_N_0
DDRA_CLK_P/DDR0_CLK_P_0
DDRB_CLK_N/DDR0_CLK_N_1

DDRB_CLK_P/DDR0_CLK_P_1

DDRA_CKE0/DDR0_CKE0

DDRA_CKE1/NC
DDRB_CKE0/NC

DDRB_CKE1/DDR0_CKE1

DDRA_CS_0/DDR0_CS#0

DDRA_CS_1/NC
DDRB_CS_0/NC

DDRB_CS_1/DDR0_CS#1

DDRB_CA4/DDR0_BA0

NC/DDR0_BA1

DDRA_CA5/DDR0_BG0

NC/DDR0_BG1

NC/DDR0_MA0
NC/DDR0_MA1

DDRB_CA5/DDR0_MA2

NC/DDR0_MA3

NC/DDR0_MA4
DDRA_CA0/DDR0_MA5
DDRA_CA2/DDR0_MA6
DDRA_CA4/DDR0_MA7
DDRA_CA3/DDR0_MA8
DDRA_CA1/DDR0_MA9

NC/DDR0_MA10
NC/DDR0_MA11
NC/DDR0_MA12

DDRB_CA0/DDR0_MA13

DDRB_CA2/DDR0_MA14WE#
DDRB_CA1/DDR0_MA15CAS#
DDRB_CA3/DDR0_MA16RAS#

NC/DDR0_ODT_0
NC/DDR0_ODT_1

DDRA_DQSN_0/DDR0_DQSN_0

DDRA_DQSP_0/DDR0_DQSP_0

DDRA_DQSN_1/DDR0_DQSN_1

DDRA_DQSP_1/DDR0_DQSP_1

DDRA_DQSN_2/DDR0_DQSN_2

DDRA_DQSP_2/DDR0_DQSP_2

DDRA_DQSN_3/DDR0_DQSN_3

DDRA_DQSP_3/DDR0_DQSP_3

DDRB_DQSN_0/DDR0_DQSN_4

DDRB_DQSP_0/DDR0_DQSP_4

DDRB_DQSN_1/DDR0_DQSN_5

DDRB_DQSP_1/DDR0_DQSP_5

DDRB_DQSN_2/DDR0_DQSN_6

DDRB_DQSP_2/DDR0_DQSP_6

DDRB_DQSN_3/DDR0_DQSN_7

DDRB_DQSP_3/DDR0_DQSP_7

NC/DDR0_PAR

NC/DDR0_ACT#

NC/DDR0_ALERT#

RSVD_73
DDR0_VREF_CA
DDR1_VREF_CA

DDR_VTT_CTL

DRAM_RESET#

BL48
BL47
BF42
BF43

BG49
BJ47
BF38
BF41

BM38
BM42
BP42
BG42

BM43
BG39

BB49
BD47

BB48
BL49
BG38
BL45
BJ46
BG48
BE45
BG45
BG47
BE47
BJ38
BB47
BE48
BM39
BG43
BJ42
BM41

BJ39
BB45

BY47
BY46
CC41
CE41
BR47
BR46
BV41
BW41
AV46
AV47
AY41
BB41
AN46
AN47
AR41
AT41

BF39
BE49
BD46

M38
C44
B45
M39
DK47

DDR_PG_CTRL
DDR_DRAMRST#

DDR_A_CLK#0 <23>
DDR_A_CLK0 <23>
DDR_A_CLK#1 <23>
DDR_A_CLK1 <23>

DDR_A_CKE0 <23>

DDR_A_CKE1 <23>

DDR_A_CS#0 <23>

DDR_A_CS#1 <23>

DDR_A_BA0 < 23>
DDR_A_BA1 < 23>

DDR_A_BG0 <23>
DDR_A_BG1 <23>

DDR_A_MA0 <23>
DDR_A_MA1 <23>
DDR_A_MA2 <23>
DDR_A_MA3 <23>
DDR_A_MA4 <23>
DDR_A_MA5 <23>
DDR_A_MA6 <23>
DDR_A_MA7 <23>
DDR_A_MA8 <23>
DDR_A_MA9 <23>
DDR_A_MA10 <23>
DDR_A_MA11 <23>
DDR_A_MA12 <23>
DDR_A_MA13 <23>
DDR_A_MA14 <23>
DDR_A_MA15 <23>
DDR_A_MA16 <23>

DDR_A_ODT0 <23>
DDR_A_ODT1 <23>

DDR_A_DQS#0 <23>
DDR_A_DQS0 <23>
DDR_A_DQS#1 <23>
DDR_A_DQS1 <23>
DDR_A_DQS#2 <23>
DDR_A_DQS2 <23>
DDR_A_DQS#3 <23>
DDR_A_DQS3 <23>
DDR_A_DQS#4 <23>
DDR_A_DQS4 <23>
DDR_A_DQS#5 <23>
DDR_A_DQS5 <23>
DDR_A_DQS#6 <23>
DDR_A_DQS6 <23>
DDR_A_DQS#7 <23>
DDR_A_DQS7 <23>

DDR_A_PAR <23>
DDR_A_ACT# <23>

DDR_A_ALERT# <23>

1

T244TP@

+0.6V_A_VREFCA
+0.6V_B_VREFCA

DDR_DRAMRST# <23,24>

DDR_B_D[0..15]<24>

DDR_B_D[16..31]<24>

DDR_B_D[32..47]<24>

DDR_B_D[48..63]<24>

Trace width/Spacing >= 20mils

DDR_B_D0
DDR_B_D1
DDR_B_D2
DDR_B_D3
DDR_B_D4
DDR_B_D5
DDR_B_D6
DDR_B_D7
DDR_B_D8
DDR_B_D9
DDR_B_D10
DDR_B_D11
DDR_B_D12
DDR_B_D13
DDR_B_D14
DDR_B_D15
DDR_B_D16
DDR_B_D17
DDR_B_D18
DDR_B_D19
DDR_B_D20
DDR_B_D21
DDR_B_D22
DDR_B_D23
DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_B_D27
DDR_B_D28
DDR_B_D29
DDR_B_D30
DDR_B_D31
DDR_B_D32
DDR_B_D33
DDR_B_D34
DDR_B_D35
DDR_B_D36
DDR_B_D37
DDR_B_D38
DDR_B_D39
DDR_B_D40
DDR_B_D41
DDR_B_D42
DDR_B_D43
DDR_B_D44
DDR_B_D45
DDR_B_D46
DDR_B_D47
DDR_B_D48
DDR_B_D49
DDR_B_D50
DDR_B_D51
DDR_B_D52
DDR_B_D53
DDR_B_D54
DDR_B_D55
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
DDR_B_D60
DDR_B_D61
DDR_B_D62
DDR_B_D63

UC1C

LP4(NIL) / DDR4(NIL)

AK48

DDRC_DQ0_0/DDR1_DQ0_0

AK45

DDRC_DQ0_1/DDR1_DQ0_1

AK49

DDRC_DQ0_2/DDR1_DQ0_2

AG47

DDRC_DQ0_3/DDR1_DQ0_3

AK47

DDRC_DQ0_4/DDR1_DQ0_4

AG45

DDRC_DQ0_5/DDR1_DQ0_5

AG48

DDRC_DQ0_6/DDR1_DQ0_6

AG49

DDRC_DQ0_7/DDR1_DQ0_7

AJ38

DDRC_DQ1_0/DDR1_DQ1_0

AL39

DDRC_DQ1_1/DDR1_DQ1_1

AJ39

DDRC_DQ1_2/DDR1_DQ1_2

AL43

DDRC_DQ1_3/DDR1_DQ1_3

AL38

DDRC_DQ1_4/DDR1_DQ1_4

AJ42

DDRC_DQ1_5/DDR1_DQ1_5

AL42

DDRC_DQ1_6/DDR1_DQ1_6

AJ43

DDRC_DQ1_7/DDR1_DQ1_7

AB49

DDRC_DQ2_0/DDR1_DQ2_0

AB48

DDRC_DQ2_1/DDR1_DQ2_1

AE49

DDRC_DQ2_2/DDR1_DQ2_2

AE47

DDRC_DQ2_3/DDR1_DQ2_3

AE48

DDRC_DQ2_4/DDR1_DQ2_4

AB47

DDRC_DQ2_5/DDR1_DQ2_5

AB45

DDRC_DQ2_6/DDR1_DQ2_6

AE45

DDRC_DQ2_7/DDR1_DQ2_7

AD38

DDRC_DQ3_0/DDR1_DQ3_0

AD39

DDRC_DQ3_1/DDR1_DQ3_1

AE39

DDRC_DQ3_2/DDR1_DQ3_2

AE43

DDRC_DQ3_3/DDR1_DQ3_3

AE38

DDRC_DQ3_4/DDR1_DQ3_4

AD43

DDRC_DQ3_5/DDR1_DQ3_5

AD42

DDRC_DQ3_6/DDR1_DQ3_6

AE42

DDRC_DQ3_7/DDR1_DQ3_7

J48

DDRD_DQ0_0/DDR1_DQ4_0

J45

DDRD_DQ0_1/DDR1_DQ4_1

J49

DDRD_DQ0_2/DDR1_DQ4_2

G47

DDRD_DQ0_3/DDR1_DQ4_3

J47

DDRD_DQ0_4/DDR1_DQ4_4

G45

DDRD_DQ0_5/DDR1_DQ4_5

G48

DDRD_DQ0_6/DDR1_DQ4_6

E48

DDRD_DQ0_7/DDR1_DQ4_7

J38

DDRD_DQ1_0/DDR1_DQ5_0

G39

DDRD_DQ1_1/DDR1_DQ5_1

G38

DDRD_DQ1_2/DDR1_DQ5_2

G42

DDRD_DQ1_3/DDR1_DQ5_3

J39

DDRD_DQ1_4/DDR1_DQ5_4

J42

DDRD_DQ1_5/DDR1_DQ5_5

G43

DDRD_DQ1_6/DDR1_DQ5_6

J43

DDRD_DQ1_7/DDR1_DQ5_7

B43

DDRD_DQ2_0/DDR1_DQ6_0

D43

DDRD_DQ2_1/DDR1_DQ6_1

A43

DDRD_DQ2_2/DDR1_DQ6_2

C40

DDRD_DQ2_3/DDR1_DQ6_3

C43

DDRD_DQ2_4/DDR1_DQ6_4

D40

DDRD_DQ2_5/DDR1_DQ6_5

B40

DDRD_DQ2_6/DDR1_DQ6_6

A40

DDRD_DQ2_7/DDR1_DQ6_7

B35

DDRD_DQ3_0/DDR1_DQ7_0

D35

DDRD_DQ3_1/DDR1_DQ7_1

A35

DDRD_DQ3_2/DDR1_DQ7_2

D38

DDRD_DQ3_3/DDR1_DQ7_3

C35

DDRD_DQ3_4/DDR1_DQ7_4

C38

DDRD_DQ3_5/DDR1_DQ7_5

B38

DDRD_DQ3_6/DDR1_DQ7_6

A38

DDRD_DQ3_7/DDR1_DQ7_7

ICL-U_BGA1526

@

DDRC_CLK_N/DDR1_CLK_N_0
DDRC_CLK_P/DDR1_CLK_P_0
DDRD_CLK_N/DDR1_CLK_N_1
DDRD_CLK_P/DDR1_CLK_P_1

DDRC_CKE0/DDR1_CKE0

DDRD_CKE1/DDR1_CKE1

DDRC_CS_0/DDR1_CS#0

DDRD_CS_1/DDR1_CS#1

DDRD_CA2/DDR1_MA14WE#
DDRD_CA1/DDR1_MA15CAS#
DDRD_CA3/DDR1_MA16RAS#

DDRC_DQSN_0/DDR1_DQSN_0
DDRC_DQSP_0/DDR1_DQSP_0
DDRC_DQSN_1/DDR1_DQSN_1
DDRC_DQSP_1/DDR1_DQSP_1
DDRC_DQSN_2/DDR1_DQSN_2
DDRC_DQSP_2/DDR1_DQSP_2
DDRC_DQSN_3/DDR1_DQSN_3
DDRC_DQSP_3/DDR1_DQSP_3
DDRD_DQSN_0/DDR1_DQSN_4
DDRD_DQSP_0/DDR1_DQSP_4
DDRD_DQSN_1/DDR1_DQSN_5
DDRD_DQSP_1/DDR1_DQSP_5
DDRD_DQSN_2/DDR1_DQSN_6
DDRD_DQSP_2/DDR1_DQSP_6
DDRD_DQSN_3/DDR1_DQSN_7
DDRD_DQSP_3/DDR1_DQSP_7

3 of 19

LP4(NIL) / DDR4(NIL)

DDRC_CKE1/NC
DDRD_CKE0/NC

DDRC_CS_1/NC
DDRD_CS_0/NC

DDRD_CA4/DDR1_BA0

NC/DDR1_BA1

DDRC_CA5/DDR1_BG0

NC/DDR1_BG1

NC/DDR1_MA0
NC/DDR1_MA1

DDRD_CA5/DDR1_MA2

NC/DDR1_MA3

NC/DDR1_MA4
DDRC_CA0/DDR1_MA5
DDRC_CA2/DDR1_MA6
DDRC_CA4/DDR1_MA7
DDRC_CA3/DDR1_MA8
DDRC_CA1/DDR1_MA9

NC/DDR1_MA10
NC/DDR1_MA11
NC/DDR1_MA12

DDRD_CA0/DDR1_MA13

NC/DDR1_ODT_0
NC/DDR1_ODT_1

NC/DDR1_PAR

NC/DDR1_ACT#

NC/DDR1_ALERT#

Y48
Y47
M43
M42

U45
V46
M41
P43

V42
V39
Y39
T39

T38
T42

R45
N47

P42
Y49
U48
Y45
U47
R49
U49
M47
M45
R47
P39
N46
R48
Y41
V41
Y42
V47

V43
V38

AH46
AH47
AJ41
AL41
AC47
AC46
AE41
AD41
H47
H46
G41
J41
C42
D42
D36
C36

P38
M48
M49

DDR_B_CLK#1
DDR_B_CLK1

DDR_B_CKE1

DDR_B_CS#1

DDR_B_ODT1

DDR_B_CLK#0 <24>
DDR_B_CLK0 <24>

T3TP@
T4TP@

DDR_B_CKE0 <24>

T504TP@

DDR_B_CS#0 <24>

T498TP@

DDR_B_BA0 < 24>
DDR_B_BA1 < 24>

DDR_B_BG0 <24>
DDR_B_BG1 <24>

DDR_B_MA0 <24>
DDR_B_MA1 <24>
DDR_B_MA2 <24>
DDR_B_MA3 <24>
DDR_B_MA4 <24>
DDR_B_MA5 <24>
DDR_B_MA6 <24>
DDR_B_MA7 <24>
DDR_B_MA8 <24>
DDR_B_MA9 <24>
DDR_B_MA10 <24>
DDR_B_MA11 <24>
DDR_B_MA12 <24>
DDR_B_MA13 <24>
DDR_B_MA14 <24>
DDR_B_MA15 <24>
DDR_B_MA16 <24>

DDR_B_ODT0 <24>

T500TP@

DDR_B_DQS#0 <24>
DDR_B_DQS0 <24>
DDR_B_DQS#1 <24>
DDR_B_DQS1 <24>
DDR_B_DQS#2 <24>
DDR_B_DQS2 <24>
DDR_B_DQS#3 <24>
DDR_B_DQS3 <24>
DDR_B_DQS#4 <24>
DDR_B_DQS4 <24>
DDR_B_DQS#5 <24>
DDR_B_DQS5 <24>
DDR_B_DQS#6 <24>
DDR_B_DQS6 <24>
DDR_B_DQS#7 <24>
DDR_B_DQS7 <24>

DDR_B_PAR <24>
DDR_B_ACT# <24>

DDR_B_ALERT# <24>

B B

Buffer with Ope n Drain Output

For VTT power c ontrol

12

CC6 0.1U_0201_10V6K

UC3

DDR_PG_CTRL

A A

5

4

NC1VCC

2

A

3

GND

74AUP1G07GW_TSSOP5

SA00005U600

+1.2V_VDDQ

+3VS

12

RC28

5

100K_0402_5%

4

Y

3

RC16
1M_0402_5%@

1 2

SM_PG_CTRL <86>

SM_PG_CTRL to DDR
VTT supplied ramped
<35uS
(tCPU18)

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELE CTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELE CTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELE CTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETE NT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETE NT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETE NT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WI THOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WI THOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WI THOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2019/04/12 2020/04/12

2019/04/12 2020/04/12

2019/04/12 2020/04/12

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

DDR_DRAMRST#

+1.2V_VDDQ

12

RC30
470_0402_5%

1

CC9
100P_0402_50V8J

EMC@

2

PDG & CKL no st uff

Title

Title

Title

ICL-U(3/14)DDR4

ICL-U(3/14)DDR4

ICL-U(3/14)DDR4

Size Doc ument Number Rev

Size Doc ument Number Rev

Size Doc ument Number Rev

FH5LI M/B LA-H801P

FH5LI M/B LA-H801P

FH5LI M/B LA-H801P

Date: Sheet of

Date: Sheet of

Date: Sheet of

ESD

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

1

8 102Tuesday, October 15, 2019

8 102Tuesday, October 15, 2019

8 102Tuesday, October 15, 2019

1.0

1.0

1.0

5

Vinafix.com

D D

SPI ROM

TPM<-

+3VALW _PRIM

1 2

RC37 100K_0402 _5%

C C

+3VALW _PRIM

+3VALW _PRIM

B B

1 2

RC3968 100K_04 02_5%@

1 2

RC38 100K_0402 _5%

1 2

RC3967 100K_04 02_5%@

1 2

RC39 100K_0402 _5%

1 2

RC3943 100K_04 02_5%@

SOC_SPI_0 _CLK<66>
SOC_SPI_0 _SI<66>
SOC_SPI_0 _SO<66>

SOC_SPI_0 _CS#2<66>

SOC_SPI_0 _SI

SOC_SPI_0_SI
BOOT HALT
NO INTERNAL PU/PD
HIGH: DISABLE
LOW: ENABLE

SOC_SPI_0 _IO2

SOC_SPI_0_IO2
CONSENT STRAP
NO INTERNAL PU/PD
HIGH: DISABLE
LOW: ENABLE

SOC_SPI_0 _IO3

SOC_SPI_0_IO3
A0 PERSONALITY STRAP
NO INTERNAL PU/PD
HIGH: DISABLE
LOW: ENABLE

close to SPI RO M

SOC_SPI_0 _SO_R
SOC_SPI_0 _CLK_R
SOC_SPI_0 _SI_R
SOC_SPI_0 _IO3_R

SOC_SPI_0 _IO2_R

From SOC

SOC_SPI_0 _SO
SOC_SPI_0 _CLK
SOC_SPI_0 _SI
SOC_SPI_0 _IO3

SOC_SPI_0 _IO2

1 2

RC2 49.9_040 2_1%

1 2

RC3 49.9_040 2_1%EMC@

1 2

RC4 49.9_040 2_1%

1 2

RC5 49.9_040 2_1%

1 2

RC1 49.9_040 2_1%

4

SOC_SPI_0 _CLK
SOC_SPI_0 _SI
SOC_SPI_0 _SO
SOC_SPI_0 _IO2
SOC_SPI_0 _IO3
SOC_SPI_0 _CS#0

SOC_SPI_0 _CS#2

UC1E

DB42

SPI0_CLK

DD43

SPI0_MOSI

DF43

SPI0_MISO

DF42

SPI0_IO2

DD41

SPI0_IO3

DB43

SPI0_CS0#

DF41

SPI0_CS1#

DB41

SPI0_CS2#

DV16

GPP_E11/SPI1_CLK/BK1/SBK1

DT16

GPP_E13/SPI1_MOSI/BK3/SBK3

DU18

GPP_E12/SPI1_MISO/BK2/SBK2

DT18

GPP_E1/SPI1_IO2

DW18

GPP_E2/SPI1_IO3

DW16

GPP_E10/SPI1_CS_N/BK0/SBK0

DU16

GPP_E8/SATALED#/SPI1_CS1#

DV19

CL_CLK

DW19

CL_DATA

DT19

CL_RST#

ICL-U_BGA1 526

@

3

SMBUS

SPI 0

SML 0

GPP_C6/SML1CLK/SUSWARN_N/SUSPWRDNACK

SML1

SPI 1

eSPI

MLINK

5 of 19

1 2
1 2
1 2

RC44375K_040 2_5% @
RC44475K_040 2_5% @
RC441100K_04 02_5%

ESPI_RST#
ESPI_CS#
SOC_SPI_0 _CLK

Follow 572907_ICL_UY_PDG for Glitch

MAF - Master Attached Flash
Single SPI Flash attached to SPI Bus
EC FW access through eSPI Bus

SOC_GPP _C2

GPP_C2
TLS CONFIDENTIALITY
INTERNAL PD 20K
HIGH: TLS CONFIDENTIALITY ENABLE
LOW: TLS CONFIDENTIALITY DISABLE

GPP_C0/SMBCLK

GPP_C1/SMBDATA

GPP_C2/SMBALERT#

GPP_C3/SML0CLK

GPP_C4/SML0DATA

GPP_C5/SML0ALERT#

GPP_C7/SML1DATA/SUSACK#

GPP_A5/ESPI_CLK

GPP_A0/ESPI_IO0
GPP_A1/ESPI_IO1
GPP_A2/ESPI_IO2

GPP_A3/ESPI_IO3

GPP_A4/ESPI_CS#

GPP_A6/ESPI_RESET#

2

1 2

RC86 4.7K_040 2_5%

1 2

RC3969 4.7K_040 2_5%@

SOC_SMB CLK

DK27

SOC_SMB DATA

DP24

SOC_GPP _C2

DL24

SOC_SML 0CLK

DK24

SOC_SML 0DATA

DJ24

SOC_SML 0ALERT#

DP22

EC_SMB_ CK2

DN22

EC_SMB_ DA2

DL22

ESPI_CLK

CR47
CN45
CN48
CN49
CN47
CT45
CR46

ESPI_IO0
ESPI_IO1
ESPI_IO2
ESPI_IO3
ESPI_CS#
ESPI_RST#

RC34 49.9_040 2_1%EMC@
RC32 10_0402 _1%
RC33 10_0402 _1%
RC35 10_0402 _1%
RC36 10_0402 _1%

+3VALW _PRIM

1 2
1 2
1 2
1 2
1 2

ESPI_CS# <58>
ESPI_RST# <58>

SOC_SMB CLK
SOC_SMB DATA
SOC_SML 0CLK
SOC_SML 0DATA

EC_SMB_ CK2
EC_SMB_ DA2

SOC_SMB CLK_1
SOC_SMB DATA_1

SOC_SMB CLK

SOC_SMB DATA

SOC_SML 0ALERT#

SOC_SML0ALERT#
ESPI OR EC LESS
INTERNAL PD 20K
HIGH: ESPI DISABLE
LOW: ESPI ENABLE (Default)

EC_SMB_ CK2 <5 8>
EC_SMB_ DA2 <5 8>

Follow CRB

RC383 1K_0402 _5%
RC384 1K_0402 _5%
RC316 499_040 2_1%
RC315 499_040 2_1%

RC381 1K_0402 _5%
RC382 1K_0402 _5%

1 2

RC3961 2.2K_040 2_5%

1 2

RC3962 2.2K_040 2_5%

+3VS

5

G

QC4B

3 4

D

2N7002K DW_SOT36 3-6

S

2

G

6 1

D

1 2

RC3944 4.7K_040 2_5%@

1 2

RC3945 4.7K_040 2_5%@

SMB

(Link to DDR& G sensor)

SML1

(Link to EC)

ESPI_CLK_ R <58>

ESPI_IO0_R <58>
ESPI_IO1_R <58>
ESPI_IO2_R <58>
ESPI_IO3_R <58>

ESPI
Follow
572907_ICL_UY_P DG

1 2
1 2
1 2
1 2

1 2
1 2

SOC_SMB CLK_1

QC4A
2N7002K DW_SOT36 3-6

SOC_SMB DATA_1

S

1

+3VALW _PRIM

To EC

+3VALW _PRIM

+3VS

SOC_SMB CLK_1 <23,66 >

SOC_SMB DATA_1 <23,66>

< SPI ROM - 16M >

A A

SOC_SPI_0 _CS#0
SOC_SPI_0 _SO_R SOC_SPI_0 _IO3_R

5

UC2

1

CS#

2

DO(IO1)

3

IO2

4

GND

XM25QH1 28AHIG SOP 8P

SA0000B 8400

VCC

CLK

DI(IO0)

IO

+3VALW _PRIM

8
7
6
5

@

1 2

CC3 0.1U_0201_ 10V6K

SOC_SPI_0 _CLK_RSOC_SPI_0 _IO2_R
SOC_SPI_0 _SI_R

Security Class ification

Security Class ification

Security Class ification

2019/04/ 12 2020/04/ 12

2019/04/ 12 2020/04/ 12

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2019/04/ 12 2020/04/ 12

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document N umber Rev

Size Document N umber Rev

Size Document N umber Rev

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

ICL-U(3/12)SPI,ESPI,SMB,LPC

ICL-U(3/12)SPI,ESPI,SMB,LPC

ICL-U(3/12)SPI,ESPI,SMB,LPC

FH5LI M/B LA-H801P

FH5LI M/B LA-H801P

FH5LI M/B LA-H801P

9 102Tuesday, October 15 , 2019

9 102Tuesday, October 15 , 2019

9 102Tuesday, October 15 , 2019

1

1.0

1.0

1.0

5

Vinafix.com

4

3

2

1

HDA_BIT_C LK
HDA_SYNC

D D

C C

HDA_SDIN0<56>

CNV_RF_ RESET#<52>

CLKREQ_ CNV#<52>

HDA_SDO UT

HDA_RST #

HDA_SDIN1

CNV_RF_ RESET#

< HD AUDIO >

1 2

HDA_RST #_R<56>

HDA_BIT_C LK_R<56>

HDA_SYNC_ R<56>

HDA_SDO UT_R<56>

RC3947 3 3_0402_5%

1 2

RC46 33_0402_5 %EMC@

1 2

RC48 33_0402_5 %

1 2

RC47 33_0402_5 %

12

@

HDA_BIT_C LK

HDA_SYNC

HDA_SDO UT

RC49
499_040 2_1%

UC1G

CY46

GPP_R0/HDA_BCLK/I2S0_SCLK

CV49

GPP_R1/HDA_SYNC/I2S0_SFRM

CY47

GPP_R2/HDA_SDO/I2S0_TXD

CV45

GPP_R3/HDA_SDI0/I2S0_RXD

DA47

GPP_R4/HDA_RST#

DP33

GPP_D19/I2S_MCLK

DC45

GPP_A23/I2S1_SCLK

DA49

GPP_R5/HDA_SDI1/I2S1_SFRM

DA45

GPP_R6/I2S1_TXD

DA48

GPP_R7/I2S1_RXD

CT49

GPP_A7/I2S2_SCLK

CT48

GPP_A8/I2S2_SFRM/CNV_RF_RESET#

CV47

GPP_A10/I2S2_RXD

CT47

GPP_A9/I2S2_TXD/MODEM_CLKREQ

CY39

GPP_S0/SNDW1_CLK

CY38

GPP_S1/SNDW1_DATA

DB39

GPP_S2/SNDW2_CLK

DD38

GPP_S3/SNDW2_DATA

DF38

GPP_S4/SNDW3_CLK/DMIC_CLK1

DD39

GPP_S5/SNDW3_DATA/DMIC_DATA1

ICL-U_BGA1 526

@

RC448 100K_04 02_5%
RC449 33K_040 2_5%

RC3946 33K_040 2_5%@

Follow
572907_ICL_UY_PDG for Glitch

1 2
1 2

1 2

SD3.0

GPP_H1/SD_PWR_EN_N/CNV_BT_I2S_SDO

GPP_S6/SNDW4_CLK/DMIC_CLK0

GPP_S7/SNDW4_DATA/DMIC_DATA0

AUDIO

7 of 19

HDA_BIT_C LK
HDA_RST #

HDA_SDIN1HDA_RST #

GPP_G6/SD_CLK
GPP_G1/SD_DATA0
GPP_G2/SD_DATA1
GPP_G3/SD_DATA2
GPP_G4/SD_DATA3

GPP_G0/SD_CMD

GPP_G7/SD_WP

GPP_G5/SD_CD#

GPP_H0/CNV_BT_I2S_SDO

SD3_RCOMP

SNDW_RCOMP

CE46
CC48
CC49
CC47
CF45
CC45
CF49
CE47

DK38
DG38

CJ43

DG36
DG34

CV38

SD3_RCO MP

SNDW _RCOMP

1 2

RC358 200_040 2_1%

1 2

RC359 200_040 2_1%

< To Enable ME Override >

B B

A A

ME_EN<58 >

5

1 2

RC51 0_0402_ 5%

HDA_SDO UT

4

Security Class ification

Security Class ification

Security Class ification

2019/04/ 12 2020/04/ 12

2019/04/ 12 2020/04/ 12

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2019/04/ 12 2020/04/ 12

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document N umber Rev

Size Document N umber Rev

Size Document N umber Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

ICL-U(4/12)HDA,SD

ICL-U(4/12)HDA,SD

ICL-U(4/12)HDA,SD

FH5LI M/B LA-H801P

FH5LI M/B LA-H801P

FH5LI M/B LA-H801P

10 102Tuesday, October 15 , 2019

10 102Tuesday, October 15 , 2019

10 102Tuesday, October 15 , 2019

1

1.0

1.0

1.0

1 2

Vinafix.com

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2
1 2
1 2

5

12

12

12

12

12

12

12

12

PVT modify

PM_SLP_S3#

PM_SLP_S4#

VCCST_OVERRIDE_LS

RC417100K_04 02_5%

VCCST_OVERRIDE_N

RC418100K_04 02_5%

VCCST_OVERRIDE_R

RC419100K_04 02_5%

VCCST_OVERRIDE_R

5

CLKREQ_PCIE#0
CLKREQ_PCIE#1
CLKREQ_PCIE#2

CLKREQ_PCIE#4

PM_SLP_S0#

SLP_SUS#
PM_SLP_S5#
PM_SLP_S4#
PM_SLP_S3#

PM_SLP_A#
PM_SLP_LAN#
PM_SLP_W LAN#

SYS_RESET#

SOC_SRTCRS T#

SOC_RTCRST #

CLR CMOS

SM_INTRUDER#

EC_RSMRST#
PCH_PWR OK

SYS_RESET#

EC_RSMRST#

SYS_PWROK

PLT_RST#

PCH_PWR OK

ESD

cost down plan

1 2

R345 0_0 402_5%@

D14

2

3

LRB715FT1G_ SOT323-3

SCS00008E0 0

1 2

R344 0_0 402_5%

@

1 2

R342 0_0 402_5%

@

1 2

R343 0_0 402_5%

VCCST_OVERRIDE_N

VGS(Max) : 1.5 V

M.2/SSD

G

LAN

WLAN

SOC_RTCRST # <58>

SM_INTRUDER#
NO INTERNAL PU/PD
HIGH: SPI VOLTAGE IS 1.8V
LOW: SPI VOLTAGE IS 3.3V

1

2

G

VGS(Max) : 1.5 V

13

D

2

QC2
BSS138W-7 -F_SOT323-3

G

SB00001GC00

S

VCCIN_AUX_CORE_VID <58>

VCCST_EN_LS <16>

13

D

S

+3VS

1 2

RC352 10K_0402_5%

1 2

RC353 10K_0402_5%

1 2

RC64 10K_0402 _5%

1 2

RC68 10K_0402 _5%@

reserve

D D

Follow
573129_ICL_U_DDR4_SODIMM_HW_SCH_RN
& 572907_ICL_UY_PDG for Glitch

+3VALW_PRIM +3VS

1 2

RC3959 100K_0402 _5%

1 2

RC394 100K_0402_ 5%

1 2

RC395 100K_0402_ 5%@

1 2

RC396 100K_0402_ 5%

1 2

RC397 100K_0402_ 5%

1 2

RC398 100K_0402_ 5%

1 2

RC399 100K_0402_ 5%

1 2

RC400 100K_0402_ 5%

+3VALW_PRIM

RC428 10K_0402_5 %

+RTCVCC

C C

B B

RC56 20K_0402_5%

CC13 1U_0201_6.3V6M

RC58 20K_0402_5%

CC14 1U_0201_6.3V6M

JCMOS1 0_0603_5%@

RC377 1M_0402_5 %@

CC319 0.1U_0201_10V6K@

RC427 10K_0402_5 %

RC386 100K_0402_ 5%
RC78 8.2K_ 0402_5%

CC20 100P_0402_50V8JEMC@

CC21 100P_0402_50V8JEMC@

CC376 100P_0402_50V8J@E MC@

CC23 100P_0402_50V8JEMC@

CC377 100P_0402_50V8J@E MC@

VCCST_EN

VCCIN_AUX_CORE_VID0_R<17,91>

VCCIN_AUX_CORE_VID1_R<17,58,91>

EC_VCCST_EN< 58>

+3VALW

A A

4

CLK_PCIE_N0<68>
CLK_PCIE_P0<68>
CLKREQ_PCIE#0<68>

CLK_PCIE_N1<51>
CLK_PCIE_P1<51>
CLKREQ_PCIE#1<51>

CLK_PCIE_N2<52>
CLK_PCIE_P2<52>
CLKREQ_PCIE#2<52>

PM_SLP_S4#<78>
PM_SLP_S3#<15,78>

PM_SLP_S0#<15 ,58,66>

EC_RSMRST#<58>

PLT_RST#<66>

PCH_PWROK<58,78>
SYS_PWROK<58,78>

From EC (Open-Drain)

EC_VCCST_PG_ R<5 8,78>

To EC

From EC to VCCST
VR Power SW Enable

To EC

VCCST_OVERRIDE_LS < 58>

QC3
BSS138W-7 -F_SOT323-3

SB00001GC00

4

3

UC1J

CJ3

CLKOUT_PCIE_N0

CJ5

CLKREQ_PCIE#0

CLKREQ_PCIE#1

CLKREQ_PCIE#2

CLKREQ_PCIE#4

SLP_SUS#
PM_SLP_S5#
PM_SLP_S4#
PM_SLP_S3#
PM_SLP_A#

PM_SLP_W LAN#
PM_SLP_LAN#

EC_RSMRST#
SYS_RESET#
PLT_RST#

PCH_DPW ROK
PCH_PWR OK
SYS_PWROK

INPUT3VSEL
SM_INTRUDER#

+1.05V_VCCST

12

EC_VCCST_PG_ R EC_VCCST_PG

CLKOUT_PCIE_P0

DK33

GPP_D5/SRCCLKREQ0#

CL2

CLKOUT_PCIE_N1

CL1

CLKOUT_PCIE_P1

DN34

GPP_D6/SRCCLKREQ1#

CL3

CLKOUT_PCIE_N2

CL5

CLKOUT_PCIE_P2

DP34

GPP_D7/SRCCLKREQ2#

CK3

CLKOUT_PCIE_N3

CK4

CLKOUT_PCIE_P3

DP36

GPP_D8/SRCCLKREQ3#

CJ2

CLKOUT_PCIE_N4

CJ1

CLKOUT_PCIE_P4

DN40

GPP_H10/SRCCLKREQ4#

ICL-U_BGA1526

@

UC1K

DM49

SLP_SUS#

DF45

GPD10/SLP_S5#

DC48

GPD5/SLP_S4#

DF47

GPD4/SLP_S3#

DH47

GPD6/SLP_A#

CL45

GPP_B12/SLP_S0#

DE49

GPD9/SPL_WLAN#

DN48

SLP_LAN#

DG49

RSMRST#

DK19

SYS_RESET#

CM49

GPP_B13/PLTRST#

DR48

DSW_PWROK

DN47

PCH_PWROK

DP19

SYS_PWROK

DN49

INPUT3VSEL

DR47

INTRUDER#

ICL-U_BGA1526

@

RC76
1K_0402_5%

1 2

RC77 60.4 _0402_1%

1

CC15
100P_0402_ 50V8J

EMC@

2

Follow Check list NC for un-used

10 of 19

GPP_H3/SX_EXIT_HOLDOFF_N/CNV_BT_I2S_SDO

GPD11/LANPHYPC/DSWLDO_MON

11 of 19

PCH_PWR OK PCH_PWR OK_R

ESD

Singal Name Input

VCCIN_AUX_CORE_VID

VCCST_OVERRIDE_LS

PM_SLP_S3# (SUSP#)

EC_VCCST_EN Output H

CCIN_AUX_CORE_VID

V

VCCST_OVERRIDE_LS

PM_SLP_S4# (SYSON)

Volume Premium

EC_VCCST_EN Output H

3

2

CLKOUT_PCIE_N5
CLKOUT_PCIE_P5

GPP_H11/SRCCLKREQ5#

RTCX1

RTC

RTCX2

RTCRST#

SRTCRST#

GPD8/SUSCLK

XTAL_IN

XTAL

XTAL_OUT

XCLK_BIASREF

GPD3/PWRBTN#

GPD1/ACPRESENT

GPD0/BATLOW#

GPP_B11/PMCALERT#

GPP_H18/CPU_C10_GATE#

GPD2/LAN_WAKE#

VCCST_OVERRIDE

VCCST_PWRGD

VCCSTPWRGOOD_TCSS

PROCPWRGD

1 2

RC537 0_04 02_5%@

WAKE#

GPD7

VR_ON<58,78,88>

CF5
CF3
DP40

DL48
DL49

DT47
DK46

DF49

DW8
DU8

DU6

CY42
DE46
DH48

CL39
DU40
DG40

DL45

DE47
DF48

CE4
CF2
CE3
CF1

DC47

SOC_RTCX1

SOC_RTCRST #
SOC_SRTCRS T#

SUSCLK

SOC_XTAL38.4_IN
SOC_XTAL38.4_OUT

XCLK_BIASREF

PBTN_OUT# _R
AC_PRESENT_R
PM_BATLOW#

PMCALERT#
CPU_C10_GAT E#PM_SLP_S0#

WAKE#

LAN_WAKE#

VCCST_OVERRIDE
EC_VCCST_PG
VCCSTPWR GOOD_TCSS
H_PROCPW RGD

GPD7

EC_VCCST_PG_ R

need to check

573129 RVP reserve both side,
but ORB only reserve on RTCX2

1 2

RC61 0_0 402_5%

SUSCLK <52 >

1 2

RC59 60.4_0402_1%

1 2

RC3954 0_0402_5%

1 2

RC66 0_0 402_5%

CPU_C10_GAT E# <15>

1 2

RC388 0_04 02_5%

1 2

RC453 0_04 02_5%

T503TP@

Only For Power Sequence Debug

T501TP@

tCPU22/ tPCH28b

D15

@

2

3

LRB715FT1G_ SOT323-3

SCS00008E0 0

PLT17

t

D32

RB751V-40_SOD 323-2

SCS00000Z00

SOC_XTAL38.4_IN SOC_XTAL38.4_IN_R

SOC_XTAL38.4_OUT SOC_XTAL38.4_OU T_R

PM_SLP_S3#

1

@

PM_SLP_S3#VR_ON

12

INPUT3VSEL
3V SELECT STRAP
HIGH: 3.0V +/-5%
LOW: 3.3V +/-5%
Follow 573129_ICL_U_DDR4_SODIMM_HW_SCH_RN

SOC_RTCX2_RSOC_RTCX2

PBTN_OUT# <58>
AC_PRESENT <58>

Close SOC ASAP

VCCST_OVERRIDE_R

+3VALW_PRIM

1 2

RC54 0_0 402_5%EMC@

1 2

RC55 0_0 402_5%EMC@

PM_SLP_S3#

EMI

EMI want to change 33 ohm, but ORB &CRB is 0ohm

H

DDD

D H

H H

H

D

H

D

D

D

H H

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

L

L

HD D

L

PCH PLTRST Buffer

L

D

L

L

D

H

L

PLT_RST#

12

RC312

L

Compal Secret Data

Compal Secret Data

2019/04/12 2020/04/12

2019/04/12 2020/04/12

2019/04/12 2020/04/12

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

RC63 0_0402_5 %

100K_0402_5%

For Glitch

stuff for CNVI check list

1 2

1

B

2

A

1

+3VALW_PRIM

PMCALERT#
PM_BATLOW#

WAKE#
LAN_WAKE#
PBTN_OUT# _R
AC_PRESENT_R

INPUT3VSEL

SUSCLK

Follow
5

73129_ICL_U_DDR4_SODIMM_HW_SCH_RN

CPU_C10_GAT E#

RC3973

100K_0402_ 5%

12

2

G

MP modify MP modify

CC162

12P_0402_5 0V8J

+3VS

CC19

1 2

5

0.1U_0201_ 10V6K

P

4

Y

G

UC4
74AHC1G08GW _SOT353-5

3

SA741080400

Title

Title

Title

Size D ocument Number Rev

Size D ocument Number Rev

Size D ocument Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet

RC533 10K_0402_5%
RC69 8.2K_ 0402_5%
RC451 1K_0402_5%
RC452 10K_0402_5 %
RC3955 100K_0402 _5%@
RC3964 10K_0402_ 5%@

RC456 4.7K_0402_5 %@

RC457 100K_0402_ 5%

RC375 100K_0402_ 5%@

RC3972 100K_0402 _5%PREM@

SOC_RTCX2_R

SOC_RTCX1

MP modify

32.768KHZ_9P F_X1A000141000200

1

2

PVT modify

EC_RSMRST# PCH_DPW ROK

SYS_PWROK PCH_PW ROK

PM_SLP_S3#_ N

@

ICL-U(5/12)CLK,GPIO

ICL-U(5/12)CLK,GPIO

ICL-U(5/12)CLK,GPIO

RC3948 0_0402_5%

RC3950 0_0402_5%@

EC_VCCST_PG_ R

5

G

61

D

S

QC5A
2N7002KDW _SOT363-6

D16

@

12

RB751V-40_SOD 323-2

SCS00000Z00

RC57 200K_0402_1 %

38.4MHZ_10PF_ 8Y38420005

1 2

PLT_RST_B UF#

@

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

FH5LI M/B LA-H801P

FH5LI M/B LA-H801P

FH5LI M/B LA-H801P

12
12
12

1 2

12

1 2

12

12

1 2

12

1 2

RC62 10M_0402_5%

YC2

1 2

SJ10000PW 00

8.2P_0201_50V8B

CC17

1 2

1 2

Follow C38

34

D

QC5B

S

2N7002KDW _SOT363-6

PM_SLP_S3#EC_VCCST_PG_ R

1 2

YC3

123

4

SJ10000VM00

PLT_RST_B UF# <5 1,52,68>

1

8.2P_0201_50V8B

1

2

11 102Wednesday, October 30, 2019

11 102Wednesday, October 30, 2019

11 102Wednesday, October 30, 2019

CC18

CC163

12P_0402_5 0V8J

1 2

of

1.0

1.0

1.0

5

Vinafix.com

4

3

2

1

D D

SOC_GPP_B18

PCH_SPKR<56>

G_INT#<66>

+3VALW_PRIM

UART_2_CRXD_ DTXD<52>

12

RC150
10K_0402_5 %

NODX76@

12

RC225
10K_0402_5 %

@

RAM_ID2RAM_ID3

0

0

0

0

UART_2_CT XD_DRXD<52>

12

12

*RAM_ID1

I2C_1_SDA<63>
I2C_1_SCL<63>

RC153
10K_0402_5 %

NODX76@

RC226
10K_0402_5 %

@

0 0

0 1

1 0

1 1

1 11 1

*RAM_ID0

1 2

RC166 2.2K_0402_5 %

1 2

RC167 2.2K_0402_5 %

+3VS

1 2

RC459 49.9K_0402_ 1%

1 2

RC460 49.9K_0402_ 1%

C C

B B

A A

1 2

RC3956 49.9K_0402_ 1%@

1 2

RC3957 49.9K_0402_ 1%@

ZZZ1 Hynix4GB

X76DHYN@ X76829BOL04

ZZZ2 Micron4GB

X76DMIC@ X76829BOL 05

ZZZ3 Samsung4GB

X76DSAM@ X76 829BOL06

I2C_1_SDA
I2C_1_SCL

UART_2_CRXD_ DTXD
UART_2_CT XD_DRXD

UART_2_CRT S_DCTS
UART_2_CCT S_DRTS

+3VALW_PRIM

RAM_ID0
RAM_ID1
RAM_ID2
RAM_ID3

Hynix 4GB

Micron 4GB

Samsung 4GB

No OnBoard
Memory

Touch Pad

Memory Down Strap

12

RC151
10K_0402_5 %

NODX76@

12

RC155
10K_0402_5 %

@

0

0

0

0

PCH_SPKR

G_INT#

SOC_GPP_B23

UART_2_CRXD_ DTXD
UART_2_CT XD_DRXD
UART_2_CRT S_DCTS
UART_2_CCT S_DRTS

I2C_1_SDA
I2C_1_SCL

12

RC224
10K_0402_5 %

NODX76@

12

RC227
10K_0402_5 %

@

PartNumber - Description

SA0000BMN30 (S IC D4 512M16 H5AN8G6NCJR-VKC FBGA ABO!)

SA0000ARD60 (S IC D4 8G/2666 MT40A512M16LY-075:E ABO!)

SA0000B6F30 (S IC D4 512M16 K4A8G165WC-BCTD FBGA 96P)

No On Board Memory

UC1F

CH48

GPP_B16/GSPI0_CLK

CF48

GPP_B18/GSPI0_MOSI

CF47

GPP_B17/GSPI0_MISO

CH49

GPP_B15/GSPI0_CS0#

CH47

GPP_B14/SPKR/TIME_SYNC1/GSPI0_CS1#

CL47

GPP_B20/GSPI1_CLK

CK47

GPP_B22/GSPI1_MOSI

CK46

GPP_B21/GSPI1_MISO

CH45

GPP_B19/GSPI1_CS0#

CL48

GPP_B23/SML1ALERT#/PCHHOT#/GSPI1_CS1#

DP21

GPP_C8/UART0_RXD

DK21

GPP_C9/UART0_TXD

DL21

GPP_C10/UART0_RTS#

DJ22

GPP_C11/UART0_CTS#

DT22

GPP_C20/UART2_RXD

DW22

GPP_C21/UART2_TXD

DV22

GPP_C22/UART2_RTS#

DU22

GPP_C23/UART2_CTS#

DT24

GPP_C16/I2C0_SDA

DT23

GPP_C17/I2C0_SCL

DW23

GPP_C18/I2C1_SDA

DU23

GPP_C19/I2C1_SCL

DU41

GPP_H4/I2C2_SDA

DV41

GPP_H5/I2C2_SCL

DW41

GPP_H6/I2C3_SDA

DT41

GPP_H7/I2C3_SCL

DT40

GPP_H8/I2C4_SDA/CNV_MFUART2_RXD

DW40

GPP_H9/I2C4_SCL/CNV_MFUART2_TXD

ICL-U_BGA1526

@

GPP_D15/ISH_UART0_RTS_N/GSPI2_CS1_N/IMGCLKOUT5

GPP_D16/ISH_UART0_CTS_N/CNV_WCEN

UART

GSPI

UART

I2C

6 of 19

GPP_C12/UART1_RXD/ISH_UART1_RXD

GPP_C13/UART1_TXD/ISH_UART1_TXD
GPP_C14/UART1_RTS#/ISH_UART1_RTS#
GPP_C15/UART1_CTS#/ISH_UART1_CTS#

I2C / ISH

GPP_B10/I2C5_SCL/ISH_I2C2_SCL

ISH

GPP_B9/I2C5_SDA/ISH_I2C2_SDA

GPP_D13/ISH_UART0_RXD

GPP_D14/ISH_UART0_TXD

GPP_B5/ISH_I2C0_SDA
GPP_B6/ISH_I2C0_SCL

GPP_B7/ISH_I2C1_SDA
GPP_B8/ISH_I2C1_SCL

GPP_D0/ISH_GP0
GPP_D1/ISH_GP1
GPP_D2/ISH_GP2

GPP_D3/ISH_GP3
GPP_D17/ISH_GP4
GPP_D18/ISH_GP5

GPP_E15/ISH_GP6
GPP_E16/ISH_GP7

Strap Pin

+3VALW_PRIM

RC278

4.7K_0402_5%

12

@

RC281

20K_0402_5%

12

12

12

DV33
DW33
DT33
DU33

DK22
DW24
DV24
DU24

CN43
CN42

CN41
CL43

CL41
CJ39
DU36
DV36
DW36
DT36
DU34
DW34
DT14
DU14

RC277

4.7K_0402_5%

@

SOC_GPP_B18

PCH_SPKR

RC282

20K_0402_5%

@

PROJECT_ID0
PROJECT_ID1

SOC_GPP_D16

RAM_ID0
RAM_ID1
RAM_ID2
RAM_ID3

+3VALW_PRIM

+3VALW_PRIM

PROJECT_ID0

PROJECT_ID1

RC207 10K_0402_5 %@
RC3958 10K_0402_ 5%

RC211 10K_0402_5 %@
RC213 10K_0402_5 %

Project ID

*

FH5LI
NA
NA
NA

RC283

10K_0402_5%

RC279

4.7K_0402_5%

12

12

@

@

SOC_GPP_B23

SOC_GPP_D16

RC280

100K_0402_5%

RC285

20K_0402_5%

12

12

GPP_D16 Strap refer RVP

@

GPP_B23
CPUNSSC CLOCK FREQ
INTERNAL PD 20K
HIGH: 19.2 MHz (form internal divider)
LOW: 38.4 MHz (direct form crystal) (Default)

GPP_B18
No Reboot
INTERNAL PD 20K
HIGH: No Reboot
LOW: Reboot Enable (Default)

SPKR
TOP SWAP OVERRIDE
INTERNAL PD 20K
HIGH: Top swap enable
LOW: Disable (Default)

GPP_D16
MFR_MODE_DET_STRAP
Follow 573129_ICL_U_DDR4_SODIMM_HW_SCH_RN_1P0

1 2

1 2

12

12

0 0
0
1
1 1

Project_ID0Project_ID1

GPP_D13GPP_D14

1
0

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2019/04/12 2020/04/12

2019/04/12 2020/04/12

2019/04/12 2020/04/12

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size D ocument Number Rev

Size D ocument Number Rev

Size D ocument Number Rev

Date: Sheet of

Date: Sheet of

2

Date: Sheet

Compal Electronics, Inc.

ICL-U(6/12)GPIO

ICL-U(6/12)GPIO

ICL-U(6/12)GPIO

FH5LI M/B LA-H801P

FH5LI M/B LA-H801P

FH5LI M/B LA-H801P

1

1.0

1.0

1.0

of

12 102Tuesday, October 15, 2019

12 102Tuesday, October 15, 2019

12 102Tuesday, October 15, 2019

5

Vinafix.com

D D

LAN

WLAN

HDD

ODD

C C

+3VALW _PRIM

B B

Note :
Please reference PCH EDS Tabel 1-2

SSD

USB_OC0# Strap refer RVP

RC401 10K_040 2_5%
RC403 10K_040 2_5%

check list needs stuff even un-use

SATA SSD

1 2
1 2

PCIE_CRX_DTX_N9<51>
PCIE_CRX_DTX_P9<51>

PCIE_CTX_ C_DRX_N9<51>
PCIE_CTX_ C_DRX_P9<51>

PCIE_CRX_DTX_N10<52>

PCIE_CRX_DTX_P10<52 >
PCIE_CTX_ C_DRX_N10<52>
PCIE_CTX_ C_DRX_P10<52>

SATA_CR X_DTX_N0<67>
SATA_CR X_DTX_P0<67>
SATA_CT X_DRX_N0<67>
SATA_CT X_DRX_P0<67>
SATA_CR X_DTX_N1<67>

SATA_CR X_DTX_P1<67>
SATA_CT X_DRX_N1<67>

SATA_CT X_DRX_P1<67>

PCIE_CRX_ DTX_N13<68>

PCIE_CRX_ DTX_P13<68>
PCIE_CTX_ DRX_N13<68>
PCIE_CTX_ DRX_P13<68>

PCIE_CRX_ DTX_N14<68>

PCIE_CRX_ DTX_P14<68>
PCIE_CTX_ DRX_N14<68>
PCIE_CTX_ DRX_P14<68>

PCIE_CRX_ DTX_N15<68>

PCIE_CRX_ DTX_P15<68>
PCIE_CTX_ DRX_N15<68>
PCIE_CTX_ DRX_P15<68>

PCIE_CRX_ DTX_N16<68>

PCIE_CRX_ DTX_P16<68>
PCIE_CTX_ DRX_N16<68>
PCIE_CTX_ DRX_P16<68>

USB_OC0 #
USB_OC3 #

CC60 .1U_ 0402_16V7K
CC62 .1U_ 0402_16V7K

12

CC25 .1U_0402_1 6V7K

12

CC26 .1U_0402_1 6V7K

1 2
1 2

SATAXPC IE2< 68>

SSD_DEV SLP2<68>

1 2

RC100 100_040 2_1%

4

PCIE_CRX_ DTX_N9

PCIE_CRX_ DTX_P9
PCIE_CTX_ DRX_N9
PCIE_CTX_ DRX_P9

PCIE_CRX_ DTX_N10

PCIE_CRX_ DTX_P10
PCIE_CTX_ DRX_N10
PCIE_CTX_ DRX_P10

+3VS

SATAXPC IE2

USB_OC0 #
USB_OC3 #

RC402
10K_040 2_5%

1 2

PCIE_RCOM PN
PCIE_RCOM PP

3

UC1H

CV7

PCIE7_RXN

CV6

PCIE7_RXP

DD3

PCIE7_TXN

DD5

PCIE7_TXP

CT6

PCIE8_RXN

CT7

PCIE8_RXP

DA3

PCIE8_TXN

DA5

PCIE8_TXP

CP7

PCIE9_RXN

CP6

PCIE9_RXP

DA2

PCIE9_TXN

DA1

PCIE9_TXP

CM7

PCIE10_RXN

CM6

PCIE10_RXP

CY3

PCIE10_TXN

CY4

PCIE10_TXP

CK7

PCIE11_RXN/SATA0_RXN

CK6

PCIE11_RXP/SATA0_RXP

CW2

PCIE11_TXN/SATA0_TXN

CW1

PCIE11_TXP/SATA0_TXP

CJ6

PCIE12_RXN/SATA1A_RXN

CJ7

PCIE12_RXP/SATA1A_RXP

CW5

PCIE12_TXN/SATA1A_TXN

CW3

PCIE12_TXP/SATA1A_TXP

CG7

PCIE13_RXN

CG6

PCIE13_RXP

CT3

PCIE13_TXN

CT5

PCIE13_TXP

CE6

PCIE14_RXN

CE7

PCIE14_RXP

CT2

PCIE14_TXN

CT1

PCIE14_TXP

CC5

PCIE15_RXN/SATA1B_RXN

CC6

PCIE15_RXP/SATA1B_RXP

CR3

PCIE15_TXN/SATA1B_TXN

CR4

PCIE15_TXP/SATA1B_TXP

CA6

PCIE16_RXN/SATA2_RXN

CA5

PCIE16_RXP/SATA2_RXP

CP1

PCIE16_TXN/SATA2_TXN

CP2

@

PCIE16_TXP/SATA2_TXP

DW1 2

GPP_E0/SATAXPCIE0/SATAGP0

CR42

GPP_A12/SATAXPCIE1/SATAGP1

CR43

GPP_A13/SATAXPCIE2/SATAGP2

DW1 4

GPP_E9/USB_OC0#

CT43

GPP_A16/USB_OC3#

DU12

GPP_E4/DEVSLP0

DU11

GPP_E5/DEVSLP1

CV48

GPP_A11 / DEVSLP2

DT38

GPP_H12/M2_SKT2_CFG0

DW3 8

GPP_H13/M2_SKT2_CFG1

DV38

GPP_H14/M2_SKT2_CFG2

DU38

GPP_H15/M2_SKT2_CFG3

DN1

PCIE_RCOMPN

DN3

PCIE_RCOMPP

ICL-U_BGA1 526

@

PCIe

PCIe / USB3.1

PCIe / SATA

PCIe

PCIe / SATA

8 of 19

PCIE1_RXN/USB31_1_RXN

PCIE1_RXP/USB31_1_RXP
PCIE1_TXN/USB31_1_TXN

PCIE1_TXP/USB31_1_TXP

PCIE2_RXN/USB31_2_RXN

PCIE2_RXP/USB31_2_RXP
PCIE2_TXN/USB31_2_TXN

PCIE2_TXP/USB31_2_TXP

PCIE3_RXN/USB31_3_RXN

PCIE3_RXP/USB31_3_RXP
PCIE3_TXN/USB31_3_TXN

PCIE3_TXP/USB31_3_TXP

PCIE4_RXN/USB31_4_RXN

PCIE4_RXP/USB31_4_RXP
PCIE4_TXN/USB31_4_TXN

PCIE4_TXP/USB31_4_TXP

PCIE5_RXN/USB31_5_RXN

PCIE5_RXP/USB31_5_RXP
PCIE5_TXN/USB31_5_TXN

PCIE5_TXP/USB31_5_TXP

PCIE6_RXN/USB31_6_RXN

PCIE6_RXP/USB31_6_RXP
PCIE6_TXN/USB31_6_TXN

PCIE6_TXP/USB31_6_TXP

USB2.0

USB_VBUSSENSE

USB2_COMP

USB2N_1

USB2P_1

USB2N_2

USB2P_2

USB2N_3

USB2P_3

USB2N_4

USB2P_4

USB2N_5

USB2P_5

USB2N_6

USB2P_6

USB2N_7

USB2P_7

USB2N_8

USB2P_8

USB2N_9

USB2P_9

USB2N_10
USB2P_10

USB_ID

RSVD_81

DJ8
DJ6
DJ2
DJ1

DG9
DG7
DJ3
DJ5

DE7
DE9
DF3
DF5

DC7
DC9
DF2
DF1

DA6
DA7
DE4
DE3

CY7
CY6
DD1
DD2

DN8
DP8

DK11
DJ11

DP13
DN13

DK10
DJ10

DL5
DL3

DP11
DN11

DK13
DJ13

DN6
DP6

DL2
DL1

DP10
DN10

DL6

DL11

DN5

CD3

USB2_ID

USB2_VB USSENSE

USB2_CO MP

UFS_RES ET#

2

USB3_CR X_DTX_N1 <72>
USB3_CR X_DTX_P1 < 72>
USB3_CT X_DRX_N1 <72>
USB3_CT X_DRX_P1 < 72>

USB3_CR X_DTX_N3 <71>
USB3_CR X_DTX_P3 < 71>
USB3_CT X_DRX_N3 <71>
USB3_CT X_DRX_P3 < 71>

USB20_N 1 < 72>
USB20_P 1 <72>

USB20_N 3 < 71>
USB20_P 3 <71>

USB20_N 4 <7 3>
USB20_P 4 <73>

USB20_N 5 < 66>
USB20_P 5 <66>

USB20_N 6 < 38>
USB20_P 6 <38>

USB20_N 7 < 38>
USB20_P 7 <38>

USB20_N 8 < 73>
USB20_P 8 <73>

USB20_N 10 <52>
USB20_P 10 <52>

1 2

RC355 10K_040 2_5%

1 2

RC354 10K_040 2_5%

1 2

RC356 113_040 2_1%

1

T328

TP@

From ACER HSIO

1

USB3 MB (Front&Charging)

USB3 MB

USB3 MB (Front&Charging)

USB3 MB

TO D/B USB2

FP

TS

Camera

Card reader(Reserved)

BT

A A

Security Class ification

Security Class ification

Security Class ification

2019/04/ 12 2020/04/ 12

2019/04/ 12 2020/04/ 12

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2019/04/ 12 2020/04/ 12

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document N umber Rev

Size Document N umber Rev

Size Document N umber Rev

Date: Sheet of

Date: Sheet of

2

Date: Sheet

Compal Electronics, Inc.

ICL-U(7/12)PCIE,USB,SATA

ICL-U(7/12)PCIE,USB,SATA

ICL-U(7/12)PCIE,USB,SATA

FH5LI M/B LA-H801P

FH5LI M/B LA-H801P

FH5LI M/B LA-H801P

1

1.0

1.0

1.0

of

13 102Tuesday, October 15 , 2019

13 102Tuesday, October 15 , 2019

13 102Tuesday, October 15 , 2019

5

Vinafix.com

D12
C12

D D

C C

1 2

RC357
100_040 2_1%

B B

+1.8VALW _PRIM

Follow check list reserve

1 2

RC181 20K_04 02_5%@

1 2

RC182 20K_04 02_5%@

CSI_RCOMP

CNV_BRI_C RX_DTX

CNV_RGI_C RX_DTX

B12
A12
G13

K10

M11

G11

G10

DT34
DP38
DK36

DL36

DN38

F13

L10

M8

L11

J11

G6

F10

G8

4

UC1I

CSI_E_CLK_N
CSI_E_CLK_P
CSI_E_DN_0
CSI_E_DP_0
CSI_E_DN_1
CSI_E_DP_1

CSI_F_CLK_N
CSI_F_CLK_P

L8

CSI_F_DN_0
CSI_F_DP_0
CSI_F_DN_1
CSI_F_DP_1

D9

CSI_D_CLK_N

C9

CSI_D_CLK_P

A7

CSI_D_DN_0

B7

CSI_D_DP_0

B9

CSI_D_DN_1

A9

CSI_D_DP_1

D7

CSI_D_DN_2/CSI_C_DN_0

C7

CSI_D_DP_2/CSI_C_DP_0

D8

CSI_D_DN_3/CSI_C_CLK_N

C8

CSI_D_DP_3/CSI_C_CLK_P

CSI_H_CLK_N
CSI_H_CLK_P

F6

CSI_H_DN_0
CSI_H_DP_0
CSI_H_DN_1
CSI_H_DP_1
CSI_H_DN_2/CSI_G_DN_0

J8

CSI_H_DP_2/CSI_G_DP_0

K6

CSI_H_DN_3/CSI_G_CLK_N

L6

CSI_H_DP_3/CSI_G_CLK_P

B4

CSI_RCOMP

GPP_D4/IMGCLKOUT0
GPP_H20/IMGCLKOUT1
GPP_H21/IMGCLKOUT2
GPP_H22/IMGCLKOUT3
GPP_H23/IMGCLKOUT4

ICL-U_BGA1 526

@

CNV_RGI_CTX_DRX

M.2 CNVI MODES

0 = Integrated CNVi enable.

1 = Integrated CNVi disable.

NO INTERNAL PU/PD

eMMC

1.8V

CSI2

CNVi

GPP_F1/CNV_BRI_RSP/UART0_RXD

GPP_F2/CNV_RGI_DT/UART0_TXD

GPP_F0/CNV_BRI_DT/UART0_RTS#

GPP_F3/CNV_RGI_RSP/UART0_CTS#

1.8V

9 of 19

GPP_F8/EMMC_DATA0

GPP_F9/EMMC_DATA1
GPP_F10/EMMC_DATA2
GPP_F11/EMMC_DATA3
GPP_F12/EMMC_DATA4
GPP_F13/EMMC_DATA5
GPP_F14/EMMC_DATA6
GPP_F15/EMMC_DATA7

GPP_F7/EMMC_CMD

GPP_F16/EMMC_RCLK

GPP_F17/EMMC_CLK

GPP_F18/EMMC_RESET#

EMMC_RCOMP

CNV_WT_D0N
CNV_WT_D0P
CNV_WT_D1N

CNV_WT_D1P
CNV_WT_CLKN
CNV_WT_CLKP

CNV_WR_D0N

CNV_WR_D0P

CNV_WR_D1N

CNV_WR_D1P

CNV_WR_CLKN

CNV_WR_CLKP

CNV_WT_RCOMP

GPP_F4/CNV_RF_RESET#

GPP_F6/CNV_PA_BLANKING

GPP_F19/A4WP_PRESENT

GPP_F5/MODEM_CLKREQ

+1.8VALW _PRIM

3

DP27
DU30
DT30
DT29
DV30
DU29
DW30
DW29
DV28
DW28
DN27
DT28

EMMC_RC OMP

DU28

DV45
DU45
DU44
DT44
DL42
DK42

DP44
DN44
DG42
DG44
DK44
DJ44

DT45

DL29
DP31
DL31
DN29

DJ29
DP29
DL27
DK29

CNV_W T_RCOMP

CNV_BRI_C RX_DTX
CNV_RGI_C TX_DRX
CNV_BRI_C TX_DRX
CNV_RGI_C RX_DTX

SOC_GPP _F4

SOC_GPP _F19
SOC_GPP _F5

RC109 150_040 2_1%

CNV_CTX _DRX_N0 <52>
CNV_CTX _DRX_P0 <52>
CNV_CTX _DRX_N1 <52>
CNV_CTX _DRX_P1 <52>
CLK_CNV _CTX_DRX_N <52>
CLK_CNV _CTX_DRX_P <52>

CNV_CRX _DTX_N0 <52 >
CNV_CRX _DTX_P0 <52>
CNV_CRX _DTX_N1 <52 >

CNV_CRX _DTX_P1 <52>
CLK_CNV _CRX_DTX_N <52>
CLK_CNV _CRX_DTX_P <52>

1 2

CNV_BRI_C RX_DTX <52>

CNV_RGI_C TX_DRX < 52>

CNV_BRI_C TX_DRX < 52>

CNV_RGI_C RX_DTX <52>

1

TP@

T340

CNV_BRI_CTX_DRX

XTAL SEL

0 = 38.4/19.2MHZ (DEFAULT)

1 = 24MHZ (25 MHZ WHEN XTAL FREQ DIVIDER NON ZERO)

WEAK INTERNAL PD 20K

+1.8VALW _PRIM

2

EMMC_RC OMP

SOC_GPP _F19

RC104 200_040 2_1%

1 2

RC432 75K_040 2_5%

1

12

Follow 574200 MoW WW03

SOC_GPP _F4

Follow 572907_ICL_UY_PDG
PC glitch free,it is recommended that a
pull-down resistor of 75K
ohm on GPP_F4(CNV_RF_RESET#)

12

RC440
75K_040 2_5%

@

CNV_RGI_C TX_DRX

A A

5

4

1 2

RC373 100K_04 02_5%

1 2

RC112 4.7K_040 2_5%@

Security Class ification

Security Class ification

Security Class ification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

CNV_BRI_C TX_DRX

Compal Secret Data

Compal Secret Data

2019/04/ 12 2020/04/ 12

2019/04/ 12 2020/04/ 12

2019/04/ 12 2020/04/ 12

3

Compal Secret Data

1 2

RC374 4.7K_040 2_5%@

1 2

RC111 20K_040 2_5%@

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document N umber Rev

Size Document N umber Rev

Size Document N umber Rev

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

ICL-U(8/13)CSI,CNV

ICL-U(8/13)CSI,CNV

ICL-U(8/13)CSI,CNV

FH5LI M/B LA-H801P

FH5LI M/B LA-H801P

FH5LI M/B LA-H801P

1.0

1.0

1.0

14 102Tuesday, October 15 , 2019

14 102Tuesday, October 15 , 2019

14 102Tuesday, October 15 , 2019

1

5

Vinafix.com

4

3

2

1

+1.2V_VD DQ

Imax : 0.152 A

F

or Power consumption

Measurement

PREM@

D D

C C

CC307

0.1U_020 1_10V6K

VCCSTG_ EN_LS VCCPLL_ OC_EN_LS_R

+1.8VALW _PRIM

Imax : 0.7 A

or Power consumption

F
Measurement

PREM@

CC107

0.1U_020 1_10V6K

CPU_C10 _GATE# CPU_C10 _GATE#_R

+5VALW

12

1 2

PREM@

RC408
0_0402_ 5%

+5VALW

12

1 2

PREM@

RC186
0_0402_ 5%

PREM@

PREM@

1

2

PREM@

1

2

PREM@

+1.2V_VDDQ TO +1.2V_VCCPLL_OC

1U_0201_6.3V6M

CC306

1U_0201_6.3V6M

CC117

UC11

1

VIN1

2

VIN2

7

VIN thermal

3

VBIAS

4

ON

1U_0201_6.3V6M

CC309

1

2

EM5201V _DFN8_3X3

PREM@

I (Max) : 0.152 A(+1.2V_VCCPLL_OC)
RDS(Typ) : 3.5 mohm
V drop : 0.0005V

VOUT

GND

6

5

+1.8V_PRIM_SOC

UC12

1

VIN1

2

VIN2

7

VIN thermal

3

VBIAS

4

ON

1U_0201_6.3V6M

CC305

1

2

CPU_C10 _GATE#<11>

EM5201V _DFN8_3X3

PREM@

I (Max) : 0.7 A(+1.8V_PRIM_SOC)
RDS(Typ) : 3.5 mohm
V drop : 0.0024V

SUSP#<16,58,78 ,84,86>

PM_SLP_ S3#<11,78>

PM_SLP_ S0#<11,58,66 >

6

VOUT

5

GND

SUSP#

PM_SLP_ S3#

PM_SLP_ S0#

CPU_C10 _GATE#

+1.2V_VC CPLL_OC_P

RC132 0_04 02_5%PREM@

RC133 0_04 02_5%

RC134 0_04 02_5%

RC3971

+1.8V_PR IM_SOC_P

1 2

@

1 2

@

1 2

1 2

PREM@

JUMP@

JUMP_43 X79

For NON-S0IX

JUMP@

0_0402_ 5%

For NON-S0IX

JPC6

112

Primuem/Volume

+1.2V_VD DQ

VOL@

RC3970

0_0603_ 5%

1 2

2

1

2

+1.8VALW _PRIM

12

VOL@

RC407

0_0603_ 5%

JPC5

2

112

JUMP_43 X79

1

2

+3VALW _PRIM

5

UC7

1

P

B

Y

2

A

G

74AHC1G 08GW_SOT3 53-5

3

PREM@

+1.2V_VC CPLL_OC

Imax : 0.152 A

CC308

0.1U_020 1_10V6K

+1.8V_PR IM_SOC

Imax : 0.7 A

CC127

0.1U_020 1_10V6K

1

CC49

0.1U_020 1_10V6K

PREM@

2

VCCSTG_ EN_LS

4

VCCSTG_ EN_LS <16>

+VCCIN +VCCIN

UC1L

CPU POWER 1 OF 3

A19

CPU_SVID_ ALERT#
CPU_SVID_ CLK
CPU_SVID_ DAT

AC12

V13

W12

Y13
K29
K31
B19
B23
B27

B29
BN10
BP11

BP9
BR10

BT11

A21

BT9
BU10
BV36

BV9

BW10
BW36

BW9

BY10

C19

C23

A23

C27

C29
CA36

CA9
CB10
CC11
CC36

CC9
CD10
CE11

A24
CE34
CE35
CF10
CF33
CG11
CG34
CG35
CH10

CJ11

A27

CJ34

J30

H1
H2
H3

VCCIN_1
VCCIN_2
VCCIN_3
VCCIN_4
VCCIN_5
VCCIN_6
VCCIN_7
VCCIN_8
VCCIN_9
VCCIN_10
VCCIN_11
VCCIN_12
VCCIN_13
VCCIN_14
VCCIN_15
VCCIN_16
VCCIN_17
VCCIN_18
VCCIN_19
VCCIN_20
VCCIN_21
VCCIN_22
VCCIN_23
VCCIN_24
VCCIN_25
VCCIN_26
VCCIN_27
VCCIN_28
VCCIN_29
VCCIN_30
VCCIN_31
VCCIN_32
VCCIN_33
VCCIN_34
VCCIN_35
VCCIN_36
VCCIN_37
VCCIN_38
VCCIN_39
VCCIN_40
VCCIN_41
VCCIN_42
VCCIN_43
VCCIN_44
VCCIN_45
VCCIN_46
VCCIN_47
VCCIN_48
VCCIN_49
VCCIN_50
VCCIN_51

VIDALERT#
VIDSCK
VIDSOUT

ICL-U_BGA1 526

@

12 of 19

VCCIN_SENSE
VSSIN_SENSE

VCCIN_52
VCCIN_53
VCCIN_54
VCCIN_55
VCCIN_56
VCCIN_57
VCCIN_58
VCCIN_59
VCCIN_60
VCCIN_61
VCCIN_62
VCCIN_63
VCCIN_64
VCCIN_65
VCCIN_66
VCCIN_67
VCCIN_68
VCCIN_69
VCCIN_70
VCCIN_71
VCCIN_72
VCCIN_73
VCCIN_74
VCCIN_75
VCCIN_76
VCCIN_77
VCCIN_78
VCCIN_79
VCCIN_80
VCCIN_81
VCCIN_82
VCCIN_83
VCCIN_84
VCCIN_85
VCCIN_86
VCCIN_87
VCCIN_88
VCCIN_89
VCCIN_90
VCCIN_91
VCCIN_92
VCCIN_93
VCCIN_94
VCCIN_95
VCCIN_96
VCCIN_97
VCCIN_98

VCCIN_99
VCCIN_100
VCCIN_101
VCCIN_102
VCCIN_103
VCCIN_104

CJ35
CK10
J32
CL34
CL35
CN34
CN35
CP33
CR34
A29
CR35
CT33
CT34
CT35
CU33
D19
D21
D23
D24
D27
AA12
D29
F19
F21
F23
F24
F27
F29
G1
G19
G23
AB1
G27
G29
H19
H23
H27
H29
J18
J20
J22
J23
AB13
J26
J28
K17
K19
K21
K23
K24
K27
M1
U1

F17
G17

VCC_SEN SE_VCCIN <88>
VSS_SEN SE_VCCIN <88>

B B

CPU_SVID_ DAT_R<88>

CPU_SVID_ ALERT#_R<88>

A A

CPU_SVID_ CLK_R<88>

5

+1.05V_V CCST

12

RC148
100_040 2_1%

+1.05V_V CCST

RC146
56_0402 _5%

1 2

SVID DATA

12

RC3620_0402 _5%

SVID ALERT

12

RC3630_0402 _5%

SVID CLOCK

12

RC3640_0402 _5%

4

CPU_SVID_ DAT

CPU_SVID_ ALERT#

CPU_SVID_ CLK

Security Class ification

Security Class ification

Security Class ification

2019/04/ 12 2020/04/ 12

2019/04/ 12 2020/04/ 12

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2019/04/ 12 2020/04/ 12

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document N umber Rev

Size Document N umber Rev

Size Document N umber Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

ICL-U(9/13)Power, SVID

ICL-U(9/13)Power, SVID

ICL-U(9/13)Power, SVID

FH5LI M/B LA-H801P

FH5LI M/B LA-H801P

FH5LI M/B LA-H801P

1

15 102Tuesday, October 15 , 2019

15 102Tuesday, October 15 , 2019

15 102Tuesday, October 15 , 2019

1.0

1.0

1.0

5

Vinafix.com

EMC CAPS-PLACE
< 4mm from SOC VDDQ
with each pair < 12mm Apart
12pF* 3 (EMI@)

2.2pF* 3 (EMI@)

D D

C C

+1.2V_VDDQ +1.2V_VDD Q +1.2V_VDDQ

CC221

CC218

2.2P_0201_50V8C

CC219

12P_0201_50V8J

1

1

2

2

EMC@

EMC@

12P_0201_50V8J

CC220

2.2P_0201_50V8C

1

2

EMC@

EMC@

CC222

2.2P_0201_50V8C

1

2

EMC@

CC223

12P_0201_50V8J

1

1

2

2

EMC@

+1.05VS_VCCSTG_ OUT_FUSE

+1.05VS_VCCSTG_ OUT_LGC

4

+1.05VS_VCCSTG

+1.2V_VDDQ + 1.2V_VDDQ

+1.05V_VCCST

AA37
AG36
AJ36
AL36
AL49
AN36
AP37
AR36
AR37
AT36
AT49
AA49
AV36

AW37

AY36
BA37
BA49
BB36
BD36
BE37
BF36
BF37
AB36
BF49
BG36
BJ36
BL37
BM49
BN37
BP38

CB1

BY1

F33
G33

E5

UC1M

CPU POWER 2 OF 3

VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9
VDDQ_10
VDDQ_11
VDDQ_12
VDDQ_13
VDDQ_14
VDDQ_15
VDDQ_16
VDDQ_17
VDDQ_18
VDDQ_19
VDDQ_20
VDDQ_21
VDDQ_22
VDDQ_23
VDDQ_24
VDDQ_25
VDDQ_26
VDDQ_27
VDDQ_28
VDDQ_29
VDDQ_30

VCCST

VCCSTG

VCCSTG_OUT_1
VCCSTG_OUT_2

VCCSTG_OUT_LGC

13 of 19

ICL-U_BGA1526

@

VDDQ_31
VDDQ_32
VDDQ_33
VDDQ_34
VDDQ_35
VDDQ_36
VDDQ_37
VDDQ_38
VDDQ_39
VDDQ_40
VDDQ_41
VDDQ_42
VDDQ_43
VDDQ_44
VDDQ_45
VDDQ_46
VDDQ_47

RSVD_78

RSVD_2
RSVD_3

VCC1P8A_1
VCC1P8A_2
VCC1P8A_3
VCC1P8A_4
VCC1P8A_5

VCCSTG_OUT_3
VCCSTG_OUT_4
VCCSTG_OUT_5
VCCSTG_OUT_6
VCCSTG_OUT_7

RSVD_74
RSVD_75
RSVD_76

VCCPLL

VCCPLL_OC_1
VCCPLL_OC_2
VCCPLL_OC_3
VCCPLL_OC_4

VCCIO_OUT

3

BP39
BR37
BT38
AC35
BU37
BU49
CA39
CB49
L38
L49
N36
T49
AC37
AD35
AD36
AE36
AF49

C33

A33
B33

BG9
BJ9
BM9
BW1
BW2

R35
V34
T34
U35
AB34
W35
AA35
Y34

CD2

CG38
CG41
CG42
CG49

AD7

2

+1.05VS_VCCSTG_ OUT_FUSE

1U_0201_6.3V6M

CC267

1

@

2

Follow 573129 RVP reserve close to BGA

1

T446TP@

1

T447TP@

1

T448TP@

+1.8V_PRIM_SOC

+1.05VS_VCCSTG_ OUT_FUSE

+1.05VO_VCCPLL

+1.2V_VCCPLL_OC

+1.05V_VCCIO_OUT

1U_0201_6.3V6M

1

2

1U_0201_6.3V6M

1

2

reserve more

1U_0201_6.3V6M

CC271

CC274

1

1

@

2

2

reserve more

1U_0201_6.3V6M

10U_0402_6.3V6M

CC275

CC272

1

1

2

2

@

+1.8V_PRIM_SOC

10U_0402_6.3V6M

CC34

@

CC35

@

10U_0402_6.3V6M

1

2

1

+1.05VO_VCCPLL+1.05V_VCCST

22U_0603_6.3V6K

1

CC207

CC208

2

@

+1.2V_VCCPLL_OC+1.05VS_VCCSTG

1U_0201_6.3V6M

1U_0201_6.3V6M

CC273

CC270

1

1

2

2

@

1U_0201_6.3V6M

1U_0201_6.3V6M

CC278

CC276

1

1

@

2

2

+1.05VO_OUT_FET

VCCST

Imax : 0.445 A

F

or Power consumption

Measurement

VCCST_EN_LS<11>

B B

PREM@

CC315

0.1U_0201_ 10V6K

12

1 2

RC412

0_0402_5%

+5VALW

+1.05V_VCCST (PCH to CPU)

VCCSTG_EN_LS<15>

A A

SUSP#<15 ,58,78,84,86>

VCCSTG_EN_LS
VCCST_EN_LS _R

RC135 0_04 02_5%

0.1U_0201_ 10V6K

1 2

+1.8VALW TO +1.8VS

5

1

2

VCCST_EN_LS _R

1 2

RC3983 0_0402_5%PREM@

1 2

RC3980 0_0402_5%VOL@

1 2

RC3979 0_0402_5%@

1

CC378

2

@

1U_0201_6.3V6M

CC314

PREM@

UC9

1

VIN1

2

VIN2

7

VIN thermal

3

VBIAS

4

ON

1U_0201_6.3V6M

CC317

PREM@

1

EM5201V_DFN8_ 3X3

SA00008R600

2

I (Max) : 0.455 A(+1.05V_VCCS T)
RDS(Typ) : 3.5 mohm
V drop : 0.001 6V

+5VALW

1U_0201_6.3V6M

1

CC24

+1.05VO_OUT_FET

2

EN_1.8VS

+1.8VALW_PRIM

6

VOUT

5

GND

UC14

1

VIN1

2

VIN1

3

ON1

4

VBIAS

5

ON2

6

VIN2

7

VIN2

JW7110D FNC_DFN14_2X3

SA0000BEL00

PREM@

RC3989

+1.05V_VCCST_S INGLE

+1.05V_VCCST_D UAL

VOUT1
VOUT1

CT1

GND

CT2

VOUT2
VOUT2

GPAD

0_0805_5%

1 2

+1.05V_VCCST_P +1.05V_VCCST

14
13

12

CC374

11

8200P_0402 _25V7K

10

CC27

9

1000P_0402 _50V7K

8

15

+1.8VS_R

4

+1.05V_VCCST

1 2

RC414 0_0805_5%VOL@

1 2

RC413 0_0603_5%VOL@

1 2

RC3981 0_0603_5%PREM@

+1.05V_VCCST_D UAL

1 2

1 2

RC136 0_0402_5%

1

CC316

0.1U_0201_ 10V6K

2

+1.05VS_VCCSTG

For VOL@

JPC16

112

JUMP_43X39

1 2

JUMP@

Imax : 0.445 A

Imax : 0.119 A

+1.05V_VCCST_P

2

+1.8VS

+1.8VALW _PRIM TO +1.8V_PRIM_SOC

+1.8V_PRIM_SOC

1

CC355

4.7U_0402_ 6.3V6M

2

Imax : 0.7 A

+1.2V_VDDQ TO +1.2V_VCCPLL_OC

max : 0.152 A

I

Place on CPU Side

CC375

0.1U_0201_10V6K

1

@

2

CC28

0.1U_0201_10V6K

1

@

2

3

22uF* 2 + 22uF* 1 (Reserved)

+1.2V_VDDQ +1.2V_VDDQ+1.2V_VDDQ

22U_0603_6.3V6K

CC189

1

@

2

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

22U_0603_6.3V6K

22U_0603_6.3V6K

CC191

CC190

2019/04/12 2020/04/12

2019/04/12 2020/04/12

2019/04/12 2020/04/12

1

2

1

2

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Place on opposite of CPU Side
1uF* 6 + 1uF*3 reserve
10uF* 2

1U_0201_6.3V6M

1U_0201_6.3V6M

CC289

10U_0402_6.3V6M

10U_0402_6.3V6M

CC236

CC235

1

1

2

2

1

2

2

Size D ocument Number Rev

Size D ocument Number Rev

Size D ocument Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

1U_0201_6.3V6M

1U_0201_6.3V6M

CC292

CC291

CC290

1

2

Title

Title

Title

1

1

2

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

ICL-U(10/13)Power

ICL-U(10/13)Power

ICL-U(10/13)Power

FH5LI M/B LA-H801P

FH5LI M/B LA-H801P

FH5LI M/B LA-H801P

1U_0201_6.3V6M

1U_0201_6.3V6M

CC293

1

2

1

1U_0201_6.3V6M

1U_0201_6.3V6M

CC294

1

2

1U_0201_6.3V6M

CC296

CC295

@

CC297

1

1

2

1

@

@

2

2

1.0

1.0

16 102Tuesday, October 15, 2019

16 102Tuesday, October 15, 2019

16 102Tuesday, October 15, 2019

1.0

5

Vinafix.com

4

3

2

1

+3VALW_PRIM+3VALW

JPC7

2

112

JUMP_43X39

+3VALW

D D

@

RC173 0_0402_5%

12

+3VALW_DSW

CC365

near DE31

1 2

1U_0201_6 .3V6M

@

LC15

@

1 2

0.6UH_TMPC 0412HP-R60MG-Z02_ 6A_20%

SH000019M0 0

1 2

RC246
0_0402_5%

1

CC36
22U_0603_ 6.3V6K

2

26000 mA

+VCCIN_AUX +3VALW_PRIM

+3VALW

1354mA

+3VALW_PRIM

1

CC106

4.7U_0402_ 6.3V6M

2

C C

+3VALW_PRIM

+1.8VALW_PRIM

3 mA

+3VALW_PRIM

B B

500 mA500 mA

12

@

12

@

100K_0402_5%

R3054

100K_0402_5%

R3053

VCC_SENSE_VCCIN_AUX<91>
VSS_SENSE_VCCIN_AUX<91>

+1.05VO_EXTBYPASS

+1.05VO_VNNBYPASS

NOTE:
Need to follow SPI ROM Voltage

RC248
0_0402_5%

1 2

1

CC246
22U_0603_ 6.3V6K

2

UC1N

AH1

VCCIN_AUX_1

AW10

VCCIN_AUX_2

AY11

VCCIN_AUX_3

AY9

VCCIN_AUX_4

BA10

VCCIN_AUX_5

BB9

VCCIN_AUX_6

CH1

VCCIN_AUX_7

CK11

VCCIN_AUX_8

CL10

VCCIN_AUX_9

CM11

VCCIN_AUX_10

CN1

VCCIN_AUX_11

AJ1

VCCIN_AUX_12

CN10

VCCIN_AUX_13

CP11

VCCIN_AUX_14

CR10

VCCIN_AUX_15

CT11

VCCIN_AUX_16

CU10

VCCIN_AUX_17

CV1

VCCIN_AUX_18

CV11

VCCIN_AUX_19

CW10

VCCIN_AUX_20

CY11

VCCIN_AUX_21

DC1

VCCIN_AUX_22

AL1

VCCIN_AUX_23

P13

VCCIN_AUX_24

R12

VCCIN_AUX_25

T13

VCCIN_AUX_26

U12

VCCIN_AUX_27

DC11

VCCIN_AUX_28

DE12

VCCIN_AUX_29

DF12

VCCIN_AUX_30

AM1

VCCIN_AUX_31

AN1

VCCIN_AUX_32

AT11

VCCIN_AUX_33

AT9

VCCIN_AUX_34

AU10

VCCIN_AUX_35

AV9

VCCIN_AUX_36

BF9

VCCIN_AUX_VCCSENSE

BD9

VCCIN_AUX_VSSSENSE

DJ15

VCC_V1P05EXT_1P05

CY34

VCC_VNNEXT_1P05

DC33

VCCPRIM_3P3_1

DD35

VCCPRIM_1P8_1

DB34

VCCSPI

ICL-U_BGA1526

@

+1.8V_VCCA_CLKLD O+1.8VALW_PRIM

RC248 needs stuff 100 ohm when stuff LC15

1

CC298
1U_0201_6 .3V6M

@

2

use 22u x2 to replace 47ux1

CPU POWER 3 OF 3

VCCPRIM_3P3_2
VCCPRIM_3P3_3
VCCPRIM_3P3_4

VCCPRIM_1P8_2
VCCPRIM_1P8_3
VCCPRIM_1P8_4
VCCPRIM_1P8_5
VCCPRIM_1P8_6
VCCPRIM_1P8_7
VCCPRIM_1P8_8
VCCPRIM_1P8_9

VCCLDOSTD_0P85

VCCA_CLKLDO_1P8

VCCDPHY_1P24

VCCDSW_1P05

VCC1P05_1
VCC1P05_2
VCC1P05_3

VCCPLL

VCCPRIM_1P05_1

VCCPRIM_1P05_2

VCCPRIM_1P05_3

VCCPRIM_1P05_4

VCCRTC

VCCDSW_3P3

VCCPGPPR

GPP_B0/CORE_VID0
GPP_B1/CORE_VID1

GPP_B2/VRALERT#

14 of 19

NOTE:
572631_ICL_PCH_LP_EDS_Vol_1_Rev_1p0
VCCPGPPR: Audio Power 3.3V, 1.8V, or 1.5V
Need to sync with codec VDDIO.

572907_ICL_UY_PDG_Rev1p1
When configured as 3.3V or 1.8V, VCCPGPPR can be merged directly with
either VCCPRIM_1P8 or VCCPRIM_3P3 depending on their operating voltage.

202 mA (Include UC1.DC33)

DF23
DG26
DG28

1300 mA (Include UC1.DD35)

+1.8VALW_PRIM

DF15
DF17
DF18
DF20
DG17
DG18
DG20
DF34

+0.85VO_VCCLDOST D

DW37

DW15

DW32

DD34

BY2
CB2
CC1

CD1

DG31

DG29

DF29

DF31

DG33

DE31

DF26

CL38
CJ38
CN38

+1.8V_VCCA_CLKLD O

VCCIN_AUX_CORE_VID0
VCCIN_AUX_CORE_VID1
VCCIN_AUX_CORE_ALERT #

165 mA

+1.24VO_VCCDPHY

1 2

RC216 0_0402_5%

1 2

RC217 0_0402_5%

1 2

RC218 0_0402_5%

+1.05VO_VCCDSW

+1.05VO_OUT_FET

+1.05VO_VCCPLL

VCCIN_AUX_CORE_VID0_R <11,9 1>
VCCIN_AUX_CORE_VID1_R <11,5 8,91>
VCCIN_AUX_CORE_ALERT #_R <7>

RF

+3VALW_PRIM

RF request

+1.05VO_OUT_PC H

LC2

SD0280000 80

0_0402_5%

LC2

@RF@

1 2

BLM15BB221S N1D_2P_0402

SM01000BV00

2 mA

+RTCVCC

4 mA

+3VALW_DSW

VCCIN_AUX_CORE_VID0_R
VCCIN_AUX_CORE_VID1_R

+3VALW_HDA

5 mA

+3VALW_HDA

1

CC76

0.1U_0201_ 10V6K

@RF@

2

stuff PU on PWR side

RC512 100K_ 0402_5%@
RC513 100K_ 0402_5%@

1 2
1 2

+3VALW_PRIM

+3VALW_PRIM

1U_0201_6.3V6M

CC301

2

1

CC254

0.1U_0201_10V6K

1

2

@

A A

near DG26

@

near DF23

5

+1.05VO_VCCDSW

1

2

CC299
1U_0201_6 .3V6M

+0.85VO_VCCLDOST D

1

CC249

2.2U_0402_ 6.3V6M

2

4

+1.8VALW_PRIM

1U_0201_6.3V6M

1

2

near DG20

+1.24VO_VCCDPHY

4.7U_0402_6.3V6M

CC252

CC304

@

1

2

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

RTC Battery

+RTCBATT

RH163
1K_0402_5%

1 2

+CHGRTC

CHN202UPT _SC70-3

Compal Secret Data

Compal Secret Data

2019/04/12 2020/04/12

2019/04/12 2020/04/12

2019/04/12 2020/04/12

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

+RTCVCC

DC1

3

1

2

1

2

#575412_WHL_U_PDG_R0.7 table11-11
Close to BR23

CC84

0.1U_0201_ 10V6K

+RTCBATT

1

CC143

1U_0201_6 .3V6M

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size D ocument Number Rev

Size D ocument Number Rev

Size D ocument Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

ICL-U(11/13)Power

ICL-U(11/13)Power

ICL-U(11/13)Power

FH5LI M/B LA-H801P

FH5LI M/B LA-H801P

FH5LI M/B LA-H801P

JRTC1

1

1

2

2

3

GND

4

GND

ACES_50271-00 20N-001

CONN@

SP02000RO00

1

17 102Tuesday, October 15, 2019

17 102Tuesday, October 15, 2019

17 102Tuesday, October 15, 2019

1.0

1.0

1.0

5

Vinafix.com

4

3

2

1

UC1O

GND 1 OF 3

A11

VSS_1

A46

VSS_2

BA45

VSS_3

BA47

VSS_4

BB11

VSS_5

BB3

VSS_6

BB7

VSS_7

D D

C C

B B

BC37

BD3
BD38
BD39
BD41

A48
BD42
BD43
BD45
BD49

BD5
BD6
BD7

BE1

BE2

BF3

A49
BF45
BF47

BF7

BG3

BG41

BG7

BH37

BJ1

BJ2

BJ3
AA45

BJ41
BJ43
BJ45
BJ49

BJ7
BM11

BM3
BM45
BM47

BM5
AA47

BM6

BM7

BP1
BP2
BP3

BP43

BP7
BR45
BR49
AB11

AB3
AB38
AB39
AB41

A17
AB42
AB43

AB5

AB6
AC45
AC49
AD10
AD11
AD34
AD37

AE6
AF37

A3

VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74

15 of 19

ICL-U_BGA1 526

@

VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98

VSS_99
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
VSS_146
VSS_147
VSS_148

AF45
AF47
AG1
AG11
AG3
AG38
AG39
AG41
A31
AG42
AG43
AG5
AG9
AH2
AH37
AH45
AH49
AJ2
AJ3
A34
AK37
AL2
AL45
AL47
AL6
AM2
AM37
AN2
AN38
AN39
A36
AN41
AN42
AN43
AN45
AN49
AN6
AR1
AR11
AR2
AR3
A39
AR7
AR9
AT3
AT45
AT47
AT5
AT6
AT7
AU37
AV11
A42
AV3
AV38
AV39
AV41
AV42
AV43
AV45
AV49
AV7
AY3
A44
AY7
B17
B2
B21
B24
B3
B31
B48
BA1
BA2

BT3
BT39
BT41
BT42
BT43

BT7

BU45
BU47

BV1

BV11

BV2
BV3
BV7

BW3

BW37

BW5
BW6
BW7
BY37
BY45
BY49

C11

C13

C14

C17

C21

C24

C31

C34

C39

C48

C49

CA3
CA38
CA41
CA42
CA43

CA7
CB37
CB45
CB47

CC3

CC7
CE37
CE45
CE49

CE9
CG37
CG39
CG43
CG45
CG47

CG9

CH3

CH5

CJ37
CJ42

CJ9
CK45
CK49

CK9
CL37
CL42
CL49

CM45
CM47

CM9

CN3

CN37
CN39

CN5

CP9

CR32

C6

UC1P

GND 2 OF 3

VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_154
VSS_155
VSS_156
VSS_157
VSS_158
VSS_159
VSS_160
VSS_161
VSS_162
VSS_163
VSS_164
VSS_165
VSS_166
VSS_167
VSS_168
VSS_169
VSS_170
VSS_171
VSS_172
VSS_173
VSS_174
VSS_175
VSS_176
VSS_177
VSS_178
VSS_179
VSS_180
VSS_181
VSS_182
VSS_183
VSS_184
VSS_185
VSS_186
VSS_187
VSS_188
VSS_189
VSS_190
VSS_191
VSS_192
VSS_193
VSS_194
VSS_195
VSS_196
VSS_197
VSS_198
VSS_199
VSS_200
VSS_201
VSS_202
VSS_203
VSS_204
VSS_205
VSS_206
VSS_207
VSS_208
VSS_209
VSS_210
VSS_211
VSS_212
VSS_213
VSS_214
VSS_215
VSS_216
VSS_217
VSS_218
VSS_219
VSS_220
VSS_221
VSS_222

16 of 19

ICL-U_BGA1 526

@

VSS_223
VSS_224
VSS_225
VSS_226
VSS_227
VSS_228
VSS_229
VSS_230
VSS_231
VSS_232
VSS_233
VSS_234
VSS_235
VSS_236
VSS_237
VSS_238
VSS_239
VSS_240
VSS_241
VSS_242
VSS_243
VSS_244
VSS_245
VSS_246
VSS_247
VSS_248
VSS_249
VSS_250
VSS_251
VSS_252
VSS_253
VSS_254
VSS_255
VSS_256
VSS_257
VSS_258
VSS_259
VSS_260
VSS_261
VSS_262
VSS_263
VSS_264
VSS_265
VSS_266
VSS_267
VSS_268
VSS_269
VSS_270
VSS_271
VSS_272
VSS_273
VSS_274
VSS_275
VSS_276
VSS_277
VSS_278
VSS_279
VSS_280
VSS_281
VSS_282
VSS_283
VSS_284
VSS_285
VSS_286
VSS_287
VSS_288
VSS_289
VSS_290
VSS_291
VSS_292
VSS_293
VSS_294
VSS_295
VSS_296

CR37
CR45
CR49
CT37
CT39
CT42
CT9
CU45
CU47
CU49
CV3
CV34
CV35
CV5
CV9
CY41
CY45
CY49
CY9
D13
D17
D31
D44
D49
DA10
DA33
DA9
DB32
DB35
DB38
DB45
DB47
DB49
DC3
DC49
DC5
DC6
DD37
DD42
DE10
DE13
DE17
DE18
DE20
DE22
DE23
DE26
DE28
DE29
DE33
DE45
DE6
DF13
DF22
DF28
DF33
DF35
DF39
DG10
DG12
DG13
DG15
DG22
DG23
DG47
DG6
DH1
DH3
DH45
DH5
DJ19
DJ21
DJ27
DJ31

DJ33
DJ36
DJ42

DK3
DK4

DK49

DK6

DK8
DL10
DL13
DL44
DL47

DM47
DN15
DN19
DN24
DN31
DN36
DN42
DP45
DR49

DT1

DT10
DT15
DT20
DT27

DT3

DT32
DT37
DT42
DT49

DT6

DT7

DT8

DU1

DU10
DU15

DU2

DU20
DU27
DU32
DU37
DU48
DU49

DU7

DV2

DV44
DV48

DW1

DW10

DW2

DW20
DW27
DW44
DW46
DW48
DW49

DW7

DV8

E11
E34
E36
E39
E42

E6

UC1Q

GND 3 OF 3

VSS_297
VSS_298
VSS_299
VSS_300
VSS_301
VSS_302
VSS_303
VSS_304
VSS_305
VSS_306
VSS_307
VSS_308
VSS_309
VSS_310
VSS_311
VSS_312
VSS_313
VSS_314
VSS_315
VSS_316
VSS_317
VSS_318
VSS_319
VSS_320
VSS_321
VSS_322
VSS_323
VSS_324
VSS_325
VSS_326
VSS_327
VSS_328
VSS_329
VSS_330
VSS_331
VSS_332
VSS_333
VSS_334
VSS_335
VSS_336
VSS_337
VSS_338
VSS_339
VSS_340
VSS_341
VSS_342
VSS_343
VSS_344
VSS_345
VSS_346
VSS_347
VSS_348
VSS_349
VSS_350
VSS_351
VSS_352
VSS_353
VSS_354
VSS_355
VSS_356
VSS_357
VSS_358
VSS_359
VSS_360
VSS_361

17 of 19

ICL-U_BGA1 526

@

VSS_362
VSS_363
VSS_364
VSS_365
VSS_366
VSS_367
VSS_368
VSS_369
VSS_370
VSS_371
VSS_372
VSS_373
VSS_374
VSS_375
VSS_376
VSS_377
VSS_378
VSS_379
VSS_380
VSS_381
VSS_382
VSS_383
VSS_384
VSS_385
VSS_386
VSS_387
VSS_388
VSS_389
VSS_390
VSS_391
VSS_392
VSS_393
VSS_394
VSS_395
VSS_396
VSS_397
VSS_398
VSS_399
VSS_400
VSS_401
VSS_402
VSS_403
VSS_404
VSS_405
VSS_406
VSS_407
VSS_408
VSS_409
VSS_410
VSS_411
VSS_412
VSS_413
VSS_414
VSS_415
VSS_416
VSS_417
VSS_418
VSS_419
VSS_420
VSS_421
VSS_422
VSS_423
VSS_424
VSS_425
VSS_426
VSS_427

F11
F31
F45
F47
F8
G21
G24
G3
G31
G36
G49
G5
H17
H21
H24
H31
H33
H36
H45
H49
J10
J13
J16
J36
J6
K11
K33
K8
L36
L39
L41
L42
L43
L45
L47
M10
M3
M36
M5
N45
N49
P11
P41
P8
R3
R37
T11
T36
T41
T43
T45
T47
U3
U37
U5
V11
V36
V45
V49
V9
W37
Y36
Y38
Y43
Y9
DE15

A A

Security Class ification

Security Class ification

Security Class ification

2019/04/ 12 2020/04/ 12

2019/04/ 12 2020/04/ 12

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2019/04/ 12 2020/04/ 12

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document N umber Rev

Size Document N umber Rev

Size Document N umber Rev

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

ICL-U(12/13)GND

ICL-U(12/13)GND

ICL-U(12/13)GND

FH5LI M/B LA-H801P

FH5LI M/B LA-H801P

FH5LI M/B LA-H801P

1.0

1.0

1.0

18 102Tuesday, October 15 , 2019

18 102Tuesday, October 15 , 2019

18 102Tuesday, October 15 , 2019

1

5

Vinafix.com

+1.05V_V CCIO_OUT

RC3992 1K_04 02_5%
RC3993 1K_04 02_5%

RC3994 1K_04 02_5%@

1 2
1 2

1 2

PDG NC this pin

1 2

RC3995 1K_04 02_5%

1 2

RC3996 1K_04 02_5%

1 2

D D

1 2

RC344 1K_04 02_5%

1 2

RC341 51_04 02_5%

1 2

RC342 51_04 02_5%

C C

B B

A A

CFG4
Display port pr esence strap
0 : Enable
An external dis play port devi ce is connected to
the embedded di splayport
1 : Disable
No physical dis play port atta ched to embedde d display port

CFG4

CFG16

CFG18

RC3997 1K_04 02_5%

1 2

RC3998 1K_04 02_5%

1 2

RC3999 1K_04 02_5%

12

RC210

49.9_040 2_1%

4

T494 TP @
T495 TP @
T291 TP @
T290 TP @

RVP To MIPI60

T288 TP @
T289 TP @

1
1
1
1

CFG0
CFG1

CFG3
CFG4

CFG8
CFG9
CFG10

CFG12
CFG13

CFG16

CFG18

CFG_RCO MP

BPM#0
BPM#1
BPM#2
BPM#3

1

SKTOCC#
PROC_SE LECT#

1

AG6
AE7
AG7
AD9
AE9
AB9

AB7
V10

Y10

AB10

AL7
AL9

AD6

BJ11

BL10

AV1

AT2
AT1
AU1
AU2

AV2

DP3
DT2

AR10
AP10
BP36

BM36

K15

N34
AK10
BT36
AH10
BC10

CH33

CJ32

AM10

BH10

Y11

AJ11

CG32

CK33
BP41
AL11

BG11

AN11

M13

M34

DU42

DW42

D33

K13

AJ6

AJ5

AJ7

AJ9

V6
V7

Y6
Y7

T9
T7

T10

T6

J15

C5
D4
A5

J34

L34

L13

UC1S

CFG_0
CFG_1
CFG_2
CFG_3
CFG_4
CFG_5
CFG_6
CFG_7
CFG_8
CFG_9
CFG_10
CFG_11
CFG_12
CFG_13
CFG_14
CFG_15

CFG_16
CFG_17

CFG_18
CFG_19

CFG_RCOMP

BPM#0
BPM#1
BPM#2
BPM#3

RSVD_62
RSVD_63

RSVD_TP_17

RSVD_TP_18
RSVD_TP_20
RSVD_TP_19
RSVD_TP_21

RSVD_TP_22

RSVD_67
RSVD_68

RSVD_69
RSVD_71
RSVD_70
RSVD_72

VSS_430
VSS_431

SKTOCC#
RSVD_77
RSVD_64

ICL-U_BGA1 526

@

UC1R

RSVD_TP_28
RSVD_TP_29
RSVD_7
RSVD_TP_30
RSVD_TP_31
RSVD_TP_32

RSVD_12
RSVD_TP_33
RSVD_TP_34
RSVD_TP_27

RSVD_9
RSVD_10

RSVD_17
RSVD_21

RSVD_22
RSVD_20
RSVD_23
RSVD_24
RSVD_16
RSVD_18
RSVD_19

RSVD_42
RSVD_43
RSVD_44
RSVD_45
RSVD_47

ICL-U_BGA1 526

@

3

RESERVED SIGNALS

19 of 19

RESERVED SIGNALS

RSVD_TP_1
RSVD_TP_2

RSVD_57
RSVD_58

RSVD_TP_10
RSVD_TP_11

RSVD_79
RSVD_80

RSVD_TP_5
RSVD_TP_6

VSS_428
VSS_429

RSVD_55
RSVD_56

RSVD_65
RSVD_66

RSVD_59
RSVD_60

RSVD_TP_13
RSVD_TP_14

RSVD_TP_24
RSVD_TP_25

RSVD_TP_15
RSVD_TP_16

TP_3
TP_4

RSVD_TP_12

RSVD_TP_7
RSVD_TP_8

RSVD_TP_9

RSVD_TP_23

TP_1
TP_2

VSS_432

RSVD_TP_26

RSVD_TP_35
RSVD_TP_36
RSVD_TP_37

RSVD_32
RSVD_33
RSVD_34

IST_TP_0

IST_TP_1
IST_TRIG_0
IST_TRIG_1

PCH_IST_TP_0
PCH_IST_TP_1

RSVD_27

RSVD_28

RSVD_35

RSVD_46

RSVD_48

RSVD_49

RSVD_50

RSVD_51

RSVD_52

RSVD_53

RSVD_54

RSVD_36

RSVD_37

RSVD_38

RSVD_39

RSVD_40

RSVD_41

A47
B47

C1
E1

CT32
CV32

G15
F15

BW11
CA11

C16
A16

C2
A4

DP5
DR5

D14
E16

DV6
DW6

DP2
DP1

DW4
DV4

CM33
DB10

R1

DW3
DV3

DH49

DL8

DW47
DV47
DU47

P10

DA11
CL32
CN32
CY35
DB37
DF37

BF11
BD11
BE10
BF10

CW33
CY32

CY37
CV37

G34
H34
DJ34
DK31
DK15
CP3
CP5
AN9
AN7
AF10
AE11
H5
D1
DJ40
DK40

2

1

Security Class ification

Security Class ification

Security Class ification

2019/04/ 12 2020/04/ 12

2019/04/ 12 2020/04/ 12

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2019/04/ 12 2020/04/ 12

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document N umber Rev

Size Document N umber Rev

Size Document N umber Rev

Date: Sheet of

Date: Sheet of

2

Date: Sheet

Compal Electronics, Inc.

ICL-U(13/13)RSVD,CFG

ICL-U(13/13)RSVD,CFG

ICL-U(13/13)RSVD,CFG

FH5LI M/B LA-H801P

FH5LI M/B LA-H801P

FH5LI M/B LA-H801P

1

1.0

1.0

1.0

of

19 102Tuesday, October 15 , 2019

19 102Tuesday, October 15 , 2019

19 102Tuesday, October 15 , 2019

A

Vinafix.com

1 1

2 2

B

C

D

E

Reserve Page

3 3

4 4

Security Class ification

Security Class ification

Security Class ification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2017/11/ 23 2018/09/ 01

2017/11/ 23 2018/09/ 01

2017/11/ 23 2018/09/ 01

C

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Reserve Page

Reserve Page

Reserve Page

Size Document N umber Rev

Size Document N umber Rev

Size Document N umber Rev

Custom

Custom

Custom

D

FH5LI M/B LA-H801P

FH5LI M/B LA-H801P

FH5LI M/B LA-H801P

Date: Sheet of

Date: Sheet of

Date: Sheet of

20 102Tuesday, October 15 , 2019

20 102Tuesday, October 15 , 2019

20 102Tuesday, October 15 , 2019

E

1.0

1.0

1.0

A

Vinafix.com

1 1

2 2

B

C

D

E

Reserve Page

3 3

4 4

Security Class ification

Security Class ification

Security Class ification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2017/11/ 23 2018/09/ 01

2017/11/ 23 2018/09/ 01

2017/11/ 23 2018/09/ 01

C

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Reserve Page

Reserve Page

Reserve Page

Size Document N umber Rev

Size Document N umber Rev

Size Document N umber Rev

Custom

Custom

Custom

D

FH5LI M/B LA-H801P

FH5LI M/B LA-H801P

FH5LI M/B LA-H801P

Date: Sheet of

Date: Sheet of

Date: Sheet of

21 102Tuesday, October 15 , 2019

21 102Tuesday, October 15 , 2019

21 102Tuesday, October 15 , 2019

E

1.0

1.0

1.0

A

Vinafix.com

1 1

2 2

B

C

D

E

Reserve Page

3 3

4 4

Security Class ification

Security Class ification

Security Class ification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2017/11/ 23 2018/09/ 01

2017/11/ 23 2018/09/ 01

2017/11/ 23 2018/09/ 01

C

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Reserve Page

Reserve Page

Reserve Page

Size Document N umber Rev

Size Document N umber Rev

Size Document N umber Rev

Custom

Custom

Custom

D

FH5LI M/B LA-H801P

FH5LI M/B LA-H801P

FH5LI M/B LA-H801P

Date: Sheet of

Date: Sheet of

Date: Sheet of

22 102Tuesday, October 15 , 2019

22 102Tuesday, October 15 , 2019

22 102Tuesday, October 15 , 2019

E

1.0

1.0

1.0

A

Vinafix.com

B

C

D

E

DDR_A_DQS#[0..7]<8>

DDR_A_D[0..63]<8>

DDR_A_DQS[0..7]<8>

DDR_A_MA[0..16]<8>

DDR_A_BA0<8>

DDR_A_BA1<8>

DDR_A_BG0<8>

1 1

Layout Note:

2 2

Place near JDIMM2

+1.2V_VDDQ

+1.2V_VDDQ

3 3

@

12

Reserved for cap downsize

Layout Note:
Place near JDIMM1.257,259

4 4

DDR_A_BG1<8>
DDR_A_ACT#<8>
DDR_A_ALERT#<8>
DDR_A_PAR<8>

DDR_A_CLK0<8>
DDR_A_CLK#0<8>
DDR_A_CLK1<8>
DDR_A_CLK#1<8>

DDR_A_CKE0<8>
DDR_A_CKE1<8>
DDR_A_CS#0<8>
DDR_A_CS#1<8>

SOC_SMBDATA_1<9,66>
SOC_SMBCLK_1<9,66>

DDR_A_ODT0<8>
DDR_A_ODT1<8>

1

1

CD32

2

2

1U_0201_6.3V6M

CD38

12

12

10U_0402_6.3V6M

+1.2V_VDDQ

CD258

@

12

10U_0402_6.3V6M

10U_0402_6.3V6M

CD240

12

10U_0402_6.3V6M

add 1 cap for MLCC downsize

CD33

1U_0201_6.3V6M

CD39

10U_0402_6.3V6M

CD259

@

1

2

CD68

12

10U_0402_6.3V6M

DDR_A_BA0
DDR_A_BA1
DDR_A_BG0
DDR_A_BG1
DDR_A_ACT#
DDR_A_ALERT#
DDR_A_PAR

DDR_A_CLK0
DDR_A_CLK#0
DDR_A_CLK1
DDR_A_CLK#1

DDR_A_CKE0
DDR_A_CKE1

DDR_A_CS#0

DDR_A_CS#1

SOC_SMBDATA_1
SOC_SMBCLK_1

DDR_A_ODT0
DDR_A_ODT1

@

1

2

1U_0201_6.3V6M

A

1

2

12

1U_0201_6.3V6M

V
1uF*1
10uF*1

CD67

1

CD35

2

1U_0201_6.3V6M

1U_0201_6.3V6M

CD41

12

10U_0402_6.3V6M

10U_0402_6.3V6M

CD261

PP

1

CD34

2

1U_0201_6.3V6M

CD40

12

10U_0402_6.3V6M

CD260

1U_0201_6.3V6M

+2.5V

1

2

@

RD243

0_0402_5%

RD54

0_0402_5%

1

CD37

CD36

2

1U_0201_6.3V6M

CD42

CD43

12

10U_0402_6.3V6M

1

2

12

12

RD52

0_0402_5%

12

RD241

0_0402_5%

CD69

1U_0201_6.3V6M

CD44

10U_0402_6.3V6M

@

1

2

12

+3VS

12

0_0402_5%

12

0_0402_5%

DDR_DRAMRST#<8,24>

CD70

1U_0201_6.3V6M

CD45

10U_0402_6.3V6M

@

RD242

RD56

+1.2V_VDDQ

+1.2V_VDDQ

+1.2V_VDDQ

12

DDR_A_SA2
DDR_A_SA1
DDR_A_SA0

12

RD63 240_0402_1%

RD1 47 0_0402_5%@

CD30 .1U_0402_16V7K

@EMC@

VDDQ
1uF*8
10uF*8
330uF*1

Layout Note:
Place near JDIMM2.255

VDDSPD

0.1uF*1

2.2uF*1

B

12

1 2

12

+3VS

12
12

+1.2V_VDDQ

12

2.2U_0402_6.3V6M

RD61 240_0402_1%
RD62 240_0402_1%

CD55

SOC_SMBDATA_1
SOC_SMBCLK_1

1

2

CD239

0.1U_0201_10V6K

DDR_A_CLK0
DDR_A_CLK#0
DDR_A_CLK1
DDR_A_CLK#1

DDR_A_CKE0
DDR_A_CKE1

DDR_A_CS#0
DDR_A_CS#1

DDR_A_ODT0
DDR_A_ODT1

DDR_A_BG0
DDR_A_BG1
DDR_A_BA0
DDR_A_BA1

DDR_A_MA0
DDR_A_MA1
DDR_A_MA2
DDR_A_MA3
DDR_A_MA4
DDR_A_MA5
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA11
DDR_A_MA12
DDR_A_MA13
DDR_A_MA14
DDR_A_MA15
DDR_A_MA16

DDR_A_ACT#

DDR_A_PAR
DDR_A_ALERT#
DDR_A_EVENT#
DDR_DRAMRST#

DDR_A_SA2
DDR_A_SA1
DDR_A_SA0

DDR_A_DQS8
DDR_A_DQS#8

JDIMM2A

137

CK0(T)

139

CK0#(C)

138

CK1(T)

140

CK1#(C)

109

CKE0

110

CKE1

149

S0#

157

S1#

162

S2#/C0

165

S3#/C1

155

ODT0

161

ODT1

115

BG0

113

BG1

150

BA0

145

BA1

144

A0

133

A1

132

A2

131

A3

128

A4

126

A5

127

A6

122

A7

125

A8

121

A9

146

A10_AP

120

A11

119

A12

158

A13

151

A14_WE#

156

A15_CAS#

152

A16_RAS#

114

ACT#

143

PARITY

116

ALERT#

134

EVENT#

108

RESET#

254

SDA

253

SCL

166

SA2

260

SA1

256

SA0

92

CB0_NC

91

CB1_NC

101

CB2_NC

105

CB3_NC

88

CB4_NC

87

CB5_NC

100

CB6_NC

104

CB7_NC

97

DQS8(T)

95

DQS8#(C)

12

DM0#/DBI0#

33

DM1#/DBI1#

54

DM2#/DBI2#

75

DM3#/DBI3#

178

DM4#/DBI4#

199

DM5#/DBI5#

220

DM6#/DBI6#

241

DM7#/DBI7#

96

DM8#/DBI8#

FOX_AS0A821-H4SB-7H

CONN@

SP07001GA00

STD

DQS0(T)

DQS0#(C)

DQ10
DQ11
DQ12
DQ13
DQ14
DQ15

DQS1(T)

DQS1#(C)

DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23

DQS2(T)

DQS2#(C)

DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31

DQS3(T)

DQS3#(C)

DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39

DQS4(T)

DQS4#(C)

DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47

DQS5(T)

DQS5#(C)

DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55

DQS6(T)

DQS6#(C)

DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

DQS7(T)

DQS7#(C)

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7

DQ8
DQ9

8
7
20
21
4
3
16
17
13
11

28
29
41
42
24
25
38
37
34
32

50
49
62
63
46
45
58
59
55
53

70
71
83
84
66
67
79
80
76
74

174
173
187
186
170
169
183
182
179
177

195
194
207
208
191
190
203
204
200
198

216
215
228
229
211
212
224
225
221
219

237
236
249
250
232
233
245
246
242
240

DDR_A_D61
DDR_A_D62
DDR_A_D56
DDR_A_D57
DDR_A_D60
DDR_A_D58
DDR_A_D63
DDR_A_D59
DDR_A_DQS7
DDR_A_DQS#7

DDR_A_D44
DDR_A_D40
DDR_A_D47
DDR_A_D45
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D46
DDR_A_DQS5
DDR_A_DQS#5

DDR_A_D54
DDR_A_D53
DDR_A_D50
DDR_A_D48
DDR_A_D55
DDR_A_D51
DDR_A_D52
DDR_A_D49
DDR_A_DQS6
DDR_A_DQS#6

DDR_A_D33
DDR_A_D38
DDR_A_D35
DDR_A_D32
DDR_A_D39
DDR_A_D37
DDR_A_D34
DDR_A_D36
DDR_A_DQS4
DDR_A_DQS#4

DDR_A_D19
DDR_A_D23
DDR_A_D18
DDR_A_D17
DDR_A_D21
DDR_A_D22
DDR_A_D16
DDR_A_D20
DDR_A_DQS2
DDR_A_DQS#2

DDR_A_D5
DDR_A_D6
DDR_A_D1
DDR_A_D0
DDR_A_D7
DDR_A_D3
DDR_A_D2
DDR_A_D4
DDR_A_DQS0
DDR_A_DQS#0

DDR_A_D26
DDR_A_D28
DDR_A_D29
DDR_A_D31
DDR_A_D25
DDR_A_D24
DDR_A_D27
DDR_A_D30
DDR_A_DQS3
DDR_A_DQS#3

DDR_A_D12
DDR_A_D10
DDR_A_D14
DDR_A_D13
DDR_A_D8
DDR_A_D9
DDR_A_D15
DDR_A_D11
DDR_A_DQS1
DDR_A_DQS#1

Data swap 12/12

0.022U_0402_16V7K

24.9_0402_1%

+0.6V_A_VREFCA

1

CD66

2

12

RD50

RD46

1K_0402_1%

RD49
2_0402_1%

RD47

1K_0402_1%

+1.2V_VDDQ

12

12

+0.6V_DDRA_VREFCA

12

1

2

Place near to SO-DIMM connector.

Compatible with SP07001HW00

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

C

2018/12/27 2019/12/27

2018/12/27 2019/12/27

2018/12/27 2019/12/27

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

D

Standard Type

2-3A to 1 DIMMs/channel

+1.2V_VDDQ

+3VS

20mils

CD65

0.1U_0201_10V6K

VTT
1uF*2
10uF*1

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

JDIMM2B

STD

111

VDD1

112

VDD2

117

VDD3

118

VDD4

123

VDD5

124

VDD6

129

VDD7

130

VDD8

135

VDD9

136

VDD10

255

VDDSPD

164

VREFCA

1

VSS

2

VSS

5

VSS

6

VSS

9

VSS

10

VSS

14

VSS

15

VSS

18

VSS

19

VSS

22

VSS

23

VSS

26

VSS

27

VSS

30

VSS

31

VSS

35

VSS

36

VSS

39

VSS

40

VSS

43

VSS

44

VSS

47

VSS

48

VSS

51

VSS

52

VSS

56

VSS

57

VSS

60

VSS

61

VSS

64

VSS

65

VSS

68

VSS

69

VSS

72

VSS

73

VSS

77

VSS

78

VSS

81

VSS

82

VSS

85

VSS

86

VSS

89

VSS

90

VSS

93

VSS

94

VSS

98

VSS

262

GND

FOX_AS0A821-H4SB-7H

CONN@

SP07001GA00

ayout Note:

L
Place near JDIMM1.258

+0.6VS_VTT

12

add 1 cap for MLCC downsize

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

FH5LI M/B LA-H801P

FH5LI M/B LA-H801P

FH5LI M/B LA-H801P

CD64

CD257

12

10U_0402_6.3V6M

10U_0402_6.3V6M

DDR4_DIMMA

DDR4_DIMMA

DDR4_DIMMA

VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
VDD19

1

2

VPP1
VPP2

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

GND

141
142
147
148
153
154
159
160
163

258

VTT

257
259

99
102
103
106
107
167
168
171
172
175
176
180
181
184
185
188
189
192
193
196
197
201
202
205
206
209
210
213
214
217
218
222
223
226
227
230
231
234
235
238
239
243
244
247
248
251
252

261

1

CD62

2

1U_0201_6.3V6M

E

+1.2V_VDDQ

CD63

1U_0201_6.3V6M

23 102Tuesday, October 15, 2019

23 102Tuesday, October 15, 2019

23 102Tuesday, October 15, 2019

+0.6VS_VTT

+2.5V

1.0

1.0

1.0

5

Vinafix.com

4

3

2

1

+DDR_VREF_CA

U2

M1

RD210

CD214 1U_0201_6.3V6M

1

2

VREFCA

P3

A0

P7

A1

R3

A2

N7

A3

N3

A4

P8

A5

P2

A6

R8

A7

R2

A8

R7

A9

M3

A10/AP

T2

A11

M7

A12/BC

T8

A13

L2

A14/WE

N2

BA0

N8

BA1

E2

DMU/DBIU

E7

DML/DBIL

K7

CK_t

K8

CK_c

K2

CKE

K3

ODT

L7

CS

L8

RAS

M8

CAS

A7

DQSU_c

B7

DQSU_t

F3

DQSL_c

G3

DQSL_t

P1

RESET

F9

ZQ

L3

ACT

M2

BG0

N9

TEN

P9

ALERT

T3

PAR

T7

NC

B1

VPP

R9

VPP

96-BALL

SDRAM DDR4

K4A8G165WB-BCPB_FBGA96

X76@

CD217 1U_0201_6.3V6M

CD215 1U_0201_6.3V6M

CD216 1U_0201_6.3V6M

1

1

1

2

2

2

CD226 10U_0402_6.3V6M

CD225 10U_0402_6.3V6M

1

2

DDR_B_MA0

12

DDR_B_MA1
DDR_B_MA2
DDR_B_MA3

CD124

DDR_B_MA4

MEM@

0.047U_0402_25V7K

D D

DDR_B_BA0<8>
DDR_B_BA1<8>

+1.2V_VDDQ +1.2V_VDDQ

DDR_B_CLK0<8>
DDR_B_CLK#0<8>
DDR_B_CKE0<8>

DDR_B_ODT0<8>

DDR_B_CS#0<8>

C C

DDR_B_MA[0..16]<8>

DDR_B_DQS#[0..7]<8>

DDR_B_DQS[0..7]<8>

DDR_B_D[0..63]<8>

DDR_B_BG1<8>

VDDQ
1uF*16
10uF*5

4 as near each on board RAM device as possible

+1.2V_VDDQ

B B

+1.2V_VDDQ

CD264 10U_0402_6.3V6M

CD230 1U_0201_6.3V6M

CD231 1U_0201_6.3V6M

1

2

CD266 1U_0201_6.3V6M

CD263 10U_0402_6.3V6M

1

1

1

2

2

2

DDR_B_ACT#<8>
DDR_B_BG0<8>

DDR_B_ALERT#<8>

DDR_B_PAR<8>

CD236 1U_0201_6.3V6M

CD235 1U_0201_6.3V6M

CD233 1U_0201_6.3V6M

CD232 1U_0201_6.3V6M

CD234 1U_0201_6.3V6M

1

1

2

CD267 1U_0201_6.3V6M

1

1

1

1

2

2

2

2

2

1

2

DDR_B_MA5
DDR_B_MA6
DDR_B_MA7
DDR_B_MA8
DDR_B_MA9
DDR_B_MA10
DDR_B_MA11
DDR_B_MA12
DDR_B_MA13
DDR_B_MA14

DDR_B_BA0
DDR_B_BA1

DDR_B_CLK0
DDR_B_CLK#0
DDR_B_CKE0

DDR_B_ODT0
DDR_B_CS#0
DDR_B_MA16
DDR_B_MA15

DDR_B_DQS#1
DDR_B_DQS1
DDR_B_DQS#3
DDR_B_DQS3

MEMRST#

MEM@

1 2

240_0402_1%

DDR_B_ACT#
DDR_B_BG0

DDR_B_ALERT#
DDR_B_PAR

+2.5V

CD211 1U_0201_6.3V6M

CD212 1U_0201_6.3V6M

CD210 1U_0201_6.3V6M

CD218 1U_0201_6.3V6M

CD213 1U_0201_6.3V6M

1

1

1

1

2

1

2

2

2

2

DDR_B_D29

G2

DQL0

DDR_B_D28

F7

DQL1

DDR_B_D25

H3

DQL2

DDR_B_D27

H7

DQL3

DDR_B_D30

H2

DQL4

DDR_B_D26

H8

DQL5

DDR_B_D24

J3

DQL6

DDR_B_D31

J7

DQL7

DDR_B_D13

A3

DQU0

DDR_B_D9

B8

DQU1

DDR_B_D10

C3

DQU2

DDR_B_D11

C7

DQU3

DDR_B_D8

C2

DQU4

DDR_B_D12

C8

DQU5

DDR_B_D15

D3

DQU6

DDR_B_D14

D7

DQU7

B3

+1.2V_VDDQ

VDD

B9

VDD

D1

VDD

G7

VDD

J1

VDD

J9

VDD

L1

VDD

L9

VDD

R1

VDD

T9

VDD

A1

VDDQ

A9

VDDQ

C1

VDDQ

D9

VDDQ

F2

VDDQ

F8

VDDQ

G1

VDDQ

G9

VDDQ

J2

VDDQ

J8

VDDQ

B2

VSS

E1

VSS

E9

VSS

G8

VSS

K1

VSS

K9

VSS

M9

VSS

N1

VSS

T1

VSS

A2

VSSQ

A8

VSSQ

C9

VSSQ

D2

VSSQ

D8

VSSQ

E3

VSSQ

E8

VSSQ

F1

VSSQ

H1

VSSQ

H9

VSSQ

CD229 10U_0402_6.3V6M

CD227 10U_0402_6.3V6M

CD228 10U_0402_6.3V6M

1

1

1

1

2

2

2

2

RD206

10mils 10mils

240_0402_1%

VSS_E9_U2 VSS_E9_U3

DDP@

1 2

RD79

10mils 10mils

0_0402_5%

DDR_B_BG1_R DDR_B_BG1_R

SDP@

1 2

RD78
0_0201_1%

DDP@

1 2

DDR_A_BG1(RD78, Intel:549352)

1. Near SOC side

2. BO1+BO2+M small then other
CMD 25mils

3. BO1+BO2 small then 800mils

Follow MA51

1

+

CD237
330U_D2_2V_Y

@

SGA00009S00

2

330U 2V H1.9
9mohm POLY

DDR_B_BG1

+DDR_VREF_CA

12

CD125

MEM@

0.047U_0402_25V7K

M1

DDR_B_MA0

P3

DDR_B_MA1

P7

DDR_B_MA2

R3

DDR_B_MA3

N7

DDR_B_MA4

N3

DDR_B_MA5

P8

DDR_B_MA6

P2

DDR_B_MA7

R8

DDR_B_MA8

R2

DDR_B_MA9

R7

DDR_B_MA10

M3

DDR_B_MA11

T2

DDR_B_MA12

M7

DDR_B_MA13

T8

DDR_B_MA14

DDR_B_BA0
DDR_B_BA1

DDR_B_CLK0
DDR_B_CLK#0
DDR_B_CKE0

DDR_B_DQS#0
DDR_B_DQS0
DDR_B_DQS#2
DDR_B_DQS2

MEMRST#

MEM@

1 2

240_0402_1%

L2

N2
N8

E2
E7

K7
K8
K2

DDR_B_ODT0

K3

DDR_B_CS#0

L7

DDR_B_MA16

L8

DDR_B_MA15

M8

A7
B7
F3
G3

P1

RD211

F9

DDR_B_ACT#

L3

DDR_B_BG0

M2
N9

DDR_B_ALERT#

P9

DDR_B_PAR

T3

T7
B1

+2.5V

R9

DDR4 mapping

E9

M9

T7

RCOMP[0]
(SOC side) 200_1% 121_1%

SDP@

RD206
0_0402_5%

SD028000080

SDP@

RD207
0_0402_5%

SD028000080

U3

DQL0

VREFCA

DQL1
DQL2
DQL3

A0

DQL4

A1
A2

DQL5

A3

DQL6

A4

DQL7
A5
A6
A7

DQU0
A8

DQU1
A9

DQU2
A10/AP

DQU3
A11

DQU4
A12/BC

DQU5

DQU6

A13

DQU7

A14/WE

BA0
BA1

VDD
VDD
VDD

DMU/DBIU

VDD

DML/DBIL

VDD
VDD
VDD

CK_t

VDD

CK_c

VDD

CKE

VDD

VDDQ

VDDQ

VDDQ

VDDQ

VDDQ

VDDQ

VDDQ

ODT
CS

VDDQ
RAS

VDDQ
CAS

VDDQ

VSS
VSS
VSS

VSS

DQSU_c

VSS

DQSU_t

VSS
VSS

DQSL_c

VSS

DQSL_t

VSS

RESET

ZQ

ACT

VSSQ
BG0

VSSQ

VSSQ

TEN

VSSQ

ALERT

VSSQ

PAR

VSSQ
NC

VSSQ

VSSQ

VPP

VSSQ

VPP

VSSQ

96-BALL

SDRAM DDR4

K4A8G165WB-BCPB_FBGA96

X76@

SDP DDP

UZQ

VSS

VSSNCBG1

VSS

SDP@

RD208
0_0402_5%

SD028000080

SDP@

RD209
0_0402_5%

SD028000080

+DDR_VREF_CA

RD212

U4

M1

VREFCA

P3

A0

P7

A1

R3

A2

N7

A3

N3

A4

P8

A5

P2

A6

R8

A7

R2

A8

R7

A9

M3

A10/AP

T2

A11

M7

A12/BC

T8

A13

L2

A14/WE

N2

BA0

N8

BA1

E2

DMU/DBIU

E7

DML/DBIL

K7

CK_t

K8

CK_c

K2

CKE

K3

ODT

L7

CS

L8

RAS

M8

CAS

A7

DQSU_c

B7

DQSU_t

F3

DQSL_c

G3

DQSL_t

P1

RESET

F9

ZQ

L3

ACT

M2

BG0

N9

TEN

P9

ALERT

T3

PAR

T7

NC

B1

VPP

R9

VPP

96-BALL

SDRAM DDR4

K4A8G165WB-BCPB_FBGA96

X76@

DDR_B_D37

G2

DQL0

DDR_B_D33

F7

DQL1

DDR_B_D35

H3

DQL2

DDR_B_D34

H7

DQL3

DDR_B_D39

H2

DQL4

DDR_B_D32

H8

DQL5

DDR_B_D38

J3

DQL6

DDR_B_D36

J7

DQL7

DDR_B_D41

A3

DQU0

DDR_B_D44

B8

DQU1

DDR_B_D43

C3

DQU2

DDR_B_D47

C7

DQU3

DDR_B_D42

C2

DQU4

DDR_B_D40

C8

DQU5

DDR_B_D46

D3

DQU6

DDR_B_D45

D7

DQU7

B3

+1.2V_VDDQ

VDD

B9

VDD

D1

VDD

G7

VDD

J1

VDD

J9

VDD

L1

VDD

L9

VDD

R1

VDD

T9

VDD

A1

VDDQ

A9

VDDQ

C1

VDDQ

D9

VDDQ

F2

VDDQ

F8

VDDQ

G1

VDDQ

G9

VDDQ

J2

VDDQ

J8

VDDQ

B2

10mils 10mils

VSS

E1

VSS

VSS_E9_U4 VSS_E9_U5

10mils

DDR_B_BG1_R

1 2

E9

VSS

G8

VSS

K1

VSS

K9

VSS

M9

VSS

N1

VSS

T1

VSS

A2

VSSQ

A8

VSSQ

C9

VSSQ

D2

VSSQ

D8

VSSQ

E3

VSSQ

E8

VSSQ

F1

VSSQ

H1

VSSQ

H9

VSSQ

DDR_B_D22

G2

DDR_B_D23

F7

DDR_B_D17

H3

DDR_B_D20

H7

DDR_B_D16

H2

DDR_B_D18

H8

DDR_B_D21

J3

DDR_B_D19

J7

DDR_B_D3

A3

DDR_B_D2

B8

DDR_B_D6

C3

DDR_B_D4

C7

DDR_B_D5

C2

DDR_B_D0

C8

DDR_B_D7

D3

DDR_B_D1

D7

B3

+1.2V_VDDQ

B9
D1
G7
J1
J9
L1
L9
R1
T9

A1
A9
C1
D9
F2
F8
G1
G9
J2
J8

B2
E1
E9
G8
K1
K9
M9
N1
T1

A2
A8
C9
D2
D8
E3
E8
F1
H1
H9

RD207
240_0402_1%

DDP@

1 2

0.047U_0402_25V7K

+1.2V_VDDQ +1.2V_VDDQ

DDR_B_MA0

12

DDR_B_MA1
DDR_B_MA2
DDR_B_MA3

CD126

DDR_B_MA4

MEM@

DDR_B_MA5
DDR_B_MA6
DDR_B_MA7
DDR_B_MA8
DDR_B_MA9
DDR_B_MA10
DDR_B_MA11
DDR_B_MA12
DDR_B_MA13
DDR_B_MA14

DDR_B_BA0
DDR_B_BA1

DDR_B_CLK0
DDR_B_CLK#0
DDR_B_CKE0

DDR_B_ODT0
DDR_B_CS#0
DDR_B_MA16
DDR_B_MA15

DDR_B_DQS#5
DDR_B_DQS5
DDR_B_DQS#4
DDR_B_DQS4

MEMRST#

MEM@

1 2

240_0402_1%

DDR_B_ACT#
DDR_B_BG0

DDR_B_ALERT#
DDR_B_PAR

+2.5V +2.5V

RD208
240_0402_1%

DDP@

+DDR_VREF_CA

12

CD127

MEM@

0.047U_0402_25V7K

DDR_B_MA0
DDR_B_MA1
DDR_B_MA2
DDR_B_MA3
DDR_B_MA4
DDR_B_MA5
DDR_B_MA6
DDR_B_MA7
DDR_B_MA8
DDR_B_MA9
DDR_B_MA10
DDR_B_MA11
DDR_B_MA12
DDR_B_MA13
DDR_B_MA14

DDR_B_BA0
DDR_B_BA1

DDR_B_CLK0
DDR_B_CLK#0
DDR_B_CKE0

DDR_B_ODT0
DDR_B_CS#0
DDR_B_MA16
DDR_B_MA15

DDR_B_DQS#7
DDR_B_DQS7
DDR_B_DQS#6
DDR_B_DQS6

MEMRST#

MEM@

1 2

240_0402_1%

DDR_B_ACT#
DDR_B_BG0

DDR_B_ALERT#
DDR_B_PAR

RD213

U5

M1

VREFCA

P3

A0

P7

A1

R3

A2

N7

A3

N3

A4

P8

A5

P2

A6

R8

A7

R2

A8

R7

A9

M3

A10/AP

T2

A11

M7

A12/BC

T8

A13

L2

A14/WE

N2

BA0

N8

BA1

E2

DMU/DBIU

E7

DML/DBIL

K7

CK_t

K8

CK_c

K2

CKE

K3

ODT

L7

CS

L8

RAS

M8

CAS

A7

DQSU_c

B7

DQSU_t

F3

DQSL_c

G3

DQSL_t

P1

RESET

F9

ZQ

L3

ACT

M2

BG0

N9

TEN

P9

ALERT

T3

PAR

T7

NC

B1

VPP

R9

VPP

96-BALL

SDRAM DDR4

K4A8G165WB-BCPB_FBGA96

X76@

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

DDR_B_D50

G2

DDR_B_D51

F7

DDR_B_D48

H3

DDR_B_D55

H7

DDR_B_D52

H2

DDR_B_D54

H8

DDR_B_D53

J3

DDR_B_D49

J7

DDR_B_D57

A3

DDR_B_D60

B8

DDR_B_D62

C3

DDR_B_D56

C7

DDR_B_D61

C2

DDR_B_D59

C8

DDR_B_D63

D3

DDR_B_D58

D7

+1.2V_VDDQ

B3

VDD

B9

VDD

D1

VDD

G7

VDD

J1

VDD

J9

VDD

L1

VDD

L9

VDD

R1

VDD

T9

VDD

A1
A9
C1
D9
F2
F8
G1
G9
J2
J8

B2

VSS

E1

VSS

E9

VSS

G8

VSS

K1

VSS

K9

VSS

M9

VSS

N1

VSS

T1

VSS

A2
A8
C9
D2
D8
E3
E8
F1
H1
H9

DDR_B_BG1_R

10mils

DDP@

RD209

240_0402_1%

12

TERMINATION

0.01U_0402_16V7K

+0.6VS_VTT

+1.2V_VDDQ

1 2

CD50

+1.2V_VDDQ

MEM@

DDR_B_MA14
DDR_B_CS#0
DDR_B_MA15
DDR_B_MA12

DDR_B_MA13
DDR_B_MA8
DDR_B_PAR
DDR_B_MA11

DDR_B_MA1
DDR_B_MA5
DDR_B_MA7
DDR_B_MA9

DDR_B_BG0
DDR_B_MA10
DDR_B_MA3
DDR_B_BA1

DDR_B_CKE0
DDR_B_MA16
DDR_B_ODT0
DDR_B_ACT#

DDR_B_MA2

RD218 39_0201_1%MEM@

1 2

RD217 39_0201_1%MEM@

1 2

RD220 39_0201_1%MEM@

1 2

RD219 39_0201_1%MEM@

1 2

RD222 39_0201_1%MEM@

1 2

RD221 39_0201_1%MEM@

1 2

RD223 39_0201_1%MEM@

1 2

RD224 39_0201_1%MEM@

1 2

RD225 39_0201_1%MEM@

1 2

RD226 39_0201_1%MEM@

1 2

RD228 39_0201_1%MEM@

1 2

RD227 39_0201_1%MEM@

1 2

RD229 39_0201_1%MEM@

1 2

RD230 39_0201_1%MEM@

1 2

RD232 39_0201_1%MEM@

1 2

RD231 39_0201_1%MEM@

1 2

RD234 39_0201_1%MEM@

1 2

RD233 39_0201_1%MEM@

1 2

RD235 39_0201_1%MEM@

1 2

RD236 39_0201_1%MEM@

1 2

RD216 39_0201_1%MEM@

1 2

DDR_B_CLK0

RD214 39_0201_1%MEM@

1 2

RD215 39_0201_1%MEM@

1 2

1

CD51

3.3P_0402_50V8W

2

@

CD51 close to CPU

RD86 39_0201_1%DDP@

1 2

RD41 49.9_0402_1%

12

MEM@

INTEL suggest 50ohm 1%

1

2

12

RD13

24.9_0402_1%

MEM@

+1.2V_VDDQ

RD11

2.7_0402_1%

MEM@

12

RD202 0 _0402_5%

RD195

1.8K_0402_1%

MEM@

1 2

RD200

1.8K_0402_1%

MEM@

1 2

MEM@

1 2

@

+DDR_VREF_CA

MEMRST#

1

CD219
.1U_0402_16V7K

2

+0.6V_B_VREFCA

CD24

0.022U_0402_16V7K

MEM@

DDR_DRAMRST#<8,23>

DDR_DRAMRST#

DDR_B_CLK#0

DDR_B_CLK0

DDR_B_CLK#0

DDR_B_BG1_R

DDR_B_ALERT#

+0.6VS_VTT

Add for cap downsize

VPP
1uF*8
10uF*3

A A

+2.5V +0.6VS_VTT

2 as near each on board RAM device as possible

CD241 1U_0201_6.3V6M

CD255 1U_0201_6.3V6M

CD254 1U_0201_6.3V6M

CD238 1U_0201_6.3V6M

1

1

1

2

2

2

CD244 1U_0201_6.3V6M

CD243 1U_0201_6.3V6M

CD256 1U_0201_6.3V6M

1

1

1

2

2

2

5

CD220 10U_0402_6.3V6M

CD245 1U_0201_6.3V6M

1

2

CD221 10U_0402_6.3V6M

1

1

2

1

2

2

CD270 1U_0201_6.3V6M

CD222 10U_0402_6.3V6M

CD269 10U_0402_6.3V6M

CD271 1U_0201_6.3V6M

1

1

1

1

2

2

2

2

Add for cap downsize Add for cap downsize

VTT
1uF*8
10uF*2

CD250 1U_0201_6.3V6M

CD248 1U_0201_6.3V6M

CD249 1U_0201_6.3V6M

CD246 1U_0201_6.3V6M

CD247 1U_0201_6.3V6M

1

1

2

2

1

1

1

2

2

2

2 as near each on board RAM device as possible

4

CD224 10U_0402_6.3V6M

CD253 1U_0201_6.3V6M

CD251 1U_0201_6.3V6M

CD252 1U_0201_6.3V6M

1

1

1

2

2

2

CD274 1U_0201_6.3V6M

CD273 10U_0402_6.3V6M

CD272 1U_0201_6.3V6M

CD223 10U_0402_6.3V6M

1

1

1

1

1

2

2

2

2

2

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2018/12/27 2019/12/27

2018/12/27 2019/12/27

2018/12/27 2019/12/27

Compal Secret Data

Compal Secret Data

Compal Secret Data

2

Deciphered Date

Deciphered Date

Deciphered Date

DDR_B_MA4
DDR_B_BA0
DDR_B_MA0
DDR_B_MA6

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet

RD238 39_0201_1%MEM@

1 2

RD237 39_0201_1%MEM@

1 2

RD239 39_0201_1%MEM@

1 2

RD240 39_0201_1%MEM@

1 2

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

DDR4 ON BOARD CHIPS

DDR4 ON BOARD CHIPS

DDR4 ON BOARD CHIPS

FH5LI M/B LA-H801P

FH5LI M/B LA-H801P

FH5LI M/B LA-H801P

1

24 1 02Tuesday, October 15, 2019

24 1 02Tuesday, October 15, 2019

24 1 02Tuesday, October 15, 2019

of

1.0

1.0

1.0

A

Vinafix.com

1 1

2 2

B

C

D

E

Reserve Page

3 3

4 4

Security Class ification

Security Class ification

Security Class ification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2017/11/ 23 2018/09/ 01

2017/11/ 23 2018/09/ 01

2017/11/ 23 2018/09/ 01

C

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Reserve Page

Reserve Page

Reserve Page

Size Document N umber Rev

Size Document N umber Rev

Size Document N umber Rev

Custom

Custom

Custom

D

FH5LI M/B LA-H801P

FH5LI M/B LA-H801P

FH5LI M/B LA-H801P

Date: Sheet of

Date: Sheet of

Date: Sheet of

25 102Tuesday, October 15 , 2019

25 102Tuesday, October 15 , 2019

25 102Tuesday, October 15 , 2019

E

1.0

1.0

1.0

A

Vinafix.com

1 1

2 2

B

C

D

E

Reserve Page

3 3

4 4

Security Class ification

Security Class ification

Security Class ification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2017/11/ 23 2018/09/ 01

2017/11/ 23 2018/09/ 01

2017/11/ 23 2018/09/ 01

C

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Reserve Page

Reserve Page

Reserve Page

Size Document N umber Rev

Size Document N umber Rev

Size Document N umber Rev

Custom

Custom

Custom

D

FH5LI M/B LA-H801P

FH5LI M/B LA-H801P

FH5LI M/B LA-H801P

Date: Sheet of

Date: Sheet of

Date: Sheet of

26 102Tuesday, October 15 , 2019

26 102Tuesday, October 15 , 2019

26 102Tuesday, October 15 , 2019

E

1.0

1.0

1.0

A

Vinafix.com

1 1

2 2

B

C

D

E

Reserve Page

3 3

4 4

Security Class ification

Security Class ification

Security Class ification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2017/11/ 23 2018/09/ 01

2017/11/ 23 2018/09/ 01

2017/11/ 23 2018/09/ 01

C

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Reserve Page

Reserve Page

Reserve Page

Size Document N umber Rev

Size Document N umber Rev

Size Document N umber Rev

Custom

Custom

Custom

D

FH5LI M/B LA-H801P

FH5LI M/B LA-H801P

FH5LI M/B LA-H801P

Date: Sheet of

Date: Sheet of

Date: Sheet of

27 102Tuesday, October 15 , 2019

27 102Tuesday, October 15 , 2019

27 102Tuesday, October 15 , 2019

E

1.0

1.0

1.0

A

Vinafix.com

1 1

2 2

B

C

D

E

Reserve Page

3 3

4 4

Security Class ification

Security Class ification

Security Class ification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2017/11/ 23 2018/09/ 01

2017/11/ 23 2018/09/ 01

2017/11/ 23 2018/09/ 01

C

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Reserve Page

Reserve Page

Reserve Page

Size Document N umber Rev

Size Document N umber Rev

Size Document N umber Rev

Custom

Custom

Custom

D

FH5LI M/B LA-H801P

FH5LI M/B LA-H801P

FH5LI M/B LA-H801P

Date: Sheet of

Date: Sheet of

Date: Sheet of

28 102Tuesday, October 15 , 2019

28 102Tuesday, October 15 , 2019

28 102Tuesday, October 15 , 2019

E

1.0

1.0

1.0

A

Vinafix.com

1 1

2 2

B

C

D

E

Reserve Page

3 3

4 4

Security Class ification

Security Class ification

Security Class ification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2017/11/ 23 2018/09/ 01

2017/11/ 23 2018/09/ 01

2017/11/ 23 2018/09/ 01

C

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Reserve Page

Reserve Page

Reserve Page

Size Document N umber Rev

Size Document N umber Rev

Size Document N umber Rev

Custom

Custom

Custom

D

FH5LI M/B LA-H801P

FH5LI M/B LA-H801P

FH5LI M/B LA-H801P

Date: Sheet of

Date: Sheet of

Date: Sheet of

29 102Tuesday, October 15 , 2019

29 102Tuesday, October 15 , 2019

29 102Tuesday, October 15 , 2019

E

1.0

1.0

1.0

A

Vinafix.com

1 1

2 2

B

C

D

E

Reserve Page

3 3

4 4

Security Class ification

Security Class ification

Security Class ification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2017/11/ 23 2018/09/ 01

2017/11/ 23 2018/09/ 01

2017/11/ 23 2018/09/ 01

C

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Reserve Page

Reserve Page

Reserve Page

Size Document N umber Rev

Size Document N umber Rev

Size Document N umber Rev

Custom

Custom

Custom

D

FH5LI M/B LA-H801P

FH5LI M/B LA-H801P

FH5LI M/B LA-H801P

Date: Sheet of

Date: Sheet of

Date: Sheet of

30 102Tuesday, October 15 , 2019

30 102Tuesday, October 15 , 2019

30 102Tuesday, October 15 , 2019

E

1.0

1.0

1.0