5
4
3
2
1
Huron River Platform Rev 1.0
D D
BLOCK DIAGRAM
N12PGV
512M/1G DDR3 VRAM
LCD Panel
CRT
C C
HDMI
LVDS
CRT
HDMI
Debug Conn.
PCIE x16
CPU
Sandy Bridge
FDI x 4
DMI x4
DDR3 1333MHz
9
PCIE
DDR3 SO-DIMM *2
USB3.0
4
NEC PD720200A(Optional)
MiniCard
2
WLAN + BT3.0
USB Port(3)
Power
+VCC_CORE
+VGFX_CORE
System
SPI ROM
Azalia
LPC
PCH
Cougar Point
SATA
2
0
ODD
HDD
11
USB
9
0
1
Touchpad
B B
Speaker
Audio Jack
EC
NPCE794L Keyboard
PWM Fan
LED CONTROL
Azalia Codec
Realtek ALC271X
8
4
GigaLAN
AR8151L
6
CardReader
5 IN 1
MiniCard
3G
USB Port(1)
USB Port(2)
CMOS Camera
BT
RJ45
VTT
DDR3
+1.8VS
+VCCSA
+VGA_CORE
Charger
Detect
Load Switch
Power Protect
A A
DC & BATT. Conn.
Reset Circuit
5
Skew Holes
4
Title :
Title :
Title :
System Setting
System Setting
System Setting
JAY TSAI
JAY TSAI
Engineer:
Engineer:
Size Project Name
Size Project Name
Size Project Name
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
3
2
Date: Sheet of
EIH31
EIH31
EIH31
Engineer:
JAY TSAI
1 99 Friday, December 17, 2010
1 99 Friday, December 17, 2010
1
1 99 Friday, December 17, 2010
Rev
Rev
Rev
1.3
1.3
1.3
5
D D
C C
4
3
2
1
SM_BUS ADDRESS :
SM-Bus Device
SO-DIMM 0
B B
A A
5
4
3
2
SO-DIMM 1
PlamRest Thermal Sensor (G781)
CardReader
PCIE 1
Minicard WLAN
PCIE 2
N/A
PCIE 3
USB3.0
PCIE 4
N/A
PCIE 5
GLAN
PCIE 6
N/A
PCIE 7
N/A
PCIE 8
SATA HDD
SATA0
N/A
SATA1
SATA ODD
SATA2
N/A
SATA3
N/A SATA4
SATA5 N/A
Size Project Name
Size Project Name
Size Project Name
C
C
C
Date: Sheet of
Date: Sheet of
Date: Sheet of
SM-Bus Address
1010000x ( A0h )
1010001x ( A4h )
1001100x ( 98h )
USB Port (1)
USB 0
USB Port (2)
USB 1
USB Port (3)
USB 2
N/A
USB 3
USB 4
Bluetooth
N/A
USB 5
N/A
USB 6
N/A
USB 7
CMOS Camera
USB 8
USB 9
WLAN
USB 10
SIM Card
3G
USB 11
USB 12
N/A
USB 13
N/A
EIH31
EIH31
EIH31
Title :
Title :
Title :
Engineer:
Engineer:
Engineer:
1
System Setting
System Setting
System Setting
JAY TSAI
JAY TSAI
JAY TSAI
2 99 Friday, December 17, 2010
2 99 Friday, December 17, 2010
2 99 Friday, December 17, 2010
Rev
Rev
Rev
1.3
1.3
1.3
5
CPU(1)_DMI,PEG,FDI,CLK,MISC
CPU(1)_DMI,PEG,FDI,CLK,MISC
CPU(1)_DMI,PEG,FDI,CLK,MISC
4
3
2
1
+VCCP
D D
DMI_TXN0 22
DMI_TXN1 22
DMI_TXN2 22
DMI_TXN3 22
DMI_TXP0 22
DMI_TXP1 22
DMI_TXP2 22
DMI_TXP3 22
DMI_RXN0 22
DMI_RXN1 22
DMI_RXN2 22
DMI_RXN3 22
DMI_RXP0 2 2
DMI_RXP1 2 2
DMI_RXP2 2 2
DMI_RXP3 2 2
FDI_TXN[7:0 ] 22
C C
FDI_TXP[7:0 ] 22
FDI_FSYNC0 22
FDI_FSYNC1 22
FDI_LSYNC0 22
FDI_LSYNC1 22
+VCCP
R0302 24.9Ohm R0302 24.9Ohm
B B
1 2
FDI_INT 22
DP_COMP
FDI_TXN0
FDI_TXN1
FDI_TXN2
FDI_TXN3
FDI_TXN4
FDI_TXN5
FDI_TXN6
FDI_TXN7
FDI_TXP0
FDI_TXP1
FDI_TXP2
FDI_TXP3
FDI_TXP4
FDI_TXP5
FDI_TXP6
FDI_TXP7
EIH-D.G p83
B27
B25
A25
B24
B28
B26
A24
B23
G21
E22
F21
D21
G22
D22
F20
C21
A21
H19
E19
F18
B21
C20
D18
E17
A22
G19
E20
G18
B20
C19
D19
F17
H20
H17
A18
A17
B16
C15
D15
C17
F16
C16
G15
C18
E16
D16
F15
J18
J17
J19
U0301A
U0301A
DMI_RX#[0]
DMI_RX#[1]
DMI_RX#[2]
DMI_RX#[3]
DMI_RX[0]
DMI_RX[1]
DMI_RX[2]
DMI_RX[3]
DMI_TX#[0]
DMI_TX#[1]
DMI_TX#[2]
DMI_TX#[3]
DMI_TX[0]
DMI_TX[1]
DMI_TX[2]
DMI_TX[3]
FDI0_TX#[0]
FDI0_TX#[1]
FDI0_TX#[2]
FDI0_TX#[3]
FDI1_TX#[0]
FDI1_TX#[1]
FDI1_TX#[2]
FDI1_TX#[3]
FDI0_TX[0]
FDI0_TX[1]
FDI0_TX[2]
FDI0_TX[3]
FDI1_TX[0]
FDI1_TX[1]
FDI1_TX[2]
FDI1_TX[3]
FDI0_FSYNC
FDI1_FSYNC
FDI_INT
FDI0_LSYNC
FDI1_LSYNC
eDP_COMPIO
eDP_ICOMPO
eDP_HPD
eDP_AUX
eDP_AUX#
eDP_TX[0]
eDP_TX[1]
eDP_TX[2]
eDP_TX[3]
eDP_TX#[0]
eDP_TX#[1]
eDP_TX#[2]
eDP_TX#[3]
SOCKET9 89
SOCKET9 89
R0301 24.9Ohm1%R0301 24.9Ohm1%
PEG_COM P
CX0301 0.1UF/16V /DGPUCX0301 0.1UF/16V /DGPU
1 2
CX0302 0.1UF/16V /DGPUCX0302 0.1UF/16V /DGPU
1 2
CX0303 0.1UF/16V /DGPUCX0303 0.1UF/16V /DGPU
1 2
CX0304 0.1UF/16V /DGPUCX0304 0.1UF/16V /DGPU
1 2
CX0305 0.1UF/16V /DGPUCX0305 0.1UF/16V /DGPU
1 2
CX0306 0.1UF/16V /DGPUCX0306 0.1UF/16V /DGPU
1 2
CX0307 0.1UF/16V /DGPUCX0307 0.1UF/16V /DGPU
1 2
CX0308 0.1UF/16V /DGPUCX0308 0.1UF/16V /DGPU
1 2
CX302 0.1UF/16V /DGPUCX30 2 0.1UF/16V /DGPU
1 2
CX303 0.1UF/16V /DGPUCX30 3 0.1UF/16V /DGPU
1 2
CX304 0.1UF/16V /DGPUCX30 4 0.1UF/16V /DGPU
1 2
CX305 0.1UF/16V /DGPUCX30 5 0.1UF/16V /DGPU
1 2
CX306 0.1UF/16V /DGPUCX30 6 0.1UF/16V /DGPU
1 2
CX307 0.1UF/16V /DGPUCX30 7 0.1UF/16V /DGPU
1 2
CX308 0.1UF/16V /DGPUCX30 8 0.1UF/16V /DGPU
1 2
CX309 0.1UF/16V /DGPUCX30 9 0.1UF/16V /DGPU
1 2
CX0317 0.1UF/16V /DGPUCX0317 0.1UF/16V /DGPU
1 2
CX0318 0.1UF/16V /DGPUCX0318 0.1UF/16V /DGPU
1 2
CX0319 0.1UF/16V /DGPUCX0319 0.1UF/16V /DGPU
1 2
CX0320 0.1UF/16V /DGPUCX0320 0.1UF/16V /DGPU
1 2
CX0321 0.1UF/16V /DGPUCX0321 0.1UF/16V /DGPU
1 2
CX0322 0.1UF/16V /DGPUCX0322 0.1UF/16V /DGPU
1 2
CX0323 0.1UF/16V /DGPUCX0323 0.1UF/16V /DGPU
1 2
CX0324 0.1UF/16V /DGPUCX0324 0.1UF/16V /DGPU
1 2
CX318 0.1UF/16V /DGPUCX31 8 0.1UF/16V /DGPU
1 2
CX319 0.1UF/16V /DGPUCX31 9 0.1UF/16V /DGPU
1 2
CX320 0.1UF/16V /DGPUCX32 0 0.1UF/16V /DGPU
1 2
CX321 0.1UF/16V /DGPUCX32 1 0.1UF/16V /DGPU
1 2
CX322 0.1UF/16V /DGPUCX32 2 0.1UF/16V /DGPU
1 2
CX323 0.1UF/16V /DGPUCX32 3 0.1UF/16V /DGPU
1 2
CX324 0.1UF/16V /DGPUCX32 4 0.1UF/16V /DGPU
1 2
CX325 0.1UF/16V /DGPUCX32 5 0.1UF/16V /DGPU
1 2
PEG_RX[0]
PEG_RX[1]
PEG_RX[2]
PEG_RX[3]
PEG_RX[4]
PEG_RX[5]
PEG_RX[6]
PEG_RX[7]
PEG_RX[8]
PEG_RX[9]
PEG_TX[0]
PEG_TX[1]
PEG_TX[2]
PEG_TX[3]
PEG_TX[4]
PEG_TX[5]
PEG_TX[6]
PEG_TX[7]
PEG_TX[8]
PEG_TX[9]
J22
J21
H22
PCIENB_RX N15
K33
PCIENB_RX N14
M35
PCIENB_RX N13
L34
PCIENB_RX N12
J35
PCIENB_RX N11
J32
PCIENB_RX N10
H34
PCIENB_RX N9
H31
PCIENB_RX N8
G33
PCIENB_RX N7
G30
PCIENB_RX N6
F35
PCIENB_RX N5
E34
PCIENB_RX N4
E32
PCIENB_RX N3
D33
PCIENB_RX N2
D31
PCIENB_RX N1
B33
PCIENB_RX N0
C32
PCIENB_RX P15
J33
PCIENB_RX P14
L35
PCIENB_RX P13
K34
PCIENB_RX P12
H35
PCIENB_RX P11
H32
PCIENB_RX P10
G34
PCIENB_RX P9
G31
PCIENB_RX P8
F33
PCIENB_RX P7
F30
PCIENB_RX P6
E35
PCIENB_RX P5
E33
PCIENB_RX P4
F32
PCIENB_RX P3
D34
PCIENB_RX P2
E31
PCIENB_RX P1
C33
PCIENB_RX P0
B32
PCIENB_TX N0
M29
PCIENB_TX N1
M32
PCIENB_TX N2
M31
PCIENB_TX N3
L32
PCIENB_TX N4
L29
PCIENB_TX N5
K31
PCIENB_TX N6
K28
PCIENB_TX N7
J30
PCIENB_TX N8
J28
PCIENB_TX N9
H29
PCIENB_TX N10
G27
PCIENB_TX N11
E29
PCIENB_TX N12
F27
PCIENB_TX N13
D28
PCIENB_TX N14
F26
PCIENB_TX N15
E25
PCIENB_TX P0
M28
PCIENB_TX P1
M33
PCIENB_TX P2
M30
PCIENB_TX P3
L31
PCIENB_TX P4
L28
PCIENB_TX P5
K30
PCIENB_TX P6
K27
PCIENB_TX P7
J29
PCIENB_TX P8
J27
PCIENB_TX P9
H28
PCIENB_TX P10
G28
PCIENB_TX P11
E28
PCIENB_TX P12
F28
PCIENB_TX P13
D27
PCIENB_TX P14
E26
PCIENB_TX P15
D25
PEG_ICOMPI
PEG_ICOMPO
PEG_RCOMPO
PEG_RX#[0]
PEG_RX#[1]
PEG_RX#[2]
PEG_RX#[3]
PEG_RX#[4]
PEG_RX#[5]
DMI
DMI
Intel(R) FDI
Intel(R) FDI
eDP
eDP
PEG_RX#[6]
PEG_RX#[7]
PEG_RX#[8]
PEG_RX#[9]
PEG_RX#[10]
PEG_RX#[11]
PEG_RX#[12]
PEG_RX#[13]
PEG_RX#[14]
PEG_RX#[15]
PEG_RX[10]
PEG_RX[11]
PEG_RX[12]
PEG_RX[13]
PEG_RX[14]
PEG_RX[15]
PEG_TX#[0]
PEG_TX#[1]
PEG_TX#[2]
PEG_TX#[3]
PEG_TX#[4]
PEG_TX#[5]
PEG_TX#[6]
PEG_TX#[7]
PEG_TX#[8]
PEG_TX#[9]
PEG_TX#[10]
PEG_TX#[11]
PCI EXPRESS* - GRAPHICS
PCI EXPRESS* - GRAPHICS
PEG_TX#[12]
PEG_TX#[13]
PEG_TX#[14]
PEG_TX#[15]
PEG_TX[10]
PEG_TX[11]
PEG_TX[12]
PEG_TX[13]
PEG_TX[14]
PEG_TX[15]
1 2
PCIENB_RX N[15:0] 70
PCIENB_RX P[15:0] 70
If Support PCIE Gen3, change AC Cap to 0.22uF
+VCCP
PCIEG_RXN 15
PCIEG_RXN 14
PCIEG_RXN 13
PCIEG_RXN 12
PCIEG_RXN 11
PCIEG_RXN 10
PCIEG_RXN 9
PCIEG_RXN 8
PCIEG_RXN 7
PCIEG_RXN 6
PCIEG_RXN 5
PCIEG_RXN 4
PCIEG_RXN 3
PCIEG_RXN 2
PCIEG_RXN 1
PCIEG_RXN 0
PCIEG_RXP 15
PCIEG_RXP 14
PCIEG_RXP 13
PCIEG_RXP 12
PCIEG_RXP 11
PCIEG_RXP 10
PCIEG_RXP 9
PCIEG_RXP 8
PCIEG_RXP 7
PCIEG_RXP 6
PCIEG_RXP 5
PCIEG_RXP 4
PCIEG_RXP 3
PCIEG_RXP 2
PCIEG_RXP 1
PCIEG_RXP 0
PEG Compensation
Enable PCIE Lane Reversal
Need to PD CFG[2]
PCIEG_RXN [15:0] 7 0
PCIEG_RXP [15:0] 70
+VCCP 6,25,26,27 ,30,32,57,82
EIH31 : 1201-006D000 MOBILE rPGA CPU SOCKET 988B
A A
Title :
Title :
5
4
Title :
Engineer:
Engineer:
Size Project Name
Size Project Name
Size Project Name
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
3
2
Date: Sheet
EIH31
EIH31
EIH31
Engineer:
JAY TSAI
JAY TSAI
JAY TSAI
3 99 Friday, December 17, 201 0
3 99 Friday, December 17, 201 0
1
3 99 Friday, December 17, 201 0
Rev
Rev
Rev
1.0
1.0
1.0
of
1
+3VS
+3VSUS
+VCCP
+3V
2
+1.5V_VC CDDQ 7
+3VS 16,17,20,2 1,22,23,24,25,26,27 ,28,30,32,36,37,40 ,44,45,46,48,50,51 ,53,54,55,57,69,91,9 2
+3VSUS 2 2,24,27,28,30,69,81 ,82,84,92
+VCCP 6,25,26,27 ,30,32,57,82
+3V 2 4,52,53,55,57,69,9 1
A28
A27
A16
A15
3
BCLK_CP U_P
BCLK_CP U_N
CLK_DP_ P_R
CLK_DP_ N_R
0Ohm
0Ohm
0Ohm
0Ohm
1 2
R0429 1KOhm R0429 1KOhm
0Ohm
0Ohm
0Ohm
0Ohm
R0430 1KOhm R0430 1KOhm
1 2
RN0401A
RN0401A
1 2
RN0401B
RN0401B
3 4
RN0402A
RN0402A
1 2
RN0402B
RN0402B
3 4
@
@
@
@
+VCCP
+1.5V_VC CDDQ
CLK_EXP _P 21
CLK_EXP _N 21
CLK_DP_ P 2 1
CLK_DP_ N 21
EIH- D.G p83
U0301B
U0301B
SNB_IVB#
SKTOCC#
CATERR#
4
BCLK
BCLK#
MISC THERMAL PWR MANAGEMENT
MISC THERMAL PWR MANAGEMENT
DPLL_REF_SSCLK
DPLL_REF_SSCLK#
CLOCKS
CLOCKS
5
D D
C26 will change to PROC_SELECT#
H_SNB_IVB # 24
T0401 T0401
T0402 T0402
1
1
TP_SKTO CC#_R
TP_CATE RR#_R
C26
AN34
AL33
VR_HOT# 80
AN33
PECI
AL32
PROCHOT#
AN32
THERMTRIP#
AM34
PM_SYNC
AP33
UNCOREPWRGOOD
V8
SM_DRAMPWROK
AR33
RESET#
SOCKET9 89
SOCKET9 89
12V013A SM000
12V013A SM000
R1.3 Add VR_HOT#
H_PROCH OT#
SM_DRAMRST#
SM_RCOMP[0]
SM_RCOMP[1]
SM_RCOMP[2]
DDR3
MISC
DDR3
MISC
JTAG & BPM
JTAG & BPM
@
@
1 2
R0462 0Ohm
R0462 0Ohm
3
3
D
D
Q0401
Q0401
2N7002
2N7002
1
1
THRO_CP U
G
G
S
S
2
2
H_PECI 25
1%
1%
+VCCP
H_THRMT RIP# 25,32
C C
H_PM_SYNC 22
H_CPUPW RGD 25
PM_DRAM _PWRGD 22
BUF_PLT _RST# 24,30,32,4 0,53,69,70
B B
1 2
R0404 75Ohm
R0404 75Ohm
H_PROCH OT#
SP0402 SP0402
SP0403 SP0403
1%
1%
1%
1%
R0416
R0416
1 2
1.5KOhm
1.5KOhm
H_PROCH OT#_D
1 2
R0403 44.2Ohm
R0403 44.2Ohm
H_THRMT RIP#_R
1 2
SP0401
SP0401
R0402
R0402
H_PM_SYNC _R
1 2
1 2
R0408 10KOhm R0408 10KOhm
H_CPUPW RGD_R H_CPUPW RGD_R
1 2
VDDPW RGOOD_R
1 2
R0409 130Ohm
R0409 130Ohm
BUF_CPU _RST#
1 2
R0417
R0417
750Ohm
750Ohm
R1.3
PRDY#
PREQ#
TCK
TMS
TRST#
TDI
TDO
DBR#
BPM#[0]
BPM#[1]
BPM#[2]
BPM#[3]
BPM#[4]
BPM#[5]
BPM#[6]
BPM#[7]
THRO_CP U 30
R8
AK1
A5
A4
AP29
AP27
AR26
AR27
AP30
AR28
AP26
AL35
AT28
AR29
AR30
AT30
AP32
AR31
AT31
AR32
SM_RCOM P_0
SM_RCOM P_1
SM_RCOM P_2
XDP_PRD Y#
XDP_PRE Q#
XDP_TCK
XDP_TMS
XDP_TRS T#
XDP_TDI
XDP_TDO
H_DBR#
XDP_BPM #0
XDP_BPM #1
XDP_BPM #2
XDP_BPM #3
XDP_BPM #4
XDP_BPM #5
XDP_BPM #6
XDP_BPM #7
R0418 140Ohm1%R0418 140Ohm1%
1 2
R0419 25.5Ohm1%R0419 25.5Ohm1%
1 2
R0420 200Ohm1%R0420 200Ohm1%
1 2
T0403 T0403
1
T0411 T0411
1
T0413 T0413
1
T0414 T0414
1
T0415 T0415
1
T0416 T0416
1
T0417 T0417
1
T0418 T0418
1
PM_DRAM _PWRGD
CPUDRAM RST# 5
Huron River platform Design Guide Update 440484
SM_RCOMP_1 use 26ohm 1%
XDP_BPM #1
XDP_PRE Q#
XDP_TDI
XDP_TDO
XDP_TMS
H_DBR#
XDP_TCK
XDP_TRS T#
PM_SYS_PWRGD is the power good for +1.5V_VCCDDQ
+1.5V_VC CDDQ
R0449
R0449
200Ohm
200Ohm
1%
1%
1 2
R0451 0Ohm R0451 0Ohm
R0450
R0450
1KOhm
1KOhm
1%
1%
@
@
R0428 51Ohm @R0 428 51Ohm @
1 2
R0421 51Ohm R0421 51Ohm
1 2
R0422 51Ohm @R0 422 51Ohm @
1 2
R0423 51Ohm R0423 51Ohm
1 2
R0424 51Ohm @R0 424 51Ohm @
1 2
R0425 1KOhm @R0425 1KOhm @
1 2
R0426 51Ohm @R0 426 51Ohm @
1 2
R0427 51Ohm R0427 51Ohm
1 2
+3VSUS +3V
1 2
1.57 Volt
1 2
R0452
R0452
1 2
1.1KOhm
1.1KOhm
1 2
1%
1%
@
@
U0404
U0404
5
VCC
VCC
Y
Y
Vcc=1.65 ~5.5
Vcc=1.65 ~5.5
C0405
C0405
0.22UF/10 V
0.22UF/10 V
@
@
+VCCP
+3VS
1 2
R0453
A
A
1
B
B
2
3 4
GND
GND
@
@
R0453
10KOhm
10KOhm
@
@
Q0403
Q0403
3
3
PMBS390 4
PMBS390 4
C
C
E
E
2
2
0.22UF/10 V
0.22UF/10 V
B
B
1
1
C0404
C0404
+1.5V_VC CDDQ
R0454
R0454
24.3KOhm1%@
@
@
1 2
@
@
1 2
1 2
R0455
R0455
47KOhm
47KOhm
1%
1%
24.3KOhm1%@
@
@
A A
Title :
Title :
5
4
Title :
Engineer:
Engineer:
Size Project Name
Size Project Name
Size Project Name
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
3
2
Date: Sheet
EIH31
EIH31
EIH31
Engineer:
JAY TSAI
JAY TSAI
JAY TSAI
4 99 Friday, December 17, 201 0
4 99 Friday, December 17, 201 0
1
4 99 Friday, December 17, 201 0
Rev
Rev
Rev
1.0
1.0
1.0
of
3
U0301D
U0301D
M_B_DQ[63:0] 17
M_B_DQ0
C9
AJ11
AH11
AJ12
AH12
AT11
AN14
AR14
AT14
AT12
AN15
AR15
AT15
AA10
D10
G4
G1
G5
G2
K10
J10
M5
M4
M2
M1
AM5
AM6
AR3
AP3
AN3
AN2
AN1
AP2
AP5
AN9
AT5
AT6
AP6
AN8
AR6
AR5
AR9
AT8
AT9
AR8
AA9
AA7
AB8
AB9
A7
C8
A9
A8
D9
D8
F4
F1
F5
F2
J7
J8
K9
J9
K8
K7
N4
N2
N1
N5
R6
SOCKET989
SOCKET989
12V013ASM000
12V013ASM000
SB_DQ[0]
SB_DQ[1]
SB_DQ[2]
SB_DQ[3]
SB_DQ[4]
SB_DQ[5]
SB_DQ[6]
SB_DQ[7]
SB_DQ[8]
SB_DQ[9]
SB_DQ[10]
SB_DQ[11]
SB_DQ[12]
SB_DQ[13]
SB_DQ[14]
SB_DQ[15]
SB_DQ[16]
SB_DQ[17]
SB_DQ[18]
SB_DQ[19]
SB_DQ[20]
SB_DQ[21]
SB_DQ[22]
SB_DQ[23]
SB_DQ[24]
SB_DQ[25]
SB_DQ[26]
SB_DQ[27]
SB_DQ[28]
SB_DQ[29]
SB_DQ[30]
SB_DQ[31]
SB_DQ[32]
SB_DQ[33]
SB_DQ[34]
SB_DQ[35]
SB_DQ[36]
SB_DQ[37]
SB_DQ[38]
SB_DQ[39]
SB_DQ[40]
SB_DQ[41]
SB_DQ[42]
SB_DQ[43]
SB_DQ[44]
SB_DQ[45]
SB_DQ[46]
SB_DQ[47]
SB_DQ[48]
SB_DQ[49]
SB_DQ[50]
SB_DQ[51]
SB_DQ[52]
SB_DQ[53]
SB_DQ[54]
SB_DQ[55]
SB_DQ[56]
SB_DQ[57]
SB_DQ[58]
SB_DQ[59]
SB_DQ[60]
SB_DQ[61]
SB_DQ[62]
SB_DQ[63]
SB_BS[0]
SB_BS[1]
SB_BS[2]
SB_CAS#
SB_RAS#
SB_WE#
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63
M_B_BS0 17
M_B_BS1 17
M_B_BS2 17
M_B_CAS# 17
M_B_RAS# 17
M_B_WE# 17
SA_CLK[0]
SA_CLK#[0]
SA_CKE[0]
SA_CLK[1]
SA_CLK#[1]
SA_CKE[1]
SA_CLK[2]
SA_CLK#[2]
SA_CKE[2]
SA_CLK[3]
SA_CLK#[3]
SA_CKE[3]
SA_CS#[0]
SA_CS#[1]
SA_CS#[2]
SA_CS#[3]
SA_ODT[0]
SA_ODT[1]
SA_ODT[2]
SA_ODT[3]
SA_DQS#[0]
SA_DQS#[1]
SA_DQS#[2]
SA_DQS#[3]
SA_DQS#[4]
SA_DQS#[5]
SA_DQS#[6]
SA_DQS#[7]
SA_DQS[0]
SA_DQS[1]
SA_DQS[2]
SA_DQS[3]
SA_DQS[4]
SA_DQS[5]
SA_DQS[6]
SA_DQS[7]
SA_MA[0]
SA_MA[1]
SA_MA[2]
SA_MA[3]
SA_MA[4]
SA_MA[5]
SA_MA[6]
SA_MA[7]
SA_MA[8]
SA_MA[9]
SA_MA[10]
SA_MA[11]
SA_MA[12]
SA_MA[13]
SA_MA[14]
SA_MA[15]
4
AB6
AA6
V9
AA5
AB5
V10
AB4
AA4
W9
AB3
AA3
W10
AK3
AL3
AG1
AH1
AH3
AG3
AG2
AH2
C4
G6
J3
M6
AL6
AM8
AR12
AM15
D4
F6
K3
N6
AL5
AM9
AR11
AM14
AD10
W1
W2
W7
V3
V2
W3
W6
V1
W5
AD8
V4
W4
AF8
V5
V7
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7
M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
M_A_DIM0_CLK_DDR 0 16
M_A_DIM0_CLK_DDR #0 16
M_A_DIM0_CKE0 16
M_A_DIM0_CLK_DDR 1 16
M_A_DIM0_CLK_DDR #1 16
M_A_DIM0_CKE1 16
M_A_DIM0_CS#0 16
M_A_DIM0_CS#1 16
M_A_DIM0_ODT0 16
M_A_DIM0_ODT1 16
M_A_DQS#[7:0] 16
M_A_DQS[7:0] 16
M_A_A[15:0] 16
5
U0301C
U0301C
M_A_DQ[63:0] 16
D D
C C
M_A_DQ0
C5
SA_DQ[0]
M_A_DQ1
D5
SA_DQ[1]
M_A_DQ2
D3
SA_DQ[2]
M_A_DQ3
D2
SA_DQ[3]
M_A_DQ4
D6
SA_DQ[4]
M_A_DQ5
C6
SA_DQ[5]
M_A_DQ6
C2
SA_DQ[6]
M_A_DQ7
C3
SA_DQ[7]
M_A_DQ8
F10
SA_DQ[8]
M_A_DQ9
F8
SA_DQ[9]
M_A_DQ10
G10
SA_DQ[10]
M_A_DQ11
G9
SA_DQ[11]
M_A_DQ12
F9
SA_DQ[12]
M_A_DQ13
F7
SA_DQ[13]
M_A_DQ14
G8
SA_DQ[14]
M_A_DQ15
G7
SA_DQ[15]
M_A_DQ16
K4
SA_DQ[16]
M_A_DQ17
K5
SA_DQ[17]
M_A_DQ18
K1
SA_DQ[18]
M_A_DQ19
J1
SA_DQ[19]
M_A_DQ20
J5
SA_DQ[20]
M_A_DQ21
J4
SA_DQ[21]
M_A_DQ22
J2
SA_DQ[22]
M_A_DQ23
K2
SA_DQ[23]
M_A_DQ24
M8
SA_DQ[24]
M_A_DQ25
N10
SA_DQ[25]
M_A_DQ26
N8
SA_DQ[26]
M_A_DQ27
N7
SA_DQ[27]
M_A_DQ28
M10
SA_DQ[28]
M_A_DQ29
M9
SA_DQ[29]
M_A_DQ30
N9
SA_DQ[30]
M_A_DQ31
M7
SA_DQ[31]
M_A_DQ32
AG6
SA_DQ[32]
M_A_DQ33
AG5
SA_DQ[33]
M_A_DQ34
AK6
SA_DQ[34]
M_A_DQ35
AK5
SA_DQ[35]
M_A_DQ36
AH5
SA_DQ[36]
M_A_DQ37
AH6
SA_DQ[37]
M_A_DQ38
AJ5
SA_DQ[38]
M_A_DQ39
AJ6
SA_DQ[39]
M_A_DQ40
AJ8
SA_DQ[40]
M_A_DQ41
AK8
SA_DQ[41]
M_A_DQ42
AJ9
SA_DQ[42]
M_A_DQ43
AK9
SA_DQ[43]
M_A_DQ44
AH8
SA_DQ[44]
M_A_DQ45
AH9
SA_DQ[45]
M_A_DQ46
AL9
SA_DQ[46]
M_A_DQ47
AL8
SA_DQ[47]
M_A_DQ48
AP11
SA_DQ[48]
M_A_DQ49
AN11
SA_DQ[49]
M_A_DQ50
AL12
SA_DQ[50]
M_A_DQ51
AM12
SA_DQ[51]
M_A_DQ52
AM11
SA_DQ[52]
M_A_DQ53
AL11
SA_DQ[53]
M_A_DQ54
AP12
SA_DQ[54]
M_A_DQ55
AN12
SA_DQ[55]
M_A_DQ56
AJ14
SA_DQ[56]
M_A_DQ57
AH14
SA_DQ[57]
M_A_DQ58
AL15
SA_DQ[58]
M_A_DQ59
AK15
SA_DQ[59]
M_A_DQ60
AL14
SA_DQ[60]
M_A_DQ61
AK14
SA_DQ[61]
M_A_DQ62
AJ15
SA_DQ[62]
M_A_DQ63
AH15
SA_DQ[63]
M_A_BS0 16
M_A_BS1 16
M_A_BS2 16
M_A_CAS# 16
M_A_RAS# 16
M_A_WE# 16
AE10
AF10
AE8
AD9
AF9
V6
SOCKET989
SOCKET989
12V013ASM000
12V013ASM000
SA_BS[0]
SA_BS[1]
SA_BS[2]
SA_CAS#
SA_RAS#
SA_WE#
DDR SYSTEM MEMORY A
DDR SYSTEM MEMORY A
2
+1.5V
DDR SYSTEM MEMORY B
DDR SYSTEM MEMORY B
SB_CLK[0]
SB_CLK#[0]
SB_CKE[0]
SB_CLK[1]
SB_CLK#[1]
SB_CKE[1]
SB_CLK[2]
SB_CLK#[2]
SB_CKE[2]
SB_CLK[3]
SB_CLK#[3]
SB_CKE[3]
SB_CS#[0]
SB_CS#[1]
SB_CS#[2]
SB_CS#[3]
SB_ODT[0]
SB_ODT[1]
SB_ODT[2]
SB_ODT[3]
SB_DQS#[0]
SB_DQS#[1]
SB_DQS#[2]
SB_DQS#[3]
SB_DQS#[4]
SB_DQS#[5]
SB_DQS#[6]
SB_DQS#[7]
SB_DQS[0]
SB_DQS[1]
SB_DQS[2]
SB_DQS[3]
SB_DQS[4]
SB_DQS[5]
SB_DQS[6]
SB_DQS[7]
SB_MA[0]
SB_MA[1]
SB_MA[2]
SB_MA[3]
SB_MA[4]
SB_MA[5]
SB_MA[6]
SB_MA[7]
SB_MA[8]
SB_MA[9]
SB_MA[10]
SB_MA[11]
SB_MA[12]
SB_MA[13]
SB_MA[14]
SB_MA[15]
+1.5V 7,16,57,83
AE2
AD2
R9
AE1
AD1
R10
AB2
AA2
T9
AA1
AB1
T10
AD3
AE3
AD6
AE6
AE4
AD4
AD5
AE5
D7
F3
K6
N3
AN5
AP9
AK12
AP15
C7
G3
J6
M3
AN6
AP8
AK11
AP14
AA8
T7
R7
T6
T2
T4
T3
R2
T5
R3
AB7
R1
T1
AB10
R5
R4
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7
M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
M_B_DIM0_CLK_DDR 0 17
M_B_DIM0_CLK_DDR #0 17
M_B_DIM0_CKE0 17
M_B_DIM0_CLK_DDR 1 17
M_B_DIM0_CLK_DDR #1 17
M_B_DIM0_CKE1 17
M_B_DIM0_CS#0 17
M_B_DIM0_CS#1 17
M_B_DIM0_ODT0 17
M_B_DIM0_ODT1 17
1
M_B_DQS#[7:0] 17
M_B_DQS[7:0] 17
M_B_A[15:0] 17
B B
R0508 0Ohm R0508 0O hm
DDR3_DR AMRST# 16,17
A A
1 2
5
+1.5V
R0507
R0507
1KOhm
1KOhm
@
@
1 2
4
1 2
C0501
C0501
0.1UF/25V
0.1UF/25V
Q0501
Q0501
H2N7002
H2N7002
D
D
3
3
@
@
R0501 0Ohm R0501 0Ohm
@
@
S
S
2
2
G
G
1
1
1 2
1%
1%
1 2
@
R0506 4.99KOhm
@R0506 4.99KOhm
@
@
3
1 2
R0504 0Ohm
R0504 0Ohm
CPUDRAMR ST# 4
DRAMRST_C NTRL_PCH 21
Title :
Title :
Title :
CPU(3)_DDR3
CPU(3)_DDR3
CPU(3)_DDR3
JAY TSAI
JAY TSAI
JAY TSAI
Engineer:
Engineer:
Size Project Name
Size Project Name
Size Project Name
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
EIH31
EIH31
EIH31
Engineer:
1
Rev
Rev
Rev
1.0
1.0
1.0
5 99 Friday, Decem ber 17, 2010
5 99 Friday, Decem ber 17, 2010
5 99 Friday, Decem ber 17, 2010
1 2
1 2
+
+
C0687
C0687
10UF/6.3V
10UF/6.3V
CE0603
CE0603
@
@
330UF/2V
330UF/2V
1
2
1 2
C0662
C0662
22UF/6.3V
22UF/6.3V
1 2
C0653
C0653
C0652
C0652
10UF/6.3V
10UF/6.3V
1 2
C0693
C0693
22UF/6.3V
22UF/6.3V
@
@
+VCCP +VCCP
R0607
R0607
130Ohm
130Ohm
1%
1%
1 2
1 2
1 2
1 2
1 2
C0604
C0604
10UF/6.3V
10UF/6.3V
C0644
C0644
10UF/6.3V
10UF/6.3V
@
@
C0620
C0620
22UF/6.3V
22UF/6.3V
@
@
C0605
C0605
10UF/6.3V
10UF/6.3V
1 2
C0612
C0612
10UF/6.3V
10UF/6.3V
1 2
C0621
C0621
22UF/6.3V
22UF/6.3V
@
@
1 2
1 2
1 2
+VCCP
+VCC_CORE
Decoupling guide from Intel (POWER + EE)
+VCC_CORE 22uF * 19pcs (3 no stuff)
10uF * 11pcs (1 no stuff)
470uF * 6pcs (2 no stuff)
H36HC 1.3
+VCC_CORE 22uF * 14pcs(6pcs unmount)
10uF * 16pcs (4pcs unmount)
470uF * 2pcs
A14 (EE)
+VCC_CORE 22uF * 10pcs( 1PCS unmount)
10uF * 15pcs (4PCS unmount)
470uF total at power page
SP0602
SP0602
R0402
R0402
1 2
1 2
C0606
C0606
10UF/6.3V
10UF/6.3V
1 2
C0613
C0613
10UF/6.3V
10UF/6.3V
1 2
C0622
C0622
22UF/6.3V
22UF/6.3V
@
@
+VCCP 25 ,26,27,30, 32,57,82
+VCC_CORE 80
CE0601 CE0602 A14 at Power side
R0608
R0608
130Ohm
130Ohm
1%
1%
1 2
VR_SVID_ DATA 80
1 2
1 2
C0609
C0608
C0608
10UF/6.3V
10UF/6.3V
1 2
C0615
C0615
10UF/6.3V
10UF/6.3V
1 2
C0624
C0624
22UF/6.3V
22UF/6.3V
@
@
1 2
1 2
C0609
10UF/6.3V
10UF/6.3V
C0616
C0616
10UF/6.3V
10UF/6.3V
C0625
C0625
22UF/6.3V
22UF/6.3V
@
@
C0607
C0607
10UF/6.3V
10UF/6.3V
C0614
C0614
10UF/6.3V
10UF/6.3V
C0623
C0623
22UF/6.3V
22UF/6.3V
@
@
1 2
C0638
C0638
22UF/6.3V
22UF/6.3V
1 2
C0661
C0661
10UF/6.3V
10UF/6.3V
1 2
C0650
C0650
10UF/6.3V
10UF/6.3V
VCCSENSE 80
VSSSENS E 80
3
1 2
1 2
1 2
10UF/6.3V
10UF/6.3V
SP0601
SP0601
R0402
R0402
1 2
C0639
C0639
22UF/6.3V
22UF/6.3V
C0647
C0647
10UF/6.3V
10UF/6.3V
@
@
C0656
C0656
+VCCP
1 2
C0645
C0645
22UF/6.3V
22UF/6.3V
1 2
C0648
C0648
10UF/6.3V
10UF/6.3V
1 2
C0689
C0689
10UF/6.3V
10UF/6.3V
1 2
1 2
1 2
1 2
R0605
R0605
54.9Ohm
54.9Ohm
1%
1%
8.5A
C0601
C0601
10UF/6.3V
10UF/6.3V
C0688
C0688
10UF/6.3V
10UF/6.3V
C0617
C0617
22UF/6.3V
22UF/6.3V
@
@
1 2
C0655
C0655
22UF/6.3V
22UF/6.3V
1 2
C0649
C0649
10UF/6.3V
10UF/6.3V
1 2
C0690
C0690
22UF/6.3V
22UF/6.3V
@
@
VR_SVID_ CLK 8 0
1 2
C0602
C0602
10UF/6.3V
10UF/6.3V
1 2
C0610
C0610
10UF/6.3V
10UF/6.3V
1 2
C0618
C0618
22UF/6.3V
22UF/6.3V
@
@
1 2
C0658
C0658
22UF/6.3V
22UF/6.3V
1 2
C0651
C0651
10UF/6.3V
10UF/6.3V
1 2
C0691
C0691
22UF/6.3V
22UF/6.3V
@
@
1 2
C0603
C0603
10UF/6.3V
10UF/6.3V
1 2
C0611
C0611
10UF/6.3V
10UF/6.3V
@
@
1 2
C0619
C0619
22UF/6.3V
22UF/6.3V
@
@
1 2
C0659
C0659
22UF/6.3V
22UF/6.3V
@
@
1 2
10UF/6.3V
10UF/6.3V
1 2
C0692
C0692
22UF/6.3V
22UF/6.3V
@
@
Close to CPU Close to VR Close to VR Close to CPU
5
POWER
VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VCC7
VCC8
VCC9
VCC10
VCC11
VCC12
VCC13
VCC14
VCC15
VCC16
VCC17
VCC18
VCC19
VCC20
VCC21
VCC22
VCC23
VCC24
VCC25
VCC26
VCC27
VCC28
VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48
VCC49
VCC50
VCC51
VCC52
VCC53
VCC54
VCC55
VCC56
VCC57
VCC58
VCC59
VCC60
VCC61
VCC62
VCC63
VCC64
VCC65
VCC66
VCC67
VCC68
VCC69
VCC70
VCC71
VCC72
VCC73
VCC74
VCC75
VCC76
VCC77
VCC78
VCC79
VCC80
VCC81
VCC82
VCC83
VCC84
VCC85
VCC86
VCC87
VCC88
VCC89
VCC90
VCC91
VCC92
VCC93
VCC94
VCC95
VCC96
VCC97
VCC98
VCC99
VCC100
POWER
CORE SUPPLY
CORE SUPPLY
SENSE LINES SVID
SENSE LINES SVID
PEG AND DDR
PEG AND DDR
VCCIO1
VCCIO2
VCCIO3
VCCIO4
VCCIO5
VCCIO6
VCCIO7
VCCIO8
VCCIO9
VCCIO10
VCCIO11
VCCIO12
VCCIO13
VCCIO14
VCCIO15
VCCIO16
VCCIO17
VCCIO18
VCCIO19
VCCIO20
VCCIO21
VCCIO22
VCCIO23
VCCIO24
VCCIO25
VCCIO26
VCCIO27
VCCIO28
VCCIO29
VCCIO30
VCCIO31
VCCIO32
VCCIO33
VCCIO34
VCCIO35
VCCIO36
VCCIO37
VCCIO38
VCCIO39
VCCIO40
VIDALERT#
VIDSCLK
VIDSOUT
VCC_SENSE
VSS_SENSE
VCCIO_SENSE
VSSIO_SENSE
AH13
AH10
AG10
AC10
Y10
U10
P10
L10
J14
J13
J12
J11
H14
H12
H11
G14
G13
G12
F14
F13
F12
F11
E14
E12
E11
D14
D13
D12
D11
C14
C13
C12
C11
B14
B12
A14
A13
A12
A11
J23
AJ29
AJ30
AJ28
AJ35
AJ34
B10
A10
U0301F
U0301F
+VCC_CORE
AG35
AG34
AG33
AG32
AG31
AG30
AG29
D D
C C
B B
AG28
AG27
AG26
AF35
AF34
AF33
AF32
AF31
AF30
AF29
AF28
AF27
AF26
AD35
AD34
AD33
AD32
AD31
AD30
AD29
AD28
AD27
AD26
AC35
AC34
AC33
AC32
AC31
AC30
AC29
AC28
AC27
AC26
AA35
AA34
AA33
AA32
AA31
AA30
AA29
AA28
AA27
AA26
Y35
Y34
Y33
Y32
Y31
Y30
Y29
Y28
Y27
Y26
V35
V34
V33
V32
V31
V30
V29
V28
V27
V26
U35
U34
U33
U32
U31
U30
U29
U28
U27
U26
R35
R34
R33
R32
R31
R30
R29
R28
R27
R26
P35
P34
P33
P32
P31
P30
P29
P28
P27
P26
4
+VCCP
H_CPU_SV IDALRT#
H_CPU_SV IDCLK
H_CPU_SV IDDAT
VCC_SENS E_R
VSS_SEN SE_R
TP_VCCIO_S ENSE
TP_VSSIO_ SENSE
+VCC_CORE
1%
1%
1 2
R0612 44.2Ohm
R0612 44.2Ohm
SP0603 R04 02 SP0603 R0402
1 2
SP0604 R04 02 SP0604 R0402
1 2
T0601T0601
1
T0602T0602
1
SV-DC
0.8V ~ 1.35V
53A
1 2
1 2
C0632
C0632
22UF/6.3V
22UF/6.3V
1 2
C0640
C0640
10UF/6.3V
10UF/6.3V
@
@
1 2
C0637
C0637
10UF/6.3V
10UF/6.3V
+VCCP +VCCP
1 2
VCCSENSE
VSSSENS E
R0611
R0611
75Ohm
75Ohm
1%
1%
C0633
C0633
22UF/6.3V
22UF/6.3V
1 2
10UF/6.3V
10UF/6.3V
1 2
+VCC_CORE
1 2
C0634
C0634
22UF/6.3V
22UF/6.3V
@
@
1 2
C0660
C0660
C0657
C0657
10UF/6.3V
10UF/6.3V
1 2
C0641
C0641
10UF/6.3V
10UF/6.3V
@
@
ER1.16
VR_SVID_ ALERT# 80
R0602
R0602
100Ohm
100Ohm
1%
1%
1 2
1 2
R0603
R0603
100Ohm
100Ohm
1%
1%
C0642
C0642
10UF/6.3V
10UF/6.3V
@
@
SOCKET989
SOCKET989
12V013A SM000
12V013A SM000
Decoupling guide from Intel (POWER + EE)
+VCCP 22uF * 29pcs
330uF * 6pcs (3 no stuff)
Maserati (EE)
A A
5
4
+VCCP 10uF * 19pcs (6pcs no stuff)
22uF* 9 pcs (total unmount)
330 uF *1pcs (unmount)
A14 (EE)
+VCCP 10uF * 14pcs(2pcs unmount)
3
2
H36HC 1.3
10uF 13PCS
Title :
Title :
Title :
CPU(4)_PWR
CPU(4)_PWR
CPU(4)_PWR
Engineer:
Engineer:
Size Project Name
Size Project Name
Size Project Name
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet
EIH31
EIH31
EIH31
Engineer:
JAY TSAI
JAY TSAI
JAY TSAI
6 99 Friday, December 17 , 2010
6 99 Friday, December 17 , 2010
6 99 Friday, December 17 , 2010
1
Rev
Rev
Rev
1.0
1.0
1.0
of
2
1
C0720
C0720
10UF/6.3V
10UF/6.3V
2
@
@
1 2
+
+
+1.5V_VCCDDQ
+V_SM_VREF
CE0703
CE0703
220UF/2V
220UF/2V
+VCCP
+1.5V
+VCCSA
+1.8VS
+V_VREF_DDR3
+VCCP 6,25,26,2 7,30,32,57,82
+1.5V 5,16,57,83
+VCCSA 82
+1.8VS 24,26,57,84
+1.5V_VCCDDQ 4
+V_SM_VREF
PS_S3CNTR L_1.5V_R
4
G
G
S
S
1
2
SOP8
SOP8
3
SI4336DY_T1_E3
SI4336DY_T1_E3
Q0702
Q0702
07V04000000 5
07V04000000 5
1
2
1
3MM_OPEN_5MIL
3MM_OPEN_5MIL
5A
JP0703
JP0703
5
D
D
6
7
8
@
@
2
1 2
C0740 470PF/50V
C0740 470PF/50V
Change to 220uf at Masarati 131D Beta
+VCCSA
1 2
+
+
CE0702
CE0702
100UF/6.3V
100UF/6.3V
H36HC 1.3
10uF 2PCS
> 0 SUSB_EC#
100uF 1PCS
>100 ns
Change to 100uf at Masarati 131D Beta
SM_VREF
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15
VCCSA1
VCCSA2
VCCSA3
VCCSA4
VCCSA5
VCCSA6
VCCSA7
VCCSA8
FC_C22
3
VCCGT_SENSE
AK35
VSSGT_SENSE
AK34
+V_SM_REF 10mil
+V_SM_VREF_CNT
AL1
AF7
AF4
AF1
AC7
1 2
AC4
AC1
Y7
Y4
Y1
U7
U4
U1
P7
P4
P1
1
R0703
R0703
100KOhm
100KOhm
@
@
2
+1.5V_VCCDDQ
1 2
C0736
C0736
C0737
C0737
10UF/6.3V
10UF/6.3V
10UF/6.3V
10UF/6.3V
@
@
H36HC 1.3
10uF 6PCS(3pcs unmount)
100uF 1PCS
M27
M26
L26
J26
J25
J24
H26
H25
H23
C22
C24
1 2
C0729
C0729
10UF/6.3V
10UF/6.3V
@
@
R0704 0Ohm@R07 04 0Ohm@
1 2
R0701 10KOhm R0701 1 0KOhm
1 2
Remove port VCCSA_SEL0 for future platform use
VCCGT_SENSE 80
VSSGT_SENSE 80
R0702 0Ohm
R0702 0Ohm
1 2
vx_r0805_h24_ small
vx_r0805_h24_ small
S
S
D
D
3
2
3
2
G
G
SI2308DS-T1-E3@
1 2
C0738
C0738
10UF/6.3V
10UF/6.3V
SI2308DS-T1-E3@
Q0701
Q0701
1 2
C0739
C0739
10UF/6.3V
10UF/6.3V
@
@
1
1
1 2
C0721
C0721
10UF/6.3V
10UF/6.3V
0.75V ~ 0.9V
6A
1 2
1 2
1 2
C0728
C0728
10UF/6.3V
10UF/6.3V
@
@
Close to CPU
VCCSA_SEL 8 2
Chang VCCSA_SEL1 to VCCSA_SEL to meet power schematic
C0726
C0726
C0727
C0727
10UF/6.3V
10UF/6.3V
10UF/6.3V
10UF/6.3V
VCCSA_SENSE 82
For future platform use
1 2
C0709
C0709
2.2UF/16V
2.2UF/16V
1 2
C0732
C0732
22UF/6.3V
22UF/6.3V
1 2
C0716
C0716
22UF/6.3V
22UF/6.3V
4
1 2
C0710
C0710
1UF/6.3V
1UF/6.3V
1 2
C0711
C0711
1UF/6.3V
1UF/6.3V
AT24
AT23
AT21
AT20
AT18
AT17
AR24
AR23
AR21
AR20
AR18
AR17
AP24
AP23
AP21
AP20
AP18
AP17
AN24
AN23
AN21
AN20
AN18
AN17
AM24
AM23
AM21
AM20
AM18
AM17
AL24
AL23
AL21
AL20
AL18
AL17
AK24
AK23
AK21
AK20
AK18
AK17
AJ24
AJ23
AJ21
AJ20
AJ18
AJ17
AH24
AH23
AH21
AH20
AH18
AH17
B6
A6
A2
U0301G
U0301G
VAXG1
VAXG2
VAXG3
VAXG4
VAXG5
VAXG6
VAXG7
VAXG8
VAXG9
VAXG10
VAXG11
VAXG12
VAXG13
VAXG14
VAXG15
VAXG16
VAXG17
VAXG18
VAXG19
VAXG20
VAXG21
VAXG22
VAXG23
VAXG24
VAXG25
VAXG26
VAXG27
VAXG28
VAXG29
VAXG30
VAXG31
VAXG32
VAXG33
VAXG34
VAXG35
VAXG36
VAXG37
VAXG38
VAXG39
VAXG40
VAXG41
VAXG42
VAXG43
VAXG44
VAXG45
VAXG46
VAXG47
VAXG48
VAXG49
VAXG50
VAXG51
VAXG52
VAXG53
VAXG54
VCCPLL1
VCCPLL2
VCCPLL3
SOCKET989
SOCKET989
12V013ASM000
12V013ASM000
POWER
POWER
SENSE
SENSE
GRAPHICS
GRAPHICS
1.8V RAIL
1.8V RAIL
VSSAXG_SENSE
LINES
LINES
VREF MISC
VREF MISC
DDR3 -1.5V RAILS
DDR3 -1.5V RAILS
SA RAIL
SA RAIL
VAXG_SENSE
VCCSA_SENSE
VCCSA_VID1
5
+VGFX_CORE
D D
1 2
C0701
C0701
22UF/6.3V
22UF/6.3V
1 2
C0733
C0733
22UF/6.3V
22UF/6.3V
1 2
C0702
C0702
22UF/6.3V
22UF/6.3V
1 2
C0734
C0734
22UF/6.3V
22UF/6.3V
1 2
C0703
C0703
22UF/6.3V
22UF/6.3V
@
@
1 2
C0735
C0735
22UF/6.3V
22UF/6.3V
@
@
1 2
C0704
C0704
22UF/6.3V
22UF/6.3V
@
@
1 2
C0712
C0712
22UF/6.3V
22UF/6.3V
1 2
C0705
C0705
22UF/6.3V
22UF/6.3V
1 2
C0713
C0713
22UF/6.3V
22UF/6.3V
@
@
1 2
C0706
C0706
22UF/6.3V
22UF/6.3V
1 2
C0714
C0714
22UF/6.3V
22UF/6.3V
@
@
1 2
C0730
C0730
22UF/6.3V
22UF/6.3V
@
@
1 2
C0715
C0715
22UF/6.3V
22UF/6.3V
ER1.17
C C
R1.3
H36HC 1.3
+VCCP 22uF* 16 pcs (6 unmount)
330uF * 1pcs (1 pcs unmount)
470uF *1pcs (unmount)
(EIH31 Del 470uF For Layout)
A14 (EE)
No VGFX
B B
+1.8VS
JP0702
JP0702
1
2
1
2MM_OPEN_5M IL
2MM_OPEN_5M IL
+1.8VCCPLL
1 2
C0707
C0707
10UF/6.3V
10UF/6.3V
1.2A
1 2
C0708
C0708
4.7UF/6.3V
4.7UF/6.3V
2
1 2
C0750
C0750
22UF/6.3V
22UF/6.3V
@
@
1
@
@
1 2
R0705 0Ohm
R0705 0Ohm
@
@
PS_S3CNTR L_1.5V 22
+1.5V
+1.5V_VCCDDQ
+1.5V_VCCDDQ Power Good
(U0404 pin 4)
+0.75VS
R1.3
H36HC 1.3
100uF 1PCS
10uF 1PCS
1uF 2PCS
A A
Title :
Title :
Title :
CPU(5)_PWR
CPU(5)_PWR
CPU(5)_PWR
JAY TSAI
JAY TSAI
Engineer:
Engineer:
Size Project Name
Size Project Name
Size Project Name
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet
EIH31
EIH31
EIH31
1
Engineer:
JAY TSAI
7 99 Friday, December 17, 2010
7 99 Friday, December 17, 2010
7 99 Friday, December 17, 2010
Rev
Rev
Rev
1.0
1.0
1.0
of
5
U0301H
D D
C C
B B
AT35
AT32
AT29
AT27
AT25
AT22
AT19
AT16
AT13
AT10
AT7
AT4
AT3
AR25
AR22
AR19
AR16
AR13
AR10
AR7
AR4
AR2
AP34
AP31
AP28
AP25
AP22
AP19
AP16
AP13
AP10
AP7
AP4
AP1
AN30
AN27
AN25
AN22
AN19
AN16
AN13
AN10
AN7
AN4
AM29
AM25
AM22
AM19
AM16
AM13
AM10
AM7
AM4
AM3
AM2
AM1
AL34
AL31
AL28
AL25
AL22
AL19
AL16
AL13
AL10
AL7
AL4
AL2
AK33
AK30
AK27
AK25
AK22
AK19
AK16
AK13
AK10
AK7
AK4
AJ25
U0301H
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS
VSS
4
AJ22
VSS81
AJ19
VSS82
AJ16
VSS83
AJ13
VSS84
AJ10
VSS85
AJ7
VSS86
AJ4
VSS87
AJ3
VSS88
AJ2
VSS89
AJ1
VSS90
AH35
VSS91
AH34
VSS92
AH32
VSS93
AH30
VSS94
AH29
VSS95
AH28
VSS96
AH26
VSS97
AH25
VSS98
AH22
VSS99
AH19
VSS100
AH16
VSS101
AH7
VSS102
AH4
VSS103
AG9
VSS104
AG8
VSS105
AG4
VSS106
AF6
VSS107
AF5
VSS108
AF3
VSS109
AF2
VSS110
AE35
VSS111
AE34
VSS112
AE33
VSS113
AE32
VSS114
AE31
VSS115
AE30
VSS116
AE29
VSS117
AE28
VSS118
AE27
VSS119
AE26
VSS120
AE9
VSS121
AD7
VSS122
AC9
VSS123
AC8
VSS124
AC6
VSS125
AC5
VSS126
AC3
VSS127
AC2
VSS128
AB35
VSS129
AB34
VSS130
AB33
VSS131
AB32
VSS132
AB31
VSS133
AB30
VSS134
AB29
VSS135
AB28
VSS136
AB27
VSS137
AB26
VSS138
Y9
VSS139
Y8
VSS140
Y6
VSS141
Y5
VSS142
Y3
VSS143
Y2
VSS144
W35
VSS145
W34
VSS146
W33
VSS147
W32
VSS148
W31
VSS149
W30
VSS150
W29
VSS151
W28
VSS152
W27
VSS153
W26
VSS154
U9
VSS155
U8
VSS156
U6
VSS157
U5
VSS158
U3
VSS159
U2
VSS160
3
U0301I
U0301I
T35
VSS161
T34
VSS162
T33
VSS163
T32
VSS164
T31
VSS165
T30
VSS166
T29
VSS167
T28
VSS168
T27
VSS169
T26
VSS170
P9
VSS171
P8
VSS172
P6
VSS173
P5
VSS174
P3
VSS175
P2
VSS176
N35
VSS177
N34
VSS178
N33
VSS179
N32
VSS180
N31
VSS181
N30
VSS182
N29
VSS183
N28
VSS184
N27
VSS185
N26
VSS186
M34
VSS187
L33
VSS188
L30
VSS189
L27
VSS190
L9
VSS191
L8
VSS192
L6
VSS193
L5
VSS194
L4
VSS195
K35
K32
K29
K26
H33
H30
H27
H24
H21
H18
H15
H13
H10
G35
G32
G29
G26
G23
G20
G17
G11
F34
F31
F29
L3
VSS196
L2
VSS197
L1
VSS198
VSS199
VSS200
VSS201
VSS202
J34
VSS203
J31
VSS204
VSS205
VSS206
VSS207
VSS208
VSS209
VSS210
VSS211
VSS212
VSS213
H9
VSS214
H8
VSS215
H7
VSS216
H6
VSS217
H5
VSS218
H4
VSS219
H3
VSS220
H2
VSS221
H1
VSS222
VSS223
VSS224
VSS225
VSS226
VSS227
VSS228
VSS229
VSS230
VSS231
VSS232
VSS233
VSS
VSS
2
VSS234
VSS235
VSS236
VSS237
VSS238
VSS239
VSS240
VSS241
VSS242
VSS243
VSS244
VSS245
VSS246
VSS247
VSS248
VSS249
VSS250
VSS251
VSS252
VSS253
VSS254
VSS255
VSS256
VSS257
VSS258
VSS259
VSS260
VSS261
VSS262
VSS263
VSS264
VSS265
VSS266
VSS267
VSS268
VSS269
VSS270
VSS271
VSS272
VSS273
VSS274
VSS275
VSS276
VSS277
VSS278
VSS279
VSS280
VSS281
VSS282
VSS283
VSS284
VSS285
F22
F19
E30
E27
E24
E21
E18
E15
E13
E10
E9
E8
E7
E6
E5
E4
E3
E2
E1
D35
D32
D29
D26
D20
D17
C34
C31
C28
C27
C25
C23
C10
C1
B22
B19
B17
B15
B13
B11
B9
B8
B7
B5
B3
B2
A35
A32
A29
A26
A23
A20
A3
1
SOCKET9 89
SOCKET9 89
12V013A SM000
A A
12V013A SM000
5
4
3
SOCKET9 89
SOCKET9 89
12V013A SM000
12V013A SM000
Title :
Title :
Title :
Engineer:
Engineer:
Size Project Name
Size Project Name
Size Project Name
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
EIH31
EIH31
EIH31
Engineer:
JAY TSAI
JAY TSAI
JAY TSAI
8 99 Friday, December 17, 201 0
8 99 Friday, December 17, 201 0
1
8 99 Friday, December 17, 201 0
Rev
Rev
Rev
1.0
1.0
1.0
5
4
3
2
1
D D
C C
B B
CFG strapping information:
CFG[2]: PCIE Static Numbering Lane Reversal- CFG[2] is for the 16x
- 1: (Default) Normal Operation, Lane # definition matches sockect pin map definition
- 0: Lane Numbers Reversed 15 -> 0, 14 -> 1, ...
CFG[4]: Embedded DisplayPort Detection
- 1: (Default) Disabled ; No Physical Display Port attached to Embedded DisplayPort
- 0: Enabled ; An external Display Port device is connected to the Embedded Display Port
CFG[6:5]: PCI Express Port Bifurcation Straps
- 11 : (Default) x 1 6
- 10 : x 8 , x 8
- 01 : Reserved
- 00 : x 8 , x 4 , x 4
CFG[7]: PEG DEFER TRAINING
- 1: (Default) PEG Train immediately following xxRESETB de assertion
- 0: PEG Wait for BIOS training
CFG2 : Check H34 layout request
1%
CFG2
CFG4
CFG5
CFG6
CFG7
1%
1 2
R0902 1K Ohm
R0902 1K Ohm
1%
1%
1 2
R903 1KOhm
R903 1KOhm
@
@
1%
1%
1 2
R0904 1K Ohm
R0904 1K Ohm
@
@
1%
1%
1 2
R0905 1K Ohm@
R0905 1K Ohm@
1%
1%
1 2
R0906 1K Ohm@
R0906 1K Ohm@
Remove test point
DIMM0_VREF_DQ_R Pull Down 1k ohm
DIMM1_VREF_DQ_R Pull Down 1k ohm
Design Guide 0.9 Figure 43 (436735)
R1.2
T0919 TPC26T T 0919 TPC26T
1
T0918 TPC26T T 0918 TPC26T
1
T0917 TPC26T T 0917 TPC26T
1
T0915 TPC26T T 0915 TPC26T
1
T0911 TPC26T T 0911 TPC26T
1
T0910 TPC26T T 0910 TPC26T
1
T0909 TPC26T T 0909 TPC26T
1
T0908 TPC26T T 0908 TPC26T
1
T0907 TPC26T T 0907 TPC26T
1
T0906 TPC26T T 0906 TPC26T
1
T0905 TPC26T T 0905 TPC26T
1
T0904 TPC26T T 0904 TPC26T
1
T0903 TPC26T T 0903 TPC26T
1
T0902 TPC26T T 0902 TPC26T
1
T0901 TPC26T T 0901 TPC26T
VAXG_VAL_SENSE
VSSAXG_VAL_SENS E
VCC_VAL_SENSE
VSS_VAL_SENSE
R0909
R0909
1KOhm
1KOhm
1%
1%
DIMM1_VRE F_DQ_R
1 2
R0910
R0910
1KOhm
1KOhm
1%
1%
DIMM0_VRE F_DQ_R
1 2
For future platform use
1
H_VCCP_ SEL
CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
AK28
AK29
AL26
AL27
AK26
AL29
AL30
AM31
AM32
AM30
AM28
AM26
AN28
AN31
AN26
AM27
AK31
AN29
AJ31
AH31
AJ33
AH33
AJ26
G25
G24
F25
F24
F23
D24
E23
D23
C30
A31
B30
B29
D30
B31
A30
C29
J20
B18
A19
J15
U0301E
U0301E
L7
RSVD28
AG7
RSVD29
AE7
CFG[0]
CFG[1]
CFG[2]
CFG[3]
CFG[4]
CFG[5]
CFG[6]
CFG[7]
CFG[8]
CFG[9]
CFG[10]
CFG[11]
CFG[12]
CFG[13]
CFG[14]
CFG[15]
CFG[16]
CFG[17]
RSVD1
RSVD2
RSVD3
RSVD4
RSVD5
B4
RSVD6
D1
RSVD7
RSVD8
RSVD9
RSVD10
RSVD11
RSVD12
RSVD13
RSVD14
RSVD15
RSVD16
RSVD17
RSVD18
RSVD19
RSVD20
RSVD21
RSVD22
RSVD23
RSVD24
RSVD25
RSVD26
RSVD27
RESERVED
RESERVED
RSVD30
RSVD31
RSVD32
RSVD33
RSVD34
RSVD35
RSVD37
RSVD38
RSVD39
RSVD40
RSVD41
RSVD42
RSVD43
RSVD44
RSVD45
RSVD46
RSVD47
RSVD48
RSVD49
RSVD50
RSVD51
RSVD52
RSVD53
RSVD54
RSVD55
RSVD56
RSVD57
RSVD58
KEY
AK2
W8
AT26
AM33
AJ27
T8
J16
H16
G16
AR35
AT34
AT33
AP35
AR34
B34
A33
A34
B35
C35
AJ32
AK32
AH27
AN35
AM35
AT2
AT1
AR1
B1
VCC_DIE_SENSE
SOCKET9 89
SOCKET9 89
12V013A SM000
12V013A SM000
A A
Title :
Title :
5
4
Title :
Engineer:
Engineer:
Size Project Name
Size Project Name
Size Project Name
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
3
2
Date: Sheet of
EIH31
EIH31
EIH31
Engineer:
JAY TSAI
JAY TSAI
JAY TSAI
9 99 Friday, December 17, 201 0
9 99 Friday, December 17, 201 0
1
9 99 Friday, December 17, 201 0
Rev
Rev
Rev
1.0
1.0
1.0
5
D D
C C
4
3
2
1
B B
A A
Title :
Title :
Title :
NB(3)_****
NB(3)_****
NB(3)_****
JAY TSAI
JAY TSAI
JAY TSAI
10 99 Friday, December 17, 2010
10 99 Friday, December 17, 2010
1
10 99 Friday, December 17, 2010
Rev
Rev
Rev
1.3
1.3
1.3
5
4
3
Engineer:
Engineer:
Size Project Name
Size Project Name
Size Project Name
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
EIH31
EIH31
EIH31
Engineer:
5
D D
C C
4
3
2
1
B B
A A
Title :
Title :
5
4
3
Title :
Engineer:
Engineer:
Engineer:
Size Project Name
Size Project Name
Size Project Name
A
A
A
Date: Sheet of
Date: Sheet of
Date: Sheet of
2
EIH31
EIH31
EIH31
NB(8)_****
NB(8)_****
NB(8)_****
JAY TSAI
JAY TSAI
JAY TSAI
15 99 Friday, December 17, 2010
15 99 Friday, December 17, 2010
15 99 Friday, December 17, 2010
1
Rev
Rev
Rev
1.3
1.3
1.3
5
4
3
2
1
+1.5V
+1.5V_DDR3
+0.75VS
+V_VREF_DDR3
D D
M_A_A[15:0] 5
M_A_DIM0_CLK_DDR0
M_A_DIM0_CLK_DDR#0
M_A_DIM0_CLK_DDR1
C C
M_A_DIM0_CLK_DDR#1
1 2
1 2
C1621
C1621
10PF/50V
10PF/50V
@
@
C1626
C1626
10PF/50V
10PF/50V
@
@
1 2
R1603
R1603
150Ohm
150Ohm
1 2
R1604
R1604
150Ohm
150Ohm
1%
1%
@
@
1%
1%
@
@
PLACE CLOSE TO SODIMM
B B
M_A_DIM0_CLK_DDR1 5
M_A_DIM0_CLK_DDR#1 5
M_A_DIM0_CLK_DDR0 5
M_A_DIM0_CLK_DDR#0 5
M_A_DIM0_CS#1 5
M_A_DIM0_CS#0 5
M_A_DIM0_ODT1 5
M_A_DIM0_ODT0 5
M_A_WE# 5
M_A_RAS# 5
M_A_CAS# 5
M_A_BS2 5
M_A_BS1 5
M_A_BS0 5
M_A_DIM0_CKE1 5
SMBus Slave Address: A0H
M_A_DIM0_CKE0 5
Follow B53:take care if can't boot or S3 issue
M_A_DQS[7:0] 5
M_A_DQS#[7:0] 5
DM should connect to GND directly
Design Guide 0.9 p86 (436735)
SMB_CLK_S 17,28,53
SMB_DAT_S 17,28,53
SP1601 SP1601
SP1602 SP1602
1 2
1 2
SP1605 SP1605
SP1606 SP1606
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
1 2
1 2
M_A_DQS7
M_A_DQS#7
M_A_DQS6
M_A_DQS#6
M_A_DQS5
M_A_DQS#5
M_A_DQS4
M_A_DQS#4
M_A_DQS3
M_A_DQS#3
M_A_DQS2
M_A_DQS#2
M_A_DQS1
M_A_DQS#1
M_A_DQS0
M_A_DQS#0
M_A_DM7
M_A_DM6
M_A_DM5
M_A_DM4
M_A_DM3
M_A_DM2
M_A_DM1
M_A_DM0
SMB_CLK_S_CHA
SMB_DAT_S_CHA
J1601A
J1601A
98
A0
97
A1
96
A2
95
A3
92
A4
91
A5
90
A6
86
A7
89
A8
85
A9
107
A10/AP
84
A11
83
A12/BC#
119
A13
80
A14
78
A15
102
CK1
104
CK1#
101
CK0
103
CK0#
121
S1#
114
S0#
120
ODT1
116
ODT0
113
WE#
110
RAS#
115
CAS#
79
BA2
108
BA1
109
BA0
74
CKE1
73
CKE0
201
SA1
197
SA0
188
DQS7
186
DQS#7
171
DQS6
169
DQS#6
154
DQS5
152
DQS#5
137
DQS4
135
DQS#4
64
DQS3
62
DQS#3
47
DQS2
45
DQS#2
29
DQS1
27
DQS#1
12
DQS0
10
DQS#0
187
DM7
170
DM6
153
DM5
136
DM4
63
DM3
46
DM2
28
DM1
11
DM0
202
SCL
200
SDA
DDR3_DIMM_204P
DDR3_DIMM_204P
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
0
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
1
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
2
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
3
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
4
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
5
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
6
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
7
DQ62
DQ63
RESET#
M_A_DQ5
7
M_A_DQ3
15
M_A_DQ6
17
M_A_DQ4
4
M_A_DQ1
6
M_A_DQ2
16
M_A_DQ7
18
M_A_DQ13
21
M_A_DQ12
23
M_A_DQ10
33
M_A_DQ15
35
M_A_DQ8
22
M_A_DQ9
24
M_A_DQ11
34
M_A_DQ14
36
M_A_DQ21
39
M_A_DQ20
41
M_A_DQ16
51
M_A_DQ17
53
M_A_DQ19
40
M_A_DQ22
42
M_A_DQ23
50
M_A_DQ18
52
M_A_DQ28
57
M_A_DQ25
59
M_A_DQ29
67
M_A_DQ27
69
M_A_DQ24
56
M_A_DQ31
58
M_A_DQ26
68
M_A_DQ30
70
M_A_DQ33
129
M_A_DQ32
131
M_A_DQ39
141
M_A_DQ35
143
M_A_DQ38
130
M_A_DQ36
132
M_A_DQ34
140
M_A_DQ37
142
M_A_DQ43
147
M_A_DQ40
149
M_A_DQ42
157
M_A_DQ46
159
M_A_DQ44
146
M_A_DQ47
148
M_A_DQ45
158
M_A_DQ41
160
M_A_DQ52
163
M_A_DQ49
165
M_A_DQ51
175
M_A_DQ48
177
M_A_DQ53
164
M_A_DQ50
166
M_A_DQ55
174
M_A_DQ54
176
M_A_DQ62
181
M_A_DQ61
183
M_A_DQ59
191
M_A_DQ58
193
M_A_DQ56
180
M_A_DQ60
182
M_A_DQ57
192
M_A_DQ63
194
30
M_A_DQ0
5
H:4.0mm
M_A_DQ[63:0] 5
Layout Note: Place these caps near SO DIMM 0
DDR3_DRAMRST# 5,17
T1601T1601
Reserve
+V_VREF_DDR3
+V_VREF_DDR3
+1.5V_DDR3
1 2
C1605
C1605
0.1UF/10V
0.1UF/10V
PM_EXTTS#0_DIM_A
1
1 2
C1624
C1624
2.2UF/10V
2.2UF/10V
@
@
1 2
C1622
C1622
2.2UF/10V
2.2UF/10V
@
@
+1.5V
1 2
C1606
C1606
0.1UF/10V
0.1UF/10V
1 2
1 2
C1623
C1623
0.1UF/10V
0.1UF/10V
C1625
C1625
0.1UF/10V
0.1UF/10V
JP1601
JP1601
3MM_OPEN_5MIL
3MM_OPEN_5MIL
1
2
1
75
81
87
93
99
105
111
117
123
2
13
19
25
31
37
43
48
54
60
65
71
127
133
138
144
150
155
161
167
172
178
184
189
195
198
125
77
122
126
2
J1601B
J1601B
VDD1
VDD3
VDD5
VDD7
VDD9
VDD11
VDD13
VDD15
VDD17
VSS1
8
VSS3
VSS5
VSS7
VSS9
VSS11
VSS13
VSS15
VSS17
VSS19
VSS21
VSS23
VSS25
VSS27
VSS29
VSS31
VSS33
VSS35
VSS37
VSS39
VSS41
VSS43
VSS45
VSS47
VSS49
VSS51
EVENT#
TEST
NC1
NC2
VREFCA
1
VREFDQ
DDR3_DIMM_204P
DDR3_DIMM_204P
+1.5V_DDR3
+1.5V 5,7,57,83
+1.5V_DDR3 17,18
+0.75VS 17,57,83
+3VS
+3VS 4,17,20,21,22,23,24,25,26,27,28,30,32,36, 37,40,44,45,46,48,50,51,53,54,55,57,69,91,92
+V_VREF_DDR3 7,17,18,83
76
VDD2
82
VDD4
VDD6
VDD8
VDD10
VDD12
VDD14
VDD16
VDD18
VSS10
VSS12
VSS14
VSS16
VSS18
VSS20
VSS22
VSS24
VSS26
VSS28
VSS30
VSS32
VSS34
VSS36
VSS38
VSS40
VSS42
VSS44
VSS46
VSS48
VSS50
VSS52
GND1
GND2
NP_NC1
NP_NC2
VDDSPD
VSS2
VSS4
VSS6
VSS8
VTT1
VTT2
88
94
100
106
112
118
124
3
9
14
20
26
32
38
44
49
55
61
66
72
128
134
139
145
151
156
162
168
173
179
185
190
196
207
208
205
206
203
204
199
+1.5V_DDR3
1 2
@
@
+
+
CE1603
CE1603
220UF/4V
220UF/4V
1 2
+0.75VS
C1615
C1615
0.1UF/10V
0.1UF/10V
1 2
C1607
C1607
0.1UF/10V
0.1UF/10V
+3VS
1 2
+1.5V_DDR3
1 2
C1614
C1614
2.2UF/10V
2.2UF/10V
@
@
C1608
C1608
0.1UF/10V
0.1UF/10V
+1.5V_DDR3
Layout Note: Place these caps near SO DIMM 0
1 2
C1610
C1610
10UF/6.3V
10UF/6.3V
C1617
C1617
1UF/6.3V
1UF/6.3V
1 2
1 2
C1619
C1619
1UF/6.3V
1UF/6.3V
@
@
2
C1611
C1611
10UF/6.3V
10UF/6.3V
@
@
1 2
C1620
C1620
1UF/6.3V
1UF/6.3V
@
@
1 2
C1612
C1612
10UF/6.3V
10UF/6.3V
@
@
1 2
C1613
C1613
10UF/6.3V
10UF/6.3V
@
@
1 2
C1618
C1618
10UF/6.3V
10UF/6.3V
@
@
Engineer:
Engineer:
Size Project Name
Size Project Name
Size Project Name
C
C
C
Date: Sheet of
Date: Sheet of
Date: Sheet
EIH31
EIH31
EIH31
Engineer:
1
Title :
Title :
Title :
DDR3(1)_SO-DIMM0
DDR3(1)_SO-DIMM0
DDR3(1)_SO-DIMM0
JAY TSAI
JAY TSAI
JAY TSAI
Rev
Rev
Rev
1.0
1.0
1.0
16 99 Friday, December 17, 2010
16 99 Friday, December 17, 2010
16 99 Friday, December 17, 2010
of
1 2
C1609
C1609
10UF/6.3V
10UF/6.3V
+0.75VS
A A
1 2
C1616
C1616
1UF/6.3V
1UF/6.3V
1 2
5
4
3
5
D D
4
3
+1.5V
+1.5V_DDR3
+V_VREF_DDR3
+0.75VS
+1.5V 5,7, 16,57,83
+1.5V_DDR3 16,18
+0.75VS 16,57,83
+3VS
+3VS 4,16,20,21,22,23,24,25,26,27,28,30,32,36, 37,40,44,45,46,48,50,51,53,54,55,57,69,91,92
+V_VREF_DDR3 7,16,18,83
2
1
1 2
+0.75VS
1 2
C1707
C1707
0.1UF/10V
0.1UF/10V
C1715
C1715
0.1UF/10V
0.1UF/10V
+1.5V_DDR3
1 2
C1708
C1708
0.1UF/10V
0.1UF/10V
+3VS
1 2
C1714
C1714
2.2UF/10V
2.2UF/10V
@
@
M_B_A[15:0] 5
M_B_DIM0_CLK_DDR1 5
M_B_DIM0_CLK_DDR0
M_B_DIM0_CLK_DDR#0
C C
M_B_DIM0_CLK_DDR1
M_B_DIM0_CLK_DDR#1
1 2
@
C1720
C1720
10PF/50V
10PF/50V
@
@
C1721
C1721
10PF/50V
10PF/50V
@
@
@
150Ohm
150Ohm
R1707
R1707
1 2
@
@
150Ohm
150Ohm
R1708
R1708
1 2
1 2
PLACE CLOSE TO SODIMM
B B
SMB_CLK_S 16,28,53
SMB_DAT_S 16,28,53
M_B_DIM0_CLK_DDR#1 5
M_B_DIM0_CLK_DDR0 5
M_B_DIM0_CLK_DDR#0 5
M_B_DIM0_CS#1 5
M_B_DIM0_CS#0 5
M_B_DIM0_ODT1 5
M_B_DIM0_ODT0 5
M_B_WE# 5
M_B_RAS# 5
M_B_CAS# 5
M_B_BS2 5
M_B_BS1 5
M_B_BS0 5
M_B_DIM0_CKE1 5
M_B_DIM0_CKE0 5
R1709 10KOhm R1709 10KOhm
+3VS
take care if can't boot or S3 issue
M_B_DQS[7:0] 5
M_B_DQS#[7:0] 5
DM should connect to GND directly
Design Guide 0.9 p86 (436735)
SP1701 SP1701
SP1702 SP1702
SP1703 SP1703
1 2
1 2
1 2
M_B_DQS7
M_B_DQS#7
M_B_DQS6
M_B_DQS#6
M_B_DQS5
M_B_DQS#5
M_B_DQS4
M_B_DQS#4
M_B_DQS3
M_B_DQS#3
M_B_DQS2
M_B_DQS#2
M_B_DQS1
M_B_DQS#1
M_B_DQS0
M_B_DQS#0
M_B_DM7
M_B_DM6
M_B_DM5
M_B_DM4
M_B_DM3
M_B_DM2
M_B_DM1
M_B_DM0
SMB_CLK_S_CHB
SMB_DAT_S_CHB
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
1 2
J1701A
J1701A
98
A0
97
A1
96
A2
95
A3
92
A4
91
A5
90
A6
86
A7
89
A8
85
A9
107
A10/AP
84
A11
83
A12/BC#
119
A13
80
A14
78
A15
102
CK1
104
CK1#
101
CK0
103
CK0#
121
S1#
114
S0#
120
ODT1
116
ODT0
113
WE#
110
RAS#
115
CAS#
79
BA2
108
BA1
109
BA0
74
CKE1
73
CKE0
201
SA1
197
SA0
188
DQS7
186
DQS#7
171
DQS6
169
DQS#6
154
DQS5
152
DQS#5
137
DQS4
135
DQS#4
64
DQS3
62
DQS#3
47
DQS2
45
DQS#2
29
DQS1
27
DQS#1
12
DQS0
10
DQS#0
187
DM7
170
DM6
153
DM5
136
DM4
63
DM3
46
DM2
28
DM1
11
DM0
202
SCL
200
SDA
DDR3_DIMM_204P
DDR3_DIMM_204P
12V02GISM000
12V02GISM000
0
1
2
3
4
5
6
7
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
RESET#
5
DQ0
7
DQ1
15
DQ2
17
DQ3
4
DQ4
6
DQ5
16
DQ6
18
DQ7
21
DQ8
23
DQ9
33
35
22
24
34
36
39
41
51
53
40
42
50
52
57
59
67
69
56
58
68
70
129
131
141
143
130
132
140
142
147
149
157
159
146
148
158
160
163
165
175
177
164
166
174
176
181
183
191
193
180
182
192
194
30
M_B_DQ4
M_B_DQ5
M_B_DQ3
M_B_DQ6
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ7
M_B_DQ13
M_B_DQ12
M_B_DQ14
M_B_DQ15
M_B_DQ8
M_B_DQ9
M_B_DQ11
M_B_DQ10
M_B_DQ16
M_B_DQ17
M_B_DQ19
M_B_DQ22
M_B_DQ20
M_B_DQ21
M_B_DQ23
M_B_DQ18
M_B_DQ31
M_B_DQ27
M_B_DQ26
M_B_DQ30
M_B_DQ24
M_B_DQ28
M_B_DQ25
M_B_DQ29
M_B_DQ37
M_B_DQ36
M_B_DQ39
M_B_DQ38
M_B_DQ33
M_B_DQ32
M_B_DQ35
M_B_DQ34
M_B_DQ45
M_B_DQ40
M_B_DQ46
M_B_DQ47
M_B_DQ41
M_B_DQ44
M_B_DQ42
M_B_DQ43
M_B_DQ48
M_B_DQ53
M_B_DQ52
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ54
M_B_DQ55
M_B_DQ58
M_B_DQ60
M_B_DQ63
M_B_DQ61
M_B_DQ56
M_B_DQ57
M_B_DQ59
M_B_DQ62
DDR3_DRAMRST# 5,16
M_B_DQ[63:0] 5
Layout Note: Place these caps near SO DIMM 1
+1.5V_DDR3
Reserve SMBus Slave Address: A4H
1 2
C1705
C1705
0.1UF/10V
0.1UF/10V
T1701T1701
+V_VREF_DDR3
1 2
@
@
+V_VREF_DDR3
1 2
@
@
1 2
PM_EXTTS#0_DIM_B
1
C1724
C1724
2.2UF/10V
2.2UF/10V
C1722
C1722
2.2UF/10V
2.2UF/10V
C1706
C1706
0.1UF/10V
0.1UF/10V
1 2
1 2
C1723
C1723
0.1UF/10V
0.1UF/10V
C1725
C1725
0.1UF/10V
0.1UF/10V
+1.5V_DDR3
@
@
1 2
+
+
105
111
117
123
127
133
138
144
150
155
161
167
172
178
184
189
195
198
125
122
126
CE1703
CE1703
220UF/4V
220UF/4V
J1701B
J1701B
75
VDD1
81
VDD3
87
VDD5
93
VDD7
99
VDD9
VDD11
VDD13
VDD15
VDD17
2
VSS1
8
VSS3
13
VSS5
19
VSS7
25
VSS9
31
VSS11
37
VSS13
43
VSS15
48
VSS17
54
VSS19
60
VSS21
65
VSS23
71
VSS25
VSS27
VSS29
VSS31
VSS33
VSS35
VSS37
VSS39
VSS41
VSS43
VSS45
VSS47
VSS49
VSS51
EVENT#
TEST
77
NC1
NC2
VREFCA
1
VREFDQ
DDR3_DIMM_204P
DDR3_DIMM_204P
12V02GISM000
12V02GISM000
VDD2
VDD4
VDD6
VDD8
VDD10
VDD12
VDD14
VDD16
VDD18
VSS10
VSS12
VSS14
VSS16
VSS18
VSS20
VSS22
VSS24
VSS26
VSS28
VSS30
VSS32
VSS34
VSS36
VSS38
VSS40
VSS42
VSS44
VSS46
VSS48
VSS50
VSS52
GND1
GND2
NP_NC1
NP_NC2
VDDSPD
VSS2
VSS4
VSS6
VSS8
VTT1
VTT2
76
82
88
94
100
106
112
118
124
3
9
14
20
26
32
38
44
49
55
61
66
72
128
134
139
145
151
156
162
168
173
179
185
190
196
207
208
205
206
203
204
199
H:8.0mm
+1.5V_DDR3
Layout Note: Place these caps near SO DIMM 1
1 2
1 2
C1709
C1709
10UF/6.3V
10UF/6.3V
1 2
C1710
C1710
10UF/6.3V
10UF/6.3V
1 2
C1711
C1711
10UF/6.3V
10UF/6.3V
@
@
1 2
C1712
C1712
10UF/6.3V
10UF/6.3V
@
@
C1713
C1713
10UF/6.3V
10UF/6.3V
@
@
1 2
C1718
C1718
10UF/6.3V
10UF/6.3V
@
@
+0.75VS
1 2
1 2
C1716
C1716
C1717
C1717
1UF/6.3V
1UF/6.3V
1UF/6.3V
A A
1UF/6.3V
5
4
3
2
1 2
1 2
C1631
C1631
C1630
C1630
1UF/6.3V
1UF/6.3V
1UF/6.3V
1UF/6.3V
@
@
@
@
Title :
Title :
Title :
DDR3(2)_SO-DIMM1
DDR3(2)_SO-DIMM1
DDR3(2)_SO-DIMM1
JAY TSAI
JAY TSAI
Engineer:
Engineer:
Size Project Name
Size Project Name
Size Project Name
C
C
C
Date: Sheet of
Date: Sheet of
Date: Sheet of
EIH31
EIH31
EIH31
Engineer:
1
JAY TSAI
17 99 Friday, December 17, 2010
17 99 Friday, December 17, 2010
17 99 Friday, December 17, 2010
Rev
Rev
Rev
1.0
1.0
1.0
5
4
3
2
1
+1.5V_DDR3
D D
+V_VREF
+V_VREF_DDR3
+V_SM_VREF
DDR3 Vref
Default
M1
R1.1
+3V
+5VSUS
+5VA
+1.5V_DDR3 16,17
+V_VREF
+V_VREF_DDR3 7 ,16,17,83
+V_SM_VREF
+3V 4,24,52,53,55,57,69 ,91
+5VSUS 22,27,55,81,82,83,84,87,91
+5VA 81,88
Power remove M_REF function.
C C
M2: Programmable SO-DIMM VREFDQ on
motherboard– New Requirement
B B
M1: Fixed SO-DIMM VREF_DQ
R1.1
+1.5V_DDR3 +V_VREF_DDR3
R1807
R1807
1KOhm
1KOhm
1 2
C1801
C1801
0.1UF/10V
0.1UF/10V
1 2
R1808
R1808
1KOhm
1KOhm
1 2
M_VREF 7,16,17,83
ER1.18
M2
A A
Title :
Title :
Title :
DDR3(3)_CA/DQ Voltage
DDR3(3)_CA/DQ Voltage
DDR3(3)_CA/DQ Voltage
JAY TSAI
JAY TSAI
Engineer:
Engineer:
Size Project Na me
Size Project Na me
Size Project Na me
B
B
B
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
EIH31
EIH31
EIH31
Engineer:
JAY TSAI
1
Rev
Rev
Rev
1.0
1.0
18 99 Friday, December 17, 2010
18 99 Friday, December 17, 2010
18 99 Friday, December 17, 2010
1.0
5
D D
C C
4
3
2
1
B B
A A
R1.4--2
Title :
Title :
Title :
VID Controller
VID Controller
VID Controller
JAY TSAI
JAY TSAI
JAY TSAI
19 99 F riday, December 17, 2010
19 99 F riday, December 17, 2010
19 99 F riday, December 17, 2010
Rev
Rev
Rev
1.3
1.3
1.3
5
4
3
Engineer:
Engineer:
Size Project Name
Size Project Name
Size Project Name
C
C
C
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
EIH31
EIH31
EIH31
Engineer:
1
5
4
3
2
1
RTC battery
+RTCBAT
J2001
J2001
3
SIDE1
1
1
2
2
4
SIDE2
WTOB_CON_2P
WTOB_CON_2P
12V17GISM035
12V17GISM035
D D
+VCC_RTC
RTCRST# RC delay
should be 18ms~25ms
1 2
R2003 20KOhm R2003 20KOhm
1 2
R2004 20KOhm R2004 20KOhm
R2005
R2005
1MOhm
1MOhm
1 2
C C
TPM Settings
Clear ME RTC
Registers
Keep ME RTC
Registers
B B
Remove xDP component
R2001 1KOhm R2001 1KOhm
ER1.9
GND
1
JRST2001
JRST2001
1
1 2
C2004
C2004
2
SGL_JUMP
SGL_JUMP
1UF/10V
1UF/10V
2
@
@
GND
GND
1
JRST2002
JRST2002
1
1 2
C2005
C2005
2
SGL_JUMP
SGL_JUMP
1UF/10V
1UF/10V
@
@
2
GND
GND
JRST2002
Shunt
Open
(Default)
+3VA
D2001
D2001
1
1 2
+RTC_BAT
3
2
1V/0.2A
1V/0.2A
Connector Type 1217-001L000
Request by CSC
for CMOS clear
function
CMOS Settings
Clear CMOS
Keep CMOS
INTVRMEN: Integrated SUS 1.05V VRM Enables
Low: Enable External VRs
High:Enable Internal VRs
PCH_INTVRMEN
+VCC_RTC
1 2
C2003
C2003
1UF/10V
1UF/10V
GND
JRST2001
Shunt
Open
(Default)
@
R2030 200KOhm
@R2030 200KOhm
1 2
1%
1%
R1.3
Remove 3 Test point
GND
PCH_FLASH_DESCRIPTOR 30
R1.2 Pull Down at CardReader
ACZ_SDIN0_AUD 36
ACZ_SDOUT_AUD 36
GND
GND
GND
+VCC_RTC
ACZ_BCLK_AUD 36
ACZ_SYNC_AUD 36
ACZ_RST#_AUD 36,37
T2024T2024
T2025T2025
T2026T2026
T2027T2027
C2001
C2001
RTC_X1_C
1 2
15PF/50V
15PF/50V
1 2
C2002 15PF/50V C2002 15PF/50V
SB_SPKR 36
1
1
1
1
SPI_CLK 28
SPI_CS#0 28
SPI_SI 28
SPI_SO 28
R1.3
SP2005
SP2005
1 2
R0402
R0402
1 4
X2001
X2001
2
32.768KHZ
32.768KHZ
3
R2006 200KOhm 1% R2006 200KOhm 1%
1 2
SP2006 R0402 SP2006 R 0402
1 2
SP2007 R0402 SP2007 R 0402
1 2
SP2008 R0402 SP2008 R 0402
1 2
R2050 0Ohm
R2050 0Ohm
1 2
@
@
SP2009 R0402 SP2009 R 0402
1 2
R2050 near SP2009
Remove CARDREADER_RESET#
No Support 64Mb BIOS ROM
+VCC_RTC
+RTCBAT
+3VSUS_ORG
+1.05VM_ORG
+VTT_PCH_VCCIO
1 2
R2002
R2002
10MOhm
10MOhm
RTC_X1
RTC_X2
RTC_RST#
SRTC_RST#
SM_INTRUDER#
PCH_INTVRMEN
R1.3
ACZ_BCLK
ACZ_SYNC
ACZ_RST#
Remove TP
ACZ_SDOUT
T2013T2013
1
PCH_JTAG_TCK_BUF
PCH_JTAG_TMS
PCH_JTAG_TDI
PCH_JTAG_TDO
T2028T2028
0200-00HU000 C.S 907552 A1 QMVY BGA942 INTEL/COUGAR POINT PCH
A20
C20
D20
G22
K22
C17
N34
T10
K34
E34
G34
C34
A34
A36
C36
N32
Y14
1
U2001A
U2001A
RTCX1
RTCX2
RTCRST#
SRTCRST#
INTRUDER#
INTVRMEN
HDA_BCLK
L34
HDA_SYNC
SPKR
HDA_RST#
HDA_SDIN0
HDA_SDIN1
HDA_SDIN2
HDA_SDIN3
HDA_SDO
HDA_DOCK_EN#/GPIO33
HDA_DOCK_RST#/GPIO13
J3
JTAG_TCK
H7
JTAG_TMS
K5
JTAG_TDI
H1
JTAG_TDO
T3
SPI_CLK
SPI_CS0#
T1
SPI_CS1#
V4
SPI_MOSI
U3
SPI_MISO
COUGAR_POINT_ES1
COUGAR_POINT_ES1
+VCC_RTC 22,27
+RTCBAT
+3VA
+3VA 27,30,54,57,60,81,93
+3VS
+3VS 4,16,17,21,22,23,24,25,26,27,28,30,32,36, 37,40,44,45,46,48,50,51,53,54,55,57,69,91,92
+3VSUS_ORG 21,22,24,25,27
+1.05VM_ORG 27
+VTT_PCH_VCCIO 26,27
C38
FWH0/LAD0
A38
FWH1/LAD1
B37
FWH2/LAD2
C37
FWH3/LAD3
LPC
LPC
FWH4/LFRAME#
LDRQ1#/GPIO23
RTC IHDA
RTC IHDA
SATA 6G
SATA 6G
SATA
SATA
JTAG
JTAG
SATA3RCOMPO
SPI
SPI
SATA0GP/GPIO21
SATA1GP/GPIO19
LDRQ0#
SERIRQ
SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP
SATA1RXN
SATA1RXP
SATA1TXN
SATA1TXP
SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP
SATA3RXN
SATA3RXP
SATA3TXN
SATA3TXP
SATA4RXN
SATA4RXP
SATA4TXN
SATA4TXP
SATA5RXN
SATA5RXP
SATA5TXN
SATA5TXP
SATAICOMPO
SATAICOMPI
SATA3COMPI
SATA3RBIAS
SATALED#
D36
E36
K36
V5
AM3
AM1
AP7
AP5
AM10
AM8
AP11
AP10
AD7
AD5
AH5
AH4
AB8
AB10
AF3
AF1
Y7
Y5
AD3
AD1
Y3
Y1
AB3
AB1
Y11
Y10
AB12
AB13
AH1
P3
V14
P1
SNN_PCH_DRQ#0
SNN_LPC_DRQ#1
SATA_RXN1
SATA_RXP1
SATA_TXN1
SATA_TXP1
RBIAS_SATA3
SATA_COMP
SATA3_COMP
LPC_AD0 30,44
LPC_AD1 30,44
LPC_AD2 30,44
LPC_AD3 30,44
LPC_FRAME# 30,44
T2005T2005
1
T2006T2006
1
INT_SERIRQ 30, 44
SATA_RXN0 51
SATA_RXP0 51
SATA_TXN0 51
SATA_TXP0 51
T2003T2003
1
T2004T2004
1
T2007T2007
1
T2008T2008
1
SATA_RXN2 51
SATA_RXP2 51
SATA_TXN2 51
SATA_TXP2 51
R2007 37.4Ohm1%R2007 37.4Ohm1%
1 2
R2047 49.9Ohm1%R2047 49.9Ohm1%
1 2
R2048 750Ohm1%R2048 750Ohm1%
1 2
1 2
R2025 10KOhm R2025 10KOhm
SATA0GP
Remove SATA_DET#0_R, BBS_BIT0_R for xDP Connector
+VTT_PCH_VCCIO
+VTT_PCH_VCCIO
GND
+3VS
SATA_LED# 54
BBS_BIT0 24
HDD1
ODD
Strap information:
SB_SPKR: No reboot strap
Low: Disable (Default)
High:Enable
ACZ_SDOUT:
1.Flash descriptor security:
Sampled Low: in effect.
Sampled High: override
2.ACZ_SDOUTwhich sample high on the rising edge of PWROK
A A
Will also disable Intel ME.
ACZ_SYNC: On Die PLL VR voltage selector
Low: 1.8V (Default)
High: 1.5V
note : CRB has no strap
Hrron River Platform Schematic Design Checklist
(438390 page 48)
SB_SPKR
ACZ_SDOUT
ACZ_SYNC
R2020 1KOhm@R2020 1KOhm@
1 2
R2034 1KOhm@R2034 1KOhm@
1 2
R2036 1KOhm R2036 1KOhm
1 2
VCCVRAM use +1.5VS in mobile
+3VS
+3VSUS_ORG
+3VSUS_ORG
Pull High
INT_SERIRQ
SATA0GP
1 2
R2026 10KOhm R2026 10KOhm
1 2
R2027 10KOhm R2027 10KOhm
5
4
3
2
+3VS
Title :
Title :
Title :
PCH(1)_SATA,IHDA,RTC,LPC
PCH(1)_SATA,IHDA,RTC,LPC
PCH(1)_SATA,IHDA,RTC,LPC
JAY TSAI
JAY TSAI
Engineer:
Engineer:
Size Project Name
Size Project Name
Size Project Name
C
C
C
Date: Sheet of
Date: Sheet of
Date: Sheet
EIH31
EIH31
EIH31
Engineer:
1
JAY TSAI
20 99 Friday, December 17, 2010
20 99 Friday, December 17, 2010
20 99 Friday, December 17, 2010
Rev
Rev
Rev
1.3
1.3
1.3
of
3 4
10KOhm
10KOhm
1 2
10KOhm
10KOhm
1 2
10KOhm
10KOhm
3 4
10KOhm
10KOhm
1 2
10KOhm
10KOhm
3 4
10KOhm
10KOhm
3 4
10KOhm
10KOhm
1 2
10KOhm
10KOhm
1 2
1 2
1 2
2.2KOhm
2.2KOhm
3 4
2.2KOhm
2.2KOhm
1 2
1 2
2.2KOhm
2.2KOhm
3 4
2.2KOhm
2.2KOhm
1 2
2.2KOhm
2.2KOhm
3 4
2.2KOhm
2.2KOhm
1 2
1 2
1 2
1 2
1 2
10KOhm
10KOhm
3 4
10KOhm
10KOhm
3 4
10KOhm
10KOhm
1 2
10KOhm
10KOhm
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1
RN2108B
RN2108B
RN2108A
RN2108A
RN2109A
RN2109A
RN2109B
RN2109B
RN2110A
RN2110A
RN2110B
RN2110B
RN2111B
RN2111B
RN2111A
RN2111A
RN2103A
RN2103A
RN2103B
RN2103B
RN2104A
RN2104A
RN2104B
RN2104B
RN2105A
RN2105A
RN2105B
RN2105B
RN2106A
RN2106A
RN2106B
RN2106B
RN2107B
RN2107B
RN2107A
RN2107A
GND
+3VSUS_ORG
+3VS
GND
+3VSUS_ORG
+3VS
+3VSUS_ORG
R1.1
GND
5
PCIE_RXN1_CR 40
PCIE_RXP1_CR 40
D D
PCIE_TXN1_CR 40
PCIE_TXP1_CR 40
PCIE_RXN2_WLAN 53
PCIE_RXP2_WLAN 53
PCIE_TXN2_WLAN 53
PCIE_TXP2_WLAN 53
PCIE_RXN4_USB30 69
PCIE_RXP4_USB30 69
PCIE_TXN4_USB30 69
PCIE_TXP4_USB30 69
PCIE_RXN6_GLAN 69
PCIE_RXP6_GLAN 69
PCIE_TXN6_GLAN 69
PCIE_TXP6_GLAN 69
C C
CLK_PCIE_CR#_PCH 40
CLK_PCIE_CR_PCH 40
CLK_REQ1_CR# 40
CLK_PCIE_WLAN#_PCH 53
CLK_PCIE_WLAN_PCH 53
CLK_REQ2_WLAN# 53
CLK_PCIE_USB#_PCH 69
CLK_PCIE_USB_PCH 69
CLK_REQ4_USB30# 69
R1.1
B B
CLK_PCIE_LAN# 69
CLK_PCIE_LAN 69
CLK_REQ6_LAN# 69
A A
C2105 0.1UF/16V C2105 0.1UF/16V
1 2
C2106 0.1UF/16V C2106 0.1UF/16V
1 2
C2103 0.1UF/16V C2103 0.1UF/16V
1 2
C2104 0.1UF/16V C2104 0.1UF/16V
1 2
C2111 0.1UF/16V / U30C2111 0.1UF/16V /U30
1 2
C2110 0.1UF/16V / U30C2110 0.1UF/16V /U30
1 2
C2107 0.1UF/16V C2107 0.1UF/16V
1 2
C2108 0.1UF/16V C2108 0.1UF/16V
1 2
T2135T2135
1
T2136T2136
1
T2137T2137
1
T2138T2138
1
T2141T2141
1
T2142T2142
1
T2143T2143
1
SP2104 R0402 SP2104 R 0402
1 2
SP2105 R0402 SP2105 R 0402
1 2
SP2106 R0402 SP2106 R 0402
1 2
SP2101 R0402 SP2101 R 0402
1 2
SP2102 R0402 SP2102 R 0402
1 2
SP2103 R0402 SP2103 R 0402
1 2
T2144T2144
1
T2145T2145
1
T2146T2146
1
SP2110 R0402 SP2110 R 0402
1 2
SP2112 R0402 SP2112 R 0402
1 2
CLK_REQ4_USB30#
T2147T2147
1
T2148T2148
1
T2112T2112
1
SP2107 R0402 SP2107 R 0402
1 2
SP2108 R0402 SP2108 R 0402
1 2
SP2109 R0402 SP2109 R 0402
1 2
PCIE_TXN1_CR_C
PCIE_TXP1_CR_C
PCIE_TXN2_WLAN_C
PCIE_TXP2_WLAN_C
PCIE_TXN4_USB30_C
PCIE_TXP4_USB30_C
PCIE_TXN6_GLAN_C
PCIE_TXP6_GLAN_C
PCIE_RXN8
PCIE_RXP8
PCIE_TXN8
PCIE_TXP8
SNN_CLK_PCH_SRC0_N
SNN_CLK_PCH_SRC0_P
CLK_REQ0#
CLK_PCH_SRC1_N
CLK_PCH_SRC1_P
CLK_REQ1#
CLK_PCH_SRC2_N
CLK_PCH_SRC2_P
CLK_REQ2#
CLK_PCH_SRC3_N
CLK_PCH_SRC3_P
CLK_REQ3#
CLK_PCH_SRC4_N
CLK_PCH_SRC4_P
SP2113 R0402 SP2113 R 0402
1 2
CLK_REQ5#
SNN_CLK_PCH_PEG_B_N
SNN_CLK_PCH_PEG_B_P
CLK_REQ_PEG_B#
CLK_PCH_SRC6_N
CLK_PCH_SRC6_P
CLK_REQ6#
CLK_REQ7#
BG34
BJ34
AV32
AU32
BE34
BF34
BB32
AY32
BG36
BJ36
AV34
AU34
BF36
BE36
AY34
BB34
BG37
BH37
AY36
BB36
BJ38
BG38
AU36
AV36
BG40
BJ40
AY40
BB40
BE38
BC38
AW38
AY38
Y40
Y39
J2
AB49
AB47
M1
AA48
AA47
V10
Y37
Y36
A8
Y43
Y45
CLK_REQ4#
L12
V45
V46
L14
AB42
AB40
E6
V40
V42
T13
V38
V37
K12
AK14
AK13
no xDP Remove test point
4
U2001B
U2001B
PERn1
PERp1
PETn1
PETp1
PERn2
PERp2
PETn2
PETp2
PERn3
PERp3
PETn3
PETp3
PERn4
PERp4
PETn4
PETp4
PERn5
PERp5
PETn5
PETp5
PERn6
PERp6
PETn6
PETp6
PERn7
PERp7
PETn7
PETp7
PERn8
PERp8
PETn8
PETp8
CLKOUT_PCIE0N
CLKOUT_PCIE0P
PCIECLKRQ0#/GPIO73
CLKOUT_PCIE1N
CLKOUT_PCIE1P
PCIECLKRQ1#/GPIO18
CLKOUT_PCIE2N
CLKOUT_PCIE2P
PCIECLKRQ2#/GPIO20
CLKOUT_PCIE3N
CLKOUT_PCIE3P
PCIECLKRQ3#/GPIO25
CLKOUT_PCIE4N
CLKOUT_PCIE4P
PCIECLKRQ4#/GPIO26
CLKOUT_PCIE5N
CLKOUT_PCIE5P
PCIECLKRQ5#/GPIO44
CLKOUT_PEG_B_N
CLKOUT_PEG_B_P
PEG_B_CLKRQ#/GPIO56
CLKOUT_PCIE6N
CLKOUT_PCIE6P
PCIECLKRQ6#/GPIO45
CLKOUT_PCIE7N
CLKOUT_PCIE7P
PCIECLKRQ7#/GPIO46
CLKOUT_ITPXDP_N
CLKOUT_ITPXDP_P
COUGAR_POINT_ES1
COUGAR_POINT_ES1
PCI-E*
PCI-E*
CLOCKS
CLOCKS
SMBALERT#/GPIO11
SML0ALERT#/GPIO60
SMBUS Controller
SMBUS Controller
SML1ALERT#/PCHHOT#/GPIO74
SML1CLK/GPIO58
SML1DATA/GPIO75
Link
Link
PEG_A_CLKRQ#/GPIO47
CLKOUT_PEG_A_N
CLKOUT_PEG_A_P
CLKOUT_DMI_N
CLKOUT_DMI_P
CLKOUT_DP_N
CLKOUT_DP_P
CLKIN_DMI_N
CLKIN_DMI_P
CLKIN_GND1_N
CLKIN_GND1_P
CLKIN_DOT_96N
CLKIN_DOT_96P
CLKIN_SATA_N
CLKIN_SATA_P
REFCLK14IN
CLKIN_PCILOOPBACK
XTAL25_OUT
XCLK_RCOMP
CLKOUTFLEX0/GPIO64
CLKOUTFLEX1/GPIO65
CLKOUTFLEX2/GPIO66
CLKOUTFLEX3/GPIO67
FLEX CLOCKS
FLEX CLOCKS
SMBCLK
SMBDATA
SML0CLK
SML0DATA
CL_CLK1
CL_DATA1
CL_RST1#
XTAL25_IN
EXT_SCI#
E12
SCL_3A
H14
SDA_3A
C9
DRAMRST_CNTRL_PCH_R
A12
SML0_CLK
C8
SML0_DAT
G12
SML1ALERT#
C13
SML1_CLK
E14
SML1_DAT
M16
M7
T11
P10
CLK_REQ_PEG_A#
M10
CLK_PCIE_PEG#_PCH_L
AB37
CLK_PCIE_PEG_PCH_L
AB38
AV22
AU22
AM12
AM13
BF18
BE18
BJ30
BG30
G24
E24
AK7
AK5
K45
H45
XTAL25_IN
V47
XTAL25_OUT
V49
XCLK_COMP
Y47
DGPU_EDID_SELECT#
K43
CLK_OUT1
F47
H47
DGPU_PRSNT#
K49
3
+VTT_PCH_ORG
+3VSUS_ORG
EXT_SCI# 30
SCL_3A 28
SDA_3A 28
R2101 0Ohm R2101 0Ohm
T2122T2122
1
T2123T2123
1
T2124T2124
1
SP2114 R0402 SP2114 R 0402
SP2115 R0402 SP2115 R 0402
SP2116 R0402 SP2116 R 0402
1 2
T2119T2119
1
T2120T2120
1
T2121T2121
1
1 2
1 2
1 2
CLK_BUF_EXP_N
CLK_BUF_EXP_P
CLK_BUF_CPYCLK_N
CLK_BUF_CPYCLK_P
CLK_BUF_DOT96_N
CLK_BUF_DOT96_P
CLK_BUF_CKSSCD_N
CLK_BUF_CKSSCD_P
CLK_BUF_REF14
R2106 90.9Ohm R2106 90.9Ohm
1 2
T2140T2140
1
T2139T2139
1
DRAMRST_CNTRL_PCH 5
SML1_CLK 28
SML1_DAT 28
CLKREQ_PEG# 70
CLK_PCIE_PEG#_PCH 70
CLK_PCIE_PEG_PCH 70
CLK_EXP_N 4
CLK_EXP_P 4
CLK_DP_N 4
CLK_DP_P 4
R1.2
CLK_PCI_FB 24
+VCCDIFFCLKN
Remove CLK_USB48_CR, because CR is PCIE interface.
To EC
R1.3
2
+3VS
+3VS 4,16,17,20,22,23,24,25,26,27,28,30,32,36, 37,40,44,45,46,48,50,51,53,54,55,57,69,91,92
+VTT_PCH_ORG 22,26,27
+3VSUS_ORG 20,22,24,25,27
25-MHz is required in:
1. FCIM
2. BTM for PCH Display Clock gereration
in Integrated Graphics platforms
C2101
C2101
1 2
10PF/50V
XTAL25_OUT_C
check clk peg option
check clk free run
10PF/50V
4
2
X2103
X2103
25MHZ
25MHZ
1 3
C2102
C2102
1 2
10PF/50V
10PF/50V
R2142 1MOhm R2142 1MOhm
1 2
1 2
R0402
R0402
SP2111
SP2111
EIH
CLK_BUF_CPYCLK_N
CLK_BUF_CPYCLK_P
CLK_BUF_EXP_N
CLK_BUF_EXP_P
CLK_BUF_DOT96_P
CLK_BUF_DOT96_N
CLK_BUF_CKSSCD_N
CLK_BUF_CKSSCD_P
CLK_BUF_REF14
R1.3
EXT_SCI#
SCL_3A
SDA_3A
DRAMRST_CNTRL_PCH
SML0_CLK
SML0_DAT
SML1_CLK
SML1_DAT
SML1ALERT#
No need DGPU_EDID_SELECT#
DGPU_PRSNT#
DGPU_PRSNT#
PCH CLKREQ Setting:
Not connected to device.
GND
GND
GND
CLK_REQ0#
CLK_REQ3#
CLK_REQ5#
CLK_REQ7#
CLK_REQ_PEG_B#
Connected to device.
Default : Clock free run. (PD 10K).
Reserver 10K PU for power saving purpose.
CLK_REQ2_WLAN#
CLK_REQ1_CR#
CLK_REQ6_LAN#
CLK_REQ4_USB30#
CLKREQ_PEG#
CLKREQ_PEG#
CLK_REQ4_USB30#
CLK_REQ6_LAN#
CLK_REQ2_WLAN#
CLK_REQ1_CR#
Remove New Card, change to Card Reader at Port 1.
R2116 10KOhm R2116 10KOhm
CLOCK TERMINATION for FCIM
Default power-on mode is ICC.
R2117 10KOhm R2117 10KOhm
R2120 1KOhm R2120 1KOhm
R2125 10KOhm R2125 10KOhm
R2126 10KOhm@R2126 10KOhm@
R2134 10KOhm R2134 10KOhm
R2143 10KOhm R2143 10KOhm
R2133 10KOhm@R2133 10KOhm@
R2135 10KOhm R2135 10KOhm
R2136 10KOhm R2136 10KOhm
R2149 10KOhm@R2149 10KOhm@
R2140 10KOhm R2140 10KOhm
R2141 10KOhm@R2141 10KOhm@
R2150 10KOhm R2150 10KOhm
R2137 10KOhm@R2137 10KOhm@
R2138 10KOhm R2138 10KOhm
R2139 10KOhm@R2139 10KOhm@
5
4
3
Title :
Title :
Title :
PCH(2)_PCIE,CLK,SMB,PEG
PCH(2)_PCIE,CLK,SMB,PEG
PCH(2)_PCIE,CLK,SMB,PEG
JAY TSAI
JAY TSAI
Engineer:
Engineer:
Size Project Name
Size Project Name
Size Project Name
C
C
C
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
EIH31
EIH31
EIH31
Engineer:
1
JAY TSAI
21 99 Friday, December 17, 2010
21 99 Friday, December 17, 2010
21 99 Friday, December 17, 2010
Rev
Rev
Rev
1.3
1.3
1.3
3
FDI_RXN0
FDI_RXN1
FDI_RXN2
FDI_RXN3
FDI_RXN4
FDI_RXN5
FDI_RXN6
FDI_RXN7
FDI_RXP0
FDI_RXP1
FDI_RXP2
FDI_RXP3
FDI_RXP4
FDI_RXP5
FDI_RXP6
FDI
FDI
FDI_RXP7
FDI_INT
FDI_FSYNC0
FDI_FSYNC1
FDI_LSYNC0
FDI_LSYNC1
DSWVRMEN
DPWROK
WAKE#
CLKRUN#/GPIO32
SUS_STAT#/GPIO61
SUSCLK/GPIO62
SLP_S5#/GPIO63
SLP_S4#
SLP_S3#
SLP_A#
SLP_SUS#
PMSYNCH
SLP_LAN#/GPIO29
BJ14
AY14
BE14
BH13
BC12
BJ12
BG10
BG9
BG14
BB14
BF14
BG13
BE12
BG12
BJ10
BH9
AW16
AV12
BC10
AV14
BB10
A18
E22
B9
N3
G8
N14
D10
H4
F4
G10
G16
AP14
K14
FDI_INT_R
FDI_FSYNC0_R
FDI_FSYNC1_R
FDI_LSYNC0_R
FDI_LSYNC1_R
DSWODVREN
PM_SUS_STAT#
SUSCLK_C
SLP_S4#_R
SLP_S3#_R
SLP_A#_R
SLP_DSW#_R
SLP_LAN#_R
SP2201 R0402 SP2201 R 0402
1 2
SP2202 R0402 SP2202 R 0402
1 2
SP2203 R0402 SP2203 R 0402
1 2
SP2204 R0402 SP2204 R 0402
1 2
SP2205 R0402 SP2205 R 0402
1 2
R2215 200KOhm1% @R2215 200KOhm1% @
1 2
R2214 200KOhm1%R2214 200KOhm1%
1 2
SP2220 R0402 SP2220 R 0402
1 2
SP2215 R0402 SP2215 R 0402
1 2
SP2206 R0402 SP2206 R 0402
1 2
SP2207 R0402 SP2207 R 0402
1 2
SP2208 R0402 SP2208 R 0402
1 2
SP2221 R0402 SP2221 R 0402
1 2
SP2222 R0402 SP2222 R 0402
1 2
GND
PM_RSMRST_R
PCH_DPROK
1 2
1 2
1 2
1 2
Remove 0 ohm
Remove short pin
1 2
1 2
1 2
@
@
1 2
1 2
1 2
1 2
4
DMI_COMP_R
RBIAS_CPY
PM_SYSRST#_R
PM_PCH_PWROK_R
PM_APWROK_R
PM_APWROK_R
PM_RSMRST_R
SUS_PWR_ACK_R
AC_PRESENT_R
BATLOW#
RI#
U2001C
U2001C
BC24
DMI0RXN
BE20
DMI1RXN
BG18
DMI2RXN
BG20
DMI3RXN
BE24
DMI0RXP
BC20
DMI1RXP
BJ18
DMI2RXP
BJ20
DMI3RXP
AW24
DMI0TXN
AW20
DMI1TXN
BB18
DMI2TXN
AV18
DMI3TXN
AY24
DMI0TXP
AY20
DMI1TXP
AY18
DMI2TXP
AU18
DMI3TXP
BJ24
DMI_ZCOMP
BG25
DMI_IRCOMP
BH21
DMI2RBIAS
C12
SUSACK#
K3
SYS_RESET#
P12
SYS_PWROK
L22
PWROK
L10
APWROK
B13
DRAMPWROK
C21
RSMRST#
K16
SUSWARN#/SUSPWRDNACK/GPIO30
E20
PWRBTN#
H20
ACPRESENT/GPIO31
E10
BATLOW#/GPIO72
A10
RI#
COUGAR_POINT_ES1
COUGAR_POINT_ES1
DMI
DMI
System Power Management
System Power Management
5
DMI_RXN0 3
DMI_RXN1 3
DMI_RXN2 3
DMI_RXN3 3
DMI_RXP0 3
DMI_RXP1 3
DMI_RXP2 3
DMI_RXP3 3
D D
Remove EC SUSACK# pin, because we need KSO16 function.
C C
PM_RSMRST# has pull down 10k ohm in EC
DMI_TXN0 3
DMI_TXN1 3
DMI_TXN2 3
DMI_TXN3 3
DMI_TXP0 3
DMI_TXP1 3
DMI_TXP2 3
DMI_TXP3 3
+VTT_PCH_ORG
GND
SUS_PWR_ACK_R SUSACK#_R
+3VS
PM_PWROK 30
ME_PWROK 30
PM_DRAM_PWRGD 4
PM_RSMRST# 30
ME_SUSPWRDNACK 30
Remove port PM_PWRBTN#_R to xDP connector
PM_PWRBTN# 30
ME_AC_PRESENT 30
SYS_PWROK
non-iAMT
T2201T2201
1
T2202T2202
1
Remove XDP_DBRESET#
1 2
R2201 49.9Ohm1%R2201 49.9Ohm1%
R2202 750Ohm1%R 2202 750Ohm1%
SP2216 R0402 SP2216 R 0402
R2205 10KOhm R2205 10KOhm
D2201 1.2V/0.1A @ D2201 1.2V/0.1A @
SP2212 R0402 SP2212 R 0402
R2240 0Ohm R2240 0Ohm
R2208 0Ohm
R2208 0Ohm
SP2213 R0402 SP2213 R 0402
SP2218 R0402 SP2218 R 0402
SP2214 R0402 SP2214 R 0402
SP2219 R0402 SP2219 R 0402
2
FDI_TXN0 3
FDI_TXN1 3
FDI_TXN2 3
FDI_TXN3 3
FDI_TXN4 3
FDI_TXN5 3
FDI_TXN6 3
FDI_TXN7 3
FDI_TXP0 3
FDI_TXP1 3
FDI_TXP2 3
FDI_TXP3 3
FDI_TXP4 3
FDI_TXP5 3
FDI_TXP6 3
FDI_TXP7 3
FDI_INT 3
FDI_FSYNC0 3
FDI_FSYNC1 3
FDI_LSYNC0 3
FDI_LSYNC1 3
R1.3
DSWODVREN - On Die DSW VR Enable
HIGH - Enabled(DEFAULT) ; LOW-Disabled
+VCC_RTC
PCIE_WAKE# 53,69
PM_CLKRUN# 30
T2203T2203
1
SUSCLK 30
PM_SUSC# 30
PM_SUSB# 30
ME_PM_SLP_M# 30
SLP_SUS# 30
H_PM_SYNC 4
ME_PM_SLP_LAN# 30
+3VSUS_ORG
+VTT_PCH_ORG
+VCC_RTC
+3VSUS
+5VSUS
+12VSUS
+3VSUS_ORG 20,21,24,25,27
+3VS
+3VS 4,16,17,20,21,23,24,25,26,27,28,30,32,36, 37,40,44,45,46,48,50,51,53,54,55,57,69,91,92
+VTT_PCH_ORG 26,27
+3VA
+3VA 20,27,30,54,57,60,81,93
+VCC_RTC 20,27
+3VSUS 4,24,27,28,30,69,81,82,84,92
+5VSUS 27,55,81,82,83,84,87,91
+12VSUS 28,81,91
1
SYS_PWROK for PCH
+3VSUS
5
VCC
VCC
Q2203B
Q2203B
UM6K1N
UM6K1N
@
@
SYS_PWROK
+12VSUS +3VSUS
R2231
R2231
100KOhm
100KOhm
1%
1%
1 2
@
@
3 4
5
Y
Y
1 2
@
@
Remove 2 short pin
1 2
R2230
R2230
10KOhm
10KOhm
@
@
1 2
Q9203B
Q9203B
UM6K1N
UM6K1N
@
@
B B
DELAY_VR_AND_ALL_SYS 92
A A
SUSB_EC# 24,30,57,91,92
PM_SUSB#
PM_PWROK
SP2211 R 0402 SP2211 R 0402
R2241 0Ohm
R2241 0Ohm
U2201
U2201
A
A
1
B
B
2
3 4
GND
GND
Vcc=2~5.5
Vcc=2~5.5
+5VSUS
1 2
R2232
R2232
10KOhm
10KOhm
@
@
3 4
5
GND GND
5
4
R1.3
PS_S3CNTRL_1.5V 7
R1.3
PM_CLKRUN#
PM_PWROK
1 2
R2220 10KOhm R2220 10KOhm
1 2
R2221 10KOhm R2221 10KOhm
3
+3VSUS_ORG
RI#
BATLOW#
PCIE_WAKE#
+3VS
R1.3
GND
ME_PM_SLP_M#
ME_SUSPWRDNACK
ME_AC_PRESENT
ME_PM_SLP_LAN#
2
1 2
R2223 10KOhm R2223 10KOhm
1 2
R2224 10KOhm R2224 10KOhm
1 2
R2225 1KOhm R2225 1KOhm
@
@
1 2
R2226 10KOhm
R2226 10KOhm
1 2
R2227 10KOhm R2227 10KOhm
1 2
R2228 10KOhm R2228 10KOhm
@
@
1 2
R2229 10KOhm
R2229 10KOhm
R1.3
Title :
Title :
Title :
PCH(3)_FDI,DMI,SYS PWR
PCH(3)_FDI,DMI,SYS PWR
PCH(3)_FDI,DMI,SYS PWR
JAY TSAI
JAY TSAI
Engineer:
Engineer:
Size Project Name
Size Project Name
Size Project Name
C
C
C
Date: Sheet of
Date: Sheet of
Date: Sheet of
EIH31
EIH31
EIH31
Engineer:
1
JAY TSAI
22 99 Friday, December 17, 2010
22 99 Friday, December 17, 2010
22 99 Friday, December 17, 2010
Rev
Rev
Rev
1.3
1.3
1.3
3
+3VS
U2001D
U2001D
J47
L_BKLTEN
M45
L_VDD_EN
P45
L_BKLTCTL
T40
L_DDC_CLK
K47
L_DDC_DATA
T45
L_CTRL_CLK
P39
AF37
AF36
AE48
AE47
AK39
AK40
AN48
AM47
AK47
AJ48
AN47
AM49
AK49
AJ47
AF40
AF39
AH45
AH47
AF49
AF45
AH43
AH49
AF47
AF43
N48
P49
T49
T39
M40
M47
M49
T43
T42
COUGAR_POINT_ES1
COUGAR_POINT_ES1
L_CTRL_DATA
LVD_IBG
LVD_VBG
LVD_VREFH
LVD_VREFL
LVDSA_CLK#
LVDSA_CLK
LVDSA_DATA#0
LVDSA_DATA#1
LVDSA_DATA#2
LVDSA_DATA#3
LVDSA_DATA0
LVDSA_DATA1
LVDSA_DATA2
LVDSA_DATA3
LVDSB_CLK#
LVDSB_CLK
LVDSB_DATA#0
LVDSB_DATA#1
LVDSB_DATA#2
LVDSB_DATA#3
LVDSB_DATA0
LVDSB_DATA1
LVDSB_DATA2
LVDSB_DATA3
CRT_BLUE
CRT_GREEN
CRT_RED
CRT_DDC_CLK
CRT_DDC_DATA
CRT_HSYNC
CRT_VSYNC
DAC_IREF
CRT_IRTN
1 2
1 2
1 2
SDVO_TVCLKINN
SDVO_TVCLKINP
SDVO_CTRLCLK
SDVO_CTRLDATA
LVDS
LVDS
DDPC_CTRLCLK
DDPC_CTRLDATA
Digital Display Interface
Digital Display Interface
DDPD_CTRLCLK
DDPD_CTRLDATA
CRT
CRT
SDVO_STALLN
SDVO_STALLP
SDVO_INTN
SDVO_INTP
DDPB_AUXN
DDPB_AUXP
DDPB_HPD
DDPB_0N
DDPB_0P
DDPB_1N
DDPB_1P
DDPB_2N
DDPB_2P
DDPB_3N
DDPB_3P
DDPC_AUXN
DDPC_AUXP
DDPC_HPD
DDPC_0N
DDPC_0P
DDPC_1N
DDPC_1P
DDPC_2N
DDPC_2P
DDPC_3N
DDPC_3P
DDPD_AUXN
DDPD_AUXP
DDPD_HPD
DDPD_0N
DDPD_0P
DDPD_1N
DDPD_1P
DDPD_2N
DDPD_2P
DDPD_3N
DDPD_3P
AP43
AP45
AM42
AM40
AP39
AP40
P38
M39
AT49
AT47
AT40
AV42
AV40
AV45
AV46
AU48
AU47
AV47
AV49
P46
P42
AP47
AP49
AT38
AY47
AY49
AY43
AY45
BA47
BA48
BB47
BB49
M43
M36
AT45
AT43
BH41
BB43
BB45
BF44
BE44
BF42
BE42
BJ42
BG42
+3VS
4
LCD_BKEN_PCH 45
L_VDDEN_PCH 45
L_BKLT_CTRL 45
EDID_CLK_PCH 45
EDID_DATA_PCH 45
Remove 2 test point
LVDS_LCLKN_PCH 45
LVDS_LCLKP_PCH 45
LVDS_L0N_PCH 45
LVDS_L1N_PCH 45
LVDS_L2N_PCH 45
LVDS_L0P_PCH 45
LVDS_L1P_PCH 45
LVDS_L2P_PCH 45
Remove 2 short pin
L_CTRL_CLK
L_CTRL_DATA
R2301 2.37KOhm1%R2301 2.37KOhm1%
R2302 0Ohm@R2302 0Ohm@
SP2303 R0402 SP2303 R 0402
1 2
GND
5
D D
RN2301A
L_CTRL_CLK
L_CTRL_DATA
EDID_DATA_PCH
EDID_CLK_PCH
R1.3 Pull down at connector side
C C
1 2
2.2KOhm
2.2KOhm
3 4
2.2KOhm
2.2KOhm
1 2
2.2KOhm
2.2KOhm
3 4
2.2KOhm
2.2KOhm
RN2301A
RN2301B
RN2301B
RN2302A
RN2302A
RN2302B
RN2302B
EIH
CRT_B_PCH 46
CRT_G_PCH 46
CRT_R_PCH 46
B B
CRT_B_PCH
CRT_G_PCH
CRT_R_PCH
JP2301 SHORT_PI N JP2301 SHOR T_PIN
50 ohm
50 ohm
50 ohm
Close to CPU
1 2
JP2302 SHORT_PI N JP2302 SHOR T_PIN
1 2
JP2303 SHORT_PIN JP2303 SHORT_PIN
1 2
R2304
R2304
150Ohm
150Ohm
1 2
R2305
R2305
150Ohm
150Ohm
GND
37.5 ohm
37.5 ohm
37.5 ohm
1 2
150Ohm
150Ohm
R2306
R2306
B_PCH
G_PCH
R_PCH
DDC_CLK_PCH 46
1 2
DDC_DATA_PCH 46
CRT_HSYNC_PCH 46
CRT_VSYNC_PCH 46
Remove 2 short pin
R2303 1KOhm0. 5%R2303 1KOhm0.5%
GND
GND
2
+3VS 4,16,17,20,21,22,24,25,26,27,28,30,32,36,37,40,44,45, 46,48,50,51,53,54,55,57,69,91,92
SDVO
Display Port B Display Port C
HDMI_DDC_CLK_PCH 48
HDMI_DDC_DATA_PCH 48
HDMI_HPD_PCH 48
HDMI_TXN2_PCH 48
HDMI_TXP2_PCH 48
HDMI_TXN1_PCH 48
HDMI_TXP1_PCH 48
HDMI_TXN0_PCH 48
HDMI_TXP0_PCH 48
HDMI_CLKN_PCH 48
HDMI_CLKP_PCH 48
Display Port D
1
CRT Disable: (For discrete graphic)
1. NC:
CRT_RED,CRT_GREEN,CRT_BLUE
CRT_HSYCN,CRT_VSYNC
2. 1-kΩ ±0.5% pull-down to GND:
DAC_IREF
3. Connected to GND:
CRT_ITRN
4. Connect to +V3.3:
VCCADAC
A A
5
4
3
DisPlay Port Disable: (For discrete graphic)
1. NC:
ALL
LVDS Disable: (For discrete graphic)
1. NC:
LVDSA_DATA [3:0], LVDSA_DATA# [3:0],
LVDSA_CLK, LVDSA_CLK#, LVDSB_DATA [3:0],
LVDSB_DATA# [3:0], LVDSB_CLK, LVDSB_CLK#
L_VDD_EN, L_BKLTEN, L_BKLTCTL, LVD_VREFH
LVD_VREFL, LVD_IBG, LVD_VBG
2. Connected to GND:
VccALVDS,VccTX_LVDS
2
Title :
Title :
Title :
PCH(4)_DP,LVDS,CRT
PCH(4)_DP,LVDS,CRT
PCH(4)_DP,LVDS,CRT
JAY TSAI
JAY TSAI
Engineer:
Engineer:
Size Project Name
Size Project Name
Size Project Name
C
C
C
Date: Sheet of
Date: Sheet of
Date: Sheet
EIH31
EIH31
EIH31
Engineer:
1
JAY TSAI
23 99 Friday, December 17, 2010
23 99 Friday, December 17, 2010
23 99 Friday, December 17, 2010
Rev
Rev
Rev
1.3
1.3
1.3
of
1
+3VSUS_ORG
EIH
AY7
AV7
AU3
BG4
AT10
BC8
AU2
AT4
AT3
AT1
AY3
AT5
AV3
AV1
BB1
BA3
BB5
BB3
BB7
BE8
BD4
BF6
AV5
AV10
AT8
AY5
BA2
AT12
BF3
C24
A24
C25
B25
C26
A26
K28
H28
E28
D28
C28
A28
C29
B29
N28
M28
L30
K30
G30
E30
C30
A30
L32
K32
G32
E32
C32
A32
C33
B33
A14
K20
B17
C16
L16
A16
D14
C14
NV_RCOMP
USB_PN3
USB_PP3
USB_PN10
USB_PP10
USB_PN11
USB_PP11
2
+3VSUS
+3VSUS_ORG
+12VS
+1.8VS
R2427 32.4Ohm1%
R2427 32.4Ohm1%
1
1
+3VSUS 4,22,27,28,30,69,81,82,84,92
+3VS
+3VS 4,16,17,20,21,22,23,25,26,27,28,30,32,36, 37,40,44,45,46,48,50,51,53,54,55,57,69,91,92
+3V
+3V 4,52,53,55,57,69,91
+3VSUS_ORG 20,21,22,25,27
+12VS 28,36,48,91
+1.8VS 7,26,57,84
CRB 0.7 Reserved
+1.8VS
1 2
R2428
R2428
2.2KOhm
2.2KOhm
R2429 4.7KOhm R2429 4.7KOhm
H_SNB_IVB# 4 NV_CLE 25
1 2
T2412T2412
T2413T2413
@
@
GND
USB_PN0 69
USB_PP0 69
USB_PN1 52
USB_PP1 52
USB_PN2 69
USB_PP2 69
1 2
USB port
USB port
USB port - USB3.0 Dos Mode
USB_PN4 55
USB_PP4 55
BT module
No Newcard
USB_BIAS
R2416 22.6Ohm
R2416 22.6Ohm
1 2
USB_PN8 52
USB_PP8 52
USB_PN9 53
USB_PP9 53
USB_PN10 53
USB_PP10 53
USB_PN11 69
USB_PP11 69
GND
1%
1%
1 2
10KOhm
10KOhm
5 6
10KOhm
10KOhm
7 8
10KOhm
10KOhm
5 6
10KOhm
10KOhm
3 4
10KOhm
10KOhm
1 2
10KOhm
10KOhm
7 8
10KOhm
10KOhm
3 4
10KOhm
10KOhm
R2433 0Ohm R2433 0Ohm
1 2
R2432 0Ohm R2432 0Ohm
1 2
Camera
WiFi/WiMax
SIM Card
3G Card
RN2401A
RN2401A
RN2402C
RN2402C
RN2401D
RN2401D
RN2401C
RN2401C
RN2402B
RN2402B
RN2402A
RN2402A
RN2402D
RN2402D
RN2401B
RN2401B
Place within 500 mils of PCH
USB_OC1# 52
USB_OC02# 69
3
INT_PIRQA#
INT_PIRQB#
INT_PIRQC#
INT_PIRQD#
DGPU_HOLD_RST#
DGPU_SELECT#
DGPU_PWR_EN
BBS_BIT1
DGPU_PWM_SELECT#
STP_A16OVR
MPC_PWR_CTRL#
SATA_ODD_DA#_R
EXTTS_SNI_DRV0_PCH
EXTTS_SNI_DRV1_PCH
PCI_PME#
PLT_RST#
CLK_PCI_FB_R
CLK_KBCPCI_PCH_R
CLK_DEBUG_R
Remove 1 test point
U2001E
U2001E
BG26
BJ26
BH25
BJ16
BG16
AH38
AH37
AK43
AK45
C18
N30
H3
AH12
AM4
AM5
Y13
K24
L24
AB46
AB45
B21
M20
AY16
BG46
BE28
BC30
BE32
BJ32
BC28
BE30
BF32
BG32
AV26
BB26
AU28
AY30
AU26
AY26
AV28
AW30
K40
K38
H38
G38
C46
C44
E40
D47
E42
F46
G42
G40
C42
D44
K10
C6
H49
H43
J48
K42
H40
COUGAR_POINT_ES1
COUGAR_POINT_ES1
TP1
TP2
TP3
TP4
TP5
TP6
TP7
TP8
TP9
TP10
TP11
TP12
TP13
TP14
TP15
TP16
TP17
TP18
TP19
TP20
TP21
TP22
TP23
TP24
TP25
TP26
TP27
TP28
TP29
TP30
TP31
TP32
TP33
TP34
TP35
TP36
TP37
TP38
TP39
TP40
PIRQA#
PIRQB#
PIRQC#
PIRQD#
REQ1#/GPIO50
REQ2#/GPIO52
REQ3#/GPIO54
GNT1#/GPIO51
GNT2#/GPIO53
GNT3#/GPIO55
PIRQE#/GPIO2
PIRQF#/GPIO3
PIRQG#/GPIO4
PIRQH#/GPIO5
PME#
PLTRST#
CLKOUT_PCI0
CLKOUT_PCI1
CLKOUT_PCI2
CLKOUT_PCI3
CLKOUT_PCI4
RSVD1
RSVD2
RSVD3
RSVD4
RSVD5
RSVD6
RSVD7
RSVD8
RSVD9
RSVD10
RSVD11
RSVD12
RSVD13
RSVD14
RSVD15
RSVD16
RSVD17
RSVD18
RSVD19
RSVD20
RSVD21
RSVD
RSVD
PCI
PCI
RSVD22
RSVD23
RSVD24
RSVD25
RSVD26
RSVD27
RSVD28
RSVD29
USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N
USBP9P
USBP10N
USBP10P
USB
USB
USBP11N
USBP11P
USBP12N
USBP12P
USBP13N
USBP13P
USBRBIAS#
USBRBIAS
OC0#/GPIO59
OC1#/GPIO40
OC2#/GPIO41
OC3#/GPIO42
OC4#/GPIO43
OC5#/GPIO9
OC6#/GPIO10
OC7#/GPIO14
1
2
3 4
EIH
+3VS
1 2
GND
4
R2430
R2430
10KOhm
10KOhm
@
@
R2415 0Ohm@R2415 0Ohm@
1 2
DGPU_HOLD_RST# 70
SUSB_EC# 22,30,57,91,92
R1.3
DGPU_PWR_EN 57
SATA_ODD_DA# 51
+3VS
CLK_PCI_FB 21
CLK_KBCPCI_PCH 30
CLK_DEBUG 44
DGPU_PWR_EN
+3VS
T2403T2403
T2404T2404
GND
T2401T2401
T2402T2402
5 6
3 4
1 2
7 8
Remove 2 short pin
1
1
R2405 1KOhm@R 2405 1KOhm@
SP2403 R0402 SP2403 R 0402
R2407 10KOhm R2407 10KOhm
R2408 10KOhm R2408 10KOhm
1
CLKOUT_PCI0
1
SP2404 R0402 SP2404 R 0402
C2403
C2403
10PF/50V
10PF/50V
@
@
1 2
Reserved for Wireless team
GND
10KOhm
10KOhm
10KOhm
10KOhm
10KOhm
10KOhm
10KOhm
10KOhm
1 2
1 2
1 2
1 2
1 2
1 2
1 2
RN2403C
RN2403C
RN2403B
RN2403B
RN2403A
RN2403A
RN2403D
RN2403D
R2409 22Ohm R2409 22Ohm
R2410 22Ohm R2410 22Ohm
5
D D
R1.1
U2402
U2402
A
A
+3VSUS
R2414 0Ohm@R2414 0Ohm@
VGA_PWRON 91
C C
B B
1 2
5
VCC
VCC
B
B
GND
GND
Y
Y
SN74LVC1G08DCKR@
SN74LVC1G08DCKR@
R2413 0Ohm
R2413 0Ohm
1 2
/DGPU
/DGPU
R1.1
DGPU_PWR_EN is active high
BBS_BIT0,BBS_BIT1 : Boot BIOS Strap
Boot BIOS Strap
Boot BIOS Location
BBS_BIT0 BBS_BIT1
LPC 0 0
0 1
1
1 (PCH) 1
A A
Sampled on rising edge of PWROK.
BBS_BIT0 20
BBS_BIT0
BBS_BIT1
Reserved (NAND)
Reserved
0
SPI
@
@
1 2
@
@
R2417 1KOhm
R2417 1KOhm
1 2
R2418 1KOhm
R2418 1KOhm
GND
STP_A16OVR:
A16 swap override Strap/
Top-Block swap override jumper
Low=Enabled A16 swap override/
Top-Block swap override
High=Default
STP_A16OVR
@
@
1 2
R2419 1KOhm
R2419 1KOhm
GND
DGPU_PWM_SELECT#
R1.1
DGPU_SELECT#
R1.2
DGPU_HOLD_RST#
DGPU_PWR_EN
MPC_PWR_CTRL#
SATA_ODD_DA#
R2420 10KOhm@R2420 10KOhm@
1 2
R2421 10KOhm R2421 10KOhm
1 2
R2422 10KOhm R2422 10KOhm
1 2
R2423 1KOhm
R2423 1KOhm
1 2
/DGPU
/DGPU
R2431 10KOhm R2431 10KOhm
1 2
R2424 10KOhm R2424 10KOhm
1 2
+3VS
PLT_RST#
GND
R2425 0Ohm
R2425 0Ohm
U2401
U2401
A
A
1
B
B
2
3 4
GND
GND
SN74LVC1G08DCKR
SN74LVC1G08DCKR
1 2
5
4
3
2
+3V
5
VCC
VCC
R2426
R2426
10KOhm
10KOhm
Size Project Name
Size Project Name
Size Project Name
C
C
C
BUF_PLT_RST# 4,30,32,40,53,69,70
Title :
Title :
Title :
Engineer:
Engineer:
Engineer:
EIH31
EIH31
EIH31
1
PCH(5)_PCI,NVRAM,USB
PCH(5)_PCI,NVRAM,USB
PCH(5)_PCI,NVRAM,USB
JAY TSAI
JAY TSAI
JAY TSAI
Rev
Rev
Rev
1.3
1.3
1.3
24 99 Friday, December 17, 2010
24 99 Friday, December 17, 2010
24 99 Friday, December 17, 2010
of
Y
Y
@
@
1 2
GND
Date: Sheet of
Date: Sheet of
Date: Sheet
1
+3VSUS
+VCCP
+3VSUS_ORG
2
+3VS
+3VS 4,16,17,20,21,22,23,24,26,27,28,30,32,36, 37,40,44,45,46,48,50,51,53,54,55,57,69,91,92
+3VSUS 4,22,24,27,28,30,69,81,82,84,92
+VCCP 6,26,27,30,32,57,82
+3VSUS_ORG 20,21,22,24,27
5
4
3
PCB_ID0 PCB_ID1
SR
ER
L L
H L
PR
U2001F
U2001F
T7
BMBUSY#/GPIO0
A42
TACH1/GPIO1
H36
TACH2/GPIO6
E38
TACH3/GPIO7
C10
GPIO8
C4
LAN_PHY_PWR_CTRL/GPIO12
G2
GPIO15
U2
SATA4GP/GPIO16
D40
TACH0/GPIO17
T5
SCLOCK/GPIO22
E8
GPIO24/MEM_LED
E16
GPIO27
P8
GPIO28
K1
STP_PCI#/GPIO34
K4
GPIO35
V8
SATA2GP/GPIO36
M5
SATA3GP/GPIO37
N2
SLOAD/GPIO38
M3
SDATAOUT0/GPIO39
V13
SDATAOUT1/GPIO48
V3
SATA5GP/GPIO49
D6
GPIO57
A4
Vss_NCTF1
A44
Vss_NCTF2
A45
Vss_NCTF3
A46
Vss_NCTF4
A5
Vss_NCTF5
A6
Vss_NCTF6
B3
Vss_NCTF7
B47
Vss_NCTF8
BD1
Vss_NCTF9
BD49
Vss_NCTF10
BE1
Vss_NCTF11
BE49
Vss_NCTF12
BF1
Vss_NCTF13
BF49
Vss_NCTF14
COUGAR_POINT_ES1
COUGAR_POINT_ES1
Not need Zero Power ODD Support
A20GATE
RCIN#
PROCPWRGD
THRMTRIP#
INIT3_3V#
DF_TVS
TS_VSS1
TS_VSS2
TS_VSS3
TS_VSS4
NC_1
Vss_NCTF15
Vss_NCTF16
Vss_NCTF17
Vss_NCTF18
Vss_NCTF19
Vss_NCTF20
Vss_NCTF21
Vss_NCTF22
Vss_NCTF23
Vss_NCTF24
Vss_NCTF25
Vss_NCTF26
Vss_NCTF27
Vss_NCTF28
Vss_NCTF29
Vss_NCTF30
Vss_NCTF31
Vss_NCTF32
PECI
C40
B41
C41
A40
P4
AU16
P5
AY11
AY10
T14
AY1
AH8
AK11
AH10
AK10
P37
BG2
BG48
BH3
BH47
BJ4
BJ44
BJ45
BJ46
BJ5
BJ6
C2
C48
D1
D49
E1
E49
F1
F49
R2511 1.5KOhm1%R2511 1.5KOhm1%
1 2
R2512 1.5KOhm1%R2512 1.5KOhm1%
1 2
R2513 1.5KOhm1%R2513 1.5KOhm1%
1 2
H_PECI_R
PM_THRMTRIP#
INIT3_3V#
TS Signal Disable Guideline
TS_VSS[1:4] should pull down to GND
Design Guide 0.9 (436735)
GND
1 2
1 2
GND
+3VS
+3VS
R2514 0Ohm @ R2514 0Ohm @
R2516 390Ohm 1% R2516 390Ohm 1%
R2517 56Ohm R2517 56Ohm
Remove 1 PCS 0ohm
1 2
1 2
R2515 43Ohm R2515 43Ohm
TACH4/GPIO68
TACH5/GPIO69
TACH6/GPIO70
TACH7/GPIO71
GPIO
GPIO
CPU/MISC
CPU/MISC
NCTF
NCTF
1
T2504T2504
+VCCP
SATA_ODD_PWRGT 51
A20GATE 30
H_PECI 4
H_PECI_EC 30
RCIN# 30
H_CPUPWRGD 4
H_THRMTRIP# 4,32
NV_CLE 24
USB30_EXT_SMI#
EXT_SMI#
GPIO12
DGPU_HPD_INTR#
PCH_ALERT#
DGPU_PWROK
GPIO7
GPIO0
GPIO1
STP_PCI#
SATA_DET#4
GPIO27
DGPU_PWROK
WLAN_ON_2
SATA_PWR_EN#1_R
BT_ON/OFF#
MP
+3VS
1 2
R2525
R2525
10KOhm
10KOhm
N/A
N/A
1 2
R2526
R2526
@
@
0Ohm
0Ohm
GND
R2530 10KOhm R2530 10KOhm
R2529 10KOhm R2529 10KOhm
R2538 10KOhm R2538 10KOhm
R2534 10KOhm R2534 10KOhm
R2535 10KOhm R2535 10KOhm
R2539 10KOhm R2539 10KOhm
R2547 10KOhm R2547 10KOhm
R2536 1KOhm R2536 1KOhm
R2545 10KOhm@R2545 10KOhm@
R2537 10KOhm R2537 10KOhm
R2546 10KOhm R2546 10KOhm
R2548 10KOhm R2548 10KOhm
R2540 10KOhm@R2540 10KOhm@
R2541 10KOhm@R2541 10KOhm@
R2542 10KOhm@R2542 10KOhm@
R2549 10KOhm@R2549 10KOhm@
+3VS
GPIO0
1 2
R1.2
Remove 1 Test point
R1.2
R1.3
1 2
R2527
R2527
10KOhm
10KOhm
@
@
DGPU_PWROK has 100 ms software delay ,
PCB_ID0
no hardware delay requirement
PCB_ID1 USB20_SEL
1 2
R2528
R2528
0Ohm
0Ohm
EIH
GND
Remove port FDI_OVRVLTG to xDP connector
EIH
+3VSUS_ORG
1 2
1 2
1 2
+3VS
1 2
1 2
1 2
1 2
1 2
1 2
1 2
R2518 1KOhm1%
1 2
1 2
GND
1 2
GND
1 2
GND
1 2
EIH
GND
+3VS
1 2
R2518 1KOhm1%
+3VS
+3VS
1 2
@
@
FDI TERMINATION VOLTAGE OVERRIDE
- GPIO37 (FDI_OVRVLTG)
LOW - TX, RX terminated to same voltage
(DC Couplong Mode)
DEFAULT
R2520 200KOhm1%R2520 200KOhm1%
1 2
DMI TERMINATION VOLTAGE OVERRIDE
- GPIO36 (SATA_ODD_PRSNT#)
LOW - TX, RX terminated to same voltage
(DC Couplong Mode)
DEFAULT
WLAN_ON
Oringal:PLL_ODVR_EN
USB30_EXT_SMI# 69
DGPU_PWROK 87,91,92
SATA_ODD_PRSNT# 51
BT_ON/OFF# 53,55
PCH_ALERT# 30
FDI_OVRVLTG
SATA_ODD_PRSNT#_R
R2521 1KOhm@R2521 1KOhm@
1 2
EXT_SMI# 30,44
WLAN_LED 54
no xDP
WLAN_ON 53
no xDP
WLAN_ON_2 53
GPIO1
DGPU_HPD_INTR#
GPIO7
USB30_EXT_SMI#
GPIO12
SP2501 R0402 SP2501 R 0402
SATA_DET#4
no xDP
SP2502 R0402 SP2502 R 0402
T2001T2001
1
GPIO27
STP_PCI#
SP2504 R0402 SP2504 R 0402
FDI_OVRVLTG
PCB_ID0
PCB_ID1
SP2503 R0402 SP2503 R 0402
R2519 100KOhm R2519 100KOhm
1 2
PLL ON DIE VR ENABLE
HIGH - DISABLED (DEFAULT)
GND
LOW - ENABLED
1 2
1 2
no xDP
1 2
1 2
T2505T2505
D D
C C
R1.3
R1.2
R1.2 RCIN# has pull high at EC side
R1.2
B B
A A
Unused GPIO
R1.1
#438390 Checklist
R2501 100Ohm 1% R2501 100Ohm 1%
1
no BT LED
GND
no xDP
PCH_GPIO0_R
HOST_ALERT#1_R
no xDP
WLAN_ON
PLL_ODVR_EN
SATA_PWR_EN#1_R
SATA_ODD_PRSNT#_R
Remove 1 short pin
CRIT_TEMP_REP#_R
no xDP
5
4
3
Title :
Title :
Title :
PCH(6)_CPU,GPIO,MISC
PCH(6)_CPU,GPIO,MISC
PCH(6)_CPU,GPIO,MISC
JAY TSAI
JAY TSAI
Engineer:
Engineer:
Size Project Name
Size Project Name
Size Project Name
C
C
C
Date: Sheet of
Date: Sheet of
2
Date: Sheet
EIH31
EIH31
EIH31
Engineer:
1
JAY TSAI
25 99 Friday, December 17, 2010
25 99 Friday, December 17, 2010
25 99 Friday, December 17, 2010
Rev
Rev
Rev
1.3
1.3
1.3
of
5
4
3
2
1
D D
C C
B B
GND
U2001H
U2001H
H5
VSS0
AA17
VSS1
AA2
VSS2
AA3
VSS3
AA33
VSS4
AA34
VSS5
AB11
VSS6
AB14
VSS7
AB39
VSS8
AB4
VSS9
AB43
VSS10
AB5
VSS11
AB7
VSS12
AC19
VSS13
AC2
VSS14
AC21
VSS15
AC24
VSS16
AC33
VSS17
AC34
VSS18
AC48
VSS19
AD10
VSS20
AD11
VSS21
AD12
VSS22
AD13
VSS23
AD19
VSS24
AD24
VSS25
AD26
VSS26
AD27
VSS27
AD33
VSS28
AD34
VSS29
AD36
VSS30
AD37
VSS31
AD38
VSS32
AD39
VSS33
AD4
VSS34
AD40
VSS35
AD42
VSS36
AD43
VSS37
AD45
VSS38
AD46
VSS39
AD8
VSS40
AE2
VSS41
AE3
VSS42
AF10
VSS43
AF12
VSS44
AD14
VSS45
AD16
VSS46
AF16
VSS47
AF19
VSS48
AF24
VSS49
AF26
VSS50
AF27
VSS51
AF29
VSS52
AF31
VSS53
AF38
VSS54
AF4
VSS55
AF42
VSS56
AF46
VSS57
AF5
VSS58
AF7
VSS59
AF8
VSS60
AG19
VSS61
AG2
VSS62
AG31
VSS63
AG48
VSS64
AH11
VSS65
AH3
VSS66
AH36
VSS67
AH39
VSS68
AH40
VSS69
AH42
VSS70
AH46
VSS71
AH7
VSS72
AJ19
VSS73
AJ21
VSS74
AJ24
VSS75
AJ33
VSS76
AJ34
VSS77
AK12
VSS78
AK3
VSS79
COUGAR_POINT_ES1
COUGAR_POINT_ES1
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
AK38
AK4
AK42
AK46
AK8
AL16
AL17
AL19
AL2
AL21
AL23
AL26
AL27
AL31
AL33
AL34
AL48
AM11
AM14
AM36
AM39
AM43
AM45
AM46
AM7
AN2
AN29
AN3
AN31
AP12
AP19
AP28
AP30
AP32
AP38
AP4
AP42
AP46
AP8
AR2
AR48
AT11
AT13
AT18
AT22
AT26
AT28
AT30
AT32
AT34
AT39
AT42
AT46
AT7
AU24
AU30
AV16
AV20
AV24
AV30
AV38
AV4
AV43
AV8
AW14
AW18
AW2
AW22
AW26
AW28
AW32
AW34
AW36
AW40
AW48
AV11
AY12
AY22
AY28
EIH
POWER
VccCore1
VccCore2
VccCore3
VccCore4
VccCore5
VccCore6
VccCore7
VccCore8
VccCore9
VccCore10
VccCore11
VccCore12
VccCore13
VccCore14
VccCore15
VccCore16
VccCore17
VccIO1
VccAPLLEXP
VccIO2
VccIO3
VccIO4
VccIO5
VccIO6
VccIO7
VccIO8
VccIO9
VccIO10
VccIO11
VccIO12
VccIO13
Vcc3_3_1
VccVRM1
VccAFDIPLL
VccIO14
VccDMI1
POWER
VCC CORE
VCC CORE
VCCIO
VCCIO
FDI
FDI
U48
VccADAC
U47
AK36
AK37
AM37
AM38
AP36
AP37
V33
V34
AT16
AT20
AB36
AG16
AG17
AJ16
AJ17
V1
20mA
20mA
0.1UF/16V
0.1UF/16V
42mA
190mA
C2622
C2622
GND
GND
+VCCAFDI_VRM
+VCCIO_CPU_VCC_DMI
1 2
GND
1 2
GND
1 2
GND
1 2
GND
VssADAC
CRT LVDS
CRT LVDS
VccALVDS
VssALVDS
VccTX_LVDS1
VccTX_LVDS2
VccTX_LVDS3
VccTX_LVDS4
Vcc3_3_2
Vcc3_3_3
VccVRM2
VccDMI2
DMI
DMI
VccClkDMI
VccDFTERM1
VccDFTERM2
VccDFTERM3
VccDFTERM4
DFT / SPI HVCMOS
DFT / SPI HVCMOS
VccSPI
U2001G
U2001G
+VTT_PCH_VCC
+VTT_PCH_VCCIO
+VTT_PCH_ORG
+VTT_PCH_VCCIO
+VTT_PCH_VCCAPLL_FDI
R2605 0Ohm
+VTT_PCH_ORG
+VTT_PCH_VCCIO
GND
R2605 0Ohm
@
@
SP2606 R0402 SP2606 R 0402
C2601
C2601
10UF/10V
10UF/10V
R1.3
SP2604 R0402 SP2604 R 0402
L2601 1kOhm/100Mhz
L2601 1kOhm/100Mhz
1 2
C2606
C2606
10UF/10V
10UF/10V
R1.3
+3VS_VCC3_3
1 2
+VTT_PCH_VCCDPLL_FDI
1 2
1 2
GND
2 1
@
@
1 2
1UF/6.3V
1UF/6.3V
C2607
C2607
1 2
+VTT_PCH_VCC_EXP
1 2
1 2
C2602
C2602
1UF/6.3V
1UF/6.3V
GND
GND
+VTT_PCH_VCCDPLL_EXP
+VTT_PCH_VCCAPLL_EXP
1 2
1 2
C2608
C2608
1UF/6.3V
1UF/6.3V
SP2605
SP2605
R0402
R0402
1 2
1 2
GND
+VCCIO_CPU_VCC_DMI
1 2
C2604
C2604
C2603
C2603
1UF/6.3V
1UF/6.3V
1UF/6.3V
1UF/6.3V
GND
+VTT_PCH_VCCDPLL_EXP
1 2
C2605
C2605
10UF/10V
10UF/10V
@
@
GND
1 2
C2610
C2610
C2609
C2609
1UF/6.3V
1UF/6.3V
1UF/6.3V
1UF/6.3V
GND
+3VS_VCCA3GBG
C2611
C2611
0.1UF/16V
0.1UF/16V
+VCCAFDI_VRM
AA23
AC23
AD21
AD23
AF21
AF23
AG21
AG23
AG24
AG26
AG27
AG29
AJ23
AJ26
AJ27
AJ29
AJ31
AN19
BJ22
AN16
AN17
AN21
AN26
AN27
AP21
AP23
AP24
AP26
AT24
AN33
AN34
BH29
AP16
BG6
AP17
AU20
COUGAR_POINT_ES1
COUGAR_POINT_ES1
+VCCA_DAC_1_2
1mA
1 2
C2612
C2612
0.01UF/25V
0.01UF/25V
1mA
60mA
1 2
C2615
C2615
0.01UF/25V
0.01UF/25V
GND
SP2609 R0402 SP2609 R 0402
C2619
C2619
1UF/6.3V
1UF/6.3V
+VTT_PCH_ORG_VCCCLKDMI
R2614 0Ohm R2614 0Ohm
C2620
C2620
10UF/10V
10UF/10V
@
@
+V_NVRAM_VCCPNAND
SP2610 R0402 SP2610 R 0402
C2621
C2621
0.1UF/16V
0.1UF/16V
+3VM_VCCPSPI
R2616 0Ohm
R2616 0Ohm
R2617 0Ohm R2617 0Ohm
1 2
GND
1 2
GND
+3VS_VCC_GIO
1 2
C2618
C2618
0.1UF/16V
0.1UF/16V
GND
2 1
@
@
C2613
C2613
0.1UF/16V
0.1UF/16V
C2616
C2616
0.01UF/25V
0.01UF/25V
1 2
C2614
C2614
10UF/10V
10UF/10V
GND GND
+3VS_VCCA_LVD
+1.8VS_VCCTX_LVD
1 2
C2617
C2617
22UF/6.3V
22UF/6.3V
@
@
GND
SP2608 R0402 SP2608 R 0402
1 2
+VTT_PCH_ORG
L2603 1kOhm/100Mhz @L2603 1kOhm/100Mhz @
1 2
1 2
1 2
1 2
1 2
+VCCP
+1.8VS
+3VS
+3VM_SPI
R1.3
GND
GND
1 2
1 2
C2623
C2623
10PF/50V
10PF/50V
@
@
C2624
C2624
10PF/50V
10PF/50V
@
@
L2604
L2604
1kOhm/100Mhz
1kOhm/100Mhz
SP2607
SP2607
1 2
R0402
R0402
L2602
L2602
1kOhm/100Mhz
1kOhm/100Mhz
+3VS_VCC3_3
2 1
+3VS
+3VS
ER1.19
+1.8VS
2 1
+VTT_PCH_VCC
+VTT_PCH_VCCIO
+VTT_PCH_ORG
+VCCP
+1.8VS
+1.5VS
+1.05VS
+3VS_VCC3_3
+3VM_SPI
+VCCAFDI_VRM
+3VM_VCCPSPI
+VCCIO_CPU_VCC_DMI
+V_NVRAM_VCCPNAND
+1.8VS_VCCTX_LVD
+3VS_VCC_GIO
+VCCA_DAC_1_2
+VCCIO_CPU_VCC_DMI
+3VS_VCCA3GBG
+1.05VS
+VTT_PCH_ORG
A A
JP2601
JP2601
1
2
1
3MM_OPEN_5MIL
3MM_OPEN_5MIL
JP2602
JP2602
1
2
1
2MM_OPEN_5MIL
2MM_OPEN_5MIL
JP2603
JP2603
1
2
1
2MM_OPEN_5MIL
2MM_OPEN_5MIL
2
2
2
6A
1.3A
2.925A
+VTT_PCH_ORG
+VTT_PCH_VCC
+VTT_PCH_VCCIO
+1.8VS
+VTT_PCH_ORG
SP2603
SP2603
1 2
R0402
R0402
@
@
R2618 0Ohm
R2618 0Ohm
@
@
R2602 0Ohm
R2602 0Ohm
+VTT_PCH_1.5VS_1.8VS +1.5VS
1 2
1 2
VCCVRAM use +1.5VS in mobile
HAD_SYNC should pull high to +3VSUS
SP2602
SP2602
1 2
R0402
R0402
+VCCAFDI_VRM
160mA
+VTT_PCH_VCCDPLL_FDI
+VTT_PCH_VCCAPLL_FDI
+VTT_PCH_VCCDPLL_EXP
+VTT_PCH_VCCAPLL_EXP
5
4
3
+VTT_PCH_VCC
+VTT_PCH_VCCIO 20,27
+VTT_PCH_ORG 22,27
+VCCP 6,25,27,30,32,57,82
+1.8VS 7,24,57,84
+1.5VS 53,57,91
+3VS
+3VS 4,16,17,20,21,22,23,24,25,27,28,30,32,36, 37,40,44,45,46,48,50,51,53,54,55,57,69,91,92
+1.05VS 27,57,80,82
+3VS_VCC3_3 27
+3VM_SPI 28
+VCCAFDI_VRM 27
+3VM_VCCPSPI
+VCCIO_CPU_VCC_DMI
+V_NVRAM_VCCPNAND
+1.8VS_VCCTX_LVD
+3VS_VCC_GIO
+VCCA_DAC_1_2
+VTT_PCH_VCCDPLL_FDI
+VCCIO_CPU_VCC_DMI
+VTT_PCH_VCCAPLL_FDI
+3VS_VCCA3GBG
+VTT_PCH_VCCDPLL_EXP
+VTT_PCH_VCCAPLL_EXP
2
Title :
Title :
Title :
PCH(7)_POWER,GND
PCH(7)_POWER,GND
PCH(7)_POWER,GND
JAY TSAI
JAY TSAI
Engineer:
Engineer:
Size Project Name
Size Project Name
Size Project Name
C
C
C
Date: Sheet of
Date: Sheet of
Date: Sheet
EIH31
EIH31
EIH31
Engineer:
1
JAY TSAI
26 99 Friday, December 17, 2010
26 99 Friday, December 17, 2010
26 99 Friday, December 17, 2010
Rev
Rev
Rev
1.3
1.3
1.3
of
+3VSUS_O RG
+5VSUS_O RG
+3VS
+5VS
+3VS_VCC3 _3
EIH31
EIH31
EIH31
1
1
Title :
Title :
Title :
Engineer:
Engineer:
Engineer:
PCH(8)_POWER,GND
PCH(8)_POWER,GND
PCH(8)_POWER,GND
JAY TSAI
JAY TSAI
JAY TSAI
Rev
Rev
Rev
1.3
1.3
1.3
27 99 Friday, December 17 , 2010
27 99 Friday, December 17 , 2010
27 99 Friday, December 17 , 2010
2
+VTT_PCH_VCCUS BCORE
1 2
C2726
C2726
1UF/6.3V
1UF/6.3V
+3VSUS_O RG_VCCPUSB
1 2
+3VSUS_O RG_VCCAUBG
1 2
C2728
C2728
0.1UF/16V
0.1UF/16V
GND
1 2
SP2705 R 0402 SP2 705 R0402
+3VSUS_O RG_VCCPSUS
+3VS_VCCP CORE
+3VS_VCCP PCI
SP2708 R0402 S P2708 R0402
C2734
C2734
0.1UF/16V
0.1UF/16V
1 2
C2735
C2735
0.1UF/16V
0.1UF/16V
+VTT_PCH_VCCIO _SATA3
1 2
C2736
C2736
1UF/6.3V
1UF/6.3V
+VTT_PCH_ORG_ VCCAPLL_S ATA3
+VCCAFDI_V RM
+VTT_PCH_VCCIO _VCC_SATA
1 2
C2738
C2738
1UF/6.3V
1UF/6.3V
SP2711 R0402 S P2711 R0402
1 2
SP2712 R0402 S P2712 R0402
1 2
SP2713 R0402 S P2713 R0402
1 2
+3VSUS_O RG_VCCPAZSUS
1 2
C2739
C2739
1UF/6.3V
1UF/6.3V
GND
2
SP2702 R0603 S P2702 R0603
1 2
SP2703 R0603 SP 2703 R0 603
1 2
SP2704 R0402 SP 2704 R0 402
1 2
+VTT_PCH_VCCIO
1 2
C2730
C2730
1UF/6.3V
1UF/6.3V
@
@
+5VS_PCH_ VCC5REF
GND
SP2706 R0402 SP 2706 R0 402
1 2
1 2
SP2709 R0603 S P2709 R0603
1 2
1 2
C2737
C2737
10UF/10V
10UF/10V
@
@
GND
SP2710 R0603 S P2710 R0603
1 2
SP2714 R0603 S P2714 R0603
1 2
+VTT_PCH_VCCIO
+3VSUS_O RG
+3VSUS_O RG
+5VSUS_P CH_VCC5REFSUS
C2729
C2729
1UF/6.3V
1UF/6.3V
C2731
+3VS_VCC3 _3
+VTT_PCH_VCCIO
+VTT_PCH_VCCIO
+1.05VM_O RG
+3VSUS_O RG
C2731
1UF/6.3V
1UF/6.3V
1 2
GND
2 1
+3VSUS_O RG
+3VS_VCC3 _3
2
1
D2701
D2701
1V/0.2A
1V/0.2A
3
R2711
R2711
1 2
100Ohm 1%
100Ohm 1%
1 2
2
1
D2702
D2702
1V/0.2A
1V/0.2A
GND
3
R2712
R2712
1 2
100Ohm 1%
100Ohm 1%
1 2
GND
SP2707 R0402 S P2707 R0402
1 2
C2733
C2733
0.1UF/16V
0.1UF/16V
+VTT_PCH_ORG
L2705 1kOhm/1 00Mhz @ L270 5 1 kOhm/100Mh z @
Size Project Name
Size Project Name
Size Project Name
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
20mA
80mA
80mA
55mA
95mA
VCCSST
1mA
1 2
C2725
C2725
0.1UF/16V
0.1UF/16V
GND
JP2703
JP2703
2
2
1
1MM_OPEN _5MIL
1MM_OPEN _5MIL
JP2702
JP2702
2
2
1
1MM_OPEN _5MIL
1MM_OPEN _5MIL
JP2701
JP2701
2
1
2MM_OPEN _5MIL
2MM_OPEN _5MIL
JP2704
JP2704
2
2
1
1MM_OPEN _5MIL
1MM_OPEN _5MIL
3
U2001J
U2001J
AD49
VccAClk
T16
VccDSW3 _3
V12
DcpSusByp
T38
Vcc3_3_4
BH23
VccAPLLD MI2
AL29
VccIO15
AL24
DcpSus1
AA19
VccASW 1
AA21
VccASW 2
AA24
VccASW 3
AA26
VccASW 4
AA27
VccASW 5
AA29
VccASW 6
AA31
VccASW 7
AC26
VccASW 8
AC27
VccASW 9
AC29
VccASW 10
AC31
VccASW 11
AD29
VccASW 12
AD31
VccASW 13
W21
VccASW 14
W23
VccASW 15
W24
VccASW 16
W26
VccASW 17
W29
VccASW 18
W31
VccASW 19
W33
VccASW 20
N16
DcpRTC
Y49
VccVRM3
BD47
VccADPLL A
BF47
VccADPLL B
AF17
VccIO16
AF33
VccDIFFCLK N1
AF34
VccDIFFCLK N2
AG34
VccDIFFCLK N3
AG33
VccSSC
V16
DcpSST
T17
DcpSus2
V19
DcpSus3
BJ8
V_PROC_I O
A22
VccRTC
COUGAR_P OINT_ES1
COUGAR_P OINT_ES1
97mA
1
1
1.01A
1
266mA
1
3
POWER
POWER
Clock and Miscellaneous
Clock and Miscellaneous
CPU RTC
CPU RTC
PCI/GPIO/LPC
PCI/GPIO/LPC
SATA USB
SATA USB
MISC
MISC
HDA
HDA
N26
VccIO17
P26
VccIO18
P28
VccIO19
T27
VccIO20
T29
VccIO21
T23
VccSus3_ 3_1
T24
VccSus3_ 3_2
V23
VccSus3_ 3_3
V24
VccSus3_ 3_4
P24
VccSus3_ 3_5
T26
VccIO22
M26
V5REF_Su s
AN23
DcpSus4
AN24
VccSus3_ 3_6
P34
V5REF
N20
VccSus3_ 3_7
N22
VccSus3_ 3_8
P20
VccSus3_ 3_9
P22
VccSus3_ 3_10
AA16
Vcc3_3_5
W16
Vcc3_3_6
T34
Vcc3_3_7
AJ2
Vcc3_3_8
AF13
VccIO23
AH13
VccIO24
AH14
VccIO25
AF14
VccIO26
AK1
VccAPLLS ATA
AF11
VccVRM4
AC16
VccIO27
AC17
VccIO28
AD17
VccIO29
PCH_VCC_1 _1_20
T21
VccASW 21
VccASW 22
VccASW 23
VccSusHDA
+VTT_PCH_VCCUS BCORE
+5VSUS_P CH_VCC5REFSUS
+3VSUS_O RG_VCCPSUS
+VTT_PCH_VCCIO _SATA3
+VTT_PCH_ORG_ VCCAPLL_S ATA3
+VTT_PCH_VCCA _A_DPL
+VTT_PCH_VCCA _B_DPL
+VTT_PCH_ORG_ SSCVCC
+VTT_PCH_VCCIO _VCC_SATA
+3VSUS_O RG_VCCPAZSUS
PCH_VCC_1 _1_21
V21
PCH_VCC_1 _1_22
T19
P32
+1.05VS
+VTT_PCH_ORG
+VCCP
+VTT_PCH_VCCIO
+3VSUS
+VCC_RTC
+5VSUS
+3VSUS_O RG
+3VA
+1.05VM_O RG
+VCCAFDI_V RM
+3VS_VCC3 _3
+VCCAFDI_V RM
+VCCDIFFCLK N
+5VS_PCH_ VCC5REF
+3VS_VCCP CORE
+3VS_VCCP PCI
+5VSUS_O RG
+VTT_CPU_VCCP CPU
+VCCDPLL_ CPY
+3VS_VCC_ CLKF33
GND
C2727
C2727
0.1UF/16V
0.1UF/16V
GND
+VCCAUPLL
1mA
+VCCA_USB SUS
1mA
+3VSUS_O RG_VCCPSUS
1 2
C2732
C2732
1UF/6.3V
1UF/6.3V
GND
1 2
GND
GND
GND
GND
10mil trace
10mA
+1.05VS 26,57,8 0,82
+3VS
+3VS 4,16,17,20 ,21,22,23, 24,25,26,2 8,30,32,36 ,37,40,44,4 5,46,48,50 ,51,53,54, 55,57,69,9 1,92
+VTT_PCH_ORG 2 2,26
+VCCP 6,25 ,26,30,32,5 7,82
+VTT_PCH_VCCIO 20,2 6
+3VSUS 4,22,24 ,28,30,69, 81,82,84,9 2
+VCC_RTC 20,22
+5VSUS 22,55,8 1,82,83,84 ,87,91
+5VS
+5VS 30,31,36,3 7,46,48,50 ,51,54,55, 57,80,91
+3VSUS_O RG 20,21,22,24 ,25
+3VA 20,30,54,5 7,60,81,93
+1.05VM_O RG
+VCCAFDI_V RM 26
+3VS_VCC3 _3 26
+VCCAFDI_V RM 26
+VCCDIFFCLK N 21
+VTT_PCH_VCCUS BCORE
+5VSUS_P CH_VCC5REFSUS
+3VSUS_O RG_VCCPSUS
+5VS_PCH_ VCC5REF
+3VS_VCCP CORE
+3VS_VCCP PCI
+VTT_PCH_VCCIO _SATA3
+VTT_PCH_ORG_ VCCAPLL_S ATA3
+5VSUS_O RG
+VTT_PCH_VCCA _A_DPL
+VTT_PCH_VCCA _B_DPL
+VTT_CPU_VCCP CPU
+VTT_PCH_ORG_ SSCVCC
+VCCDPLL_ CPY
+VTT_PCH_VCCIO _VCC_SATA
+3VSUS_O RG_VCCPAZSUS
+3VS_VCC_ CLKF33
+VTT_PCH_ORG
C2715
C2715
1UF/6.3V
1UF/6.3V
GND
4
+VTT_PCH_ORG
+3VSUS_O RG
L2704 1kOhm/10 0Mhz
L2704 1kOhm/10 0Mhz
+VTT_PCH_ORG
+1.05VM_O RG
+VCCP
EIH
1 2
C2703
C2703
1UF/6.3V
1UF/6.3V
1 2
C2704
C2704
1UF/6.3V
1UF/6.3V
4
+3VA
GND
1 2
@
@
GND
1 2
@
@
GND GND
@
@
C2707
C2707
10UF/10V
10UF/10V
1 2
C2709
C2709
22UF/6.3V
22UF/6.3V
1 2
R2710 0O hm@R2710 0 Ohm@
1 2
1 2
C2740
C2740
22UF/6.3V
22UF/6.3V
C2741
C2741
22UF/6.3V
22UF/6.3V
R2703 0Ohm@R2703 0O hm@
1 2
R2704 0Ohm R27 04 0 Ohm
1 2
R2705 0Ohm@R2705 0O hm@
1 2
0.1UF/16V
0.1UF/16V
2 1
1 2
+VTT_PCH_VCCIO
@
@
GND
1 2
C2710
C2710
22UF/6.3V
22UF/6.3V
GND
GND
1 2
C2714
C2714
0.1UF/16V
0.1UF/16V
+VTT_PCH_VCCA _A_DPL
GND
+VTT_PCH_VCCA _B_DPL
R2708 0Ohm R2708 0Oh m
1 2
C2716
C2716
1UF/6.3V
1UF/6.3V
+VTT_PCH_ORG
GND
+VTT_CPU_VCCP CPU
SP2701
SP2701
1 2
R0603
R0603
C2720
C2720
4.7UF/6.3 V
4.7UF/6.3 V
GND
+VCC_RTC
+VTT_PCH_ORG
L2702
L2702
2 1
1kOhm/1 00Mhz
1kOhm/1 00Mhz
L2703
L2703
1
2
1kOhm/1 00Mhz
1kOhm/1 00Mhz
1 2
C2705
C2705
1 2
GND
SP2715 R0402 S P2715 R0402
1 2
+VCCSUS1
1 2
C2708
C2708
1UF/6.3V
1UF/6.3V
@
@
GND
1 2
1 2
C2711
C2711
C2712
C2712
1UF/6.3V
1UF/6.3V
1UF/6.3V
1UF/6.3V
GND
+VCCAFDI_V RM
+VTT_PCH_ORG_ SSCVCC
1 2
0Ohm
0Ohm
R2709
R2709
C2717
C2717
1UF/6.3V
1UF/6.3V
GND
C2719
C2719
1UF/6.3V
1UF/6.3V
GND
1 2
GND
6uA
1 2
C2723
C2723
1UF/6.3V
1UF/6.3V
GND
+VTT_PCH_VCCA CLK
+VCCPDSW
PCH_VCCDSW
C2706
C2706
@
@
+3VS_VCC_ CLKF33
0.1UF/16V
0.1UF/16V
+VCCAPLL_ CPY_PCH
GND
+VCCDPLL_ CPY
1 2
C2713
C2713
1UF/6.3V
1UF/6.3V
GND
+VCCRTCEXT
+VCCDIFFCLK
+VCCDIFFCLK N
1 2
0.1UF/16V
0.1UF/16V
1 2
C2718
C2718
GND
+V1.05VM_ ORG_VCCSUS
1 2
1 2
C2722
C2722
C2721
C2721
0.1UF/16V
0.1UF/16V
0.1UF/16V
0.1UF/16V
GND
1 2
C2724
C2724
0.1UF/16V
0.1UF/16V
GND
+3VSUS +3VSUS_O RG
+5VSUS +5VSUS_O RG
+1.05VS +1.05VM_O RG
2
+3VS +3VS_VCC3_3
U2001I
U2001I
AY4
VSS159
AY42
VSS160
AY46
VSS161
AY8
VSS162
B11
VSS163
B15
VSS164
B19
VSS165
B23
VSS166
B27
VSS167
B31
VSS168
B35
VSS169
B39
VSS170
B7
VSS171
F45
VSS172
BB12
VSS173
BB16
D D
C C
B B
A A
BB20
BB22
BB24
BB28
BB30
BB38
BB4
BB46
BC14
BC18
BC2
BC22
BC26
BC32
BC34
BC36
BC40
BC42
BC48
BD46
BD5
BE22
BE26
BE40
BF10
BF12
BF16
BF20
BF22
BF24
BF26
BF28
BD3
BF30
BF38
BF40
BF8
BG17
BG21
BG33
BG44
BG8
BH11
BH15
BH17
BH19
H10
BH27
BH31
BH33
BH35
BH39
BH43
BH7
D3
D12
D16
D18
D22
D24
D26
D30
D32
D34
D38
D42
D8
E18
E26
G18
G20
G26
G28
G36
G48
H12
H18
H22
H24
H26
H30
H32
H34
F3
COUGAR_P OINT_ES1
COUGAR_P OINT_ES1
GND
+3VS_VCC3 _3
R2701 0Ohm@R2701 0O hm@
L2701 1kOhm/1 00Mhz L2701 1kOhm/ 100Mhz
VSS174
VSS175
VSS176
VSS177
VSS178
VSS179
VSS180
VSS181
VSS182
VSS183
VSS184
VSS185
VSS186
VSS187
VSS188
VSS189
VSS190
VSS191
VSS192
VSS193
VSS194
VSS195
VSS196
VSS197
VSS198
VSS199
VSS200
VSS201
VSS202
VSS203
VSS204
VSS205
VSS206
VSS207
VSS208
VSS209
VSS210
VSS211
VSS212
VSS213
VSS214
VSS215
VSS216
VSS217
VSS218
VSS219
VSS220
VSS221
VSS222
VSS223
VSS224
VSS225
VSS226
VSS227
VSS228
VSS229
VSS230
VSS231
VSS232
VSS233
VSS234
VSS235
VSS236
VSS237
VSS238
VSS239
VSS240
VSS241
VSS242
VSS243
VSS244
VSS245
VSS246
VSS247
VSS248
VSS249
VSS250
VSS251
VSS252
VSS253
VSS254
VSS255
VSS256
VSS257
VSS258
1 2
5
H46
VSS259
K18
VSS260
K26
VSS261
K39
VSS262
K46
VSS263
K7
VSS264
L18
VSS265
L2
VSS266
L20
VSS267
L26
VSS268
L28
VSS269
L36
VSS270
L48
VSS271
M12
VSS272
P16
VSS273
M18
VSS274
M22
VSS275
M24
VSS276
M30
VSS277
M32
VSS278
M34
VSS279
M38
VSS280
M4
VSS281
M42
VSS282
M46
VSS283
M8
VSS284
N18
VSS285
P30
VSS286
N47
VSS287
P11
VSS288
P18
VSS289
T33
VSS290
P40
VSS291
P43
VSS292
P47
VSS293
P7
VSS294
R2
VSS295
R48
VSS296
T12
VSS297
T31
VSS298
T37
VSS299
T4
VSS300
W34
VSS301
T46
VSS302
T47
VSS303
T8
VSS304
V11
VSS305
V17
VSS306
V26
VSS307
V27
VSS308
V29
VSS309
V31
VSS310
V36
VSS311
V39
VSS312
V43
VSS313
V7
VSS314
W17
VSS315
W19
VSS316
W2
VSS317
W27
VSS318
W48
VSS319
Y12
VSS320
Y38
VSS321
Y4
VSS322
Y42
VSS323
Y46
VSS324
Y8
VSS325
BG29
VSS326
N24
VSS327
AJ3
VSS328
AD47
VSS329
B43
VSS330
BE10
VSS331
BG41
VSS332
G14
VSS333
H16
VSS334
T36
VSS335
BG22
VSS336
BG24
VSS337
C22
VSS338
AP13
VSS339
M14
VSS340
AP3
VSS341
AP1
VSS342
BE16
VSS343
BC16
VSS344
BG28
VSS345
BJ28
VSS346
+3VS_VCC_ CLKF33
2 1
5
1 2
C2701
C2701
10UF/10V
10UF/10V
GND GND
1 2
C2702
C2702
1UF/6.3V
1UF/6.3V
+VTT_PCH_VCCIO
GND
+VTT_PCH_VCCA _A_DPL
+VTT_PCH_VCCA _B_DPL
1
SP2716
SP2716
R0402
R0402
+1.05VM_O RG
2
1 2
GND
+VTT_PCH_VCCA _A_DPL
1 2
R2702
R2702
0Ohm
0Ohm
@
@
+VTT_PCH_VCCA _B_DPL
2
+3VS
+12VS
+12VSUS
+3VM_SPI
R2859 0Ohm R2859 0Ohm
R2860 0Ohm R2860 0Ohm
+3VS 4,16,17,20,21,22,23,24,25,26,27,30,32,36, 37,40,44,45,46,48,50,51,53,54,55,57,69,91,92
+12VS 36,48,91
+12VSUS 22,81,91
+3VM_SPI 26
SPI_CLK_EC 30
SPI_SI_EC 30
SPI_CLK 20
SPI_SI 20
PCH EC
(32Mb)
HOLD#(IO3)
DI(IO0)
3
0.1UF/16V
0.1UF/16V
VCC
CLK
C2802
C2802
+3VM_SPI
1 2
R2831
R2831
R1.3
4.7KOhm
4.7KOhm
SPI_HOLD#
SPI_CLK_R
SPI_SI_R
1 2
8
7
6
5
1 2
1 2
R2848 33Ohm R2848 33Ohm
1 2
R2849 33Ohm R2849 33Ohm
1 2
+3VM_SPI
4
SP2804 R0402 SP2804 R 0402
1 2
SP2802 R0402 SP2802 R 0402
1 2
SP2803 R0402 SP2803 R 0402
1 2
1 2
1 2
U2801
SPI_CS#0_R
R2850 33Ohm R2850 33Ohm
SPI_SO_R
+3VM_SPI_WP#
R2833 4.7KOhm R2833 4.7KOhm
R1.3
U2801
1
CS#
2
DO(IO1)
3
WP#(IO2)
4
GND
MX25L3206EM2I-12G
MX25L3206EM2I-12G
5
D D
PCH SPI ROM
+3VA_EC
+3VSUS
+3VS
R2861 0Ohm@R2861 0Ohm@
R2862 0Ohm R2862 0Ohm
R2863 0Ohm@R2863 0Ohm@
1 2
1 2
1 2
R2847 0Ohm@R2847 0Ohm@
+3VM_SPI
D2801
D2801
1
3
2
1V/0.2A
1V/0.2A
1 2
SPI_CS#0_EC 30
SPI_SO_EC 30
SPI_CS#0 20
SPI_SO 20
2nd source: 0500-00NF000/0500-00J6000
C C
1
<6.5 inch <6.5 inch
SPI ROM
PCH SMBus
2
Q2801A
+3VSUS
+3VSUS
+3VSUS +3VSUS
SCL_3A 21
PCH
SDA_3A 21
B B
+3VS
+3VS
+3VS +3VS
SMB1_CLK 30,74
EC, VGA Thermal
SMB1_DAT 30,74
A A
Q2801A
UM6K1N
UM6K1N
6 1
Q2801B
Q2801B
UM6K1N
UM6K1N
3 4
2
Q2802A
Q2802A
UM6K1N
UM6K1N
6 1
5
remove MOS & pull-hige resitor, because there is the function at page 74
+3VS
+12VS
5 6
5
@
@
1 2
R2801 0Ohm
R2801 0Ohm
1 2
R2802 0Ohm R2802 0Ohm
Q2802B
Q2802B
UM6K1N
UM6K1N
3 4
SP2805 R0402 SP2805 R 0402
SP2806 R0402 SP2806 R 0402
RN2801C
RN2801C
4.7KOhm
4.7KOhm
1 2
1 2
7 8
+12VSUS
+12VS
RN2801D
RN2801D
4.7KOhm
4.7KOhm
SMBUS Link device
SPD
CLKGEN
DEBUG
WLAN
CPU XDP
PCH XDP
+3VS
+3VS
+3VS +3VS
SMB_CLK_S 16,17,53
SMB_DAT_S 16,17,53
+3VSUS
+3VSUS
+3VSUS +3VSUS
SML1_CLK 21
SML1_DAT 21
SMB1_CLK_Thermal 50
SMB1_DAT_Thermal 50
PCH
+3VS
+3VS
+3VS +3VS
Plamrest Thermal
5
4
3
Title :
Title :
Title :
PCH(9)_SPI,SMB
PCH(9)_SPI,SMB
PCH(9)_SPI,SMB
JAY TSAI
JAY TSAI
Engineer:
Engineer:
Size Project Name
Size Project Name
Size Project Name
C
C
C
Date: Sheet of
Date: Sheet of
2
Date: Sheet
EIH31
EIH31
EIH31
Engineer:
1
JAY TSAI
28 99 Friday, December 17, 2010
28 99 Friday, December 17, 2010
28 99 Friday, December 17, 2010
Rev
Rev
Rev
1.3
1.3
1.3
of
5
D D
C C
4
3
2
1
B B
A A
Title :
Title :
Title :
CLK_ICS9LRS3197
CLK_ICS9LRS3197
CLK_ICS9LRS3197
JAY TSAI
JAY TSAI
JAY TSAI
29 99 F riday, December 17, 2010
29 99 F riday, December 17, 2010
29 99 F riday, December 17, 2010
Rev
Rev
Rev
1.3
1.3
1.3
5
4
3
Engineer:
Engineer:
Size Project Name
Size Project Name
Size Project Name
C
C
C
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
EIH31
EIH31
EIH31
Engineer:
1
5
4
3
2
+3VA_EC
+3VSUS
+3VS
+3VA
+3VA_EC 28,32
+3VS 4,16,17,20,21,22,23,24,25,26,27,28, 32,36,37,40,44,45,46,48,50,51,53,54,55,57,69,91,92
+3VSUS 4,22,24 ,27,28,69,81,82,84,92
+3VA 20,27,54,57,60,81,93
1
1 2
C3003
C3003
0.1UF/16V
0.1UF/16V
VSUS_ON
+3VA_EC
+3VA_EC
GND
GND
+3VA
1 2
C3004
C3004
10UF/10V
10UF/10V
GND
+3VS
1 2
C3006
C3006
0.1UF/16V
0.1UF/16V
GND
R3012 10KOhm R3012 10KOhm
R3016 10KOhm R3016 10KOhm
+5VS
RN3002A
RN3002A
RN3002B
RN3002B
R3019 4.7KOhm R3019 4.7KOhm
R3021 4.7KOhm R3021 4.7KOhm
GND
+3VS
R3017 10KOhm R3017 10KOhm
R3018 10KOhm R3018 10KOhm
+3VSUS
R3020 10KOhm R3020 10KOhm
EIH
T3015T3015
+3VA_EC
+3VA_EC
+3VS
GND
+VCCP
GND
T3002T3002
T3008T3008
T3014T3014
T3003T3003
T3016T3016
1
1
SP3006 R0402 SP3006 R0402
1
1
1
R1.1 Remove PWRLIMIT#
1
GND
GND
Remove short pin, have 0 ohmat PCH side
RNX3004A
RNX3004A
1 2
47Ohm
47Ohm
RNX3004B
RNX3004B
3 4
47Ohm
47Ohm
RNX3004C
RNX3004C
5 6
47Ohm
47Ohm
RNX3004D
RNX3004D
7 8
47Ohm
47Ohm
1 2
T3020T3020
1
PCH_FLASH_DESCRIPTOR 20
LPC_AD0 20,44
LPC_AD1 20,44
LPC_AD2 20,44
LPC_AD3 20,44
CLK_KBCPCI_PCH 24
ER 1129
Remvoe the VPS
ALL_SYSTEM_PWRGD 80,92
PWR_LED_standby# 55
A20GATE 25
RCIN# 25
SUSC_EC# 57,91
SUSB_EC# 22,24,57 ,91,92
INT_SERIRQ 20,44
LPC_FRAME# 20,44
PCH_ALERT# 25
BUF_PLT_RST# 4,24,32,40,53,69,70
PM_CLKRUN# 22
EXT_SMI# 25,44
TP_CLK 31
TP_DAT 31
H_PECI_EC 25
ME_AC_PRESENT 22
PM_PWRBTN# 22
PM_RSMRST# 22
CHG_LED_ORANGE# 55
PM_SUSC# 22
LCD_BACKOFF# 45
THRO_CPU 4
SUS_PWRGD 81,92
EXT_SCI# 21
SLP_SUS# 22
PWR_LED# 54,55
KSO17 31
KSO16 31
KSO15 31
KSO14 31
KSO13 31
KSO12 31
KSO11 31
KSO10 31
KSO9 31
KSO8 31
KSO7 31
KSO6 31
KSO5 31
KSO4 31
KSO3 31
KSO2 31 KSO1 31
D D
C C
B B
LAD0
LAD1
LAD2
LAD3
VCCIO_CPU_EC
NUM_LED#
NC_GPIO40
BAT2_IN_OC#
CAP_LED#
NC_GPIO56
KB_ID0
3G_ON#/NC
PCH_FLASH_DESCRIPTOR
128
1
LAD3
2
LCLK
3
LFRAME#
4
VDD
5
GND1
6
GPIO24
7
LRESET#
8
GPIO11/CLKRUN#
9
GPIO65/SMI#
10
GPIO26/PSCLK2
11
GPIO27/PSDAT2
12
VTT
13
PECI
14
GPIO34
15
GPIO36
16
GPIO40/F_PWM
17
GPIO42/TCK
18
GND2
19
VCC1
20
GPIO43/TMS
21
GPIO44/TDI
22
GPIO45/E_PWM
23
GPIO46/TRST#
24
GPIO47/SCL4
25
GPIO50/PSCLK3/TDO
26
GPIO51
27
GPIO52/PSDAT3/RDY#
28
GPIO53/SDA4
29
ECSCI#/GPIO54
30
GPIO55/CLKOUT/IOX_DIN_DIO
31
GPIO56/TA1
32
GPIO15/A_PWM
33
GPIO57/KBSOUT17
34
GPIO60/KBSOUT16
35
KBSOUT15/GPIO61/XOR_OUT
36
KBSOUT14/GPIO62
37
KBSOUT13/GPIO63
38
KBSOUT12/GPIO64
39
C3009 1UF/10V C3009 1UF/10V
1 2
127
LAD1
LAD2
KBSOUT10&P80_CLK
KBSOUT11&P80_DAT
40
GND
+3VA_EC
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
LAD0
SERIRQ
GPIO10/LPCPD#
KBSOUT7
KBSOUT8
KBSOUT9/SDP_VIS#
43
42
41
VCC5
GND6
GPIO16
GPIO23/SCL3
GPIO85/GA20
GPIO31/SDA3
GPIO21/B_PWM
KBRST#/GPIO86
GPIO67/PWUREQ#
GND3
VCORF
45
44
GPIO87/SIN_CR
GPO82/IOX_LDSH/TEST#
GPO83/SOUT_CR/TRIST#
GPIO20/TA2/IOX_DIN_DIO
GPO84/IOX_SCLK/XORTR#
KBSIN3
KBSIN2
KBSIN1
KBSIN0
KBSOUT0/JENK#
KBSOUT1/TCK
KBSOUT2/TMS
KBSOUT3/TDI
KBSOUT4/JEN0#
KBSOUT5/TDO
KBSOUT6/RDY#
VCC2
49
48
47
46
58
57
56
55
54
53
52
51
50
106
107
108
GPIO97
GPIO05
GPIO30
KBSIN6
KBSIN5
KBSIN4
61
60
59
103
104
105
VREF
AGND
GPIO95/DA1
GPIO96/DA2
GPIO94/DA0
GPIO93/AD3
GPIO92/AD2
GPIO91/AD1
GPIO90/AD0
GPIO06/IOX_DOUT
F_SDIO&F_SDIO0
F_SDI&F_SDIO1
VCC_POR#
GPO76/SHBM
GPIO66/G_PWM
GPIO00/EXTCLK
GPIO37/PSCLK1
GPIO35/PSDAT1
GPIO17/SCL1
GPIO22/SDA1
GPIO74/SDA2
GPIO73/SCL2
GPIO33/H_PWM
GPIO32/D_PWM
GPIO01/TB2
GPIO14/TB1
GPIO13/C_PWM
KBSIN7
64
63
62
SCRL_LED#/NC
CRX0/NC
VSUS_ON_EC
EC_CLK_EN/NC
VSET/ME_SLP_M_EC#/NC
U3001
U3001
NPCE794LA0DX
NPCE794LA0DX
102
AVCC
101
ME_PM_SLP_LAN#
100
G_Y_OUT/ME_+VM_PWRGD/NC
99
ME_PM_SLP_M#
98
97
96
GPIO04
95
GPIO03
RFON_SW#
94
GPIO07
IOX_DOUT/NC
93
F_SCK_EC
92
F_SCK
91
GPIO81
F_CS0#_EC
90
F_CS0#
89
GND5
88
VCC4
F_SDIO_EC
87
F_SDI_EC
86
85
PRECHG/NC
84
GPIO77
SHBM
83
3G_ON#
82
GPIO75
81
CAP_ACK#
80
GPIO41
79
GPIO02
78
GND4
77
76
VCC3
75
GPIO72
74
GPIO71
73
GPIO70
72
71
70
69
68
67
66
65
ADPSEL
SP3002 R0402 SP3002 R0402
VREF
EC_AGND
R1.3
no RF Switch
T3022T3022
1
no DISTP_LED#
T3024T3024
1
T3021T3021
1
794L:06V3800000 03
795L:06V3800000 01 (BOM use)
1 2
+3VACC
1 2
1 2
EC_AGND
+3VACC
No cap sensor
1
1
1
1
R3047
R3047
1KOhm
1KOhm
R3048
R3048
100KOhm
100KOhm
1
T3010T3010
T3004T3004
USBP02_EN 69
VSUS_ON 81,93
USBP1_EN 52
CHG_LED_BLUE# 55
AC_IN_OC 74,88,90
VRM_PWRGD 8 0,92
T3006T3006
T3007T3007
1 2
C3010
C3010
1UF/10V
1UF/10V
Change to 5%
R1.3
ME_PWROK 22
ME_PM_SLP_LAN# 22
T3009T3009
ME_PM_SLP_M# 22
AD_IINP 88
BAT1_IN_OC# 90
PWR_SW # 54
CPU_VRON 80
GND
+3VA_EC
EC_RST# 32
T3011T3011
1
T3012T3012
1
3G_ON# 69
FAN0_PWM 50
ME_SUSPWRDNACK 22
GND
SUSCLK 22
+3VA_EC
LID_SW# 45,54
PM_SUSB# 22
OP_SD# 37
VPS_EC 74
CRT_IN#_EC 46
SMB0_CLK 60,88
SMB0_DAT 60,88
SMB1_DAT 28,74
SMB1_CLK 28,74
EC_SPKR 36
LCD_BL_PWM 45
FAN0_TACH 50
T3013T3013
1
PM_PWROK 22
KSI7 31
KSI6 31
KSI5 31
KSI4 31
KSI3 31
KSI2 31
KSI1 31
KSI0 31
KSO0 31
Remove short pin, have short pin at PCH side
Remove short pin, have short pin at PCH side
R1.1
EIH
AC_IN_OC is active high,
OD pull high at power
EIH
SPI_CLK_EC 28
SPI_CS#0_EC 28
SPI_SI_EC 28
SPI_SO_EC 28
For NPCE795 Power
+3VA_EC
1 2
C3001
C3001
10UF/10V
10UF/10V
GND
1 2
R3002 0Ohm R3002 0Ohm
GND
For PU / PD
+3VA_EC
No cap sensor
R3004 47KOhm R3004 47KOhm
1 2
R3005 47KOhm R3005 47KOhm
1 2
RN3001A
RN3001A
1 2
4.7KOhm
4.7KOhm
RN3001B
RN3001B
3 4
4.7KOhm
4.7KOhm
+3VS
RN3001D
RN3001D
7 8
4.7KOhm
4.7KOhm
RN3001C
RN3001C
5 6
4.7KOhm
4.7KOhm
PM_SUSB#
PM_SUSC#
CPU_VRON
PM_RSMRST#
AC_IN_OC is pulled high at power
VSUS_ON
+3VA_EC
R3006 100KOhm R3006 100 KOhm
1 2
R3007 100KOhm R3007 100 KOhm
1 2
R3009 100KOhm R3009 100 KOhm
1 2
No cap sensor
R3011 10KOhm R3011 10KOhm
1 2
R3008 100KOhm
R3008 100KOhm
1 2
@
@
Remove Vsus_ON pull hight to +3VSUS
R1.3 VSUS_ON Pull High to +3VA_EC
1 2
1 2
C3002
C3002
0.1UF/16V
0.1UF/16V
EC_AGND
BAT1_IN_OC#
BAT2_IN_OC#
SMB0_CLK
SMB0_DAT
SMB1_DAT
SMB1_CLK
R3054 1 00KOhm R3054 100KOhm
L3001
L3001
120Ohm/100Mhz
120Ohm/100Mhz
2 1
1 2
R3001 0Ohm R3001 0Ohm
1 2
1 2
ER1.22
1 2
4.7KOhm
4.7KOhm
3 4
4.7KOhm
4.7KOhm
1 2
1 2
1 2
1 2
1 2
+3VA_EC
GND
+3VACC
EC_AGND
1 2
C3005
C3005
0.1UF/16V
0.1UF/16V
1 2
C3007
C3007
0.1UF/16V
0.1UF/16V
LID_SW#
R1.1
PWR_SW #
TP_CLK
TP_DAT
A20GATE
RCIN#
PM_PWRBTN#
SUSB_EC#
SUSC_EC#
A A
Title :
Title :
Title :
NPCE794L
NPCE794L
NPCE794L
JAY TSAI
JAY TSAI
JAY TSAI
Engineer:
Engineer:
5
4
3
Size Project Name
Size Project Name
Size Project Name
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
EIH31
EIH31
EIH31
1
Engineer:
Rev
Rev
Rev
1.3
1.3
1.3
30 99 Friday, December 17, 2010
30 99 Friday, December 17, 2010
30 99 Friday, December 17, 2010
1
TP_SW_R
SW3102
SW3102
1
1
3
3
TACT_SWITCH_5P
TACT_SWITCH_5P
3
+5VS
+5VS 27,30,36,37,46,48,50,51,54,55,57,80,91
D3109
2
2
4
4
5
5
1 2
AZ2025-01H.R7G
AZ2025-01H.R7G
07V220000006
07V220000006
D3109
@
@
TP_SW_L
TP_SW_R
1 2
4
C3101
C3101
0.1UF/16V
0.1UF/16V
TP_CLK 30
TP_DAT 30
5
D D
+5VS
Touch Pad
8
SIDE2
7
SIDE1
FPC_CON_6P
C C
FPC_CON_6P
12V17GISM014
12V17GISM014
J3102
J3102
1 2
SP3101
SP3101
R0603
R0603
6
6
5
5
4
4
3
3
2
2
1
1
SW3101
SW3101
1
1
3
3
TACT_SWITCH_5P
TACT_SWITCH_5P
2
TP_SW_L
2
4
5
2
4
5
1 2
AZ2025-01H.R7G
AZ2025-01H.R7G
07V220000006
07V220000006
D3106
D3106
@
@
Keyboard
J3101
J3101
26
26
28
B B
27
FPC_CON_26P
FPC_CON_26P
A A
25
25
SIDE2
24
24
23
23
22
22
21
21
20
20
19
19
18
18
17
17
16
16
15
15
14
14
13
13
12
12
11
11
10
10
9
9
8
8
7
7
6
6
5
5
4
4
3
3
2
2
SIDE1
1
1
The pin define is checked to keyboard spec. R is KSO, C is KSI. The connector pin define is the same the KB.
KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
KSO16
KSO17
KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
KSO0 30
KSO1 30
KSO2 30
KSO3 30
KSO4 30
KSO5 30
KSO6 30
KSO7 30
KSO8 30
KSO9 30
KSO10 30
KSO11 30
KSO12 30
KSO13 30
KSO14 30
KSO15 30
KSO16 30
KSO17 30
KSI0 30
KSI1 30
KSI2 30
KSI3 30
KSI4 30
KSI5 30
KSI6 30
KSI7 30
5
4
3
KSO12
KSO13
KSO14
KSO15
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSI4
KSI5
KSI6
KSI7
KSO0
KSO1
KSO2
KSO3
KSI0
KSI1
KSI2
KSI3
KSO16
KSO17
CN3101A
CN3101A
1 2
33PF/50V
33PF/50V
CN3101B
CN3101B
3 4
33PF/50V
33PF/50V
CN3101C
CN3101C
5 6
33PF/50V
33PF/50V
CN3101D
CN3101D
7 8
33PF/50V
33PF/50V
CN3102A
CN3102A
1 2
33PF/50V
33PF/50V
CN3102B
CN3102B
3 4
33PF/50V
33PF/50V
CN3102C
CN3102C
5 6
33PF/50V
33PF/50V
CN3102D
CN3102D
7 8
33PF/50V
33PF/50V
CN3103A
CN3103A
1 2
33PF/50V
33PF/50V
CN3103B
CN3103B
3 4
33PF/50V
33PF/50V
CN3103C
CN3103C
5 6
33PF/50V
33PF/50V
CN3103D
CN3103D
7 8
33PF/50V
33PF/50V
CN3104A
CN3104A
1 2
33PF/50V
33PF/50V
CN3104B
CN3104B
3 4
33PF/50V
33PF/50V
CN3104C
CN3104C
5 6
33PF/50V
33PF/50V
CN3104D
CN3104D
7 8
33PF/50V
33PF/50V
CN3105A
CN3105A
1 2
33PF/50V
33PF/50V
CN3105B
CN3105B
3 4
33PF/50V
33PF/50V
CN3105C
CN3105C
5 6
33PF/50V
33PF/50V
CN3105D
CN3105D
7 8
33PF/50V
33PF/50V
CN3106A
CN3106A
1 2
33PF/50V
33PF/50V
CN3106B
CN3106B
3 4
33PF/50V
33PF/50V
CN3106C
CN3106C
5 6
33PF/50V
33PF/50V
CN3106D
CN3106D
7 8
33PF/50V
33PF/50V
C3102 33PF/50V C3102 33PF/50V
1 2
C3103 33PF/50V C3103 33PF/50V
1 2
Title :
Title :
Title :
EC_IT8512(2)KB, TP,FP
EC_IT8512(2)KB, TP,FP
EC_IT8512(2)KB, TP,FP
JAY TSAI
JAY TSAI
Engineer:
Engineer:
Size Project Name
Size Project Name
Size Project Name
C
C
C
Date: Sheet of
Date: Sheet of
2
Date: Sheet
EIH31
EIH31
EIH31
Engineer:
1
JAY TSAI
31 99 Friday, December 17, 2010
31 99 Friday, December 17, 2010
31 99 Friday, December 17, 2010
Rev
Rev
Rev
1.3
1.3
1.3
of