Acer Aspire 3670, Aspire 5550 Schematics

A

Garda-3 Block Diagram

Garda-3 Block DiagramGarda-3 Block Diagram

(Discrete)

4 4

DDR2

533 MHz

3 3

Line In

30

MIC In

INT.MIC

Line Out (SPDIF)

30

2 2

30

INT.SPKR

1 1

CLK GEN.

IDT CV125PA (ICS 954206)

DDR2

RJ11

3

533/667MHz

11,12

533/667MHz

11,12

Codec

ALC883

AZALIA

29

OP AMP

MAX4411

30

OP AMP

G1432Q

30

MODEM

MDC Card

New card

PWR SW TPS2231

21

PCI Express

31

Yonah 478

Ver.:A2 :71.945PM.00U / QK46

HDD

20

B

Mobile CPU

HOST BUS

400/533/667MHz

Calistoga

6,7,8,9,10

DMI I/F

100MHz

ICH7M

Ver. : B0, 71.ICH7M.A0U / QK65

15,16,17,18

PATA

SATA

CDROM

USB

3 PORT

21

MINI USB Blue-tooth

20

4, 5

G791/G792

PCI Express x16

M56 Ver.: B24 M52 Ver.: A12 M54 Ver.: A12

PCI BUS

PCIEx1

SPI I/F

LPC BUS

21

C

19

ATI M54P / M52P

45,46,47,48,49

VRAM x4

128/256M

50,51

ENE CB1410

CARDBUS

24,25

RICOH R5C832

1394

CardReader

27,28

LAN

GIGA or 10/100 RTL8110 or RTL8 100CL

BIOS

SST25LF080A

35

SIO

NS87381

FIR

34

Mini-PCI

802.11A/B/G

22

KBC

Renesas

RE144B

Touch Pad

33 33

D

Project code: 91.4P401.001 PCB P/N : 55.4P401.XXX REVISION : 06208-2 (Hannstar, GCE)

DATE:2006/0?/??

TVO

14

LVDS

14"WSXGA+ LCD

RGB CRT

PCMCIA I/F

CRT

PCMCIA

13

14

SLOT

PWR SW

TPS2211

25

Support TypeII

1394

28

CONN

TXFM

23

Mini Card*1

802.11A/B/G

MS/MS Pro/xD/ MMC/SD/SDIO

6 in 1

31

RJ45

23

26

Thermal

G792SFUF

32

INT. KB

FAN CONN

TOP

VCC

GND

BOTTOM

25

19

PCB STACKUP

S

28

LPC

DEBUG CONN.

BOM

Title

Size Document N umber Rev

Size Document N umber Rev A3

A3

Date: Sheet of

35

BLOCK DIAGRAM

E

SYSTEM

TPS51120

INPUTS

DCBATOUT

40

OUTPUTS

5V_S5

3D3V_S5

SYSTEM DC/DC

APL5912

INPUTS OUTPUTS

1D8V_S3

TPS51116

DCBATOUT

APL5332KAC

3D3V_S0 2D5V_S0

APL5912

1D8V_S3 1D5V_S0

MAXIM CHARGER

DCBATOUT

INPUTS

DCBATOUT

DDR_VREF_S0

ISL6255

OUTPUTSINPUTS

CHG_PWR

18V 4.0A

UP+5V

5V 100mA

CPU

ISL6262

OUTPUTS

VCC_CORE_S0

0~1.3V 44A

43

1D05V_S0

41

1D8V_S3

43

42

38,39

ATI M52 DC/DC

ISL6269

INPUTS

DCBATOUT

1D8V_S0 1D2V_S0

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

AG3 2

OUTPUTS

VGA_CORE_S0

APL5331

1 55Thursday, April 20, 2006

52

43

A

ICH7M Integrated Pull-up and Pull-down Resistors

EE_DIN, EE_DOUT,

GNT[4]#/GPIO48,

LAD[3:0]#/FHW[3:0]#,

LDRQ[0], LDRQ[1]/GPIO[41],

4 4

PWRBTN#,

DD[7],

DDREQ

ACZ_BIT_CLK, ACZ_RST#, ACZ_SDIN[2:0],

EE_CS,

SPI_ARB, SPI_CLK,

USB[7:0][P,N]

LAN_CLK

GNT[3:0],

GNT[5]#/GPO17,

TP[3]

ACZ_SYNC,ACZ_SDOUT,

GPIO[25],

PME#,

LAN_RXD[2:0]

DPRSLPVR/GPIO16,

SPKR,

ICH7 internal 20K pull-ups

ICH7 internal 11.5K pull-downs

ICH7 internal 20K pull-downs

ICH7 internal 15K pull-downs

ICH7 internal 15K pull-upSATALED#

ICH7 internal 100K pull-down

ICH7-M EDS 17837 1.5V1

ICH7M IDE Integrated Series Termination Resistors

3 3

DD[15:0],

DDACK#,

DCS3#,

IORDY,

IDEIRQ

DIOR#, DREQ,DIOW#,

DA[2:0],

DCS1#,

approximately 33 ohm

ICH7M Functional Strap Definitions

Signal

ACZ_SDOUT

ACZ_SYNC

EE_CS

EE_DOUT

2 2

GNT2#

GNT3#

GNT5#/ GPIO17#, GNT4#/ GPIO48

DPRSLPVR Reserved

GPIO25

INTVRMEN

LINKALERT#

REQ[4:1]#

1 1

SATALED#

SPKR

TP3

Usage/When Sampled

XOR Chain Entrance/ PCIE Port Config bit1, Rising Edge of PWROK

PCIE bit0, Rising Edge of PWROK.

Reserved

Top-Block Swap Override. Rising Edge of PWROK.

Boot BIOS Destination Selection. Rising Edge of PWROK.

Reserved. Rising Edge of RSMRST#.

Integrated VccSus1_05 VRM Enable/Disable. Always sampled.

Reserved

XOR Chain Selection. Rising Edge of PWROK.

Reserved This signal should not be pull low.

No Reboot. Rising Edge of PWROK.

XOR Chain Entrance. Rising Edge of PWROK.

Allows entrance to XOR Chain testing when TP3 pulled low.When TP3 not pulled low at rising edge of PWROK,sets bit1 of RPC.PC(Config Registers: offset 224h)

Sets bit0 of RP C.PC(Config Reg isters:Offset 2 24h)

This signal should not be pull high.

This signal should not be pull low.

Sampled low:Top-Block Swap mode(inverts A16 for all cycles targeting FWH BIOS space). Note: Software will not be able to clear the Top-Swap bit until the system is rebooted without GNT3# being pulled down.

Controllable via Boot BIOS Destination bit (Config Registers:Offset 3410h:bit 11:10). GNT5# is MSB, 01-SPI, 10-PCI, 11-LPC.

This signal should not be pull high.

This signal should not be pull low.

Enables integrated VccSus1_05 VRM when sampled high

Requires an external pull-up resistor.

TBD, Chapter 8.

If sampled high, the system is strapped to the "No Reboot" mode(ICH7 will disable the TCO Timer system reboot feature). The status is readable via the NO REBOOT bit.

This signal should not be pull low unless using XOR Chain testing.

Comment

B

954305D 27Mhz/LCDCLK Spread and Frequency Selection Table

SS3

SS2 bit6

0

1

1 1

0

0 0

001

0

1

SS1 bit5

1

0

1

0

1

0

1

Byte9 bit 7

0 0 0

0 000

0

1 +-0.25 Center

1

1 1

PCI Routing

1410

page 16

MiniPCI

LAN

1394 17 A->B, B->F, 3

22

21

23

SS0 bit4

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

C

Spread Amount%

-0.50 Down

-1.00 Down

-1.50 Down

-2.00 Down

-0.75 Down

-1.25 Down

-1.75 Down

-2.25 Down

+-0.5 Center

+-0.75 Center

+-1.0 Center

+-0.25 Center

+-0.5 Center

+-0.75 Center

+-1.0 Center

page 16

INT -> PIRQ

A->G

A/C -> E B/D -> E

A -> H

D

E

Calistoga Strapping Signals and Configuration

page 3

REQ/GNTIDSEL

0

1

2

Pin Name

CFG[2:0]

CFG[4:3]

CFG5

CFG7

CFG8

CFG9

CFG[11:10] Reserved

CFG[13:12]

CFG[15:14]

CFG16

CFG17

CFG18

CFG19

CFG20

SDVOCRTL _DATA

All strap signals are sampled with respect to the leading

NOTE:

edge of the Calistoga GMCH PWORK in signal.

Strap Description

FSB Frequency Select

Reserved

DMI x2 Select

ReservedCFG6

CPU Strap

Reserved

PCI Express Graphics Lane Reversal

XOR/ALL Z test straps

Reserved

FSB Dynamic ODT

Global R-comp Disable (All R-comps)

VCC Select

DMI Lane Reversal

SDVO/PCIE Concurrent

SDVO Present

EDS 17050 0.71

Configuration

001 = FSB533 011 = FSB667 others = Reserved

0 = DMI x2

1 = DMI x4

0 = Reserved

1 =Mobile CPU(D efault)

0 = Reverse Lanes,15->0,14->1 ect..

1= Normal opera tion(Default):L ane Numbered i n order

00 = Reserved 01 = XOR mode enabled 10 = All Z mode enabled

11 = Normal Operation

(Default)

Reserved

0 = Dynamic ODT Disabled

1 = Dynamic ODT Enabled

0 = All R-comp Disable

1 = Normal Operation (Default)

0 = 1.05V

1 = 1.5V

0 = Normal operation (Default):lane Numbered in order

1 =Reverse Lane,4->0,3->1 ect...

0 = Only SDVO or PCIE x1 is operational (Default)

1 =SDVO and PCIE x1 are operating simultaneously via the PEG port

0 = No SDVO Card present

1= SDVO Card present

(Default)

page 7

(Default)

History

BOM

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document N umber Rev

Size Document N umber Rev A3

A3

Date: Sheet of

Reference

Taipei Hsien 221, Taiwan, R.O.C.

AG3 2

2 55Thursday, April 20, 2006

A

B

C

D

E

3D3V_S0

R222

0R3-0-U-GP

12

C319

C653

SCD1U16V2ZY-2GP

Dummy when use UMA

C319 SCD1U16 V2ZY-2GP

SCD1U16 V2ZY-2GP

DREFSSC LK 7 DREFSSC LK# 7

CLK_MCH _3GPLL 7 CLK_MCH _3GPLL# 7

CLK_PCIE_ ICH 16 CLK_PCIE_ ICH# 16

CLK_PCIE_ MINI2 5 5 CLK_PCIE_ MINI2# 55

CLK_PCIE_ SATA 15 CLK_PCIE_ SATA# 15

CLK_PCIE_ NEW 31 CLK_PCIE_ NEW# 3 1

CLK_PCIE_ MINI1 2 6 CLK_PCIE_ MINI1# 26

CLK_PCIE_ PEG 45 CLK_PCIE_ PEG# 45

CLK_CPU _BCLK 4 CLK_CPU _BCLK# 4

CLK_MCH _BCLK 6 CLK_MCH _BCLK# 6 PM_STPC PU# 16 CPU_SEL 2 4,7 CPU_SEL 1 4,7 CLK48_ICH 16

CPU_SEL 0 4,7

1 2 3

CLK14_S IO34 CLK_ICH1416

3D3V_S0

R530

3D3V_48 MPWR_S0

12

0R3-0-U-GP

R223 3 3R2J-2-GPR223 33R2J-2-G P

1 2

R227 3 3R2J-2-GPR227 33R2J-2-G P

1 2

R228 3 3R2J-2-GPR228 33R2J-2-G P

1 2

R229 2 2R2J-2-GPR229 22R2J-2-G P R231 3 3R2J-2-GPR231 33R2J-2-G P

1 2

R225 2 2R2J-2-GPR225 22R2J-2-G P R233 3 3R2J-2-GPR233 33R2J-2-G P

1 2

R525 3 3R2J-2-GPR525 33R2J-2-G P

1 2

H/L : CPU_ITP/SRC7

RN50

4

GM

GEN_XTA L_IN

1 2

R224 4 70R2J-2-GPR224 4 70R2J-2-GP R232 2 2R2J-2-GPR232 22R2J-2-G P

1 2

R230

1 2

22R2J-2-G P

Do Not Stuff

12

3D3V_S0

R526

DY

1 2

R523

DREFCLK _1

DREFCLK #_1

R529

12

C647

C647 SC1U6D3 V2ZY-GP

SC1U6D3 V2ZY-GP

PCLKCLK 0 PCLKCLK 1 PCLKCLK 2

PCLKCLK 2 PCLKCLK 3

SS_SEL ITP_EN

10KR2J-3 -GP

GEN_XTA L_OUT

GEN_REF

12

475R2F-L 1-GP

GEN_IREF

12

C320

SC4D7U10V5ZY-3GP

56

PCI0

3

PCI1

4

PCI2

5

PCI3

9

PCIF1/SEL100/96#

8

PCIF0/ITP_EN

55

PCI_STOP#

46

SCL

47

SDA

14

DOT96

15

DOT96#

50

XTAL_IN

49

XTAL_OUT

52

REF

39

IREF

10

VTT_PWRGD#/PD

2

VSS_PCI

6

VSS_PCI

51

VSS_REF

45

VSS_CPU

38

VSSA

13

VSS48

29

VSS_SRC

IDTCV125P AG-GP 71.00125 .A0W

12

CPU2_ITP/SRC7

CPU2_ITP#/SRC7#

CPU_STOP#

FSC/TEST_SEL

FSB/TEST_MODE

USB48/FSA

3D3V_CL KGEN_S0

C325

SCD1U16V2ZY-2GP

U34

LVDS

LVDS#

SRC1

SRC1#

SRC2

SRC2#

SRC3

SRC3#

SRC4

SRC4#

SRC5

SRC5#

SRC6

SRC6#

CPU0

CPU0#

CPU1

CPU1#

VDD_SRC VDD_SRC

VDD_PCI VDD_PCI

VDD_REF VDD_CPU

VDDA

VDD48

VDD_SRC

12

C651

SCD1U16V2ZY-2GP

17 18

CLK_MCH _3GPLL_1

19

CLK_MCH _3GPLL_1#

20

CLK_PCIE_ ICH_1

22

CLK_PCIE_ ICH_1#

23

CLK_PCIE_ MINI2_1CLK_PCIE_ MINI2_1CLK_PCIE_ MINI2_1

24

CLK_PCIE_ MINI2_2#CLK_PCIE_ MINI2_2#CLK_PCIE_ MINI2_2#

25

CLK_PCIE_ SATA_1

26

CLK_PCIE_ SATA_1#

27

CLK_PCIE_ NEW_1

31

CLK_PCIE_ NEW_1#

30

CLK_PCIE_ MINI1_1

33

CLK_PCIE_ MINI1_1#

32

CLK_PCIE_ PEG_1

36

CLK_PCIE_ PEG_1#

35

CLK_CPU _BCLK_1

44

CLK_CPU _BCLK_1#

43 41

CLK_MCH _BCLK_1

40

CLK_MCH _BCLK_1#

54

CPU_SEL 2

53

CPU_SEL 1

16 12

34 21

7 1

48 42 37 11 28

12

C655

SCD1U16V2ZY-2GP

DREFSSC LK_1 DREFSSC LK#_1

CLK48

R235 2 2R2J-2-GPR235 22R2J-2-G P

1 2

R236 2 K2R2J-2-GPR236 2K2R2J -2-GP

1 2

3D3V_CL KGEN_S0

3D3V_CL KPLL_S0 3D3V_48 MPWR_S0

12

C645

SCD1U16V2ZY-2GP

RN54 SRN33J-5 -GP-U

RN59 SRN33J-5 -GP-URN59 SRN33J-5 -GP-U

RN61 SRN33J-5 -GP-URN61 SRN33J-5 -GP-U

RN106

RN106 RN65 Do Not Stuff

RN65 Do Not Stuff

RN66 Do Not Stuff

RN62 SRN33J-5 -GP-U

RN56 Do Not Stuff

RN47 SRN33J-5 -GP-URN47 SRN33J-5 -GP-U

RN51 SRN33J-5 -GP-URN51 SRN33J-5 -GP-U

12

2 3 1

GM

2 3 1

MINIC2

2 3 1

SATA

1 2 3

NEW

1 2 3

MINIC

1 2 3

ATI

1 2 3

C648

SCD1U16V2ZY-2GP

4

Do Not Stuff

4

12

3D3V_S0

3D3V_CL KPLL_S0

12

R532

4 4

Do Not Stuff

3 3

2 2

C321

DY

3D3V_S0

0R3-0-U-GP

12

R522

R522 10KR2J-3 -GP

10KR2J-3 -GP

SS_SEL

H/L: 100/96MHz

12

R524

R524 Do Not Stuff

Do Not Stuff

DY

PCLK_FWH & PCLK_PCM need equal length

SC27P50 V2JN-2-GP

SC33P50 V2JN-3GP

C323

1 2

C322

1 2

R532

12

C321

12

SA

DREFCLK7

DREFCLK #7

12

C650

C650 SC1U6D3 V2ZY-GP

SC1U6D3 V2ZY-GP

SA

PCLK_R5 C83227 PCLK_KB C32 PCLK_MINI31 PCLK_PC M24 PCLK_SIO34 PCLK_FW H35 PCLK_LA N22 CLK_ICHPC I16

PM_STPP CI#16

SMBC_ICH11,18

SMBD_ICH11,18

GEN_XTA L_OUT_R

X3

X-14D318 18M-31GP

82.30005 .831

SRN33J-5 -GP-U

CLK_EN#38

RN63

CLK_PCIE_ MINI1 CLK_PCIE_ MINI1#

SRN49D9 F-GP

CLK_PCIE_ SATA CLK_PCIE_ SATA#

Do Not Stuff

CLK_PCIE_ ICH CLK_PCIE_ ICH#

SRN49D9 F-GP

CLK_PCIE_ MINI2 CLK_PCIE_ MINI2#

Do Not Stuff

1 1

A

B

Do Not Stuff

CLK_PCIE_ NEW CLK_PCIE_ NEW#

Do Not Stuff

RN63

1

MINIC

2 3

RN64

2 3

SATA

1

RN60

2 3 1

RN107

2 3 1

MINIC2

RN67

1

NEW

2 3

4

C

DREFSSC LK# DREFSSC LK

SRN49D9 F-GP

DREFCLK # DREFCLK

SRN49D9 F-GP

CLK_CPU _BCLK CLK_CPU _BCLK#

SRN49D9 F-GP

CLK_MCH _BCLK CLK_MCH _BCLK#

SRN49D9 F-GP

CLK_PCIE_ PEG CLK_PCIE_ PEG#

Do Not Stuff

CLK_MCH _3GPLL CLK_MCH _3GPLL#

RN53

1

4

2 3

RN49

1

4

2 3

RN48

1

4

2 3

RN52

1

4

2 3

RN57

1

4

2 3

2 3 1

4

RN58 SRN49D9 F-GPRN58 SRN49D9 F-GP

ATI

SC

D

PCLK_SIO

CLK_ICH14

PCLK_MINI

PCLK_PC M

PCLK_KB C

CLK_ICHPC I

CLK48_ICH

EC24 SC 10P50V2JN-4GPEC24 SC 10P50V2JN-4GP

1 2

EC23 Do Not Stuff

1 2

DY

EC25 SC 10P50V2JN-4GPEC25 SC 10P50V2JN-4GP

1 2

EC22 SC 10P50V2JN-4GPEC22 SC 10P50V2JN-4GP

1 2

EC47 Do Not Stuff

1 2

DY

EC48 Do Not Stuff

1 2

DY

EC26 SC 10P50V2JN-4GPEC26 SC 10P50V2JN-4GP

1 2

BOM

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document N umber Rev

Size Document N umber Rev A3

A3

Date: Sheet of

Clock Generator ICS954305D

Taipei Hsien 221, Taiwan, R.O.C.

AG3 2

3 55Friday, April 21, 2006

E

EMI capacitor

A

B

C

D

E

H_RS#0 H_RS#1 H_RS#2

XDP_BPM #0 XDP_BPM #1 XDP_BPM #2 XDP_BPM #3 XDP_BPM #4 XDP_BPM #5 XDP_TCK

XDP_TDI

XDP_TDO XDP_TMS XDP_TRS T# XDP_DBR ESET#

RN24 SRN0J-6-G PRN24 SRN0J-6-GP

1 2 3

TP32 Do Not StuffTP32 Do Not Stuff

TP16 Do Not StuffTP16 Do Not Stuff TP18 Do Not StuffTP18 Do Not Stuff

TP50 Do Not StuffTP50 Do Not Stuff TP15 Do Not StuffTP15 Do Not Stuff TP10 Do Not StuffTP10 Do Not Stuff TP13 Do Not StuffTP13 Do Not Stuff

Do Not Stuff

TP23 Do Not StuffTP23 Do Not Stuff

H_ADS# 6 H_BNR# 6

H_BPRI# 6

H_DEFER # 6 H_DRDY# 6 H_DBSY# 6

H_BREQ# 0 6

H_INIT# 15

H_LOCK# 6

H_CPURS T# 6

H_TRDY# 6

H_HIT# 6 H_HITM# 6

TP45 Do Not StuffTP45 Do Not Stuff TP46 Do Not StuffTP46 Do Not Stuff TP51 Do Not StuffTP51 Do Not Stuff TP44 Do Not StuffTP44 Do Not Stuff TP42 Do Not StuffTP42 Do Not Stuff TP47 Do Not StuffTP47 Do Not Stuff TP49 Do Not StuffTP49 Do Not Stuff TP34 Do Not StuffTP34 Do Not Stuff TP39 Do Not StuffTP39 Do Not Stuff TP35 Do Not StuffTP35 Do Not Stuff TP43 Do Not StuffTP43 Do Not Stuff TP11 Do Not StuffTP11 Do Not Stuff

H_THERM DA 19 H_THERM DC 19

4

CLK_CPU _BCLK 3

CLK_CPU _BCLK# 3

1D05V_S 0

3D3V_S0

U58A

4 4

3 3

2 2

1 1

H_A#[31..3 ]6

H_ADSTB #06 H_REQ#[4 ..0]6

H_ADSTB #16

H_A20M#15

H_FERR#15

H_IGNNE#15

H_STPCL K#15

H_INTR15 H_NMI15 H_SMI#15

A

H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16

H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4

H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31

TP37D o Not StuffTP37D o Not Stuff TP40D o Not StuffTP40D o Not Stuff TP41D o Not StuffTP41D o Not Stuff TP38D o Not StuffTP38D o Not Stuff TP28D o Not StuffTP28D o Not Stuff TP27D o Not StuffTP27D o Not Stuff TP30D o Not StuffTP30D o Not Stuff TP33D o Not StuffTP33D o Not Stuff

TP12D o Not StuffTP12D o Not Stuff

TP9Do Not StuffTP9Do Not Stuff

U58A

J4

A[3]#

L4

A[4]#

M3

A[5]#

K5

A[6]#

M1

A[7]#

N2

A[8]#

J1

A[9]#

N3

A[10]#

P5

A[11]#

P2

A[12]#

L1

A[13]#

P4

A[14]#

P1

A[15]#

R1

A[16]#

L2

ADSTB[0]#

K3

REQ[0]#

H2

REQ[1]#

K2

REQ[2]#

J3

REQ[3]#

L5

REQ[4]#

Y2

A[17]#

U5

A[18]#

R3

A[19]#

W6

A[20]#

U4

A[21]#

Y5

A[22]#

U2

A[23]#

R4

A[24]#

T5

A[25]#

T3

A[26]#

W3

A[27]#

W5

A[28]#

Y4

A[29]#

W2

A[30]#

Y1

A[31]#

V4

ADSTB[1]#

A6

A20M#

A5

FERR#

C4

IGNNE#

D5

STPCLK#

C6

LINT0

B4

LINT1

A3

SMI#

AA1

RSVD[01]

AA4

RSVD[02]

AB2

RSVD[03]

AA3

RSVD[04]

M4

RSVD[05]

N5

RSVD[06]

T2

RSVD[07]

V3

RSVD[08]

B2

RSVD[09]

C3

RSVD[10]

B25

RSVD[11]

BGA479-S KT6-GPU1

62.10079 .001

2nd source: 62.10053.401

XDP_TDI

XDP_TMS

XDP_TDO

H_CPURS T#

XDP_DBR ESET#

XDP_TCK

XDP_TRS T#

ADDR GROUP 0

ADDR GROUP 1

XDP/ITP SIGNALSH CLK

PROCHOT#

THERMDA THERMDC

THERM

THERMTRIP#

RESERVED

ADS# BNR#

BPRI#

DEFER#

DRDY# DBSY#

BR0#

IERR#

INIT#

LOCK#

CONTROL

RESET#

RS[0]# RS[1]# RS[2]#

TRDY#

HITM#

BPM[0]# BPM[1]# BPM[2]# BPM[3]#

PRDY#

PREQ#

TRST#

DBR#

BCLK[0] BCLK[1]

RSVD[12]

RSVD[13] RSVD[14] RSVD[15] RSVD[16] RSVD[17] RSVD[18] RSVD[19] RSVD[20]

All place within 2" to CPU

H1 E2 G5

H5 F21 E1

F1

D20 B3

H4

B1 F3 F4 G3 G2

G6

HIT#

E4

AD4 AD3 AD1 AC4 AC2 AC1 AC5

TCK

AA6

TDI

AB3

TDO

AB5

TMS

AB6 C20

D21 A24 A25

C7

A22 A21

T22

D2 F6 D3 C1 AF1 D22 C23 C24

1 2

R203 1 50R2F-1-GPR203 150R2F -1-GP

1 2

R204 3 9D2R3F-2-GPR2 04 39D2R3F-2 -GP

1 2

DY

R205 D o Not Stuff

1 2

DY

R156 D o Not Stuff

1 2

DY

R137

1 2

R208 2 7D4R2F-L1-GPR208 2 7D4R2F-L1-GP

1 2

R206 6 80R3F-GPR206 6 80R3F-GP

B

H_IERR#

1D05V_S 0

12

R138

R138 56R2J-4-G P

56R2J-4-G P

H_RS#[2..0 ] 6

1D05V_S 0

R136 D o Not Stuff

Layout Note:

0.5" max length.

Place testpoint on H_IERR# with a GND

0.1" away

H_THERM DA

H_THERM DC

R135

R135 56R2J-4-G P

56R2J-4-G P

1 2

DY

PM_THRM TRIP-A# 7 PM_THRM TRIP-I# 36

1D05V_S 0

12

R214

2KR2F-3-G P

12

R215

R215 1KR2F-3-G P

1KR2F-3-G P

12

C

C226

C226 SC2200P 50V2KX-2GP

SC2200P 50V2KX-2GP

H_DSTBN #06 H_DSTBP #06

H_DINV#06

CPU_PRO CHOT# 38

PM_THRMTRIP# should connect to ICH7 and Calistoga without T-ing

( No stub)

H_DSTBN #16 H_DSTBP #16 H_DINV#16

CPU_GTL REF0

C310

C310 SC1KP16 V2KX-GP

SC1KP16 V2KX-GP

CPU_SEL 03,7 CPU_SEL 13,7 CPU_SEL 23,7

H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15

H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31

R143 Do Not S tuff

DY

1 2

TEST2

1 2

R150 51R2 F-2-GPR150 51R2 F-2-GP

U58B

E22

D[0]#

F24

D[1]#

E26

D[2]#

H22

D[3]#

F23

D[4]#

G25

D[5]#

E25

D[6]#

E23

D[7]#

K24

D[8]#

G24

D[9]#

J24

D[10]#

J23

D[11]#

H26

D[12]#

F26

D[13]#

K22

D[14]#

H25

D[15]#

H23

DSTBN[0]#

G22

DSTBP[0]#

J26

DINV[0]#

N22

D[16]#

K25

D[17]#

P26

D[18]#

R23

D[19]#

L25

D[20]#

L22

D[21]#

L23

D[22]#

M23

D[23]#

P25

D[24]#

P22

D[25]#

P23

D[26]#

T24

D[27]#

R24

D[28]#

L26

D[29]#

T25

D[30]#

N24

D[31]#

M24

DSTBN[1]#

N25

DSTBP[1]#

M26

DINV[1]#

AD26

GTLREF

C26

TEST1

D25

TEST2

B22

BSEL[0]

B23

BSEL[1]

C21

BSEL[2]

BGA479-S KT6-GPU1

MISC

D

DATA GRP 0 DATA GRP 1

D[32]# D[33]# D[34]# D[35]# D[36]# D[37]# D[38]# D[39]# D[40]# D[41]# D[42]#

DATA GRP 2

D[43]# D[44]# D[45]# D[46]#

D[47]# DSTBN[2]# DSTBP[2]#

DINV[2]#

D[48]#

D[49]#

D[50]#

D[51]#

D[52]#

D[53]#

D[54]#

D[55]#

D[56]#

D[57]#

D[58]#

D[59]#

DATA GRP 3

D[60]#

D[61]#

D[62]#

D[63]# DSTBN[3]# DSTBP[3]#

DINV[3]#

COMP[0] COMP[1] COMP[2] COMP[3]

DPRSTP#

DPSLP#

DPWR#

PWRGOOD

SLP#

PSI#

H_DINV#[3..0] 6 H_DSTBN #[3..0] 6 H_DSTBP #[3..0] 6

H_D#32

AA23

H_D#33

AB24

H_D#34

V24

H_D#35

V26

H_D#36

W25

H_D#37

U23

H_D#38

U25

H_D#39

U22

H_D#40

AB25

H_D#41

W22

H_D#42

Y23

H_D#43

AA26

H_D#44

Y26

H_D#45

Y22

H_D#46

AC26

H_D#47

AA24 W24 Y25 V23

H_D#48

AC22

H_D#49

AC23

H_D#50

AB22

H_D#51

AA21

H_D#52

AB21

H_D#53

AC25

H_D#54

AD20

H_D#55

AE22

H_D#56

AF23

H_D#57

AD24

H_D#58

AE21

H_D#59

AD21

H_D#60

AE25

H_D#61

AF25

H_D#62

AF22

H_D#63

AF26 AD23 AE24 AC20

COMP0

R26 U26 U1 V1

E5 B5 D24 D6 D7 AE6

R187 2 7D4R2F-L1-GPR187 2 7D4R2F-L1-GP

COMP1

R199 5 4D9R2F-L1-GPR199 5 4D9R2F-L1-GP

COMP2

R191 2 7D4R2F-L1-GPR191 2 7D4R2F-L1-GP

COMP3TEST1

R198 5 4D9R2F-L1-GPR198 5 4D9R2F-L1-GP

BOM

Title

Size Document N umber Rev

Size Document N umber Rev A3

A3

Date: Sheet of

H_DSTBN #2 6 H_DSTBP #2 6 H_DINV#2 6

H_DSTBN #3 6 H_DSTBP #3 6 H_DINV#3 6

1 2 1 2 1 2 1 2

H_DPRSL P# 15,38 H_DPSLP # 15 H_DPW R# 6 H_PW RGD 15 ,36 H_CPUSL P# 6,15 PSI# 38

CPU (1 of 2)

H_D#[63..0 ] 6

Layout Note: Comp0, 2 connect with Zo=27.4 ohm, make trace length shorter than 0.5" . Comp1, 3 connect with Zo=55 ohm, make trace length shorter than 0.5" .

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

AG3 2

4 55Thursday, April 20, 2006

E

A

VCC_COR E_S0

4 4

3 3

2 2

1 1

U58C

A7

VCC[001]

A9

VCC[002]

A10

VCC[003]

A12

VCC[004]

A13

VCC[005]

A15

VCC[006]

A17

VCC[007]

A18

VCC[008]

A20

VCC[009]

B7

VCC[010]

B9

VCC[011]

B10

VCC[012]

B12

VCC[013]

B14

VCC[014]

B15

VCC[015]

B17

VCC[016]

B18

VCC[017]

B20

VCC[018]

C9

VCC[019]

C10

VCC[020]

C12

VCC[021]

C13

VCC[022]

C15

VCC[023]

C17

VCC[024]

C18

VCC[025]

D9

VCC[026]

D10

VCC[027]

D12

VCC[028]

D14

VCC[029]

D15

VCC[030]

D17

VCC[031]

D18

VCC[032]

E7

VCC[033]

E9

VCC[034]

E10

VCC[035]

E12

VCC[036]

E13

VCC[037]

E15

VCC[038]

E17

VCC[039]

E18

VCC[040]

E20

VCC[041]

F7

VCC[042]

F9

VCC[043]

F10

VCC[044]

F12

VCC[045]

F14

VCC[046]

F15

VCC[047]

F17

VCC[048]

F18

VCC[049]

F20

VCC[050]

AA7

VCC[051]

AA9

VCC[052]

AA10

VCC[053]

AA12

VCC[054]

AA13

VCC[055]

AA15

VCC[056]

AA17

VCC[057]

AA18

VCC[058]

AA20

VCC[059]

AB9

VCC[060]

AC10

VCC[061]

AB10

VCC[062]

AB12

VCC[063]

AB14

VCC[064]

AB15

VCC[065]

AB17

VCC[066]

AB18

VCC[067]

BGA479-S KT6-GPU1

VCC[068] VCC[069] VCC[070] VCC[071] VCC[072] VCC[073] VCC[074] VCC[075] VCC[076] VCC[077] VCC[078] VCC[079] VCC[080] VCC[081] VCC[082] VCC[083] VCC[084] VCC[085] VCC[086] VCC[087] VCC[088] VCC[089] VCC[090] VCC[091] VCC[092] VCC[093] VCC[094] VCC[095] VCC[096] VCC[097] VCC[098] VCC[099] VCC[100]

VCCP[01] VCCP[02] VCCP[03] VCCP[04] VCCP[05] VCCP[06] VCCP[07] VCCP[08] VCCP[09] VCCP[10] VCCP[11] VCCP[12] VCCP[13] VCCP[14] VCCP[15] VCCP[16]

VCCA

VID[0] VID[1] VID[2] VID[3] VID[4] VID[5] VID[6]

VCCSENSE

VSSSENSE

AB20 AB7 AC7 AC9 AC12 AC13 AC15 AC17 AC18 AD7 AD9 AD10 AD12 AD14 AD15 AD17 AD18 AE9 AE10 AE12 AE13 AE15 AE17 AE18 AE20 AF9 AF10 AF12 AF14 AF15 AF17 AF18 AF20

V6 G21 J6 K6 M6 J21 K21 M21 N21 N6 R21 R6 T21 T6 V21 W21

B26

AD6 AF5 AE5 AF4 AE3 AF2 AE2

AF7

AE7

VCC_COR E_S0

CPU_V6

R196

1 2

Do Not Stuff

12

C294

C294 SCD1U10 V2KX-4GP

SCD1U10 V2KX-4GP

H_VID0 38 H_VID1 38 H_VID2 38 H_VID3 38 H_VID4 38 H_VID5 38 H_VID6 38

H_VID[0..6] 3 8

12

R212

R212 100R2F-L 1-GP-U

100R2F-L 1-GP-U

1D05V_S 0

SCD01U1 6V2KX-3GP

VCC_COR E_S0

Layout Note

1D5V_VC CA_S0

VCC_COR E_S0

12

B

12

C221

R211

R211 100R2F-L 1-GP-U

100R2F-L 1-GP-U

C580

C615

Layout Note:

SC10U10V5KX-2GP

1 2

HCB1608 KF121T30-GP

12

VCC_SEN SE 38

VSS_SEN SE 38

VCCSENSE and VSSSENSE lines should be of equal length.

Layout Note: Provide a test point (with no stub) to connect a differential probe between VCCSENSE and VSSSENSE at the location where the two 54.9ohm resistors terminate the 55 ohm transmission line.

DY

68.00230 .041

C218

C218 SC4D7U6 D3V3KX-GP

SC4D7U6 D3V3KX-GP

12

L4

C579

C583

Do Not Stuff

1D5V_S0

12

C611

12

C582

SC10U10V5KX-2GP

1D05V_S 0

DY

VCC_COR E_S0

SC10U10V5KX-2GP

12

C291

12

C249

C

DY

12

C271

12

C247

DY

12

C578

C617

SC10U10V5KX-2GP

Do Not Stuff

12

C250

C260

Do Not Stuff

SCD1U10V2KX-4GP

DY

12

C619

C581

SC10U10V5KX-2GP

SCD1U10V2KX-4GP

12

Do Not Stuff

SCD1U10V2KX-4GP

C577

12

C285

12

C246

C586

SC10U10V5KX-2GP

12

C274

SCD1U10V2KX-4GP

12

C248

Do Not Stuff

SCD1U10V2KX-4GP

DY

12

SCD1U10V2KX-4GP

DY

SC10U10V5KX-2GP

C584

12

SC10U10V5KX-2GP

C286

12

Do Not Stuff

C609

C614

Do Not Stuff

12

C298

SC4D7U6D3V3KX-GP

SC10U10V5KX-2GP

D

DY

12

C610

Do Not Stuff

12

C613

C618

Do Not Stuff

SC10U10V5KX-2GP

U58D

A4

VSS[001]

A8

VSS[002]

A11

VSS[003]

A14

VSS[004]

A16

VSS[005]

A19

VSS[006]

A23

VSS[007]

A26

VSS[008]

B6

VSS[009]

B8

VSS[010]

B11

VSS[011]

B13

VSS[012]

B16

VSS[013]

B19

VSS[014]

B21

VSS[015]

B24

VSS[016]

C5

VSS[017]

C8

VSS[018]

C11

VSS[019]

C14

VSS[020]

C16

VSS[021]

C19

VSS[022]

C2

VSS[023]

C22

VSS[024]

C25

VSS[025]

D1

VSS[026]

D4

VSS[027]

D8

VSS[028]

D11

VSS[029]

D13

VSS[030]

D16

VSS[031]

D19

VSS[032]

D23

VSS[033]

D26

VSS[034]

E3

VSS[035]

E6

VSS[036]

E8

VSS[037]

E11

VSS[038]

E14

VSS[039]

E16

VSS[040]

E19

VSS[041]

E21

VSS[042]

E24

VSS[043]

F5

VSS[044]

F8

VSS[045]

F11

VSS[046]

F13

VSS[047]

F16

VSS[048]

F19

VSS[049]

F2

VSS[050]

F22

VSS[051]

F25

VSS[052]

G4

VSS[053]

G1

VSS[054]

G23

VSS[055]

G26

VSS[056]

H3

VSS[057]

H6

VSS[058]

H21

VSS[059]

H24

VSS[060]

J2

VSS[061]

J5

VSS[062]

J22

VSS[063]

J25

VSS[064]

K1

VSS[065]

K4

VSS[066]

K23

VSS[067]

K26

VSS[068]

L3

VSS[069]

L6

VSS[070]

L21

VSS[071]

L24

VSS[072]

M2

VSS[073]

M5

VSS[074]

M22

VSS[075]

M25

VSS[076]

N1

VSS[077]

N4

VSS[078]

N23

VSS[079]

N26

VSS[080] VSS[081]P3VSS[162]

BGA479-S KT6-GPU1

BOM

VSS[082] VSS[083] VSS[084] VSS[085] VSS[086] VSS[087] VSS[088] VSS[089] VSS[090] VSS[091] VSS[092] VSS[093] VSS[094] VSS[095] VSS[096] VSS[097] VSS[098] VSS[099] VSS[100] VSS[101] VSS[102] VSS[103] VSS[104] VSS[105] VSS[106] VSS[107] VSS[108] VSS[109] VSS[110] VSS[111] VSS[112] VSS[113] VSS[114] VSS[115] VSS[116] VSS[117] VSS[118] VSS[119] VSS[120] VSS[121] VSS[122] VSS[123] VSS[124] VSS[125] VSS[126] VSS[127] VSS[128] VSS[129] VSS[130] VSS[131] VSS[132] VSS[133] VSS[134] VSS[135] VSS[136] VSS[137] VSS[138] VSS[139] VSS[140] VSS[141] VSS[142] VSS[143] VSS[144] VSS[145] VSS[146] VSS[147] VSS[148] VSS[149] VSS[150] VSS[151] VSS[152] VSS[153] VSS[154] VSS[155] VSS[156] VSS[157] VSS[158] VSS[159] VSS[160] VSS[161]

E

P6 P21 P24 R2 R5 R22 R25 T1 T4 T23 T26 U3 U6 U21 U24 V2 V5 V22 V25 W1 W4 W23 W26 Y3 Y6 Y21 Y24 AA2 AA5 AA8 AA11 AA14 AA16 AA19 AA22 AA25 AB1 AB4 AB8 AB11 AB13 AB16 AB19 AB23 AB26 AC3 AC6 AC8 AC11 AC14 AC16 AC19 AC21 AC24 AD2 AD5 AD8 AD11 AD13 AD16 AD19 AD22 AD25 AE1 AE4 AE8 AE11 AE14 AE16 AE19 AE23 AE26 AF3 AF6 AF8 AF11 AF13 AF16 AF19 AF21 AF24

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document N umber Rev

Size Document N umber Rev A3

A3

Date: Sheet of

A

B

C

D

Date: Sheet of

CPU (2 of 2)

Taipei Hsien 221, Taiwan, R.O.C.

AG3 2

5 55Thursday, April 20, 2006

E

A

H_XRCOM P

12

R511

R511 24D9R2F -L-GP

24D9R2F -L-GP

4 4

1D05V_S 0

R512

R512 54D9R2F -L1-GP

54D9R2F -L1-GP

1 2

H_XSCOM P

1D05V_S 0

12

R517

R517 221R2F-2 -GP

221R2F-2 -GP

H_XSW ING

3 3

2 2

100R2F-L 1-GP-U

R509

1D05V_S 0

R514

12

R516

R516 24D9R2F -L-GP

24D9R2F -L-GP

R515

R515 54D9R2F -L1-GP

54D9R2F -L1-GP

1 2

12

R513

R513 221R2F-2 -GP

221R2F-2 -GP

12

1 2

H_YRCOMP

H_YSCOMP

H_YSWING

1 2

H_D#[63..0 ]4

C629

C629 SCD1U16 V2ZY-2GP

SCD1U16 V2ZY-2GP

C630

C630 SCD1U16 V2ZY-2GP

SCD1U16 V2ZY-2GP

B

U56A

W11

AB7 AA9

AB8

AA4 AA7 AA2 AA6

AA10

AA1 AB4

AC9 AB11 AC11

AB3

AC2

AD1

AD9

AC1

AD7

AC6

AB5 AD10

AD4

AC8

AG2

AG1

K11

T10

U11 T11

Y10

F1

J1

H1

J6 H3 K2

G1 G2

K9 K1 K7

J8 H4

J3

G4

T3 U7 U9

W9

T1 T8 T4

W7

U5 T9

W6

T5

W4 W3

Y3 Y7

W5

W2

Y8

E1 E2 E4

Y1 U1

W1

U56A

H_D#_0 H_D#_1 H_D#_2 H_D#_3 H_D#_4 H_D#_5 H_D#_6 H_D#_7 H_D#_8 H_D#_9 H_D#_10 H_D#_11 H_D#_12 H_D#_13 H_D#_14 H_D#_15 H_D#_16 H_D#_17 H_D#_18 H_D#_19 H_D#_20 H_D#_21 H_D#_22 H_D#_23 H_D#_24 H_D#_25 H_D#_26 H_D#_27 H_D#_28 H_D#_29 H_D#_30 H_D#_31 H_D#_32 H_D#_33 H_D#_34 H_D#_35 H_D#_36 H_D#_37 H_D#_38 H_D#_39 H_D#_40 H_D#_41 H_D#_42 H_D#_43 H_D#_44 H_D#_45 H_D#_46 H_D#_47 H_D#_48 H_D#_49 H_D#_50 H_D#_51 H_D#_52 H_D#_53 H_D#_54 H_D#_55 H_D#_56 H_D#_57 H_D#_58 H_D#_59 H_D#_60 H_D#_61 H_D#_62 H_D#_63

H_XRCOMP H_XSCOMP H_XSWING

H_YRCOMP H_YSCOMP H_YSWING

H_CLKIN H_CLKIN#

H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63

H_XRCOM P H_XSCOM P H_XSW ING

H_YRCOMP H_YSCOMP H_YSWING

CLK_MCH _BCLK3

CLK_MCH _BCLK#3

C

H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16 H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31

H_VREF

H_DINV#0 H_DINV#1 H_DINV#2 H_DINV#3

H_DSTBN #0 H_DSTBN #1 H_DSTBN #2 H_DSTBN #3

H_DSTBP #0 H_DSTBP #1 H_DSTBP #2 H_DSTBP #3

H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4

H_RS#0 H_RS#1 H_RS#2

1 2

R207

0R2J-2-GP

HOST

H_A#_3 H_A#_4 H_A#_5 H_A#_6 H_A#_7 H_A#_8

H_A#_9 H_A#_10 H_A#_11 H_A#_12 H_A#_13 H_A#_14 H_A#_15 H_A#_16 H_A#_17 H_A#_18 H_A#_19 H_A#_20 H_A#_21 H_A#_22 H_A#_23 H_A#_24 H_A#_25 H_A#_26 H_A#_27 H_A#_28 H_A#_29 H_A#_30 H_A#_31

H_ADS# H_ADSTB#_0 H_ADSTB#_1

H_VREF_0

H_BNR#

H_BPRI#

H_BREQ#0

H_CPURST#

H_DBSY#

H_DEFER#

H_DPWR#

H_DRDY#

H_VREF_1

H_DINV#_0 H_DINV#_1 H_DINV#_2 H_DINV#_3

H_DSTBN#_0 H_DSTBN#_1 H_DSTBN#_2 H_DSTBN#_3

H_DSTBP#_0 H_DSTBP#_1 H_DSTBP#_2 H_DSTBP#_3

H_HIT#

H_HITM#

H_LOCK#

H_REQ#_0 H_REQ#_1 H_REQ#_2 H_REQ#_3 H_REQ#_4

H_RS#_0 H_RS#_1 H_RS#_2

H_SLPCPU#

H_TRDY#

H9 C9 E11 G11 F11 G12 F9 H11 J12 G14 D9 J14 H13 J15 F14 D12 A11 C11 A12 A13 E13 G13 F12 B12 B14 C12 A14 C14 D14

E8 B9 C13 J13 C6 F6 C7 B7 A7 C3 J9 H8 K13

J7 W8 U3 AB10

K4 T7 Y5 AC4

K3 T6 AA5 AC5

D3 D4 B3

D8 G8 B8 F8 A8

B4 E6 D6

E3 E7

D

H_ADS# 4 H_ADSTB #0 4 H_ADSTB #1 4

H_BNR# 4

H_BPRI# 4

H_BREQ# 0 4

H_CPURS T# 4

H_DBSY# 4

H_DEFER # 4 H_DPW R# 4

H_DRDY# 4

H_HIT# 4 H_HITM# 4

H_LOCK# 4

H_CPUSL P# 4,15 H_TRDY# 4

H_A#[31..3 ] 4

C270

C270 SCD1U16 V2ZY-2GP

SCD1U16 V2ZY-2GP

1 2

H_DINV#[3..0] 4

H_DSTBN #[3..0] 4

H_DSTBP #[3..0] 4

H_REQ#[4 ..0] 4

1D05V_S 0

12

H_RS#[2..0 ] 4

R169

R169 100R2F-L 1-GP-U

100R2F-L 1-GP-U

R170

R170 200R2F-L -GP

200R2F-L -GP

E

1 1

Place them near to the chip ( < 0.5")

A

B

C

D

BOM

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document N umber Rev

Size Document N umber Rev A3

A3

Date: Sheet of

GMCH (1 of 5)

Taipei Hsien 221, Taiwan, R.O.C.

AG3 2

6 55Thursday, April 20, 2006

E

A

DREFCLK #

DREFCLK

3D3V_S0

R498

AY35

AR1

AW7

AW40

AW35

AT1

AY7

AY40

AU20 AT20 BA29 AY29

AW13 AW12

AY21

AW21

AL20 AF10

BA13 BA12 AY20 AU21

AV9

AT9

AK1

AK41

AF33

AG33

A27 A26 C40 D41

AE35

AF39 AG35 AH39

AC35 AE39

AF35 AG39

AE37

AF41 AG37 AH41

AC37 AE41

AF37 AG41

SM_CK_0 SM_CK_1 SM_CK_2 SM_CK_3

SM_CK#_0 SM_CK#_1 SM_CK#_2 SM_CK#_3

SM_CKE_0 SM_CKE_1 SM_CKE_2 SM_CKE_3

SM_CS#_0 SM_CS#_1 SM_CS#_2 SM_CS#_3

SM_OCDCOMP_0 SM_OCDCOMP_1

SM_ODT_0 SM_ODT_1 SM_ODT_2 SM_ODT_3

SM_RCOMP# SM_RCOMP

SM_VREF_0 SM_VREF_1

G_CLKIN# G_CLKIN D_REFCLKIN# D_REFCLKIN D_REFSSCLKIN# D_REFSSCLKIN

DMI_RXN_0 DMI_RXN_1 DMI_RXN_2 DMI_RXN_3

DMI_RXP_0 DMI_RXP_1 DMI_RXP_2 DMI_RXP_3

DMI_TXN_0 DMI_TXN_1 DMI_TXN_2 DMI_TXN_3

DMI_TXP_0 DMI_TXP_1 DMI_TXP_2 DMI_TXP_3

1 2

DY

Do Not Stuff

1 2

M_CLK_D DR011 M_CLK_D DR111 M_CLK_D DR211 M_CLK_D DR311

M_CLK_D DR#011 M_CLK_D DR#111 M_CLK_D DR#211 M_CLK_D DR#311

4 4

12

DY

DDR_VRE F_S3

12

SCD1U16V2ZY-2GP

3D3V_S0

12

DY

C634

12

1 2 3

1D8V_S3

12

R194

R194 Do Not Stuff

Do Not Stuff

SCD1U16V2ZY-2GP

DMI_TXN[3..0]16

DMI_TXP[3..0]16

DMI_RXN[3..0]16

DMI_RXP[3..0]16

RN82

R200

R200 80D6R2F -L-GP

80D6R2F -L-GP

R195

R195 80D6R2F -L-GP

80D6R2F -L-GP

R160

Do Not Stuff

C633

3 3

2 2

M_CKE01 1,12 M_CKE11 1,12 M_CKE21 1,12 M_CKE31 1,12

M_CS0#11,1 2 M_CS1#11,1 2 M_CS2#11,1 2 M_CS3#11,1 2

M_OCDCO MP0

M_OCDCO MP1

CLK_MCH _3GPLL#3 CLK_MCH _3GPLL3

DREFCLK #3

DREFCLK3 DREFSSC LK#3 DREFSSC LK3

SRN10KJ -5-GP

PM_EXTT S#0

4

PM_EXTT S#1

M_RCOMP N

M_RCOMP P

M_ODT011,1 2 M_ODT111,1 2 M_ODT211,1 2 M_ODT311,1 2

M_RCOMP N M_RCOMP P

DREFSSC LK#

DREFSSC LK

DMI_TXN0 DMI_TXN1 DMI_TXN2 DMI_TXN3

DMI_TXP0 DMI_TXP1 DMI_TXP2

DMI_TXP3

DMI_RXN0 DMI_RXN1 DMI_RXN2 DMI_RXN3

DMI_RXP0 DMI_RXP1 DMI_RXP2 DMI_RXP3

When High 1K Ohm

CFG6:

1 1

0=Moby Dick ,1=Calistoga (default)

When Low choice lower than 3.5K Ohm

A

R152

Do Not Stuff

R148

Do Not Stuff

R149

Do Not Stuff

R165

Do Not Stuff

R500

Do Not Stuff

R168

Do Not Stuff

R493

Do Not Stuff

R492

Do Not Stuff

R164

Do Not Stuff

R180

Do Not Stuff

R174

Do Not Stuff

R185

Do Not Stuff

R184

Do Not Stuff

R497

Do Not Stuff

R186

Do Not Stuff

R171

Do Not Stuff

R173

Do Not Stuff

B

DDR MUXINGCLKDMI

B

CFGRSVD

MISC

CFG18

CFG19

CFG20

CFG3

CFG4

CFG5

CFG6

CFG7

CFG8

CFG9

CFG10

CFG11

CFG12

CFG13

CFG14

CFG15

CFG16

CFG17

PM

NC

RSVD_0 RSVD_1 RSVD_2 RSVD_3 RSVD_4 RSVD_5 RSVD_6 RSVD_7 RSVD_8

RSVD_9 RSVD_10 RSVD_11 RSVD_12 RSVD_13 RSVD_14 RSVD_15

CFG_0 CFG_1 CFG_2 CFG_3 CFG_4 CFG_5 CFG_6 CFG_7 CFG_8

CFG_9 CFG_10 CFG_11 CFG_12 CFG_13 CFG_14 CFG_15 CFG_16 CFG_17 CFG_18 CFG_19 CFG_20

PM_BMBUSY# PM_EXTTS#_0 PM_EXTTS#_1

PM_THRMTRIP#

PWROK

RSTIN#

SDVO_CTRLCLK

SDVO_CTRLDATA

LT_RESET#

NC0 NC1 NC2 NC3 NC4 NC5 NC6 NC7 NC8

NC9 NC10 NC11 NC12 NC13 NC14 NC15 NC16 NC17 NC18

AG3-SB

U56B

H32 T32 R32 F3 F7 AG11 AF11 H7 J19 K30 J29 A41 A35 A34 D28 D27

K16 K18 J18 F18 E15 F15 E18 D19 D16 G16 E16 D15 G15 K15 C15 H16 G18 H15 J25 K27 J26

G28 F25 H26 G6 AH33 AH34

H28 H27 K28

D1 C41 C1 BA41 BA40 BA39 BA3 BA2 BA1 B41 B2 AY41 AY1 AW41 AW1 A40 A4 A39 A3

TV_DACA

TV_DACB

TV_DACC

GMCH_BL UE

GMCH_GR EEN

GMCH_RE D

CFG3 CFG4 CFG5 CFG6 CFG7 CFG8 CFG9 CFG10 CFG11 CFG12 CFG13 CFG14 CFG15 CFG16 CFG17 CFG18 CFG19 CFG20

PM_EXTT S#0 PM_EXTT S#1

1 2

R134

R134 100R2J-2 -GP

100R2J-2 -GP

GMCH_DD CCLK14 GMCH_DD CDATA14

1 2

GMTV

1 2

GMTV

1 2

GMTV

1 2

GM

1 2

GM

1 2

GM

CPU_SEL 0 3,4 CPU_SEL 1 3,4 CPU_SEL 2 3,4

SEL2

0 0

0 1 1 100M 1 1

PM_THRM TRIP-A# 4

R145 D o Not Stuff

1 2

R144 0 R2J-2-GPR144 0 R2J-2-GP

TP14 Do Not StuffT P14 Do No t Stuff TP17 Do Not StuffT P17 Do No t Stuff

GMCH_BL UE GMCH_GR EEN

GMCH_RE D

CRT_IREF

1 2

MCH_ICH_S YNC# 16

RN35

SRN10KJ -5-GP

R634

150R2F-1 -GP

R635

150R2F-1 -GP

R636

150R2F-1 -GP

R637

150R2F-1 -GP

R638

150R2F-1 -GP

R639

150R2F-1 -GP

C

for calistoga c onfiguration

L_BKLTE N32

LDDC_CL K13

LDDC_DA TA13

GMCH_LC DVDD_ON13

SEL1

0 0 1 1 0 0 1 1

DY

3D3V_S0

4

1

R154 2 40R2F-1-GP

RN38 Do Not Stuff

1 2 3

1 2

R158 Do Not Stuff

1 2

R153 Do Not Stuff

CPU

SEL0

0

266M 133M

01200M

166M

1 00333M 1 0

400M

1

Reserved

PM_BMBU SY# 16

PLT_RST 1# 16,20 ,26,31,32,34,35,45 ,55

2 3

ATI

TV_DACA14 TV_DACB14 TV_DACC14

R176 4K99R2F -L-GP

1 2

GM

R181 0R2J-2-GP

1 2

GM

1 2 3

GM

RN41

RN41 SRN0J-6-G P

SRN0J-6-G P

GMCH_BL UE14

GMCH_GR EEN14

GMCH_RE D14

1D05V_S 0

SA

GMCH_HS Y14

12

GM

GMCH_VS Y14

1D05V_S 0

4

C

TP8 Do Not StuffTP8 Do Not Stuff

LCTLA_C LK

LCTLB_D ATA LDDC_CL K LDDC_DA TA

LIBG

TP7Do Not StuffTP7Do Not Stuff

L_LVBG GMCH_LC DVDD_ON

1 2 3

GM

RN29 SRN0J-6-G P

LA_CLK#13 LA_CLK13 LB_CLK#13 LB_CLK13

LA_DATA #_013 LA_DATA #_113 LA_DATA #_213

LA_DATA _013 LA_DATA _113 LA_DATA _213

LB_DATA #_013 LB_DATA #_113 LB_DATA #_213

LB_DATA _013 LB_DATA _113 LB_DATA _213

VGATE_P WRGD 16 ,38,48

PWRO K 16,19

TV_DACA

TV_DACB

TV_DACC

4

GMCH_BL UE

GMCH_GR EEN

GMCH_RE D

R489 Do Not Stuff

1 2

ATI

R491 0R2J-2-GP

1 2

GM

GMCH_DD CCLK

GMCH_DD CDATA

TV_DACC

TV_DACA TV_DACB

TV_IREF

TV_IRTNA

TV_IRTNB

TV_IRTNC

L_BKLTE N

GMCH_HS Y CRT_IREF GMCH_VS Y

D32

J30 H30 H29 G26 G25 B38 C35 F32

4

C33 C32

A33 A32 E27 E26

C37 B35 A37

B37 B34 A36

G30 D30 F29

F30 D29 F28

A16 C18 A19

TV_IREF

J20

TV_IRTNA

B16

TV_IRTNB

B18

TV_IRTNC

B19

E23 D23 C22 B22 A21 B21

C26 C25 G23

J22 H23

R495

1 2

ATI

RN91 Do Not Stuff

1 2 3

ATI

RN45 Do Not Stuff

1 2 3

ATI

RN89 Do Not Stuff

1 2 3

ATI

U56C

L_BKLTCTL L_BKLTEN L_CLKCTLA L_CLKCTLB L_DDC_CLK L_DDC_DATA L_IBG L_VBG L_VDDEN L_VREFH L_VREFL

LA_CLK# LA_CLK LB_CLK# LB_CLK

LA_DATA#_0 LA_DATA#_1 LA_DATA#_2

LA_DATA_0 LA_DATA_1 LA_DATA_2

LB_DATA#_0 LB_DATA#_1 LB_DATA#_2

LB_DATA_0 LB_DATA_1 LB_DATA_2

TV_DACA_OUT TV_DACB_OUT TV_DACC_OUT

TV_IREF TV_IRTNA TV_IRTNB TV_IRTNC

CRT_BLUE CRT_BLUE# CRT_GREEN CRT_GREEN# CRT_RED CRT_RED#

CRT_DDC_CLK CRT_DDC_DATA CRT_HSYNC CRT_IREF CRT_VSYNC

1D5V_S0

Do Not Stuff

4

D

LVDS

TV

VGA

L_BKLTE N GMCH_LC DVDD_ON

LIBG

GMCH_VS Y GMCH_HS Y

AG3-SB

D

E

1D5V_PC IE_S0

R123 24D9R2F -L-GPR123 24D9R2F -L-GP

1 2 3

GM

1 2

GM

1 2 3

ATI

GMCH (2 of 5)

D40 D38

PEG_RXN 0

F34

PEG_RXN 1

G38

PEG_RXN 2

H34

PEG_RXN 3

J38

PEG_RXN 4

L34

PEG_RXN 5

M38

PEG_RXN 6

N34

PEG_RXN 7

P38

PEG_RXN 8

R34

PEG_RXN 9

T38

PEG_RXN 10

V34

PEG_RXN 11

W38

PEG_RXN 12

Y34

PEG_RXN 13

AA38

PEG_RXN 14

AB34

PEG_RXN 15

AC38

PEG_RXP 0

D34

PEG_RXP 1

F38

PEG_RXP 2

G34

PEG_RXP 3

H38

PEG_RXP 4

J34

PEG_RXP 5

L38

PEG_RXP 6

M34

PEG_RXP 7

N38

PEG_RXP 8

P34

PEG_RXP 9

R38

PEG_RXP 10

T34

PEG_RXP 11

V38

PEG_RXP 12

W34

PEG_RXP 13

Y38

PEG_RXP 14

AA34

PEG_RXP 15

AB38

GTXN0 PEG_TXN 0

C187 Do Not S tuff

F36 G40 H36 J40 L36 M40 N36 P40 R36 T40 V36 W40 Y36 AA40 AB36 AC40

D36 F40 G36 H40 J36 L40 M36 N40 P36 R40 T36 V40 W36 Y40 AA36 AB40

4

1K5R2F-2 -GP

4

1 2

GTXN1

C206 Do Not S tuff

1 2

GTXN2GTXN2

C185 Do Not S tuff

1 2

GTXN3

C204 Do Not S tuff

1 2

GTXN4

C183 Do Not S tuff

1 2

GTXN5

C202 Do Not S tuff

1 2

GTXN6

C181 Do Not S tuff

1 2

GTXN7

C200 Do Not S tuff

1 2

GTXN8

C179 Do Not S tuff

1 2

GTXN9

C198 Do Not S tuff

1 2

GTXN10

C177 Do Not S tuff

1 2

GTXN11

C196 Do Not S tuff

1 2

GTXN12

C175 Do Not S tuff

1 2

GTXN13

C194 Do Not S tuff

1 2

C173 Do Not S tuff

1 2

GTXN15

C192 Do Not S tuff

1 2

GTXP0 PEG_T XP0

C188 Do Not S tuff

1 2

GTXP1

C207 Do Not S tuff

1 2

GTXP2

C186 Do Not S tuff

1 2

GTXP3

C205 Do Not S tuff

1 2

GTXP4

C184 Do Not S tuff

1 2

GTXP5

C203 Do Not S tuff

1 2

GTXP6

C182 Do Not S tuff

1 2

GTXP7

C201 Do Not S tuff

1 2

GTXP8

C180 Do Not S tuff

1 2

GTXP9

C199 Do Not S tuff

1 2

GTXP10

C178 Do Not S tuff

1 2

GTXP11

C197 Do Not S tuff

1 2

GTXP12

C176 Do Not S tuff

1 2

GTXP13

C195 Do Not S tuff

1 2

GTXP14

C174 Do Not S tuff

1 2

GTXP15 PEG_TXP 15

C193 Do Not S tuff

1 2

LDDC_CL K LDDC_DA TA

AG3 2

EXP_A_COMPI

EXP_A_COMPO

EXP_A_RXN_0 EXP_A_RXN_1 EXP_A_RXN_2 EXP_A_RXN_3 EXP_A_RXN_4 EXP_A_RXN_5 EXP_A_RXN_6 EXP_A_RXN_7 EXP_A_RXN_8

EXP_A_RXN_9 EXP_A_RXN_10 EXP_A_RXN_11 EXP_A_RXN_12 EXP_A_RXN_13 EXP_A_RXN_14 EXP_A_RXN_15

EXP_A_RXP_0

EXP_A_RXP_1

EXP_A_RXP_2

EXP_A_RXP_3

EXP_A_RXP_4

EXP_A_RXP_5

EXP_A_RXP_6

EXP_A_RXP_7

EXP_A_RXP_8

EXP_A_RXP_9 EXP_A_RXP_10 EXP_A_RXP_11 EXP_A_RXP_12 EXP_A_RXP_13 EXP_A_RXP_14 EXP_A_RXP_15

EXP_A_TXN_0 EXP_A_TXN_1 EXP_A_TXN_2 EXP_A_TXN_3 EXP_A_TXN_4 EXP_A_TXN_5 EXP_A_TXN_6 EXP_A_TXN_7 EXP_A_TXN_8

EXP_A_TXN_9 EXP_A_TXN_10 EXP_A_TXN_11 EXP_A_TXN_12

PCI-EXPRESS GRAPHICS

EXP_A_TXN_13 EXP_A_TXN_14 EXP_A_TXN_15

EXP_A_TXP_0

EXP_A_TXP_1

EXP_A_TXP_2

EXP_A_TXP_3

EXP_A_TXP_4

EXP_A_TXP_5

EXP_A_TXP_6

EXP_A_TXP_7

EXP_A_TXP_8

EXP_A_TXP_9

EXP_A_TXP_10 EXP_A_TXP_11 EXP_A_TXP_12 EXP_A_TXP_13 EXP_A_TXP_14 EXP_A_TXP_15

RN80 SRN100K J-6-GP

R131

RN81 Do Not Stuff

BOM

Title

Size Document N umber Rev

Size Document N umber Rev A3

A3

Date: Sheet of

12

PEG_RXN [15..0] 45

PEG_RXP [15..0] 4 5

ATI

ATI ATI

ATI

ATI ATI

ATI

LCTLA_C LK LCTLB_D ATA

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

PEG_TXN 1 PEG_TXN 2 PEG_TXN 3 PEG_TXN 4 PEG_TXN 5 PEG_TXN 6 PEG_TXN 7 PEG_TXN 8 PEG_TXN 9 PEG_TXN 10 PEG_TXN 11 PEG_TXN 12 PEG_TXN 13 PEG_TXN 14GTXN14 PEG_TXN 15

PEG_TXP 1 PEG_TXP 2 PEG_TXP 3 PEG_TXP 4 PEG_TXP 5 PEG_TXP 6 PEG_TXP 7 PEG_TXP 8 PEG_TXP 9 PEG_TXP 10 PEG_TXP 11 PEG_TXP 12 PEG_TXP 13 PEG_TXP 14

RN83

4

GM

4

GM

RN33 SRN10KJ -5-GP

7 55Thursday, April 20, 2006

E

SRN10KJ -5-GP

23 1

PEG_TXN [15..0]45

PEG_TXP [15..0]45

3D3V_S0

A

4 4

U56D

M_A_DQ[6 3..0]11

3 3

2 2

M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ1 0 M_A_DQ1 1 M_A_DQ1 2 M_A_DQ1 3 M_A_DQ1 4 M_A_DQ1 5 M_A_DQ1 6 M_A_DQ1 7 M_A_DQ1 8 M_A_DQ1 9 M_A_DQ2 0 M_A_DQ2 1 M_A_DQ2 2 M_A_DQ2 3 M_A_DQ2 4 M_A_DQ2 5 M_A_DQ2 6 M_A_DQ2 7 M_A_DQ2 8 M_A_DQ2 9 M_A_DQ3 0 M_A_DQ3 1 M_A_DQ3 2 M_A_DQ3 3 M_A_DQ3 4 M_A_DQ3 5 M_A_DQ3 6 M_A_DQ3 7 M_A_DQ3 8 M_A_DQ3 9 M_A_DQ4 0 M_A_DQ4 1 M_A_DQ4 2 M_A_DQ4 3 M_A_DQ4 4 M_A_DQ4 5 M_A_DQ4 6 M_A_DQ4 7 M_A_DQ4 8 M_A_DQ4 9 M_A_DQ5 0 M_A_DQ5 1 M_A_DQ5 2 M_A_DQ5 3 M_A_DQ5 4 M_A_DQ5 5 M_A_DQ5 6 M_A_DQ5 7 M_A_DQ5 8 M_A_DQ5 9 M_A_DQ6 0 M_A_DQ6 1 M_A_DQ6 2 M_A_DQ6 3

AJ35

AJ34 AM31 AM33

AJ36 AK35

AJ32 AH31 AN35 AP33 AR31 AP31 AN38 AM36 AM34 AN33 AK26

AL27 AM26 AN24 AK28

AL28 AM24 AP26 AP23

AL22 AP21 AN20

AL23 AP24 AP20

AT21 AR12 AR14 AP13 AP12

AT13

AT12

AL14

AL12

AK9 AN7 AK8 AK7 AP9 AN9 AT5 AL5 AY2

AW2

AP1 AN2 AV2 AT3 AN1 AL2

AG7

AF9

AG4

AF6

AG9

AH6 AF4 AF8

U56D

SA_DQ0 SA_DQ1 SA_DQ2 SA_DQ3 SA_DQ4 SA_DQ5 SA_DQ6 SA_DQ7 SA_DQ8 SA_DQ9 SA_DQ10 SA_DQ11 SA_DQ12 SA_DQ13 SA_DQ14 SA_DQ15 SA_DQ16 SA_DQ17 SA_DQ18 SA_DQ19 SA_DQ20 SA_DQ21 SA_DQ22 SA_DQ23 SA_DQ24 SA_DQ25 SA_DQ26 SA_DQ27 SA_DQ28 SA_DQ29 SA_DQ30 SA_DQ31 SA_DQ32 SA_DQ33 SA_DQ34 SA_DQ35 SA_DQ36 SA_DQ37 SA_DQ38 SA_DQ39 SA_DQ40 SA_DQ41 SA_DQ42 SA_DQ43 SA_DQ44 SA_DQ45 SA_DQ46 SA_DQ47 SA_DQ48 SA_DQ49 SA_DQ50 SA_DQ51 SA_DQ52 SA_DQ53 SA_DQ54 SA_DQ55 SA_DQ56 SA_DQ57 SA_DQ58 SA_DQ59 SA_DQ60 SA_DQ61 SA_DQ62 SA_DQ63

SA_RCVENIN#

SA_RCVENOUT#

DDR SYSTEM MEMORY A

B

SA_BS_0 SA_BS_1 SA_BS_2

SA_CAS# SA_DM_0 SA_DM_1 SA_DM_2 SA_DM_3 SA_DM_4 SA_DM_5 SA_DM_6 SA_DM_7

SA_DQS_0 SA_DQS_1 SA_DQS_2 SA_DQS_3 SA_DQS_4 SA_DQS_5 SA_DQS_6

SA_DQS_7 SA_DQS#_0 SA_DQS#_1 SA_DQS#_2 SA_DQS#_3 SA_DQS#_4 SA_DQS#_5 SA_DQS#_6 SA_DQS#_7

SA_MA_0 SA_MA_1 SA_MA_2 SA_MA_3 SA_MA_4 SA_MA_5 SA_MA_6 SA_MA_7 SA_MA_8

SA_MA_9 SA_MA_10 SA_MA_11 SA_MA_12 SA_MA_13

SA_RAS#

SA_WE#

AU12 AV14 BA20

AY13

M_A_DM0

AJ33

M_A_DM1

AM35

M_A_DM2

AL26

M_A_DM3

AN22

M_A_DM4

AM14

M_A_DM5

AL9

M_A_DM6

AR3

M_A_DM7

AH4

M_A_DQS 0

AK33

M_A_DQS 1

AT33

M_A_DQS 2

AN28

M_A_DQS 3

AM22

M_A_DQS 4

AN12 AN8

M_A_DQS 6

AP3

M_A_DQS 7

AG5

M_A_DQS #0

AK32

M_A_DQS #1

AU33

M_A_DQS #2

AN27

M_A_DQS #3

AM21

M_A_DQS #4

AM12

M_A_DQS #5

AL8

M_A_DQS #6

AN3

M_A_DQS #7

AH5

M_A_A0

AY16

M_A_A1

AU14

M_A_A2

AW16

M_A_A3

BA16

M_A_A4

BA17

M_A_A5

AU16

M_A_A6

AV17

M_A_A7

AU17

M_A_A8

AW17

M_A_A9

AT16

M_A_A10

AU13

M_A_A11

AT17

M_A_A12

AV20

M_A_A13

AV12

AW14

SA_RCVE NIN#

AK23

SA_RCVE NOUT#

AK24 AY14

Place Test PAD Near to Chip as could as possible

M_A_CAS # 1 1,12

C

M_B_DQ[6 3..0]11

M_A_BS# 0 11,12 M_A_BS# 1 11,12 M_A_BS# 2 11,12

M_A_DM[7 ..0] 11

M_A_DQS [7..0] 11

M_A_DQS #[7..0] 11

M_A_A[13 ..0] 11,1 2

M_A_RAS # 1 1,12

TP21 Do Not StuffTP21 Do Not Stuff TP22 Do Not StuffTP22 Do Not Stuff

M_A_W E# 11 ,12

M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ1 0 M_B_DQ1 1 M_B_DQ1 2 M_B_DQ1 3 M_B_DQ1 4 M_B_DQ1 5 M_B_DQ1 6 M_B_DQ1 7 M_B_DQ1 8 M_B_DQ1 9 M_B_DQ2 0 M_B_DQ2 1 M_B_DQ2 2 M_B_DQ2 3 M_B_DQ2 4 M_B_DQ2 5 M_B_DQ2 6 M_B_DQ2 7 M_B_DQ2 8 M_B_DQ2 9 M_B_DQ3 0 M_B_DQ3 1 M_B_DQ3 2 M_B_DQ3 3 M_B_DQ3 4 M_B_DQ3 5 M_B_DQ3 6 M_B_DQ3 7 M_B_DQ3 8 M_B_DQ3 9 M_B_DQ4 0 M_B_DQ4 1 M_B_DQ4 2 M_B_DQ4 3 M_B_DQ4 4 M_B_DQ4 5 M_B_DQ4 6 M_B_DQ4 7 M_B_DQ4 8 M_B_DQ4 9 M_B_DQ5 0 M_B_DQ5 1 M_B_DQ5 2 M_B_DQ5 3 M_B_DQ5 4 M_B_DQ5 5 M_B_DQ5 6 M_B_DQ5 7 M_B_DQ5 8 M_B_DQ5 9 M_B_DQ6 0 M_B_DQ6 1 M_B_DQ6 2 M_B_DQ6 3

AK39

AJ37 AP39 AR41

AJ38 AK38 AN41 AP41

AT40 AV41 AU38 AV38 AP38 AR40

AW38

AY38 BA38 AV36 AR36 AP36 BA36 AU36 AP35 AP34 AY33 BA33

AT31 AU29 AU31

AW31

AV29

AW29

AM19

AL19 AP14 AN14 AN17 AM16 AP15

AL15

AJ11 AH10

AN10 AK13 AH11 AK10

BA10

AW10

BA4

AW4 AY10

AY9

AW5

AY5 AV4 AR5 AK4 AK3

AK5

AJ9

AJ8

AT4

AJ5 AJ3

U56E

SB_DQ0 SB_DQ1 SB_DQ2 SB_DQ3 SB_DQ4 SB_DQ5 SB_DQ6 SB_DQ7 SB_DQ8 SB_DQ9 SB_DQ10 SB_DQ11 SB_DQ12 SB_DQ13 SB_DQ14 SB_DQ15 SB_DQ16 SB_DQ17 SB_DQ18 SB_DQ19 SB_DQ20 SB_DQ21 SB_DQ22 SB_DQ23 SB_DQ24 SB_DQ25 SB_DQ26 SB_DQ27 SB_DQ28 SB_DQ29 SB_DQ30 SB_DQ31 SB_DQ32 SB_DQ33 SB_DQ34 SB_DQ35 SB_DQ36 SB_DQ37 SB_DQ38 SB_DQ39 SB_DQ40 SB_DQ41 SB_DQ42 SB_DQ43 SB_DQ44 SB_DQ45 SB_DQ46 SB_DQ47 SB_DQ48 SB_DQ49 SB_DQ50 SB_DQ51 SB_DQ52 SB_DQ53 SB_DQ54 SB_DQ55 SB_DQ56 SB_DQ57 SB_DQ58 SB_DQ59 SB_DQ60 SB_DQ61 SB_DQ62 SB_DQ63

D

DDR SYSTEM MEMORY B

SB_BS_0 SB_BS_1 SB_BS_2

SB_CAS# SB_DM_0 SB_DM_1 SB_DM_2 SB_DM_3 SB_DM_4 SB_DM_5 SB_DM_6 SB_DM_7

SB_DQS_0 SB_DQS_1 SB_DQS_2 SB_DQS_3 SB_DQS_4 SB_DQS_5 SB_DQS_6

SB_DQS_7 SB_DQS#_0 SB_DQS#_1 SB_DQS#_2 SB_DQS#_3 SB_DQS#_4 SB_DQS#_5 SB_DQS#_6 SB_DQS#_7

SB_MA_0 SB_MA_1 SB_MA_2 SB_MA_3 SB_MA_4 SB_MA_5 SB_MA_6 SB_MA_7 SB_MA_8

SB_MA_9 SB_MA_10 SB_MA_11 SB_MA_12 SB_MA_13

SB_RAS#

SB_RCVENIN#

SB_RCVENOUT#

SB_WE#

AT24 AV23 AY28

AR24

M_B_DM0

AK36

M_B_DM1

AR38

M_B_DM2

AT36

M_B_DM3

BA31

M_B_DM4

AL17

M_B_DM5

AH8

M_B_DM6

BA5

M_B_DM7

AN4

M_B_DQS 0

AM39

M_B_DQS 1

AT39

M_B_DQS 2

AU35

M_B_DQS 3

AR29

M_B_DQS 4

AR16

M_B_DQS 5

AR10

M_B_DQS 6

AR7

M_B_DQS 7M_A_DQS 5

AN5

M_B_DQS #0

AM40

M_B_DQS #1

AU39

M_B_DQS #2

AT35

M_B_DQS #3

AP29

M_B_DQS #4

AP16

M_B_DQS #5

AT10

M_B_DQS #6

AT7

M_B_DQS #7

AP5

M_B_A0

AY23

M_B_A1

AW24

M_B_A2

AY24

M_B_A3

AR28

M_B_A4

AT27

M_B_A5

AT28

M_B_A6

AU27

M_B_A7

AV28

M_B_A8

AV27

M_B_A9

AW27

M_B_A10

AV24

M_B_A11

BA27

M_B_A12

AY27

M_B_A13

AR23

AU23

SB_RCVE NIN#

AK16

SB_RCVE NOUT#

AK18 AR27

Place Test P AD Near to Chip ascould as possible

M_B_CAS # 1 1,12

E

M_B_BS# 0 11,12 M_B_BS# 1 11,12 M_B_BS# 2 11,12

M_B_DM[7 ..0] 11

M_B_DQS [7..0] 11

M_B_DQS #[7..0] 11

M_B_A[13 ..0] 11,1 2

M_B_RAS # 1 1,12

TP26 Do Not StuffTP26 Do Not Stuff TP25 Do Not StuffTP25 Do Not Stuff

M_B_W E# 11 ,12

1 1

A

B

C

D

BOM

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document N umber Rev

Size Document N umber Rev A3

A3

Date: Sheet of

GMCH (3 of 5)

Taipei Hsien 221, Taiwan, R.O.C.

AG3 2

8 55Thursday, April 20, 2006

E

A

2D5V_3G BG_S0

4 4

3 3

2 2

1 1

1D5V_S0

2D5V_S0

1D5V_S0

3D3V_S0

1

GM

2

1

GM

2

BAT54-4-G P

C189

SCD1U10V2KX-4GP

C189

SCD1U10V2KX-4GP

12

1D5V_S0

1 2

HCB1608 KF121T30-GP

68.00230 .041

1 2

HCB1608 KF121T30-GP

68.00230 .041

1 2

HCB1608 KF121T30-GP

68.00230 .041

1 2

HCB1608 KF121T30-GP

68.00230 .041

D27

BAT54-4-G P

D10

3

R118

L17

GM

L3

GM

L24

L23

3

GM

12

R141

R141 10R2J-2-G P

10R2J-2-G P

GM

1 2

HCB1608 KF121T30-GP

68.00230 .041

2D5V_S0

12

0R3-0-U-GP

12

C597

C597 SC10U10 V5ZY-1GP

SC10U10 V5ZY-1GP

12

C224

C224 SC10U10 V5ZY-1GP

SC10U10 V5ZY-1GP

12

C636

C636 SC10U10 V5ZY-1GP

SC10U10 V5ZY-1GP

12

C635

C635 SC10U10 V5ZY-1GP

SC10U10 V5ZY-1GP

12

R501

R501 10R2J-2-G P

10R2J-2-G P

L19

GM

1 2

HCB1608 KF121T30-GP

68.00230 .041

3D3V_TV DAC

L5

GM

2D5V_CR TDAC

RN40 SRN0J-6-G P

RN34 SRN0J-6-G P

12

C228

C228 SC10U10 V5ZY-1GP

SC10U10 V5ZY-1GP

1D5V_DP LLA

12

C602

C602 SCD1U10 V2KX-4GP

SCD1U10 V2KX-4GP

1D5V_DP LLB

12

C215

C215 SCD1U10 V2KX-4GP

SCD1U10 V2KX-4GP

1D5V_HP LL_S0

12

C632

C632 SCD1U10 V2KX-4GP

SCD1U10 V2KX-4GP

1D5V_MP LL_S0

12

C631

C631 SCD1U10 V2KX-4GP

SCD1U10 V2KX-4GP

GM

R488

1

GM

2 3

1

GM

2 3

0R5J-6-GP

4

V_DACC

4

V_TVBG

12

Divide by Trace (Layout Rule a pprove)

A

1D5V_S0

V_DACA V_DACB

C594

C240

B

VCC_TXL VD

12

SC4D7U6D3V3KX-GP

R146

R146 0R3-0-U-GP

0R3-0-U-GP

SC4D7U6 D3V3KX-GP

VCCA_CR TDAC

12

C254

SCD1U10V2KX-4GP

12

B

12

C599

SCD1U10V2KX-4GP

C599

SCD1U10V2KX-4GP

1D5V_S0 1D5V_PC IE_S0

R125 0R 5J-5-GPR125 0R5J-5-GP

1D5V_3G PLL_S0

12

C237

3D3V_S0

R487

SC10U10 V5ZY-1GP

SA

1D05V_S 0

R490

R490 Do Not Stuff

Do Not Stuff

ATI

1 2

C608

C608 SCD1U10 V2KX-4GP

SCD1U10 V2KX-4GP

1D5V_S0

C263

SCD1U10V2KX-4GP

C263

SCD1U10V2KX-4GP

12

SCD1U10V2KX-4GP

C252

SCD1U10V2KX-4GP

C252

SCD1U10V2KX-4GP

12

C229

SC4D7U6D3V3KX-GP

C229

SC4D7U6D3V3KX-GP

C231

SC4D7U6D3V3KX-GP

C231

SC4D7U6D3V3KX-GP

12

C235

SCD1U10V2KX-4GP

R471

Do Not Stuff

ATI

1 2

1D5V_S0

RN39

1 2 3

Do Not Stuff

1 2

R155

ATI

12

0R3-0-U-GP

12

C605

1D5V_S0

R162

R175 0 R5J-5-GPR175 0 R5J-5-GP

1 2

R130

Do Not Stuff

C230

SC4D7U6D3V3KX-GP

C230

SC4D7U6D3V3KX-GP

12

2D5V_S0

12

C587

GM

SCD1U10 V2KX-4GP

4

ATI

Do Not Stuff

1D5V_S0

12

C607

C607 SCD1U10 V2KX-4GP

SCD1U10 V2KX-4GP

1D5V_QT VDAC_S0

12

0R3-0-U-GP

12

C276

SCD1U10V2KX-4GP

C276

SCD1U10V2KX-4GP

GM

ATI

1 2

C191

SCD1U10V2KX-4GP

C191

SCD1U10V2KX-4GP

12

R474

R474 0R2J-2-GP

0R2J-2-GP

GM

1 2

0R3-0-U-GP

12

C264

C264 SCD1U10 V2KX-4GP

SCD1U10 V2KX-4GP

1D5V_AU X

12

C275

SCD1U10V2KX-4GP

C275

SCD1U10V2KX-4GP

C

2D5V_S0

12

R132

R132 0R3-0-U-GP

0R3-0-U-GP

GM

12

C220

C220 SCD1U10 V2KX-4GP

SCD1U10 V2KX-4GP

1 2

0R2J-2-GP

12

R129

GM

1 2

R147

Do Not Stuff

ATI

Do Not Stuff

R161

C242

SCD1U10V2KX-4GP

C242

SCD1U10V2KX-4GP

C

VCC_TXL VD

Do Not Stuff

ATI

R484

2D5V_3G BG_S0

VCCA_CR TDAC

1D5V_DP LLA 1D5V_DP LLB 1D5V_HP LL_S0

1D5V_MP LL_S0

ATI

V_DACAV_DACA

V_DACB

V_DACCV_DACC

1D5V_S0

12

R486

1D5V_TV DAC_S0

12

C262

C262 SCD1U10 V2KX-4GP

SCD1U10 V2KX-4GP

12

C227

SCD1U10V2KX-4GP

C227

SCD1U10V2KX-4GP

2D5V_S0

12

GM

V_TVBG

GM

R485

0R3-0-U-GP

12

R476

R476 0R3-0-U-GP

0R3-0-U-GP

H22

C30 B30 A30

AJ41

AB41

Y41 V41 R41 N41

L41

AC33

G41 H41

F21 E21 G21

B26 C39 AF1

A38 B39

AF2

H20 G20

E19

F19 C20 D20 E20

F20

AH1 AH2

A28 B28

12

C28

D21

A23 B23 B25

H19

AK31

AF31 AE31 AC31

AL30 AK30

AJ30 AH30 AG30

AF30 AE30 AD30 AC30 AG29

AF29 AE29 AD29 AC29 AG28

AF28 AE28 AH22

AJ21 AH21

AJ20 AH20 AH19

P19 P16

AH15

P15 AH14 AG14

AF14

AE14

Y14

AF13

AE13

AF12 AE12 AD12

U56H

VCCSYNC

VCC_TXLVDS0 VCC_TXLVDS1 VCC_TXLVDS2

VCC3G0 VCC3G1 VCC3G2 VCC3G3 VCC3G4 VCC3G5 VCC3G6 VCCA_3GPLL VCCA_3GBG VSSA_3GBG

VCCA_CRTDAC0 VCCA_CRTDAC1 VSSA_CRTDAC

VCCA_DPLLA VCCA_DPLLB VCCA_HPLL

VCCA_LVDS VSSA_LVDS

VCCA_MPLL

VCCA_TVBG VSSA_TVBG

VCCA_TVDACA0 VCCA_TVDACA1 VCCA_TVDACB0 VCCA_TVDACB1 VCCA_TVDACC0 VCCA_TVDACC1

VCCD_HMPLL0 VCCD_HMPLL1

VCCD_LVDS0 VCCD_LVDS1 VCCD_LVDS2

VCCD_TVDAC

VCC_HV0 VCC_HV1 VCC_HV2

VCCD_QTVDAC

VCCAUX0 VCCAUX1 VCCAUX2 VCCAUX3 VCCAUX4 VCCAUX5 VCCAUX6 VCCAUX7 VCCAUX8 VCCAUX9 VCCAUX10 VCCAUX11 VCCAUX12 VCCAUX13 VCCAUX14 VCCAUX15 VCCAUX16 VCCAUX17 VCCAUX18 VCCAUX19 VCCAUX20 VCCAUX21 VCCAUX22 VCCAUX23 VCCAUX24 VCCAUX25 VCCAUX26 VCCAUX27 VCCAUX28 VCCAUX29 VCCAUX30 VCCAUX31 VCCAUX32 VCCAUX33 VCCAUX34 VCCAUX35 VCCAUX36 VCCAUX37 VCCAUX38 VCCAUX39 VCCAUX40

POWER

D

1D05V_S 0

AC14

VTT_0

AB14

VTT_1

W14

C241

SCD1U10V2KX-4GP

C241

SCD1U10V2KX-4GP

C233

SC2D2U6D3V3MX-1-GP

C233

SC2D2U6D3V3MX-1-GP

C239

SC4D7U10V5ZY-3GP

C239

VTT_2

V14

VTT_3

T14

VTT_4

R14

VTT_5

P14

VTT_6

N14

VTT_7

M14

VTT_8

L14

VTT_9

AD13

VTT_10

AC13

VTT_11

AB13

VTT_12

AA13

VTT_13

Y13

VTT_14

W13

VTT_15

V13

VTT_16

U13

VTT_17

T13

VTT_18

R13

VTT_19

N13

VTT_20

M13

VTT_21

L13

VTT_22

AB12

VTT_23

AA12

VTT_24

Y12

VTT_25

W12

VTT_26

V12

VTT_27

U12

VTT_28

T12

VTT_29

R12

VTT_30

P12

VTT_31

N12

VTT_32

M12

VTT_33

L12

VTT_34

R11

VTT_35

P11

VTT_36

N11

VTT_37

M11

VTT_38

R10

VTT_39

P10

VTT_40

N10

VTT_41

M10

VTT_42

P9

VTT_43

N9

VTT_44

M9

VTT_45

R8

VTT_46

P8

VTT_47

N8

VTT_48

M8

VTT_49

P7

VTT_50

N7

VTT_51

M7

VTT_52

R6

VTT_53

P6

VTT_54

M6

VTT_55

A6

VTT_56

R5

VTT_57

P5

VTT_58

N5

VTT_59

M5

VTT_60

P4

VTT_61

N4

VTT_62

M4

VTT_63

R3

VTT_64

P3

VTT_65

N3

VTT_66

M3

VTT_67

R2

VTT_68

P2

VTT_69

M2

VTT_70

D2

VTT_71

AB1

VTT_72

R1

VTT_73

P1

VTT_74

N1

VTT_75

M1

VTT_76

BOM

Title

Size Document N umber Rev

Size Document N umber Rev A3

A3

Date: Sheet of

D

Date: Sheet of

12

VCCP_GM CH_CAP3

VCCP_GM CH_CAP2 VCCP_GM CH_CAP1

C638

GMCH (4 of 5)

SCD47U10V3ZY-GP

SC4D7U10V5ZY-3GP

12

C637

SCD47U10V3ZY-GP

C637

SCD47U10V3ZY-GP

12

AG3 2

E

12

C306

SCD22U10V2KX-1GP

C306

SCD22U10V2KX-1GP

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

9 55Thursday, April 20, 2006

E

A

U56G

1D05V_S 0

4 4

3 3

2 2

1 1

AA33

W33

AA32

W32

M32

AA31

W31

M31

AA30

W30

M30

AA29

W29

M29

AB28 AA28

M28

M27

M25

M24 AB23 AA23

M23

AC22 AB22

W22

M22

AC21 AA21

W21

M21

AC20 AB20

W20

M20

AB19 AA19

M19

M18

M17

M16

N33

Y32

V32 P32 N32

V31 T31 R31 P31 N31

Y30

V30 U30 T30 R30 P30 N30

Y29

V29 U29 R29 P29

Y28 V28 U28 T28 R28 P28 N28

P27 N27

P26 N26

N25

P24 N24

Y23 P23 N23

Y22

P22 N22

N21

Y20

P20 N20

Y19 N19

N18

P17 N17

N16

P33

L33 J33

L32 J32

L30

L29

L28

L27

L26

L25

L23

L22

L21

L20

L19

L18

L16

U56G

VCC_0 VCC_1 VCC_2 VCC_3 VCC_4 VCC_5 VCC_6 VCC_7 VCC_8 VCC_9 VCC_10 VCC_11 VCC_12 VCC_13 VCC_14 VCC_15 VCC_16 VCC_17 VCC_18 VCC_19 VCC_20 VCC_21 VCC_22 VCC_23 VCC_24 VCC_25 VCC_26 VCC_27 VCC_28 VCC_29 VCC_30 VCC_31 VCC_32 VCC_33 VCC_34 VCC_35 VCC_36 VCC_37 VCC_38 VCC_39 VCC_40 VCC_41 VCC_42 VCC_43 VCC_44 VCC_45 VCC_46 VCC_47 VCC_48 VCC_49 VCC_50 VCC_51 VCC_52 VCC_53 VCC_54 VCC_55 VCC_56 VCC_57 VCC_58 VCC_59 VCC_60 VCC_61 VCC_62 VCC_63 VCC_64 VCC_65 VCC_66 VCC_67 VCC_68 VCC_69 VCC_70 VCC_71 VCC_72 VCC_73 VCC_74 VCC_75 VCC_76 VCC_77 VCC_78 VCC_79 VCC_80 VCC_81 VCC_82 VCC_83 VCC_84 VCC_85 VCC_86 VCC_87 VCC_88 VCC_89 VCC_90 VCC_91 VCC_92 VCC_93 VCC_94 VCC_95 VCC_96 VCC_97 VCC_98 VCC_99 VCC_100 VCC_101 VCC_102 VCC_103 VCC_104 VCC_105 VCC_106 VCC_107 VCC_108 VCC_109 VCC_110

A

VCC

VCC_SM_0 VCC_SM_1 VCC_SM_2 VCC_SM_3 VCC_SM_4 VCC_SM_5 VCC_SM_6 VCC_SM_7 VCC_SM_8

VCC_SM_9 VCC_SM_10 VCC_SM_11 VCC_SM_12 VCC_SM_13 VCC_SM_14 VCC_SM_15 VCC_SM_16 VCC_SM_17 VCC_SM_18 VCC_SM_19 VCC_SM_20 VCC_SM_21 VCC_SM_22 VCC_SM_23 VCC_SM_24 VCC_SM_25 VCC_SM_26 VCC_SM_27 VCC_SM_28 VCC_SM_29 VCC_SM_30 VCC_SM_31 VCC_SM_32 VCC_SM_33 VCC_SM_34 VCC_SM_35 VCC_SM_36 VCC_SM_37 VCC_SM_38 VCC_SM_39 VCC_SM_40 VCC_SM_41 VCC_SM_42 VCC_SM_43 VCC_SM_44 VCC_SM_45 VCC_SM_46 VCC_SM_47 VCC_SM_48 VCC_SM_49 VCC_SM_50 VCC_SM_51 VCC_SM_52 VCC_SM_53 VCC_SM_54 VCC_SM_55 VCC_SM_56 VCC_SM_57 VCC_SM_58 VCC_SM_59 VCC_SM_60 VCC_SM_61 VCC_SM_62 VCC_SM_63 VCC_SM_64 VCC_SM_65 VCC_SM_66 VCC_SM_67 VCC_SM_68 VCC_SM_69 VCC_SM_70 VCC_SM_71 VCC_SM_72 VCC_SM_73 VCC_SM_74 VCC_SM_75 VCC_SM_76 VCC_SM_77 VCC_SM_78 VCC_SM_79 VCC_SM_80 VCC_SM_81 VCC_SM_82 VCC_SM_83 VCC_SM_84 VCC_SM_85 VCC_SM_86 VCC_SM_87 VCC_SM_88 VCC_SM_89 VCC_SM_90 VCC_SM_91 VCC_SM_92 VCC_SM_93 VCC_SM_94 VCC_SM_95 VCC_SM_96 VCC_SM_97 VCC_SM_98 VCC_SM_99

VCC_SM_100 VCC_SM_101 VCC_SM_102 VCC_SM_103 VCC_SM_104 VCC_SM_105 VCC_SM_106 VCC_SM_107

AU41 AT41 AM41 AU40 BA34 AY34 AW34 AV34 AU34 AT34 AR34 BA30 AY30 AW30 AV30 AU30 AT30 AR30 AP30 AN30 AM30 AM29 AL29 AK29 AJ29 AH29 AJ28 AH28 AJ27 AH27 BA26 AY26 AW26 AV26 AU26 AT26 AR26 AJ26 AH26 AJ25 AH25 AJ24 AH24 BA23 AJ23 BA22 AY22 AW22 AV22 AU22 AT22 AR22 AP22 AK22 AJ22 AK21 AK20 BA19 AY19 AW19 AV19 AU19 AT19 AR19 AP19 AK19 AJ19 AJ18 AJ17 AH17 AJ16 AH16 BA15 AY15 AW15 AV15 AU15 AT15 AR15 AJ15 AJ14 AJ13 AH13 AK12 AJ12 AH12 AG12 AK11 BA8 AY8 AW8 AV8 AT8 AR8 AP8 BA6 AY6 AW6 AV6 AT6 AR6 AP6 AN6 AL6 AK6 AJ6 AV1 AJ1

C303

Do Not StuffDYC303

Do Not Stuff

DY

TC20

ST220U2VBM-3GP

TC20

ST220U2VBM-3GP

12

1D05V_S 0

12

B

U56F

AD27

VCC_NCTF0

AC27

VCC_NCTF1

AB27

VCC_NCTF2

AA27

VCC_NCTF3

Y27

VCC_NCTF4

W27

VCC_NCTF5

V27

VCC_NCTF6

U27

VCC_NCTF7

T27

VCC_NCTF8

R27

VCC_NCTF9

AD26

VCC_NCTF10

AC26

VCC_NCTF11

AB26

VCC_NCTF12

AA26

VCC_NCTF13

Y26

VCC_NCTF14

W26

VCC_NCTF15

V26

VCC_NCTF16

U26

VCC_NCTF17

T26

VCC_NCTF18

R26

VCC_NCTF19

AD25

VCC_NCTF20

AC25

VCC_NCTF21

AB25

VCC_NCTF22

AA25

VCC_NCTF23

Y25

VCC_NCTF24

W25

VCC_NCTF25

V25

VCC_NCTF26

U25

VCC_NCTF27

T25

VCC_NCTF28

R25

VCC_NCTF29

AD24

VCC_NCTF30

AC24

VCC_NCTF31

AB24

VCC_NCTF32

AA24

VCC_NCTF33

Y24

VCC_NCTF34

W24

VCC_NCTF35

V24

VCC_NCTF36

U24

VCC_NCTF37

T24

VCC_NCTF38

R24

VCC_NCTF39

AD23

VCC_NCTF40

V23

VCC_NCTF41

U23

VCC_NCTF42

T23

VCC_NCTF43

R23

VCC_NCTF44

AD22

VCC_NCTF45

V22

VCC_NCTF46

U22

VCC_NCTF47

T22

VCC_NCTF48

R22

VCC_NCTF49

AD21

VCC_NCTF50

V21 U21

R21

AD20

V20 U20

R20

AD19

V19 U19

AD18 AC18

AB18 AA18

Y18

W18

V18 U18

T21

T20

T19

T18

VCC_NCTF51 VCC_NCTF52 VCC_NCTF53 VCC_NCTF54 VCC_NCTF55 VCC_NCTF56 VCC_NCTF57 VCC_NCTF58 VCC_NCTF59 VCC_NCTF60 VCC_NCTF61 VCC_NCTF62 VCC_NCTF63 VCC_NCTF64 VCC_NCTF65 VCC_NCTF66 VCC_NCTF67 VCC_NCTF68 VCC_NCTF69 VCC_NCTF70 VCC_NCTF71 VCC_NCTF72

NCTF

Place these Caps close VCC_0 ~ VCC_110

12

C269

SC10U10V5ZY-1GP

C269

SC10U10V5ZY-1GP

C280

B

1D8V_S3

SC10U10V5ZY-1GP

12

C305

Do Not StuffDYC305

C289

SCD1U10V2KX-4GP

C289

SCD1U10V2KX-4GP

12

Do Not Stuff

12

C236

Do Not StuffDYC236

Do Not Stuff

DY

C219

12

SCD1U10V2KX-4GP

VCCAUX_NCTF10 VCCAUX_NCTF11 VCCAUX_NCTF12 VCCAUX_NCTF13 VCCAUX_NCTF14 VCCAUX_NCTF15 VCCAUX_NCTF16 VCCAUX_NCTF17 VCCAUX_NCTF18 VCCAUX_NCTF19 VCCAUX_NCTF20 VCCAUX_NCTF21 VCCAUX_NCTF22 VCCAUX_NCTF23 VCCAUX_NCTF24 VCCAUX_NCTF25 VCCAUX_NCTF26 VCCAUX_NCTF27 VCCAUX_NCTF28 VCCAUX_NCTF29 VCCAUX_NCTF30 VCCAUX_NCTF31 VCCAUX_NCTF32 VCCAUX_NCTF33 VCCAUX_NCTF34 VCCAUX_NCTF35 VCCAUX_NCTF36 VCCAUX_NCTF37 VCCAUX_NCTF38 VCCAUX_NCTF39 VCCAUX_NCTF40 VCCAUX_NCTF41 VCCAUX_NCTF42 VCCAUX_NCTF43 VCCAUX_NCTF44 VCCAUX_NCTF45 VCCAUX_NCTF46 VCCAUX_NCTF47 VCCAUX_NCTF48 VCCAUX_NCTF49 VCCAUX_NCTF50 VCCAUX_NCTF51 VCCAUX_NCTF52 VCCAUX_NCTF53 VCCAUX_NCTF54 VCCAUX_NCTF55 VCCAUX_NCTF56 VCCAUX_NCTF57

C297

Do Not StuffDYC297

Do Not Stuff

DY

12

VSS_NCTF0 VSS_NCTF1 VSS_NCTF2 VSS_NCTF3 VSS_NCTF4 VSS_NCTF5 VSS_NCTF6 VSS_NCTF7 VSS_NCTF8

VSS_NCTF9 VSS_NCTF10 VSS_NCTF11 VSS_NCTF12

VCCAUX_NCTF0 VCCAUX_NCTF1 VCCAUX_NCTF2 VCCAUX_NCTF3 VCCAUX_NCTF4 VCCAUX_NCTF5 VCCAUX_NCTF6 VCCAUX_NCTF7 VCCAUX_NCTF8 VCCAUX_NCTF9

12

C284

Do Not StuffDYC284

Do Not Stuff

12

C256

Do Not StuffDYC256

Do Not Stuff

DY

C

U56I

AC41

VSS_0

AA41

VSS_1

W41

VSS_2

T41

VSS_3

AE27 AE26 AE25 AE24 AE23 AE22 AE21 AE20 AE19 AE18 AC17 Y17 U17

1D5V_AU X

AG27 AF27 AG26 AF26 AG25 AF25 AG24 AF24 AG23 AF23 AG22 AF22 AG21 AF21 AG20 AF20 AG19 AF19 R19 AG18 AF18 R18 AG17 AF17 AE17 AD17 AB17 AA17 W17 V17 T17 R17 AG16 AF16 AE16 AD16 AC16 AB16 AA16 Y16 W16 V16 U16 T16 R16 AG15 AF15 AE15 AD15 AC15 AB15 AA15 Y15 W15 V15 U15 T15 R15

12

C268

12

C300

SCD1U10V2KX-4GP

C300

SCD1U10V2KX-4GP12TC21

ST220U2VBM-3GP

TC21

ST220U2VBM-3GP

12

Do Not StuffDYC268

Do Not Stuff

DY

12

C213

SCD1U16V2ZY-2GP

C213

C253

SCD1U16V2ZY-2GP

SCD1U10V2KX-4GP

C

P41

VSS_4

M41

VSS_5

J41

VSS_6

F41

VSS_7

AV40

VSS_8

AP40

VSS_9

AN40

VSS_10

AK40

VSS_11

AJ40

VSS_12

AH40

VSS_13

AG40

VSS_14

AF40

VSS_15

AE40

VSS_16

B40

VSS_17

AY39

VSS_18

AW39

VSS_19

AV39

VSS_20

AR39

VSS_21

AN39

VSS_22

AJ39

VSS_23

AC39

VSS_24

AB39

VSS_25

AA39

VSS_26

Y39

VSS_27

W39

VSS_28

V39

VSS_29

T39

VSS_30

R39

VSS_31

P39

VSS_32

N39

VSS_33

M39

VSS_34

L39

VSS_35

J39

VSS_36

H39

VSS_37

G39

VSS_38

F39

VSS_39

D39

VSS_40

AT38

VSS_41

AM38

VSS_42

AH38

VSS_43

AG38

VSS_44

AF38

VSS_45

AE38

VSS_46

C38

VSS_47

AK37

VSS_48

AH37

VSS_49

AB37

VSS_50

AA37

VSS_51

Y37

VSS_52

W37

VSS_53

V37

VSS_54

T37

VSS_55

R37

VSS_56

P37

VSS_57

N37

VSS_58

M37

VSS_59

L37

VSS_60

J37

VSS_61

H37

VSS_62

G37

VSS_63

F37

VSS_64

D37

VSS_65

AY36

VSS_66

AW36

VSS_67

AN36

VSS_68

AH36

VSS_69

AG36

VSS_70

AF36

VSS_71

AE36

VSS_72

AC36

VSS_73

C36

VSS_74

B36

VSS_75

BA35

VSS_76

AV35

VSS_77

AR35

VSS_78

AH35

VSS_79

AB35

VSS_80

AA35

VSS_81

Y35

VSS_82

W35

VSS_83

V35

VSS_84

T35

VSS_85

R35

VSS_86

P35

VSS_87

N35

VSS_88

M35

VSS_89

L35

VSS_90

J35

VSS_91

H35

VSS_92

G35

VSS_93

F35

VSS_94

D35

VSS_95

AN34

VSS_96

12

C244

SCD1U16V2ZY-2GP

C244

SCD1U16V2ZY-2GP

VSS

12

C267

Do Not StuffDYC267

Do Not Stuff

DY

12

C238

Do Not StuffDYC238

Do Not Stuff

DY

VSS_97 VSS_98

VSS_99 VSS_100 VSS_101 VSS_102 VSS_103 VSS_104 VSS_105 VSS_106 VSS_107 VSS_108 VSS_109 VSS_110 VSS_111 VSS_112 VSS_113 VSS_114 VSS_115 VSS_116 VSS_117 VSS_118 VSS_119 VSS_120 VSS_121 VSS_122 VSS_123 VSS_124 VSS_125 VSS_126 VSS_127 VSS_128 VSS_129 VSS_130 VSS_131 VSS_132 VSS_133 VSS_134 VSS_135 VSS_136 VSS_137 VSS_138 VSS_139 VSS_140 VSS_141 VSS_142 VSS_143 VSS_144 VSS_145 VSS_146 VSS_147 VSS_148 VSS_149 VSS_150 VSS_151 VSS_152 VSS_153 VSS_154 VSS_155 VSS_156 VSS_157 VSS_158 VSS_159 VSS_160 VSS_161 VSS_162 VSS_163 VSS_164 VSS_165 VSS_166 VSS_167 VSS_168 VSS_169 VSS_170 VSS_171 VSS_172 VSS_173 VSS_174 VSS_175 VSS_176 VSS_177 VSS_178 VSS_179

D

AK34 AG34 AF34 AE34 AC34 C34 AW33 AV33 AR33 AE33 AB33 Y33 V33 T33 R33 M33 H33 G33 F33 D33 B33 AH32 AG32 AF32 AE32 AC32 AB32 G32 B32 AY31 AV31 AN31 AJ31 AG31 AB31 Y31 AB30 E30 AT29 AN29 AB29 T29 N29 K29 G29 E29 C29 B29 A29 BA28 AW28 AU28 AP28 AM28 AD28 AC28 W28 J28 E28 AP27 AM27 AK27 J27 G27 F27 C27 B27 AN26 M26 K26 F26 D26 AK25 P25 K25 H25 E25 D25 A25 BA24 AU24 AL24 AW23

BOM

Title

Size Document N umber Rev

Size Document N umber Rev A3

A3

Date: Sheet

Date: Sheet of

D

Date: Sheet of

AT23 AN23 AM23 AH23 AC23

W23

K23

F23 C23

AA22

K22 G22 F22 E22 D22

A22 BA21 AV21

AR21 AN21

AL21 AB21

Y21

P21

K21

H21

C21

AW20

AR20 AM20

AA20

K20

B20

A20

AN19 AC19

W19

K19

G19

C19

AH18

P18

H18

D18

A18 AY17

AR17

AP17

AM17

AK17 AV16

AN16

AL16

F16

C16

AN15 AM15

AK15

N15

M15

L15

B15

A15 BA14 AT14 AK14

AD14

AA14

U14

K14

H14

E14 AV13

AR13 AN13 AM13

AL13

AG13

P13

F13

D13

B13 AY12

AC12

K12

H12

E12

AD11

AA11

Y11

U56J

VSS_180 VSS_181 VSS_182 VSS_183 VSS_184 VSS_185 VSS_186

J23

VSS_187 VSS_188 VSS_189 VSS_190 VSS_191 VSS_192 VSS_193 VSS_194 VSS_195 VSS_196 VSS_197 VSS_198 VSS_199 VSS_200 VSS_201 VSS_202 VSS_203 VSS_204 VSS_205

J21

VSS_206 VSS_207 VSS_208 VSS_209 VSS_210 VSS_211 VSS_212 VSS_213 VSS_214 VSS_215 VSS_216 VSS_217 VSS_218 VSS_219 VSS_220 VSS_221 VSS_222 VSS_223 VSS_224 VSS_225 VSS_226 VSS_227 VSS_228 VSS_229 VSS_230 VSS_231 VSS_232 VSS_233 VSS_234

J16

VSS_235 VSS_236 VSS_237 VSS_238 VSS_239 VSS_240 VSS_241 VSS_242 VSS_243 VSS_244 VSS_245 VSS_246 VSS_247 VSS_248 VSS_249 VSS_250 VSS_251 VSS_252 VSS_253 VSS_254 VSS_255 VSS_256 VSS_257 VSS_258 VSS_259 VSS_260 VSS_261 VSS_262 VSS_263 VSS_264 VSS_265 VSS_266 VSS_267 VSS_268 VSS_269 VSS_270 VSS_271 VSS_272

VSS

GMCH (5 of 5)

AG3

E

J11

VSS_273

D11

VSS_274

B11

VSS_275

AV10

VSS_276

AP10

VSS_277

AL10

VSS_278

AJ10

VSS_279

AG10

VSS_280

AC10

VSS_281

W10

VSS_282

U10

VSS_283

BA9

VSS_284

AW9

VSS_285

AR9

VSS_286

AH9

VSS_287

AB9

VSS_288

Y9

VSS_289

R9

VSS_290

G9

VSS_291

E9

VSS_292

A9

VSS_293

AG8

VSS_294

AD8

VSS_295

AA8

VSS_296

U8

VSS_297

K8

VSS_298

C8

VSS_299

BA7

VSS_300

AV7

VSS_301

AP7

VSS_302

AL7

VSS_303

AJ7

VSS_304

AH7

VSS_305

AF7

VSS_306

AC7

VSS_307

R7

VSS_308

G7

VSS_309

D7

VSS_310

AG6

VSS_311

AD6

VSS_312

AB6

VSS_313

Y6

VSS_314

U6

VSS_315

N6

VSS_316

K6

VSS_317

H6

VSS_318

B6

VSS_319

AV5

VSS_320

AF5

VSS_321

AD5

VSS_322

AY4

VSS_323

AR4

VSS_324

AP4

VSS_325

AL4

VSS_326

AJ4

VSS_327

Y4

VSS_328

U4

VSS_329

R4

VSS_330

J4

VSS_331

F4

VSS_332

C4

VSS_333

AY3

VSS_334

AW3

VSS_335

AV3

VSS_336

AL3

VSS_337

AH3

VSS_338

AG3

VSS_339

AF3

VSS_340

AD3

VSS_341

AC3

VSS_342

AA3

VSS_343

G3

VSS_344

AT2

VSS_345

AR2

VSS_346

AP2

VSS_347

AK2

VSS_348

AJ2

VSS_349

AD2

VSS_350

AB2

VSS_351

Y2

VSS_352

U2

VSS_353

T2

VSS_354

N2

VSS_355

J2

VSS_356

H2

VSS_357

F2

VSS_358

C2

VSS_359

AL1

VSS_360

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

of

10 55Thursday, April 20, 2006

E

2

A

DM2

M_B_A[13..0]8,12

4 4

M_B_BS#28,12

M_B_BS#08,12 M_B_BS#18,12

M_B_DQ[63..0]8

3 3

2 2

M_B_DQS#[7..0]8

M_B_DQS[7..0]8

1 1

DDR_VREF_S3

M_ODT27,12 M_ODT37,12

C87

Do Not StuffDYC87

Do Not Stuff

12

M_B_DQS#0 M_B_DQS#1 M_B_DQS#2 M_B_DQS#3 M_B_DQS#4 M_B_DQS#5 M_B_DQS#6 M_B_DQS#7

M_B_DQS0 M_B_DQS1 M_B_DQS2 M_B_DQS3 M_B_DQS4 M_B_DQS5 M_B_DQS6 M_B_DQS7

BC1

12

M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13

M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63

SCD1U16V2ZY-2GP

DY

DM2

102

A0

101

A1

100

A2

99

A3

98

A4

97

A5

94

A6

92

A7

93

A8

91

A9

105

A10/AP

90

A11

89

A12

116

A13

86

A14

84

A15

85

A16/BA2

107

BA0

106

BA1

5

DQ0

7

DQ1

17

DQ2

19

DQ3

4

DQ4

6

DQ5

14

DQ6

16

DQ7

23

DQ8

25

DQ9

35

DQ10

37

DQ11

20

DQ12

22

DQ13

36

DQ14

38

DQ15

43

DQ16

45

DQ17

55

DQ18

57

DQ19

44

DQ20

46

DQ21

56

DQ22

58

DQ23

61

DQ24

63

DQ25

73

DQ26

75

DQ27

62

DQ28

64

DQ29

74

DQ30

76

DQ31

123

DQ32

125

DQ33

135

DQ34

137

DQ35

124

DQ36

126

DQ37

134

DQ38

136

DQ39

141

DQ40

143

DQ41

151

DQ42

153

DQ43

140

DQ44

142

DQ45

152

DQ46

154

DQ47

157

DQ48

159

DQ49

173

DQ50

175

DQ51

158

DQ52

160

DQ53

174

DQ54

176

DQ55

179

DQ56

181

DQ57

189

DQ58

191

DQ59

180

DQ60

182

DQ61

192

DQ62

194

DQ63

11

/DQS0

29

/DQS1

49

/DQS2

68

/DQS3

129

/DQS4

146

/DQS5

167

/DQS6

186

/DQS7

13

DQS0

31

DQS1

51

DQS2

70

DQS3

131

DQS4

148

DQS5

169

DQS6

188

DQS7

114

ODT0

119

ODT1

1

VREF

2

VSS

202

GND

SKT-SODIMM20020U2GP

/RAS

/WE

/CAS

/CS0 /CS1

CKE0 CKE1

CK0

/CK0

CK1

/CK1

DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7

SDA SCL

VDDSPD

SA0 SA1

NC#50 NC#69 NC#83

NC#120

NC#163/TEST

VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

NORMAL TYPE

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

GND

62.10017.661

High 5.2mm

A

B

108 109 113

110 115

79 80

30 32

164 166

M_B_DM0

10

M_B_DM1

26

M_B_DM2

52

M_B_DM3

67

M_B_DM4

130

M_B_DM5

147

M_B_DM6

170

M_B_DM7

185

195 197

199

198 200

12

50 69 83 120 163

81 82 87 88 95 96 103 104 111 112 117 118

3 8 9 12 15 18 21 24 27 28 33 34 39 40 41 42 47 48 53 54 59 60 65 66 71 72 77 78 121 122 127 128 132 133 138 139 144 145 149 150 155 156 161 162 165 168 171 172 177 178 183 184 187 190 193 196

201

B

M_B_RAS# 8,12

M_B_CAS# 8,12

M_CS2# 7,12 M_CS3# 7,12

M_CKE2 7,12 M_CKE3 7,12

SMBD_ICH 3,18 SMBC_ICH 3,18

R209

BC3

BC3 SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

1D8V_S3

M_B_WE# 8,12

M_CLK_DDR3 7 M_CLK_DDR#3 7

M_CLK_DDR2 7 M_CLK_DDR#2 7

M_B_DM[7..0] 8

1 2

10KR2J-3-GP

Place near DM2

12

DY

12

DY

M_CLK_DDR3

C118

C118 Do Not Stuff

Do Not Stuff

M_CLK_DDR#3

M_CLK_DDR2

C296

C296 Do Not Stuff

Do Not Stuff

M_CLK_DDR#2

3D3V_S0

C

M_A_DQS#[7..0]8

DDR_VREF_S3

C

D

DM1

M_A_A[13..0]8,12

M_A_BS#28,12

M_A_BS#08,12 M_A_BS#18,12

M_A_DQ[63..0]8

M_A_DQS[7..0]8

M_ODT07,12 M_ODT17,12

C91

Do Not StuffDYC91

Do Not Stuff

12

DY

M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13

M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63

M_A_DQS#0 M_A_DQS#1 M_A_DQS#2 M_A_DQS#3 M_A_DQS#4 M_A_DQS#5 M_A_DQS#6 M_A_DQS#7

M_A_DQS0 M_A_DQS1 M_A_DQS2 M_A_DQS3 M_A_DQS4 M_A_DQS5 M_A_DQS6 M_A_DQS7

DDR_VREF_S3

SCD1U16V2ZY-2GP

12

BC2

DM1

102

A0

101

A1

100

A2

99

A3

98

A4

97

A5

94

A6

92

A7

93

A8

91

A9

105

A10/AP

90

A11

89

A12

116

A13

86

A14

84

A15

85

A16/BA2

107

BA0

106

BA1

5

DQ0

7

DQ1

17

DQ2

19

DQ3

4

DQ4

6

DQ5

14

DQ6

16

DQ7

23

DQ8

25

DQ9

35

DQ10

37

DQ11

20

DQ12

22

DQ13

36

DQ14

38

DQ15

43

DQ16

45

DQ17

55

DQ18

57

DQ19

44

DQ20

46

DQ21

56

DQ22

58

DQ23

61

DQ24

63

DQ25

73

DQ26

75

DQ27

62

DQ28

64

DQ29

74

DQ30

76

DQ31

123

DQ32

125

DQ33

135

DQ34

137

DQ35

124

DQ36

126

DQ37

134

DQ38

136

DQ39

141

DQ40

143

DQ41

151

DQ42

153

DQ43

140

DQ44

142

DQ45

152

DQ46

154

DQ47

157

DQ48

159

DQ49

173

DQ50

175

DQ51

158

DQ52

160

DQ53

174

DQ54

176

DQ55

179

DQ56

181

DQ57

189

DQ58

191

DQ59

180

DQ60

182

DQ61

192

DQ62

194

DQ63

11

/DQS0

29

/DQS1

49

/DQS2

68

/DQS3

129

/DQS4

146

/DQS5

167

/DQS6

186

/DQS7

13

DQS0

31

DQS1

51

DQS2

70

DQS3

131

DQS4

148

DQS5

169

DQS6

188

DQS7

114

ODT0

119

ODT1

1

VREF

2

VSS

202

GND

DDR2-200P-22-GP-U

High 9.2mm 2nd source:62.1 0017.A61

/RAS

/CAS

/CS0 /CS1

CKE0 CKE1

/CK0

/CK1

VDDSPD

NC#50 NC#69 NC#83

NC#120

NC#163/TEST

NORMAL TYPE

GND

62.10017.A61

D

/WE

CK0

CK1

DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7

SDA SCL

SA0 SA1

VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

108 109 113

110 115

79 80

30 32

164 166

M_A_DM0

10

M_A_DM1

26

M_A_DM2

52

M_A_DM3

67

M_A_DM4

130

M_A_DM5

147

M_A_DM6

170

M_A_DM7

185

SMBD_ICH

195

SMBC_ICH

197

199

198 200

50 69 83 120 163

81 82 87 88 95 96 103 104 111 112 117 118

3 8 9 12 15 18 21 24 27 28 33 34 39 40 41 42 47 48 53 54 59 60 65 66 71 72 77 78 121 122 127 128 132 133 138 139 144 145 149 150 155 156 161 162 165 168 171 172 177 178 183 184 187

BOM

190 193 196

201

Title

Size Document Number Rev

Date: Sheet of

Custom

1D8V_S3

M_A_RAS# 8,12 M_A_WE# 8,12 M_A_CAS# 8,12

M_CS0# 7,12 M_CS1# 7,12

M_CKE0 7,12 M_CKE1 7,12

M_CLK_DDR0 7 M_CLK_DDR#0 7

M_CLK_DDR1 7 M_CLK_DDR#1 7

M_A_DM[7..0] 8

Place near DM1

12

DDR2 Socket

DY

E

3D3V_S0

12

BC4

BC4 SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

M_CLK_DDR0

C119

C119 Do Not Stuff

Do Not Stuff

M_CLK_DDR#0

M_CLK_DDR1

C292

C292 Do Not Stuff

Do Not Stuff

M_CLK_DDR#1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

AG3 2

11 55Thursday, April 20, 2006

E

A

B

C

D

PARALLEL TERMINATION Decoupling Capacitor

E

DDR_VRE F_S0

4 4

3 3

2 2

1 1

A

Put decap near power(0.9V) and pull-up resistor

RN28

1

8

2

7 6

SRN56J-5 -GP

R151 5 6R2J-4-GPR151 56R2J-4-G P R157 5 6R2J-4-GPR157 56R2J-4-G P R133 5 6R2J-4-GPR133 56R2J-4-G P R142 5 6R2J-4-GPR142 56R2J-4-G P

8 7 6

SRN56J-5 -GP

8 7 6

SRN56J-5 -GP

8 7 6

SRN56J-5 -GP

8 7 6

SRN56J-5 -GP

8 7 6

SRN56J-5 -GP

8 7 6

SRN56J-5 -GP

8 7 6

SRN56J-5 -GP

8 7 6

SRN56J-5 -GP

8 7 6

SRN56J-5 -GP

8 7 6

SRN56J-5 -GP

8 7 6

SRN56J-5 -GP

3 45

1 2 1 2 1 2 1 2

RN31

1 2 3 45

RN88

1 2 3 45

RN87

1 2 3 45

RN85

1 2 3 45

RN36

1 2 3 45

RN37

1 2 3 45

RN32

1 2 3 45

RN30

1 2 3 45

RN25

1 2 3 45

RN27

1 2 3 45

RN26

1 2 3 45

M_B_A12 M_B_A9

M_B_A5 M_B_A3 M_B_A1 M_B_A10

M_B_A13

M_B_A4 M_B_A2 M_B_A0

M_B_A11 M_B_A7 M_B_A6

M_A_A13

M_A_A0 M_A_A2 M_A_A4

M_A_A8 M_A_A12

M_A_A6 M_A_A7 M_A_A11

M_A_A5 M_A_A3 M_A_A1 M_A_A10

M_A_A9 M_B_A8

M_CKE2 7,1 1 M_B_BS# 2 8,11

M_B_RAS # 8 ,11 M_CS2# 7,1 1 M_ODT2 7,11

M_B_BS# 1 8,11

M_CKE3 7,1 1

M_B_BS# 0 8,11 M_CS3# 7,1 1 M_B_W E# 8,1 1 M_B_CAS # 8 ,11

M_ODT0 7,11 M_CS0# 7,1 1 M_A_RAS # 8 ,11

M_A_BS# 1 8,11

M_A_BS# 0 8,11 M_A_W E# 8,1 1 M_A_CAS # 8 ,11 M_CS1# 7,1 1

M_CKE0 7,1 1 M_A_BS# 2 8,11

M_CKE1 7,1 1

M_ODT1 7,11 M_ODT3 7,11

B

M_A_A[13 ..0] 8,11

M_B_A[13 ..0] 8,11

DDR_VRE F_S0

C282

C596

SCD1U16V2ZY-2GP

1D8V_S3

Put decap near power(0.9V) and pull-up resistor

C595

SCD1U16V2ZY-2GP

C595

SCD1U16V2ZY-2GP

C278

Do Not StuffDYC278

C261

Do Not StuffDYC261

Do Not Stuff

C598

SCD1U16V2ZY-2GP

C598

C265

Do Not StuffDYC265

C266

SCD1U16V2ZY-2GP

C266

SCD1U16V2ZY-2GP

12

C216

SCD1U16V2ZY-2GP

C216

SCD1U16V2ZY-2GP

12

1D8V_S3

C590

C232

Do Not Stuff

12

DY

C287

Do Not StuffDYC287

C600

SCD1U16V2ZY-2GP

C600

SCD1U16V2ZY-2GP

Do Not Stuff

12

Place these Caps near DM1

C234

Do Not StuffDYC234

Do Not Stuff

SC2D2U6D3V3MX-1-GP

12

C279

Do Not StuffDYC232

Do Not Stuff

12

DY

C606

12

DY

SCD1U16V2ZY-2GP

C255

12

SCD1U16V2ZY-2GP

C601

SCD1U16V2ZY-2GP

C601

12

DY

C604

SCD1U16V2ZY-2GP

C604

SCD1U16V2ZY-2GP

12

DY

SC2D2U6D3V3MX-1-GP

C212

12

SCD1U16V2ZY-2GP

C245

12

SCD1U16V2ZY-2GP

12

C272

SCD1U16V2ZY-2GP

C272

SCD1U16V2ZY-2GP

C211

12

C591

SC2D2U6D3V3MX-1-GP

C591

12

DY

12

DY

SC2D2U6D3V3MX-1-GP

12

Do Not StuffDYC212

Do Not Stuff

Do Not StuffDYC245

Do Not Stuff

Place these Caps near DM2

C243

Do Not StuffDYC243

C572

SC2D2U6D3V3MX-1-GP

C572

SC2D2U6D3V3MX-1-GP

C225

SCD1U16V2ZY-2GP

C225

SCD1U16V2ZY-2GP

Do Not Stuff

12

C295

SCD1U16V2ZY-2GP

C295

SCD1U16V2ZY-2GP

12

C

12

DY

12

C616

SC2D2U6D3V3MX-1-GP

C616

SC2D2U6D3V3MX-1-GP

12

C251

SCD1U16V2ZY-2GP

C251

SCD1U16V2ZY-2GP

12

C624

SC2D2U6D3V3MX-1-GP

C624

C612

C301

SC2D2U6D3V3MX-1-GP

Do Not StuffDYC612

Do Not Stuff

12

DY

Do Not StuffDYC301

Do Not Stuff

12

DY

Do Not Stuff

12

Do Not StuffDYC211

Do Not Stuff

12

DY

12

C277

12

DY

C258

C259

Do Not StuffDYC259

Do Not Stuff

12

DY

D

C273

SCD1U16V2ZY-2GP

C273

SCD1U16V2ZY-2GP

C603

SCD1U16V2ZY-2GP

C603

Do Not StuffDYC277

Do Not Stuff

12

DY

C283

SCD1U16V2ZY-2GP

C283

SCD1U16V2ZY-2GP

12

BOM

Title

Size Document N umber Rev

Date: Sheet of

SCD1U16V2ZY-2GP

12

A3

12

C257

SCD1U16V2ZY-2GP

C257

SCD1U16V2ZY-2GP

12

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

DDR2 Termination Resistor

AG3 2

E

12 55Friday, April 21, 2006

U74

3D3V_CC D_S0

1

CCD

OUT

2

GND NC#33ON/OFF#

AAT4250 IGV-T1-GP

74.04250 .A3F

AG3-SB

2nd source: 20.K0185.012

CAP_LED32

NUM_LED32

EMAIL_LED32

STDBY_LED32

PWRL ED32

CHRGER_ LED32

DC_BATF ULL32

BLUETOO TH_LED32

WLA N_LED#26,55

GND

2

IN

1

GND

2

IN

1

GND

2

IN

1

GND

2

IN

1

GND

2

IN

1

GND

2

IN

1

GND

2

IN

1

GND

2

IN

1

Layout 40 mil

12

C33

SC1U10V 3KX-3GP

C33

Front panel

LED

ButtonVV

BlutTooth Wireless Charger Power2

V

3D3V_S0

5

IN

4

Q10

R2

R1

CHDTC12 4EU-1GP

CHDTC12 4EU-1GP Q11

Q11

R2

R1

CHDTC12 4EU-1GP

CHDTC12 4EU-1GP Q9

Q9

R2

R1

CHDTC12 4EU-1GP

CHDTC12 4EU-1GP Q23

Q23

R2

R1

CHDTC12 4EU-1GP

CHDTC12 4EU-1GP Q22

Q22

R2

R1

CHDTC12 4EU-1GP

CHDTC12 4EU-1GP Q20

Q20

R2

R1

CHDTC12 4EU-1GP

CHDTC12 4EU-1GP Q21

Q21

R2

R1

CHDTC12 4EU-1GP

CHDTC12 4EU-1GP Q40

Q40

R2

R1

CHDTC12 4EU-1GP

LCDVDD_ ON

C34

SCD1U50V3ZY-GP

C34

SCD1U50V3ZY-GP

12

V V

1 2

R673 Do Not Stuff

12

C789

CCD

SCD1U10 V2KX-4GP

OUT

CAP_LED #

3

84.00124 .F1K

OUT

NUM_LED #

3

84.00124 .F1K

OUT

EMAIL_LED #

3

84.00124 .F1K

OUT

STDBY_LED #

3

84.00124 .F1K

OUT

PWRL ED#

3

84.00124 .F1K

OUT

CHRGER_ LED#

3

84.00124 .F1K

OUT

DC_BATF ULL#

3

84.00124 .F1K

OUT

BT_LED#

3

84.00124 .F1K

U8

1

OUT

2

GND ON/OFF#3IN

AAT4280 IGU-3-T1GP

DY

AG3-SB

1 2

R295

R295 100R2J-2 -GP

100R2J-2 -GP

1 2

R294

R294 100R2J-2 -GP

100R2J-2 -GP

R624

R624 100R2J-2 -GP

100R2J-2 -GP

R293

R293 100R2J-2 -GP

100R2J-2 -GP

R622

R623

R623 100R2J-2 -GP

100R2J-2 -GP

74.04280 .B9P

ATI_LCDVD D_ON48

GMCH_LC DVDD_ON7

CCD_POW ER_ON 32

LED3,6,7 =>83.00190.S70

EMAIL_LED # 26

on Front Panel

LED-Y-29-GP

LED6

AK

83.00190 .S70

1 2

EC31 Do Not Stuff

DY

LED5

12

83.00190 .L70

LED-B-48-G P

EC30 Do Not Stuff

LED-Y-29-GP

LED3

83.00190 .S70

LED4

LED-B-48-G P

83.00190 .L70

LED8

LED-B-27-U -GP

LED-Y-29-GP

LED7

83.00190 .S70

3D3V_S0LCDVDD_ S0

12

R32

R30

C30

AK

12

AK

DY

SC1U10V3KX-3GP

ATI

GM

1 2

DY

1 2

330R2J-3 -GP

1 2

Layout 40 mil

6

IN

5

GND

4

on Front Panel

3D3V_S0

LCDVDD_ ON

12

Do Not Stuff

LCDVDD_ ON

12

0R2J-2-GP

3D3V_S5

5V_S0

AG3-SB

LCD1

MH1

45

46

MH2

44 42

IPEX-CON40 -2-GP

20.F0763 .040

20.F0763 .040 CONNECT OR

CONNECT OR

on Front Panel

BT_BTN#32

WIRELE SS_BTN#32

BTBTN1

4

5

SW-SL IDE49-GP

62.40068 .001

4143

1

2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40

Charger: OFF : Battery or DC only Orange : Charging Orange Blink : Battery low

Power: Green : S0 Orange : S3 Orange Blinking : Enter S4

1

2 3

ID_CLKID_C LKID_ CLKID_CLK ID_DATID_DATID_D ATID_DATID_ DATID_DA T

TXACLKTXACLK+TXACLK+TXACLK+

TXAOUT2 -TXAOUT2 -TXAOUT2 -TXAOUT2 -TXAOUT2 -TXAOUT2 -TXAOUT2 -TXAOUT2 -TXAOUT2 -TXAOUT2 -TXAOUT2 -TXAOUT2 TXAOUT2 +

TXAOUT1 -TXAOUT1 -TXAOUT1 -TXAOUT1 -TXAOUT1 -TXAOUT1 -TXAOUT1 -TXAOUT1 -TXAOUT1 -TXAOUT1 -TXAOUT1 -TXAOUT1 -TXAOUT1 -TXAOUT1 -TXAOUT1 -TXAOUT1 -TXAOUT1 -TXAOUT1 -

TXAOUT1 +

TXAOUT0 -TXAOUT0 -TXAOUT0 TXAOUT0 +TXAOUT0+TXAOUT0 +

TXBOUT0 -TXBOUT0 -TXBOUT0 TXBOUT0 +

TXBOUT1 TXBOUT1 +

TXBOUT2 -TXBOUT2 -TXBOUT2 TXBOUT2 +

TXBCLK-TXBCLK-TXBCLKTXBCLK+TXBCLK+TXBCLK+

RN74

1 2 3

SRN10KJ -5-GP

WLB TN1

1

2 3

SW-SL IDE49-GP

62.40068 .001

DY

Do Not Stuff

USB_PN5 16 USB_PP5 16

3D3V_S0

3D3V_S03D3V_CC D_S0

R671

12

EC121

Do Not Stuff

SC10U10V5ZY-1GP

LCD CONN

12

EC5

Do Not StuffDYEC5

Do Not Stuff

DY

Layout 60 mil

SC

1st source: 20.K0228.008

4

1 3

5

Edge Trigger

1 2

DY

LCDVDD_ S0

12

C26

SCD1U16V2ZY-2GP

EC6

1 2

12

LED BD CONN

20.K0185 .008

MLX-CON8 -7-GP-U

LEDB1

8

1

12

C25

SC100P50V2JN-3GP

12

C17

SC10U25V6KX-1GP

SC modify

CAP_LED NUM_LED MEDIA_LED #

12

EC7

SCD1U16V2ZY-2GP

100KR2J-1-GP

R25

1 2

DCBATOU T

SCD1U50V3ZY-GP

EC10

10 8 7 6 5 4 3 2

1 9

CHRGER_ LED# DC_BATF ULL# PWRL ED# STDBY_LED #

BT_LED#

Do Not Stuff

WLA N_LED#

Do Not Stuff

BRIGHTNES S 32 BLON_OU T 32

3D3V_S0

MEDIA_LED #

C801 Do Not S tuffDYC801 Do Not StuffDY C802 Do Not S tuffDYC802 Do Not StuffDY C804 Do Not S tuffDYC804 Do Not StuffDY C803 Do Not S tuffDYC803 Do Not StuffDY

EC53

EC29

12

NUM_LED #

CAP_LED #

ID_CLK ID_DAT

TXACLKTXACLK+

TXAOUT2 TXAOUT2 +

TXAOUT1 TXAOUT1 +

TXAOUT0 TXAOUT0 +

TXBOUT0 TXBOUT0 +

TXBOUT1 TXBOUT1 +

TXBOUT2 TXBOUT2 +

TXBCLKTXBCLK+

Do Not Stuff

EC19

EC19 SCD1U10 V2KX-4GP

SCD1U10 V2KX-4GP

3

83.00056 .E11

SA

1 2 1 2 1 2 1 2

RC1Do Not Stuff

1

8

2

7

DY

3

6

4 5

DY

1 2

DY

1 2

PWRB TN#26

RN3 SRN0J-6-GP

RN6 SRN0J-6-GP

RN7 SRN0J-6-GP

RN8 SRN0J-6-GP

RN9 SRN0J-6-GP

RN5 SRN0J-6-GP

RN11 SRN0J-6-G P

RN4 SRN0J-6 -GP

RN10 SRN0J-6-G P

5V_S0

12

R159

SATA

D11

2

R167

1

BAW5 6PT-U

3D3V_AU X_S5

R21

R21 100KR2J -1-GP

100KR2J -1-GP

1 2

1

GM

2 3

1 2 3

GM

1 2 3

GM

1 2 3

GM

1 2 3

GM

1 2 3

GM

1 2 3

GM

1 2 3

GM

1 2 3

GM

CDROM_L ED# 2 0

PATA

0R2J-2-GP

PWRB TN#

4

Dummy when use IDE

12

1 2

R18 470R2J-2 -GPR18 470R2J-2 -GP

LDDC_CL K 7 LDDC_DA TA 7

LA_CLK# 7 LA_CLK 7

LA_DATA #_2 7 LA_DATA _2 7

LA_DATA #_1 7 LA_DATA _1 7

LA_DATA #_0 7 LA_DATA _0 7

LB_DATA #_0 7 LB_DATA _0 7

LB_DATA #_1 7 LB_DATA _1 7

LB_DATA #_2 7 LB_DATA _2 7

LB_CLK# 7 LB_CLK 7

R582

HDLED#

R163

ID_CLK ID_DAT

RN15 Do Not Stuff

TXACLKTXACLK+

TXAOUT2 TXAOUT2 +

RN17 Do Not Stuff

TXAOUT1 TXAOUT1 +

RN18 Do Not Stuff

TXAOUT0 TXAOUT0 +

RN14 Do Not Stuff

TXBOUT0 TXBOUT0 +

RN20 Do Not Stuff

TXBOUT1 TXBOUT1 +

RN13 Do Not Stuff

TXBOUT2 TXBOUT2 +

RN19 Do Not Stuff

TXBCLKTXBCLK+

3D3V_S0

SATA

12

Do Not Stuff

12

0R2J-2-GP

PATA

12

C14

C14 SCD1U16 V2ZY-2GP

SCD1U16 V2ZY-2GP

RN12 Do Not Stuff

1 2 3

ATI

1 2 3

ATI

RN16 Do Not Stuff

1 2 3

ATI

1

ATI

2 3

1 2 3

ATI

1

ATI

2 3

1 2 3

ATI

1 2 3

ATI

1 2 3

ATI

12

R583

R583 10KR2J-3 -GP

10KR2J-3 -GP

SATA_LE D# 1 5

HDD_LED # 20

EC_PW RBTN# 3 2

Dummy when use SATA

BOM

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document N umber Rev

Size Document N umber Rev A3

A3

Date: Sheet of

LCD / LAUNCH / LEDs

Taipei Hsien 221, Taiwan, R.O.C.

AG3 2

13 55Friday, April 21, 2006

4

EDID_CLK 46 EDID_DAT 46

ATI_TXACL K- 48

ATI_TXACL K+ 48

ATI_TXAOU T2- 48

ATI_TXAOU T2+ 48

ATI_TXAOU T1- 48

ATI_TXAOU T1+ 48

ATI_TXAOU T0- 48

ATI_TXAOU T0+ 48

ATI_TXBOU T0- 48

ATI_TXBOU T0+ 48

ATI_TXBOU T1- 48

ATI_TXBOU T1+ 48

ATI_TXBOU T2- 48

ATI_TXBOU T2+ 48

ATI_TXBCL K- 48

ATI_TXBCL K+ 48

A

B

C

D

E

Layout Note: Place these resistors close to the CRT-out connector

ATI

ATI_RED46

GMCH_RE D7

4 4

ATI_GREEN46

GMCH_GR EEN7

ATI_BLUE46

GMCH_BL UE7

1 2

R318 Do Not Stuff

GM

1 2

R317 0R2J-2-GP

ATI

1 2

R313 Do Not Stuff

GM

1 2

R314 0R2J-2-GP

ATI

1 2

R319 Do Not Stuff

GM

1 2

R320 0R2J-2-GP

R308

150R2F-1 -GP

R310

150R2F-1-GP

12

R300

150R2F-1-GP

12

C445

SC3D9P50V2CN-1GP

Layout Note: * Must be a ground return path between this ground and the ground on the VGA connector.

Ferrite bead impedance: 30 ohm@100MHz

12

RED

GREEN

BLUE

C442

SC3D9P50V2CN-1GP

1 2

L11 BLM18PG 300SN-GPL11 BLM18PG 300SN-GP

1 2

L10 BLM18PG 300SN-GPL10 BLM18PG 300SN-GP

1 2

L9 BLM18PG 300SN-GPL9 BLM18PG 300SN-GP

12

C446

SC3D9P50V2CN-1GP

SA

CRT_R

3D3V_S0

CRT_G

12

C441

SC6D8P50V2DN-GP

CRT_B

12

C440

SC6D8P50V2DN-GP

12

C437

SC6D8P50V2DN-GP

CRT_IN#32

DAT_DDC 1_5

JVGA_HS

CLK_DDC 1_5

10KR2J-3-GPR610KR2J-3-GP

R6

JVGA_VS

5V_S0

CH521S-3 0-GP-U

CH521S-3 0-GP-U D5

D5

2 1

12

4

1

2 3

RN1

RN1 SRN10KJ -5-GP

SRN10KJ -5-GP

Pi-filter & 150 Ohm pull-down resistors should be as close as to CRT CONN. RGB will hit 75 Ohm first, pi-filter, then CRT CONN.

3 3

12

C5

SC100P50V2JN-3GPC5SC100P50V2JN-3GP

12

C8

SC100P50V2JN-3GPC8SC100P50V2JN-3GP

CRT I/F & CONNECTOR

AG3-SB

CRT1

17

11

12

13

14

15

16

VIDEO-15-42 -GP-U

12

SC100P50V2JN-3GPC4SC100P50V2JN-3GP

12

C3

SC18P50V2JN-1-GPC3SC18P50V2JN-1-GP

C4

SC18P50V2JN-1-GPC2SC18P50V2JN-1-GP

C2

VIDEO-15-42 -GP-U

20.20378 .015

6 1

7 2 8 3 9 4 10 5

CRT_R

CRT_G

CRT_B

CRT_IN#_C N

5V_CRT_ S0

12

C1

C1 SCD01U1 6V2KX-3GP

SCD01U1 6V2KX-3GP

R2

1 2

470R2J-2 -GP

DY

R1

R1 Do Not Stuff

Do Not Stuff

1 2

CRT_IN#

SA

Hsync & Vsync level shift

5V_CRT_ S0

12

C13

C13 SCD1U16 V2ZY-2GP

SCD1U16 V2ZY-2GP

R9

1 2

GM

GMCH_HS Y7

ATI_HSY46

GMCH_VS Y7

ATI_VSY46

2 2

GM

39R2J-L-G P

1 2

ATI

R11 Do Not Stuff

R15

1 2

GM

1 2

ATI

R16 Do Not S tuff

HSYNC_4 CRT _HSYNC1

39R2J-L-G P

VSYNC_4

14

4

5 6

U1B TSAHCT12 5PW-GPU1 B TSA HCT125PW-G P

7

2 3

14

7

U1A

1

TSAHCT1 25PW-GP

CRT_VSYNC 1

0R2J-2-GP

JVGA_HS

1 2

R4

For System CRT

0R2J-2-GP

JVGA_VS

1 2

R3

GMCH_DD CDATA7

GMCH_DD CCLK7

AG3-SB

C432

AG3-SB

R70

ATITV

GMTV

ATITV

GMTV

ATITV

GMTV

1 2

Do Not Stuff

1 2

Do Not Stuff

1 2

Do Not Stuff

1 2

Do Not Stuff

1 2

Do Not Stuff

1 2

Do Not Stuff

A

R494

R67

R496

R62

R499

ATI_TV_CR MA46

TV_DACC7

ATI_TV_LU MA46

1 1

TV_DACB7

ATI_TV_CO MP46

TV_DACA7

R305

Do Not Stuff

R306

Do Not Stuff

R307

Do Not Stuff

DACC

12

Do Not Stuff

TV

DACB

TV

12

Do Not Stuff C436

C436

TV

Do Not Stuff

DACB LUMA_1

12

Do Not Stuff

Do Not Stuff C438

C438 Do Not Stuff

Do Not Stuff

TV

Do Not Stuff

12

C439

C439 Do Not Stuff

Do Not Stuff

TV

1 2

TV

1 2

TV

L6

1 2

TV

1 2

L7

1 2

L8

C432 Do Not Stuff

Do Not Stuff

12

TV

C433

C433 Do Not Stuff

Do Not Stuff

TV

12

C434

C434 Do Not Stuff

Do Not Stuff

TV

12

CRMA_1DACC

C429

C429 Do Not Stuff

Do Not Stuff

C431

C431 Do Not Stuff

Do Not Stuff

TV

COMP_1DACA

C430

C430 Do Not Stuff

Do Not Stuff

TV

B

3 6 7 5 2 4

1

9

TVOUT1

TV

8

Do Not Stuff

Reverse type

TV OUT CONN

LUMA_1

CRMA_1

COMP_1

C

D1

3

Do Not Stuff

D2

3

Do Not Stuff

D3

3

Do Not Stuff

TV

5V_S0

2

1

2

1

2

1

DDC_CLK & DATA level shift

R296 4 7R2J-2-GP

1 2

ATI_DDCDA T4 6

ATI_DDCCL K46

CRT_R

CRT_G

CRT_B

1 2

R297 Do Not Stuff

1 2

R298 Do Not Stuff

R298 Do Not Stuff R299 4 7R2J-2-GP

R299 4 7R2J-2-GP

1 2

D21

3

BAV99PT -GP-U

D20

3

BAV99PT -GP-U

D19

3

BAV99PT -GP-U

D

GM

ATI

GM

5V_S0

2

1

2

1

2

1

3D3V_S0

4

RN75

RN75 SRN2K2J -1-GP

SRN2K2J -1-GP

1

2 3

G

S D

Q25

FDN337N -1-GP

BOM

Title

Size Document N umber Rev

Size Document N umber Rev A3

A3

Date: Sheet of

CRT/TV Connector

AG3 2

DAT_DDC 1_5

G

CLK_DDC 1_5

S D

Q24

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

14 55Thursday, April 20, 2006

E

A

B

C

D

E

AG3-SB

SC1D8P5 0V2CC-GP

1 2

C688

4 4

3D3V_AU X_S5

D33

1

RTC1

PWR

GND MH1 MH2

BAT-CON2 -U2-GP

AG3-SB

3 3

2 2

1 1

RTC circuitry

BATBATBATBAT BATBATBA TBATBATBAT BATBATBA TBATBATBATBATBATBATBAT BATBATBA TBATBATBAT BATBATBA TBATBATBAT

1 2 MH1 MH2

BATBATBATBATBATBATBATBAT

1 2

R574

R574 1KR2J-1-G P

1KR2J-1-G P

DY

C698

C698 Do Not Stuff

Do Not Stuff

BAT_D RTC_RST #

RTC_AUX _S5

12

R264

R264 300KR2J -GP

300KR2J -GP

12

R265

R265 Do Not Stuff

Do Not Stuff

DY

3

2

BAT54C-1 -GP

AG3-SB

P.H. for internal VCCSUS1_05

INTVRMEN

Enable

Disable10

RTC_AUX _S5

12

C706

C706 SC1U10V 3ZY-6GP

SC1U10V 3ZY-6GP

R588 2 0KR2J-L2-GPR588 2 0KR2J-L2-GP

1 2

1MR2J-1-G P

ACZ_BTC LK_MDC21

ACZ_SYNC21,29

ACZ_RST #21,29

INTVRMEN

1MR2J-1-G P

AC97_BT CLK29

Place within 500 mils of ICH7ball

ACZ_SDA TAOUT21,29

Change to 24.9 1% ohm when use SATA HD

R579

12

C707

C707 SC1U10V 3ZY-6GP

SC1U10V 3ZY-6GP

AC97_BT CLK

R256

22R2J-2-G P

C688

32

C681

1 2

SC1D8P5 0V2CC-GP

R259

12

22R2J-2-G P

12

1 2

R255 3 9R2J-L-GPR255 39R2J-L-G P

1 2

39R2J-L-G P

ACZ_SDA TAIN029 ACZ_SDA TAIN121

1 2

SATA_LE D#13

SATA_RX N020 SATA_RX P020

SATA_TX N020 SATA_TX P020

CLK_PCIE_ SATA#3 CLK_PCIE_ SATA3

1 2

R578

IDE_PDIOR#20 IDE_PDIOW #20 IDE_PDDAC K#20

INT_IRQ1420 IDE_PDIORDY20

39R2J-L-G P

R258

R257

1 4

X6

X-32D768KHZ-39GPX6X-32D768KHZ-39GP

TP59Do Not StuffTP59Do Not Stuff

ACZ_SDA TAOUT_R

24D9R2F -L-GP

12

R566

R566 10MR2J-L -GP

10MR2J-L -GP

RCT_X1

RCT_X2

INTRUDER# INTVRMEN

ACZ_BIT_C LK ACZ_SYNC_ R

ACZ_RST #_R

SATARBIAS

AB1 AB2

AA3

AF18

AF3

AE3 AG2 AH2

AF7 AE7 AG6 AH6

AF1 AE1

AH10 AG10

AF15

AH15

AF16 AH16 AG16 AE15

Y5

W4

W1

Y1 Y2

W3

V3

U3

U5 V4 T5

U7 V6 V7

U1 R6

R5

T2 T3 T1

T4

U62A

RTXC1 RTCX2

RTCRST#

INTRUDER# INTVRMEN

EE_CS EE_SHCLK EE_DOUT EE_DIN

LAN_CLK

LAN_RSTSYNC

LAN_RXD0 LAN_RXD1 LAN_RXD2

LAN_TXD0 LAN_TXD1 LAN_TXD2

ACZ_BIT_CLK ACZ_SYNC

ACZ_RST#

ACZ_SDIN0 ACZ_SDIN1 ACZ_SDIN2

ACZ_SDOUT

SATALED#

SATA0RXN SATA0RXP SATA0TXN SATA0TXP

SATA2RXN SATA2RXP SATA2TXN SATA2TXP

SATA_CLKN SATA_CLKP

SATARBIASN SATARBIASP

DIOR# DIOW# DDACK# IDEIRQ IORDY DDREQ

AC-97/AZALIA

IDE

LPCCPU

RTCLAN

SATA

LAD0 LAD1 LAD2 LAD3

LDRQ0#

LDRQ1#/GPIO23

LFRAME#

A20GATE

A20M#

CPUSLP#

TP1/DPRSTP#

TP2/DPSLP#

FERR#

GPIO49/CPUPWRGD

IGNNE#

INIT3_3V#

INIT#

INTR

RCIN#

NMI

SMI#

STPCLK#

THERMTRIP#

DD0 DD1 DD2 DD3 DD4 DD5 DD6 DD7 DD8

DD9 DD10 DD11 DD12 DD13 DD14 DD15

DA0

DA1

DA2

DCS1# DCS3#

KI.80101.01 7

AA6 AB5 AC4 Y6

AC3 AA5

AB3

AE22 AH28

AG27

AF24 AH25

AG26

AG24

AG22 AG21 AF22 AF25

AG23

AH24 AF23

AH22

AF26

AB15 AE14 AG13 AF13 AD14 AC13 AD12 AC12 AE12 AF12 AB13 AC14 AF14 AH13 AH14 AC15

AH17 AE17 AF17

AE16 AD16

LPC_LAD 0 LPC_LAD 1 LPC_LAD 2 LPC_LAD 3

1 2

R268

H_CPUSL P#_2

H_DPRSL P#_2

H_THERM TRIP_R

LPC_LDR Q0# 34

10KR2J-3 -GP

H_DPSLP # 4

LPC_LAD [0..3] 32 ,34,35

3D3V_S0

LPC_LFR AME# 32,3 4,35

K_A20GA TE 32 H_A20M# 4

H_PW RGD 4,3 6

H_IGNNE# 4 FWH _INIT# 35 H_INIT# 4 H_INTR 4

H_RCIN# 32

H_NMI 4 H_SMI# 4

H_STPCL K# 4

IDE_PDD0 20 IDE_PDD1 20 IDE_PDD2 20 IDE_PDD3 20 IDE_PDD4 20 IDE_PDD5 20 IDE_PDD6 20 IDE_PDD7 20 IDE_PDD8 20 IDE_PDD9 20 IDE_PDD10 20 IDE_PDD11 20 IDE_PDD12 20 IDE_PDD13 20 IDE_PDD14 20 IDE_PDD15 20

IDE_PDA0 20 IDE_PDA1 20 IDE_PDA2 20

IDE_PDCS1 # 20 IDE_PDCS3 # 20IDE_PDDRE Q20

DY

1 2

R587 D o Not Stuff

1 2

R285 0R2J -2-GPR285 0R2J -2-GP

BOM

1D05V_S 0

H_DPSLP #

Open R168 for Dothan A step Shunt for Dothan B step & all Yonah

H_CPUSL P# 4,6

H_DPRSL P# 4,38

H_PW RGD

1 2

R584

DY

SC Modify

Layout Note: R568 needs to placed within 2" of ICH7, R568 must be placed within 2" of R169 w/o stub.

12

R585

R585 Do Not Stuff

Do Not Stuff

DY

1D05V_S 0

Do Not Stuff

12

1D05V_S 0

12

R586

R586 56R2J-4-G P

56R2J-4-G P

R284

R284 56R2J-4-G P

56R2J-4-G P

H_FERR# 4

Placement Note: Diatance between the ICH-7 M and cap on the "P" signal should be identical distance between the ICH-7 M and cap on the "N" signal for same pair.

A

B

C

D

Title

Size Document N umber Rev

Size Document N umber Rev A3

A3

Date: Sheet of

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

ICH7-M (1 of 4)

AG3 2

15 55Friday, April 21, 2006

E

A

PCI_AD[0..31]22,24 ,27,31

4 4

INT_PIRQB#27

3 3

PCI_AD0 PCI_AD1 PCI_AD2 PCI_AD3 PCI_AD4 PCI_AD5 PCI_AD6 PCI_AD7 PCI_AD8 PCI_AD9 PCI_AD10 PCI_AD11 PCI_AD12 PCI_AD13 PCI_AD14 PCI_AD15 PCI_AD16 PCI_AD17 PCI_AD18 PCI_AD19 PCI_AD20 PCI_AD21 PCI_AD22 PCI_AD23 PCI_AD24 PCI_AD25 PCI_AD26 PCI_AD27 PCI_AD28 PCI_AD29 PCI_AD30 PCI_AD31

INT_PIRQA# INT_PIRQB# INT_PIRQC# INT_PIRQD#

U62B

E18

AD0

C18 A16 F18 E16 A18 E17 A17 A15 C14 E14 D14 B12 C13 G15 G13 E12 C11 D11 A11 A10 F11 F10

AE5

AD5 AG4 AH4 AD9

E9 D9 B9 A8 A6 C7 B6 E6 D6

A3 B4 C5 B5

PCI

AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31

Interrupt I/F

PIRQA# PIRQB# PIRQC# PIRQD#

MISC

RSVD[1] RSVD[2] RSVD[3] RSVD[4] RSVD[5]

REQ0# GNT0# REQ1# GNT1# REQ2# GNT2# REQ3#

GNT3# REQ4#/GPIO22 GNT4#/GPIO48

GPIO1/REQ5#

GPIO17/GNT5#

C/BE0#

C/BE1#

C/BE2#

C/BE3#

IRDY#

PAR

PCIRST#

DEVSEL#

PERR#

PLOCK#

SERR#

STOP#

TRDY#

FRAME#

PLTRST#

PCICLK

PME#

GPIO2/PIRQE#

GPIO3/PIRQF# GPIO4/PIRQG# GPIO5/PIRQH#

RSVD[6] RSVD[7] RSVD[8] RSVD[9]

MCH_SYNC#

D7 E7 C16 D16 C17 D17 E13 F13 A13 A14 C8 D8

B15 C12 D12 C15

A7 E10 B18 A12 C9 E11 B10 F15 F14 F16

C26 A9 B19

G8 F7 F8 G7

AE9 AG8 AH8 F21 AH20

ICH7 Pullups

RP1

MCH_ICH_S YNC#

PCI_FRAME # PCI_STOP# PCI_REQ#2

3D3V_S0

PCI_DEVSE L# PCI_REQ#4 INT_PIRQE# PCI_SERR#

3D3V_S0

2 2

1 1

3D3V_S0

1 2

R272

R565

1 2

R537

1 2

R276

1 2

INT_PIRQB# INT_PIRQD# INT_PIRQC# INT_PIRQA#

PM_CLKR UN#

ACZ_SPK R

ECSCI#

EXT_FW H#

DY

Do Not Stuff

SPI

10KR2J-3 -GP

DY

Do Not Stuff

DY

Do Not Stuff

RP1

1 2 3 4 5 6

SRN8K2J -2-GP

SRN8K2J -2-GP RP2

RP2

1 2 3 4 5 6

SRN8K2J -2-GP

SRN8K2J -2-GP RP4

RP4

1 2 3 4 5 6

SRN8K2J -2-GP

1 2

8K2R2J-3 -GP

DY

R535 D o Not Stuff

1 2

R274 1 0KR2J-3-GPR274 10KR2J -3-GP

1 2

R564 1 0KR2J-3-GPR564 10KR2J -3-GP

PCI_GNT#5

SPI_WP #

PCI_GNT#4

PWRO K

S D

Boot from various source

A

10

PCI_LOCK#

9

PCI_REQ#3

8

PCI_TRDY#

7

PCI_REQ#1

10

INT_SERIRQ

9

PCI_REQ#5

8

INT_PIRQG#

7

PCI_PERR#

10

INT_PIRQH#

9

PCI_IRDY#

8

PCI_REQ#0

7

INT_PIRQF#

R581

12

Q37

Q37 2N7002-7 F-GP

2N7002-7 F-GP

G

Default:H

LPC H H

PCI H L

SPI L H

3D3V_S0

EXT_FW H#

GNT5# GNT4#

PM_RI#

SMB_LINK_ ALERT#

PSW_ CLR# DBRESET# SMB_ALE RT#

3D3V_S5

EXT_FW H# 3 5

4K7R2J-2 -GP

T=22ms

100KR2J -1-GP

B

PCI_REQ#0

PCI_REQ#1

PCI_REQ#2

PCI_REQ#3 PCI_GNT#3 PCI_REQ#4 PCI_GNT#4 PCI_REQ#5 PCI_GNT#5

PCI_C/BE#0 22,24,27,3 1 PCI_C/BE#1 22,24,27,3 1 PCI_C/BE#2 22,24,27,3 1 PCI_C/BE#3 22,24,27,3 1

PCI_IRDY# 2 2,24,27,31

R533

1 2

PCI_LOCK#

R243 0R2J-2-GPR243 0R2J-2-GP

ICH_PME#_ 1

INT_PIRQE# INT_PIRQF# INT_PIRQG# INT_PIRQH#

USB_OC# 5 USB_OC# 3 USB_OC# 0 USB_OC# 4

ECSMI# ECSW I#

SMLINK1 SMLINK0

3D3V_S5

R573

R576

PCI_PAR 22 ,24,27,31

47R2J-2-G P

PCI_DEVSE L# 22 ,24,27,31 PCI_PERR# 22,24,27,3 1

PCI_SERR# 22,24,27,3 1 PCI_STOP# 22,24,2 7,31 PCI_TRDY# 22,24,2 7,31

PCI_FRAME # 22,2 4,27,31

12

1 2

R534 Do Not StuffR534 Do Not Stuff

RP3

1 2 3 4 5 6

SRN10KJ -L3-GP

SRN10KJ -L3-GP RP5

RP5

1 2 3 4 5 6

SRN10KJ -L3-GP

D30

1 2

1

12

B

4

BAT54-4-G P

PCI_REQ#0 24 PCI_GNT#0 2 4 PCI_REQ#1 31 PCI_GNT#1 3 1 PCI_REQ#2 22 PCI_GNT#2 2 2 PCI_REQ#3 27 PCI_GNT#3 2 7

TP75 Do Not StuffTP75 Do Not Stuff

TP55 Do Not StuffTP55 Do Not Stuff

PCIRST1# 22,2 4,27,31

PLT_RST 1# 7,20,2 6,31,32,34,35,45,5 5 CLK_ICHPC I 3

ICH_PME# 22

INT_PIRQE# 31 INT_PIRQF# 27 INT_PIRQG# 24 INT_PIRQH# 22,24

MCH_ICH_S YNC# 7

10

ICH7_GPI12

9 8

PM_BATL OW#_R

7

PCIE_W AKE#

10

USB_OC# 6

9

USB_OC# 7

8

USB_OC# 2

7

USB_OC# 1

3D3V_S5

RN55 SRN100K J-6-GPRN55 SR N100KJ-6-GP

23 1

RN95

23 1

SRN10KJ -5-GP

3

2

RSMRST# _TO_KBC 32

C702

C702 SC4D7U1 0V5ZY-3GP

SC4D7U1 0V5ZY-3GP

3D3V_S5

Mini Card

NEW

C

U62C

ECSMI#

R253

C22

SMBCLK

B22

SMBDATA

A26

LINKALERT#

B25

SMLINK0

A25

SMLINK1

A28

RI#

A19

SPKR

A27

SUS_STAT#

A22

SYS_RST#

AB18

GPIO0/BM_BUSY#

B23

GPIO11/SMBALERT#

AC20

GPIO18/STPPCI#

AF21

GPIO20/STPCPU#

A21

GPIO26

B21

GPIO27

E23

GPIO28

AG18

GPIO32/CLKRUN#

AC19

GPIO33/AZ_DOCK_EN#

U2

GPIO34/AZ_DOCK_RST#

F20

WAKE#

AH21

SERIRQ

AF20

THRM#

AD22

VRMPWRGD

AC21

GPIO6

AC18

GPIO7

E21

GPIO8

PCIE_TXN1 M PCIE_TXP1 M

PCIE_TXN2 M PCIE_TXP2 M

PCIE_RXN3 NM PCIE_RXP3 NM PCIE_TXN3 NM PCIE_TXP3 NM

SPI_CLK_1 SPI_CS# SPI_ARB

SPI_MOSI SPI_MISO

USB_OC# 0

USB_OC# 1 USB_OC# 2 USB_OC# 3 USB_OC# 4 USB_OC# 5 USB_OC# 6 USB_OC# 7

F26 F25 E28 E27

H26 H25 G28 G27

K26 K25

J28 J27

M26 M25

L28 L27

P26 P25 N28 N27

T25 T24 R28 R27

R2 P6 P1

P5 P2

D3 C4 D5 D4 E5 C3 A2 B3

U62D

PERn1 PERp1 PETn1 PETp1

PERn2 PERp2 PETn2 PETp2

PERn3 PERp3 PETn3 PETp3

PERn4 PERp4 PETn4 PETp4

PERn5 PERp5 PETn5 PETp5

PERn6 PERp6 PETn6 PETp6

SPI_CLK SPI_CS# SPI_ARB

SPI_MOSI SPI_MISO

OC0# OC1# OC2# OC3# OC4# OC5#/GPIO29 OC6#/GPIO30 OC7#/GPIO31

R252

SMB_CLK18,26,31,5 5 SMB_DAT A1 8,26,31,55

ACZ_SPK R29

PM_SUS_ STAT#32,34

PM_BMBU SY#7

PM_STPP CI#3 PM_STPC PU#3

PSW_ CLR#33

PM_CLKR UN#22,24,27,3 1,32,34

PCIE_W AKE#31,32

SPI_WP #35

PCIE_RXN155

PCIE_RXP155 PCIE_TXN155 PCIE_TXP155

PCIE_RXN226

PCIE_RXP226 PCIE_TXN226 PCIE_TXP226

PCIE_RXN3 N3 1 PCIE_RXP3 N31

PCIE_TXN3 N31 PCIE_TXP3 N31

C723 SCD1 U16V2KX-3GPC7 23 SCD1U16V2KX -3GP C724 SCD1 U16V2KX-3GPC7 24 SCD1U16V2KX -3GP

C348 SCD1 U16V2KX-3GPC3 48 SCD1U16V2KX -3GP C343 SCD1 U16V2KX-3GPC3 43 SCD1U16V2KX -3GP

RN69

SPI_CLK35

C

SMB_LINK_ ALERT#

SMLINK0 SMLINK1

PM_RI#

DBRESET #

SMB_ALE RT#

PSW_ CLR#

PCIE_W AKE#

INT_SERIRQ24,27,31,3 2,34

THRM#19

VGATE_P WRGD7,38 ,48

ECSCI#32

12 12

1 2 3

SRN0J-6-G P

4

C355 SCD1 U16V2KX-3GPC3 55 SCD1U16V2KX -3GP

12 12

C360 SCD1 U16V2KX-3GPC3 60 SCD1U16V2KX -3GP

1 2

47R2J-2-G P

47R2J-2-G P TP57Do Not StuffTP57Do Not Stuff

USB_OC# 221

USB_OC# 421

SPI_CS#35

SPI_MOSI35 SPI_MISO35

SMB

SYS

GPIO

PCI-Express

SPI

1 2

RN70

4

SRN10KJ -5-GP

D

SATA

GPIO

SATA

GPIO

Clocks

GPIO16/DPRSLPVR

GPIO

Power MGT

DMI_CLKN DMI_CLKP

Direct Media Interface

DMI_ZCOMP

DMI_IRCOMP

USB

USBRBIAS#

USBRBIAS

10KR2J-3 -GP

23 1

D

GPIO21/SATA0GP GPIO19/SATA1GP GPIO36/SATA2GP GPIO37/SATA3GP

CLK14 CLK48

SUSCLK

SLP_S3# SLP_S4# SLP_S5#

PWROK

TP0/BATLOW#

PWRBTN#

LAN_RST#

RSMRST#

GPIO9 GPIO10 GPIO12 GPIO13 GPIO14 GPIO15 GPIO24 GPIO25 GPIO35 GPIO38 GPIO39

V26

DMI0RXN

V25

DMI0RXP

U28

DMI0TXN

U27

DMI0TXP

Y26

DMI1RXN

Y25

DMI1RXP

W28

DMI1TXN

W27

DMI1TXP

AB26

DMI2RXN

AB25

DMI2RXP

AA28

DMI2TXN

AA27

DMI2TXP

AD25

DMI3RXN

AD24

DMI3RXP

AC28

DMI3TXN

AC27

DMI3TXP

AE28

AE27

C25

D25

F1

USBP0N

F2

USBP0P

G4

USBP1N

G3

USBP1P

H1

USBP2N

H2

USBP2P

J4

USBP3N

J3

USBP3P

K1

USBP4N

K2

USBP4P

L4

USBP5N

L5

USBP5P

M1

USBP6N

M2

USBP6P

N4

USBP7N

N3

USBP7P

D2

D1

3D3V_S5

E

RN101

SATA0_R 0

AF19

SATA0_R 1

AH18

SATA0_R 2

AH19

SATA0_R 3

AE19

AC1

CLK_ICH14 3

B2

C20

B24 D23 F22

AA4

AC22

C21

C23

C19

Y4

E20 A20 F19 E19 R4 E22 R3 D20 AD21 AD20 AE20

BOM

Title

Size Document N umber Rev

Size Document N umber Rev A3

A3

Date: Sheet of

PM_SUS_ CLK 18

PM_SLP_ S3# 18 ,31,32,36,41,43,52

PM_SLP_ S5# 32,4 1

PM_DPRS LPVR_R

PM_BATL OW#_R

PWRB TN#_ICH

R536

1 2

10KR2J-3 -GP

ICH7_GPI12

BLUETOO TH_ENM

DMI_RXN0 7 DMI_RXP0 7 DMI_TXN0 7 DMI_TXP0 7

DMI_RXN1 7 DMI_RXP1 7 DMI_TXN1 7 DMI_TXP1 7

DMI_RXN2 7 DMI_RXP2 7 DMI_TXN2 7 DMI_TXP2 7

DMI_RXN3 7 DMI_RXP3 7 DMI_TXN3 7 DMI_TXP3 7

CLK_PCIE_ ICH# 3 CLK_PCIE_ ICH 3

DMI_IRCOMP_R

USB_PN0 21 USB_PP0 21 USB_PN1 21 USB_PP1 21 USB_PN2 21 USB_PP2 21 USB_PN3 31 USB_PP3 31 USB_PN4 21 USB_PP4 21 USB_PN5 13 USB_PP5 13 USB_PN6 26 USB_PP6 26

USB_RBIAS _PN

SATA0_R 2 SATA0_R 0 SATA0_R 3 SATA0_R 1

PWRO K 7,19

R270 100R2J-2 -GPR270 1 00R2J-2-GP

1 2

R271 Do Not S tuff

DY

D15

BAS16-1-G P

1

2

ECSW I# 32

1 2

R273 0R2J -2-GPR273 0R2 J-2-GP

Layout Note: PCIE AC coupling caps need to be within 250 mils of the driver.

1 2

R540 22D6R2F-L1-GPR 540 22D6R 2F-L1-GP

ICH7-M (2 of 4)

AG3 2

RN101

1 2 3 4 5

SRN10KJ -7GP

R538

1 2

Do Not Stuff

12

3

12

R267

R267 100KR2J -1-GP

100KR2J -1-GP

DMI_TXN[3..0]7

DMI_TXP[3..0]7 DMI_RXN[3..0]7 DMI_RXP[3..0]7

1D5V_S0

Place within 500 mils of ICH

12

R242

R242 24D9R2F -L-GP

24D9R2F -L-GP

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

E

3D3V_S0

8 7 6

CLK48_ICH 3

DY

1 2

DY

C654

Do Not Stuff

PM_DPRS LPVR 38

SB_PW RBTN# 32

SB_RSMR ST# 32

NEWC ARD_RST# 3 1

BLUETOO TH_EN 21

USB

Pair

0

1

2

3

4 USB3

5

67MINIC1

16 55Friday, April 21, 2006

Device

USB1

BT

USB2

NEW C

CCD

NC

A

B

C

D

E

Layout Note:

C367

SCD1U10V2KX-4GP

C336

SCD1U10V2KX-4GP

C336

SCD1U10V2KX-4GP

3D3V_S0

C361

Do Not StuffDYC361

Do Not Stuff

3D3V_S5

12

0R3-0-U-GP

C369

SCD1U10 V2KX-4GP

1D5V_S0

12

C356

C356 SCD1U10 V2KX-4GP

SCD1U10 V2KX-4GP

Place near pin AA19

12

C359

SCD1U10V2KX-4GP

3D3V_S5

12

C380

C380 SCD1U10 V2KX-4GP

SCD1U10 V2KX-4GP

1D05V_S 0

DY

12

C363

Do Not Stuff

12

C408

SCD1U10V2KX-4GP

C408

SCD1U10V2KX-4GP

RTC_AUX _S5

12

C388

C388 SCD1U10 V2KX-4GP

SCD1U10 V2KX-4GP

12

C370

DY

D

DY

12

C374

Do Not Stuff

DY

12

Layout Note: Place near AB3

R245

1 2

Do Not Stuff

C372

Do Not Stuff

3D3V_S53D3V_ICH_ S5

0R3-0-U-GP

U62F

G10

V5REF[1]

AD17

V5REF[2]

F6

V5REF_Sus

AA22

Vcc1_5_B[1]

AA23

Vcc1_5_B[2]

AB22

Vcc1_5_B[3]

AB23

Vcc1_5_B[4]

AC23

Vcc1_5_B[5]

AC24

Vcc1_5_B[6]

AC25

Vcc1_5_B[7]

AC26

Vcc1_5_B[8]

AD26

Vcc1_5_B[9]

AD27

Vcc1_5_B[10]

AD28

Vcc1_5_B[11]

D26

Vcc1_5_B[12]

D27

Vcc1_5_B[13]

D28

Vcc1_5_B[14]

E24

Vcc1_5_B[15]

E25

Vcc1_5_B[16]

E26

Vcc1_5_B[17]

F23

Vcc1_5_B[18]

F24

Vcc1_5_B[19]

G22

Vcc1_5_B[20]

G23

Vcc1_5_B[21]

H22

Vcc1_5_B[22]

H23

Vcc1_5_B[23]

J22

Vcc1_5_B[24]

J23

Vcc1_5_B[25]

K22

Vcc1_5_B[26]

K23

Vcc1_5_B[27]

L22

Vcc1_5_B[28]

L23

Vcc1_5_B[29]

M22

Vcc1_5_B[30]

M23

Vcc1_5_B[31]

N22

Vcc1_5_B[32]

N23

Vcc1_5_B[33]

P22

Vcc1_5_B[34]

P23

Vcc1_5_B[35]

R22

Vcc1_5_B[36]

R23

Vcc1_5_B[37]

R24

Vcc1_5_B[38]

R25

Vcc1_5_B[39]

R26

Vcc1_5_B[40]

T22

Vcc1_5_B[41]

T23

Vcc1_5_B[42]

T26

Vcc1_5_B[43]

T27

Vcc1_5_B[44]

T28

Vcc1_5_B[45]

U22

Vcc1_5_B[46]

U23

Vcc1_5_B[47]

V22

Vcc1_5_B[48]

V23

Vcc1_5_B[49]

W22

Vcc1_5_B[50]

W23

Vcc1_5_B[51]

Y22

Vcc1_5_B[52]

Y23

Vcc1_5_B[53]

B27

Vcc3_3[1]

AG28

VccDMIPLL

AB7

Vcc1_5_A[1]

AC6

Vcc1_5_A[2]

AC7

Vcc1_5_A[3]

AD6

Vcc1_5_A[4]

AE6

Vcc1_5_A[5]

AF5

Vcc1_5_A[6]

AF6

Vcc1_5_A[7]

AG5

Vcc1_5_A[8]

AH5

Vcc1_5_A[9]

AD2

VccSATAPLL

AH11

Vcc3_3[2]

AB10

Vcc1_5_A[10]

AB9

Vcc1_5_A[11]

AC10

Vcc1_5_A[12]

AD10

Vcc1_5_A[13]

AE10

Vcc1_5_A[14]

AF10

Vcc1_5_A[15]

AF9

Vcc1_5_A[16]

AG9

Vcc1_5_A[17]

AH9

Vcc1_5_A[18]

E3

VccSus3_3[19]

C1

VccUSBPLL

AA2

VccSus1_05/VccLAN1_05[1]

Y7

VccSus1_05/VccLAN1_05[2]

CORE

Vcc1_05[10] Vcc1_05[11] Vcc1_05[12] Vcc1_05[13] Vcc1_05[14] Vcc1_05[15] Vcc1_05[16] Vcc1_05[17] Vcc1_05[18] Vcc1_05[19] Vcc1_05[20]

VCC PAUX

VccSus3_3/VccLAN3_3[1] VccSus3_3/VccLAN3_3[2] VccSus3_3/VccLAN3_3[3] VccSus3_3/VccLAN3_3[4]

Vcc3_3/VccHDA

VccSus3_3/VccSusHDA

V_CPU_IO[1] V_CPU_IO[2]

VCCA3GP

V_CPU_IO[3]

IDE

PCI

VccSus3_3[1]

VccSus3_3[2] VccSus3_3[3] VccSus3_3[4] VccSus3_3[5] VccSus3_3[6]

VccSus3_3[7] VccSus3_3[8]

VccSus3_3[9] VccSus3_3[10] VccSus3_3[11] VccSus3_3[12]

USB

VccSus3_3[13] VccSus3_3[14] VccSus3_3[15] VccSus3_3[16] VccSus3_3[17] VccSus3_3[18]

Vcc1_5_A[19]

Vcc1_5_A[20]

Vcc1_5_A[21]

ATXARX

Vcc1_5_A[22]

Vcc1_5_A[23]

Vcc1_5_A[24]

Vcc1_5_A[25]

VccSus1_05[1]

VccSus1_05[2] VccSus1_05[3]

Vcc1_5_A[26]

Vcc1_5_A[27]

Vcc1_5_A[28]

Vcc1_5_A[29]

Vcc1_5_A[30]

USB CORE

SCD1U10V2KX-4GP

Do Not StuffDYC410

Do Not Stuff

DY

Do Not StuffDYC402

Do Not Stuff

1D5V_ICH7

C368

SCD1U10V2KX-4GP

C368

SCD1U10V2KX-4GP

12

V5REF_S 0

V5REF_S 5

C378

SCD1U10V2KX-4GP

C378

SCD1U10V2KX-4GP

12

4 4

3 3

2 2

1D5V_S0

R262 0R3-0 -U-GPR2 62 0R3-0-U-GP

V5REF_S 0

Layout Note: Place near ICH7

V5REF_S 5

1 2

*Within a given well, 5VREF needs to be up before the corresponding 3.3V rail

C373

3D3V_S0

21

D17

CH751H-4 0PT

12

C354

C354 SCD1U16 V2ZY-2GP

SCD1U16 V2ZY-2GP

21

D28

CH751H-4 0PT

12

C342

C342 SCD1U16 V2ZY-2GP

SCD1U16 V2ZY-2GP

1D5V_S0

IND-1D2UH-5 -GP

L26

C705

SC10U10V5ZY-1GP

C705

SC10U10V5ZY-1GP

12

1 2

0R3-0-U-GP

R570

SCD1U10 V2KX-4GP

SC10U6D3V5MX-3GP

12

1 2

1D5V_ICH_ S01D5V_S0

12

C693

C357

SCD1U10V2KX-4GP

C357

SCD1U10V2KX-4GP

5V_S0

1 2

5V_S53D3V_S5

1 2

3D3V_S0

C365

12

R275

R275 100R2J-2 -GP

100R2J-2 -GP

R539

R539 100R2J-2 -GP

100R2J-2 -GP

C704

SCD01U16V2KX-3GP

C704

SCD01U16V2KX-3GP

12

DY

C412

C412 Do Not Stuff

Do Not Stuff

SCD1U10V2KX-4GP

12

1D5V_GP LL_ICH_S0

C377

SCD1U10V2KX-4GP

C377

SCD1U10V2KX-4GP

1D5V_S0

C409

1D5V_S0

C403

C381

C376

SC10U10V5ZY-1GP

C376

SC10U10V5ZY-1GP

12

3D3V_S0

C335

SCD1U10V2KX-4GP

C335

SCD1U10V2KX-4GP

12

SCD1U10V2KX-4GP

C410

12

C402

12

DY

3D3V_ICH_ S5

1 1

A

C362

SCD1U10V2KX-4GP

C362

SCD1U10V2KX-4GP

12

1D5V_ICH_ S0

12

B

TP62Do Not StuffTP62Do Not Stuff

C400

C400 SCD01U1 6V2KX-3GP

SCD01U1 6V2KX-3GP

Vcc1_05[1] Vcc1_05[2] Vcc1_05[3] Vcc1_05[4] Vcc1_05[5] Vcc1_05[6] Vcc1_05[7] Vcc1_05[8] Vcc1_05[9]

Vcc3_3[3] Vcc3_3[4] Vcc3_3[5] Vcc3_3[6] Vcc3_3[7] Vcc3_3[8]

Vcc3_3[9] Vcc3_3[10] Vcc3_3[11]

Vcc3_3[12] Vcc3_3[13] Vcc3_3[14] Vcc3_3[15] Vcc3_3[16] Vcc3_3[17] Vcc3_3[18] Vcc3_3[19] Vcc3_3[20] Vcc3_3[21]

VccRTC

C

L11 L12 L14 L16 L17 L18 M11 M18 P11 P18 T11 T18 U11 U18 V11 V12 V14 V16 V17 V18

V5 V1 W2 W7

U6

R7

AE23 AE26 AH26

AA7 AB12 AB20 AC16 AD13 AD18 AG12 AG15 AG19

A5 B13 B16 B7 C10 D15 F9 G11 G12 G16

W5

P7

A24 C24 D19 D22 G19

K3 K4 K5 K6 L1 L2 L3 L6 L7 M6 M7 N7

AB17 AC17

T7 F17 G17

AB8 AC8

K7

C28 G20

A1 H6 H7 J6 J7

Do Not Stuff

1D5V_S0

3D3V_S0

3D3V_S5

12

SCD1U10 V2KX-4GP

TP56 Do Not StuffTP56 Do Not Stuff

TP53 Do Not StuffTP53 Do Not Stuff TP54 Do Not StuffTP54 Do Not Stuff

1D5V_S0

DY

12

C375

Do Not Stuff

12

C383

C383 SCD1U10 V2KX-4GP

SCD1U10 V2KX-4GP

3D3V_S0

12

DY

C350

12

C353

Do Not StuffDYC353

Do Not Stuff

DY

V3D3A_V CCPSUS

R531

12

C366

C366 SCD1U10 V2KX-4GP

SCD1U10 V2KX-4GP

C391

12

C349

C349 SCD1U10 V2KX-4GP

SCD1U10 V2KX-4GP

12

DY

C337

C337 SCD1U10 V2KX-4GP

SCD1U10 V2KX-4GP

12

1D05V_S 0

DY

12

BOM

Title

Size Document N umber Rev

Size Document N umber Rev A3

A3

Date: Sheet of

12

C385

Do Not Stuff

C358

SC10U6D3V5MX-3GP

C358

SC10U6D3V5MX-3GP

3D3V_S0

12

C390

SC10U10V5ZY-1GP

12

DY

C407

C407 Do Not Stuff

Do Not Stuff

3D3V_S0

C340

SCD1U10V2KX-4GP

C340

SCD1U10V2KX-4GP

ICH7-M (3 of 4)

AG3 2

12

C401

SCD1U10V2KX-4GP

Layout Note: PCI decoupling

Layout Note: IDE decoupling

C392

Do Not StuffDYC392

Do Not Stuff

12

DY

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

E

C399

SCD1U10V2KX-4GP

C352

SC10U10V5ZY-1GP

12

17 55Friday, April 21, 2006

12

C379

C379 SC10U6D 3V5MX-3GP

SC10U6D 3V5MX-3GP

C389

SC10U10V5ZY-1GP

C389

SC10U10V5ZY-1GP

12