Acer AS8942, AS8943 Schematics
5
4
3
2
1
GPU CORE PWR
ZY9B SYSTEM BLOCK DIAGRAM
D D
CLOCK GENERATOR
X'TAL
14.318MHz
SELGO: SLG8SP585V
DDR III
SO-DIMM 0
SO-DIMM 1
C C
Note:
HM55 does not support USB 6 & 7
HM55 does not support SATA 2 & 3
eSATA Conn. eSATA Buffer
USB 9
(Debug)
P34
P34
USB Port x 5
USB 1, 3, 11, 12
B B
(Debug)
P34
Bluetooth
USB 4
P36
CCD
USB 8
P29
FingerPrint
USB 2
P29
P14, 15
HDD (SATA) *2
ODD (SATA)
Audio CODEC
ALC669X
P3
P31
P31
BCLK: 133MHz
PEG_CLK: 100MHz
DPLL_REF_SSCLK: 120MHz
Dual Channel
800/ 1066 MHz
800 MT/s 1066 MT/s
SATA0
SATA5
SATA1
SATA4
USB 2.0
Azalia
P29
[Arrandale Only]
*
SATA
3.0 GT/s
USB
HDA
SPI ROM
4MB x1 (Basic ME+Braidwood)
intel
<MCH Processor>
Arrandale (SG)
Clarksfield (Discrete)
rPGA 989
(37.5mm X 37.5mm)
DDR SYSTEM MEMORY
P4.5.6.7
FDI
FDI
*
DMI
X4 DMI interface
DMI
intel
<PCH>
Ibex Peak_M
mBGA 676
(27mm X 25mm)
P8.9.10.11.12.13
SPI
EC (WPC775C)
P9
ONFi 2.0
LPC
PCI-E
X16
PCI-E
PCIE
2.5GT/s
Graphics Interfaces
RTC
P9
Fan Driver
(PWM Type)
CPU & PCH
XDP Conn.
AMD GPU
Broadway-LP / Madison-Pro
1GB
P17,18,19,20,21,22,23,24
INT_HDMI
INT_CRT
INT_LVDS
PCI-Express
2.5GT/s
X'TAL
32.768KHz
X'TAL
32.768KHz
P37
P36
P16
(64Mb x 32 IO x 8 pcs)
[Arrandale Only]
*
[Arrandale Only]
*
[Arrandale Only]
*
IEEE1394 &
Media Cardreader
JMB380-QGAZ0B
DISPLAY PORT
HDMI
CRT
LVDS
X'TAL
27.0MHz
PCIE-5
CLKOUT_PCIE2 CLKOUT_PEG_B
X'TAL
P27
24.576MHz
ISL6264
GPU IO PWR
ISL62827
DISCHARGER
+3V,+ 5V,+1.5V,+1.05V,+1.1V_VTT
+1.0V/+1.5V
G93334 + Linear
CPU VGFX_AXG
ISL62881
THERMAL
PROTECTION
LVDS_CRT_HDMI
Switch Grapgics
P25, 26
Broadcom
Giga-LAN
BCM57780
PCIE-4
CLKOUT_PEG_4
PCIE-1 & 2
CLKOUT_PEG_1&3
PCIE-6
CHARGER
P44
ISL88731
3/5V SYS PWR
P45
ISL6237
CPU CORE PWR
P47
ISL62882
CPU VTT
P47
UP61111AQDD
VTT 1.05V
P46
UP61111AQDD
DDR3 PWR
P48
TPS5116
DISPLAY PORT
HDMI
CRT
LVDS
X'TAL
P28
25MHz
ARD: 1.05V
CFD: 1.1V
P26
P26
P25
P25
USB0
New Card
USB 0
Mini Card
WLAN / TV
USB 10 & 13
USB10 & 13
P38
P39
P40
P41
P42
P43
P33
P32
Touch Screen
Braidwood
Dual Channel NAND Interface
MIC Jack
P30
P30
P16
Int. D-MIC
P125 P30
SPI ROM
Touch Pad
K/B COON.
P37
P36
P36
3
P30
P30
P34
Center Mono Amp
(G1442/ 2W)
Center Speaker
5
P29
P29
Rear Audio Amp
& Head phone
AN12947A
Speaker
S/PDIF
P30
Sub-Amplifier
(MAX9737)
P30
SUBWOOFER
P30
http://laptop-motherboard-schematic.blogspot.com/
P30
Line in
P30
4
USB 5
A A
Front Stereo Amp
(G1453L/ 2W+2W)
Front Speaker
MMB
CIR
IEEE1394a
connector
P35
P37
Card Reader
Connector
P26
P26
SSID: DISCRETE: 030A
SSID: SWITCH GFX: 0308
SVID: 1025
2
Transformer
RJ45 Connector
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
P28
P28
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
ZY9B Block Diagram
ZY9B Block Diagram
ZY9B Block Diagram
ZY9B
ZY9B
ZY9B
of
of
of
149Monday, September 21, 2009
149Monday, September 21, 2009
1
149Monday, September 21, 2009
1A
1A
1A
1
GPU PWR CTRL Option 1 (Default/ VDDR3 before VDDC)
+3.3V
2
VIN
VIN
3
+1.5V
4
+1.5V_SUS
5
+1.8V
6
7
8
+5V
dGPU_VRON
A A
VDDR3
MOS (AO3413)
+3_D (0.5A)
+3V_D
P22
VDDC
ISL6264
+VGPU_CORE (20A)
P44
PG_GPUIO_EN
VDDCI
ISL62872
P45
+VGPU_IO (4.5A)
PG_1V_EN
(DP PLL PWR)
+1V
G9334ADJ & MOS
+1V (3A)
P47
PG_1.5V_EN
VDDR1
MOS (AO4710)
P43
+1.5V_GPU (10A)
PG_1.5V_EN
VDDR4
MOS (AO6402)
P43
+1.8V_GPU (3A)
PG_1.5V_EN
BJT
P22
dGPU_PWROK
dGPU_PWR_EN#
MOS
AO3413
+5_GPU
P22
GPU PWR CTRL Option 2 (VDDR3 after VDDR1)
VIN
VDDCI
ISL62872
P45
+VGPU_IO (4.5A)
PG_1V_EN
dGPU_VRON
VIN
VDDC
ISL6264
P44
+VGPU_CORE (20A)
Power States
POWER PLANE
B B
C C
VIN
+VCCRTC
+3VPCU
+5VPCU
+15V
+3V_S5
+5V_S5
+5V
+1.5VSUS
+0.75V_DDR_VTT
+VGFX_AXG S0GFX_ONInternal GPU POWER
+1.8V
+1.5V
+1.1V_VTT S0
+1.05V
+VCC_CORE
LCDVCC
+5V_GPU
+GPU_CORE
+GPU_IO PG_GPUIO_EN+0.9V~+1.1V
VOLTAGE
+10V~+19V
+3V~+3.3V
+3.3V
+5V
+15V
+3.3V
+5V
+5V
+3.3V
+1.5V
+0.75V
variation
+1.8V
+1.5V
+1.05V or +1.1V
+1.05V
variation
+3.3V
+5V Discrete enableSWITCHABLE PWM IC POWER
DESCRIPTION
RTC POWER
EC POWER
CHARGE POWER
CHARGE PUMP POWER
LAN/BT/CIR POWER
USB POWER
HDD/ODD/Codec/TP/CRT/HDMI POWER
PCH/GPU/Peripheral component POWER+3V
CPU/SODIMM CORE POWER
SODIMM Termination POWER
CPU/PCH/Braidwood POWER
MINI CARD/NEW CARD POWER
PCH CORE POWER MAINON
CPU CORE POWER
LCD POWER
+1.5V
(DP PLL PWR)
+1V
G9334ADJ & MOS
+1V (3A)
CONTROL
SIGNAL
ALWAYSMAIN POWER
ALWAYS
ALWAYS
ALWAYS
S5_ON
S5_ON
MAINON
MAINON
SUSON
MAINON
MAINON
MAINON
MAINONCPU VTT POWER
VRON
LVDS_VDDEN
dGPU_PWR_EN#
PG_1.5V_EN+1.5V+1.5V_GPU
+1.5V_GPU+1.8V+1.8V_GPU
PG_1V_EN+1V+1V Discrete enableDP/PEG POWER
P47
PG_1.5V_EN
+1.5V_SUS
VDDR1
MOS (AO4710)
+1.5V_GPU (10A)
ACTIVE IN
ALWAYS
ALWAYS
ALWAYS
ALWAYS
ALWAYSALWAYS
S0-S5
S0-S5
S0
S0
S0-S3
S0
S0
S0
S0
S0
S0
Discrete enable+3V_DGPU CORE POWER+0.9V~+1.1V
Discrete enableGPU I/O POWER
Discrete enableVRAM CORE POWER
Discrete enableGPU_CRE/LVDS/PLL POWER
+1.5V_GPU
P43
Thermal Follow Chart
CPU
CORE PWR
+3.3V
VDDR3
MOS (AO3413)
P22
+3_D (0.5A)
+3V_DPG_GPUIO_EN
H_ORICHOT#
H/W Throttling
+1.8V
VDDR4
MOS (AO6402)
P43
+1.8V_GPU (3A)
NTC
Thermal
Protection
CPU
PCH
SM-Bus
EC
PG_1.5V_EN
BJT
P22
PM_THRMTRIP#
SML1ALERT#
CPUFAN#
dGPU_PWROK
SYS_SHDN#
WIRE-AND
dGPU_PWR_EN#
3V/5 V
SYS PWR
FANFAN Driver
+5V
MOS
AO3413
+5_GPU
P22
D D
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
PWR Status & GPU PWR CRL & THRM
PWR Status & GPU PWR CRL & THRM
1
2
3
4
5
6
http://laptop-motherboard-schematic.blogspot.com/
PWR Status & GPU PWR CRL & THRM
Date: Sheet
Date: Sheet
Date: Sheet
7
PROJECT :
ZY9B
ZY9B
ZY9B
249Wednesday, June 24, 2009
249Wednesday, June 24, 2009
249Wednesday, June 24, 2009
8
1A
1A
1A
of
of
of
5
+3V
180ohm/1.5A
L35 BKP1608HS181T_6_1.5AL35 BKP1608HS181T_6_1.5A
C459
C459
C453
D D
C C
4.7u/10V_8
4.7u/10V_8
C453
4.7u/10V_8
4.7u/10V_8
CLK_ICH_14M(10)
150mA(20mil)
C458
C458
.1u/16V_4
.1u/16V_4
C461
C461
.1u/16V_4
.1u/16V_4
.1u/16V_4
.1u/16V_4
C449 33p_4C449 33p_4
C450 33p_4C450 33p_4
C452
C452
C451
C451
.1u/16V_4
.1u/16V_4
R234 33_4R234 33_4
Y3
Y3
14.318MHZ
14.318MHZ
2 1
4
+3V_CLK
C466
C466
.1u/16V_4
.1u/16V_4
CLK_SDATA
CLK_SCLK
CPU_SEL
XTAL_IN
XTAL_OUT
U26
U26
1
VDD_DOT
5
VDD_27
17
VDD_SRC
24
VDD_CPU
29
VDD_REF
31
SDA
32
SCL
30
REF_0/CPU_SEL
28
XTAL_IN
27
XTAL_OUT
2
VSS_DOT
8
VSS_27
9
VSS_SATA
12
VSS_SRC
21
VSS_CPU
26
VSS_REF
33
GND
SLG8SP585V
SLG8SP585V
3
VDD_SRC_I/O
VDD_CPU_I/O
DOT_96
DOT_96#
27M
27M_SS
SRC_1/SATA
SRC_1#/SATA#
SRC_2
SRC_2#
*CPU_STOP#
CPU_1
CPU_1#
CPU_0
CPU_0#
CKPWRGD/PD#
15
18
3
4
6
7
10
11
13
14
16
20
19
23
22
25
CLK_BUF_DREFCLK (10)
CLK_BUF_DREFCLK# (10)
R757 0_4R757 0_4
R758 *0_4R758 *0_4
CLK_BUF_PCIE_3GPLL (10)
CLK_BUF_PCIE_3GPLL# (10)
CLK_BUF_DREFSSCLK (10)
CLK_BUF_DREFSSCLK# (10)
R242 10K_4R242 10K_4
TP7TP7
TP8TP8
CLK_BUF_BCLK (10)
CLK_BUF_BCLK# (10)
CK_PWRGD_R
+VDDIO_CLK
+3V
80mA(20mil)
C464
C464
.1u/16V_4
.1u/16V_4
27M_CLK (18)
For ATI suggest
2
C467
C467
.1u/16V_4
.1u/16V_4
L38 *BKP1608HS181T_6_1.5AL38 *BKP1608HS181T_6_1.5A
L36 BKP1608HS181T_6_1.5AL36 BKP1608HS181T_6_1.5A
C462
C462
10u/Y5V_8
10u/Y5V_8
C465
C465
C308 may be can save
10u/Y5V_8
10u/Y5V_8
Place each 0.1uF cap as close as
possible to each VDD IO pin. Place
the 10uF caps on the VDD_IO plane.
1
+3V
+1.05V
SMBusCPU_CLK select
+1.05V
B B
A A
CPU_SEL
01
CPU0/1=133MHz
(default)
5
R223
R223
*10K_4
*10K_4
CPU_SEL
R228
R228
10K_4
10K_4
C430
C430
*10p/50V/COG_4
*10p/50V/COG_4
CPU0/1=100MHz
ICH_SMBDATA(10,16,33)
ICH_SMBCLK(10,16,33)
4
+3V
CLK Enable
R235
2
3
Q18
Q18
2N7002K
2N7002K
+3V
2
3
Q19
Q19
2N7002K
2N7002K
R235
2.2K_4
2.2K_4
CLK_SDATA
1
R238
R238
2.2K_4
2.2K_4
1
CLK_SCLK
3
CLK_SDATA (14,15,32)
CLK_SCLK (14,15,32)
VR_PWRGD_CK505#(40)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
2
Date: Sheet
+3V
R237
R237
1K/F_4
1K/F_4
CK_PWRGD_R
3
Q17
Q17
2N7002K
2N7002K
2
1
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
Clock Generator
Clock Generator
Clock Generator
R236
R236
100K/F_4
100K/F_4
1
ZY9B
ZY9B
ZY9B
349Thursday, September 17, 2009
349Thursday, September 17, 2009
349Thursday, September 17, 2009
1A
1A
1A
of
of
of
http://laptop-motherboard-schematic.blogspot.com/
5
4
AUBURNDALE/CLARKSFIELD PROCESSOR (DMI,PEG,FDI)
3
2
1
AUBURNDALE/CLARKSFIELD PROCESSOR (CLK,MISC,JTAG)
U45A
U45A
FDI_FSYNC0_R
FDI_FSYNC1_R
FDI_INT_R
FDI_LSYNC0_R
FDI_LSYNC1_R
A24
DMI_RX#[0]
C23
DMI_RX#[1]
B22
DMI_RX#[2]
A21
DMI_RX#[3]
B24
DMI_RX[0]
D23
DMI_RX[1]
B23
DMI_RX[2]
A22
DMI_RX[3]
D24
DMI_TX#[0]
G24
DMI_TX#[1]
F23
DMI_TX#[2]
H23
DMI_TX#[3]
D25
DMI_TX[0]
F24
DMI_TX[1]
E23
DMI_TX[2]
G23
DMI_TX[3]
E22
FDI_TX#[0]
D21
FDI_TX#[1]
D19
FDI_TX#[2]
D18
FDI_TX#[3]
G21
FDI_TX#[4]
E19
FDI_TX#[5]
F21
FDI_TX#[6]
G18
FDI_TX#[7]
D22
FDI_TX[0]
C21
FDI_TX[1]
D20
FDI_TX[2]
C18
FDI_TX[3]
G22
FDI_TX[4]
E20
FDI_TX[5]
F20
FDI_TX[6]
G19
FDI_TX[7]
F17
FDI_FSYNC[0]
E17
FDI_FSYNC[1]
C17
FDI_INT
F18
FDI_LSYNC[0]
D17
FDI_LSYNC[1]
Clarksfield/Auburndale
Clarksfield/Auburndale
DMI Intel(R) FDI
DMI Intel(R) FDI
PCI EXPRESS -- GRAPHICS
PCI EXPRESS -- GRAPHICS
DMI_TXN0(8)
DMI_TXN1(8)
DMI_TXN2(8)
DMI_TXN3(8)
D D
DMI_TXP0(8)
DMI_TXP1(8)
DMI_TXP2(8)
DMI_TXP3(8)
DMI_RXN0(8)
DMI_RXN1(8)
DMI_RXN2(8)
DMI_RXN3(8)
DMI_RXP0(8)
DMI_RXP1(8)
DMI_RXP2(8)
DMI_RXP3(8)
FDI_TXN0(8)
FDI_TXN1(8)
FDI_TXN2(8)
FDI_TXN3(8)
FDI_TXN4(8)
FDI_TXN5(8)
FDI_TXN6(8)
FDI_TXN7(8)
FDI_TXP0(8)
FDI_TXP1(8)
FDI_TXP2(8)
FDI_TXP3(8)
FDI_TXP4(8)
C C
FDI_TXP5(8)
FDI_TXP6(8)
FDI_TXP7(8)
B B
PEG_ICOMPI
PEG_ICOMPO
PEG_RCOMPO
PEG_RBIAS
PEG_RX#[0]
PEG_RX#[1]
PEG_RX#[2]
PEG_RX#[3]
PEG_RX#[4]
PEG_RX#[5]
PEG_RX#[6]
PEG_RX#[7]
PEG_RX#[8]
PEG_RX#[9]
PEG_RX#[10]
PEG_RX#[11]
PEG_RX#[12]
PEG_RX#[13]
PEG_RX#[14]
PEG_RX#[15]
PEG_RX[0]
PEG_RX[1]
PEG_RX[2]
PEG_RX[3]
PEG_RX[4]
PEG_RX[5]
PEG_RX[6]
PEG_RX[7]
PEG_RX[8]
PEG_RX[9]
PEG_RX[10]
PEG_RX[11]
PEG_RX[12]
PEG_RX[13]
PEG_RX[14]
PEG_RX[15]
PEG_TX#[0]
PEG_TX#[1]
PEG_TX#[2]
PEG_TX#[3]
PEG_TX#[4]
PEG_TX#[5]
PEG_TX#[6]
PEG_TX#[7]
PEG_TX#[8]
PEG_TX#[9]
PEG_TX#[10]
PEG_TX#[11]
PEG_TX#[12]
PEG_TX#[13]
PEG_TX#[14]
PEG_TX#[15]
PEG_TX[0]
PEG_TX[1]
PEG_TX[2]
PEG_TX[3]
PEG_TX[4]
PEG_TX[5]
PEG_TX[6]
PEG_TX[7]
PEG_TX[8]
PEG_TX[9]
PEG_TX[10]
PEG_TX[11]
PEG_TX[12]
PEG_TX[13]
PEG_TX[14]
PEG_TX[15]
B26
A26
B27
A25
K35
J34
J33
G35
G32
F34
F31
D35
E33
C33
D32
B32
C31
B28
B30
A31
J35
H34
H33
F35
G33
E34
F32
D34
F33
B33
D31
A32
C30
A28
B29
A30
L33
M35
M33
M30
L31
K32
M29
J31
K29
H30
H29
F29
E28
D29
D27
C26
L34
M34
M32
L30
M31
K31
M28
H31
K28
G30
G29
F28
E27
D28
C27
C25
PEG_RXN0
PEG_RXN1
PEG_RXN2
PEG_RXN3
PEG_RXN4
PEG_RXN5
PEG_RXN6
PEG_RXN7
PEG_RXN8
PEG_RXN9
PEG_RXN10
PEG_RXN11
PEG_RXN12
PEG_RXN13
PEG_RXN14
PEG_RXN15
PEG_RXP0
PEG_RXP1
PEG_RXP2
PEG_RXP3
PEG_RXP4
PEG_RXP5
PEG_RXP6
PEG_RXP7
PEG_RXP8
PEG_RXP9
PEG_RXP10
PEG_RXP11
PEG_RXP12
PEG_RXP13
PEG_RXP14
PEG_RXP15
CPEG_TXN0
CPEG_TXN1
CPEG_TXN2
CPEG_TXN3
CPEG_TXN4
CPEG_TXN5
CPEG_TXN6
CPEG_TXN7
CPEG_TXN8
CPEG_TXN9
CPEG_TXN10
CPEG_TXN11
CPEG_TXN12
CPEG_TXN13
CPEG_TXN14
CPEG_TXN15
CPEG_TXP0
CPEG_TXP1
CPEG_TXP2
CPEG_TXP3
CPEG_TXP4
CPEG_TXP5
CPEG_TXP6
CPEG_TXP7
CPEG_TXP8
CPEG_TXP9
CPEG_TXP10
CPEG_TXP11
CPEG_TXP12
CPEG_TXP13
CPEG_TXP14
CPEG_TXP15
R492 49.9/F_4R492 49.9/F_4
R493 750/F_4R493 750/F_4
PEG_RXN[0..15] (17)
Use reverse type
(at GPU side)
PEG_RXP[0..15] (17)
C725 .1u/X7R_4C725 .1u/X7R_4
C721 .1u/X7R_4C721 .1u/X7R_4
C718 .1u/X7R_4C718 .1u/X7R_4
C711 .1u/X7R_4C711 .1u/X7R_4
C709 .1u/X7R_4C709 .1u/X7R_4
C706 .1u/X7R_4C706 .1u/X7R_4
C704 .1u/X7R_4C704 .1u/X7R_4
C700 .1u/X7R_4C700 .1u/X7R_4
C698 .1u/X7R_4C698 .1u/X7R_4
C696 .1u/X7R_4C696 .1u/X7R_4
C694 .1u/X7R_4C694 .1u/X7R_4
C683 .1u/X7R_4C683 .1u/X7R_4
C681 .1u/X7R_4C681 .1u/X7R_4
C679 .1u/X7R_4C679 .1u/X7R_4
C677 .1u/X7R_4C677 .1u/X7R_4
C674 .1u/X7R_4C674 .1u/X7R_4
C723 .1u/X7R_4C723 .1u/X7R_4
C720 .1u/X7R_4C720 .1u/X7R_4
C712 .1u/X7R_4C712 .1u/X7R_4
C710 .1u/X7R_4C710 .1u/X7R_4
C708 .1u/X7R_4C708 .1u/X7R_4
C705 .1u/X7R_4C705 .1u/X7R_4
C701 .1u/X7R_4C701 .1u/X7R_4
C699 .1u/X7R_4C699 .1u/X7R_4
C697 .1u/X7R_4C697 .1u/X7R_4
C695 .1u/X7R_4C695 .1u/X7R_4
C684 .1u/X7R_4C684 .1u/X7R_4
C682 .1u/X7R_4C682 .1u/X7R_4
C680 .1u/X7R_4C680 .1u/X7R_4
C678 .1u/X7R_4C678 .1u/X7R_4
C675 .1u/X7R_4C675 .1u/X7R_4
C673 .1u/X7R_4C673 .1u/X7R_4 R489 EV@1K_4R489 EV@1K_4
PEG_TXN0
PEG_TXN1
PEG_TXN2
PEG_TXN3
PEG_TXN4
PEG_TXN5
PEG_TXN6
PEG_TXN7
PEG_TXN8
PEG_TXN9
PEG_TXN10
PEG_TXN11
PEG_TXN12
PEG_TXN13
PEG_TXN14
PEG_TXN15
PEG_TXP0
PEG_TXP1
PEG_TXP2
PEG_TXP3
PEG_TXP4
PEG_TXP5
PEG_TXP6
PEG_TXP7
PEG_TXP8
PEG_TXP9
PEG_TXP10
PEG_TXP11
PEG_TXP12
PEG_TXP13
PEG_TXP14
PEG_TXP15
PEG_TXN[0..15] (17)
PEG_TXP[0..15] (17)
FDI_FSYNC0(8)
FDI_FSYNC1(8)
FDI_LSYNC0(8)
FDI_LSYNC1(8)
R482 *A@0_4R482 *A@0_4
R481 *A@0_4R481 *A@0_4
FDI_INT(8)
R483 *A@0_4R483 *A@0_4
R484 *A@0_4R484 *A@0_4
R480 *A@0_4R480 *A@0_4
R488 EV@1K_4R488 EV@1K_4
R486 EV@1K_4R486 EV@1K_4
R485 EV@1K_4R485 EV@1K_4
R487 EV@1K_4R487 EV@1K_4
Processor Compensation Signals
R549 20/F_4R549 20/F_4
R559 20/F_4R559 20/F_4
R122 49.9/F_4R122 49.9/F_4
R548 49.9/F_4R548 49.9/F_4
R152 *1K_4R152 *1K_4
H_PECI(11)
H_PROCHOT#(40)
PM_THRMTRIP#(11)
H_CPURST#(16)
PM_SYNC(8)
H_PWRGOOD(11,16)
PM_DRAM_PWRGD(8,16)
H_PWRGD_XDP(16)
PLTRST#(10,11,27,28,32,33,37)
R195 1.5K/F_4R195 1.5K/F_4
SI 2/5 Modified
FDI_FSYNC0_R
FDI_FSYNC1_R
FDI_LSYNC0_R
FDI_LSYNC1_R
U45B
R193
R193
750/F_4
750/F_4
U45B
AT23
COMP3
AT24
COMP2
G16
COMP1
AT26
COMP0
AH24
SKTOCC#
AK14
CATERR#
AT15
PECI
AN26
PROCHOT#
AK15
THERMTRIP#
AP26
RESET_OBS#
AL15
PM_SYNC
AN14
VCCPWRGOOD_1
AN27
VCCPWRGOOD_0
AK13
SM_DRAMPWROK
AM15
VTTPWRGOOD
AM26
TAPPWRGOOD
AL14
RSTIN#
Clarksfield/Auburndale
Clarksfield/Auburndale
MISC THERMAL
MISC THERMAL
CLOCKS
CLOCKS
DDR3
MISC
DDR3
MISC
PWR MANAGEMENT
PWR MANAGEMENT
JTAG & BPM
JTAG & BPM
BCLK
BCLK#
BCLK_ITP
BCLK_ITP#
PEG_CLK
PEG_CLK#
DPLL_REF_SSCLK
DPLL_REF_SSCLK#
SM_DRAMRST#
SM_RCOMP[0]
SM_RCOMP[1]
SM_RCOMP[2]
PM_EXT_TS#[0]
PM_EXT_TS#[1]
PRDY#
PREQ#
TRST#
TDI_M
TDO_M
DBR#
BPM#[0]
BPM#[1]
BPM#[2]
BPM#[3]
BPM#[4]
BPM#[5]
BPM#[6]
BPM#[7]
TCK
TMS
TDI
TDO
A16
B16
AR30
AT30
E16
D16
A18
A17
F6
AL1
AM1
AN1
AN15
AP15
AT28
AP27
AN28
AP28
AT27
AT29
AR27
AR29
AP29
AN25
AJ22
AK22
AK24
AJ24
AJ25
AH22
AK23
AH23
SM_RCOMP_0
SM_RCOMP_1
SM_RCOMP_2
XDP_PREQ#
XDP_TCLK
XDP_TRST#
XDP_TDI_R
XDP_TDO_R
XDP_TDI_M
XDP_TDO_M
XDP_OBS0_R
XDP_OBS1_R
XDP_OBS2_R
XDP_OBS3_R
XDP_OBS4_R
XDP_OBS5_R
XDP_OBS6_R
XDP_OBS7_R
H_COMP3
H_COMP2
H_COMP1
H_COMP0
TP_SKT0CC#
H_CATERR#
H_PROCHOT#
H_CPURST# XDP_TMS
H_VTTPWRGD
CPU_PLTRST#
FDI_INT_R
CLK_CPU_BCLK (11)
CLK_CPU_BCLK# (11)
BCLK_ITP_P (16)
BCLK_ITP_N (16)
CLK_PCIE_3GPLL (10)
CLK_PCIE_3GPLL# (10)
R494 *A@0_4R494 *A@0_4
R490 *A@0_4R490 *A@0_4
R495 EV@0_4R495 EV@0_4
R491 EV@0_4R491 EV@0_4
CPU_DDR3_DRAMRST# (16)
R556 100/F_4R556 100/F_4
R555 24.9/F_4R555 24.9/F_4
R554 130/F_4R554 130/F_4
R551 10K_4R551 10K_4
R552 10K_4R552 10K_4
XDP_PRDY# (16)
XDP_PREQ# (16)
XDP_TCLK (16)
XDP_TMS (16)
XDP_TRST# (16)
R191 *0_4R191 *0_4
R185 *0_4R185 *0_4
R184 *0_4R184 *0_4
R182 *0_4R182 *0_4
R181 *0_4R181 *0_4
R178 *0_4R178 *0_4
R177 *0_4R177 *0_4
R174 *0_4R174 *0_4
XDP_OBS0
XDP_OBS1
XDP_OBS2
XDP_OBS3
XDP_OBS4
XDP_OBS5
XDP_OBS6
XDP_OBS7
PM_EXTTS#0 (14)
+1.1V_VTT
PM_EXTTS#1 (15)
DPLL_REF_SSCLK (10)
DPLL_REF_SSCLK# (10)
Layout Note: Place
these resistors
near Processor
XDP_DBRST# (8,16)
XDP_OBS[0:7] (16)
Thermaltrip protect
+1.1V_VTT
3
Q23
Q23
PM_THRMTRIP#
2
1 3
FDV301N
FDV301N
1
R245
R245
1K_4
1K_4
2
Q22
Q22
MMBT3904
MMBT3904
SYS_SHDN# (39,48)
DELAY_VR_PWRGOOD(8,40)
A A
PM_THRMTRIP#(11)
VTT PWR_Good
MPWROK(37)
+3V
C418
C418
.1u/16V_4
.1u/16V_4
R202
3 5
4
U22
U22
TC7SH08FU
TC7SH08FU
R202
2K/F_4
2K/F_4
H_VTTPWRGD
R203
R203
1K_4
1K_4
2
1
pull-up 56ohm close to PCH
5
4
3
Processor pull-up
4/9 REV:B MODIFY BY DG1.52
+1.5V_CPUVDDQ
R187
R187
1.1K/F_4
1.1K/F_4
R188
R188
3K/F_4
3K/F_4
XDP_TDO
H_CATERR#
H_PROCHOT#
H_CPURST#
XDP_TMS
XDP_TDI_R
XDP_PREQ#
XDP_TCLK
XDP_TRST#
PM_DRAM_PWRGD
R160 51/F_4R160 51/F_4
R153 49.9/F_4R153 49.9/F_4
R558 68_4R558 68_4
R143 *68_4R143 *68_4
R146 *51_4R146 *51_4
R151 *51_4R151 *51_4
R192 *51_4R192 *51_4
R171 *51_4R171 *51_4
R145 51/F_4R145 51/F_4
Use a voltage divider with VDDQ
(1.5V) rail (ON in S3) and
resistor combination of 4.75K (to
VDDQ)/12K(to GND) to generate the
required voltage.
Note: CRB uses a 3.3V (always ON)
rail with 2K and 1K combination.
2
+1.1V_VTT
JTAG MAPPING
XDP_TDI_R
XDP_TDO_M
XDP_TDI_M
XDP_TDO_R
Scan Chain
(Default)
CPU Only
GMCH Only
R150 *0_4R150 *0_4
R161 *0_4R161 *0_4
R156
R156
*0_4
*0_4
R155 *0_4R155 *0_4
R166 *0_4R166 *0_4
STUFF -> R469, R491, R507
NO STUFF -> R489, R490
STUFF -> R490, R491
NO STUFF -> R469, R489, R507
STUFF -> R489, R507
NO STUFF -> R491, R490, R469
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
AUBURNDA 1/4
AUBURNDA 1/4
AUBURNDA 1/4
Date: Sheet
Date: Sheet
Date: Sheet
PROJECT :
1
XDP_TDI (16)
XDP_TDO (16)
ZY9B
ZY9B
ZY9B
449Thursday, September 17, 2009
449Thursday, September 17, 2009
449Thursday, September 17, 2009
1A
1A
1A
of
of
of
http://laptop-motherboard-schematic.blogspot.com/
5
AUBURNDALE/CLARKSFIELD PROCESSOR (DDR3)
U45C
U45C
M_A_DQ[63:0](14)
D D
C C
B B
M_A_BS#0(14)
M_A_BS#1(14)
M_A_BS#2(14)
M_A_CAS#(14)
M_A_RAS#(14)
M_A_WE#(14)
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
A10
C10
B10
D10
E10
H10
G10
AH5
AF5
AK6
AK7
AF6
AG5
AJ10
AL10
AK12
AK8
AL7
AK11
AL8
AN8
AM10
AR11
AL11
AM9
AN9
AT11
AP12
AM12
AN12
AM13
AT14
AT12
AL13
AR14
AP14
AC3
AB2
AE1
AB3
AE9
F10
J10
AJ7
AJ6
AJ9
C7
A7
A8
D8
E6
F7
E9
B7
E7
C6
G8
K7
J8
G7
J7
L7
M6
M8
L9
L6
K8
N8
P9
U7
SA_DQ[0]
SA_DQ[1]
SA_DQ[2]
SA_DQ[3]
SA_DQ[4]
SA_DQ[5]
SA_DQ[6]
SA_DQ[7]
SA_DQ[8]
SA_DQ[9]
SA_DQ[10]
SA_DQ[11]
SA_DQ[12]
SA_DQ[13]
SA_DQ[14]
SA_DQ[15]
SA_DQ[16]
SA_DQ[17]
SA_DQ[18]
SA_DQ[19]
SA_DQ[20]
SA_DQ[21]
SA_DQ[22]
SA_DQ[23]
SA_DQ[24]
SA_DQ[25]
SA_DQ[26]
SA_DQ[27]
SA_DQ[28]
SA_DQ[29]
SA_DQ[30]
SA_DQ[31]
SA_DQ[32]
SA_DQ[33]
SA_DQ[34]
SA_DQ[35]
SA_DQ[36]
SA_DQ[37]
SA_DQ[38]
SA_DQ[39]
SA_DQ[40]
SA_DQ[41]
SA_DQ[42]
SA_DQ[43]
SA_DQ[44]
SA_DQ[45]
SA_DQ[46]
SA_DQ[47]
SA_DQ[48]
SA_DQ[49]
SA_DQ[50]
SA_DQ[51]
SA_DQ[52]
SA_DQ[53]
SA_DQ[54]
SA_DQ[55]
SA_DQ[56]
SA_DQ[57]
SA_DQ[58]
SA_DQ[59]
SA_DQ[60]
SA_DQ[61]
SA_DQ[62]
SA_DQ[63]
SA_BS[0]
SA_BS[1]
SA_BS[2]
SA_CAS#
SA_RAS#
SA_WE#
DDR SYSTEM MEMORY A
DDR SYSTEM MEMORY A
4
SA_CK[0]
SA_CK#[0]
SA_CKE[0]
SA_CK[1]
SA_CK#[1]
SA_CKE[1]
SA_CS#[0]
SA_CS#[1]
SA_ODT[0]
SA_ODT[1]
SA_DM[0]
SA_DM[1]
SA_DM[2]
SA_DM[3]
SA_DM[4]
SA_DM[5]
SA_DM[6]
SA_DM[7]
SA_DQS#[0]
SA_DQS#[1]
SA_DQS#[2]
SA_DQS#[3]
SA_DQS#[4]
SA_DQS#[5]
SA_DQS#[6]
SA_DQS#[7]
SA_DQS[0]
SA_DQS[1]
SA_DQS[2]
SA_DQS[3]
SA_DQS[4]
SA_DQS[5]
SA_DQS[6]
SA_DQS[7]
SA_MA[0]
SA_MA[1]
SA_MA[2]
SA_MA[3]
SA_MA[4]
SA_MA[5]
SA_MA[6]
SA_MA[7]
SA_MA[8]
SA_MA[9]
SA_MA[10]
SA_MA[11]
SA_MA[12]
SA_MA[13]
SA_MA[14]
SA_MA[15]
AA6
AA7
P7
Y6
Y5
P6
AE2
AE8
AD8
AF9
B9
D7
H7
M7
AG6
AM7
AN10
AN13
C9
F8
J9
N9
AH7
AK9
AP11
AT13
C8
F9
H9
M9
AH8
AK10
AN11
AR13
Y3
W1
AA8
AA3
V1
AA9
V8
T1
Y9
U6
AD4
T2
U3
AG8
T3
V9
M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7
M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
M_A_CLK0 (14)
M_A_CLK0# (14)
M_A_CKE0 (14)
M_A_CLK1 (14)
M_A_CLK1# (14)
M_A_CKE1 (14)
M_A_CS#0 (14)
M_A_CS#1 (14)
M_A_ODT0 (14)
M_A_ODT1 (14)
M_A_DM[7:0] (14)
M_A_DQS#[7:0] (14)
M_A_DQS[7:0] (14)
M_A_A[15:0] (14)
3
M_B_DQ[63:0](15)
M_B_BS#0(15)
M_B_BS#1(15)
M_B_BS#2(15)
M_B_CAS#(15)
M_B_RAS#(15)
M_B_WE#(15)
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63
AR10
AT10
AF3
AG1
AK1
AG4
AG3
AH4
AK3
AK4
AM6
AN2
AK5
AK2
AM4
AM3
AP3
AN5
AT4
AN6
AN4
AN3
AT5
AT6
AN7
AP6
AP8
AT9
AT7
AP9
AC5
AC6
AJ3
AJ4
AB1
W5
B5
A5
C3
B3
E4
A6
A4
C4
D1
D2
F2
F1
C2
F5
F3
G4
H6
G2
J6
J3
G1
G5
J2
J1
J5
K2
L3
M1
K5
K4
M4
N5
R7
Y7
U45D
U45D
SB_DQ[0]
SB_DQ[1]
SB_DQ[2]
SB_DQ[3]
SB_DQ[4]
SB_DQ[5]
SB_DQ[6]
SB_DQ[7]
SB_DQ[8]
SB_DQ[9]
SB_DQ[10]
SB_DQ[11]
SB_DQ[12]
SB_DQ[13]
SB_DQ[14]
SB_DQ[15]
SB_DQ[16]
SB_DQ[17]
SB_DQ[18]
SB_DQ[19]
SB_DQ[20]
SB_DQ[21]
SB_DQ[22]
SB_DQ[23]
SB_DQ[24]
SB_DQ[25]
SB_DQ[26]
SB_DQ[27]
SB_DQ[28]
SB_DQ[29]
SB_DQ[30]
SB_DQ[31]
SB_DQ[32]
SB_DQ[33]
SB_DQ[34]
SB_DQ[35]
SB_DQ[36]
SB_DQ[37]
SB_DQ[38]
SB_DQ[39]
SB_DQ[40]
SB_DQ[41]
SB_DQ[42]
SB_DQ[43]
SB_DQ[44]
SB_DQ[45]
SB_DQ[46]
SB_DQ[47]
SB_DQ[48]
SB_DQ[49]
SB_DQ[50]
SB_DQ[51]
SB_DQ[52]
SB_DQ[53]
SB_DQ[54]
SB_DQ[55]
SB_DQ[56]
SB_DQ[57]
SB_DQ[58]
SB_DQ[59]
SB_DQ[60]
SB_DQ[61]
SB_DQ[62]
SB_DQ[63]
SB_BS[0]
SB_BS[1]
SB_BS[2]
SB_CAS#
SB_RAS#
SB_WE#
2
W8
SB_CK[0]
W9
SB_CK#[0]
M3
SB_CKE[0]
V7
SB_CK[1]
V6
SB_CK#[1]
M2
SB_CKE[1]
AB8
SB_CS#[0]
AD6
SB_CS#[1]
AC7
SB_ODT[0]
AD1
SB_ODT[1]
M_B_DM0
D4
SB_DM[0]
SB_DM[1]
SB_DM[2]
SB_DM[3]
SB_DM[4]
SB_DM[5]
SB_DM[6]
SB_DM[7]
SB_DQS#[0]
SB_DQS#[1]
SB_DQS#[2]
SB_DQS#[3]
SB_DQS#[4]
SB_DQS#[5]
SB_DQS#[6]
SB_DQS#[7]
SB_DQS[0]
SB_DQS[1]
SB_DQS[2]
SB_DQS[3]
SB_DQS[4]
SB_DQS[5]
SB_DQS[6]
SB_DQS[7]
DDR SYSTEM MEMORY - B
DDR SYSTEM MEMORY - B
SB_MA[0]
SB_MA[1]
SB_MA[2]
SB_MA[3]
SB_MA[4]
SB_MA[5]
SB_MA[6]
SB_MA[7]
SB_MA[8]
SB_MA[9]
SB_MA[10]
SB_MA[11]
SB_MA[12]
SB_MA[13]
SB_MA[14]
SB_MA[15]
E1
H3
K1
AH1
AL2
AR4
AT8
D5
F4
J4
L4
AH2
AL4
AR5
AR8
C5
E3
H4
M5
AG2
AL5
AP5
AR7
U5
V2
T5
V3
R1
T8
R2
R6
R4
R5
AB5
P3
R3
AF7
P5
N1
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7
M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
1
M_B_CLK0 (15)
M_B_CLK0# (15)
M_B_CKE0 (15)
M_B_CLK1 (15)
M_B_CLK1# (15)
M_B_CKE1 (15)
M_B_CS#0 (15)
M_B_CS#1 (15)
M_B_ODT0 (15)
M_B_ODT1 (15)
M_B_DQS#[7:0] (15)
M_B_DQS[7:0] (15)
M_B_DM[7:0] (15)
M_B_A[15:0] (15)
Clarksfield/Auburndale
Clarksfield/Auburndale
Clarksfield/Auburndale
Channel A DQ[15,32,48,54], DM[5]
Requires minimum 12mils spacing
with all other signals, including data signals.
A A
5
http://laptop-motherboard-schematic.blogspot.com/
4
3
Channel B DQ[16,18,36,42,56,57,60,61,62]
Requires minimum 12mils spacing
with all other signals, including data signals.
Clarksfield/Auburndale
2
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
AUBURNDA 2/4
AUBURNDA 2/4
AUBURNDA 2/4
Date: Sheet
Date: Sheet
Date: Sheet
PROJECT :
ZY9B
ZY9B
ZY9B
of
of
of
549Thursday, September 17, 2009
549Thursday, September 17, 2009
549Thursday, September 17, 2009
1
1A
1A
1A
5
U45F
CPU Core Power
ARD:48A
CFD:52A
C747
C765
C765
22u_8
22u_8
C381
C381
22u_8
22u_8
C361
C361
10u/6.3V_6
10u/6.3V_6
C739
C739
10u/6.3V_6
10u/6.3V_6
C747
+
+
330u/2V_7343
330u/2V_7343
C759
C759
22u_8
22u_8
C764
C764
22u_8
22u_8
C336
C336
10u/6.3V_6
10u/6.3V_6
C752
C752
10u/6.3V_6
10u/6.3V_6
C651
C651
+
C335
C335
C771
C771
C385
C385
10u/6.3V_6
10u/6.3V_6
C356
C356
10u/6.3V_6
10u/6.3V_6
+
*330u/2V_7343
*330u/2V_7343
C730
C730
22u_8
22u_8
C727
C727
22u_8
22u_8
D D
10u/6.3V_6
10u/6.3V_6
C C
10u/6.3V_6
10u/6.3V_6
B B
A A
C726
C726
22u_8
22u_8
C382
C382
22u_8
22u_8
C337
C337
10u/6.3V_6
10u/6.3V_6
C745
C745
10u/6.3V_6
10u/6.3V_6
C341
C341
+
+
*330u/2V_7343
*330u/2V_7343
C322
C322
22u_8
22u_8
C371
C371
22u_8
22u_8
C339
C339
10u/6.3V_6
10u/6.3V_6
C384
C384
10u/6.3V_6
10u/6.3V_6
C383
C383
22u_8
22u_8
C380
C380
22u_8
22u_8
+
+
C729
C729
22u_8
22u_8
C767
C767
22u_8
22u_8
C333
C333
10u/6.3V_6
10u/6.3V_6
C734
C734
10u/6.3V_6
10u/6.3V_6
C357
C357
330u/2V_7343
330u/2V_7343
C728
C728
22u_8
22u_8
C766
C766
22u_8
22u_8
C338
C338
10u/6.3V_6
10u/6.3V_6
C334
C334
10u/6.3V_6
10u/6.3V_6
+VCC_CORE
U45F
AG35
VCC1
AG34
VCC2
AG33
VCC3
AG32
VCC4
AG31
VCC5
AG30
VCC6
AG29
VCC7
AG28
VCC8
AG27
VCC9
AG26
VCC10
AF35
VCC11
AF34
VCC12
AF33
VCC13
AF32
VCC14
AF31
VCC15
AF30
VCC16
AF29
VCC17
AF28
VCC18
AF27
VCC19
AF26
VCC20
AD35
VCC21
AD34
VCC22
AD33
VCC23
AD32
VCC24
AD31
VCC25
AD30
VCC26
AD29
VCC27
AD28
VCC28
AD27
VCC29
AD26
VCC30
AC35
VCC31
AC34
VCC32
AC33
VCC33
AC32
VCC34
AC31
VCC35
AC30
VCC36
AC29
VCC37
AC28
VCC38
AC27
VCC39
AC26
VCC40
AA35
VCC41
AA34
VCC42
AA33
VCC43
AA32
VCC44
AA31
VCC45
AA30
VCC46
AA29
VCC47
AA28
VCC48
AA27
VCC49
AA26
VCC50
Y35
VCC51
Y34
VCC52
Y33
VCC53
Y32
VCC54
Y31
VCC55
Y30
VCC56
Y29
VCC57
Y28
VCC58
Y27
VCC59
Y26
VCC60
V35
VCC61
V34
VCC62
V33
VCC63
V32
VCC64
V31
VCC65
V30
VCC66
V29
VCC67
V28
VCC68
V27
VCC69
V26
VCC70
U35
VCC71
U34
VCC72
U33
VCC73
U32
VCC74
U31
VCC75
U30
VCC76
U29
VCC77
U28
VCC78
U27
VCC79
U26
VCC80
R35
VCC81
R34
VCC82
R33
VCC83
R32
VCC84
R31
VCC85
R30
VCC86
R29
VCC87
R28
VCC88
R27
VCC89
R26
VCC90
P35
VCC91
P34
VCC92
P33
VCC93
P32
VCC94
P31
VCC95
P30
VCC96
P29
VCC97
P28
VCC98
P27
VCC99
P26
VCC100
Clarksfield/Auburndale
Clarksfield/Auburndale
AUBURNDALE/CLARKSFIELD PROCESSOR (POWER)
5
4
1.1V RAIL POWER
1.1V RAIL POWER
CPU CORE SUPPLY
CPU CORE SUPPLY
POWER
POWER
PROC_DPRSLPVR
CPU VIDS
CPU VIDS
VTT_SELECT
VSS_SENSE_VTT
SENSE LINES
SENSE LINES
4
VTT0_1
VTT0_2
VTT0_3
VTT0_4
VTT0_5
VTT0_6
VTT0_7
VTT0_8
VTT0_9
VTT0_10
VTT0_11
VTT0_12
VTT0_13
VTT0_14
VTT0_15
VTT0_16
VTT0_17
VTT0_18
VTT0_19
VTT0_20
VTT0_21
VTT0_22
VTT0_23
VTT0_24
VTT0_25
VTT0_26
VTT0_27
VTT0_28
VTT0_29
VTT0_30
VTT0_31
VTT0_32
VTT0_33
VTT0_34
VTT0_35
VTT0_36
VTT0_37
VTT0_38
VTT0_39
VTT0_40
VTT0_41
VTT0_42
VTT0_43
VTT0_44
VID[0]
VID[1]
VID[2]
VID[3]
VID[4]
VID[5]
VID[6]
ISENSE
VCC_SENSE
VSS_SENSE
VTT_SENSE
AH14
AH12
AH11
AH10
J14
J13
H14
H12
G14
G13
G12
G11
F14
F13
F12
F11
E14
E12
D14
D13
D12
D11
C14
C13
C12
C11
B14
B12
A14
A13
A12
A11
AF10
AE10
AC10
AB10
Y10
W10
U10
T10
J12
J11
+VTT_43
J16
+VTT_44
J15
H_PSI#
AN33
PSI#
H_VID0
AK35
H_VID1
AK33
H_VID2
AK34
H_VID3
AL35
H_VID4
AL33
H_VID5
AM33
H_VID6
AM35
H_DPRSLPVR
AM34
H_VTTVID1
G15
H_VTTVID1=Low, 1.1V
H_VTTVID1=High, 1.05V
AN35
AJ34
AJ35
VTT_SENSE
B15
VSS_SENSE_VTT
A15
C360
C360
22u_8
22u_8
C717
C717
10u_8
10u_8
C760
C760
10u_8
10u_8
C372
C372
22u_8
22u_8
R128 *SHORT_4R128 *SHORT_4
R123 *SHORT_4R123 *SHORT_4
C305
C305
1u/10V_4
1u/10V_4
R520 100_4R520 100_4
R522 100_4R522 100_4
VTT Rail Values are
Auburndal VTT=1.05V
Clarksfield VTT=1.1V
18A
+1.1V_VTT
+
+
C722
C722
C349
C349
22u_8
22u_8
C751
C751
10u_8
10u_8
C716
C716
10u_8
10u_8
C388
C388
22u_8
22u_8
22u_8
22u_8
C743
C743
10u_8
10u_8
C672
C672
10u_8
10u_8
+1.1V_VTT
C671
C671
*330u/2V_7343
*330u/2V_7343
C769
C769
10u_8
10u_8
(15mils)
H_PSI# (40)
H_VID0 (40)
H_VID1 (40)
H_VID2 (40)
H_VID3 (40)
H_VID4 (40)
H_VID5 (40)
H_VID6 (40)
H_DPRSLPVR (40)
TP4TP4
I_MON (40)
+VCC_CORE
VCCSENSE (40)
VSSSENSE (40)
TP43TP43
TP44TP44
3
2
1
AUBURNDALE/CLARKSFIELD PROCESSOR (GRAPHICS POWER)
U45G
R529
R529
1K_4
1K_4
R528
R528
*1K_4
*1K_4
U45G
AT21
VAXG1
AT19
VAXG2
AT18
VAXG3
AT16
VAXG4
AR21
VAXG5
AR19
VAXG6
AR18
VAXG7
AR16
VAXG8
AP21
VAXG9
AP19
VAXG10
AP18
VAXG11
AP16
VAXG12
AN21
VAXG13
AN19
VAXG14
AN18
VAXG15
AN16
VAXG16
AM21
VAXG17
AM19
VAXG18
AM18
VAXG19
AM16
VAXG20
AL21
VAXG21
AL19
VAXG22
AL18
VAXG23
AL16
VAXG24
AK21
VAXG25
AK19
VAXG26
AK18
VAXG27
AK16
VAXG28
AJ21
VAXG29
AJ19
VAXG30
AJ18
VAXG31
AJ16
VAXG32
AH21
VAXG33
AH19
VAXG34
AH18
VAXG35
AH16
VAXG36
J24
VTT1_45
J23
VTT1_46
H25
VTT1_47
K26
VTT1_48
J27
VTT1_49
J26
VTT1_50
J25
VTT1_51
H27
VTT1_52
G28
VTT1_53
G27
VTT1_54
G26
VTT1_55
F26
VTT1_56
E26
VTT1_57
E25
VTT1_58
Clarksfield/Auburndale
Clarksfield/Auburndale
+1.1V_VTT
R531
R531
R533
R533
*1K_4
*1K_4
*1K_4
*1K_4
R530
R530
R532
R532
1K_4
1K_4
1K_4
1K_4
HFM_VID : Max 1.4V
LFM_VID : Min 0.65V
2
R537
R537
1K_4
1K_4
R536
R536
*1K_4
*1K_4
GRAPHICS
GRAPHICS
FDI PEG & DMI
FDI PEG & DMI
POWER
POWER
R539
R539
R535
R535
1K_4
1K_4
*1K_4
*1K_4
R534
R534
R538
R538
1K_4
1K_4
*1K_4
*1K_4
VAXG_SENSE
VSSAXG_SENSE
SENSE
LINES
SENSE
LINES
GFX_VID[0]
GFX_VID[1]
GFX_VID[2]
GFX_VID[3]
GFX_VID[4]
GFX_VID[5]
GFX_VID[6]
GFX_VR_EN
GFX_DPRSLPVR
GFX_IMON
GRAPHICS VIDs
GRAPHICS VIDs
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15
VDDQ16
VDDQ17
VDDQ18
DDR3 - 1.5V RAILS
DDR3 - 1.5V RAILS
VTT0_59
VTT0_60
VTT0_61
VTT0_62
VTT1_63
VTT1_64
VTT1_65
1.1V1.8V
1.1V1.8V
VTT1_66
VTT1_67
VTT1_68
VCCPLL1
VCCPLL2
VCCPLL3
R541
R541
*1K_4
*1K_4
R540
R540
1K_4
1K_4
AR22
AT22
AM22
AP22
AN22
AP23
AM23
AP24
AN24
AR25
AT25
AM24
AJ1
AF1
AE7
AE4
AC1
AB7
AB4
Y1
W7
W4
U1
T7
T4
P1
N7
N4
L1
H1
P10
N10
L10
K10
J22
J20
J18
H21
H20
H19
L26
L27
M26
VCC_AXG_SENSE (46)
VSS_AXG_SENSE (46)
GFX_VID0 (46)
GFX_VID1 (46)
GFX_VID2 (46)
GFX_VID3 (46)
GFX_VID4 (46)
GFX_VID5 (46)
GFX_VID6 (46)
GFX_ON (46)
GFX_DPRSLPVR (46)
GFX_IMON (46)
R167 EV@1K_4R167 EV@1K_4
C345
C345
1u/10V_4
1u/10V_4
C363
C363
22u_8
22u_8
C324
C324
10u/6.3V_6
10u/6.3V_6
C715
C715
22u_8
22u_8
C311
C311
1u/10V_4
1u/10V_4
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
AUBURNDA 3/4 (PWR)
AUBURNDA 3/4 (PWR)
AUBURNDA 3/4 (PWR)
Date: Sheet
Date: Sheet
Date: Sheet
add it for Intel suggestion at 6/1
ARD:3A
CFD:6A
C354
C354
C396
C396
C392
1u/10V_4
1u/10V_4
C375
C375
22u_8
22u_8
C307
C307
10u/6.3V_6
10u/6.3V_6
C714
C714
22u_8
22u_8
C312
C312
1u/10V_4
1u/10V_4
C392
1u/10V_4
1u/10V_4
1u/10V_4
1u/10V_4
+
+
C328
C328
330u/2V_7343
330u/2V_7343
+1.1V_VTT
C314
C314
C315
C315
2.2u_6
2.2u_6
4.7u_6
4.7u_6
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
1
ZY9B
ZY9B
ZY9B
C389
C389
1u/10V_4
1u/10V_4
0.6A
C316
C316
22u_8
22u_8
649Tuesday, September 22, 2009
649Tuesday, September 22, 2009
649Tuesday, September 22, 2009
+1.5V_CPUVDDQ
+1.8V
of
of
of
1A
1A
1A
22A
+VGFX_AXG
+1.1V_VTT
3
+
+
C535 and C1005 may be can save
add it for discrete only at 6/1
+1.1V_VTT
C731
C731
22u_8
22u_8
H_VID0
H_VID1
H_VID2
H_VID3
H_VID4
H_VID5
H_VID6
H_DPRSLPVR
H_PSI#
Note:
For Validating IMVP VR R6451 should be STUFF
and R2N1 NO_STUFF
C438
C438
*A@330u/2V_7343
*A@330u/2V_7343
C409
C409
*A@22u_8
*A@22u_8
C784
C784
*A@10u_8
*A@10u_8
R207 EV@0_4R207 EV@0_4
C342
C342
22u_8
22u_8
+
+
C439
C439
*A@330u/2V_7343
*A@330u/2V_7343
C427
C427
*A@22u_8
*A@22u_8
C785
C785
*A@10u_8
*A@10u_8
C317
C317
22u_8
22u_8
C319
C319
22u_8
22u_8
R527
R527
1K_4
1K_4
R526
R526
*1K_4
*1K_4
C401
C401
*A@22u_8
*A@22u_8
C428
C428
*A@10u_8
*A@10u_8
C713
C713
22u_8
22u_8
C318
C318
22u_8
22u_8
R524
R524
1K_4
1K_4
R523
R523
*1K_4
*1K_4
http://laptop-motherboard-schematic.blogspot.com/
5
4
3
2
1
AUBURNDALE/CLARKSFIELD PROCESSOR (GND) AUBURNDALE/CLARKSFIELD PROCESSOR( RESERVED, CFG)
U45I
U45H
U45H
AT20
VSS1
AT17
VSS2
AR31
VSS3
AR28
VSS4
AR26
VSS5
AR24
VSS6
AR23
VSS7
AR20
VSS8
AR17
D D
C C
B B
VSS9
AR15
VSS10
AR12
VSS11
AR9
VSS12
AR6
VSS13
AR3
VSS14
AP20
VSS15
AP17
VSS16
AP13
VSS17
AP10
VSS18
AP7
VSS19
AP4
VSS20
AP2
VSS21
AN34
VSS22
AN31
VSS23
AN23
VSS24
AN20
VSS25
AN17
VSS26
AM29
VSS27
AM27
VSS28
AM25
VSS29
AM20
VSS30
AM17
VSS31
AM14
VSS32
AM11
VSS33
AM8
VSS34
AM5
VSS35
AM2
VSS36
AL34
VSS37
AL31
VSS38
AL23
VSS39
AL20
VSS40
AL17
VSS41
AL12
VSS42
AL9
VSS43
AL6
VSS44
AL3
VSS45
AK29
VSS46
AK27
VSS47
AK25
VSS48
AK20
VSS49
AK17
VSS50
AJ31
VSS51
AJ23
VSS52
AJ20
VSS53
AJ17
VSS54
AJ14
VSS55
AJ11
VSS56
AJ8
VSS57
AJ5
VSS58
AJ2
VSS59
AH35
VSS60
AH34
VSS61
AH33
VSS62
AH32
VSS63
AH31
VSS64
AH30
VSS65
AH29
VSS66
AH28
VSS67
AH27
VSS68
AH26
VSS69
AH20
VSS70
AH17
VSS71
AH13
VSS72
AH9
VSS73
AH6
VSS74
AH3
VSS75
AG10
VSS76
AF8
VSS77
AF4
VSS78
AF2
VSS79
AE35
VSS80
Clarksfield/Auburndale
Clarksfield/Auburndale
VSS
VSS
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
AE34
AE33
AE32
AE31
AE30
AE29
AE28
AE27
AE26
AE6
AD10
AC8
AC4
AC2
AB35
AB34
AB33
AB32
AB31
AB30
AB29
AB28
AB27
AB26
AB6
AA10
Y8
Y4
Y2
W35
W34
W33
W32
W31
W30
W29
W28
W27
W26
W6
V10
U8
U4
U2
T35
T34
T33
T32
T31
T30
T29
T28
T27
T26
T6
R10
P8
P4
P2
N35
N34
N33
N32
N31
N30
N29
N28
N27
N26
N6
M10
L35
L32
L29
L8
L5
L2
K34
K33
K30
U45I
K27
VSS161
K9
VSS162
K6
VSS163
K3
VSS164
J32
VSS165
J30
VSS166
J21
VSS167
J19
VSS168
H35
VSS169
H32
VSS170
H28
VSS171
H26
VSS172
H24
VSS173
H22
VSS174
H18
VSS175
H15
VSS176
H13
VSS177
H11
VSS178
H8
VSS179
H5
VSS180
H2
VSS181
G34
VSS182
G31
VSS183
G20
VSS184
G9
VSS185
G6
VSS186
G3
VSS187
F30
VSS188
F27
VSS189
F25
VSS190
F22
VSS191
F19
VSS192
F16
VSS193
E35
VSS194
E32
VSS195
E29
VSS196
E24
VSS197
E21
VSS198
E18
VSS199
E13
VSS200
E11
VSS201
E8
VSS202
E5
VSS203
E2
VSS204
D33
VSS205
D30
VSS206
D26
VSS207
D9
VSS208
D6
VSS209
D3
VSS210
C34
VSS211
C32
VSS212
C29
VSS213
C28
VSS214
C24
VSS215
C22
VSS216
C20
VSS217
C19
VSS218
C16
VSS219
B31
VSS220
B25
VSS221
B21
VSS222
B18
VSS223
B17
VSS224
B13
VSS225
B11
VSS226
B8
VSS227
B6
VSS228
B4
VSS229
A29
VSS230
A27
VSS231
A23
VSS232
A9
VSS233
Clarksfield/Auburndale
Clarksfield/Auburndale
VSS
VSS
NCTF
NCTF
VSS_NCTF1
VSS_NCTF2
VSS_NCTF3
VSS_NCTF4
VSS_NCTF5
VSS_NCTF6
VSS_NCTF7
AT35
AT1
AR34
B34
B2
B1
A35
TP47TP47
TP45TP45
TP3TP3
U45E
U45E
AJ13
RSVD32
AJ12
AP25
RSVD1
AL25
RSVD2
AL24
RSVD3
AL22
RSVD4
AJ33
RSVD5
AG9
RSVD6
M27
RSVD7
L28
RSVD8
VREF_DQ_DIMM0(14,16)
VREF_DQ_DIMM1(15,16)
CFG0
CFG3
CFG4
CFG7
TP2TP2
TP1TP1
J17
SA_DIMM_VREF
H17
SB_DIMM_VREF
G25
RSVD11
G17
RSVD12
E31
RSVD13
E30
RSVD14
AM30
CFG[0]
AM28
CFG[1]
AP31
CFG[2]
AL32
CFG[3]
AL30
CFG[4]
AM31
CFG[5]
AN29
CFG[6]
AM32
CFG[7]
AK32
CFG[8]
AK31
CFG[9]
AK28
CFG[10]
AJ28
CFG[11]
AN30
CFG[12]
AN32
CFG[13]
AJ32
CFG[14]
AJ29
CFG[15]
AJ30
CFG[16]
AK30
CFG[17]
H16
RSVD_TP_86
B19
RSVD15
A19
RSVD16
A20
RSVD17
B20
RSVD18
U9
RSVD19
T9
RSVD20
AC9
RSVD21
AB9
RSVD22
C1
RSVD_NCTF_23
A3
RSVD_NCTF_24
J29
RSVD26
J28
RSVD27
A34
RSVD_NCTF_28
A33
RSVD_NCTF_29
C35
RSVD_NCTF_30
B35
RSVD_NCTF_31
Clarksfield/Auburndale
Clarksfield/Auburndale
RESERVED
RESERVED
RSVD33
RSVD34
RSVD35
RSVD36
RSVD_NCTF_37
RSVD38
RSVD39
RSVD_NCTF_40
RSVD_NCTF_41
RSVD_NCTF_42
RSVD_NCTF_43
RSVD45
RSVD46
RSVD47
RSVD48
RSVD49
RSVD50
RSVD51
RSVD52
RSVD53
RSVD_NCTF_54
RSVD_NCTF_55
RSVD_NCTF_56
RSVD_NCTF_57
RSVD58
RSVD_TP_59
RSVD_TP_60
RSVD62
RSVD63
RSVD64
RSVD65
RSVD_TP_66
RSVD_TP_67
RSVD_TP_68
RSVD_TP_69
RSVD_TP_70
RSVD_TP_71
RSVD_TP_72
RSVD_TP_73
RSVD_TP_74
RSVD_TP_75
RSVD_TP_76
RSVD_TP_77
RSVD_TP_78
RSVD_TP_79
RSVD_TP_80
RSVD_TP_81
RSVD_TP_82
RSVD_TP_83
RSVD_TP_84
RSVD_TP_85
AH25
AK26
AL26
AR2
AJ26
AJ27
AP1
AT2
AT3
AR1
AL28
AL29
AP30
AP32
AL27
AT31
AT32
AP33
AR33
AT33
AT34
AP35
AR35
AR32
E15
F15
A2
KEY
D15
C15
AJ15
TP6TP6
AH15
TP5TP5
AA5
AA4
R8
AD3
AD2
AA2
AA1
R9
AG7
AE3
V4
V5
N2
AD5
AD7
W3
W2
N3
AE5
AD9
AP34
VSS
TP46TP46
AP34 can be NC on CRB; EDS/DG suggestion to GND
Processor Strapping
A A
CFG4
(Display Port
Presence)
CFG0
(PCI-Epress
Configuration Select)
CFG3
(PCI-Epress Static
Lane Reversal)
Disabled; No Physical Display Port
attached to Embedded Diplay Port
Single PEG
Normal Operation Lane Numbers Reversed
5
10
Enabled; An external Display port
device is connected to the Embedded
Display port
Bifurcation enabled
4
CFG[ 1:0 ] - PCI_Epress Configuration Select
Use reverse type
* 11= 1 x 16 PEG
* 10= 2 x 8 PEG
+1.1V_VTT
R546 3.01K/F_4R546 3.01K/F_4
R545 *3.01K/F_4R545 *3.01K/F_4
3
CFG4
R557 *3.01K/F_4R557 *3.01K/F_4R547 3.01K/F_4R547 3.01K/F_4
CFG0
R544 *3.01K/F_4R544 *3.01K/F_4
CFG3
R542 3.01K/F_4R542 3.01K/F_4
CFG7
R543 *3.01K/F_4R543 *3.01K/F_4
The Clarkfield processor's PCI Express interface may not meet
PCI Express 2.0 jitter specifications. Intel recommends
placing a 3.01K +/- 5% pull down resistor to VSS on CFG[7] pin
for both rPGA and BGA components. This pull down resistor
should be removed when this issue is fixed.(ES1 only)
2
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
AUBURNDA 4/4
AUBURNDA 4/4
AUBURNDA 4/4
Date: Sheet
Date: Sheet
Date: Sheet
PROJECT :
ZY9B
ZY9B
ZY9B
of
of
of
749Thursday, September 17, 2009
749Thursday, September 17, 2009
1
749Thursday, September 17, 2009
1A
1A
1A
http://laptop-motherboard-schematic.blogspot.com/
5
4
3
2
1
IBEX PEAK-M (DMI,FDI,GPIO)
U53C
U53C
XDP_DBRST#
ACIN_R
PM_BATLOW#
PM_RI#
BC24
DMI0RXN
BJ22
DMI1RXN
AW20
DMI2RXN
BJ20
DMI3RXN
BD24
DMI0RXP
BG22
DMI1RXP
BA20
DMI2RXP
BG20
DMI3RXP
BE22
DMI0TXN
BF21
DMI1TXN
BD20
DMI2TXN
BE18
DMI3TXN
BD22
DMI0TXP
BH21
DMI1TXP
BC20
DMI2TXP
BD18
DMI3TXP
BH25
DMI_ZCOMP
BF25
DMI_IRCOMP
T6
SYS_RESET#
M6
SYS_PWROK
B17
PWROK
K5
MEPWROK
A10
LAN_RST#
D9
DRAMPWROK
C16
RSMRST#
M1
SUS_PWR_DN_ACK / GPIO30
P5
PWRBTN#
P7
ACPRESENT / GPIO31
A6
BATLOW# / GPIO72
F14
RI#
IbexPeak-M_R1P0
IbexPeak-M_R1P0
System Power Management
System Power Management
DMI_RXN0(4)
SYS_PWROK
ICH_RSMRST#(37)
DNBSWON#(16,37)
PCH_ACIN(37)
DMI_RXN1(4)
DMI_RXN2(4)
DMI_RXN3(4)
DMI_RXP0(4)
DMI_RXP1(4)
DMI_RXP2(4)
DMI_RXP3(4)
DMI_TXN0(4)
DMI_TXN1(4)
DMI_TXN2(4)
DMI_TXN3(4)
DMI_TXP0(4)
DMI_TXP1(4)
DMI_TXP2(4)
DMI_TXP3(4)
+1.05V
R638 49.9/F_4R638 49.9/F_4
RSV_ICH_LAN_RST#
SUS_PWR_ACK_R
R332 *0_4R332 *0_4
D D
C C
XDP_DBRST#(4,16)
PM_DRAM_PWRGD(4,16)
B B
DMI
FDI
DMI
FDI
CLKRUN# / GPIO32
SUS_STAT# / GPIO61
SUSCLK / GPIO62
SLP_S5# / GPIO63
SLP_LAN# / GPIO29
FDI_RXN0
FDI_RXN1
FDI_RXN2
FDI_RXN3
FDI_RXN4
FDI_RXN5
FDI_RXN6
FDI_RXN7
FDI_RXP0
FDI_RXP1
FDI_RXP2
FDI_RXP3
FDI_RXP4
FDI_RXP5
FDI_RXP6
FDI_RXP7
FDI_INT
FDI_FSYNC0
FDI_FSYNC1
FDI_LSYNC0
FDI_LSYNC1
WAKE#
SLP_S4#
SLP_S3#
SLP_M#
TP23
PMSYNCH
FDI_TXN0_R
BA18
FDI_TXN1_R
BH17
FDI_TXN2_R
BD16
FDI_TXN3_R
BJ16
FDI_TXN4_R
BA16
FDI_TXN5_R
BE14
FDI_TXN6_R
BA14
FDI_TXN7_R
BC12
FDI_TXP0_R
BB18
FDI_TXP1_R
BF17
FDI_TXP2_R
BC16
FDI_TXP3_R
BG16
FDI_TXP4_R
AW16
FDI_TXP5_R
BD14
FDI_TXP6_R
BB14
FDI_TXP7_R
BD12
BJ14
R643 EV@1K_4R643 EV@1K_4
BF13
R657 EV@1K_4R657 EV@1K_4
BH13
R644 EV@1K_4R644 EV@1K_4
BJ12
R642 EV@1K_4R642 EV@1K_4
BG14
R641 EV@1K_4R641 EV@1K_4
J12
Y1
SUS_STAT#
P8
F3
SLP_S5#_R
E4
H7
P12
SLP_M#
K8
N2
BJ10
PM_SLP_LAN#
F6
Arrandale only
R610 *A@0_4R610 *A@0_4
R623 *A@0_4R623 *A@0_4
R609 *A@0_4R609 *A@0_4
R634 *A@0_4R634 *A@0_4
R620 *A@0_4R620 *A@0_4
R616 *A@0_4R616 *A@0_4
R624 *A@0_4R624 *A@0_4
R632 *A@0_4R632 *A@0_4
R613 *A@0_4R613 *A@0_4
R628 *A@0_4R628 *A@0_4
R612 *A@0_4R612 *A@0_4
R637 *A@0_4R637 *A@0_4
R615 *A@0_4R615 *A@0_4
R621 *A@0_4R621 *A@0_4
R631 *A@0_4R631 *A@0_4
R630 *A@0_4R630 *A@0_4 R274 *A@0_4R274 *A@0_4
TP35TP35
TP41TP41
R345 *0_4R345 *0_4
TP67TP67
TP38TP38
FDI_TXN0 (4)
FDI_TXN1 (4)
FDI_TXN2 (4)
FDI_TXN3 (4)
FDI_TXN4 (4)
FDI_TXN5 (4)
FDI_TXN6 (4)
FDI_TXN7 (4)
FDI_TXP0 (4)
FDI_TXP1 (4)
FDI_TXP2 (4)
FDI_TXP3 (4)
FDI_TXP4 (4)
FDI_TXP5 (4)
FDI_TXP6 (4)
FDI_TXP7 (4)
FDI_INT (4)
FDI_FSYNC0 (4)
FDI_FSYNC1 (4)
FDI_LSYNC0 (4)
FDI_LSYNC1 (4)
PCIE_WAKE# (28,32)
CLKRUN# (37)
ICH_SUSCLK (37)
SUSC# (37)
SUSB# (37)
PM_SYNC (4)
INT_LVDS_BLON(25)
INT_LVDS_DIGON(25)
INT_LVDS_BRIGHT(25)
INT_LVDS_EDIDCLK(25)
INT_LVDS_EDIDDATA(25)
INT_TXLCLKOUT-(25)
INT_TXLCLKOUT+(25)
INT_TXLOUT0-(25)
INT_TXLOUT1-(25)
INT_TXLOUT2-(25)
INT_TXUCLKOUT-(25)
INT_TXUCLKOUT+(25)
INT_CRT_BLU(25)
INT_CRT_GRN(25)
INT_CRT_RED(25)
INT_CRT_DDCCLK(25)
INT_CRT_DDCDAT(25)
INT_HSYNC(25)
INT_VSYNC(25)
+3V
INT_TXLOUT0+(25)
INT_TXLOUT1+(25)
INT_TXLOUT2+(25)
INT_TXUOUT0-(25)
INT_TXUOUT1-(25)
INT_TXUOUT2-(25)
INT_TXUOUT0+(25)
INT_TXUOUT1+(25)
INT_TXUOUT2+(25)
R590 *A@0_4R590 *A@0_4
R591 *A@0_4R591 *A@0_4
R258 *A@10K_4R258 *A@10K_4
R259 *A@10K_4R259 *A@10K_4
R280 *A@2.37K/F_4R280 *A@2.37K/F_4
R273 *A@0_4R273 *A@0_4
INT_TXLCLKOUTÂINT_TXLCLKOUT+
INT_TXLOUT0ÂINT_TXLOUT1ÂINT_TXLOUT2-
INT_TXLOUT0+
INT_TXLOUT1+
INT_TXLOUT2+
INT_TXUCLKOUTÂINT_TXUCLKOUT+
INT_TXUOUT0ÂINT_TXUOUT1ÂINT_TXUOUT2-
INT_TXUOUT0+
INT_TXUOUT1+
INT_TXUOUT2+
INT_CRT_BLU
INT_CRT_GRN
INT_CRT_RED
DAC_IREF
R269
R269
1K/F_4
1K/F_4
IBEX PEAK-M (LVDS,DDI)
U53D
U53D
T48
L_BKLTEN
T47
L_VDD_EN
Y48
L_BKLTCTL
AB48
L_DDC_CLK
Y45
L_DDC_DATA
AB46
L_CTRL_CLK
V48
L_CTRL_DATA
AP39
LVD_IBG
AP41
LVD_VBG
AT43
LVD_VREFH
AT42
LVD_VREFL
AV53
LVDSA_CLK#
AV51
LVDSA_CLK
HSYNC_G
VSYNC_G
BB47
BA52
AY48
AV47
BB48
BA50
AY49
AV48
AP48
AP47
AY53
AT49
AU52
AT53
AY51
AT48
AU50
AT51
AA52
AB53
AD53
AD48
AB51
V51
V53
Y53
Y51
LVDSA_DATA#0
LVDSA_DATA#1
LVDSA_DATA#2
LVDSA_DATA#3
LVDSA_DATA0
LVDSA_DATA1
LVDSA_DATA2
LVDSA_DATA3
LVDSB_CLK#
LVDSB_CLK
LVDSB_DATA#0
LVDSB_DATA#1
LVDSB_DATA#2
LVDSB_DATA#3
LVDSB_DATA0
LVDSB_DATA1
LVDSB_DATA2
LVDSB_DATA3
CRT_BLUE
CRT_GREEN
CRT_RED
CRT_DDC_CLK
CRT_DDC_DATA
CRT_HSYNC
CRT_VSYNC
DAC_IREF
CRT_IRTN
IbexPeak-M_R1P0
IbexPeak-M_R1P0
LVDS
LVDS
Digital Display Interface
Digital Display Interface
CRT
CRT
SDVO_TVCLKINN
SDVO_TVCLKINP
SDVO_STALLN
SDVO_STALLP
SDVO_INTN
SDVO_INTP
SDVO_CTRLCLK
SDVO_CTRLDATA
DDPB_AUXN
DDPB_AUXP
DDPB_HPD
DDPB_0N
DDPB_0P
DDPB_1N
DDPB_1P
DDPB_2N
DDPB_2P
DDPB_3N
DDPB_3P
DDPC_CTRLCLK
DDPC_CTRLDATA
DDPC_AUXN
DDPC_AUXP
DDPC_HPD
DDPC_0N
DDPC_0P
DDPC_1N
DDPC_1P
DDPC_2N
DDPC_2P
DDPC_3N
DDPC_3P
DDPD_CTRLCLK
DDPD_CTRLDATA
DDPD_AUXN
DDPD_AUXP
DDPD_HPD
DDPD_0N
DDPD_0P
DDPD_1N
DDPD_1P
DDPD_2N
DDPD_2P
DDPD_3N
DDPD_3P
BJ46
BG46
BJ48
BG48
BF45
BH45
T51
T53
BG44
BJ44
AU38
BD42
BC42
BJ42
BG42
BB40
BA40
AW38
BA38
Y49
AB49
BE44
BD44
AV40
BE40
BD40
BF41
BH41
BD38
BC38
BB36
BA36
U50
U52
BC46
BD46
AT38
BJ40
BG40
BJ38
BG38
BF37
BH37
BE36
BD36
INT_HDMITX2N_R
INT_HDMITX2P_R
INT_HDMITX1N_R
INT_HDMITX1P_R
INT_HDMITX0N_R
INT_HDMITX0P_R
INT_HDMICLK-_R
INT_HDMICLK+_R
SDVO_CTRLCLK (26)
SDVO_CTRLDAT (26)
C474 *A@.1u_4C474 *A@.1u_4
C472 *A@.1u_4C472 *A@.1u_4
C837 *A@.1u_4C837 *A@.1u_4
C835 *A@.1u_4C835 *A@.1u_4
C478 *A@.1u_4C478 *A@.1u_4
C482 *A@.1u_4C482 *A@.1u_4
C475 *A@.1u_4C475 *A@.1u_4
C476 *A@.1u_4C476 *A@.1u_4
R place close to PCH
R589 *A@150_4R589 *A@150_4
R588 *A@150_4R588 *A@150_4
R587 *A@150_4R587 *A@150_4
INT_HDMI_HPD (26)
INT_HDMITX2N (26)
INT_HDMITX2P (26)
INT_HDMITX1N (26)
INT_HDMITX1P (26)
INT_HDMITX0N (26)
INT_HDMITX0P (26)
INT_HDMICLK- (26)
INT_HDMICLK+ (26)
INT_CRT_BLU
INT_CRT_GRN
INT_CRT_RED
PCH Pull-high/low System PWR_OK
+3V
CLKRUN#
A A
XDP_DBRST#
ICH_RSMRST#
RSV_ICH_LAN_RST#
SYS_PWROK ACIN_R
R713 8.2K_4R713 8.2K_4
R355 1K_4R355 1K_4
R298 10K_4R298 10K_4
R674 10K_4R674 10K_4
R359 10K_4R359 10K_4
5
PM_RI#
PM_BATLOW#
PCIE_WAKE#
PM_SLP_LAN#
SUS_PWR_ACK_R
R319 10K_4R319 10K_4
R683 8.2K_4R683 8.2K_4
R321 1K_4R321 1K_4
R313 *10K_4R313 *10K_4
R696 10K_4R696 10K_4
R326 10K_4R326 10K_4
+3V_S5
4
3
C569 *.1u_4C569 *.1u_4
SYS_PWROK
U31
U31
TC7SH08FU
TC7SH08FU
+3V_S5
DELAY_VR_PWRGOOD need PU 2K to +3V.
PU at power side
53
1
4
2
R371 100K_4R371 100K_4
DELAY_VR_PWRGOOD (4,40)
PWROK_EC (37)
2
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
IBEX PEAK-M 1/6
IBEX PEAK-M 1/6
IBEX PEAK-M 1/6
Date: Sheet
Date: Sheet
Date: Sheet
PROJECT :
ZY9B
ZY9B
ZY9B
849Thursday, September 17, 2009
849Thursday, September 17, 2009
849Thursday, September 17, 2009
of
of
1
of
1A
1A
1A
http://laptop-motherboard-schematic.blogspot.com/
5
RTC Circuitry
+VCCRTC
D32
20mils
D32
BAT54C
BAT54C
1 3
2
20MIL
RTC_N01
Q27
Q27
MMBT3904
MMBT3904
RTC_N03
R658 20K/F_4R658 20K/F_4
30mils
R666 20K/F_4R666 20K/F_4
C523
C523
1u/10V_4
1u/10V_4
R288 22K_6R288 22K_6
C866
C866
1u/10V_4
1u/10V_4
C879
C879
1u/10V_4
1u/10V_4
R286
R286
68.1K/F_4
68.1K/F_4
R296
R296
150K/F_6
150K/F_6
RTC_RST#
12
J1
J1
*SHORT_ PAD1
*SHORT_ PAD1
SRTC_RST#
12
J2
J2
*SHORT_ PAD1
*SHORT_ PAD1
+5V_S5
+3VPCU
VCCRTC_1
20MIL
D D
R290
R290
1K_4
1K_4
VCCRTC_2
20MIL
12
CN30
CN30
RTC_ML2032
RTC_ML2032
HDA Bus
C C
PCH_AZ_CODEC_SYNC(29)
PCH_AZ_CODEC_RST#(29)
PCH_AZ_CODEC_SDOUT(29)
PCH_AZ_CODEC_BITCLK(29)
Place all series terms close to PCH except for SDIN input
lines,which should be close to source.Placement of R773, R775,
R776 & R777 should equal distance to the T split trace point.
Basically, keep the same distance from T for all series
termination resistors.
R633 33_4R633 33_4
R617 33_4R617 33_4
R636 33_4R636 33_4
R627 33_4R627 33_4
C845
C845
*27p_4
*27p_4
ACZ_SYNCACZ_SYNC
ACZ_RST#
ACZ_SDOUTACZ_SDOUT
ACZ_BIT_CLKACZ_BIT_CLK
PCH SPI
B B
SPI_CS0#_R
SPI_CLK_R
SPI_SI_R
SPI_SO_R
C557
C557
*22p_4
*22p_4
R364 3.3K/F_4R364 3.3K/F_4
+3V
A A
5
U30
U30
1
CE#
6
SCK
5
SI
2
SO
3
WP#
W25Q32BVSSIG
W25Q32BVSSIG
HOLD#
VDD
VSS
8
R323 3.3K/F_4R323 3.3K/F_4
7
4
+3V
C553
C553
.1u/X7R_4
.1u/X7R_4
4
C878
C878
15p_4
15p_4
C883
C883
15p_4
15p_4
+VCCRTC
HDA_SYNC (PCH strap pin)
Internal weak pull-down
VCCVRM=>+1.8V (default)
external pull-up
VCCVRM=>+1.5V
PCH_AZ_CODEC_SDIN0(29)
+3V_S5
+3VPCU
PCH Strap Table
Pin Name Strap description
SPKR
INIT3_3V
GNT3# / GPIO55
INTVRMEN
GNT1# / GPIO51
GNT0#
GNT2# / GPIO53
NV_ALE
NV_CLE
HDA_DOCK_EN#/GPIO33
SPI_MOSI
HDA_SDO
GPIO8
GPIO27
HDA_SYNC
GPIO15
http://laptop-motherboard-schematic.blogspot.com/
4
No reboot mode setting PWROK
Reserved
Integrated 1.05V VRM enable ALWAYS
Boot BIOS Selection 1 [bit-1]
Boot BIOS Selection 0 [bit-0]
ESI strap (Server only)
Intel Anti-Theft HDD protection PWROK 0 = Disable (Internal pull-down 32ohm)
DMI Termination voltage weak pull-down 32ohm
Flash Descriptor Security
iTPM function Disable MEPWROK 0 = Default (weak pull-down 20K)
Reserved
Reserved
On-die PLL Voltage Regulator
On-die PLL PWR supply select RSMRST#
Reserved RSMRST#
23
Y7
32.768KHZY732.768KHZ
4 1
R289 1M_4R289 1M_4
ACZ_BIT_CLK
ACZ_SYNC
SPKR(29)
ACZ_RST#
ACZ_SDOUT
R283 10K_4R283 10K_4
R699 *10K_4R699 *10K_4
3
R667
R667
10M_4
10M_4
HDA_DOCK_EN#
Sampled
PWROK
PWROKTop-Block Swap Override
PWROK
PWROK
PWROK
PWROK
PWROK
RSMRST#
RSMRST#
RSMRST#
3
IBEX PEAK-M (HDA,JTAG,SATA)
U53A
RTC_X1
RTC_X2
RTC_RST#
SRTC_RST#
SM_INTRUDER#
PCH_INVRMEN
TP27TP27
TP26TP26
TP25TP25
PCH_GPIO13
SPI_CLK_R
SPI_CS0#_R
SPI_CS1#
SPI_SI_R
SPI_SO_R
U53A
B13
RTCX1
D13
RTCX2
C14
RTCRST#
D17
SRTCRST#
A16
INTRUDER#
A14
INTVRMEN
A30
HDA_BCLK
D29
HDA_SYNC
P1
SPKR
C30
HDA_RST#
G30
HDA_SDIN0
F30
HDA_SDIN1
E32
HDA_SDIN2
F32
HDA_SDIN3
B29
HDA_SDO
H32
HDA_DOCK_EN# / GPIO33
J30
HDA_DOCK_RST# / GPIO13
M3
JTAG_TCK
K3
JTAG_TMS
K1
JTAG_TDI
J2
JTAG_TDO
J4
TRST#
BA2
SPI_CLK
AV3
SPI_CS0#
AY3
SPI_CS1#
AY1
SPI_MOSI
AV1
SPI_MISO
IbexPeak-M_R1P0
IbexPeak-M_R1P0
RTCIHDA
RTCIHDA
SPI JTAG
SPI JTAG
Configuration
0 = Default (weak pull-down 20K)
1 = Setting to No-Reboot mode
1 = Default (weak pull-up 20K)
Should not be pull-down
0 = "top-block swap" mode
1 = Default (weak pull-up 20K)
Should be always pull-up
Boot Location
GNT0#GNT1#
SPI
11
PCI
01
00
Should not be pull-down
(weak pull-up 20K)
0 = Override
1 = Default (weak pull-up 20K)
1 = Enable
Should not be pull-up
(weak pull-down 20K)
Should not be pull-down
(weak pull-up 20K)
0 = Disable
1 = Enable (weak pull-up 20K)
0 = 1.8V supply (weak pull-down 20K)
1 = 1.5V supply
0 = TLS no Confidentiality
(weak pull-down 20K)
1 = TLS Confidentiality
LPC
FWH0 / LAD0
FWH1 / LAD1
FWH2 / LAD2
FWH3 / LAD3
FWH4 / LFRAME#
LDRQ1# / GPIO23
LPC
LPC
SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP
SATA1RXN
SATA1RXP
SATA1TXN
SATA1TXP
SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP
SATA3RXN
SATA3RXP
SATA3TXN
SATA3TXP
SATA4RXN
SATA4RXP
SATA4TXN
SATA
SATA
SATA4TXP
SATA5RXN
SATA5RXP
SATA5TXN
SATA5TXP
SATAICOMPO
SATAICOMPI
SATALED#
SATA0GP / GPIO21
SATA1GP / GPIO19
+3V
+VCCRTC
Default weak pull-up on GNT0/1#
[Need external pull-down for LPC BIOS]
+3V
+1.8V
+1.8V
+3V_S5
use defaul (0 = 1.8V supply)
+3V_S5
LDRQ0#
SERIRQ
R270 *1K_4R270 *1K_4
R256 *1K_4R256 *1K_4
R272 1K_4R272 1K_4
R271 1K_4R271 1K_4
R698 *1K_4R698 *1K_4
R697 *1K_4R697 *1K_4
+3V
+3V
R340 10K_4R340 10K_4
R584 *10K_4R584 *10K_4
R279 *1K_4R279 *1K_4
R276 *10K_4R276 *10K_4
2
D33
B33
C32
A32
C34
PCH_DRQ#0
A34
F34
AB9
AK7
AK6
AK11
AK9
AH6
AH5
AH9
AH8
AF11
AF9
AF7
AF6
AH3
AH1
AF3
AF1
AD9
AD8
AD6
AD5
AD3
AD1
AB3
AB1
AF16
AF15
T3
Y9
V1
PCH_DRQ#1
SATA_TXN0_C
SATA_TXP0_C
SATA_TXN1_C
SATA_TXP1_C
SATA_RX2N_C
SATA_RX2P_C
SATA_TXN2_C
SATA_TXP2_C
SATA_TXN3_C
SATA_TXP3_C
TP65TP65
TP23TP23
R347 10K_4R347 10K_4
C269 .01u/16V_4C269 .01u/16V_4
C268 .01u/16V_4C268 .01u/16V_4
C395 .01u/16V_4C395 .01u/16V_4
C399 .01u/16V_4C399 .01u/16V_4
Note:
SATA port2/3 may not be available on all PCH sku
(HM55 support 4port only)
C571 .01u/16V_4C571 .01u/16V_4
C570 .01u/16V_4C570 .01u/16V_4
C555 .01u/16V_4C555 .01u/16V_4
C556 .01u/16V_4C556 .01u/16V_4
C540 .01u/16V_4C540 .01u/16V_4
C543 .01u/16V_4C543 .01u/16V_4
R291 37.4/F_4R291 37.4/F_4
R329 10K/F_4R329 10K/F_4
R716 10K/F_4R716 10K/F_4
+1.05V
+3V
+3V
ZY9B note
R702 *10K_4R702 *10K_4
R662 330K_4R662 330K_4
SPKR
PCI_GNT3# (10)
PCH_INVRMEN
PCI_GNT0# (10)
PCI_GNT1# (10)
USE GPIO PIN
NV_ALE
NV_ALE (10,16)
NV_CLE
NV_CLE (10,16)
HDA_DOCK_EN#
R352 *1K_4R352 *1K_4
R330 1K_4R330 1K_4
2
SPI_SI_R
RSV_GPIO8 (11)
CR_WAKE# (11,27)
1
LPC_LAD0 (32,37)
LPC_LAD1 (32,37)
LPC_LAD2 (32,37)
LPC_LAD3 (32,37)
LPC_LFRAME# (32,37)
+3V
IRQ_SERIRQ (37)
SATA_RX0- (31)
SATA_RX0+ (31)
SATA_TX0- (31)
SATA_TX0+ (31)
SATA_RX1- (31)
SATA_RX1+ (31)
SATA_TX1- (31)
SATA_TX1+ (31)
SATA_RX2- (34)
SATA_RX2+ (34)
SATA_TX2- (34)
SATA_TX2+ (34)
SATA_RX3- (31)
SATA_RX3+ (31)
SATA_TX3- (31)
SATA_TX3+ (31)
SATA_ACT# (35)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
IBEX PEAK-M 2/6
IBEX PEAK-M 2/6
IBEX PEAK-M 2/6
Date: Sheet
Date: Sheet
Date: Sheet
SATA HDD
CAP. Close connect side
SATA ODD
E-SATA
2ND SATA HDD
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
ZY9B
ZY9B
ZY9B
1
1A
1A
949Thursday, September 17, 2009
949Thursday, September 17, 2009
949Thursday, September 17, 2009
1A
of
of
of
5
4
3
2
1
IBEX PEAK-M (PCI,USB,NVRAM)
U53E
U53E
H40
AD0
N34
AD1
C44
AD2
A38
AD3
C36
AD4
J34
AD5
A40
AD6
D45
D D
PCI_PIRQA#
TP24TP24
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
TP59TP59
C C
B B
dGPU_SELECT#(25,26)
PCI_GNT0#(9)
PCI_GNT1#(9)
PWM_SELECT#(25)
PCI_GNT3#(9)
PCI_RST#(32)
CLK_LPC_DEBUG(32)
CLK_PCI_775(37)
CLK_PCI_FB CLK_PCI_FB_C
TP58TP58
TP61TP61
TP53TP53
TP62TP62
TP55TP55
TP18TP18
TP14TP14
TP60TP60
TP20TP20
TP21TP21
TP57TP57
TP16TP16
TP22TP22
TP56TP56
TP40TP40
R264 22_4R264 22_4
T58T58
R268 22_4R268 22_4
R263 22_4R263 22_4
PCI_REQ0#
PCI_REQ1#
dGPU_SELECT#
PCI_REQ3#
PCI_GNT0#
PCI_GNT1#
PCI_GNT3#
PCI_PIRQE#
PCI_PIRQF#
PCI_PIRQG#
PCI_PIRQH#
PCI_RST#
PCI_SERR#
PCI_PERR#
PCI_IRDY#
PCI_PAR
PCI_DEVSEL#
PCI_FRAME#
PCI_PLOCK#
PCI_STOP#
PCI_TRDY#
ICH_PME#
PCI_PLTRST#
CLK_PCI_PCCARD
CLK_PCI_775_CCLK_PCI_775_C
AD7
E36
AD8
H48
AD9
E40
AD10
C40
AD11
M48
AD12
M45
AD13
F53
AD14
M40
AD15
M43
AD16
J36
AD17
K48
AD18
F40
AD19
C42
AD20
K46
AD21
M51
AD22
J52
AD23
K51
AD24
L34
AD25
F42
AD26
J40
AD27
G46
AD28
F44
AD29
M47
AD30
H36
AD31
J50
C/BE0#
G42
C/BE1#
H47
C/BE2#
G34
C/BE3#
G38
PIRQA#
H51
PIRQB#
B37
PIRQC#
A44
PIRQD#
F51
REQ0#
A46
REQ1# / GPIO50
B45
REQ2# / GPIO52
M53
REQ3# / GPIO54
F48
GNT0#
K45
GNT1# / GPIO51
F36
GNT2# / GPIO53
H53
GNT3# / GPIO55
B41
PIRQE# / GPIO2
K53
PIRQF# / GPIO3
A36
PIRQG# / GPIO4
A48
PIRQH# / GPIO5
K6
PCIRST#
E44
SERR#
E50
PERR#
A42
IRDY#
H44
PAR
F46
DEVSEL#
C46
FRAME#
D49
PLOCK#
D41
STOP#
C48
TRDY#
M7
PME#
D5
PLTRST#
N52
CLKOUT_PCI0
P53
CLKOUT_PCI1
P46
CLKOUT_PCI2
P51
CLKOUT_PCI3
P48
CLKOUT_PCI4
IbexPeak-M_R1P0
IbexPeak-M_R1P0
PCI
PCI
NV_DQ0 / NV_IO0
NV_DQ1 / NV_IO1
NV_DQ2 / NV_IO2
NV_DQ3 / NV_IO3
NV_DQ4 / NV_IO4
NV_DQ5 / NV_IO5
NV_DQ6 / NV_IO6
NV_DQ7 / NV_IO7
NV_DQ8 / NV_IO8
NV_DQ9 / NV_IO9
NV_DQ10 / NV_IO10
NV_DQ11 / NV_IO11
NVRAM
NVRAM
NV_DQ12 / NV_IO12
NV_DQ13 / NV_IO13
NV_DQ14 / NV_IO14
NV_DQ15 / NV_IO15
USB
USB
NV_CE#0
NV_CE#1
NV_CE#2
NV_CE#3
NV_DQS0
NV_DQS1
NV_ALE
NV_CLE
NV_RCOMP
NV_RB#
NV_WR#0_RE#
NV_WR#1_RE#
NV_WE#_CK0
NV_WE#_CK1
USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N
USBP9P
USBP10N
USBP10P
USBP11N
USBP11P
USBP12N
USBP12P
USBP13N
USBP13P
USBRBIAS#
USBRBIAS
OC0# / GPIO59
OC1# / GPIO40
OC2# / GPIO41
OC3# / GPIO42
OC4# / GPIO43
OC5# / GPIO9
OC6# / GPIO10
OC7# / GPIO14
AY9
BD1
AP15
BD8
AV9
BG8
AP7
AP6
AT6
AT9
BB1
AV6
BB3
BA4
BE4
BB6
BD6
BB7
BC8
BJ8
BJ6
BG6
NV_ALE
BD3
NV_CLE
AY6
NV_RCOMP
AU2
AV7
AY8
AY5
AV11
BF5
H18
J18
A18
C18
N20
P20
J20
L20
F20
G20
A20
C20
USBP6-
M22
USBP6+
N22
USBP7-
B21
USBP7+
D21
H22
J22
E22
F22
A22
C22
G24
H24
L24
M24
A24
C24
USB_BIAS
B25
D25
USB_OC0#
N16
J16
USB_OC2#
F16
USB_OC3#CLK_LPC_DEBUG_C
L16
USB_OC4#
E14
USB_OC5#
G16
USB_OC6#
F12
USB_OC7#
T15
NV_CE#0 (16)
NV_CE#1 (16)
NV_CE#2 (16)
NV_CE#3 (16)
NV_DQS0 (16)
NV_DQS1 (16)
NV_DQ0 (16)
NV_DQ1 (16)
NV_DQ2 (16)
NV_DQ3 (16)
NV_DQ4 (16)
NV_DQ5 (16)
NV_DQ6 (16)
NV_DQ7 (16)
NV_DQ8 (16)
NV_DQ9 (16)
NV_DQ10 (16)
NV_DQ11 (16)
NV_DQ12 (16)
NV_DQ13 (16)
NV_DQ14 (16)
NV_DQ15 (16)
NV_ALE (9,16)
NV_CLE (9,16)
R316 *32.4/F_4R316 *32.4/F_4
NV_R_B# (16)
NV_RE#_WR#0 (16)
NV_RE#_WR#1 (16)
NV_WE#_CK0 (16)
NV_WE#_CK1 (16)
Port1 and port9 can be used on debug mode
USBP0- (33)
USBP0+ (33)
USBP1- (34)
USBP1+ (34)
USBP2- (36)
USBP2+ (36)
USBP3- (34)
USBP3+ (34)
USBP4- (36)
USBP4+ (36)
USBP5- (34)
USBP5+ (34)
TP32TP32
TP33TP33
TP31TP31
TP30TP30
USBP8- (25)
USBP8+ (25)
USBP9- (34)
USBP9+ (34)
USBP10- (32)
USBP10+ (32)
USBP11- (34)
USBP11+ (34)
USBP12- (34)
USBP12+ (34)
USBP13- (32)
USBP13+ (32)
R664
R664
R379 0_4R379 0_4
R380 0_4R380 0_4
R376 0_4R376 0_4
R375 0_4R375 0_4
Express Card
M/B USB
Finger Printer
EXT-USB2
BLUETOOTH
Touch Screen
USB port6/7 may not be available on all PCH sku
(HM55 support 12port only)
Camera
ESATA USB
Mini Card (WWAN)
EXT-USB1-1
EXT-USB1-2
Mini Card (WLAN)
22.6/F_4
22.6/F_4
OC0_10#
OC0_10# (34)
OC6# (34)
OC11_12# (34)
EHCI1
EHCI2
MiniWLAN
Mini TV
Express Card
JMB380
Mini TV
JMB380
MiniWLAN
Express Card
PCIE_RX1-(32)
PCIE_RX1+(32)
PCIE_TX1-(32)
PCIE_TX1+(32)
PCIE_RX2-(32)
PCIE_RX2+(32)
PCIE_TX2-(32)
PCIE_TX2+(32)
PCIE_RX4-(33)
PCIE_RX4+(33)
PCIE_TX4-(33)
PCIE_TX4+(33)
PCIE_RX8-(27)
PCIE_RX8+(27)
PCIE_TX8-(27)
PCIE_TX8+(27)
PCIE_RX6-(28)
PCIE_RX6+(28)
LAN
PCIE_TX6-(28)
PCIE_TX6+(28)
Note:
PCIE port7/8 may not be available on all PCH sku
(HM55 support 6port only)
CLK_PCH_SRC1#(32)
CLK_PCH_SRC1(32)
CLK_PCH_SRC2#(27)
CLK_PCH_SRC2(27)
CLK_PCH_SRC3#(32)
CLK_PCH_SRC3(32)
CLK_PCH_SRC4#(33)
CLK_PCH_SRC4(33)
CLK_PCIE_REQ4#(33)
CLK_PCIE_LOM#(28)
LAN
CLK_PCIE_LOM(28)
CLK_PCIE_LAN_REQ#(28)
C513 .1u_4C513 .1u_4
C511 .1u_4C511 .1u_4
C517 .1u_4C517 .1u_4
C516 .1u_4C516 .1u_4
C496 .1u_4C496 .1u_4
C497 .1u_4C497 .1u_4
C503 .1u_4C503 .1u_4
C505 .1u_4C505 .1u_4
C487 .1u_4C487 .1u_4
C490 .1u_4C490 .1u_4
IBEX PEAK-M (PCI-E,SMBUS,CLK)
U53B
U53B
BG30
PERN1
BJ30
PCIE_TXN1_C
PCIE_TXP1_C
PCIE_TXN2_C
PCIE_TXP2_C
T40T40
T39T39
T37T37
T38T38
PCIE_TXN4_C
PCIE_TXP4_C
PCIE_TXN8_C
PCIE_TXP8_C
PCIE_TXN6_C
PCIE_TXP6_C
CLK_PCIE_REQ0#
CLK_PCIE_REQ1#_R
CLK_PCIE_REQ2#
CLK_PCIE_REQ3#
CLK_PCIE_REQ4#
CLK_PCIE_REQ5#
CLK_PCIE_LAN_REQ#
PERP1
BF29
PETN1
BH29
PETP1
AW30
PERN2
BA30
PERP2
BC30
PETN2
BD30
PETP2
AU30
PERN3
AT30
PERP3
AU32
PETN3
AV32
PETP3
BA32
PERN4
BB32
PERP4
BD32
PETN4
BE32
PETP4
BF33
PERN5
BH33
PERP5
BG32
PETN5
BJ32
PETP5
BA34
PERN6
AW34
PERP6
BC34
PETN6
BD34
PETP6
AT34
PERN7
AU34
PERP7
AU36
PETN7
AV36
PETP7
BG34
PERN8
BJ34
PERP8
BG36
PETN8
BJ36
PETP8
AK48
CLKOUT_PCIE0N
AK47
CLKOUT_PCIE0P
P9
PCIECLKRQ0# / GPIO73
AM43
CLKOUT_PCIE1N
AM45
CLKOUT_PCIE1P
U4
PCIECLKRQ1# / GPIO18
AM47
CLKOUT_PCIE2N
AM48
CLKOUT_PCIE2P
N4
PCIECLKRQ2# / GPIO20
AH42
CLKOUT_PCIE3N
AH41
CLKOUT_PCIE3P
A8
PCIECLKRQ3# / GPIO25
AM51
CLKOUT_PCIE4N
AM53
CLKOUT_PCIE4P
M9
PCIECLKRQ4# / GPIO26
AJ50
CLKOUT_PCIE5N
AJ52
CLKOUT_PCIE5P
H6
PCIECLKRQ5# / GPIO44
AK53
CLKOUT_PEG_B_N
AK51
CLKOUT_PEG_B_P
P13
PEG_B_CLKRQ# / GPIO56
IbexPeak-M_R1P0
IbexPeak-M_R1P0
SML0ALERT# / GPIO60
SML1ALERT# / GPIO74
SMBus
SMBus
PCI-E*
PCI-E*
Link
Link
Controller
Controller
PEG_A_CLKRQ# / GPIO47
PEG
PEG
CLKOUT_DP_N / CLKOUT_BCLK1_N
CLKOUT_DP_P / CLKOUT_BCLK1_P
From CLK BUFFER
From CLK BUFFER
CLKIN_SATA_N / CKSSCD_N
CLKIN_SATA_P / CKSSCD_P
CLKOUTFLEX0 / GPIO64
CLKOUTFLEX1 / GPIO65
CLKOUTFLEX2 / GPIO66
CLKOUTFLEX3 / GPIO67
Clock Flex
Clock Flex
SMBALERT# / GPIO11
SMBCLK
SMBDATA
SML0CLK
SML0DATA
SML1CLK / GPIO58
SML1DATA / GPIO75
CL_CLK1
CL_DATA1
CL_RST1#
CLKOUT_PEG_A_N
CLKOUT_PEG_A_P
CLKOUT_DMI_N
CLKOUT_DMI_P
CLKIN_DMI_N
CLKIN_DMI_P
CLKIN_BCLK_N
CLKIN_BCLK_P
CLKIN_DOT_96N
CLKIN_DOT_96P
REFCLK14IN
CLKIN_PCILOOPBACK
XTAL25_IN
XTAL25_OUT
XCLK_RCOMP
B9
H14
C8
J14
C6
G8
M14
E10
G12
CL_CLK1
T13
CL_DATA1
T11
CL_RST1#
T9
PEG_CLKREQ#_R
H1
AD43
AD45
AN4
AN2
AT1
AT3
AW24
BA24
AP3
AP1
F18
E18
AH13
AH12
P41
J42
AH51
AH53
XCLK_RCOMP
AF38
CLK_FLEX0
T45
CLK_FLEX1
P43
CLK_FLEX2
T42
N50
RSV_SMBALERT#
ICH_SMBCLK
ICH_SMBDATA
RSV_SML0ALERT#
SMB_CLK_ME0
SMB_DATA_ME0
RSV_SML1ALERT#
SMB_CLK_ME1
SMB_DATA_ME1
CLK_PCI_FB
XTAL25_IN
XTAL25_OUT
R275 90.9/F_4R275 90.9/F_4
R582 10K_4R582 10K_4
ICH_SMBCLK (3,16,33)
ICH_SMBDATA (3,16,33)
For LAN
R324 *0_4R324 *0_4
SML1ALERT# (11,36,37)
For EC
CL_CLK1 (32)
CL_DATA1 (32)
CL_RST1# (32)
R694 *0_4R694 *0_4
T34T34
No stuff XTAL25_IN and XTAL25_OUT circuitry
until integrated CG becomes PCH POR.
T35T35
T36T36
May be remove is OK
PEG_CLKREQ# (18)
PEG_A_CLKRQ# PD for FreeRun, due GPU not support.
CLK_PCIE_VGA# (17)
CLK_PCIE_VGA (17)
CLK_PCIE_3GPLL# (4)
CLK_PCIE_3GPLL (4)
DPLL_REF_SSCLK# (4)
DPLL_REF_SSCLK (4)
CLK_BUF_PCIE_3GPLL# (3)
CLK_BUF_PCIE_3GPLL (3)
CLK_BUF_BCLK# (3)
CLK_BUF_BCLK (3)
CLK_BUF_DREFCLK# (3)
CLK_BUF_DREFCLK (3)
CLK_BUF_DREFSSCLK# (3)
CLK_BUF_DREFSSCLK (3)
CLK_ICH_14M (3)
dGPU_EDIDSEL# (25,26)
+3V
+1.05V
Correct DPLL_REF_SSCLK/
DPLL_REF_SSCLK# at B-test
C813 *18P_4C813 *18P_4
21
R592
R592
*1M_4
*1M_4
C812 *18P_4C812 *18P_4
Y6
*25MHzY6*25MHz
PLTRST#
Add Buffers as needed for
+3V_S5
Loading and fanout concerns.
C560
C560
.1u_4
.1u_4
PCI_PLTRST#
2
4
A A
1
U29
U29
3 5
TC7SH08FU
TC7SH08FU
R353
R353
100K_4
100K_4
5
PLTRST# (4,11,27,28,32,33,37)
PCI/USBOC# Pull-up CLK_REQ/Strap Pin SMBus/Pull-up
+3V_S5
+3V
+3V
R333 10K_4R333 10K_4
R677 10K_4R677 10K_4
R366 10K_4R366 10K_4
R338 10K_4R338 10K_4
R709 10K_4R709 10K_4
R693 *10K_4R693 *10K_4
R700 10K_4R700 10K_4
R604 10K_4R604 10K_4
R605 8.2K_4R605 8.2K_4
R583 8.2K_4R583 8.2K_4
R614 8.2K_4R614 8.2K_4
R342 10K_4R342 10K_4
R695 10K_4R695 10K_4
CLK_PCIE_REQ0#
CLK_PCIE_REQ3#
CLK_PCIE_REQ4#
CLK_PCIE_REQ5#
CLK_PCIE_LAN_REQ#
PEG_CLKREQ#_R
CLK_PCIE_REQ1#_R
dGPU_SELECT#
PCI_PIRQE#
PCI_PIRQF#
PCI_PIRQG#
CLK_PCIE_REQ2#
PEG_CLKREQ#_R
3
USB_OC7#
USB_OC6#
USB_OC5#
USB_OC4#
+3V_S5
PCI_REQ0#
PCI_PIRQB#
PCI_REQ3#
PCI_PIRQD#
+3V
PCI_PLOCK#
PCI_SERR#
PCI_DEVSEL#
PCI_STOP#
+3V
6
7
8
9
10
6
7
8
9
10
6
7
8
9
10
RP9
RP9
8.2K_10P8R
8.2K_10P8R
RP8
RP8
8.2K_10P8R
8.2K_10P8R
RP2
RP2
8.2K_10P8R
8.2K_10P8R
4
5
4
3
2
1
5
4
3
2
1
5
4
3
2
1
USB_OC0#
OC6#
USB_OC2#
USB_OC3#
PCI_PIRQH#
PCI_TRDY#
PCI_FRAME#
PCI_REQ1#
PCI_PERR#
PCI_PIRQC#
PCI_IRDY#
PCI_PIRQA#
+3V_S5
+3V
+3V
PEG_A_CLKRQ# PD for FreeRun, due GPU not support.
A16 swap override Strap/Top-Block
Swap Override jumper
Low = A16 swap
override/Top-Block
PCI_GNT3#
Swap Override enabled
High = Default
Boot BIOS Strap
GNT0# GNT1#
0
0
1
1
Danbury Technology Enabled
NV_ALE
DMI Termination Voltage
NV_CLE
Boot BIOS Location
0
LPC
1
Reserved (NAND)
PCI
0
SPI
1
High = Enable
Low = Disable
Set to Vcc when LOW
Set to Vcc/2 when HIGH
+3V_S5
2
R673 10K_4R673 10K_4
R367 10K_4R367 10K_4
R322 10K_4R322 10K_4
R318 2.2K_4R318 2.2K_4
R678 2.2K_4R678 2.2K_4
R687 2.2K_4R687 2.2K_4
R339 2.2K_4R339 2.2K_4
RSV_SMBALERT#
RSV_SML0ALERT#
RSV_SML1ALERT#
ICH_SMBCLK
ICH_SMBDATA
SMB_CLK_ME0
SMB_DATA_ME0
+3V_S5
R341
R341
2
2.2K_4
2.2K_4
Q292N7002K Q292N7002K
SMB_CLK_ME1
3
2ND_MBCLK(37)
2ND_MBDATA(37)
1
+3V_S5
2
Q28
Q28
2N7002K
2N7002K
1
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
IBEX PEAK-M 3/6
IBEX PEAK-M 3/6
IBEX PEAK-M 3/6
Date: Sheet
Date: Sheet
Date: Sheet
exchange pin1 and pin3
of Q28/Q29 to fix leakage
R336
R336
2.2K_4
2.2K_4
SMB_DATA_ME1
3
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
1
ZY9B
ZY9B
ZY9B
1A
1A
10 49Thursday, September 17, 2009
10 49Thursday, September 17, 2009
10 49Thursday, September 17, 2009
1A
of
of
of
http://laptop-motherboard-schematic.blogspot.com/
5
BMBUSY#
SIO_EXT_SMI#(37)
D D
dGPU_PWR_EN# should be stable
before dGPU_VRON enable
C C
EC suggestion use GPIO49 for FAN control
B B
change board_id0 to GPIO7 at 6/1
GPIO24 NC for Intel suggestion at 6/1
SML1ALERT#(10,36,37)
SATA5GP / GPIO49 / TEMP_ALERT# is used to
alert for EC when CPU or Graph/Memory
controllers' temperature go out of limit.
So connecting GPIO49 to EC and avoid this
pin to be used for other purpose
SIO_EXT_SCI#(37)
RSV_GPIO8(9)
TP42TP42
CR_WAKE#(9,27)
dGPU_PWROK(22)
TP37TP37
TP34TP34
dGPU_VRON(22,44)
dGPU_PWR_EN#(39)
SAVE_LED#(34)
RST_GATE#(16)
R710 0_4R710 0_4
SIO_EXT_SMI#
SIO_EXT_SCI#
BOARD_ID0
RSV_GPIO8
LAN_DISABLE#
CR_WAKE#
dGPU_HOLD_RST#
GPIO22
GPIO27
TP_PCH_GPIO28
STP_PCI#
dGPU_PWR_EN#
dGPU_PRSNT#
GPIO38
SAVE_LED#
GPIO45
SV_SET_UP
SATA5GP
GPIO57
4
IBEX PEAK-M (GPIO,VSS_NCTF,RSVD)
U53F
U53F
Y3
BMBUSY# / GPIO0
C38
TACH1 / GPIO1
D37
TACH2 / GPIO6
J32
TACH3 / GPIO7
F10
GPIO8
K9
LAN_PHY_PWR_CTRL / GPIO12
T7
GPIO15
AA2
SATA4GP / GPIO16
F38
TACH0 / GPIO17
Y7
SCLOCK / GPIO22
H10
GPIO24
AB12
GPIO27
V13
GPIO28
M11
STP_PCI# / GPIO34
V6
SATACLKREQ# / GPIO35
AB7
SATA2GP / GPIO36
AB13
SATA3GP / GPIO37
V3
SLOAD / GPIO38
P3
SDATAOUT0 / GPIO39
H3
PCIECLKRQ6# / GPIO45
F1
PCIECLKRQ7# / GPIO46
AB6
SDATAOUT1 / GPIO48
AA4
SATA5GP / GPIO49
F8
GPIO57
A4
VSS_NCTF_1
A49
VSS_NCTF_2
A5
VSS_NCTF_3
A50
VSS_NCTF_4
A52
VSS_NCTF_5
A53
VSS_NCTF_6
B2
VSS_NCTF_7
B4
VSS_NCTF_8
B52
VSS_NCTF_9
B53
VSS_NCTF_10
BE1
VSS_NCTF_11
BE53
VSS_NCTF_12
BF1
VSS_NCTF_13
BF53
VSS_NCTF_14
BH1
VSS_NCTF_15
BH2
VSS_NCTF_16
BH52
VSS_NCTF_17
BH53
VSS_NCTF_18
BJ1
VSS_NCTF_19
BJ2
VSS_NCTF_20
BJ4
VSS_NCTF_21
BJ49
VSS_NCTF_22
BJ5
VSS_NCTF_23
BJ50
VSS_NCTF_24
BJ52
VSS_NCTF_25
BJ53
VSS_NCTF_26
D1
VSS_NCTF_27
D2
VSS_NCTF_28
D53
VSS_NCTF_29
E1
VSS_NCTF_30
E53
VSS_NCTF_31
IbexPeak-M_R1P0
IbexPeak-M_R1P0
MISC
MISC
CLKOUT_BCLK0_N / CLKOUT_PCIE8N
CLKOUT_BCLK0_P / CLKOUT_PCIE8P
GPIO
GPIO
CPU
CPU
NCTF
NCTF
RSVD
RSVD
CLKOUT_PCIE6N
CLKOUT_PCIE6P
CLKOUT_PCIE7N
CLKOUT_PCIE7P
A20GATE
PECI
RCIN#
PROCPWRGD
THRMTRIP#
TP1
TP2
TP3
TP4
TP5
TP6
TP7
TP8
TP9
TP10
TP11
TP12
TP13
TP14
TP15
TP16
TP17
TP18
TP19
NC_1
NC_2
NC_3
NC_4
NC_5
INIT3_3V#
TP24
AH45
AH46
AF48
AF47
U2
AM3
AM1
BG10
T1
BE10
BD10
BA22
AW22
BB22
AY45
AY46
AV43
AV45
AF13
M18
N18
AJ24
AK41
AK42
M32
N32
M30
N30
H12
AA23
AB45
AB38
AB42
AB41
T39
P6
C10
3
TP_PCH_PCIE6N
TP_PCH_PCIE6P
TP_PCH_PCIE7N
TP_PCH_PCIE7P
PCH_THRMTRIP#_R
TP1_PCH
TP2_PCH
TP_INT3_3V
TP19TP19
TP17TP17
TP13TP13
TP15TP15
R306 56/F_4R306 56/F_4
TP29TP29
TP28TP28
TP39TP39
SIO_A20GATE (37)
CLK_CPU_BCLK# (4)
CLK_CPU_BCLK (4)
H_PECI (4)
SIO_RCIN# (37)
H_PWRGOOD (4,16)
R310 56/F_4R310 56/F_4
2
PM_THRMTRIP# (4)
+1.1V_VTT
1
GPU RST#
+3V
C565 *.1u_4C565 *.1u_4
53
1
GPU_RST_OP#(18)
4
2
U32
U32
TC7SH08FU
TC7SH08FU
PLTRST# (4,10,27,28,32,33,37)
dGPU_HOLD_RST#
R374
R374
100K_4
100K_4
GPIO Pull-up/Pull-down
TP_PCH_GPIO28
GPIO45
RST_GATE#
GPIO57
LAN_DISABLE#
SIO_EXT_SMI#
SIO_EXT_SCI#
dGPU_PWR_EN#
SIO_RCIN#
SIO_A20GATE
dGPU_HOLD_RST#
SATA5GP
GPIO22
dGPU_PRSNT#
SAVE_LED#
STP_PCI#
GPIO38
BMBUSY#
SV_SET_UP
SV_SET_UP 1-X High = Strong (Default)
GPIO57 stuff PD and not stuff PU for Intel suggestion at 6/1
GPIO57
R282 *10K_4R282 *10K_4
+3V_S5
R331 10K_4R331 10K_4
R688 10K_4R688 10K_4
R686 10K_4R686 10K_4
R337 *10K_4R337 *10K_4
R346 10K_4R346 10K_4
R608 10K_4R608 10K_4
R611 10K_4R611 10K_4
R328 10K_4R328 10K_4
R701 10K_4R701 10K_4
R704 10K_4R704 10K_4
R712 *10K_4R712 *10K_4
R711 10K_4R711 10K_4
R349 10K_4R349 10K_4
R327 *10K_4R327 *10K_4
R356 10K_4R356 10K_4
R365 10K_4R365 10K_4
R715 10K_4R715 10K_4
R714 8.2K_4R714 8.2K_4
R348 10K_4R348 10K_4
R314 10K_4R314 10K_4
BOARD_ID0
dGPU_PRSNT#
dGPU always exist
remove GPIO7 PU at 6/1
R281 10K_4R281 10K_4
R325 10K_4R325 10K_4
+3V_S5
+3V
+3V
Integrated Clock Chip Enable
BOARD_ID0
A A
RSV_GPIO8
High = Discrete
Low = SW
High = Disable
Low = Enable
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
IBEX PEAK-M 4/6
IBEX PEAK-M 4/6
5
http://laptop-motherboard-schematic.blogspot.com/
4
3
2
IBEX PEAK-M 4/6
Date: Sheet
Date: Sheet
Date: Sheet
PROJECT :
ZY9B
ZY9B
ZY9B
1A
1A
11 49Tuesday, September 22, 2009
11 49Tuesday, September 22, 2009
11 49Tuesday, September 22, 2009
1
1A
of
of
of
IBEX PEAK-M (POWER)
VCCCORE(+1.05V) = 1.432A(80mils)
D D
40mA(15mils)
C C
VRM enable by strap pin GPIO27
which supply clean 1.05V for
[VCCACLK,VCCAPLLEXP,VCCFDIPLL,VCCSATAPLL]
B B
+1.05V
A A
5
+1.05V
+1.05V
+1.05V
37mA(15mils)
L55 10uh_8L55 10uh_8
L59 10uh_8L59 10uh_8
L40 *1uH_6L40 *1uH_6
+1.05V_VCCCORE_ICH
R601 0_8R601 0_8
R600 0_8R600 0_8
R285 0_6R285 0_6
L39 *1uH_6L39 *1uH_6
VCCIO = 3.062A(150mils)
+1.05V
VCCVRM=196mA(15mils)
+1.8V
C808
C808
220u_3528
220u_3528
+1.05V_VCCCORE_ICH
+1.05V_PCH_VCCDPLL_EXP
C520 *10u/6.3V_6C520 *10u/6.3V_6
C854 1u/10V_4C854 1u/10V_4
C508 1u/10V_4C508 1u/10V_4
C507 1u/10V_4C507 1u/10V_4
C515 1u/10V_4C515 1u/10V_4
C821 10u/6.3V_6C821 10u/6.3V_6
+V1.1LAN_VCCAPLL_FDI
C533
C533
*10u/6.3V_6
*10u/6.3V_6
R297 0_6R297 0_6
+V1.1LAN_VCCA_A_DPL
+
+
C819
C819
1u/10V_4
1u/10V_4
+V1.1LAN_VCCA_B_DPL
+
+
C811
C811
C818
C818
220u_3528
220u_3528
1u/10V_4
1u/10V_4
C510 1u/10V_4C510 1u/10V_4
C828 10u/6.3V_6C828 10u/6.3V_6
+V1.1LAN_VCCAPLL_EXP
+3V
+V1.5S_1.8S
+1.05V
C519
C519
.1u/16V_4
.1u/16V_4
C525
C525
.1u/16V_4
.1u/16V_4
U53G
U53G
AB24
AB26
AB28
AD26
AD28
AF26
AF28
AF30
AF31
AH26
AH28
AH30
AH31
AJ30
AJ31
AK24
BJ24
AN20
AN22
AN23
AN24
AN26
AN28
BJ26
BJ28
AT26
AT28
AU26
AU28
AV26
AV28
AW26
AW28
BA26
BA28
BB26
BB28
BC26
BC28
BD26
BD28
BE26
BE28
BG26
BG28
BH27
AN30
AN31
AN35
AT22
BJ18
AM23
IbexPeak-M_R1P0
IbexPeak-M_R1P0
+V1.5S_1.8S
VCCCORE[1]
VCCCORE[2]
VCCCORE[3]
VCCCORE[4]
VCCCORE[5]
VCCCORE[6]
VCCCORE[7]
VCCCORE[8]
VCCCORE[9]
VCCCORE[10]
VCCCORE[11]
VCCCORE[12]
VCCCORE[13]
VCCCORE[14]
VCCCORE[15]
VCCIO[24]
VCCAPLLEXP
VCCIO[25]
VCCIO[26]
VCCIO[27]
VCCIO[28]
VCCIO[29]
VCCIO[30]
VCCIO[31]
VCCIO[32]
VCCIO[33]
VCCIO[34]
VCCIO[35]
VCCIO[36]
VCCIO[37]
VCCIO[38]
VCCIO[39]
VCCIO[40]
VCCIO[41]
VCCIO[42]
VCCIO[43]
VCCIO[44]
VCCIO[45]
VCCIO[46]
VCCIO[47]
VCCIO[48]
VCCIO[49]
VCCIO[50]
VCCIO[51]
VCCIO[52]
VCCIO[53]
VCCIO[54]
VCCIO[55]
VCC3_3[1]
VCCVRM[1]
VCCFDIPLL
VCCIO[1]
4
POWER
POWER
VCC CORE
VCC CORE
PCI E*
PCI E*
FDI
FDI
HDA_SYNC (PCH strap pin)
Internal weak pull-down
VCCVRM=>+1.8V (default)
external pull-up
VCCVRM=>+1.5V
VCCADAC[1]
VCCADAC[2]
VSSA_DAC[1]
CRTLVDS
CRTLVDS
VSSA_DAC[2]
VCCALVDS
VSSA_LVDS
VCCTX_LVDS[1]
VCCTX_LVDS[2]
VCCTX_LVDS[3]
VCCTX_LVDS[4]
VCC3_3[2]
VCC3_3[3]
VCC3_3[4]
HVCMOS
HVCMOS
VCCVRM[2]
VCCDMI[1]
DMI
DMI
VCCDMI[2]
VCCPNAND[1]
VCCPNAND[2]
VCCPNAND[3]
VCCPNAND[4]
VCCPNAND[5]
VCCPNAND[6]
VCCPNAND[7]
VCCPNAND[8]
VCCPNAND[9]
VCCME3_3[1]
NAND / SPI
NAND / SPI
VCCME3_3[2]
VCCME3_3[3]
VCCME3_3[4]
+VCCA_DAC_1_2
AE50
AE52
AF53
AF51
AH38
AH39
VCCTX_LVDS
AP43
AP45
AT46
AT45
*A@.01u/16V_4
*A@.01u/16V_4
AB34
AB35
+3V_VCC_GIO
AD35
VCCVRM= 196mA(15mils)
+VCCVRM
AT24
+VCCDM
AT16
AU16
AM16
AK16
AK20
VCCPNAND
AK19
AK15
AK13
AM12
AM13
AM15
AM8
+3V_VCCME_SPI
AM9
AP11
AP9
VCCADAC= 69mA(15mils)
L37
L37
C470
C470
C469
C469
.01u/16V_4
.01u/16V_4
10u/6.3V_6
10u/6.3V_6
VCCALVDS= 1mA
R260 *A@0_4R260 *A@0_4
R262
R262
C484
C484
EV@0_4
EV@0_4
*A@.1u/16V_4
*A@.1u/16V_4
C483
C483
C488
C488
*A@.1u/16V_4
*A@.1u/16V_4
*A@10u/6.3V_6
*A@10u/6.3V_6
VCC3_3 = 357mA(30mils)
R247 0_6R247 0_6
C501
C501
.1u/16V_4
.1u/16V_4
R287 0_6R287 0_6
C536
C536
1u/10V_4
1u/10V_4
VCCPNAND= 156mA(15mils)
R317 0_8R317 0_8
C528
C528
.1u/16V_4
.1u/16V_4
VCCME3_3= 85mA(15mils)
C539
C539
.1u/16V_4
.1u/16V_4
R311 0_4R311 0_4
R312 *0_4R312 *0_4
R307 0_6R307 0_6
+V1.5S_1.8S
BKP1608HS181T_6_1.5A
BKP1608HS181T_6_1.5A
C473
C473
.1u/16V_4
.1u/16V_4
+3V
L30
L30
*A@.1uh_8
+1.8V
+3V
+3V
+1.1V_VTT
+1.05V
*A@.1uh_8
R277
R277
EV@0_4
EV@0_4
C485
C485
3
+3V
VCCLAN = 320mA(30mils)
VCCTX_LVDS= 59mA(15mils)
+1.8V
VCCME(+1.05V) = 1.849A(100mils)
+1.05V
VCCDMI= 61mA(15mils)
VCCSUS3_3 = 163mA(20mils)
VCC3_3 = 0.357A(30mils)
V_CPU_IO >1mA(15mils)
VCCRTC= 2mA(15mils)
VCCACLK= 52mA(15mils)
+1.05V
R241 0_8R241 0_8
R240 0_8R240 0_8
+1.05V
R284 0_6R284 0_6
L58 *10uh_8L58 *10uh_8
C815 *10u/6.3V_6C815 *10u/6.3V_6
C817 *1u/6.3V_4C817 *1u/6.3V_4
C518
C518
1u/10V_4
1u/10V_4
C463 22u_8C463 22u_8
C460 22u_8C460 22u_8
C498 1u/10V_4C498 1u/10V_4
C504 1u/10V_4C504 1u/10V_4
+V1.5S_1.8S
68mA(15mils)
69mA(15mils)
+3V_S5
+1.1V_VTT
+1.05V
+3V
+VCCRTC
C538 .1u/16V_4C538 .1u/16V_4
C521 .1u/16V_4C521 .1u/16V_4
R381 0_6R381 0_6
R382 0_6R382 0_6
R305 0_6R305 0_6
VCCIO = 3.062A(150mils)
+V1.1LAN_VCCA_CLK
TP_PCH_VCCDSW
C524
C524
.1u/16V_4
.1u/16V_4
+1.05V_VCCEPW
C546 .1u/16V_4C546 .1u/16V_4
+V1.1LAN_VCCA_A_DPL
+V1.1LAN_VCCA_B_DPL
C500 1u/10V_4C500 1u/10V_4
C506 1u/10V_4C506 1u/10V_4
C522 1u/10V_4C522 1u/10V_4
+VCCSST
+V1.1LAN_INT_VCCSUS
+3V_S5_VCCPSUS
+3V_VCCPCORE
+VTT_VCCPCPU
C545 4.7u/10V_8C545 4.7u/10V_8
C530 .1u/16V_4C530 .1u/16V_4
C544 .1u/16V_4C544 .1u/16V_4
C886
C886
.1u/16V_4
.1u/16V_4
+VCCRTCEXT
.1u/16V_4C529 .1u/16V_4C529
C532
C532
.1u/16V_4
.1u/16V_4
2
AP51
AP53
AF23
AF24
Y20
AD38
AD39
AD41
AF43
AF41
AF42
V39
V41
V42
Y39
Y41
Y42
V9
AU24
BB51
BB53
BD51
BD53
AH23
AJ35
AH35
AF34
AH34
AF32
V12
Y22
P18
U19
U20
U22
V15
V16
Y16
AT18
AU18
A12
C889
C889
.1u/16V_4
.1u/16V_4
U53J
U53J
VCCACLK[1]
VCCACLK[2]
VCCLAN[1]
VCCLAN[2]
DCPSUSBYP
VCCME[1]
VCCME[2]
VCCME[3]
VCCME[4]
VCCME[5]
VCCME[6]
VCCME[7]
VCCME[8]
VCCME[9]
VCCME[10]
VCCME[11]
VCCME[12]
DCPRTC
VCCVRM[3]
VCCADPLLA[1]
VCCADPLLA[2]
VCCADPLLB[1]
VCCADPLLB[2]
VCCIO[21]
VCCIO[22]
VCCIO[23]
VCCIO[2]
VCCIO[3]
VCCIO[4]
DCPSST
DCPSUS
VCCSUS3_3[29]
VCCSUS3_3[30]
VCCSUS3_3[31]
VCCSUS3_3[32]
VCC3_3[5]
VCC3_3[6]
VCC3_3[7]
V_CPU_IO[1]
V_CPU_IO[2]
VCCRTC
IbexPeak-M_R1P0
IbexPeak-M_R1P0
POWER
POWER
VCCSUS3_3[10]
VCCSUS3_3[11]
VCCSUS3_3[12]
VCCSUS3_3[13]
USB
USB
VCCSUS3_3[14]
VCCSUS3_3[15]
VCCSUS3_3[16]
VCCSUS3_3[17]
VCCSUS3_3[18]
VCCSUS3_3[19]
VCCSUS3_3[20]
VCCSUS3_3[21]
VCCSUS3_3[22]
VCCSUS3_3[23]
VCCSUS3_3[24]
VCCSUS3_3[25]
VCCSUS3_3[26]
VCCSUS3_3[27]
VCCSUS3_3[28]
Clock and Miscellaneous
Clock and Miscellaneous
PCI/GPIO/LPC
PCI/GPIO/LPC
VCCSATAPLL[1]
VCCSATAPLL[2]
SATA
SATA
PCI/GPIO/LPC
PCI/GPIO/LPC
CPU
CPU
RTC
RTC
HDA
HDA
VCCIO[5]
VCCIO[6]
VCCIO[7]
VCCIO[8]
VCCSUS3_3[1]
VCCSUS3_3[2]
VCCSUS3_3[3]
VCCSUS3_3[4]
VCCSUS3_3[5]
VCCSUS3_3[6]
VCCSUS3_3[7]
VCCSUS3_3[8]
VCCSUS3_3[9]
VCCIO[56]
V5REF_SUS
V5REF
VCC3_3[8]
VCC3_3[9]
VCC3_3[10]
VCC3_3[11]
VCC3_3[12]
VCC3_3[13]
VCC3_3[14]
VCCIO[9]
VCCVRM[4]
VCCIO[10]
VCCIO[11]
VCCIO[12]
VCCIO[13]
VCCIO[14]
VCCIO[15]
VCCIO[16]
VCCIO[17]
VCCIO[18]
VCCIO[19]
VCCIO[20]
VCCME[13]
VCCME[14]
VCCME[15]
VCCME[16]
VCCSUSHDA
V24
V26
Y24
Y26
V28
U28
U26
U24
P28
P26
N28
N26
M28
M26
L28
L26
J28
J26
H28
H26
G28
G26
F28
F26
E28
E26
C28
C26
B27
A28
A26
U23
V23
F24
K49
J38
L38
M36
N36
P36
U35
AD13
AK3
AK1
AH22
AT20
AH19
AD20
AF22
AD19
AF20
AF19
AH20
AB19
AB20
AB22
AD22
AA34
Y34
Y35
AA35
L30
C514 1u/10V_4C514 1u/10V_4
+3V_S5_VCCPUSB+1.05V_VCCAUX
C869
C869
.022u_4
.022u_4
+1.05V
C471
C471
1u/16V_6
1u/16V_6
C486
C486
1u/16V_6
1u/16V_6
+3V_VCCPPCI
C502
C502
.1u/16V_4
.1u/16V_4
C499
C499
.1u/16V_4
.1u/16V_4
C914
C914
*1u/6.3V_4
*1u/6.3V_4
+V1.5S_1.8S
+1.05V_VCCEPW
+V3.3A_1.5A_HDA_IO
C489
C489
1u/10V_4
1u/10V_4
1
VCCIO = 3.062A(150mils)
+V1.1LAN_VCCAPLL
C915
C915
*10u/6.3V_6
*10u/6.3V_6
+1.05V
VCCSUS3_3 = 0.163A(20mils)
R640 0_6R640 0_6
C512
C512
C870
C870
.1u/16V_4
.1u/16V_4
.1u/16V_4
.1u/16V_4
R257 100/F_4R257 100/F_4
D21 RB500V-40D21 RB500V-40
R255 100/F_4R255 100/F_4
D20 RB500V-40D20 RB500V-40
R278 0_6R278 0_6
+3V
VCC3_3 = 0.357A(30mils)
+3V+1.05V
31mA(15mils)
L72 *10uh_8L72 *10uh_8
VCCIO = 3.062A(150mils)
C526
C526
1u/10V_4
1u/10V_4
VCCME = 1.849A(100mils)
R266 0_4R266 0_4
VCCSUSHDA= 6mA(15mils)
+3V_S5
V5REF_SUS< 1mA
+5V_S5
+3V_S5
V5REF< 1mA
+5V
+3V
+1.05V
+3V_S5
+1.05V
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
IBEX PEAK-M 5/6
IBEX PEAK-M 5/6
IBEX PEAK-M 5/6
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
PROJECT :
1
ZY9B
ZY9B
ZY9B
12 49Tuesday, September 15, 2009
12 49Tuesday, September 15, 2009
12 49Tuesday, September 15, 2009
1A
1A
1A
of
of
of
http://laptop-motherboard-schematic.blogspot.com/
5
IBEX PEAK-M (GND)
D D
U53H
U53H
AB16
VSS[0]
AA19
VSS[1]
AA20
VSS[2]
AA22
VSS[3]
AM19
VSS[4]
AA24
VSS[5]
AA26
VSS[6]
AA28
VSS[7]
AA30
VSS[8]
AA31
VSS[9]
AA32
VSS[10]
AB11
VSS[11]
AB15
VSS[12]
AB23
VSS[13]
AB30
VSS[14]
AB31
VSS[15]
AB32
VSS[16]
AB39
VSS[17]
AB43
VSS[18]
AB47
AC52
AD11
AD12
AD16
AD23
AD30
AD31
AD32
AD34
AU22
AD42
AD46
AD49
AF12
AH49
AF35
AP13
AN34
AF45
AF46
AF49
AG52
AH11
AH15
AH16
AH24
AH32
AV18
AH43
AH47
AJ19
AJ20
AJ22
AJ23
AJ26
AJ28
AJ32
AJ34
AK12
AM41
AN19
AK26
AK22
AK23
AK28
AB5
AB8
AC2
AD7
AE2
AE4
Y13
AU4
AF5
AF8
AG2
AH7
AJ2
AT5
AJ4
VSS[19]
VSS[20]
VSS[21]
VSS[22]
VSS[23]
VSS[24]
VSS[25]
VSS[26]
VSS[27]
VSS[28]
VSS[29]
VSS[30]
VSS[31]
VSS[32]
VSS[33]
VSS[34]
VSS[35]
VSS[36]
VSS[37]
VSS[38]
VSS[39]
VSS[40]
VSS[41]
VSS[42]
VSS[43]
VSS[44]
VSS[45]
VSS[46]
VSS[47]
VSS[48]
VSS[49]
VSS[50]
VSS[51]
VSS[52]
VSS[53]
VSS[54]
VSS[55]
VSS[56]
VSS[57]
VSS[58]
VSS[59]
VSS[60]
VSS[61]
VSS[62]
VSS[63]
VSS[64]
VSS[65]
VSS[66]
VSS[67]
VSS[68]
VSS[69]
VSS[70]
VSS[71]
VSS[72]
VSS[73]
VSS[74]
VSS[75]
VSS[76]
VSS[77]
VSS[78]
VSS[79]
IbexPeak-M_R1P0
IbexPeak-M_R1P0
C C
B B
A A
VSS[80]
VSS[81]
VSS[82]
VSS[83]
VSS[84]
VSS[85]
VSS[86]
VSS[87]
VSS[88]
VSS[89]
VSS[90]
VSS[91]
VSS[92]
VSS[93]
VSS[94]
VSS[95]
VSS[96]
VSS[97]
VSS[98]
VSS[99]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
4
AK30
AK31
AK32
AK34
AK35
AK38
AK43
AK46
AK49
AK5
AK8
AL2
AL52
AM11
BB44
AD24
AM20
AM22
AM24
AM26
AM28
BA42
AM30
AM31
AM32
AM34
AM35
AM38
AM39
AM42
AU20
AM46
AV22
AM49
AM7
AA50
BB10
AN32
AN50
AN52
AP12
AP42
AP46
AP49
AP5
AP8
AR2
AR52
AT11
BA12
AH48
AT32
AT36
AT41
AT47
AT7
AV12
AV16
AV20
AV24
AV30
AV34
AV38
AV42
AV46
AV49
AV5
AV8
AW14
AW18
AW2
BF9
AW32
AW36
AW40
AW52
AY11
AY43
AY47
BG12
BB12
BB16
BB20
BB24
BB30
BB34
BB38
BB42
BB49
BC10
BC14
BC18
BC2
BC22
BC32
BC36
BC40
BC44
BC52
BH9
BD48
BD49
BD5
BE12
BE16
BE20
BE24
BE30
BE34
BE38
BE42
BE46
BE48
BE50
BF49
BF51
BG18
BG24
BG4
BG50
BH11
BH15
BH19
BH23
BH31
BH35
BH39
BH43
BH47
BH7
AF39
3
U53I
U53I
AY7
VSS[159]
B11
VSS[160]
B15
VSS[161]
B19
VSS[162]
B23
VSS[163]
B31
VSS[164]
B35
VSS[165]
B39
VSS[166]
B43
VSS[167]
B47
VSS[168]
B7
VSS[169]
VSS[170]
VSS[171]
VSS[172]
VSS[173]
VSS[174]
VSS[175]
VSS[176]
VSS[177]
VSS[178]
VSS[179]
BB5
VSS[180]
VSS[181]
VSS[182]
VSS[183]
VSS[184]
VSS[185]
VSS[186]
VSS[187]
VSS[188]
VSS[189]
VSS[190]
VSS[191]
VSS[192]
VSS[193]
VSS[194]
VSS[195]
VSS[196]
VSS[197]
VSS[198]
VSS[199]
VSS[200]
VSS[201]
VSS[202]
VSS[203]
VSS[204]
VSS[205]
BE6
VSS[206]
BE8
VSS[207]
BF3
VSS[208]
VSS[209]
VSS[210]
VSS[211]
VSS[212]
VSS[213]
VSS[214]
VSS[215]
VSS[216]
VSS[217]
VSS[218]
VSS[219]
VSS[220]
VSS[221]
VSS[222]
VSS[223]
VSS[224]
C12
VSS[225]
C50
VSS[226]
D51
VSS[227]
E12
VSS[228]
E16
VSS[229]
E20
VSS[230]
E24
VSS[231]
E30
VSS[232]
E34
VSS[233]
E38
VSS[234]
E42
VSS[235]
E46
VSS[236]
E48
VSS[237]
E6
VSS[238]
E8
VSS[239]
F49
VSS[240]
F5
VSS[241]
G10
VSS[242]
G14
VSS[243]
G18
VSS[244]
G2
VSS[245]
G22
VSS[246]
G32
VSS[247]
G36
VSS[248]
G40
VSS[249]
G44
VSS[250]
G52
VSS[251]
VSS[252]
H16
VSS[253]
H20
VSS[254]
H30
VSS[255]
H34
VSS[256]
H38
VSS[257]
H42
VSS[258]
VSS[259]
VSS[260]
VSS[261]
VSS[262]
VSS[263]
VSS[264]
VSS[265]
VSS[266]
VSS[267]
VSS[268]
VSS[269]
VSS[270]
VSS[271]
VSS[272]
VSS[273]
VSS[274]
VSS[275]
VSS[276]
VSS[277]
VSS[278]
VSS[279]
VSS[280]
VSS[281]
VSS[282]
VSS[283]
VSS[284]
VSS[285]
VSS[286]
VSS[287]
VSS[288]
VSS[289]
VSS[290]
VSS[291]
VSS[292]
VSS[293]
VSS[294]
VSS[295]
VSS[296]
VSS[297]
VSS[298]
VSS[299]
VSS[300]
VSS[301]
VSS[302]
VSS[303]
VSS[304]
VSS[305]
VSS[306]
VSS[307]
VSS[308]
VSS[309]
VSS[310]
VSS[311]
VSS[312]
VSS[313]
VSS[314]
VSS[315]
VSS[316]
VSS[317]
VSS[318]
VSS[319]
VSS[320]
VSS[321]
VSS[322]
VSS[323]
VSS[324]
VSS[325]
VSS[326]
VSS[327]
VSS[328]
VSS[329]
VSS[330]
VSS[331]
VSS[332]
VSS[333]
VSS[334]
VSS[335]
VSS[336]
VSS[337]
VSS[338]
VSS[339]
VSS[340]
VSS[341]
VSS[342]
VSS[343]
VSS[344]
VSS[345]
VSS[346]
VSS[347]
VSS[348]
VSS[349]
VSS[350]
VSS[351]
VSS[352]
VSS[353]
VSS[354]
VSS[355]
VSS[356]
VSS[366]
H49
H5
J24
K11
K43
K47
K7
L14
L18
L2
L22
L32
L36
L40
L52
M12
M16
M20
N38
M34
M38
M42
M46
M49
M5
M8
N24
P11
AD15
P22
P30
P32
P34
P42
P45
P47
R2
R52
T12
T41
T46
T49
T5
T8
U30
U31
U32
U34
P38
V11
P16
V19
V20
V22
V30
V31
V32
V34
V35
V38
V43
V45
V46
V47
V49
V5
V7
V8
W2
W52
Y11
Y12
Y15
Y19
Y23
Y28
Y30
Y31
Y32
Y38
Y43
Y46
P49
Y5
Y6
Y8
P24
T43
AD51
AT8
AD47
Y47
AT12
AM6
AT13
AM5
AK45
AK39
AV14
2
1
IbexPeak-M_R1P0
IbexPeak-M_R1P0
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
IBEX PEAK-M 6/6
IBEX PEAK-M 6/6
5
4
3
2
http://laptop-motherboard-schematic.blogspot.com/
IBEX PEAK-M 6/6
Date: Sheet
Date: Sheet
Date: Sheet
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
1
ZY9B
ZY9B
ZY9B
13 49Thursday, June 18, 2009
13 49Thursday, June 18, 2009
13 49Thursday, June 18, 2009
of
of
of
1A
1A
1A
5
M_A_A[15:0](5)
D D
M_A_BS#0(5)
M_A_BS#1(5)
M_A_BS#2(5)
M_A_CS#0(5)
M_A_CS#1(5)
M_A_CLK0(5)
M_A_CLK0#(5)
M_A_CLK1(5)
M_A_CLK1#(5)
M_A_CKE0(5)
M_A_CKE1(5)
M_A_CAS#(5)
M_A_RAS#(5)
R216 10K_4R216 10K_4
R206 10K_4R206 10K_4
C C
B B
M_A_WE#(5)
CLK_SCLK(3,15,32)
CLK_SDATA(3,15,32)
M_A_ODT0(5)
M_A_ODT1(5)
M_A_DM[7:0](5)
M_A_DQS[7:0](5)
M_A_DQS#[7:0](5)
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
DIMM0_SA0
DIMM0_SA1
CLK_SCLK
CLK_SDATA
M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7
M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7
107
119
109
108
114
121
101
103
102
104
115
110
113
197
201
202
200
116
120
136
153
170
187
137
154
171
188
135
152
169
186
98
97
96
95
92
91
90
86
89
85
84
83
80
78
79
73
74
11
28
46
63
12
29
47
64
10
27
45
62
4
JDIM1A
JDIM1A
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A14
A15
BA0
BA1
BA2
S0#
S1#
CK0
CK0#
CK1
CK1#
CKE0
CKE1
CAS#
RAS#
WE#
SA0
SA1
SCL
SDA
ODT0
ODT1
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
PC2100 DDR3 SDRAM SO-DIMM
PC2100 DDR3 SDRAM SO-DIMM
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS#0
DQS#1
DQS#2
DQS#3
DQS#4
DQS#5
DQS#6
DQS#7
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
(204P)
(204P)
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
5
7
15
17
4
6
16
18
21
23
33
35
22
24
34
36
39
41
51
53
40
42
50
52
57
59
67
69
56
58
68
70
129
131
141
143
130
132
140
142
147
149
157
159
146
148
158
160
163
165
175
177
164
166
174
176
181
183
191
193
180
182
192
194
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
3
M_A_DQ[63:0] (5)
+SMDDR_VREF
VREF_DQ_DIMM0(7,16)
+SMDDR_VREF_DQ0(16)
+SMDDR_VREF
DDR3_DRAMRST#(15,16)
R91 M1@0_6R91 M1@0_6
R90 *M3@0_6R90 *M3@0_6
+1.5V_SUS
R158
R158
*10K_4
*10K_4
+SMDDR_VREF_DIMM
R1620_6 R1620_6
PM_EXTTS#0(4)
R159
R159
*10K_4
*10K_4
2.48A
R221 *10K_4R221 *10K_4
+3V
C397
C397
470p/X7R_4
470p/X7R_4
2
+1.5V_SUS
+3V
+SMDDR_VREF_DQ0
+SMDDR_VREF_DIMM
JDIM1B
JDIM1B
75
VDD1
76
VDD2
81
VDD3
82
VDD4
87
VDD5
88
VDD6
93
VDD7
94
VDD8
99
VDD9
100
VDD10
105
VDD11
106
VDD12
111
VDD13
112
VDD14
117
VDD15
118
VDD16
123
VDD17
124
VDD18
199
VDDSPD
77
NC1
122
NC2
125
NCTEST
198
EVENT#
30
RESET#
1
VREF_DQ
126
VREF_CA
2
VSS1
3
VSS2
8
VSS3
9
VSS4
13
VSS5
14
VSS6
19
VSS7
20
VSS8
25
VSS9
26
VSS10
31
VSS11
32
VSS12
37
VSS13
38
VSS14
43
VSS15
DDR3-DIMM0_H=5.2_Standard
DDR3-DIMM0_H=5.2_Standard
1
44
VSS16
48
VSS17
49
VSS18
54
VSS19
55
VSS20
60
VSS21
61
VSS22
65
VSS23
66
VSS24
71
VSS25
72
VSS26
127
VSS27
128
VSS28
133
VSS29
134
VSS30
138
VSS31
139
VSS32
144
VSS33
145
VSS34
150
VSS35
151
VSS36
155
VSS37
156
VSS38
161
VSS39
162
VSS40
167
VSS41
168
VSS42
172
VSS43
173
VSS44
178
VSS45
179
VSS46
184
VSS47
185
VSS48
189
VSS49
190
VSS50
195
VSS51
196
VSS52
(204P)
(204P)
PC2100 DDR3 SDRAM SO-DIMM
PC2100 DDR3 SDRAM SO-DIMM
VTT1
VTT2
GND
GND
203
204
205
206
+0.75V_DDR_VTT
DDR3-DIMM0_H=5.2_Standard
DDR3-DIMM0_H=5.2_Standard
Place these Caps near So-Dimm0.
+1.5V_SUS
C355
C355
10u/6.3V_6
10u/6.3V_6
C364
C364
10u/6.3V_6
10u/6.3V_6
A A
+3V
C290
C290
10u/6.3V_6
10u/6.3V_6
C426
C426
2.2u/6.3V_6
2.2u/6.3V_6
C294
C294
10u/6.3V_6
10u/6.3V_6
C347
C347
10u/6.3V_6
10u/6.3V_6
C437
C437
.1u/16V_4
.1u/16V_4
5
C304
C304
10u/6.3V_6
10u/6.3V_6
+0.75V_DDR_VTT
C362
C362
.1u/16V_4
.1u/16V_4
C448
C448
1U/6.3V_4
1U/6.3V_4
C370
C370
.1u/16V_4
.1u/16V_4
C340
C340
.1u/16V_4
.1u/16V_4
C446
C446
1U/6.3V_4
1U/6.3V_4
C301
C301
.1u/16V_4
.1u/16V_4
C313
C313
.1u/16V_4
.1u/16V_4
C445
C445
1U/6.3V_4
1U/6.3V_4
+
+
+SMDDR_VREF_DIMM
C387
C387
C325
C325
330u/2V_7343
330u/2V_7343
.1u/16V_4
.1u/16V_4
2.2u/6.3V_6
2.2u/6.3V_6
C440
10u/6.3V_6
10u/6.3V_6
4
C440
C447
C447
1U/6.3V_4
1U/6.3V_4
http://laptop-motherboard-schematic.blogspot.com/
+SMDDR_VREF_DQ0
C393
C393
C166
C166
.1u/16V_4
.1u/16V_4
C433
C433
10u/6.3V_6
10u/6.3V_6
maybe can save
2.2u/6.3V_6
2.2u/6.3V_6
C432
C432
10u/6.3V_6
10u/6.3V_6
C177
C177
M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7
3
R99 EV@0_4R99 EV@0_4
R98 EV@0_4R98 EV@0_4
R104 EV@0_4R104 EV@0_4
R117 EV@0_4R117 EV@0_4
R163 EV@0_4R163 EV@0_4
R175 EV@0_4R175 EV@0_4
R197 EV@0_4R197 EV@0_4
R214 EV@0_4R214 EV@0_4
Close to SO-DIMM
2
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
DDRIII SO-DIMM-0
DDRIII SO-DIMM-0
DDRIII SO-DIMM-0
1
ZY9B
ZY9B
ZY9B
14 49Thursday, September 17, 2009
14 49Thursday, September 17, 2009
14 49Thursday, September 17, 2009
1A
1A
1A
of
of
of
5
4
3
2
1
JDIM2A
M_B_A[15:0](5)
D D
M_B_BS#0(5)
M_B_BS#1(5)
M_B_BS#2(5)
M_B_CS#0(5)
M_B_CS#1(5)
M_B_CLK0(5)
M_B_CLK0#(5)
M_B_CLK1(5)
M_B_CLK1#(5)
M_B_CKE0(5)
M_B_CKE1(5)
M_B_CAS#(5)
M_B_RAS#(5)
R217 10K_4R217 10K_4
R231 10K_4R231 10K_4
C C
B B
M_B_WE#(5)
CLK_SCLK(3,14,32)
CLK_SDATA(3,14,32)
M_B_ODT0(5)
M_B_ODT1(5)
M_B_DM[7:0](5)
M_B_DQS[7:0](5)
M_B_DQS#[7:0](5)
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
DIMM1_SA0
DIMM1_SA1
M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7
M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7
JDIM2A
98
A0
97
A1
96
A2
95
A3
92
A4
91
A5
90
A6
86
A7
89
A8
85
A9
107
A10/AP
84
A11
83
A12/BC#
119
A13
80
A14
78
A15
109
BA0
108
BA1
79
BA2
114
S0#
121
S1#
101
CK0
103
CK0#
102
CK1
104
CK1#
73
CKE0
74
CKE1
115
CAS#
110
RAS#
113
WE#
197
SA0
201
SA1
202
SCL
200
SDA
116
ODT0
120
ODT1
11
DM0
28
DM1
46
DM2
63
DM3
136
DM4
153
DM5
170
DM6
187
DM7
PC2100 DDR3 SDRAM SO-DIMM
12
29
47
64
137
154
171
188
10
27
45
62
135
152
169
186
DDR3-DIMM1_H=9.2_Standard
DDR3-DIMM1_H=9.2_Standard
PC2100 DDR3 SDRAM SO-DIMM
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS#0
DQS#1
DQS#2
DQS#3
DQS#4
DQS#5
DQS#6
DQS#7
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
(204P)
(204P)
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
5
7
15
17
4
6
16
18
21
23
33
35
22
24
34
36
39
41
51
53
40
42
50
52
57
59
67
69
56
58
68
70
129
131
141
143
130
132
140
142
147
149
157
159
146
148
158
160
163
165
175
177
164
166
174
176
181
183
191
193
180
182
192
194
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63
M_B_DQ[63:0] (5)
+SMDDR_VREF_DQ1(16)
+SMDDR_VREF_DIMM
VREF_DQ_DIMM1(7,16)
PM_EXTTS#1(4)
DDR3_DRAMRST#(14,16)
R479 M1@0_6R479 M1@0_6
R478 *M3@0_6R478 *M3@0_6
+SMDDR_VREF_DIMM+3V
2.48A
+3V
+SMDDR_VREF_DQ1
+1.5V_SUS
+3V
R211 *10K_4R211 *10K_4
JDIM2B
JDIM2B
75
VDD1
76
VDD2
81
VDD3
82
VDD4
87
VDD5
88
VDD6
93
VDD7
94
VDD8
99
VDD9
100
VDD10
105
VDD11
106
VDD12
111
VDD13
112
VDD14
117
VDD15
118
VDD16
123
VDD17
124
VDD18
199
VDDSPD
77
NC1
122
NC2
125
NCTEST
198
EVENT#
30
RESET#
1
VREF_DQ
126
VREF_CA
2
VSS1
3
VSS2
8
VSS3
9
VSS4
13
VSS5
14
VSS6
19
VSS7
20
VSS8
25
VSS9
26
VSS10
31
VSS11
32
VSS12
37
VSS13
38
VSS14
43
VSS15
DDR3-DIMM1_H=9.2_Standard
DDR3-DIMM1_H=9.2_Standard
44
VSS16
48
VSS17
49
VSS18
54
VSS19
55
VSS20
60
VSS21
61
VSS22
65
VSS23
66
VSS24
71
VSS25
72
VSS26
127
VSS27
128
VSS28
133
VSS29
134
VSS30
138
VSS31
139
VSS32
144
VSS33
145
VSS34
150
VSS35
151
VSS36
155
VSS37
156
VSS38
161
VSS39
162
VSS40
167
VSS41
168
VSS42
172
VSS43
173
VSS44
178
VSS45
179
VSS46
184
VSS47
185
VSS48
189
VSS49
190
VSS50
195
VSS51
196
VSS52
(204P)
(204P)
PC2100 DDR3 SDRAM SO-DIMM
PC2100 DDR3 SDRAM SO-DIMM
VTT1
VTT2
GND
GND
203
204
205
206
+0.75V_DDR_VTT
+1.5V_SUS
C320
C320
10u/6.3V_6
10u/6.3V_6
+3V
A A
Place these Caps near So-Dimm1.
C329
C329
10u/6.3V_6
10u/6.3V_6
C425
C425
2.2u/6.3V_6
2.2u/6.3V_6
C309
C309
10u/6.3V_6
10u/6.3V_6
C297
C297
10u/6.3V_6
10u/6.3V_6
C436
C436
.1u/16V_4
.1u/16V_4
C326
C326
10u/6.3V_6
10u/6.3V_6
+0.75V_DDR_VTT
5
C350
C350
10u/6.3V_6
10u/6.3V_6
C359
C359
.1u/16V_4
.1u/16V_4
C444
C444
1U/6.3V_4
1U/6.3V_4
C358
C358
.1u/16V_4
.1u/16V_4
C456
C456
1U/6.3V_4
1U/6.3V_4
C323
C323
.1u/16V_4
.1u/16V_4
C376
C376
.1u/16V_4
.1u/16V_4
+SMDDR_VREF_DIMM
+
+
C343
C343
.1u/16V_4
.1u/16V_4
C443
C443
1U/6.3V_4
1U/6.3V_4
http://laptop-motherboard-schematic.blogspot.com/
C275
C275
330u/2V_7343
330u/2V_7343
.1u/16V_4
.1u/16V_4
C455
C455
1U/6.3V_4
1U/6.3V_4
C391
C391
C431
C431
10u/6.3V_6
10u/6.3V_6
4
+SMDDR_VREF_DQ1
C394
C394
.1u/16V_4
.1u/16V_4
2.2u/6.3V_6
2.2u/6.3V_6
C434
C434
10u/6.3V_6
10u/6.3V_6
maybe can save
C667
C667
C653
C653
2.2u/6.3V_6
2.2u/6.3V_6
C435
C435
10u/6.3V_6
10u/6.3V_6
3
Close to SO-DIMM
M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7
R101 EV@0_4R101 EV@0_4
R100 EV@0_4R100 EV@0_4
R105 EV@0_4R105 EV@0_4
R115 EV@0_4R115 EV@0_4
R168 EV@0_4R168 EV@0_4
R180 EV@0_4R180 EV@0_4
R198 EV@0_4R198 EV@0_4
R205 EV@0_4R205 EV@0_4
2
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
DDRIII SO-DIMM-1
DDRIII SO-DIMM-1
DDRIII SO-DIMM-1
Date: Sheet
Date: Sheet
Date: Sheet
PROJECT :
1
ZY9B
ZY9B
ZY9B
15 49Thursday, September 17, 2009
15 49Thursday, September 17, 2009
15 49Thursday, September 17, 2009
of
of
of
1A
1A
1A
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