Acer A315 Quanta Z8G Schematic

Vinafix.com

5

4

3

2

1

01

Z8G SYSTEM BLOCK DIAGRAM

TPM@ : TPM
GS@ : G-SENSOR
CB@ : Cloud book SKU

D D

DDR4
DIMM CHA

DDR4
Memory down CHB

SATA - HDD

SATA SSD M.2

P10

P11

P17

P17

Dual Channel DDR4
2400 MHz MAX

SATA0

SATA1

Gemini Lake - 6W
(BROXTON-P)

MCP 1090 pins

SATA

SMB

eDP

DP

EDP

DDI0

eDP Conn.

HDMI Conn.

G-sensor

P13

P15

P19

EJ@ : EJ sereies SKU
KBL@ : keyboard backlight
NVL@ : none LED panel boost
DBG@ : Debug card
VL@ : LED panel boost
EC@ : EMMC
TPC@ : Type C function
w/o GS@: stuff with none GS sku
SSD@ : SATA interface SSD
PSD@ : PCIE interfance SSD
ODD@ : ODD function
SDM@ : SO-DIMM
OBM@ : On board Memory
CNV@ : CNVi WLAN card

BOM

I2C_0
SPI

USB3-0 + USB2-0

USB3-1 + USB3-2

USB2-1

X'TAL

32.768KHz

X'TAL 19.2MHz

SPI ROM 8M

P5

P22

PCIE-3

PCIE-2

X'TAL 25MHz

TPM(NPCT650)

RTL8411B-CG

10/100/1G

P17

C C

B B

32GB/64GB

USB2.0 Port 1

USB2.0 Port 2

Blue Tooth

Touch Screen

CCD(Camera)

ODD bridge
ASM1153

P17

USB2-2

P20

USB2-3

P20

USB2-4

P18

USB2-5

P13

USB2-6

P13

USB2-7

P17

Azalia

D-MIC

P14

AUDIO CODEC

ALC255

P6

EMMC

BATTERY

P14

EMMC5.0

USB2.0

Integrated PCH

RTC
IHDA

PCIE-0/1

LPC

USB3.0/2.0

PCI-E

P2~P8

EC

IT8987

USB3.0 Port

M.2 NGFF
WLAN+BT

P16

Type C port

BQ24780SRUYR

Batery Charger

RT6256BGQUF

+3VPCU/+5VPCU

G5335QT2U

P20

P21

P17

RJ45

Cardreader

+1.05V

P16

P16

P23

P24

P25

RT8231BGQW

+1.2VSUS

G5719CTB1U
M5671RE1U
G9661MF11U

+1.8V_S5 / +1.24V_S5/+1.5V

P26

P29

A A

P14

Speaker

P14

4

HP JACK

5

K/B Con.

P19

SPI ROM 1M

P22

Touch PAD

P19

3

Fan module

(PWM signal)

P19

2

RT3601EAGQW

+VCCGI / +VNN

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

P27~28

Thermal Protection
Discharger

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

PROJECT :

Block Diagram

Block Diagram

Block Diagram

1

Z8G

Z8G

Z8G

P30

1 35Tuesday, December 26, 2017

1 35Tuesday, December 26, 2017

1 35Tuesday, December 26, 2017

1A

1A

1A

Vinafix.com

5

4

GLK ULT (DDR4)

3

2

+1.2VSUS_ Q[7]

1

02

M_A_DQ[63:0][10]

D D

C C

B B

M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55

M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31

AW53

BJ36
BK37
BJ35
BL36
BJ39
BL40
BJ40
BK41
BA35
AY33
BA33
AY35
BA37
AY37
AY39
BA39
BL34
BL30
BJ29
BK29
BJ33
BK33
BJ34
BJ30
BD29
BF29
BH29
BF33
BC29
BD33
BF35
BH35

AR53
AP55
AP53
AN54
AU54
AV53
AV55

AU51
AU48
AU49
BA46
BA48
BA49
BA51
AR51
AY55
BA54
BA53
AY53
BC53
BD55
BE54
BD53
AN43
AN44
AR48
AU41
AU43
AN41
AN39
AU44

U27A

MEM_CH0_DQ 40
MEM_CH0_DQ 41
MEM_CH0_DQ 42
MEM_CH0_DQ 43
MEM_CH0_DQ 44
MEM_CH0_DQ 45
MEM_CH0_DQ 46
MEM_CH0_DQ 47
MEM_CH0_DQ 32
MEM_CH0_DQ 33
MEM_CH0_DQ 34
MEM_CH0_DQ 35
MEM_CH0_DQ 36
MEM_CH0_DQ 37
MEM_CH0_DQ 38
MEM_CH0_DQ 39
MEM_CH0_DQ 56
MEM_CH0_DQ 57
MEM_CH0_DQ 58
MEM_CH0_DQ 59
MEM_CH0_DQ 60
MEM_CH0_DQ 61
MEM_CH0_DQ 62
MEM_CH0_DQ 63
MEM_CH0_DQ 48
MEM_CH0_DQ 49
MEM_CH0_DQ 50
MEM_CH0_DQ 51
MEM_CH0_DQ 52
MEM_CH0_DQ 53
MEM_CH0_DQ 54
MEM_CH0_DQ 55

MEM_CH0_DQ 0
MEM_CH0_DQ 1
MEM_CH0_DQ 2
MEM_CH0_DQ 3
MEM_CH0_DQ 4
MEM_CH0_DQ 5
MEM_CH0_DQ 6
MEM_CH0_DQ 7
MEM_CH0_DQ 8
MEM_CH0_DQ 9
MEM_CH0_DQ 10
MEM_CH0_DQ 11
MEM_CH0_DQ 12
MEM_CH0_DQ 13
MEM_CH0_DQ 14
MEM_CH0_DQ 15
MEM_CH0_DQ 16
MEM_CH0_DQ 17
MEM_CH0_DQ 18
MEM_CH0_DQ 19
MEM_CH0_DQ 20
MEM_CH0_DQ 21
MEM_CH0_DQ 22
MEM_CH0_DQ 23
MEM_CH0_DQ 24
MEM_CH0_DQ 25
MEM_CH0_DQ 26
MEM_CH0_DQ 27
MEM_CH0_DQ 28
MEM_CH0_DQ 29
MEM_CH0_DQ 30
MEM_CH0_DQ 31

DDR4_LP3_LP4DDR4_LP3_LP4

MEM_CH0_DQ S0_P

MEM_CH0_DQ S0

MEM_CH0_DQ S1_P

MEM_CH0_DQ S1

MEM_CH0_DQ S2_P

MEM_CH0_DQ S2

MEM_CH0_DQ S3_P

MEM_CH0_DQ S3

MEM_CH0_DQ S4_P

MEM_CH0_DQ S4

MEM_CH0_DQ S5_P

MEM_CH0_DQ S5

MEM_CH0_DQ S6_P

MEM_CH0_DQ S6

MEM_CH0_DQ S7_P

MEM_CH0_DQ S7

DDR0

1 OF 13

NCTF1
NCTF2
NCTF3

MEM_CH0_O DT1

MEM_CH0_CS 1

NCTF4

MEM_CH0_O DT0

MEM_CH0_CS 0
MEM_CH0_CK E1
MEM_CH0_CK E0

MEM_CH0_CL K0_P

MEM_CH0_CL K0

MEM_CH0_CL K1_P

MEM_CH0_CL K1

MEM_CH0_MA 0

MEM_CH0_MA 1

MEM_CH0_MA 2
MEM_CH0_MA 10
MEM_CH0_MA 13
MEM_CH0_MA 16

MEM_CH0_B A1

MEM_CH0_B A0

MEM_CH0_B G1

MEM_CH0_A CT

MEM_CH0_MA 3

MEM_CH0_MA 4

MEM_CH0_MA 5

MEM_CH0_MA 6

MEM_CH0_MA 7

MEM_CH0_MA 8

MEM_CH0_MA 9
MEM_CH0_MA 11
MEM_CH0_MA 12
MEM_CH0_MA 14
MEM_CH0_MA 15

MEM_CH0_B G0

MEM_CH0_V REFDQ
MEM_CH0_V REFCA

M_A_DQSP 0

AT53

M_A_DQSN0

AT55

M_A_DQSP 1

AW49

M_A_DQSN1

AW48

M_A_DQSP 2

BC54

M_A_DQSN2

BB53

M_A_DQSP 3

AR41

M_A_DQSN3

AR43

M_A_DQSP 4

AV37

M_A_DQSN4

AV35

M_A_DQSP 5

BL38

M_A_DQSN5

BJ38

M_A_DQSP 6

BF31

M_A_DQSN6

BD31

M_A_DQSP 7

BJ32

M_A_DQSN7

BK31
BG54

BH54
BJ42

M_A_ODT1

BF39

M_A_CS#1

BK43
BL44

M_A_ODT0

BD39

M_A_CS#0

BJ43

M_A_CKE1

BF54

M_A_CKE0

BF55

M_A_CLK0

BE49

M_A_CLK0 #

BE51

M_A_CLK1

BC49

M_A_CLK1 #

BC48

M_A_A0

BD45

M_A_A1

BH50

M_A_A2

BH47

M_A_A10

BF45

M_A_A13

BH43

M_A_RAS#

BD41

M_A_BA#1

BH51

M_A_BA#0

BD43

M_A_BG#1

BF43

M_A_ACT#

BF41

M_A_A3

BG52

M_A_A4

BK45

M_A_A5

BJ46

M_A_A6

BJ44

M_A_A7

BJ47

M_A_A8

BJ45

M_A_A9

BK47

M_A_A11

BJ51

M_A_A12

BJ52

M_A_WE #

BJ48

M_A_CAS#

BJ50

M_A_BG#0

BL50

M0_VREF_DQ

AY31
AV29

R188 *0_5%_4

Default no stuff

M_B_DQ[63:0][11]

M_A_DQSP 0 [10]
M_A_DQSN0 [10]

M_A_DQSP 1 [10]
M_A_DQSN1 [10]

M_A_DQSP 2 [10]
M_A_DQSN2 [10]

M_A_DQSP 3 [10]
M_A_DQSN3 [10]

M_A_DQSP 4 [10]
M_A_DQSN4 [10]

M_A_DQSP 5 [10]
M_A_DQSN5 [10]

M_A_DQSP 6 [10]
M_A_DQSN6 [10]

M_A_DQSP 7 [10]
M_A_DQSN7 [10]

M_A_ODT1_DIMM [10]
M_A_CS#1 [10]

M_A_ODT0_DIMM [10]
M_A_CS#0 [10]
M_A_CKE1 [10]
M_A_CKE0 [10]

M_A_CLK0 [10]
M_A_CLK0 # [10]

M_A_CLK1 [10]
M_A_CLK1 # [10]

M_A_A0 [10]
M_A_A1 [10]
M_A_A2 [10]
M_A_A10 [10]
M_A_A13 [10]
M_A_RAS# [10]
M_A_BA#1 [10]
M_A_BA#0 [10]
M_A_BG#1 [10]
M_A_ACT# [10]
M_A_A3 [10]

M_A_A4 [10]
M_A_A5 [10]
M_A_A6 [10]
M_A_A7 [10]
M_A_A8 [10]
M_A_A9 [10]
M_A_A11 [10]
M_A_A12 [10]
M_A_WE # [10]
M_A_CAS# [10]
M_A_BG#0 [10]

TP12

+VREF_CA_CPU

VREF trace must be at least
20 mils wide and space

M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55

M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31

AN15
AN17
AU12
AN12
AN13
AU13
AU15

BA10
BJ26

BL26
BJ27
BK27
BJ23
BK23
BJ22
BL22
BD27
BF27
BH27
BC27
BH21
BF23
BD23
BF21
BK19
BJ20
BL20
BJ21
BJ17
BJ16
BK15
BL16
BA21
AY23
BA23
BA17
AY21
AY17
AY19
BA19

AY3
BD3
BD1
BC3
AY1
BA3
BA2
BE2
AR8

AP3
AU2
AV3

AW3

AN2
AP1
AR3
AV1
AR5
BA8
AU7
AU5
BA5
BA7
AU8

U27B

MEM_CH1_DQ 40
MEM_CH1_DQ 41
MEM_CH1_DQ 42
MEM_CH1_DQ 43
MEM_CH1_DQ 44
MEM_CH1_DQ 45
MEM_CH1_DQ 46
MEM_CH1_DQ 47
MEM_CH1_DQ 32
MEM_CH1_DQ 33
MEM_CH1_DQ 34
MEM_CH1_DQ 35
MEM_CH1_DQ 36
MEM_CH1_DQ 37
MEM_CH1_DQ 38
MEM_CH1_DQ 39
MEM_CH1_DQ 56
MEM_CH1_DQ 57
MEM_CH1_DQ 58
MEM_CH1_DQ 59
MEM_CH1_DQ 60
MEM_CH1_DQ 61
MEM_CH1_DQ 62
MEM_CH1_DQ 63
MEM_CH1_DQ 48
MEM_CH1_DQ 49
MEM_CH1_DQ 50
MEM_CH1_DQ 51
MEM_CH1_DQ 52
MEM_CH1_DQ 53
MEM_CH1_DQ 54
MEM_CH1_DQ 55

MEM_CH1_DQ 0
MEM_CH1_DQ 1
MEM_CH1_DQ 2
MEM_CH1_DQ 3
MEM_CH1_DQ 4
MEM_CH1_DQ 5
MEM_CH1_DQ 6
MEM_CH1_DQ 7
MEM_CH1_DQ 8
MEM_CH1_DQ 9
MEM_CH1_DQ 10
MEM_CH1_DQ 11
MEM_CH1_DQ 12
MEM_CH1_DQ 13
MEM_CH1_DQ 14
MEM_CH1_DQ 15
MEM_CH1_DQ 16
MEM_CH1_DQ 17
MEM_CH1_DQ 18
MEM_CH1_DQ 19
MEM_CH1_DQ 20
MEM_CH1_DQ 21
MEM_CH1_DQ 22
MEM_CH1_DQ 23
MEM_CH1_DQ 24
MEM_CH1_DQ 25
MEM_CH1_DQ 26
MEM_CH1_DQ 27
MEM_CH1_DQ 28
MEM_CH1_DQ 29
MEM_CH1_DQ 30
MEM_CH1_DQ 31

DDR4_LP3_LP4DDR4_LP3_LP4

MEM_CH1_DQ S0_P

MEM_CH1_DQ S0

MEM_CH1_DQ S1_P

MEM_CH1_DQ S1

MEM_CH1_DQ S2_P

MEM_CH1_DQ S2

MEM_CH1_DQ S3_P

MEM_CH1_DQ S3

MEM_CH1_DQ S4_P

MEM_CH1_DQ S4

MEM_CH1_DQ S5_P

MEM_CH1_DQ S5

MEM_CH1_DQ S6_P

MEM_CH1_DQ S6

MEM_CH1_DQ S7_P

MEM_CH1_DQ S7

DDR1

2 OF 13

MEM_CH1_MA 0
MEM_CH1_MA 1
MEM_CH1_MA 2

MEM_CH1_MA 3
MEM_CH1_MA 10
MEM_CH1_MA 13
MEM_CH1_MA 16

MEM_CH1_B A0
MEM_CH1_B A1
MEM_CH1_B G1
MEM_CH1_A CT

MEM_CH1_MA 11
MEM_CH1_MA 12
MEM_CH1_MA 14
MEM_CH1_MA 15

MEM_CH1_B G0
MEM_CH1_MA 4
MEM_CH1_MA 5
MEM_CH1_MA 6
MEM_CH1_MA 7
MEM_CH1_MA 8
MEM_CH1_MA 9

MEM_CH1_CL K0_P

MEM_CH1_CL K0

MEM_CH1_CL K1_P

MEM_CH1_CL K1

NCTF3
NCTF4
NCTF1

MEM_CH1_CS 1

MEM_CH1_O DT1

MEM_CH1_CS 0

MEM_CH1_O DT0

NCTF2
MEM_CH1_CK E0
MEM_CH1_CK E1

MEM_CH0_RCOMP

MEM_CH1_RE SET

MEM_CH1_RCOMP

MEM_CH1_V REFCA
MEM_CH1_V REFDQ

MEM_CH0_RE SET

MA_DRAMRST# MB_DRAMRST#

BJ24
BK25

BD25
BF25

BL18
BJ18

AV19
AV21

AR13
AR15

BB3
BC2

AW7
AW8

AT1
AT3

BH9
BC13
BD11
BD13
BF11
BE5
BH5
BH6
BF13
BG4
BE7

BK11
BJ12
BK9
BJ11
BJ10
BJ4
BL6
BJ5
BJ9
BJ6
BJ8

BF17
BD17

BF15
BH15

BJ13
BL12
BF1
BF2
BC7

BH2
BC8
BG2
BK13
BJ14

AY29
BC15

AY27
AV27

AY25
BC43

M_B_CS#0
M_B_ODT0

M_B_CKE0

M1_VREF_CA
M1_VREF_DQ

M_B_DQSP 0
M_B_DQSN0

M_B_DQSP 1
M_B_DQSN1

M_B_DQSP 2
M_B_DQSN2

M_B_DQSP 3
M_B_DQSN3

M_B_DQSP 4
M_B_DQSN4

M_B_DQSP 5
M_B_DQSN5

M_B_DQSP 6
M_B_DQSN6

M_B_DQSP 7
M_B_DQSN7

M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A10
M_B_A13
M_B_A16
M_B_BA#0
M_B_BA#1
M_B_BG#1
M_B_ACT#

M_B_A11
M_B_A12
M_B_A14
M_B_A15
M_B_BG#0
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9

M_B_CLK0
M_B_CLK0 #

R172 *0_5%_4

MEM_CH0_RCOMP
MB_DRAMRST#

MEM_CH1_RCOMP

R491 *0_5%_4

MA_DRAMRST#

Default no stuff

M_B_DQSP 0 [11]
M_B_DQSN0 [11]

M_B_DQSP 1 [11]
M_B_DQSN1 [11]

M_B_DQSP 2 [11]
M_B_DQSN2 [11]

M_B_DQSP 3 [11]
M_B_DQSN3 [11]

M_B_DQSP 4 [11]
M_B_DQSN4 [11]

M_B_DQSP 5 [11]
M_B_DQSN5 [11]

M_B_DQSP 6 [11]
M_B_DQSN6 [11]

M_B_DQSP 7 [11]
M_B_DQSN7 [11]

M_B_A0 [11]
M_B_A1 [11]
M_B_A2 [11]
M_B_A3 [11]
M_B_A10 [11]
M_B_A13 [11]
M_B_A16 [11]
M_B_BA#0 [11]
M_B_BA#1 [11]
M_B_BG#1 [11]
M_B_ACT# [11]

M_B_A11 [11]
M_B_A12 [11]
M_B_A14 [11]
M_B_A15 [11]
M_B_BG#0 [11]
M_B_A4 [11]
M_B_A5 [11]
M_B_A6 [11]
M_B_A7 [11]
M_B_A8 [11]
M_B_A9 [11]

M_B_CLK0 [11]
M_B_CLK0 # [11]

R179 110_1%_ 4

R183 110_1%_ 4

TP13

M_B_CS#0 [11]
M_B_ODT0_MD [11]

M_B_CKE0 [11]

R179 , R183 close to CPU

Trace length < 500 mils
Trace width = 15 mils
Trace spacing = 20 mils

+VREFDQ_SB_M3 [11]

VREF trace must be at least
20 mils wide and space

colsed to CPU pin within 100 mils

C544
*1000p/5 0V_4

R583
*10_5%_4

C545
*1000p/5 0V_4

R584
*10_5%_4

DRAMRST-SODIMM

+1.2VSUS_ Q +1.2VSUS_ Q

A A

5

CPU

MA_DRAMRST# MB_DRAMRST#

Trace length < 4500 mils, 50 ohm impendence
Trace spacing = 15 mils

R187
1K_1%_4

R178 *S_4

4

C144
*0.1u/16V_4

SO-DIMM1

M_A_DRAMRS T# [10]

Trace length < 4500 mils, 50 ohm impendence
Trace spacing = 15 mils

CPU

3

R180
1K_1%_4

R182 *S_4

C142
*0.1u/16V_4

SO-DIMM2

M_B_DRAMRS T# [11]

2

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Document Nu mber Rev

Size Document Nu mber Rev

Size Document Nu mber Rev

Date: Sheet of

Tuesday, December 26, 2017

Date: Sheet of

Tuesday, December 26, 2017

Date: Sheet of

Tuesday, December 26, 2017

PROJECT :

GLK(MEMORY)

GLK(MEMORY)

GLK(MEMORY)

1

Z8G

Z8G

Z8G

2 35

2 35

2 35

1A

1A

1A

Vinafix.com

5

Gemini lake (SATA , ODD, CLK ,USB,PCIE)

U27D

<1000mil

PCIE_CLK_RCOMP
CLK_PCIE_SSDP_R

CLK_PCIE_SSDN_R

PCIE_TXP2_LAN_C
PCIE_TXN2_LAN_C

PCIE_LAN_WAKE#

PCIE_WLAN_WAKE#

PCIE_LAN_WAKE# [16]

L10

PCIE_REF_CLK_RCOMP

R12

PCIE_CLKOUT0P

R10

PCIE_CLKOUT0N

N7

PCIE_CLKOUT1P

N5

PCIE_CLKOUT1N

R7

PCIE_CLKOUT2P

R5

PCIE_CLKOUT2N

N8

PCIE_CLKOUT3P

N10

PCIE_CLKOUT3N

E2

PCIE_P0_TXP

F2

PCIE_P0_TXN

G7

PCIE_P0_RXP

H6

PCIE_P0_RXN

A7

PCIE_P1_TXP

C7

PCIE_P1_TXN

D4

PCIE_P1_RXP

E5

PCIE_P1_RXN

C9

PCIE_P2_TXP

B9

PCIE_P2_TXN

E7

PCIE_P2_RXP

F6

PCIE_P2_RXN

A46

PCIE_CLKREQ0

C45

PCIE_CLKREQ1

B45

PCIE_CLKREQ2

C44

PCIE_CLKREQ3

F47

PCIE_WAKE0

D47

PCIE_WAKE1

F45

PCIE_WAKE2

D50

PCIE_WAKE3

J3

SATA_P0_TXP

J2

SATA_P0_TXN

J7

SATA_P0_RXP

J5

SATA_P0_RXN

PCIe

SATA

PCIE_CLKREQ1
PCIE_CLKREQ_WLAN#
CLK_PCIE_LAN_REQ#
CLK_PCIE_SSD_REQ#

SATA/USB3

USB3

PCIe/USB3

SSIC

USB2

4 OF 13

R441 10K_5%_4
R32 *10K_5%_4
R33 *10K_5%_4
R440 *10K_5%_4

level shift already PU

R71 56_1%_4

LAN

WLAN4~12 inch

PCIE_TXP2_LAN[16]
PCIE_TXN2_LAN[16]

CLK_PCIE_SSD_REQ#[17]
CLK_PCIE_LAN_REQ#[16]

PCIE_CLKREQ_WLAN#[18]

SATA HDD

R116 *S_4
R109 *S_4

CLK_PCIE_LANP[16]
CLK_PCIE_LANN[16]

CLK_PCIE_WLANP[18]
CLK_PCIE_WLANN[18]

PCIE_TX0+_SSD[17]
PCIE_TX0-_SSD[17]

PCIE_RX0+_SSD[17]
PCIE_RX0-_SSD[17]

PCIE_TX1+_SSD[17]
PCIE_TX1-_SSD[17]

PCIE_RX1+_SSD[17]
PCIE_RX1-_SSD[17]

PCIE_RXP2_LAN[16]

PCIE_RXN2_LAN[16]

SATA_TXP0[17]
SATA_TXN0[17]

SATA_RXP0[17]
SATA_RXN0[17]

PCIE_LAN_WAKE#

C327 0.1u/16V_4
C328 0.1u/16V_4

TP2

+1.8V_S5

CLK_PCIE_SSD_REQ#
PCIE_CLKREQ1
CLK_PCIE_LAN_REQ#
PCIE_CLKREQ_WLAN#

R52
*10K_5%_4

CLK_PCIE_SSD_P[17]
CLK_PCIE_SSD_N[17]

D D

PCIE SSD

2.5~10 inch(Gen2)

LAN

2.5~12 inch(Gen1)

C C

B B

4

SATA_P1_USB3_P5_TXP
SATA_P1_USB3_P5_TXN

SATA_P1_USB3_P5_RXP
SATA_P1_USB3_P5_RXN

USB3_P0_TXP
USB3_P0_TXN

USB3_P0_RXP
USB3_P0_RXN

USB3_P1_TXP
USB3_P1_TXN

USB3_P1_RXP
USB3_P1_RXN

PCIE_P3_USB3_P4_TXP

PCIE_P3_USB3_P4_TXN
PCIE_P3_USB3_P4_RXP

PCIE_P3_USB3_P4_RXN

PCIE_P4_USB3_P3_TXP

PCIE_P4_USB3_P3_TXN
PCIE_P4_USB3_P3_RXP

PCIE_P4_USB3_P3_RXN

PCIE_P5_USB3_P2_TXP

PCIE_P5_USB3_P2_TXN
PCIE_P5_USB3_P2_RXP

PCIE_P5_USB3_P2_RXN

PCIE2_USB3_SATA3_RCOMP

PCIE2_USB3_SATA3_RCOMP_P

USB2_DP0
USB2_DN0

USB2_DP1
USB2_DN1

USB2_DP2
USB2_DN2

USB2_DP3
USB2_DN3

USB2_DP4
USB2_DN4

USB2_DP5
USB2_DN5

USB2_DP6
USB2_DN6

USB2_DP7
USB2_DN7

USB2_RCOMP

USB2_DUALROLE
USB2_VBUS_SNS

USB2_OC0
USB2_OC1

+3V_S5

NC1
NC2

NC5
NC4

NC3

H1
H2

H4
G5

B15
C15

F15
D15

C14
A14

J11
H11

PCIE_TXP3_WLAN_C

C10

PCIE_TXN3_WLAN_C

A10
H9

F9
C11

B11
D11

F11
B13

C13
F13

D13

PCIE_RCOMPN

C5

PCIE_RCOMPP

C6

AA10
AA8

W13
W12

U15

U7
U5

N2
N3

L2
L3

R13
R15

M1
M3

R2
R3

P1
P3

U8
U10

U12

USBCOMP
USB_OTG_ID

V1

USB_VBUS_SNS

V3

USB_OC0#

U54

USB_OC1#

U53

R122 113_1%_4

USB_OTG_ID

SATA_TXP1 [17]
SATA_TXN1 [17]

SATA_RXP1 [17]

SATA_RXN1 [17]

USB30_TX0+ [20]

USB30_TX0- [20]

USB30_RX0+ [20]

USB30_RX0- [20]

USB3_1_TXP [21]

USB3_1_TXN [21]

USB3_1_RXP [21]

USB3_1_RXN [21]

C409 0.1u/16V_4
C408 0.1u/16V_4

PCIE_RXP3_WLAN [18]
PCIE_RXN3_WLAN [18]

USB3_3_TXP [17]
USB3_3_TXN [17]

USB3_3_RXP [17]
USB3_3_RXN [17]

USB3_2_TXP [21]
USB3_2_TXN [21]

USB3_2_RXP [21]
USB3_2_RXN [21]

R50 100_1%_4

USBP0+ [20]
USBP0- [20]

USBP1+ [21]
USBP1- [21]

USB2.0_CONN1+ [20]
USB2.0_CONN1- [20]

USB2.0_CONN2+ [20]
USB2.0_CONN2- [20]

USBP4+ [18]
USBP4- [18]

USBP_TOUCH+ [13]
USBP_TOUCH- [13]

USBP7_CCD+ [13]
USBP7_CCD- [13]

USBP7+_ODD [17]
USBP7-_ODD [17]

R468 *10K_5%_4
R81 *10K_5%_4

R490 *0_5%_4

M.2 SATA SSD

USB Type C

ODD

USB Type C

USB3.0

Type C

USB2 .0

USB2 .0

BT

Touch Panel

CCD

ODD

R565 *0_5%_4
R566 *0_5%_4

PCIE_TXP3_WLAN [18]
PCIE_TXN3_WLAN [18]

USB_OC0# [9,21]

USB_OC1# [20]

3

+1.8V_S5

2~8 inchUSB3.0

Touch PAD

I2C standard/fast mode
I2C total lenght is about 4500 mils = 4.5inchs
Cb = 4.5*5pF +7pF = 29.5pF
PU resistor = 2K ohm

WLAN

2.5~12 inch(Gen1)

CNVI_BRI_DT[9,18]
CNVI_BRI_RSP[9,18]
CNVI_RGI_DT[9,18,22]
CNVI_RGI_RSP[9,18]

3~12 inch

+1.8V_S5
+1.8V

USB_VBUS_SNS

SMB_SOC_CLK[9]

CNVI_WGR_CLK_P[18]
CNVI_WGR_CLK_N[18]

CNVI_WGR_DAT0_P[18]
CNVI_WGR_DAT0_N[18]

CNVI_WGR_DAT1_P[18]
CNVI_WGR_DAT1_N[18]

CNVI_WT_CLK_P[18]
CNVI_WT_CLK_N[18]

CNVI_WT_DAT0_P[18]
CNVI_WT_DAT0_N[18]

CNVI_WT_DAT1_P[18]
CNVI_WT_DAT1_N[18]

XTAL_CLKREQ[9,18]

CNVI_BRI_DT
CNVI_BRI_RSP
CNVI_RGI_DT
CNVI_RGI_RSP

CNVI_RF_RESET#[9,18]

33 ohm resistor must be placed at a distance <2000mils/50.8 mm from SoC
Minimum Length for BRI/RGIsignals is 3000 mils /76.2 mm

+1.8V_S5

R501
*10K_5%_4

R502
*S_4

R792K_1%_4
R802K_1%_4

I2C4_SCL[19]
I2C4_SDA[19]

󶁪

R54 33_5%_4
R60 33_5%_4
R61 33_5%_4
R37 33_5%_4

R58 150_1%_4

CLKIN_XTAL_LCP_C[18]

I2C4_SDA
I2C4_SCL

SMB1ALERT#
SMB_SOC_CLK
SMB_SOC_DAT

CLKIN_XTAL_LCP

CNVI_BRI_DT_C
CNVI_BRI_RSP_C
CNVI_RGI_DT_C
CNVI_RGI_RSP_C

CNVI_RF_RESET#

CNVI_WT_RCOMP

AA39
AA41

I2C4_SCL
I2C4_SDA

1 2

L13 BLM15AG121SN1D

U49
U51

U46
U48

R44
R43

R49

R51

C50

A50

C48

C47

B47

C46

A26

B27

C27

H29

H31

M31
P31

D29

F29
F35

D35

J35

H35

L31
J31

J29
F19

H17

J17
D19
D17
F17

F33

SIO_I2C0_SCL
SIO_I2C0_SDA

SIO_I2C1_SCL
SIO_I2C1_SDA

SIO_I2C2_SCL
SIO_I2C2_SDA

SIO_I2C3_SCL
SIO_I2C3_SDA

SIO_I2C4_SCL
SIO_I2C4_SDA

SIO_I2C5_SCL
SIO_I2C5_SDA

SIO_I2C6_SCL
SIO_I2C6_SDA

SIO_I2C7_SCL
SIO_I2C7_SDA

SMB_ALERT
SMB_CLK
SMB_DATA

CNV_WGR_CLK_P
CNV_WGR_CLK

CNV_WGR_D0_P
CNV_WGR_D0

CNV_WGR_D1_P
CNV_WGR_D1

CNV_WT_CLK_P
CNV_WT_CLK

CNV_WT_D0_P
CNV_WT_D0

CNV_WT_D1_P
CNV_WT_D1

CLKIN_XTAL_LCP
XTAL_CLKREQ

CNV_BRI_DT
CNV_BRI_RSP
CNV_RGI_DT
CNV_RGI_RSP
CNV_RF_RESET

CNV_WT_RCOMP

U27I

SMBUS set 3.3V

Close to SOC for ESD

SoC

+1.8V_S5

R6 *1K_1%_4
R24 *1K_1%_4
R21 *1K_1%_4

CLKIN_XTAL_LCP

C540

4.7p/50V_4

SMBus

SMB_SOC_DAT

SMB_SOC_CLK

2

LPSS_I2C

LPSS SMBus

CNVI

R95
10K_5%_4

+3V_S5 +3V

R18

R8

1K_1%_4

1K_1%_4

SMB_SOC_DAT
SMB_SOC_CLK
SMB1ALERT#

LPSS_SPI

6 OF 13

CNVI_BRI_RSP

R113 20K_1%_4

CNVI_RGI_DT

R119 20K_1%_4

CNVI_RGI_RSP

R104 20K_1%_4

INTEL CNVi check list suggestion

5

Q4A

3 4

2

Q4B

6 1

2N7002KDW

+3V_S5

R15 *1K_1%_4

SMB1ALERT#

LPSS_UART

R27

2.2K_5%_4

1

+1.8V_S5[4,5,6,7,9,12,16,19,23,27,29]
+1.8V[4,13,15,29,30]
+3V_S5[6,7,12,15,16,17,18,19,21,22,24,26,29]

+1.8V_S5

R7

2.2K_5%_4

+3V[4,5,6,10,13,14,15,16,17,18,19,22,24,25,26,27,28,29,30]

CLK_SDATA [10,19]

CLK_SCLK [10,19]

SIO_SPI_0_CLK

SIO_SPI_0_TXD
SIO_SPI_0_RXD

SIO_SPI_0_FS0
SIO_SPI_0_FS1

SIO_SPI_2_CLK

SIO_SPI_2_TXD
SIO_SPI_2_RXD

SIO_SPI_2_FS0
SIO_SPI_2_FS1
SIO_SPI_2_FS2

SIO_UART0_TXD
SIO_UART0_RXD
SIO_UART0_RTS
SIO_UART0_CTS

SIO_UART2_TXD
SIO_UART2_RXD
SIO_UART2_RTS
SIO_UART2_CTS

DDR4

M39
J37

L39
L37
J39

M37
M33

P35
P33
P37
L35

N54
P53
N53
M55

GPIO_65

L54

GPIO_64

M53
K53
L53

GPIO_65
GPIO_64

GPIO_79 [9]
GPIO_83 [9]
GPIO_80 [9]

GPIO_81 [9]
GPIO_84 [9]
GPIO_89 [9]
GPIO_85 [9]

GPIO_86 [9]
GPIO_87 [9]

GPIO_61 [9]

TP41

GPIO_62 [9]

TP40

GPIO_65 [9]
GPIO_66 [9]

TP37

TP38

TP39

03

S0 GML S5

A A

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

Z8G

PROJECT :

Z8G

PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

GLK(PCIE/USB/SATA/CNVI)

GLK(PCIE/USB/SATA/CNVI)

GLK(PCIE/USB/SATA/CNVI)

Date: Sheet of

Tuesday, December 26, 2017

Date: Sheet of

Tuesday, December 26, 2017

Date: Sheet of

5

4

3

2

Tuesday, December 26, 2017

1

Z8G

3 35

3 35

3 35

1A

1A

1A

Vinafix.com

5

4

3

2

1

Gemini lake (DISPLAY,eDP)

U27C

AC12
AC10

AE12
AE13

AC15
AC17

AE10

AH1
AH3

AE2
AE3

AJ2
AJ3

AG2
AG3

C39
B43

C43

AA2
AA3

Y3
Y1

AD1
AD3

AC2
AC3

AC7
AC5

C42
A42
C38

AE8
AE5

AE7

W17
W15

B39
B41

C40
C41

AA5
AA7

DDI0_TXP_0
DDI0_TXN_0

DDI0_TXP_1
DDI0_TXN_1

DDI0_TXP_2
DDI0_TXN_2

DDI0_TXP_3
DDI0_TXN_3

DDI0_AUXP
DDI0_AUXN

DDI0_HPD
DDI0_DDC_SCL

DDI0_DDC_SDA

DDI1_TXP_0
DDI1_TXN_0

DDI1_TXP_1
DDI1_TXN_1

DDI1_TXP_2
DDI1_TXN_2

DDI1_TXP_3
DDI1_TXN_3

DDI1_AUXP
DDI1_AUXN

DDI1_DDC_SCL
DDI1_DDC_SDA
DDI1_HPD

EDP_TXP_0
EDP_TXN_0

EDP_TXP_1
EDP_TXN_1

EDP_TXP_2
EDP_TXN_2

EDP_TXP_3
EDP_TXN_3

EDP_AUXP
EDP_AUXN

EDP_HPD
PNL0_BKLCTL

PNL0_BKLTEN
PNL0_VDDEN

EDP_RCOMP_P
EDP_RCOMP

DDI0/DDI_B

MDSI

DDI1/DDI_C

eDP/DDI_A

3 OF 13

INT_HDMITX2P[15]
INT_HDMITX2N[15]

INT_HDMITX1P[15]

D D

Max 7.5 inch

HDMI

HDMI_HPD

+3V

TypeC_HPD#
INT_EDP_HPD#

C C

HDMI HPD

B B

R184 10K_5%_4
R3 10K_5%_4

INT_HDMI_HPD#

RUC002N05GZT116

eDP Panel

<10000 mil

+1.8V

change to 3.3V

R35
10K_5%_4

3

Q3

HDMI_HPD_R

2

1

R11 *S_4

R12
100K_1%_4

INT_HDMITX1N[15]
INT_HDMITX0P[15]

INT_HDMITX0N[15]

INT_HDMICLK+[15]
INT_HDMICLK-[15]

INT_HDMI_HPD#

HDMI_DDCCLK_SW[15]

HDMI_DDCDATA_SW[15]

TypeC_HPD#[21]

EDP_TXP0[13]

EDP_TXN0[13]

EDP_TXP1[13]

EDP_TXN1[13]

EDP_TXP2[13]

EDP_TXN2[13]

EDP_TXP3[13]

EDP_TXN3[13]
EDP_AUXP[13]

EDP_AUXN[13]
INT_EDP_HPD#[13]

R497 100_1%_4

HDMI_HPD_C [15]

INT_EDP_HPD#
PCH_BKLTCTL

PCH_BKLTEN
PCH_VDDEN

EDP_RCOMP_P
EDP_RCOMP_N

MDSI_A_CLKP

MDSI_A_CLKN
MDSI_C_CLKP

MDSI_C_CLKN

MDSI_A_DP_0
MDSI_A_DN_0

MDSI_A_DP_1
MDSI_A_DN_1

MDSI_A_DP_2
MDSI_A_DN_2

MDSI_A_DP_3
MDSI_A_DN_3

MDSI_C_DP_0
MDSI_C_DN_0

MDSI_C_DP_1
MDSI_C_DN_1

MDSI_C_DP_2
MDSI_C_DN_2

MDSI_C_DP_3
MDSI_C_DN_3

MIPI_I2C_SCL

MIPI_I2C_SDA

MDSI_C_TE
MDSI_A_TE

MDSI_RCOMP

AL2
AM3

AG13
AG12

AN5
AN7

AJ15
AJ17

AJ7
AJ5

AJ10
AJ12

AG15
AG17

AG8
AG10

AG7
AG5

AE15
AE17

R53
R54

T53

SOC_OVRIDE

T55

GPIO_42 HW Strap

MDSI_RCOMP

AL5

GPIO_43 [9]

R162 150_1%_4

+1.8V_S5[3,5,6,7,9,12,16,19,23,27,29]
+1.8V[3,13,15,29,30]
+3V[3,5,6,10,13,14,15,16,17,18,19,22,24,25,26,27,28,29,30]

04

+3V +3V +3V

R129

*10K_5%_4

PCH_VDDEN PCH_BKLTEN PCH_BKLTCTL

A A

5

Q10A

R90 *S_4

R115
*10K_5%_4

34

61

2

*SSM6N43FU

Q10B

5

EDP_VDD_EN [13] PCH_BLON [13] PCH_BRIGHT [13]

R36

*10K_5%_4

5

Q6A

R17 *S_4

R22
*10K_5%_4

34

61

2

*SSM6N43FU

Q6B

4

R105

*10K_5%_4

5

Q9A

R74 *S_4

R89
*10K_5%_4

34

61

2

*SSM6N43FU

Q9B

3

Override

Flash Descriptor Override (SOC_OVRIDE)

0 = Normal Override(Normal operation)

1 = Override

3

2

ME_WR#[22]

2

1

Q30

2N7002K

+1.8V_S5

R465

2.2K_5%_4

SOC_OVRIDE

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Tuesday, December 26, 2017

Date: Sheet of

Tuesday, December 26, 2017

Date: Sheet of

Tuesday, December 26, 2017

PROJECT :

GLK (HDMI/eDP)

GLK (HDMI/eDP)

GLK (HDMI/eDP)

Z8G

Z8G

Z8G

4 35

4 35

1

4 35

1A

1A

1A

Vinafix.com

5

?
?

U27J

C26

AVS_I2S0_MCLK

B25

AVS_I2S0_BCLK

C25

AVS_I2S0_WS_SYNC

HDA_BCLK_R
HDA_SYNC_R

HDA_SDO_R
HDA_RST#_R

EMMC_RCOMP

PCLK_TPM

C399

*18P/50V_4

CLK_PCI_LPC

C400

*18P/50V_4

C24

AVS_I2S0_SDI

B23

AVS_I2S0_SDO

M23

AVS_I2S1_MCLK

L21

AVS_I2S1_BCLK

J21

AVS_I2S1_WS_SYNC

M21

AVS_I2S1_SDI

P23

AVS_I2S1_SDO

A22

AVS_HDA_BCLK

C23

AVS_HDA_WS_SYNC

B21

AVS_HDA_SDI

C22

AVS_HDA_SDO

C21

AVS_HDA_RST

B19

AVS_DMIC_CLK_A1

C20

AVS_DMIC_CLK_B1

C19

AVS_DMIC_DATA_1

C18

AVS_DMIC_CLK_AB2

A18

AVS_DMIC_DATA_2

J13

EMMC_CLK

L15

EMMC_RCLK

M19

EMMC_D0

H19

EMMC_D1

J19

EMMC_D2

P17

EMMC_D3

P19

EMMC_D4

J15

EMMC_D5

L17

EMMC_D6

M17

EMMC_D7

M13

EMMC_CMD

U44

EMMC_RST

G51

EMMC_PWR_EN

L13

EMMC_RCOMP

GLK_SOC_RVP1

?

AUDIO-AVS

eMMC

EMMC_CLK[13]
EMMC_RCLK[13]

EMMC_DATA_0[13]
EMMC_DATA_1[13]
EMMC_DATA_2[13]
EMMC_DATA_3[13]
EMMC_DATA_4[13]
EMMC_DATA_5[13]
EMMC_DATA_6[13]
EMMC_DATA_7[13]
EMMC_CMD[13]

EMMC_RST[13]

C402
*33p/50V_4

GPIO_159[9]

GPIO_163[9]
GPIO_164[9]

R449 33_5%_4
R435 33_5%_4

R422 33_5%_4
R421 33_5%_4

GPIO_172[9]
GPIO_174[9]

GPIO_175[9]

R87 200_1%_4

D D

HDA

AZ_CODEC_BITCLK[14]

AZ_CODEC_SYNC[14]

AZ_CODEC_SDIN0[9,14]

AZ_CODEC_SDOUT[14]

AZ_CODEC_RST#[14]

C C

AZ_CODEC_BITCLK

4

Gemini lake (EMMC/LPC/I2C/GPIO/HDA)

L29

SDCARD

LPC/eSPI

LPC set 3.3V

FAST_SPI

7 OF 13

XDP_TCK
XDP_TRST#

XDP_PREQ#
XDP_PRDY#
XDP_TMS
XDP_TDO
XDP_TDI

R504 51_5%_4
R512 51_5%_4

R508 51_5%_4
R509 169_1%_4
R506 51_5%_4
R505 169_1%_4
R510 51_5%_4

SPI is 1.8V

+1.8V_S5

SDCARD_CLK

SDCARD_D0
SDCARD_D1
SDCARD_D2
SDCARD_D3

SDCARD_CMD

SDCARD_CD

SDCARD_LVL_W P

SDCARD_PWR_D WN

SDCARD_RCOMP

LPC_CLKOUT0
LPC_CLKOUT1

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

LPC_CLKRUN

LPC_FRAME
LPC_SERIRQ

FST_SPI_CLK

FST_SPI_MOSI_IO0
FST_SPI_MISO_IO1

FST_SPI_IO2
FST_SPI_IO3

FST_SPI_CS0
FST_SPI_CS1

M29
P29
M27
P27
L27
L25
P25
L23

J25

LPC_CLKOUT0

C37

LPC_CLKOUT1

A38

LPC_LAD0_R

A34

LPC_LAD1_R

C34

LPC_LAD2_R

B35

LPC_LAD3_R

C35

LPC_CLKRUN#_R

C33

LPC_LFRAME#_R

B33

SOC_SERIRQ_R

B37

B29
B31

C30
A30
C29

C31
C32

PCH_SPI_CLK
PCH_SPI_SI

PCH_SPI_SO
PCH_SPI_IO2
PCH_SPI_IO3

PCH_SPI_CS0#
PCH_SPI_CS1#

3

R427 22_5%_4
R448 22_5%_4
R447 DBG@22_5%_4
R438 22_5%_4
R423 22_5%_4
R426 22_5%_4
R446 22_5%_4

R439 22_5%_4
R425 22_5%_4
R445 22_5%_4

TP4

TP43
TP42
TP45
TP46

XDP_TCK
XDP_TDI
XDP_TDO
XDP_TMS
XDP_TRST#

XDP_PRDY#
XDP_PREQ#

CLK_PCI_EC [22]
PCLK_TPM [17]

CLK_PCI_LPC [18]

LPC_LAD0 [17,18,22]
LPC_LAD1 [17,18,22]
LPC_LAD2 [17,18,22]
LPC_LAD3 [17,18,22]

CLKRUN# [17,22]
LPC_LFRAME# [17,18,22]

SOC_SERIRQ [12]

2

+1.8V_S5[3,4,6,7,9,12,16,19,23,27,29]
+1.8V[3,4,13,15,29,30]

U27H

AH53

JTAGX

AM53

JTAG_TCK

AJ54

JTAG_TDI

AL53

JTAG_TDO

AL54

JTAG_TMS

AK53

JTAG_TRST

AH55

JTAG_PRDY

AJ53

JTAG_PREQ

JTAG

ITP

GPIO

5 OF 13

+3V_S5[3,6,7,12,15,16,17,18,19,21,22,24,26,2 9]

GPIO_8

GPIO_9
GPIO_10
GPIO_11
GPIO_12
GPIO_13
GPIO_14
GPIO_15
GPIO_16

GPIO_17
GPIO_18
GPIO_19
GPIO_20
GPIO_21
GPIO_22
GPIO_23
GPIO_24
GPIO_25

GPIO_26
GPIO_27
GPIO_28
GPIO_29
GPIO_30
GPIO_31
GPIO_32
GPIO_33
GPIO_34

GPIO_35
GPIO_36
GPIO_37
GPIO_38
GPIO_39
GPIO_40
GPIO_41

GPIO_105
GPIO_134
GPIO_135
GPIO_136
GPIO_137
GPIO_138
GPIO_139
GPIO_140
GPIO_141
GPIO_142
GPIO_143
GPIO_144
GPIO_145
GPIO_146
GPIO_210
GPIO_212
GPIO_213
GPIO_214

AG53
AG54
AE54
AE53
AD55
AD53
AC54
AC53
AB53

AA49
AC48
AC46
AE51
AE49
AC51
AC49
AA51
AA46

AE41
AE39
AE46
AE44
AC41
AC39
AC44
AC43
AA44

AA54
AA53
Y55
Y53
W54
W53
V53

L46
H45
H47
L43
M43
H37
H43
J43
D43
F43
H41
F39
L41
F41
H27
U43
U41
U39

RF_KILL#_R

IERR

SATA_GP0
PCH_PCIERST#
GPIO_140
GPIO_141
GPIO_142

AC_PRESENT

1

05

Board_ID0
Board_ID1
Board_ID2
Board_ID3
Board_ID4
Board_ID5
Board_ID6
Board_ID7
Board_ID8

RAM_ID0

RAM_ID1
RAM_ID2

RAM_ID3

RAM_ID4
RAM_ID5
eMMC_ID0
eMMC_ID1

eMMC_ID2

R477 *S_4

R473 *S_4

GPIO_105

PCH_TPD_INT# [19]
ACCEL_INTA [19]

CNVI_MFUART2_RXD [18]

CNVI_MFUART2_TXD [18]

CNVI_GNSS_PA_BLANKING [18]

GPIO_27 [9]
GPIO_28 [9]

SPKR [14]

SIO_EXT_SCI# [22]

SOC_PCI_SERR#

TP6

PCH_PCIERST# [6]

set to 3.3V

TP53

HW strap ID
Board_ID0

B B

Board_ID1

Board_ID2

Board_ID3

Board_ID4

Board_ID5

Board_ID6

Board_ID7

Board_ID8

RAM_ID0

RAM_ID1

RAM_ID2

RAM_ID5

0

A A

0
0
0

eMMC_ID0eMMC_ID1

0
0

0 1
1 1

Strap pin Description

0 = w/o type C
1 = w/ type C

0 = with EMMC

1 = without EMMC <HDD only>

0 = M.2 SATA SSD

1 = M.2 PCIE SSD

0 = none G sensor

1 = G sensor

0 = none TPM

1 = TPM

0 = With SATA Port 0 Connector

1 = Without SATA Port 0 Connector

0 = With SATA Port 1 Connector

1 = Without SATA Port 1 Connector

0 = EJ series

1 = Cloud book

0 = UMA

1 = GPU
0 = With on board RAM

1 = Without on board RAM(SODIMM only)
0 = On board RAM 2GB

1 = On board RAM 4GB
(Reserved)

Vender

RAM_ID3RAM_ID4

0

0

Miron-2GB

0

1

Hynix-2GB

01

Samsung-2GB

1 1

eMMC_ID0

0
1
0
1

Sandisk 32G/64G/128GB

1

Vender

Samsung 32/64GB

Hynix 32/64GB

Kingston 32/64GB

Toshiba 128GB

0
0
10

BOARD ID SETTING

Board_ID0

R496 *10K_5%_4
R498 10K_5%_4
R487 10K_5%_4
R493 *10K_5%_4
R485 *10K_5%_4
R482 10K_5%_4
R483 10K_5%_4
R488 10K_5%_4
R475 10K_5%_4

R138 10K_5%_4
R102 *10K_5%_4
R88 10K_5%_4
R137 10K_5%_4
R146 *10K_5%_4
R111 10K_5%_4

R118 10K_5%_4
R135 *10K_5%_4
R124 *10K_5%_4

5

R499 10K_5%_4

Board_ID1

R507 *10K_5%_4

Board_ID2

R484 *10K_5%_4

Board_ID3

R492 10K_5%_4

Board_ID4

R486 10K_5%_4 R107 *10K_5%_4

Board_ID5

R476 *10K_5%_4

Board_ID6

R481 *10K_5%_4

Board_ID7

R489 *10K_5%_4

Board_ID8

R474 *10K_5%_4

RAM_ID0

R131 *10K_5%_4

RAM_ID1

R96 10K_5%_4

RAM_ID2

R86 *10K_5%_4

RAM_ID3

R147 *10K_5%_4

RAM_ID4

R121 10K_5%_4

RAM_ID5

R112 *10K_5%_4

eMMC_ID0

R117 *10K_5%_4

eMMC_ID1

R132 10K_5%_4

eMMC_ID2

R83 10K_5%_4

+1.8V_S5

Board ID

RAM ID

eMMC ID

4

R414

R413 33_5%_4
R408 33_5%_4
R412 33_5%_4

R416 33_5%_4

3.3K_5%_4

SPI_CLK_A

PCH_SPI_CS0#
PCH_SPI_CLK
PCH_SPI_SI
PCH_SPI_SO

PCH_SPI_IO2

Series resistance 33R is recommended
for signals as per PDG Table 27-2

SP@ socket P/N: DFHS08FS023 only for A-TEST

SPI ROM

1.8V

+1.8V_S5

R410
*3.3K_5%_4

U24

1

8

CE#

VCC

6

SCLK

5

SI

2

7

SO

IO3

3

4

IO2

VSS

GD25LB64CSIGR

Vender Size Quanta P/N

8M

AKE5EZN0N01WND

8M

AKE5EG-0Q01 GD25LB64CSIGRGGD

8M

AKE5EZN0Z01 MX25U6473FM2I-10GMAX

+1.8V_S5

R409

3.3K_5%_4

R411 33_5%_4

Vender P/N

W25Q64FWSSIQ

3

C392

0.1u/16V_4

PCH_SPI_IO3

GPIO_142

GPIO_140

Q31A

R470

*10K_5%_4

34

5

R464 *S_4

*10K_5%_4

BOARD ID SETTING

R157

34

5

Q13A

R149 *0_5%_4

+3V

61

2

Q31B

*2N7002KDW

2

R467
10K_5%_4

+3V

61

R156
*10K_5%_4

Q13B

*SSM6N43FU

2

NGFF_SATA_DET# [17]

SATA_DEVSLP0 [17]

GPIO_141

R457

*10K_5%_4

5

Q29A

R460 *S_4

SOC_PCI_SERR#

R472 *10K_5%_4

PCH_TPD_INT#

R567 10K_5%_4

SIO_EXT_SCI#

R478 10K_5%_4

ACCEL_INTA

R106 *GS@10K_5%_4

RF_KILL#_R

GPIO_105

R82 *10K_5%_4

+3V

R456
10K_5%_4

61

34

2

Q29B

*SSM6N43FU

SATA_DEVSLP1 [17]

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Do cument Number Rev

Size Do cument Number Rev

Size Do cument Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

PROJECT :

GLK (GPIO/LPC/I2C/HDA)

GLK (GPIO/LPC/I2C/HDA)

GLK (GPIO/LPC/I2C/HDA)

Tuesday, December 26, 2017

Tuesday, December 26, 2017

Tuesday, December 26, 2017

1

set to PU

Z8G

Z8G

Z8G

+1.8V_S5

+1.8V_S5

5 35

5 35

5 35

1A

1A

1A

Vinafix.com

5

PMU set to 3.3V

+3V_S5 +1.8V_S5

R49

R69

0_5%_4

*0_5%_4

D D

R68 *10K_5%_4

R70 100K_1%_4
R424 10K_5%_4
R436 *1K_1%_4
R442 *10K_5%_4
R19 *20K_1%_4
R14 20K_1%_4

R57 *10K_5%_4
R10 *1K_1%_4

+1.8V_S5

check list use 20k

R455 1K_1%_4

C C

R48 *1K_1%_4

R59 *100K_1%_4

R443 100K_1%_4

C31 *0.1u/16V_4
C39 *0.1u/16V_4
C38 *0.1u/16V_4
C405 0.1u/16V_4
C28 *0.1u/16V_4

PCH_SUSPWRDNACK

PCH_BATLOW#
PMU_RSTBTN#

PCH_PLTRST#
PMU_SLP_S0#
SOC_RSMRST#
CORE_PWROK

PCH_SUS_STAT#
DNBSWON#

H_PROCHOT#

THRMTRIP#_R

CORE_PWROK

PCH_PLTRST#

CORE_PWROK
PCH_BATLOW#
SOC_RSMRST#
PMU_RSTBTN#
DNBSWON#

DNBSWON#[22]

SUSB#[22]
SUSC#[22]

PCH_SUSPWRDNACK[22]

TP36
TP5

H_CPU_SVIDCLK[27,28]

H_CPU_SVIDDAT[27,28]

VR_SVID_ALERT#_VCORE[27,28]

TP7
TP3

4

TP10
TP9

PCH_PLTRST#
DNBSWON#

PMU_SLP_S0#
SUSB#
SUSC#

PCH_SUSPWRDNACK
PCH_BATLOW#
PMU_RSTBTN#
PMU_SUSCLK

PCH_SUS_STAT#

R450 *S_4
R451 *S_4
R452 220_5%_4

H_CPU_SVIDDAT
VR_SVID_ALERT#_VCORE
H_CPU_SVIDCLK

SVID_CLK#_R
SVID_DAT#_R
SVID_ALERT#_R

3

Gemini lake (PMU/PMIC/RTC)

U27E

R46

PMC_I2C_SCL

R48

PMC_I2C_SDA

L48

PMC_SPI_CLK

N48

PMC_SPI_FS0

N44

PMC_SPI_FS1

L49

PMC_SPI_FS2

L51

PMC_SPI_RXD

N49

PMC_SPI_TXD

D54

PMU_PLTRST

E54

PMU_PWRBTN

C52

PMU_SLP_S0

D51

PMU_SLP_S3

J49

PMU_SLP_S4

F54

SUSPWRDNACK

J48

PMU_BATLOW

C51

PMU_RSTBTN

G49

PMU_SUSCLK

E52

SUS_STAT

F55

SVID0_CLK

G53

SVID0_DATA

G54

SVID0_ALERT_B

D1

DEBUG_PORT_A0

D2

DEBUG_PORT_A1

A54

NC2

C54

NC11

+1.05V

R428
240_1%_4

PMU set 3.3V

R429

R430

68_5%_4

*160_1%_4

PMC

PMU

SVID

Misc

C401
1000p/50V_4

iCLK

RTC

Thermal

Spare

8 OF 13

THRMTRIP#_R

RTC is 3.3V

2

OSC_CLK_OUT_0
OSC_CLK_OUT_1

OSCIN

OSCOUT

RTC_X1
RTC_X2

VCC_RTC_EXTPAD

INTRUDER

SOC_PWROK

RSM_RST

RTC_TEST

RTC_RST

THERMTRIP

1.8V

PROCHOT

SKTOCC

R67
*10K_5%_4

61

Q8B
*PJT138K

GND

NC15
NC16

NC14

NC10
NC17

NC3
NC4

NC1
NC5

NC6
NC7
NC8
NC9

5

B17
C17

XTAL192_IN

U2

XTAL192_OUT

T1

RTC_X1

D23

RTC_X2

F23

BVCCRTC_EXTPAD

J23
H25

INTRUDER#
CORE_PWROK

D25

SOC_RSMRST#

F27

RTC_TEST#

F25

RTC_RST#

D27

THRMTRIP#_R

J53

H_PROCHOT#

J54
AG43
H53
AG44
H55

A4
BH1
A53
F37
BL2
BL3
BL53
C2
C3
R41

+3VPCU

R31
*10K_5%_4

34

Q8A
*PJT138K

THERMTRIP#

C49 0.1u/16V_4
R25 330K_5%_4
R23 *S_4

R47 *S_4

RTC_RST#

2

+1.8V_S5[3,4,5,7,9,12,16,19,23,27,29]
+1.05V[7,25,27,28]
+3V_S5[3,7,12,15,16,17,18,19,21,22,24,26,29]
+3VPCU[13,14,16,20,22,23,24,29]
+3V_RTC[7,22]

+3V_RTC

EC_PWROK [22]

THERMTRIP# [22]

H_PROCHOT# [22,23,27,28]

colsed to CPU pin within 100 mils

C543
1000p/50V_4

R582
10_5%_4

EC reset RTC

CLR_CMOS[22]

SOC_RSMRST# [12]

colsed to CPU pin within 100 mils

C76
1000p/50V_4

R154
10_5%_4

CORE_PWROK

34

5

Q5A

1

06

colsed to CPU pin within 100 mils

C30
1000p/50V_4

R9
10_5%_4

RTC_TEST#
RTC_RST#

61

2

Q5B

2N7002KDW

B B

RTC Circuitry (RTC)

CN7

+3V

EC_PLTRST#[22]

PCH_PCIERST#[5]

PCH_PLTRST#

A A

R579 *0_5%_4
R580 *0_5%_4
R581 *0_5%_4

5

1
2

CMOS

U33

3 5

*MC74VHC1G08DFT2G

R578 0_5%_4

C542
*0.1u/16V_4

4

PLTRST#

PLTRST# [13,16,17,18,22]

CB@cable RTC

4

34

12

+-

3 4

ML1220 Coin type
AHL03001031 [VDE] 17mAH
AHL03001057 [DBV] 17mAH

1
2

CN13

EJ@53014-00201-V09

R532 1K_1%_4

Trace width = 20 mils

+3VPCU

+3V_RTC_1

1 3

Q34 EJ@PMST3904

20MIL

2

+3V_RTC

D13

2
1

R543 [email protected]_5%_4

BAT54CW

R534

3

20K_1%_4

R533

20K_1%_4

VCCRTC_4VCCRTC_3VCCRTC_2

3

+3V_RTC
Trace width = 20 mils

C485
1u/6.3V_4

C486
1u/6.3V_4

R539 [email protected]_5%_4

[email protected]_1%_4

EJ@150K_1%_4

RTC_RST#

12

J1
*JUMP

RTC_TEST#

R541

R540

+5V_S5

19.2MHZ/20ppm

RTC Clock 32.768KHz (CPU)

Trace length < 1000 mils

2

C411 15p/50V_4

Y4

C416 15p/50V_4

C403 18p/50V_4

C404 18p/50V_4

XTAL192_OUT

4

3

R480
200K_1%_4

1

2

XTAL192_IN

CH01006JB08 -> 10p
CH01506JB06 -> 15p
CH-6806TB01 -> 6.8p

12

Y3

32.768KHZ/20ppm

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

RTC_X1

R444
10M_5%_4

RTC_X2

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

PROJECT :

GLK (PMU/PMIC/SMB/RTC)

GLK (PMU/PMIC/SMB/RTC)

GLK (PMU/PMIC/SMB/RTC)

Tuesday, December 26, 2017

Tuesday, December 26, 2017

Tuesday, December 26, 2017

Z8G

Z8G

Z8G

6 35

6 35

1

6 35

1A

1A

1A

Vinafix.com

5

EDGE DECAPS
FOR EXPOSED POWER PLANES

BACK side cap

4

Gemini (POWER)

3

2

+3V_S5[3,6,12,15,16,17,18,19,21,22,24,26,29]
+1.24V_S5[29]
+1.8V_S5[3,4,5,6,9,12,16,19,23,27,29]
+3V_RTC[6,22]
+1.2VSUS_Q[2]

+VNN[28]
+VCC_VCCGI[27]
+1.05V[6,25,27,28]

1

07

VNN1
VNN2
VNN3
VNN4
VNN5
VNN6
VNN7
VNN8

VNN9
VNN10
VNN11
VNN12
VNN13
VNN14
VNN15
VNN16

NC1

NC2
NC3

NC4

AF35
AG27
AG28
AG36
AG46
AG48
AJ27
AJ28
AJ46
AJ48
AL27
AL28
AL48
AL49
AM27
AM28

AJ49

AW44
BH55
AG41

AG39
AJ41

AJ43
BL54

AC33
AC35
AE33
AE35
AE36
AE38
AF27
AF28
AF36
AF38

+VCCRAM_1P05_FHV0

AG51

+VCCRAM_1P05_FHV1

AG49

+VCCRAM_1P05_FUSE

AJ51
AA36

AA38
AC36
AC38
Y36
Y38

P15

AJ21
U17

AG21
T18
T20
V18
V20
Y18
Y20

+VNN+VCC_VCCGI

+VCCRAM_1P05

VRTC_3P3

C45

*1u/6.3V_4

C52

*1u/6.3V_4

C106

1u/6.3V_4

C125

*1u/6.3V_4

R171 *S_6

R103 *S_6

C47

1u/6.3V_4

C66

*1u/6.3V_4

R155 *S_6
R167 *S_6

R169 *S_6

C119

C92

1u/6.3V_4

1u/6.3V_4

C89

C124

*22u/6.3V_6

*1u/6.3V_4

VCCGI_SENSE [27]
VCCGISS_SENSE [27]

VNN_SENSE [28]
VNNSS_SENSE [28]

+1.05V

+3V_RTC

C82

C64

1u/6.3V_4

1u/6.3V_4

*47u/10V_8

C110

22u/6.3V_6

C126

1u/6.3V_4

C129

C143

*1u/6.3V_4

R123 *S_6

C50

22u/6.3V_6

2

22u/6.3V_6

C23
*47u/10V_8

+VCCRAM_1P05+VCCRAM_1P05

C78

*1u/6.3V_4

C111

1u/6.3V_4

C139

*1u/6.3V_4

+3V_S5

C136

22u/6.3V_6

C394

*47u/10V_8

C73

C85

1u/6.3V_4

C77

1u/6.3V_4

C105

22u/6.3V_6

C114
*47u/10V_8

C393
*47u/10V_8

C434

22u/6.3V_6

C95

*22u/6.3V_6

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Tuesday, December 26, 2017

Date: Sheet of

Tuesday, December 26, 2017

Date: Sheet of

Tuesday, December 26, 2017

PROJECT :

GLK (POWER)

GLK (POWER)

GLK (POWER)

Z8G

Z8G

Z8G

1

7 35

7 35

7 35

1A

1A

1A

U27F

AA28

VCC_VCG1

AA29

VCC_VCG2

AA31

D D

C395

0.1u/16V_4

C390

22u/6.3V_6

22u/6.3V_6

C17

*22u/6.3V_6

C373

C C

+1.2VSUS

R229 *S_8
R228 *S_8

B B

+1.24V_S5

A A

*47u/10V_8

+1.2VSUS_Q

+1.2VSUS_Q

C155

22u/6.3V_6

R139 *S_6
R148 *S_6
R170 *S_6
R152 *S_6
R151 *S_6
R130 *S_6
R158 *S_6

C86 *47u/10V_8
C83 1u/6.3V_4

C109 22u/6.3V_6

5

22u/6.3V_6

1u/6.3V_4

C61

1u/6.3V_4

0.1u/16V_4

C10

22u/6.3V_6

C20

*22u/6.3V_6

*22u/6.3V_6

C7

C14

*47u/10V_8

*47u/10V_8

C9

*47u/10V_8

C153

22u/6.3V_6

+1.05V

R173 *S_8

+1.8V_S5

+VDD2_1P24_MPHY
+VDD2_1P24_AUD_ISH
+VDD2_1P24_DSI_CSI
+VDD2_1P24_GLML
+VDD2_1P24_PLL
+VDD2_1P24_VNNAON
+VDD2_1P24_USB2

+VDD2_1P24_AUD_ISH

+VDD2_1P24_DSI_CSI

C70

C388

C72

C16

C148

R73 *S_6

C53

1u/6.3V_4

C91

1u/6.3V_4

C18

22u/6.3V_6

C22

*22u/6.3V_6

C372
*47u/10V_8

C11

*47u/10V_8

C152

22u/6.3V_6

C65

1u/6.3V_4

1u/6.3V_4

C81

1u/6.3V_4

1u/6.3V_4

C80

22u/6.3V_6

22u/6.3V_6

C19

*22u/6.3V_6

*22u/6.3V_6

C24

*1u/6.3V_4

*1u/6.3V_4

C21

*47u/10V_8

*47u/10V_8

C118

1u/6.3V_4

1u/6.3V_4

C113

1u/6.3V_4

1u/6.3V_4

C35

*1u/6.3V_4

*1u/6.3V_4

C67 47u/6.3V_6
C63 47u/6.3V_6
C62 22u/6.3V_6
C71 1u/6.3V_4
C69 1u/6.3V_4
C75 1u/6.3V_4

C117 22u/6.3V_6
C103 22u/6.3V_6
C120 1u/6.3V_4

C94 22u/6.3V_6
C104 1u/6.3V_4
C100 1u/6.3V_4

C84 1u/6.3V_4
C87 *22u/6.3V_6

C385

C88

C386

C8

C25

C5

C115

+VCCIOA

C116

C34

+VDD2_1P24_MPHY

+VDD2_1P24_PLL

+VDD2_1P24_USB2

C57

1u/6.3V_4

C59

1u/6.3V_4

C13

22u/6.3V_6

C2

*22u/6.3V_6

C108

*1u/6.3V_4

C12
*47u/10V_8

C133

0.1u/16V_4

C112

1u/6.3V_4

C33

1u/6.3V_4

C68

1u/6.3V_4

C58

1u/6.3V_4

C74

22u/6.3V_6

C27

*22u/6.3V_6

C26

*1u/6.3V_4

C15
*47u/10V_8

C141

0.1u/16V_4

C122

22u/6.3V_6

C60

1u/6.3V_4

4

VCC_VCG3

AA33

VCC_VCG4

AC28

VCC_VCG5

AC31

VCC_VCG6

AE28

VCC_VCG7

AE29

VCC_VCG8

AE31

VCC_VCG9

AF31

VCC_VCG10

AF33

VCC_VCG11

AG31

VCC_VCG12

AG33

VCC_VCG13

AJ31

VCC_VCG14

AJ33

VCC_VCG15

AJ35

VCC_VCG16

AL31

VCC_VCG17

AL33

VCC_VCG18

AL35

VCC_VCG19

AM33

VCC_VCG20

AM35

VCC_VCG21

AM36

VCC_VCG22

D31

VCC_VCG23

D33

VCC_VCG24

D37

VCC_VCG25

D39

VCC_VCG26

P39

VCC_VCG27

P41

VCC_VCG28

T28

VCC_VCG29

T29

VCC_VCG30

T31

VCC_VCG31

T33

VCC_VCG32

T35

VCC_VCG33

T36

VCC_VCG34

V28

VCC_VCG35

V29

VCC_VCG36

V31

VCC_VCG37

V33

VCC_VCG38

V35

VCC_VCG39

V36

VCC_VCG40

Y28

VCC_VCG41

Y29

VCC_VCG42

Y33

VCC_VCG43

Y35

VCC_VCG44

C137

0.1u/16V_4

C134

22u/6.3V_6

C90

1u/6.3V_4

22u/6.3V_6

+VDD2_1P24_MPHY

+VDD2_1P24_AUD_ISH

+VDD2_1P24_DSI_CSI
+VDD2_1P24_GLML+VDD2_1P24_GLML

+VDD2_1P24_PLL

+VDD2_1P24_VNNAON

+VDD2_1P24_USB2

C140

0.1u/16V_4

C123

2.2u/10V_4

C42

25A

AW12

AP18
AP21
AP36
AP38
AT18
AT20
AT21
AT35
AT36
AT38
BA13
BA15
BA25
BA31
BA41
BA43

AP25
AP31
AT25
AT27
AT28
AT29
AT31

AJ23

AG23

AC21
AE20
AE21
AF20
AF21

AC18
AC20

AL36
AL38
AP20

AM20
AL18

AM18
AA18

AA20
AG18

AJ20

T21
T23
T25
V21
V23
V25

U27G

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7

3A

VDDQ8
VDDQ9
VDDQ10
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15
VDDQ16

VCCIOA1
VCCIOA2
VCCIOA3
VCCIOA4
VCCIOA5
VCCIOA6
VCCIOA7

VCC_1P8V_A3
VCC_1P8V_A4

VDD1(1.8V)

VCC_1P8V_A5
VCC_1P8V_A6
VCC_1P8V_A7
VCC_1P8V_A8

VCC_1P8V_A2
VCC_1P8V_A1

VDD2_1P2_MPHY1
VDD2_1P2_MPHY2
VDD2_1P2_MPHY3
VDD2_1P2_MPHY4
VDD2_1P2_MPHY5

VDD2_1P2_AUD1
VDD2_1P2_AUD2

VDD2_1P2_DSI_CSI
VDD2_1P2_GLM1

VDD2_1P2_GLM2
VDD2_1P2_GLM4

VDD2_1P2_GLM3
VDD2_1P2_PLL1

VDD2_1P2_PLL2
VDD2_1P2_VNNAON1

VDD2_1P2_VNNAON2
VDD2_1P2_USB2

VDD2_1P2_USB3

VDD2(1.2V)

9 OF 13

0.4A

3A

10 OF 13

4.5A

VCCRAM(1.05V)

RTC

0.15A

VDD3(3.3V)

3

A

4

VCC_VCG_SENSE
VSS_VCG_SENSE

VNN_SENSE

VNN_VSS_SENSE

VCCRAM_1P053
VCCRAM_1P054
VCCRAM_1P057
VCCRAM_1P058

VCCRAM_1P059
VCCRAM_1P0510
VCCRAM_1P0511
VCCRAM_1P0512
VCCRAM_1P0513
VCCRAM_1P0514

VCC_1P05_INT2

VCC_1P05_INT1

VCC_1P05_INT3

VCCRAM_1P051

VCCRAM_1P052

VCCRAM_1P055

VCCRAM_1P056
VCCRAM_1P0515
VCCRAM_1P0516

VCCRTC_3P3V

VCC_3P3V_A2
VCC_3P3V_A5

VCC_3P3V_A1
VCC_3P3V_A3
VCC_3P3V_A4
VCC_3P3V_A6
VCC_3P3V_A7
VCC_3P3V_A8
VCC_3P3V_A9

Vinafix.com

5

4

3

2

1

GLK ULT (GND)

08

D D

C C

B B

A12
A16
A20
A24
A28
A32
A36
A40
A44
A48

A51
AA12
AA13
AA15
AA17
AA21
AA23
AA25
AA27
AA35
AA43
AA48

AB1
AB3

AB55

AC8
AC13
AC23
AC25
AC27
AC29
AE18
AE23
AE25
AE27
AE43
AE48

AF1
AF3
AF4
AF6
AF8

AF9
AF11
AF12
AF14
AF16
AF18
AF23
AF25
AF29
AF40
AF42

U27K

A3

VSS6

A6

VSS13
VSS1
VSS2
VSS3
VSS4
VSS5
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS33
VSS28
VSS29
VSS30
VSS31
VSS32
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS49
VSS50
VSS61
VSS62
VSS63
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS51
VSS52

11 OF 13

VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS64
VSS87
VSS65
VSS66
VSS67
VSS68
VSS77
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS78
VSS79
VSS80
VSS90
VSS97
VSS98
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS88
VSS89
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96

VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS108
VSS110
VSS107
VSS109

AF44
AF45
AF47
AF48
AF50
AF52
AF53
AF55
AG20
AL21
AG25
AG29
AG35
AG38
AJ8
AJ13
AJ18
AJ25
AJ29
AJ36
AJ38
AJ39
AJ44
AK1
AK3
AK55
AL3
AL7
AL8
AL10
AL12
AL13
AL15
AL17
AL20
AL25
AL29
AL39
AL41
AL43
AL44
AL46
AL51
AM1
AM21
AM23
AM25
AM29
AM31
AM38
AM55
AN3
AN8
AN10
AN46

AN48
AN49
AN51
AN53
AP23
AP27
AP28
AP29
AP33
AP35

AR2

AR7
AR10
AR12
AR17
AR39
AR44
AR46
AR49
AR54

AT23
AT33

AU3
AU10
AU28
AU46
AU53
AV15
AV17
AV23
AV25
AV31
AV33
AV39
AV41

AW2

AW5
AW10
AW28
AW46
AW51
AW54

AY13

AY15

AY28

AY41

AY43

B55
BA27
BA29

BB1
BB28
BB55

BC5

B2

U27M

VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_124
VSS_130
VSS_121
VSS_122
VSS_123
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_131
VSS_132
VSS_135
VSS_133
VSS_134
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
VSS_147
VSS_150
VSS_146
VSS_148
VSS_149
VSS_151
VSS_152
VSS_153
VSS_154
VSS_155
VSS_156
VSS_157
VSS_158
VSS_159
VSS_160
VSS_161
VSS_162
VSS_163
VSS_164
VSS_178

12 OF 13

VSS_165
VSS_166
VSS_167
VSS_168
VSS_169
VSS_170
VSS_171
VSS_172
VSS_173
VSS_174
VSS_175
VSS_176
VSS_177
VSS_179
VSS_187
VSS_180
VSS_181
VSS_182
VSS_183
VSS_184
VSS_185
VSS_186
VSS_189
VSS_188
VSS_190
VSS_194
VSS_191
VSS_192
VSS_193
VSS_195
VSS_199
VSS_196
VSS_197
VSS_198
VSS_200
VSS_201
VSS_202
VSS_203
VSS_204
VSS_205
VSS_206
VSS_207
VSS_208
VSS_209
VSS_210
VSS_211
VSS_212
VSS_215
VSS_213
VSS_214
VSS_216
VSS_217
VSS_218
VSS_219
VSS_220

BC11
BC17
BC19
BC21
BC23
BC25
BC31
BC33
BC35
BC37
BC39
BC41
BC45
BC51
BD9
BD15
BD19
BD21
BD28
BD35
BD37
BD47
BE3
BE28
BE53
BF9
BF19
BF37
BF47
BG1
BG6
BG28
BG50
BG55
BH11
BH13
BH17
BH19
BH23
BH25
BH28
BH31
BH33
BH37
BH39
BH41
BH45
BJ2
BJ15
BJ19
BJ25
BJ28
BJ31
BJ37
BJ41

AL23
BJ54

BK1
BK17
BK21
BK35
BK39
BK55

BL5

BL8
BL10
BL14
BL24
BL28
BL32
BL42
BL46
BL48
BL51

C12
C16
C28
C36

D21
D28
D41
D45
D55

E28

E50

E55

F21

F31

G28
H13
H15
H21
H23
H28
H33
H39

J27
J33
J41
J45

U27L

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS17
VSS19
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS18

C1

VSS20
VSS21
VSS22
VSS23
VSS24

D6

VSS30

D9

VSS31
VSS25
VSS26
VSS27
VSS28
VSS29
VSS32
VSS33
VSS34

F1

VSS35

F4

VSS38
VSS36
VSS37
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46

J8

VSS52
VSS47
VSS48
VSS49
VSS50

13 OF 13

VSS51
VSS53
VSS55
VSS54
VSS56
VSS59
VSS60
VSS61
VSS57
VSS58
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS74
VSS73
VSS75
VSS77
VSS78
VSS80
VSS81
VSS82
VSS84
VSS85
VSS93
VSS95
VSS96
VSS83
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS94
VSS97
VSS98

VSS99
VSS100
VSS101

VSS76

VSS79

J51
K1
K3
K28
K55
L5
L7
L8
L19
L33
M15
M25
M28
M35
M41
N12
N28
N46
N51
P21
P55
R8
R28
T27
T38
U13
V27
V38
V55
W2
W3
W5
W7
W8
W10
W39
W41
W43
W44
W46
W48
W49
W51
Y21
Y23
Y25
Y27
Y31
T3
U3

A A

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Tuesday, December 26, 2017

Date: Sheet of

Tuesday, December 26, 2017

Date: Sheet of

5

4

3

2

Tuesday, December 26, 2017

PROJECT :

GLK (GND)

GLK (GND)

GLK (GND)

1

Z8G

Z8G

Z8G

8 35

8 35

8 35

1A

1A

1A

Vinafix.com

5

4

3

2

1

HARDWARE STRAPS

09

+1.8V_S5

Note: If platform is using eMMC as boot device, then
provide a pull down for this strap to disable

R463

R418
*4.7K_1%_4

R431
10K_5%_4

*4.7K_1%_4

R462
10K_5%_4

D D

C C

B B

R150
*4.7K_1%_4

R144

4.7K_1%_4

R120

4.7K_1%_4

R136
*10K_5%_4

R458
*4.7K_1%_4

R459
10K_5%_4

R76
*10K_5%_4

R92

4.7K_1%_4

R419
*10K_5%_4

R434

4.7K_1%_4

R453
*4.7K_1%_4

R454
10K_5%_4

CNVI_RF_RESET#[3,18]

R45
*4.7K_1%_4

R56

4.7K_1%_4

GPIO_43[4]
GPIO_81[3]

CNVI_RGI_DT[3,18,22]

USB_OC0#[3,21]

GPIO_62[3]
GPIO_79[3]
GPIO_80[3]
GPIO_85[3]
GPIO_86[3]
GPIO_87[3]
GPIO_89[3]
GPIO_159[5]

GPIO_164[5]
SMB_SOC_CLK[3]
CNVI_BRI_RSP[3,18]
CNVI_RGI_RSP[3,18]

XTAL_CLKREQ[3,18]

*4.7K_1%_4

R433

4.7K_1%_4

*4.7K_1%_4

R432

4.7K_1%_4

R466 10K_5%_4
R29 4.7K_1%_4
R38 *10K_5%_4

R469 *10K_5%_4
R461 10K_5%_4
R108 4.7K_1%_4
R34 10K_5%_4
R110 10K_5%_4
R97 10K_5%_4
R91 10K_5%_4
R77 10K_5%_4
R99 4.7K_1%_4
R114 4.7K_1%_4
R20 *10K_5%_4
R26 *10K_5%_4
R28 *10K_5%_4
R43 *10K_5%_4
R42 *10K_5%_4

*4.7K_1%_4

R41
*4.7K_1%_4

+1.8V_S5

*4.7K_1%_4

R94

4.7K_1%_4

GPIO_174 [5]
GPIO_61 [3]
GPIO_27 [5]
GPIO_28 [5]
GPIO_65 [3]
GPIO_163 [5]
AZ_CODEC_SDIN0 [5,14]
GPIO_66 [3]
GPIO_83 [3]
GPIO_172 [5]
GPIO_175 [5]
CNVI_BRI_DT [3,18]
GPIO_84 [3]

R93

R53

R417

R420

SPI.

Note: The default for A0 will be eSPI
due to a bug on LPC.

Hardware Strap Strap Description

PIO_174

GPIO_61

GPIO_27

GPIO_28

GPIO_65

GPIO_163

AZ_CODEC_SDIN0

GPIO_66

GPIO_83

GPIO_172 0 = Disable (default)

GPIO_42

GPIO_175

CNVI_BRI_DT

GPIO_84

VDD2 1.24V vs.1.20V select
0 = 1.2V(default)G

1 = 1.24V

Enable CSE(TXE3.0) ROM Bypass

0 = Disable bypass

1 = Enable Bypass
Allow eMMC as a boot source

0 = Disable

1 = Enable
Allow SPI as a boot source

0 = Disable

1 = Enable

Force DNX FW Load

0 = Do not force

1 = Force
SMBus 1.8V/3.3V mode select

0=buffers set to 3.3V

1=buffers set to 1.8V
PMU 1.8V/3.3V mode select

0=buffers set to 3.3V mode

1=buffers set to 1.8V mode
LPC No Re-Boot

0 = Disable (default)

1 = Enable
LPC 1.8V/3.3V mode select

0=buffers set to 3.3V mode

1=buffers set to 1.8V mode

SMbus No Re-Boot
1 = Enable
Top swap override

0 = Disable

1 = Enable
eSPI vs. LPC

0 = LPC mode (default)

1 = eSPI mode
eSPI Flash Sharing Mode:

0 = master attached flash sharing
(MAFS; default)

1 = slave attached flash sharing

(SAFS)

Allow SPI as a boot source

0 = Enable (default)

1 = Disable

Value

1

0

0

1

0

0

0

0

0

0

0

0

0

0

0

+1.8V_S5[3,4,5,6,7,16,19,23,27,29]

A A

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Tuesday, December 26, 2017

Date: Sheet of

Tuesday, December 26, 2017

Date: Sheet of

5

4

3

2

Tuesday, December 26, 2017

PROJECT :

HW STRAPS/XDP

HW STRAPS/XDP

HW STRAPS/XDP

Z8G

Z8G

Z8G

9 35

9 35

1

9 35

1A

1A

1A

Vinafix.com

5

4

3

2

1

+2.5V
+3V

10

P/N and F/P

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9

D D

M_A_WE#[2]
M_A_CAS#[2]

+1.2VSUS

M_A_PARITY

+3V

R278
*SDM@10K_5%_4

R279
SDM@10K_5%_4

M_A_ALERT#
M_A_EVENT#

R255
SDM@240_1%_4

R272
*SDM@10K_5%_4

R271
SDM@10K_5%_4

R273 SDM@240_1%_4
R280 SDM@240_1%_4

C C

R274
*SDM@10K_5%_4

CHA_SA0 CHA_SA2CHA_SA1

R275
SDM@10K_5%_4

B B

M_A_RAS#[2]

M_A_ACT#[2]

M_A_DRAMRST#[2]

M_A_BA#0[2]
M_A_BA#1[2]
M_A_BG#0[2]
M_A_BG#1[2]

M_A_CS#0[2]
M_A_CS#1[2]
M_A_CKE0[2]
M_A_CKE1[2]

M_A_CLK0[2]
M_A_CLK0#[2]
M_A_CLK1[2]
M_A_CLK1#[2]

M_A_ODT0_DIMM[2]
M_A_ODT1_DIMM[2]

CLK_SCLK[3,19]
CLK_SDATA[3,19]

+1.2VSUS +1.2VSUS

R268 *SDM@240_1%_4
R250 *SDM@240_1%_4
R253 *SDM@240_1%_4
R254 *SDM@240_1%_4
R267 *SDM@240_1%_4
R249 *SDM@240_1%_4
R269 *SDM@240_1%_4
R270 *SDM@240_1%_4

M_A_A10
M_A_A11
M_A_A12
M_A_A13

TP51
TP50

M_A_PARITY
M_A_ALERT#

M_A_EVENT#

C225 *[email protected]/16V_4

CHA_SA0
CHA_SA1
CHA_SA2

M_A_CB0
M_A_CB1
M_A_CB2
M_A_CB3
M_A_CB4
M_A_CB5
M_A_CB6
M_A_CB7

+1.2VSUS

JDIM1A

144

A0

133

A1

132

A2

131

A3

128

A4

126

A5

127

A6

122

A7

125

A8

121

A9

146

A10/AP

120

A11

119

A12

158

A13

151

A14/WE#

156

A15/CAS#

152

A16/RAS#

162

CS2#/C0

165

CS3#/C1

114

ACT#

143

PARITY

116

ALERT#

134

EVENT#

108

RESET#

150

BA0

145

BA1

115

BG0

113

BG1

149

CS0#

157

CS1#

109

CKE0

110

CKE1

137

CK0

139

CK0#

138

CK1

140

CK1#

155

ODT0

161

ODT1

253

SCL

254

SDA

256

SA0

260

SA1

166

SA2

92

CB0

91

CB1

101

CB2

105

CB3

88

CB4

87

CB5

100

CB6

104

CB7

12

DM0

33

DM1

54

DM2

75

DM3

178

DM4

199

DM5

220

DM6

241

DM7

96

DBI8#

SDM@D4AS0-26001-1P52

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8

DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48

(260P)

DDR4 SODIMM 260 PIN

DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8

DQS#0
DQS#1
DQS#2
DQS#3
DQS#4
DQS#5
DQS#6
DQS#7
DQS#8

M_A_DQ24

7

M_A_DQ26

20

M_A_DQ28

21

M_A_DQ30

4

M_A_DQ29

3

M_A_DQ31

16

M_A_DQ27

17

M_A_DQ1

28

M_A_DQ2

29

M_A_DQ5

41

M_A_DQ7

42

M_A_DQ0

24

M_A_DQ3

25

M_A_DQ6 VREF_CA_DIMM0

38

M_A_DQ4

37

M_A_DQ10

50

M_A_DQ15

49

M_A_DQ14

62

M_A_DQ12

63

M_A_DQ8

46

M_A_DQ9

45

M_A_DQ13

58

M_A_DQ11

59

M_A_DQ17

70

M_A_DQ19

71

M_A_DQ21

83

M_A_DQ23

84

M_A_DQ18

66

M_A_DQ16

67

M_A_DQ20

79

M_A_DQ22

80

M_A_DQ36

174

M_A_DQ39

173

M_A_DQ35

187

M_A_DQ33

186

M_A_DQ37

170

M_A_DQ38

169

M_A_DQ32

183

M_A_DQ34

182

M_A_DQ45

195

M_A_DQ47

194

M_A_DQ42

207

M_A_DQ41

208

M_A_DQ44

191

M_A_DQ46

190

M_A_DQ43

203

M_A_DQ40

204

M_A_DQ55

216

M_A_DQ51

215

M_A_DQ49

228

M_A_DQ48

229

M_A_DQ53

211

M_A_DQ54

212

M_A_DQ50

224

M_A_DQ52

225

M_A_DQ60

237

M_A_DQ56

236

M_A_DQ58

249

M_A_DQ57

250

M_A_DQ62

232

M_A_DQ61

233

M_A_DQ59

245

M_A_DQ63

246

M_A_DQSP3

13

M_A_DQSP0

34

M_A_DQSP1

55

M_A_DQSP2

76

M_A_DQSP4

179

M_A_DQSP5

200

M_A_DQSP6

221

M_A_DQSP7

242

M_A_DQSP8

97

M_A_DQSN3

11

M_A_DQSN0

32

M_A_DQSN1

53

M_A_DQSN2

74

M_A_DQSN4

177

M_A_DQSN5

198

M_A_DQSN6

219

M_A_DQSN7

240

M_A_DQSN8

95

M_A_DQ25

8

M_A_DQ[63:0] [2]M_A_A[13:0][2]

24-31

0-7

8-15

16-23

32-39

40-47

48-55

56-63

M_A_DQSP[7:0] [2]

M_A_DQSN[7:0] [2]

SDM@240_1%_4

M_A_DQSP8

SDM@240_1%_4

M_A_DQSN8

+1.2VSUS

2250mA

+1.2VSUS

R252

R251

JDIM1B

111

VDD1

112

VDD2

117

VDD3

118

VDD4

123

VDD5

124

VDD6

129

VDD7

130

VDD8

135

VDD9

136

VDD10

141

VDD11

142

VDD12

147

VDD13

148

VDD14

153

VDD15

154

VDD16

159

VDD17

160

VDD18

163

VDD19

1

VSS1

5

VSS2

9

VSS3

15

VSS4

19

VSS5

23

VSS6

27

VSS7

31

VSS8

35

VSS9

39

VSS10

43

VSS11

47

VSS12

51

VSS13

57

VSS14

61

VSS15

65

VSS16

69

VSS17

73

VSS18

77

VSS19

81

VSS20

85

VSS21

89

VSS22

93

VSS23

99

VSS24

103

VSS25

107

VSS26

167

VSS27

171

VSS28

175

VSS29

181

VSS30

185

VSS31

189

VSS32

193

VSS33

197

VSS34

201

VSS35

205

VSS36

209

VSS37

213

VSS38

217

VSS39

223

VSS40

227

VSS41

231

VSS42

235

VSS43

239

VSS44

243

VSS45

247

VSS46

251

VSS47

263

263
264

264

SDM@D4AS0-26001-1P52

VDDSPD

VPP1
VPP2

VTT

VREFCA

VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68

(260P)

DDR4 SODIMM 260 PIN

VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94

GND#1
GND#2

12/21 Change JDIM2 footprint to "ddr4-d4as0-26001-1p52-std-smt " for SMT requset

VREF DQ0 M1 Solution

+VREF_CA_CPU

C237
[email protected]/25V_4

R283 SDM@2_1%_6

R285 [email protected]_1%_4

+1.2VSUS

R281
[email protected]_1%_4

VREF_CA_DIMM0

R282
[email protected]_1%_4

255

257
259

258

164

2
6
10
14
18
22
26
30
36
40
44
48
52
56
60
64
68
72
78
82
86
90
94
98
102
106
168
172
176
180
184
188
192
196
202
206
210
214
218
222
226
230
234
238
244
248
252

261
262

C188 [email protected]/6.3V_6
C184 [email protected]/25V_4
R238 *SDM@0_5%_4
R239 *S_4

+2.5V_SUS

0.5A

600mA

12/4 Change for +3.3V to +3V

+VDDQ_VTT

Place these Caps near So-Dimm1.

1uF/10uF 4pcs on each side of connector

+1.2VSUS

C221 SDM@1u/6.3V_4
C207 SDM@1u/6.3V_4
C212 SDM@1u/6.3V_4
C217 SDM@1u/6.3V_4
C215 SDM@1u/6.3V_4

A A

+2.5V_SUS[11,26]

+1.2VSUS[7,11,26]

+VDDQ_VTT[11,26]

+VREF_CA_CPU[2]

+3V[3,4,5,6,13,14,15,16,17,18,19,22,24,25,26,27,28,29,30]

5

4

C216 SDM@1u/6.3V_4
C218 SDM@1u/6.3V_4
C208 SDM@1u/6.3V_4
C205 SDM@10u/6.3V_6

C206 SDM@10u/6.3V_6
C222 SDM@10u/6.3V_6

C226 SDM@10u/6.3V_6
C203 SDM@10u/6.3V_6

C224 SDM@10u/6.3V_6
C209 SDM@10u/6.3V_6

C191 SDM@10u/6.3V_6

+VDDQ_VTT

3

C219 SDM@1u/6.3V_4
C228 SDM@1u/6.3V_4
C220 SDM@1u/6.3V_4
C227 SDM@1u/6.3V_4
C223 SDM@10u/6.3V_6
C173 SDM@10u/6.3V_6

+3V

C233 [email protected]/16V_4
C232 [email protected]/6.3V_6

VREF_CA_DIMM0

+2.5V_SUS

C235 [email protected]/16V_4
C236 [email protected]/6.3V_6

C192 [email protected]/16V_4
C204 [email protected]/6.3V_6

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Tuesday, December 26, 2017

Date: Sheet of

Tuesday, December 26, 2017

Date: Sheet of

2

Tuesday, December 26, 2017

PROJECT :

DDR4 DIMM-STD 4H (CH. A)

DDR4 DIMM-STD 4H (CH. A)

DDR4 DIMM-STD 4H (CH. A)

Z8G

Z8G

Z8G

10 35

10 35

10 35

1

1A

1A

1A

Vinafix.com

5

BYTE4_32-39

DB1 change DB1 change DB1 change DB1 change

+SMDDR_VREF_DQ1_M1

C446

M_B_A[16:0][2]

OBM@68p/50V_4

SI1, 0427 RF

D D

M_B_BA#0[2]
M_B_BA#1[2]
M_B_BG#0[2]

M_B_CLK0[2]
M_B_CLK0#[2]
M_B_CKE0[2]

M_B_ODT0_MD[2]

M_B_CS#0[2]

M_B_DQSP4[2]
M_B_DQSP7[2]

M_B_DQSN4[2]
M_B_DQSN7[2]

C C

M_B_DRAMRST#[2]

R192 OBM@240_1%_4

M_B_ACT#[2]

P/NVendor

MIC 16G

AKD5EG0TL00

MT40A1G16HBA-083E:A

M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
M_B_A16

M_B_DQSP4
M_B_DQSP7

M_B_DQSN4
M_B_DQSN7

M_B1_ZQ0

M_B_ALERT# M_B_ALERT# M_B_ALERT# M_B_ALERT#

Vendor P/N

Elpida

SAMSUNG

B B

+VDDQ_VTT

M_B_BA#0
M_B_BA#1
M_B_BG#0
M_B_CKE0
M_B_CS#0
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
M_B_A16
M_B_ODT0_MD
M_B_ACT#
M_B_PARITY
M_B_BG#1

A A

M_B_ODT0_MD

R205 OBM@36_1%_4
R218 OBM@36_1%_4
R208 OBM@36_1%_4
R225 OBM@36_1%_4
R191 OBM@36_1%_4
R206 OBM@36_1%_4
R198 OBM@36_1%_4
R517 OBM@36_1%_4
R221 OBM@36_1%_4
R199 OBM@36_1%_4
R520 OBM@36_1%_4
R519 OBM@36_1%_4
R522 OBM@36_1%_4
R203 OBM@36_1%_4
R521 OBM@36_1%_4
R211 OBM@36_1%_4
R523 OBM@36_1%_4
R223 OBM@36_1%_4
R518 OBM@36_1%_4
R215 OBM@36_1%_4

R210 OBM@36_1%_4
R186 *OBM@36_1%_4
R207 OBM@36_1%_4
R197 OBM@36_1%_4
R196 OBM@36_1%_4

R185 OBM@0_5%_4

+VDDQ_VTT [10,26]
+1.2VSUS [7,10,26]
+2.5V_SUS [10,26]

5

DG 0.5 7/12, close T routing

U29

M1

VREFCA

B1

VPP#B1

R9

VPP#R9

P3

A0

P7

A1

R3

A2

N7

A3

N3

A4

P8

A5

P2

A6

R8

A7

R2

A8

R7

A9

M3

A10/AP

T2

A11

M7

A12/BC

T8

A13

L2

WE_n/A14

M8

CAS_n/A15

L8

RAS_n/A16

N2

BA0

N8

BA1

M2

BG0

K7

CK_t

K8

CK_c

K2

CKE

K3

ODT

L7

CS

G3

DQSL_t

B7

DQSU_t

F3

DQSL_c

A7

DQSU_c

E7

DML_n/DBIL_n

E2

DMU_n/DBIU_n

P1

RESET_n

F9

ZQ

N9

TEN

P9

ALERT_n

L3

ACT_n

T3

PAR

T7

NC

96-BALL
DDR4

OBM@DDR4_96P

Hynix AKD5JGETW00--H5TC4G63AFR-PBA

DB1 12/11, close memory

M_B_CLK0
M_B_CLK0#

M_B_ALERT#

R193 OBM@51_1%_4

M_B_CLK0

M_B_CLK0#

C476 [email protected]/50V_4

+1.2VSUS

C158 [email protected]/50V_4
C96 [email protected]/50V_4
C150 [email protected]/50V_4
C98 [email protected]/50V_4

+2.5V_SUS

C163 OBM@1u/6.3V_4
C448 OBM@1u/6.3V_4
C149 OBM@1u/6.3V_4
C146 OBM@1u/6.3V_4
C425 OBM@1u/6.3V_4
C458 OBM@1u/6.3V_4
C102 OBM@1u/6.3V_4
C193 OBM@1u/6.3V_4
C459 OBM@10u/6.3V_4
C480 OBM@10u/6.3V_4
C202 OBM@68p/50V_4

DB1 12/11, close memory

BYTE7_56-63

G2

DQL0

F7

DQL1

H3

DQL2

H7

DQL3

H2

DQL4

H8

DQL5

J3

DQL6

J7

DQL7

A3

DQU0

B8

DQU1

C3

DQU2

C7

DQU3

C2

DQU4

C8

DQU5

D3

DQU6

D7

DQU7

B3

VDD#B3

B9

VDD#B9

D1

VDD#D1

G7

VDD#G7

J1

VDD#J1

J9

VDD#J9

L1

VDD#L1

L9

VDD#L9

R1

VDD#R1

T9

VDD#T9

A1

VDDQ#A1

A9

VDDQ#A9

C1

VDDQ#C1

D9

VDDQ#D9

F2

VDDQ#F2

F8

VDDQ#F8

G1

VDDQ#G1

G9

VDDQ#G9

J2

VDDQ#J2

J8

VDDQ#J8

B2

VSS#B2

E1

VSS#E1

E9

R190 OBM@0_5%_4

VSS#E9

G8

VSS#G8

K1

VSS#K1

K9

VSS#K9

M_B_BG#1_1

M9

VSS#M9

N1

VSS#N1

T1

VSS#T1

A2

VSSQ#A2

A8

VSSQ#A8

C9

VSSQ#C9

D2

VSSQ#D2

D8

VSSQ#D8

E3

VSSQ#E3

E8

VSSQ#E8

F1

VSSQ#F1

H1

VSSQ#H1

H9

VSSQ#H9

R213 *OBM@36_1%_4
R212 *OBM@36_1%_4

+1.2VSUS

R216
OBM@75_1%_4

M_B_DQ36
M_B_DQ35
M_B_DQ33
M_B_DQ32
M_B_DQ37
M_B_DQ38
M_B_DQ34
M_B_DQ39

M_B_DQ60
M_B_DQ58
M_B_DQ61
M_B_DQ57
M_B_DQ56
M_B_DQ63
M_B_DQ62
M_B_DQ59

+VDDQ_VTT

4

BYTE6_48-55

U6

M1

VREFCA

B1

VPP#B1

R9

VPP#R9

P3

A0

P7

A1

R3

A2

N7

A3

N3

A4

P8

A5

P2

A6

R8

A7

R2

A8

R7

A9

M3

A10/AP

T2

A11

M7

A12/BC

T8

A13

L2

WE_n/A14

M8

CAS_n/A15

L8

RAS_n/A16

N2

BA0

N8

BA1

M2

BG0

K7

CK_t

K8

CK_c

K2

CKE

K3

ODT

L7

CS

G3

DQSL_t

B7

DQSU_t

F3

DQSL_c

A7

DQSU_c

E7

DML_n/DBIL_n

E2

DMU_n/DBIU_n

P1

RESET_n

F9

ZQ

N9

TEN

P9

ALERT_n

L3

ACT_n

T3

PAR

T7

NC

96-BALL
DDR4

OBM@DDR4_96P

240Ω CS12402FB03
240Ω CS12402FB03
240Ω CS12402FB03
240Ω CS12402FB03
INSTAL
INSTAL
INSTAL
INSTAL
UNINSTAL
UNINSTAL
UNINSTAL
UNINSTAL

+2.5V_SUS+2.5V_SUS

M_B_DQSP6[2]
M_B_DQSP5[2]

M_B_DQSN6[2]
M_B_DQSN5[2]

C101

OBM@68p/50V_4

M_B_BG#1 [2]

+SMDDR_VREF_DQ1_M1

M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
M_B_A16

M_B_BA#0
M_B_BA#1
M_B_BG#0

M_B_CLK0
M_B_CLK0#
M_B_CKE0

M_B_CS#0
M_B_DQSP6

M_B_DQSP5
M_B_DQSN6

M_B_DQSN5

M_B_DQ36 [2]
M_B_DQ35 [2]
M_B_DQ33 [2]
M_B_DQ32 [2]
M_B_DQ37 [2]
M_B_DQ38 [2]
M_B_DQ34 [2]
M_B_DQ39 [2]

SI1, 0427 RF

M_B_DQ60 [2]
M_B_DQ58 [2]
M_B_DQ61 [2]
M_B_DQ57 [2]
M_B_DQ56 [2]
M_B_DQ63 [2]
M_B_DQ62 [2]
M_B_DQ59 [2]

+1.2VSUS +1.2VSUS +1.2VSUS +1.2VSUS

R194 *OBM@0_5%_4

SI1C, 0615 SI1C, 0615 SI1C, 0615 SI1C, 0615

M_B_DRAMRST#M_B_DRAMRST# M_B_DRAMRST#

R164 OBM@240_1%_4

M_B_BG#1_1
M_B_BG#1_2
M_B_BG#1_3
M_B_BG#1_4

DB1 Option for 16Gbx16 die
Close DDR ball

Memory 8G & Memory 16G TABLE

R278
R279
R280
R281
R282
R283
R284
R285
R290
R291
R292
R293

4

M_B2_ZQ0

M_B_ACT#M_B_ACT# M_B_ACT# M_B_ACT#
M_B_PARITY M_B_PARITYM_B_PARITY

R195 OBM@0_5%_4
R166 OBM@0_5%_4
R531 OBM@0_5%_4
R219 OBM@0_5%_4

Memory 8G Memory 16G
0Ω CS00002JB38
0Ω CS00002JB38
0Ω CS00002JB38
0Ω CS00002JB38

UNINSTAL

UNINSTAL

UNINSTAL

UNINSTAL

INSTAL

INSTAL

INSTAL

INSTAL

BYTE5_40-47

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDD#B3
VDD#B9
VDD#D1
VDD#G7

VDD#J1
VDD#J9
VDD#L1
VDD#L9

VDD#R1

VDD#T9

VDDQ#A1

VDDQ#A9
VDDQ#C1
VDDQ#D9

VDDQ#F2

VDDQ#F8
VDDQ#G1
VDDQ#G9

VDDQ#J2

VDDQ#J8

VSS#B2
VSS#E1
VSS#E9

VSS#G8

VSS#K1
VSS#K9

VSS#M9

VSS#N1
VSS#T1

VSSQ#A2

VSSQ#A8

VSSQ#C9

VSSQ#D2

VSSQ#D8

VSSQ#E3

VSSQ#E8

VSSQ#F1

VSSQ#H1

VSSQ#H9

G2
F7
H3
H7
H2
H8
J3
J7

A3
B8
C3
C7
C2
C8
D3
D7

B3
B9
D1
G7
J1
J9
L1
L9
R1
T9

A1
A9
C1
D9
F2
F8
G1
G9
J2
J8

B2
E1
E9
G8
K1
K9
M9
N1
T1

A2
A8
C9
D2
D8
E3
E8
F1
H1
H9

3

M_B_DQ53
M_B_DQ50
M_B_DQ55
M_B_DQ51
M_B_DQ49
M_B_DQ48
M_B_DQ52
M_B_DQ54

M_B_DQ41
M_B_DQ44
M_B_DQ42
M_B_DQ45
M_B_DQ47
M_B_DQ40
M_B_DQ43
M_B_DQ46

R163 OBM@0_5%_4

M_B_BG#1_2 M_B_BG#1

M_B_DQ53 [2]
M_B_DQ50 [2]
M_B_DQ55 [2]
M_B_DQ51 [2]
M_B_DQ49 [2]
M_B_DQ48 [2]
M_B_DQ52 [2]
M_B_DQ54 [2]

SI1, 0427 RF

M_B_DQ41 [2]
M_B_DQ44 [2]
M_B_DQ42 [2]
M_B_DQ45 [2]
M_B_DQ47 [2]
M_B_DQ40 [2]
M_B_DQ43 [2]
M_B_DQ46 [2]

R165 *OBM@0_5%_4

Place these Caps near Channel B

1uF/10uF 4pcs on each side of connector

+1.2VSUS

C473 OBM@1u/6.3V_4
C428 OBM@1u/6.3V_4
C471 OBM@1u/6.3V_4
C174 OBM@1u/6.3V_4
C475 OBM@1u/6.3V_4
C472 OBM@1u/6.3V_4
C97 OBM@1u/6.3V_4
C474 OBM@1u/6.3V_4
C199 OBM@1u/6.3V_4
C197 OBM@1u/6.3V_4
C426 OBM@1u/6.3V_4
C423 OBM@10u/6.3V_4

C194 OBM@10u/6.3V_4
C99 OBM@10u/6.3V_4
C196 OBM@10u/6.3V_4
C187 OBM@10u/6.3V_4

C429 OBM@1u/6.3V_4
C424 OBM@1u/6.3V_4
C182 OBM@1u/6.3V_4
C176 OBM@1u/6.3V_4
C430 OBM@1u/6.3V_4

SI1, 0421 add

+SMDDR_VREF_DQ1_M1 +SMDDR_VREF_DQ1_M1

+2.5V_SUS

C479

OBM@68p/50V_4

M_B_DQSP3[2]
M_B_DQSP0[2]

M_B_DQSN3[2]
M_B_DQSN0[2]

R529 OBM@240_1%_4

M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
M_B_A16

M_B_BA#0
M_B_BA#1
M_B_BG#0

M_B_CLK0
M_B_CLK0#
M_B_CKE0 M_B_CKE0

M_B_ODT0_MD M_B_ODT0_MDM_B_ODT0_MD
M_B_CS#0

M_B_DQSP3
M_B_DQSP0

M_B_DQSN3
M_B_DQSN0

M_B_DRAMRST#

M_B3_ZQ0

M_B_PARITY

+VDDQ_VTT

C165 OBM@1u/6.3V_4
C145 OBM@1u/6.3V_4
C451 OBM@1u/6.3V_4
C457 OBM@1u/6.3V_4
C452 OBM@1u/6.3V_4
C147 OBM@1u/6.3V_4
C161 OBM@1u/6.3V_4
C461 OBM@1u/6.3V_4

C454 OBM@10u/6.3V_4
C450 OBM@10u/6.3V_4

DB1 Intel

+SMDDR_VREF_DQ1_M1

C160 [email protected]/16V_4
C431 [email protected]/6.3V_4
C159 [email protected]/25V_4
C477 [email protected]/25V_4
C432 [email protected]/25V_4
C449 [email protected]/25V_4R209 OBM@36_1%_4

DB1 Intel

+SMDDR_VREF_DQ1_M1

C433
[email protected]/50V_4

SI1, 0417 RF

C200
OBM@68p/50V_4

DB1 RF

3

U30

M1

VREFCA

B1

VPP#B1

R9

VPP#R9

P3

A0

P7

A1

R3

A2

N7

A3

N3

A4

P8

A5

P2

A6

R8

A7

R2

A8

R7

A9

M3

A10/AP

T2

A11

M7

A12/BC

T8

A13

L2

WE_n/A14

M8

CAS_n/A15

L8

RAS_n/A16

N2

BA0

N8

BA1

M2

BG0

K7

CK_t

K8

CK_c

K2

CKE

K3

ODT

L7

CS

G3

DQSL_t

B7

DQSU_t

F3

DQSL_c

A7

DQSU_c

E7

DML_n/DBIL_n

E2

DMU_n/DBIU_n

P1

RESET_n

F9

ZQ

N9

TEN

P9

ALERT_n

L3

ACT_n

T3

PAR

T7

NC

96-BALL
DDR4

OBM@DDR4_96P

SI1B, 0603

C478
OBM@2200p/50V_4

2

BYTE3_24-31

BYTE0_0-7

M_B_DQ30

G2

DQL0

F7

DQL1

H3

DQL2

H7

DQL3

H2

DQL4

H8

DQL5

J3

DQL6

J7

DQL7

A3

DQU0

B8

DQU1

C3

DQU2

C7

DQU3

C2

DQU4

C8

DQU5

D3

DQU6

D7

DQU7

B3

VDD#B3

B9

VDD#B9

D1

VDD#D1

G7

VDD#G7

J1

VDD#J1

J9

VDD#J9

L1

VDD#L1

L9

VDD#L9

R1

VDD#R1

T9

VDD#T9

A1

VDDQ#A1

A9

VDDQ#A9

C1

VDDQ#C1

D9

VDDQ#D9

F2

VDDQ#F2

F8

VDDQ#F8

G1

VDDQ#G1

G9

VDDQ#G9

J2

VDDQ#J2

J8

VDDQ#J8

B2

VSS#B2

E1

VSS#E1

E9

R528 OBM@0_5%_4

VSS#E9

G8

VSS#G8

K1

VSS#K1

K9

VSS#K9

M_B_BG#1_3 M_B_BG#1 M_B_BG#1_4 M_B_BG#1

M9

VSS#M9

N1

VSS#N1

T1

VSS#T1

A2

VSSQ#A2

A8

VSSQ#A8

C9

VSSQ#C9

D2

VSSQ#D2

D8

VSSQ#D8

E3

VSSQ#E3

E8

VSSQ#E8

F1

VSSQ#F1

H1

VSSQ#H1

H9

VSSQ#H9

+VREFDQ_SB_M3[2]

+1.2VSUS

M_B_DQ28
M_B_DQ31
M_B_DQ24
M_B_DQ27
M_B_DQ25
M_B_DQ29
M_B_DQ26

M_B_DQ7
M_B_DQ1
M_B_DQ5
M_B_DQ0
M_B_DQ6
M_B_DQ2
M_B_DQ4
M_B_DQ3

R530 *OBM@0_5%_4

C180
OBM@68p/50V_4

M_B_DQ30 [2]
M_B_DQ28 [2]

+2.5V_SUS
M_B_DQ31 [2]
M_B_DQ24 [2]
M_B_DQ27 [2]
M_B_DQ25 [2]
M_B_DQ29 [2]
M_B_DQ26 [2]

M_B_DQ7 [2]
M_B_DQ1 [2]
M_B_DQ5 [2]
M_B_DQ0 [2]
M_B_DQ6 [2]
M_B_DQ2 [2]
M_B_DQ4 [2]
M_B_DQ3 [2]

C166

OBM@68p/50V_4

SI1, 0427 RF

M_B_DQSP1[2]
M_B_DQSP2[2]

M_B_DQSN1[2]
M_B_DQSN2[2]

+1.2VSUS+1.2VSUS+1.2VSUS+1.2VSUS

R222 OBM@240_1%_4

M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
M_B_A16

M_B_BA#0
M_B_BA#1
M_B_BG#0

M_B_CLK0
M_B_CLK0#

M_B_CS#0
M_B_DQSP1

M_B_DQSP2
M_B_DQSN1

M_B_DQSN2

VREF DQ1 M1 Solution

+VREFDQ_SB_M3 +SMDDR_VREF_DQ1_M1

R503 [email protected]_1%_4

R500 OBM@2_1%_6

C421
[email protected]/25V_4

SI1, 0417 RF

C427
[email protected]/16V_4

C195
[email protected]/50V_4

C198
OBM@2200p/50V_4

M_B4_ZQ0

+1.2VSUS

U11

M1

VREFCA

B1

VPP#B1

R9

VPP#R9

P3

A0

P7

A1

R3

A2

N7

A3

N3

A4

P8

A5

P2

A6

R8

A7

R2

A8

R7

A9

M3

A10/AP

T2

A11

M7

A12/BC

T8

A13

L2

WE_n/A14

M8

CAS_n/A15

L8

RAS_n/A16

N2

BA0

N8

BA1

M2

BG0

K7

CK_t

K8

CK_c

K2

CKE

K3

ODT

L7

CS

G3

DQSL_t

B7

DQSU_t

F3

DQSL_c

A7

DQSU_c

E7

DML_n/DBIL_n

E2

DMU_n/DBIU_n

P1

RESET_n

F9

ZQ

N9

TEN

P9

ALERT_n

L3

ACT_n

T3

PAR

T7

NC

96-BALL
DDR4

OBM@DDR4_96P

R513
[email protected]_1%_4

R511
[email protected]_1%_4

DB1 RF

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Tuesday, December 26, 2017

Date: Sheet of

Tuesday, December 26, 2017

Date: Sheet of

2

Tuesday, December 26, 2017

1

BYTE1_8-15
BYTE2_16-23

M_B_DQ10

G2

DQL0

M_B_DQ12

F7

DQL1

M_B_DQ8

H3

DQL2

M_B_DQ15

H7

DQL3

M_B_DQ9

H2

DQL4

M_B_DQ14

H8

DQL5

M_B_DQ11

J3

DQL6

M_B_DQ13

J7

DQL7

M_B_DQ16

A3

DQU0

M_B_DQ20

B8

DQU1

M_B_DQ17

C3

DQU2

M_B_DQ23

C7

DQU3

M_B_DQ19

C2

DQU4

M_B_DQ22

C8

DQU5

M_B_DQ18

D3

DQU6

M_B_DQ21

D7

DQU7

B3

VDD#B3

B9

VDD#B9

D1

VDD#D1

G7

VDD#G7

J1

VDD#J1

J9

VDD#J9

L1

VDD#L1

L9

VDD#L9

R1

VDD#R1

T9

VDD#T9

A1

VDDQ#A1

A9

VDDQ#A9

C1

VDDQ#C1

D9

VDDQ#D9

F2

VDDQ#F2

F8

VDDQ#F8

G1

VDDQ#G1

G9

VDDQ#G9

J2

VDDQ#J2

J8

VDDQ#J8

DB1 Option for 16Gbx16 dieDB1 Option for 16Gbx16 dieDB1 Option for 16Gbx16 dieDB1 Option for 16Gbx16 die

B2

VSS#B2

E1

VSS#E1

E9

VSS#E9
VSS#G8
VSS#K1
VSS#K9

VSS#M9

VSS#N1
VSS#T1

VSSQ#A2
VSSQ#A8

VSSQ#C9
VSSQ#D2
VSSQ#D8
VSSQ#E3
VSSQ#E8
VSSQ#F1
VSSQ#H1
VSSQ#H9

R224 OBM@0_5%_4

G8
K1
K9
M9
N1
T1

A2
A8
C9
D2
D8
E3
E8
F1
H1
H9

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

PROJECT :

DDR4 Memory Down (CH. B)

DDR4 Memory Down (CH. B)

DDR4 Memory Down (CH. B)

1

R214 *OBM@0_5%_4

Z8G

Z8G

Z8G

M_B_DQ10 [2]
M_B_DQ12 [2]
M_B_DQ8 [2]
M_B_DQ15 [2]
M_B_DQ9 [2]
M_B_DQ14 [2]
M_B_DQ11 [2]
M_B_DQ13 [2]

M_B_DQ16 [2]
M_B_DQ20 [2]
M_B_DQ17 [2]
M_B_DQ23 [2]
M_B_DQ19 [2]
M_B_DQ22 [2]
M_B_DQ18 [2]
M_B_DQ21 [2]

11 35

11 35

11 35

11

1A

1A

1A

Vinafix.com

SERIRQ

SERIRQ is 1.8V_S5 at EC side but

SERIRQ is 1.8V_S5 at EC side but

SERIRQ is 1.8V_S5 at EC side butSERIRQ is 1.8V_S5 at EC side but
3V_S5 at CPU/TPM side

3V_S5 at CPU/TPM side

3V_S5 at CPU/TPM side3V_S5 at CPU/TPM side

+3V_S5

+3V_S5[3,6,7,15 ,16,17,18,19,21 ,22,24,2 6,29]
+1.8V_S5[3,4,5,6,7,16,19,23,27,29]
+3V[3,4,5,6,10,1 3,14,15,16,17,18,19,22,24,25,26 ,27,28,29,30]

12

+1.8V_S5 +3V_S5

U1

*NTS0101GW

6

5

4

B

R75 *10K _5%_4

VCCA1VCCB

IRQ_SERIRQ[17,22]

IRQ_SERIRQ SOC_SERIRQ

GND2EO

3

A

R55 *S_4

SOC_SERIRQ

R44 10K _5%_4

+1.8V_S5

SOC_SERIRQ [5]

AL000101006 -> main
AL000101001 -> 2nd
AL002129000 -> 3rd

RSMRST#

C79
*0.1u/16V_4

CPU IO is 3.3V

SOC_RSMRS T# [6]

RSMRST#[22]

R145 *S_4

SOC_RSMRS T#

R153
*100K_1%_4

GNDGND

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Document Nu mber Rev

Size Document Nu mber Rev

Size Document Nu mber Rev

Date: Sheet of

Tuesday, December 26, 2017

Date: Sheet of

Tuesday, December 26, 2017

Date: Sheet of

Tuesday, December 26, 2017

PROJECT :

Level shift/Thermistor

Level shift/Thermistor

Level shift/Thermistor

Z8G

Z8G

Z8G

12 35

12 35

12 35

1A

1A

1A

Vinafix.com

5

eMMC (MMC)

+1.8V

R125 *S_4

C32

[email protected]/16V_4

EC@1u/6.3V_4

D D

C C

+3V

R100 *S_4

[email protected]/16V_4

C43

EC@1u/6.3V_4

15 mils

C46

C56

[email protected]/16V_4

C48

EC@1u/6.3V_4

15 mils

C40

[email protected]/16V_4

C41

C44

EC@1u/6.3V_4

4

+1.8V_EMMC

C55

[email protected]/16V_4

+3V_EMMC EMMC_DATA_3

C36

[email protected]/16V_4

[email protected]/16V_4

+VDDI_EMMC

C37

R415 *EC@0_4

U26

K6

VCCQ_1

AA5

VCCQ_2

W4

VCCQ_3

Y4

VCCQ_4

AA3

VCCQ_5

T10

VCC_1

U9

VCC_2

Power Signals

M6

VCC_3

N5

VCC_4

K2

VDDI

R10

VSS_1

U8

VSS_2

M7

VSS_3

P5

VSS_4

L4

NC#L4

A4

NC_1

A6

NC_2

A9

NC_3

A11

NC_4

B2

NC_5

B13

NC_6

D1

NC_7

D14

NC_8

H1

NC_9

H2

NC_10

H6

NC_11

H7

NC_12

H8

NC_13

H9

NC_14

H10

NC_15

H11

NC_16

H12

NC_17

H13

NC_18

H14

NC_19

J1

NC_20

J7

NC_21

J8

NC_22

J9

NC_23

J10

NC_24

J11

NC_25

J12

NC_26

J13

NC_27

J14

NC_28

K1

NC_29

K3

NC_30

K5

NC_31

K7

NC_32

K8

NC_33

K9

NC_34

K10

NC_35

K11

NC_36

K12

NC_37

K13

NC_38

K14

NC_39

L1

NC_40

L2

NC_41

L3

NC_42

L12

NC_43

L13

NC_44

L14

NC_45

M1

NC_46

M2

NC_47

M3

NC_48

M5

NC_49

M8

RFU#3

M9

RFU#4

M10

RFU#2

M12

NC_53

M13

NC_54

M14

NC_55

N1

NC_56

N2

NC_57

N3

NC_58

N10

RFU#5

N12

NC_60

N13

NC_61

N14

NC_62

P1

NC_63

P2

NC_64

P3

NC_65

P10

RFU#6

P12

NC_67

P13

NC_68

P14

NC_69

GND

NC

3

W6

CLK

W5

CMD

EMMC_DATA_0

H3

DAT0

EMMC_DATA_1

H4

DAT1

EMMC_DATA_2

H5

DAT2

J2

DAT3

EMMC_DATA_4

J3

DAT4

EMMC_DATA_5

J4

DAT5

EMMC_DATA_6

J5

DAT6

EMMC_DATA_7

J6

DAT7

U5

RESET

AA6

VSSQ_1

Y5

VSSQ_2

K4

VSSQ_3

AA4

VSSQ_4

Y2

VSSQ_5

R1

NC_70

R2

NC_71

R3

NC_72

R5

NC_73

R12

NC_74

R13

NC_75

R14

NC_76

T1

NC_77

T2

NC_78

T3

NC_79

T5

R72 *EC@0_4

NC_80

T12

NC_81

T13

NC_82

T14

NC_83

U1

NC_84

U2

NC_85

U3

NC_86

U6

NC_87

U7

NC_88

U10

RFU#7

U12

NC_90

U13

NC_91

U14

NC_92

V1

NC_93

V2

NC_94

V3

NC_95

V12

NC_96

V13

NC_97

V14

NC_98

W1

NC_99

W2

NC_100

W3

NC_101

W7

NC_102

W8

NC_103

W9

NC_104

W10

NC_105

W11

NC_106

W12

NC_107

W13

NC_108

W14

NC_109

Y1

NC_110

Y3

NC_111

Y6

NC_112

Y7

NC_113

Y8

NC_114

Y9

NC_115

Y10

NC_116

Y11

NC_117

Y12

NC_118

Y13

NC_119

Y14

NC_120

AA1

NC_121

AA2

NC_122

AA7

NC_123

AA8

NC_124

AA9

NC_125

AA10

RFU#1

AA11

NC_127

AA12

NC_128

AA13

NC_129

AA14

NC_130

AE1

NC_131

AE14

NC_132

AG2

NC_133

AG13

NC_134

AH4

NC_135

AH6

NC_136

AH9

NC_137

AH11

NC_138

EC@Hynix 32GB

EMMC_RCLK

EMMC_CLK_R

TP1

2

EMMC_CMD

EMMC_CMD [5]

EMMC_DATA_0 [ 5]
EMMC_DATA_1 [ 5]
EMMC_DATA_2 [ 5]
EMMC_DATA_3 [ 5]
EMMC_DATA_4 [ 5]
EMMC_DATA_5 [ 5]
EMMC_DATA_6 [ 5]
EMMC_DATA_7 [ 5]

R66
EC@100K_5%_4

+1.8V

R78
*EC@20K_1%_4

R101 *EC@20K_1%_4

EMMC_RST#

EMMC_RCLK [5]

+1.8V

R85
EC@20K_1%_4

2

R84 *EC@0_4

R98 EC@0_4

C51
*[email protected]/50V_4

EMI request

D2

1

EC@RB500V-40

1

13

EMMC_CLK [5]

PLTRST# [6,16,17,18,22]

EMMC_RST [5]

eDP CONNECTOR (LDS)

B B

C29
100p/50V_4

INT_EDP_HPD#[4]

PJA138K

3

2

Q1

1

R2
100K_5%_4

EDP_HPD

Prevent ESD/EOS Layout near connector

A A

Hall Sensor (HSR)

C210

4.7u/6.3V_4

+3VPCU

2

5

VCC

S

R264

2.2_5%_6

3

1

N

GND

YB8251ST23

Q18

OUTPUT

1st:AL008251000 -- YBT
2nd:AL008132004 -- ANC

LID#

TP_PWR CCD+DMIC_PWRVOUT_BACKLIGHT

R1 33_5%_4

C3
180p/50V_4

C380

0.1u/16V_4

C4

0.1u/25V_4

eDP FHD

C379
1000p/50V_4

EDP_HPD_R

EDP_AUXP[4]
EDP_AUXN[4]

EDP_TXP0[ 4]
EDP_TXN0[4]

EDP_TXP1[ 4]
EDP_TXN1[4]

EDP_TXP2[ 4]
EDP_TXN2[4]

EDP_TXP3[ 4]
EDP_TXN3[4]

Touch Panel-USB

4

co-layout

DualDMIC_PWR

R4 0_5%_4

+3V

R5 *0_5%_4

+1.8V

C377

C378

1000p/50V_4

0.1u/16V_4

co-layout

R16 NVL@0_5%_6

+VIN

R13 VL@0_5%_6

+12V_Panel

R403 *S_6

LCDVCC

R404 *S_4

+3V

R405 *S_4

+5V

EDP_AUXP EDP_AUXP_C

C381 0.1u/16V_4

EDP_AUXN EDP_AUXN_C

C382 0.1u/16V_4
C383 0.1u/16V_4

C384 0.1u/16V_4
C387 0.1u/16V_4

C389 0.1u/16V_4
C391 0.1u/16V_4

C396 0.1u/16V_4
C397 0.1u/16V_4

C398 0.1u/16V_4

USBP7_CCD+[3]

USBP7_CCD-[3]

USBP_TOUCH+[3]
USBP_TOUCH-[3]

+3V

DMIC_DAT[14]
DMIC_CLK[14]

*AZ5725-01F.R7G

D12

EDP_TXP0 EDP_TXP0_C
EDP_TXN0 EDP_TXN0_C

EDP_TXP1 ED P_TXP1_C
EDP_TXN1 EDP_TXN1_C

EDP_TXP2 ED P_TXP2_C
EDP_TXN2 EDP_TXN2_C

EDP_TXP3 ED P_TXP3_C
EDP_TXN3 EDP_TXN3_C

CCD-USB

Reserve for 4K2K panel

TS_EN[22]

PCH_BRIGHT[4]

R406 *100K_5%_4

R407 *100K_5%_4

R437 0_4

D11
*AZ5725-01F.R7G

1 2

1 2

*AZ5725-01F.R7G

MAX 1.5A

R402 *0_5%_6

CCD+DMIC_PWR

DualDMIC_PWR

D10

VOUT_BACKLIGHT

LCDVCC_R

TP_PWR

BL_ON
EDP_HPD_R

DMIC_CLK_C

196538-40041-3

D9
*AZ5725-01F.R7G

1 2

1 2

CN3

40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

3

eDP Power (LDS)

EDP_VDD_EN[4]

eDP Backlight (LDS)

41 42

+3V

R401
100K_5%_4

100K_5%_4

2

PCH_BLON_R

R39

U23

5

IN#2

4

IN#1

3

EN

G5245AT11U

Enable: High Active /2A
GMT:AL005245000
NVT:AL003522001

+3VPCU

R51

10K_5%_4

BL#

34

5

Q7A

2N7002KDW

1

OUT

2

GND

2

C375

0.1u/16V_4

+3V

R30
10K_5%_4

61

Q7B

D1
1N4148WS

2 1

BL_ON

2

Q2
DDTC144EUA-7-F

1 3

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

C371

1u/6.3V_4

PCH_BLON[4]

PCH_BLON_EC[22]

R46 *S_4
R40 *S_4

LCDVCC

C376

C374

0.01u/50V_4

22u/6.3V_6

LID591#,EC intr nal PU

LID# [22]

EC_FPBACK# [22]

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

PROJECT :

eDP/ CCD/eMMC

eDP/ CCD/eMMC

eDP/ CCD/eMMC

1

Z8G

Z8G

Z8G

1A

1A

1A

13 35Tuesday, December 26, 2017

13 35Tuesday, December 26, 2017

13 35Tuesday, December 26, 2017

Vinafix.com

5

4

3

2

1

Codec(ADO)

HP-R2
HP-L2
LINE1-VREFO-L
LINE1-VREFO-R
MIC2-VREFO

CODEC_VREF

30

29

MIC2-VREFO

LINE1-VREFO-L

LINE1-VREFO-R

C339 10u/6.3V_4

AZ_SDIN0_R

INT_AMIC-VREFO

27

28

VREF

LDO1-CAP

SPDIFO/FRO NT JD/GPIO3

D D

+AZA_VDD

+1.5VA

C500

C299

10u/6.3V_4

0.1u/16V_4

ADOGND

Place next to pin 40

Analog

Digital

+5V

C C

Tied at one point only under
the codec or near the codec

R558 *S_4
R555 *S_4
R551 *S_4
R366 *S_4
R359 *S_4
R349 *S_4

B B

ADOGND

Cap need near AVDD1 and AVDD2
power source input

1 2

PBY160808T-600Y-N

C518 *1000p/50V_4
C345 *0.1u/16V_4

L10

10u/6.3V_4

10u/6.3V_4

C509

C508

ADOGND

C506

0.1u/16V_4

Low is power down
amplifier output

C507

0.1u/16V_4

R343 *S_4

+3V

DMIC_DAT[13]
DMIC_CLK[13]

37
38

+5V_PVDD

L_SPK+
L_SPK­R_SPK­R_SPK+

PD#

C313

0.1u/16V_4

39
40
41
42
43
44
45
46
47
48

49

R360 *S_4
R367 22_5%_4

C300 10u/6.3V_4

TP23

DMIC_DAT
DMIC_CLK

Close to Codec

C3202.2u/10V_4

C3292.2u/10V_4

C31910u/6.3V_4

33

34

35

36

CBN

CPVEE

CPVDD
CBP
AVSS2
LDO2-CAP
AVDD2
PVDD1
SPK-L+
SPK-L­SPK-R­SPK-R+
PVDD2
PDB
SPDIF-OUT

DGND

+AZA_VDD

C321
10u/6.3V_4

C331
10p/50V_4

HP-OUT-R

DVDD1GPIO0/DMIC-DATA2GPIO1/DMIC-CLK3DC DET4SDATA-OUT5BCLK6LDO3-CAP7SDATA-IN8DVDD-IO9SYNC10RESETB11PCBEEP

DMIC_DAT_R

DMIC_CLK_R

31

32

HP-OUT-L

25

26

AVSS1

AVDD1

LINE2-L
LINE2-R
LINE1-L
LINE1-R

VD33 STB

MIC-CAP

MIC2-R/SLEEVE

MIC2-L/RING2

MONO-OUT

MIC2/LIN2 JD

HP/LINE1 JD

12

PCBEEP

R378 33_5%_4

C335 *22p/50V_4

C338 2.2u/10V_4
C344 10u/6.3V_4

R379 100K_5%_4

U19

24
23
22

LINE1-L

21

LINE1-R

20
19
18

SLEEVE

17

RING2

16
15
14
13

SENSEA

ALC255-CG

1.6Vrms

C354 0.1u/16V_4

C356

100p/50V_4

ADOGND

+5VA

C348

0.1u/16V_4

C522
10u/6.3V_4

Place next to pin 26

ADOGND

+3VPCU

C528 10u/6.3V_4

trace width of SLEEVE & RING2
are required at least 40mil and
its length should be asshort as possible

Placement near Audio Codec

R383 200K_1%_4
R382 100K_1%_4

BEEP_1

R381 20K_1%_4
R389
10K_5%_4

AZ_CODEC_RST# [5]
AZ_CODEC_SYNC [5]

DVDD_IO

AZ_CODEC_SDIN0 [5,9]

AZ_CODEC_BITCLK [5]

AZ_CODEC_SDOUT [5]

ADOGND

C343

0.1u/16V_4

HP_JD# [20]

+3V

D24 1N4148WS
D22 1N4148WS

+1.5V

Place next to pin 9

Analog

Digital

21
21

C347
10u/6.3V_4

SPKR [5]
PCBEEP_EC [22]

Universal Audio Jack HEADPHONE/MIC/LINE combo (ADO)

MIC2-VREFO

SLEEVE

RING2
HP-L2
HP-R2

LINE1-L
LINE1-VREFO-L
LINE1-VREFO-R
LINE1-R

R561 2.2K_5%_4
R560 2.2K_5%_4

C523 4.7u/6.3V_4
R554 4.7K_5%_4
R559 4.7K_5%_4
C353 4.7u/6.3V_4

R556 62_1%_4
R376 62_1%_4

ADOGND

C536
100p/50V_4

1 2

D29 *AZ5725-01F.R7G

1 2

D28 *AZ5725-01F.R7G

C516

C534

100p/50V_4

100p/50V_4

HP-L3
HP-R3

C333
100p/50V_4

SLEEVE [ 20]
RING2 [20]
HP-L3 [20]
HP-R3 [20]

14

Codec PWR 5V(ADO)

+5V

L12

1 2

PBY160808T-600Y-N

ANALOG DIGITAL

+5VA

40mil

A A

5

4

Mute(ADO)

+AZA_VDD +1.5V

R345

PD#

*10K_5%_4

1K_1%_4

R344

C296
*1u/6.3V_4

2

*RB500V-40

2

RB500V-40

Internal Speaker

R_SPK+
R_SPK­L_SPK­L_SPK+

40mil for each signal

C535
1000p/50V_4

D19

D18

1

1

C532
1000p/50V_4

Q33

321

*PJA138K

C533
1000p/50V_4

3

AZ_CODEC_RST#

AMP_MUTE# [22]

C531
1000p/50V_4

1
2
3
4

CN19

56

50278-00401-V01

Codec PWR 1.5V(ADO)

+1.5V

C495
1u/6.3V_4

2

ANALOG DIGITAL

L6

PBY160808T-600Y-N

+1.5VA

12

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Tuesday, December 26, 2017

Date: Sheet of

Tuesday, December 26, 2017

Date: Sheet of

Tuesday, December 26, 2017

PROJECT :

Audio Codec/HP/SPK/AMIC

Audio Codec/HP/SPK/AMIC

Audio Codec/HP/SPK/AMIC

1

Z8G

Z8G

Z8G

1A

1A

1A

3514

3514

3514

Vinafix.com

From CPU

5

GPU_DDCCLK_Q
GPU_DDCDATA_Q

SI

*0_4

*0_4

R245

R244

MV

+3V_HDMI

D D

HDMI_HPD_C[4]

HDMI_HPD_C

INT_HDMITX2P[4]
INT_HDMITX2N[4]

INT_HDMITX1P[4]
INT_HDMITX1N[4]

INT_HDMITX0P[4]
INT_HDMITX0N[4]

INT_HDMICLK+[4]
INT_HDMICLK-[4]

R527 *10K/F_4
R526 *S_4

C189 0.1U/16V_4
C185 0.1U/16V_4

C181 0.1U/16V_4
C179 0.1U/16V_4

C178 0.1U/16V_4
C177 0.1U/16V_4

C175 0.1U/16V_4
C172 0.1U/16V_4

PS8409 strap pin

+3V_HDMI

R226
*4.7K_4

R233
*4.7K_4

R258
*4.7K_4

SI

R234

4.7K_4

+1.8V

+1.8V

R246
*4.7K_4

C C

B B

A A

I2C_SEL_PIN
EQ_SEL_A0
HDMI_SEL#_A1

DCIN_ENB
EQ_SEL_A0
PRE_SEL

R241
*4.7K_4

DCIN_ENB
DC coupling enable; Internal pull up, 3.3V I/O.
L: DC coupling input
H: Default,AC coupling input

EQ_SEL_A0
Receiver equalization setting; Internal pull up , 3.3V I/O.
L: Compensaton for channel loss up to 13dB
H: Default , Compensation for channel loss up to 17dB
M: Compensation for channel loss up to 11dB

PRE_SEL
Output pre-emphasis setting; Internal pull up, 3.3V I/O.
L: Pre-emphasis =2.5dB
H: Default, No Pre-emphasis

HDMI_SEL#_A1
HDMI_ID enable ; Internal pull down , 3.3V I/O.
L: Default, HDMI ID enable
H: HDMI ID disable

I2C_SEL_PIN
I2C Slave Address selection; Internal pull down, 3.3V I/O.
L: Default, Slave address 0x10-0x2F.
H: Alternative salve address 0x90-0x9F, 0xD0-0xDF.

5

HDMI_HPD_DC

GPU_D2_C
GPU_D2#_C

HDMI_HPD_DC

GPU_D1_C
GPU_D1#_C

GPU_D0_C
GPU_D0#_C

GPU_CLK_C
GPU_CLK#_C

HDMI_DDCCLK_SW[4]

HDMI_DDCDATA_SW[4]

4

GPU_DDCDATA_Q
GPU_DDCCLK_Q

HDMI_RST#

R240 4.99K/F_4

37

POWERSWITCH

38

IN_D2p

39

IN_D2n

40

HPD_SRC

41

IN_D1p

42

IN_D1n

43

+1.2V

+1.2V

R257 *2.2K_5%_4

R261 *2.2K_5%_4

VDDRX12#1

44

IN_D0p

45

IN_D0n

46

VDDRX12#2

47

IN_CLKp

48

IN_CLKn

49

EPAD

+3V_HDMI

DCIN_ENB

Place Ci,Cj,Ck close to U12 pin7,11
Place Cl,Cm,Cn,Co close to U12 pin46

Ci

Close to U1025 PIN7,11

4

+3V_HDMI

+1.2V

+1.2V

3

TX2_HDMI+
TX2_HDMI­HDMI_HPD
TX1_HDMI+
TX1_HDMI-

TX0_HDMI+
TX0_HDMI-

TXC_HDMI+
TXC_HDMI-

35

36

REXT

VDD33#1

1

2

EQ_SEL_A0

HDMI_SEL#_A1

32

34

33

RESETB

HDMI_ID

SCL_SRC/AUXP

SDA_SRC/AUXN

PDB4DCIN_ENB

EQ

TESTMODEB

3

5

+1.2V +1.2V

I2C_SEL_PIN

+1.2V

29

31

30

CSCL

VDD12#2

I2C_ADDR

SDA_SNK8SCL_SNK

VDD12#1

7

6

28

CSDA

HDMI_CEC9CEC_EN

PRE_SEL

26

27

PRE

RSV1

11

10

CSCL
CSDA

25

NC

RSV2

VDD33#2
OUT_D2p
OUT_D2n
HPD_SNK
OUT_D1p
OUT_D1n

VDDTX12#1

OUT_D0p
OUT_D0n

VDDTX12#2

OUT_CLKp
OUT_CLKn

VDDA12

12

HDMI_SDATA
HDMI_SCLK

U12
PS8409AQFN48GTR2-A0

24
23
22
21
20
19
18
17
16
15
14
13

Prevent current leakage when GPU is power off
add R12317/R1231 is for HMDI verify

+3V_HDMI

R248

C169

0.01U/50V_4

2.2K_5%_4

R262 *S_4
R243 *0_4

R263 *0_4
R260 *S_4

GPU_DDCCLK_Q
DDCCLK_NOR

DDCDATA_NOR
GPU_DDCDATA_Q

co-layout Close CN5

Cj

Ck

Cl

C168

0.1U/16V_4

C464

0.1U/16V_4

C466

0.1U/16V_4

+1.2V

Cm

C463

0.1U/16V_4

R256

2.2K_5%_4

Cn

*SSM6N43FU

Jon_10/14

C462

0.01U/50V_4

5

Q17A

2

Q17B

󵙄󵙄󵙄󵙄󱠜󱠜󱠜󱠜󵙉󵙉󵙉󵙉󲒂󲒂󲒂󲒂󲅙󲅙󲅙󲅙

Co

C171
10u/6.3V_4

Close to U1025 PIN46

Cp

Cq

C465

C467

0.01U/50V_4

0.1U/16V_4

Close to U1025 PIN15,18 Close to U1025 PIN30

3

Reset

+1.8V

34

61

+1.2V

Cr

+3V_S5[3,6,7,12,16,17,18,19,21,22,24,26,29]

+3V[3,4,5,6,10,13,14,16,17,18,19,22,24,25,26,27,28,29,30]
+1.2V[26,30]

+5V[13,14,17,19,24,30]

+3V_HDMI

10K/F_4
R242

HDMI_RST#

C201

1U/6.3V_4

DDCCLK_NOR-1

DDCDATA_NOR-1

1.2V

R231 *0_4

R230 *0_4

+5V

Jon_10/14

Close to U1025 PIN15,18 Close to U1025 PIN1

Cs

C470

C468

0.01U/50V_4

0.1U/16V_4

Place Cp,Cq,Cr close to U12 pin15,18
Place Cs,Ct close to U12 pin30

Optional

40 mils

󵙄󵙄󵙄󵙄󱠜󱠜󱠜󱠜󵙉󵙉󵙉󵙉󲒂󲒂󲒂󲒂󲅙󲅙󲅙󲅙

Ct

C469

0.1U/16V_4

Reserve

TXC_HDMI+

TXC_HDMI-

HDMI_SCLK

HDMI_SDATA

+5V_HDMIC

U8

3

IN

G5250Q1T73U

1.2V

MAINON[22,24,25,26,29,30]

*10K/F_4
R259

CSCL
CSDA

OUT

GND

2

C167
*3.3P/50V_4

+3V_HDMI

*10K/F_4
R247

R227 *0_4

R220
*100K_4

*1U/6.3V_4

Layout note:Place close to HDMI Conn

1

C156
*220p/50V_4

2

Cu

Cv

C186

C190

0.01U/50V_4

0.1U/16V_4

2

MV

R201 *S_6

+3V

R200 *0_6

+3V_S5

+3VS5_HDMI

C154
1U/6.3V_4

C162

U7

5

IN#2

4

IN#1

3

ON/OFF

*G5245AT11U

R217 *S_6

EMI Solution

TX2_HDMI+

R237 *150/F_4

TX1_HDMI+

R236 *150/F_4

TX0_HDMI+

R235 *150/F_4

TXC_HDMI+

R232 *150/F_4

TX2_HDMI+
TX2_HDMI-

TX1_HDMI+ TX1_HDMI+
TX1_HDMI- TX1_HDMI-

TX0_HDMI+
TX0_HDMI-

TXC_HDMI+ TXC_HDMI+
TXC_HDMI-

For ESD Layout note:Place close to HDMI Conn

R524 2.2K_4
R525 2.2K_4

C460 *10P/50V_4
C456 *10P/50V_4

HDMI_HPD

D4
*VARISTOR

+3V_HDMI

Cw

C164

C170
10U/6.3V_6

0.1U/16V_4

U10

NC46IN4

7

NC3

8

GND2

9

NC2

10

NC1

*AZ1045-04F.R7G

U9

NC46IN4

7

NC3

8

GND2

9

NC2

10

NC1

*AZ1045-04F.R7G

TX2_HDMI+
TX2_HDMI-

TX1_HDMI+
TX1_HDMI-

TX0_HDMI+
TX0_HDMI-

TXC_HDMI+
TXC_HDMI-

HDMI_SCLK
HDMI_SDATA

+5V_HDMIC

VC1
*TVM0G5R5M220R

Place Cu,Cv close to U12 pin24
Place Cw close to U12 pin1

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

C455
220P/50V_4

HDMI/Re-timer

HDMI/Re-timer

HDMI/Re-timer

Tuesday, December 26, 2017

Tuesday, December 26, 2017

Tuesday, December 26, 2017

1

15

+3V_HDMI

1

OUT

2

GND

TX2_HDMI+

5

TX2_HDMI-

4

IN3

3

GND1

2

IN2

1

IN1

TX0_HDMI+

5

TX0_HDMI-

4

IN3

3

GND1

2

IN2

TXC_HDMI-

1

IN1

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

PROJECT :

C157

0.1U/16V_4

TX2_HDMI­TX1_HDMI­TX0_HDMI­TXC_HDMI-

2021

1

D2+

2

D2_shield

3

D2-

4

D1+

5

D1_shield

6

D1-

7

D0+

8

D0_shield

9

D0-

10

CLK+

11

CLK_shield

12

CLK-

13

CEC

14

NC

15

DDC CLK

16

DDC DATA

17

GND

18

+5V

19

HP DET

Z8G

Z8G

Z8G

15 35

15 35

1

15 35

CN6

HMRBL-AK120C

23 22

1A

1A

1A

Vinafix.com

5

LAN & Card reader Combo (LAN)

1

Y1
25MHZ/30ppm

3

U15

49

E_PAD

1

MDIP0

2

MDIN0

3

AVDD10#1

4

MDIP1

5

MDIN1

6

MDIP2

7

MDIN2

8

AVDD10#2

9

MDIP3

10

MDIN3

11

AVDD33#1

12

DVDD33_CR

VCC_XD

C502 0.1u/16V_4

SP1=SD_D1
SP2=SD_D0=MS_D1
SP3=SD_CLK=MS_D0
SP4=SD_CMD=MS_D2
SP5=SD_D3=MS_D3
SP6=SD_D2=MS_CLK

LAN_XTALI

LAN_XTAL2

RSET

10 mils

TP15

TP52

TP16

48

47

44

43

42

41

40

46

LED0

RSET

AVDD33

AVDD10

SD_CD#

MS_CD#

CKXTAL245CKXTAL1

CARD_3V313SD_D114SD_D0/MS_D115SD_CLK/MS_D016SD_CMD/MS_D217SD_D3/MS_D318SD_D2/MS_CLK19EVDD1020HSIP21HSIN22REFCLK_P23REFCLK_N

39

38

37

LED3

LED_CR

LED1/GPO

LANWAKEB

SD_WP/MS_BS

24

VDD10

C251 10p/50V_4

VDD10

VDD10

C250 10p/50V_4

VDD10

LANVCC

2

4

R294 2.49K_1%_4

MDI_0+
MDI_0-

MDI_1+
MDI_1­MDI_2+
MDI_2-

MDI_3+
MDI_3-

+3V_CR

main: BG625000185 -> Muruta
2nd : BG625000181 -> TXC
3rd : BG6250000D0 -> HOSONIC

D D

LANVCC

R352 *S_6

C C

+3V

SP8=SD_CD#

PCIE_LAN_WAKE#_R

TP17
TP18

REGOUT

VDDREG

ENSWREG_H

DVDD10
DVDD33

ISOLATEB

PERSTB

CLKREQB
VDD33/18

HSON
HSOP

RTL8411B-CG

4

36
35
34
33
32
31
30
29
28
27

PCIE_RX2-_LAN_C

26

PCIE_RX2+_LAN_C

25

ISOLATEB

CLK_LAN_REQ#
SP7=SD_WP=MS_BS

VDD33/18

REGOUT
LANVCC

VDD10
LANVCC

C310 0.1u/16V_4
C309 0.1u/16V_4

CLK_PCIE_LANN [3]
CLK_PCIE_LANP [3]

PCIE_TXN2_LAN [3]
PCIE_TXP2_LAN [3]

C292 1000p/50V_4

PCIE_RXN2_LAN [3]
PCIE_RXP2_LAN [3]

PLTRST# [6,13,17,18,22]

+3V

3

R340
1K_1%_4

R342
15K_1%_4

Card Reader (CRD)

SP1=SD_D1
SP2=SD_D0=MS_D1
SP4=SD_CMD=MS_D2
SP5=SD_D3=MS_D3
SP6=SD_D2=MS_CLK

C349

4.7u/6.3V_4

VCC_XD

EMI

C322 *10p/50V_4
C330 *10p/50V_4
C537 *10p/50V_4
C538 *10p/50V_4
C370 *10p/50V_4

C350

0.1u/16V_4

SP3=SD_CLK=MS_D0

C336
10p/50V_4

2

SP5=SD_D3=MS_D3
SP4=SD_CMD=MS_D2

SP3=SD_CLK=MS_D0 SD_CLK_R

SP2=SD_D0=MS_D1
SP1=SD_D1
SP6=SD_D2=MS_CLK
SP8=SD_CD#
SP7=SD_WP=MS_BS

R377 0_4

reserve for EMI

VCC_XD

1

16

13

GND#2

GND#1

12

15

Hole#1

156-1001902602

14

CN2

Hole#2

1

CD/DAT3

2

CMD

3

VSS

4

VDD

5

CLK

6

VSS#2

7

DAT0

8

DAT1

9

DAT2

10

CD

11

WP

TAI - SOL

TAI - SOL

TAI - SOLTAI - SOL

WAKE#/REQ# circuit(LAN)

B B

PCIE_LAN_WAKE#[3]

CLK_PCIE_LAN_REQ#[3]

A A

PCIE_LAN_WAKE#_R

CLK_LAN_REQ#

5

+1.8V_S5

Q22A

R3340_4

Q22B

R3480_4

*SSM6N43FU

LANVCC

5

2

R290
10K_5%_4

R350
10K_5%_4

PCIE_LAN_WAKE#_R

CLK_LAN_REQ#

4

34

61

LANVCC

C275

C244

C293

0.1u/16V_4

For RTL8411B
Place 0.1uF,CAP close to each VDD33 pin -- 11,32,48

RTL8411B (LDO mode)

REGOUT

40 mils (Iout=1A) 40 mils (Iout=1A)

+3VPCU

LANPWR#[22]

R564

*AC@10K_5%_4

0.1u/16V_4

R297 *S_6

C245

0.1u/16V_4

C539
*AC@1u/6.3V_4

0.1u/16V_4

60 mils

C261

4.7u/6.3V_4

Closed to Pin35

close to each VDD10 pin-- 3, 8, 33, 46

C490

C494

0.1u/16V_4

R563

*AC@100K_5%_4

Q37
*AC@AO3413

1

0.1u/16V_4

2

C489

C492

0.1u/16V_4

0.1u/16V_4

LANVCC

3

C260
10u/6.3V_4

3

C258

0.1u/16V_4

C276

0.1u/16V_4

10 mils

VDD33/18

Close to Pin20

VDD10

C497
1u/6.3V_4

C277
*0.1u/16V_4

C311

C312

*4.7u/6.3V_4

0.1u/16V_4

Place close to pin 27

C496

0.1u/16V_4

60 mils

R320 0_6

C259
*0.1u/16V_4

+3V_S5

Tramsformer

MDI_0+
MDI_0-

MDI_1+
MDI_1-

MDI_2+
MDI_2-

MDI_3+
MDI_3-

C54

0.01u/50V_4

TF height limit = 4mm

EJ series Vender

DB0LL1LAN00

DB0X81LAN01

DB0Z06LAN00

TF height limit = 2.4mm

DB0Z8PLAN00

2

25

U25

10
11
12

VenderCloudbook

1
2
3
4
5
6
7
8
9

FCE

PSK

BOT

PSK

TCT1
TD1+
TD1­TCT2
TD2+
TD2­TCT3
TD3+
TD3­TCT4
TD4+
TD4-

NS892407

24

NC #4

GND

23

MX1+

22

MX1-

21

NC #3

20

MX2+

19

MX2-

18

NC #2

17

MX3+

16

MX3-

15

NC #1

14

MX4+

13

MX4-

Descripiton

TRANSFORMER LL1 LAN 24P(NS892407)

TRANSFORMER X81 GIGA LAN (A-8300G)

TRANSFORMER Z06 LAN 24P(GST5009B LF)

Descripiton

TRANSFORMER Z8P LAN (A-8300G-SLIM)

Layout:All termination
signal should have 30
mil trace

LAN_MCT0
LAN_MX0+
LAN_MX0­LAN_MCT1
LAN_MX1+
LAN_MX1­LAN_MCT2
LAN_MX2+
LAN_MX2­LAN_MCT3
LAN_MX3+
LAN_MX3-

9

10

CN4

LAN_MX0+

1

LAN_MX0-

2

LAN_MX1+

3

LAN_MX2+

4

LAN_MX2-

5

LAN_MX1-

6

LAN_MX3+

7

LAN_MX3-

8

JMP1H01-R3401-7H

11

12

R65 EJ@75_1%_8

R63 EJ@75_1%_8

R64 EJ@75_1%_8

R62 EJ@75_1%_8

TERM9

C410
EJ@1000p/3KV_1808

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

PROJECT :

LAN/CRD COMBO - RTL8411B

LAN/CRD COMBO - RTL8411B

LAN/CRD COMBO - RTL8411B

Tuesday, December 26, 2017

Tuesday, December 26, 2017

Tuesday, December 26, 2017

1

Z8G

Z8G

Z8G

16 35

16 35

16 35

1A

1A

1A

Vinafix.com

5

2.5" SATA HDD (HDD)

EJ@GS12201-1011-7H

22

24

20
19
18
17
16
15

D D

C C

B B

14
13
12
11
10

9
8
7
6
5
4
3
2
1

21

23

25 26

CN12

CN11

10

9
8
7
6
5
4
3

2

1

11 12

CB@132F10-000000-A2-R

+3V + 601_VCC

R302 *S_ 4

SATA_TXP0[3]

SATA_TXN0[3]

SATA_RXN0[3]
SATA_RXP0[3]

C488
EJ@10u/6.3V_4

SATA_DEVSLP0 [5]

HDD+M2_PWR +5V_ODD_R

C504

0.01u/50V_4

0.01u/50V_4

R363 w /o GS@0_5%_4

SATA_RXP0_CN SATA_RXP0_RD
SATA_RXN0_CN SATA_RXN0_RD

SATA_TXN0_CN SATA_TXN0_RD
SATA_TXP0_CN SATA_TXP0_RD

C314 [email protected]/50V_4
C303 [email protected]/50V_4

C307 [email protected]/50V_4
C297 [email protected]/50V_4

co-layout

SATA_TXP0_M2
SATA_TXN0_M2

SATA_RXN0_M2
SATA_RXP0_M2

SATA_DEVSLP0
HDD+M2_PWR

C298 [email protected]/50V_4
C308 [email protected]/50V_4

C304 [email protected]/50V_4
C315 [email protected]/50V_4

Close to pin6/16 of IC

C493
EJ@1u/6.3V_4

+601_VCC

C255 [email protected]/50V_4
C257 [email protected]/50V_4

C265 [email protected]/50V_4
C268 [email protected]/50V_4

C274
EJ@1u/6.3V_4

A_EQ1
A_EQ2

SATA_TXP0_C
SATA_TXN0_C

SATA_RXN0_C
SATA_RXP0_C

EN
A_DE
B_DE

C252
[email protected]/16V_4

U14

6

VDD#1

16

VDD#2

18

A_EQ1

19

A_EQ2

1

A_INP

2

A_INN

4

B_OUTN

5

B_OUTP

7

EN

9

A_DE

8

B_DE

60mil

C301

ACCEL_INT2 [1 9]

SATA_TXP0_RD
SATA_TXN0_RD

SATA_RXN0_RD
SATA_RXP0_RD

C287
[email protected]/16V_4

EJ@PS8527BTQFN20GTR2-A2

B_EQ2
B_EQ1

A_OUTP

A_OUTN

B_INN
B_INP

GND#1
GND#2
GND#4
GND#5
GND#6

GND#3

GND#7

21

25

0.1u/16V_4

REXT

C302

C499

0.1u/16V_4

R292 *4.7K _5%_4
R288 *4.7K _5%_4

R303 *4.7K _5%_4
R301 *4.7K _5%_4

R336 *4.7K _5%_4
R341 *4.7K _5%_4

C284 *0.1u /16V_4

10

R332 EJ @4.99K_1%_4

B_EQ2

17

B_EQ1

20

SATA_TXP0_RD

15

SATA_TXN0_RD

14

SATA_RXN0_RD

12

SATA_RXP0_RD

11

3
13
22
23
24

C503

10u/6.3V_4

TPM NPCT650 (TPM)

R308 *S_ 4

C294 TPM@10u/6.3V_4
C325 [email protected]/16V_4
C272 [email protected]/16V_4
C306 [email protected]/16V_4

22

14

PLTRST#

U18

VHIO#2

15

LAD3

18

LAD2/SPI_IRQ

21

LAD1/MOSI

24

LAD0/MISO

20

LFRAME/SCS

27

SERIRQ

19

LCLK/SCLK

13

CLKRUN/GPIO04/SINT

17

LRESET/SPI_RST/SRESET

28

LPCPD

26

NC7

31

NC8

EPAD

33

VHIO#1

IRQ_SERIRQ SERIRQ_TPM

IRQ_SERIRQ[12,22]

A A

R309 *0_4

LPC_LAD3[5,18,22]
LPC_LAD2[5,18,22]
LPC_LAD1[5,18,22]
LPC_LAD0[5,18,22]

LPC_LFRAME#[5,18,2 2]

PCLK_TPM[5]

CLKRUN#[5,22]

LPC_LAD3
LPC_LAD2
LPC_LAD1
LPC_LAD0
LPC_LFRAME#
SERIRQ_TPM
PCLK_TPM

3/4 EMI request add 33p near TPM IC

CLKRUN#

C326 TPM@33p/50V_4

5

8

VDD1

GND2

GND19GND323GND4

16

1

VSB

GPX/GPIO2

GPIO1/SCL

SDA/GPIO0

GPIO3/BADD

TEST

NC1
NC2
NC3
NC4

Reserved

NC6

TPM@NPCT650ABBYX

32

C266 TPM@10u/6.3V_4
C270 [email protected]/16V_4

TPM_PP

4

PP

3
30

29

TPM_BADD

6
5

2
7
10
11
12
25

4

co-layout

R358 CB@0_5%_8
R386 EJ @0_5%_8

C498
*100u/6.3V_12

A_EQ1

R293 *4.7K _5%_4

A_EQ2

R289 *4.7K _5%_4

B_EQ1

R299 *4.7K _5%_4

B_EQ2

R300 *4.7K _5%_4

A_DE

R328 *4.7K _5%_4

B_DE

R339 *4.7K _5%_4

EN

R546 *4.7K _5%_4

Equalization level setting
for Channel x(x=A/B), internally
tied to VDD/2
[x_EQ2, x_EQ1] ==
L/M: for channel loss up to 2.4dB
L/L: for channel loss up to 7.4dB
L/H: for channel loss up to 14.4dB
M/M: for channel loss up to 12.2dB
M/L: for channel loss up to 9.4dB
M/H: for channel loss up to 13.3dB
H/M: for channel loss up to 6.2dB
H/L: for channel loss up to 11.2dB
H/H: for channel loss up to 5dB

De-emphasis level setting
for Channel x(x=A/B), internally
tied to VDD/2
[x_DE] ==
M: -3.5dB
L: 0dB
H: -1.5dB

TP21

R338 *10K _5%_4

BADD SELECTION

01EEh - EFh

'1' - pin is left open.
'0' - pin is pulled down.

+3V_S5

7Eh - 7Fh

4

+3V
+5V

USB ODD Bridge (ODD)

CN16

ODD@18 pin conn

+601_VCC

19 20

+3V_ASM

+1.2V_ASM

BG625000185 -> Muruta
BG625000181 -> TXC
BG6250000D0 -> HOSONIC

M.2 PCPIE & SATA SSD (NGF)

PCIE_RX1-_SSD[3]
PCIE_RX1+_SSD[3]

PCIE_TX1-_SSD[3]
PCIE_TX1+_SSD[3]

SATA_RXP1[3]

SATA_RXN1[3]

SATA_TXN1[3]
SATA_TXP1[3]

PCIE_RX0-_SSD[3]

PCIE_RX0+_SSD[3]
PCIE_TX0-_SSD[3]

PCIE_TX0+_SSD[3]

R479 PSD@0_5 %_4
R471 PSD@0_5 %_4

C412 [email protected]/16V_4
C413 [email protected]/16V_4

C420 [email protected]/50V_4
C419 [email protected]/50V_4

C414 [email protected]/50V_4
C415 [email protected]/50V_4

R494 PSD@0_5 %_4
R495 PSD@0_5 %_4

C417 [email protected]/16V_4
C418 [email protected]/16V_4

18
17
16
15
14
13
12

C529

11

[email protected]/50V_4

10
9
8
7

ODD_RXP_C ODD_RXP

6

ODD_RXN_C ODD_RXN

5
4

ODD_TXN_C ODD_TXN

3

ODD_TXP_C ODD_TXP

2
1

[email protected]/50V_4

C517 [email protected]/50V_4
C520 [email protected]/50V_4

C525 [email protected]/50V_4
C530 [email protected]/50V_4

Internal 1.2V voltage (Switching)

Close to ASM1153

C249 [email protected]/16V_4
C288 [email protected]/16V_4
C262 [email protected]/16V_4
C246 [email protected]/16V_4
C316 [email protected]/16V_4

C256 [email protected]/16V_4
C243 [email protected]/16V_4
C324 [email protected]/16V_4
C317 [email protected]/16V_4
C254 [email protected]/16V_4
C295 [email protected]/16V_4

ASM_XIN

1

2

Y2
ODD@25MHZ/30ppm

C318
[email protected]/50V_4

4

3

ASM_XOUT

PCIE_RX1-_SSD_R
PCIE_RX1+_SSD_R

PCIE_TX1-_SSD_C
PCIE_TX1+_SSD_C

SATA_RXP1_R
SATA_RXN1_R

SATA_TXN1_C
SATA_TXP1_C

CLK_PCIE_SSD_N[3]
CLK_PCIE_SSD_P[3]

co-layout

NGFF_SATA_DET#[5]

3

3

C524

+5V_ODD

[email protected]/10V_4

R141

*0_5%_4

[email protected]/16V_4

Close to ASM1153

+1.2V_ASM

ODD@10u/6.3V_4

C241

60mil

C527

ODD@10u/6.3V_4

1 2

L4 [email protected]_3.2x2.5x1.55

C263

PGND

C248 [email protected]/6.3V_4

PGND

+3V_ASM
SPI_DI
SPI_CLK
+3V_ASM
SPI_DO
SPI_CS0
+1.2V_ASM

R295 [email protected]_5%_4
R296 [email protected]_5%_4

+3V_ASM

C271
ODD@1u/6.3V_4

[email protected]/16V_4

7677
1
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33
35 36
37 38
39 40
41

45 46
47 48
49 50
51 52
53 54
55 56
57 58

67 68
69 70
71 72
73 74
75

R552 ODD@0_8

C521

C514
*ODD@100u/6.3V_12

VCC1.2O

>40mil

49

48

LXI

EPAD

1

VCCIN

2

I2C_DATA

3

I2C_CLK

4

VCC#1

5

GPIO5

6

GPIO4

7

VDD#1

8

GPIO3

9

GPIO2

10

VBUS

11

VBUS_LDO

12

VCCO

VDDU#113VCCU#114UDP15UDM16REXT17VCCU#218UTXN19UTXP20GNDA#121URXN22URXP23VDDU#2

+3V_ASM

C323

+1.2V_ASM

+3V +3V_M2

20mil

R515 *S_ 4

CN5

7879

2

R175 *10K _5%_4

34

42
4443

CLKREQ_SSD#

+3V_M2

SSD@NASM0-S6701-TS40

R307
*0_4

PGND

47

46

PGND

TP47

TP49
TP48

+1.2V_ASM

HDDPC_48

45

43

GPIO144GPIO0

VDD#3

HDDPC

USBP7-_ODD

USBP7+_ODD

+5V_ODD

+3V_ASM

TP20

TP19

41

39

38

42

40

RST#

VCC#2

TEST_EN

UART_TX

UART_RX

USB3_3_RXP_CN

USB3_3_RXN_CN

USB3_3_TXP_CN

USB3_3_TXN_CN

R318

[3]

[3]

[email protected]_1%_4

C437 10u/6.3V_4
C439 0.1u/16V_4
C443 0.1u/16V_4
C435 0.1u/16V_4
C442 0.1u/16V_4

SATA_DEVSLP1 [5]

PLTRST# [6,1 3,16,18,22]

2

HDDPC_48

R337
ODD@100K_5%_4

C291 ODD@1u/6.3V_4

R346 [email protected]_5%_4

37

U16

GPIO6

36

VDD#2

35

GPIO7

34

VCCS

33

STXP

32

STXN

31

GNDA#2

30

SRXN

29

SRXP

28

VDDS

27

VCCTXL

26

XO

25

XI

ODD@ASM1153

24

2

ODD POWER Control (reserve)

+5V

+3V_ASM

R347
*ODD@100K_1%_4

R322
*[email protected]_5%_4

C269
*ODD@10u/6.3V_4

+1.2V_ASM

R355 [email protected]_5%_4

+3V_ASM
ODD_TXP
ODD_TXN

ODD_RXN
ODD_RXP
+1.2V_ASM
+3V_ASM
ASM_XOUT
ASM_XIN

SPI_CS0
SPI_CLK
SPI_DO
SPI_DI

+3V_ASM

USB3_3_TXP_CN
USB3_3_TXN_CN
USB3_3_RXP_CN
USB3_3_RXN_CN

C407 [email protected]/16V_4
C406 [email protected]/16V_4
C290 [email protected]/16V_4
C285 [email protected]/16V_4

+3V_S5 +3V_M2

CLK_PCIE_SSD_REQ# CLKREQ_SSD#

S5 S0

CLK_PCIE_SSD_REQ#[3]

2

AKE35ZN0N00 (1 Mb)...EC
AKE37FN0N05 (4 Mb)...ODD

U31

1
6
5
2

3

ODD@W25X10CLSNIG

VCCA1VCCB

GND2EO

3

A

*PSD@NTS0101GW

R319
*ODD@100K_1%_4

3

Q20
*ODD@2N7002K

1

CS
CLK
DI
DO

HOLD

WP

U2

B

+3V_ASM

8

VCC

7
4

GND

USB3_3_TXP [ 3]
USB3_3_TXN [3]

6

5

R140 *PS D@10K_5%_4

4

+3V_M2

R134

PSD@10K_5%_4

321

Q11

PSD@2N7002K

R572 *PS D@0_5%_4

Size Document Num ber Rev

Size Document Num ber Rev

Size Document Num ber Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

1.5A 60mil

+5V

R291 ODD@0_5%_8

6
524

1

Q19
*ODD@AO6402A

3

C483
[email protected]/16V_4

USB3_3_RXP [3]
USB3_3_RXN [3]

+3V_S5

+3V_M2+3V _S5

R142
PSD@10K_5%_4

CLKREQ_SSD#

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

PROJECT :

HDD/ODD/TPM NPCT650/Hole

HDD/ODD/TPM NPCT650/Hole

HDD/ODD/TPM NPCT650/Hole

1

+5V_ODD

Z8G

Z8G

Z8G

17 35Tuesday, December 26, 2017

17 35Tuesday, December 26, 2017

17 35Tuesday, December 26, 2017

17

1A

1A

1A

Vinafix.com

5

NGFF_M.2 WiFi & BT (NGF)

D D

USBP4+[3]

USBP4-[3]

CNVI_WGR_DAT1_N[3]
CNVI_WGR_DAT1_P[3]

CNVI_WGR_DAT0_N[3]
CNVI_WGR_DAT0_P[3]

CNVI_WGR_CLK_N[3]
CNVI_WGR_CLK_P[3]

C C

B B

PCIE_TXP3_WLAN[3]
PCIE_TXN3_WLAN[3]

PCIE_RXP3_WLAN[3]
PCIE_RXN3_WLAN[3]

CLK_PCIE_WLANP[3]

CLK_PCIE_WLANN[3]

CNVI_WT_DAT1_N[3]
CNVI_WT_DAT1_P[3]

CNVI_WT_DAT0_N[3]
CNVI_WT_DAT0_P[3]

CLK_PCI_LPC[5]

LPC_LFRAME#[5,17,22]

CNVI_WT_CLK_N[3]
CNVI_WT_CLK_P[3]

CNVI_WGR_DAT1_N
CNVI_WGR_DAT1_P

CNVI_WGR_DAT0_N
CNVI_WGR_DAT0_P

CNVI_WGR_CLK_N
CNVI_WGR_CLK_P

PCIE_TXP3_WLAN
PCIE_TXN3_WLAN

PCIE_RXP3_WLAN
PCIE_RXN3_WLAN

CLK_PCIE_WLANP
CLK_PCIE_WLANN

CNVI_WT_DAT1_N
CNVI_WT_DAT1_P

CNVI_WT_DAT0_N
CNVI_WT_DAT0_P

CNVI_WT_CLK_N
CNVI_WT_CLK_P

USBP4+
USBP4-

R373 *DBG@0_5%_4
R374 *DBG@0_5%_4

Co-lay

R368 CNV@0_5%_4
R369 CNV@0_5%_4

4

76

76

1

1

3

3

5

5

7

7

9

9

11

11

13

13

15

15

17

17

19

19

21

21

23

23

33

33

35

35

37

37

39

39

41

41

43

43

45

45

47

47

49

49

51

51

53

53

55

55

57

57

59

59

61

61

63

63

65

65

67

67

69

69

71

71

73

73

75

75

77

77

78

CN9

78

2

2

4

4

6

6

8

8

10

10

12

12

14

14

16

16

18

18

20

20

22

22

32

32

34

34

36

36

38

38

40

40

42

42

44

44

46

46

48

48

50

50

52

52

54

54

56

56

58

58

60

60

62

62

64

64

66

66

68

68

70

70

72

72

74

74

79

APCI0076-P001A

79

BT_ENCLKREQ_WLAN#
RF_EN

3

+WL_VDD

CNVI_RF_RESET#
XTAL_CLKREQ

CNVI_BRI_RSP

CNVI_RGI_DT
CNVI_RGI_RSP
CNVI_BRI_DT

CNVI_GNSS_PA_BLANKING
CNVI_MFUART2_TXD
CNVI_MFUART2_RXD

BT_EN [22]

R370 DBG@0_5%_4
R361 DBG@0_5%_4
R356 DBG@0_5%_4

LPC_LAD0_C

+WL_VDD

RF_EN [22]

LPC_LAD1 [5,17,22]
LPC_LAD2 [5,17,22]
LPC_LAD3 [5,17,22]

CNVI_RF_RESET# [3,9]
XTAL_CLKREQ [3,9]

CNVI_BRI_RSP [3,9]

CNVI_RGI_DT [3,9,22]

CNVI_RGI_RSP [3,9]

CNVI_BRI_DT [3,9]

CNVI_GNSS_PA_BLANKING [5]

CNVI_MFUART2_TXD [5]

CNVI_MFUART2_RXD [5]

C305 180p/50V_4

LPC_LAD0
CLK_PCI_LPC
LPC_LFRAME#

R371 *DBG@0_5%_4

Co-lay

R372 CNV@0_5%_4

PCIE_CLKREQ_WLAN#[3]

PLTRST# [6,13,16,17,22]

CLKIN_XTAL_LCP_CLPC_LAD0_C

2

VCCA1VCCB

GND2EO

3

A

S5

LPC_LAD0 [5,17,22]

U17

6

5

R321 *10K_5%_4

4

B

*NTS0101GW

R353

10K_5%_4

CLKIN_XTAL_LCP_C [3]

+WL_VDD+3V_S5

CLKREQ_WLAN#PCIE_CLKREQ_WLAN#

+WL_VDD

321

Q23

2N7002K

R569 *0_5%_4

+3V_S5

+WL_VDD+3V_S5

1

R354
10K_5%_4

CLKREQ_WLAN#

18

S0

30mil

INTEL suggest

CNVI_RF_RESET#

R305
75K_1%_4

A A

5

4

WLANPWR#[22]

+3V_S5

R574

CNV@10K_5%_4

C541
CNV@1u/6.3V_4

3

Q38
CNV@AO3413

1

R573
CNV@100K_5%_4

+WL_VDD

3

2

C264
10u/6.3V_4

C239

0.1u/16V_4

2

C247

0.1u/16V_4

C341

0.1u/16V_4

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

C337

0.1u/16V_4

NGFF WiFi & BT

NGFF WiFi & BT

NGFF WiFi & BT

R298 *0_6
R287 *0_6

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

PROJECT :

1

Z8G

Z8G

Z8G

18 35Tuesday, December 26, 2017

18 35Tuesday, December 26, 2017

18 35Tuesday, December 26, 2017

+3V
+3V_S5

1A

1A

1A

Vinafix.com

5

KEYBOARD (KBC)

CN14

29

1
2

D D

50584-0280N-V02

C C

3
4
5
6
7
8

9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28

30

Prevent ESD/EOS Layout near connector

MX0
MX1
MX2
MX3
MX4
MX5
MX6

MX7
MY17
MY16
MY15
MY14
MY13
MY12
MY11
MY10
MY9
MY8
MY7
MY6
MY5
MY4
MY3
MY2
MY1
MY0

R380 33_5%_4

MX0 [22]
MX1 [22]
MX2 [22]
MX3 [22]
MX4 [22]
MX5 [22]
MX6 [22]

MX7 [22]
MY17 [22]
MY16 [22]
MY15 [22]
MY14 [22]
MY13 [22]
MY12 [22]
MY11 [22]
MY10 [22]
MY9 [22]
MY8 [22]
MY7 [22]
MY6 [22]
MY5 [22]
MY4 [22]
MY3 [22]
MY2 [22]
MY1 [22]
MY0 [22]

C346
180p/50V_4

NBSWON# [22]

4

3

2

1

TOUCHPAD (TPD I2C/PS2 co-lay)

TPD->100kHz,TS=400Khz
Intel design guide suggestion
MCP PIN 10u.
Per inch 3u TS=3x5inch
400kHz10~100u =2.4~0.4k.
100Khz 10~100u=9k~1k.

Touch PAD level shift I2C(TPD)

I2C4_SCL[3]

I2C4_SDA[3]

+3V_S5

R384

10K_5%_4

TPCLK[22]

TPDATA[22]

Q26A

Q26B

R385
10K_5%_4

*AZ5725-01F.R7G

+1.8V_S5

5

34

2

61

SSM6N43FU

+3V_S5

D27

1 2

D26
*AZ5725-01F.R7G

1 2

+3V_S5

R394
2K_1%_4

R388 *S_4

C355

0.1u/16V_4

R390
2K_1%_4

I2C4_SCL_C

I2C4_SDA_C

TPD_INT#[22]

TPD_EN[22]

C359

0.22u/10V_4

PCH_TPD_INT#[5]

C358

0.1u/16V_4

TPCLK
TPDATA

I2C4_SDA_C
I2C4_SCL_C

10 mils

+TPVDD

Q25B

10K_5%_4

61

CN15

910

1
2
3
4
5
6
7
8

51653-0080N-001

+3V_S5

R392

34

5

2

Q25A

2N7002KDW

I2C4_SDA_C I2C4_SCL_C

R387
10K_5%_4

TPD_INT#

ESD3

1

1

2

GND
334

*TVL ST23 04 AD0

VDD

6

19

6
5

+TPVDD
TPD_ENTPD_INT#

4

CPU Thermal sensor(THM)

2ND_MBDATA[22]
2ND_MBCLK[22]

B B

2ND_MBDATA
2ND_MBCLK

5
1

SMBDATA
SMBCLK

+3V

4

+Vs

ALERT#

GND

CB@G753T11U

2

C422
[email protected]/50V_4

U28

3

ALERT#

TP44

Keyboard backlight (KBL)

+5V +5V

R393

KBL@10K_5%_4

Q28

A A

KB_BL_LED[22]

2

KBL@DDTC144EUA-7-F

1 3

5

2

C357 [email protected]/10V_4

1

Q27
KBL@PJA3413

3

C368
[email protected]/6.3V_4

20mil

+5V_KB

C363
[email protected]/50V_4

CN18

4
3
2
1

5 6

KBL@50591-00401-001

4

CPU FAN (THM)

G-sensor(ACS)

ACCEL_INTA[5]

Q24B

R304
EJ@1K_1%_4

Q32

+5V

R335
EJ@10K_5%_4

to CPU
to SATA HDD

FAN1_RPM[22]

For EMI

+5V

+3V

C273
*EJ@220p/50V_4

+3V

[email protected]/16V_4

20mil

R329
0_4

+5V_FAN1

C289
*EJ@220p/50V_4

C369

D7 GS@RB500V-40

1
1

D8 GS@RB500V-40

56

1
2
3
4

2
2

CN10

EJ@50278-00401-V01

C366
GS@10u/6.3V_4

R326

EJ@10K_5%_4

FAN_PWM_Q

ACCEL_INT1 ACCEL_INT1_R

ACCEL_INT2[17]

CLK_SDATA[3,10]
CLK_SCLK[3,10]

2

U21

1

Vdd_IO

14

VDD

11

ACCEL_INT2_R

+3V

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

INT1

9

INT2

7

SDO/SA0

6

SDA/SDI/SDO

4

SCL/SPC

8

CS

GS@LIS3DHTR

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

PROJECT :

KB/TP/FAN/G-sensor

KB/TP/FAN/G-sensor

KB/TP/FAN/G-sensor

2

NC#1

3

NC#2

10

RES

15

ADC2

5

GND#1

12

GND#2

13

ADC3

16

ADC1

Z8G

Z8G

Z8G

19 35Tuesday, December 26, 2017

19 35Tuesday, December 26, 2017

1

19 35Tuesday, December 26, 2017

1A

1A

1A

+3V

2

FAN_PWM[22]

1 3

EJ@METR3904-G

+3V

R364
GS@10K_5%_4

ACCEL_INT1

61

34

2

5

Q24A

GS@2N7002KDW

3

C334
*GS@22p/50V_4

Vinafix.com

5

USB 3.0 (UB3)

+5V_S5

D D

USBON#[22]

C211
1u/6.3V_4

USBON#

trace midth󶁪󶁪󶁪󶁪100 mils

U13

5

IN3OCB

4

Enable: Low Active /2.5A
GMT:AL000524007
EMS:AL005203001

1

OUT

EN

GND

G524B2T11U

2

USB_OC1# [3]

C214
470p/50V_4

C213

0.1u/16V_4

USBPWR1

4

C481
100u/6.3V_12

3

C240 *1.6p/50V_4

USB30_RX0-[3]
USB30_RX0+[3]

USBP0+[3]

USBP0-[3]

USB30_TX0-[3]
USB30_TX0+[3]

C238 *1.6p/50V_4

C234 0.1u/16V_4
C230 0.1u/16V_4

USB3_0_TXN_C
USB3_0_TXP_C

R286 *S_4

R284 *S_4

R266 *S_4

R265 *S_4

R277 *S_4

R276 *S_4

USB3_0_RXN_R
USB3_0_RXP_R

USBP0+_R
USBP0-_R

USB3_0_TXN_R
USB3_0_TXP_R

C231
*1.6p/50V_4

C229
*1.6p/50V_4

USBPWR1

2

1

20

1110

StdA_SSRX­StdA_SSRX+

GND_Drain

StdA_SSTX­StdA_SSTX+

Shield

GND

D+

D-

VBUS

Shield Shield

5
4
6
3
7
2
8
1
9

Shield

13 12

CN8

2UB4008-390101F

0.1u/16V_4

USBPWR1

USBP0-_R

C482

USB3_0_TXP_R

USB3_0_RXP_R

USB protection diodes for ESD.

USB protection diodes for ESD.

USB protection diodes for ESD.USB protection diodes for ESD.
as close as possible to USB connector pins.

as close as possible to USB connector pins.

as close as possible to USB connector pins.as close as possible to USB connector pins.

ESD2

1

I/O-1

2

VDD

GND#1

3

NC#1

4

I/O-2

5

I/O-3

11

AZ1065-06F.R7G

I/O-6

NC#2
I/O-5
I/O-4

GND#2

USBP0+_R

10
9
8

USB3_0_TXN_R

7

USB3_0_RXN_R

6

USB 2.0 (UB2)

C C

+5V_S5

trace midth󶁪󶁪󶁪󶁪100 mils

C367

U22

5

1u/6.3V_4

IN3OCB

4

USBON#

EN

Enable: Low Active /2.5A
GMT:AL000524007
EMS:AL005203001

USB 2.0/LED/AUDIO JACK DB (UB2)

B B

A A

196332-34041-3

GND

2

CN17

1

OUT

G524B2T11U

3536

USB_OC1#

1
2
3
4
5
6
7
8

9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34

5

USBPWR2

ADOGND

+3VPCU

C362
470p/50V_4

C361

0.1u/16V_4

PWRLED# [22]
SUSLED# [22]
BATLED0# [22]
BATLED1# [22]

USB2.0_CONN1+_R
USB2.0_CONN1-_R

USB2.0_CONN2+_R
USB2.0_CONN2-_R

HP_JD# [14]

SLEEVE [14]

RING2 [14]

HP-L3 [14]
HP-R3 [14]

USBPWR2

C360
*100u/6.3V_12

USB2.0_CONN1+[3]

USB2.0_CONN1-[3]

USB2.0_CONN2+[3]

USB2.0_CONN2-[3]

4

R397 *S_4

R398 *S_4

R399 *S_4

R400 *S_4

HOLE(OTH)

CPU Nut

WL M.2 Nut for CB

WL M.2 Nut for EJ

HOLE2

*HG-EJ-AP-1

8
9

123

HOLE1

*HG-C236D94P2

8
9

123

HOLE14

WLAN nut

1

*HG-C354D220P2

67
5
4

67
5
4

HOLE12
CPU nut

1

P/N

MBZ8P001010

MBZ8P002010

MBZ8P003010

8
9

HOLE8

123

USB2.0_CONN1+_R
USB2.0_CONN1-_R

ESD4

1
2

HOLE13
CPU nut

1

6

GND

VDD

334

*TVL ST23 04 AD0

USB2.0_CONN2+_R
USB2.0_CONN2-_R

67
5
4

1

6
5
4

*HG-C354D220P2

8
9

SPAD2

*SPAD-C236NP

*SPAD-C236NP

SMT NUT M2 H1.9 Z8P(MBZ8P001,3A)COPPER

HOLE7

123

1

SPAD8

1

Description

USBPWR2

67
5
4

SPAD4

*SPAD-C236NP

1

SPAD7

*SPAD-C236NP

1

*HG-C315D165P2

SMT NUT M2 H0.45 Z8P(MBZ8P002,3A)COPPER
SMT NUT M2 H2.45 Z8P(MBZ8P003,3A)COPPER

3

Stitch cap (EMC)

+VIN +VIN +VIN +VIN +VIN +VIN +VIN

HOLE5

8
9

123

SPAD3

*SPAD-C177NP

SPAD9

*SPAD-C236NP

67
5
4

1

1

*HG-Z8P-1

8
9

SPAD5

*SPAD-C177NP

1

SPAD1

*SPAD-Z8G-1

1

HOLE3

123

C1

0.1u/25V_4

67
5
4

*O-EJ-KBL-1

SPAD6

*SPAD-Z8G-2

1

HOLE4

1

C6

0.1u/25V_4

HOLE11

*HG-C354D126P2

8
9

123

HOLE6

*H-C122D122N

1

2

67
5
4

C242

0.1u/25V_4

C487

0.1u/25V_4

HOLE10

*HG-C315D165P2

8
9

123

C183

0.1u/25V_4

67
5
4

C253

C491

0.1u/25V_4

0.1u/25V_4

HOLE9

*HG-TC315BC236D95P2

67
5

8

4

9

123

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

PROJECT :

USB/CARDREADER/LED

USB/CARDREADER/LED

USB/CARDREADER/LED

1

Z8G

Z8G

Z8G

20 35Tuesday, December 26, 2017

20 35Tuesday, December 26, 2017

20 35Tuesday, December 26, 2017

1A

1A

1A

Vinafix.com

5

4

3

2

1

USB TYPE-C (UTC)

21

Vendor suggest input cap 120u

D D

EC_TypeC_EN[22]

EC_TypeC_CHG_HI[22]

C C

C128 TPC@100u/6.3V_12
C132 TPC@10u/6.3V_4

C131 TPC@10u/6.3V_4

R575 *S_4

R159 TPC@100K_1%_4

+5V_S5

TYPEC_CHG
TYPEC_CHG_HI

25810_REF
25810_REF_RTN

trace midth󶁪󶁪󶁪󶁪150 mils

Q14

3

D

S

2
1

G

TPC@AON7401

4

25810_UFP#_G2

3

2

Q16
TPC@PJA138K

1

NC#4
NC#3

NC#2

[email protected]

NC#4
NC#3

NC#2

[email protected]

R189 TPC@100K_5%_4

USB3_1_TXP_CN

10

USB3_1_TXN_CN

9

USB3_1_RXN

7

USB3_1_RXP

6

USB3_2_TXN_CN

10

USB3_2_TXP_CN

9

USB3_2_RXNUSB3_2_RXN

7

USB3_2_RXP

6

[email protected]/25V_4

U3

1

Line-1

2

Line-2

3

GND#1

4

Line-3
Line-45NC#1

U5

1

Line-1

2

Line-2

3

GND#1

4

Line-3
Line-45NC#1

5

+5V_S5

R204
TPC@10K_5%_4

25810_UFP#_G1

B B

A A

25810_UFP#

USB3_1_TXP_CN
USB3_1_TXN_CN

USB3_1_RXN
USB3_1_RXP

DFN2510 *2
BC001043Z00 -> main

USB3_2_TXN_CN
USB3_2_TXP_CN

USB3_2_RXP

2

3

Q15
TPC@PJA138K

1

5

trace midth󶁪󶁪󶁪󶁪150 mils

OUT#2
OUT#1

CC1
CC2

FAULT

UFP
POL

AUDIO

DEBUG

PwPd

USB3_1_TXP[3]
USB3_1_TXN[3]
USB3_1_RXP[3]
USB3_1_RXN[3]

USB3_2_TXP[3]
USB3_2_TXN[3]
USB3_2_RXP[3]
USB3_2_RXN[3]

6
5
4

USBP1+[3]

USBP1-[3]

15
14

11
13

1
20
19
18
17
16

21

USBP1-

+TYPEC_VBUS_C

+TYPEC_VBUS

D3

U4

2

IN1#1

3

IN1#2

4

IN2

5

AUX

6

EN

7

CHG

8

CHG_HI

10

REF

9

REF_RTN

12

GND#1

TPC@TPS25810RVCR

+TYPEC_VBUS+TYPEC_VBUS_C

R202
TPC@10K_5%_4

C151

ESD1

USBP1+

25810_CC1 25810_CC2

1
2
3

TPC@TVL ST23 04 AD0

4

[email protected]

1

6

GND

VDD

3

4

LD_DET

25810_CC1
25810_CC2

25810_FAULT#
25810_LD_DET#
25810_UFP#
25810_POL#
25810_AUO#
25810_DBG#

+TYPEC_VBUS

12

C93 [email protected]/16V_4
C107 [email protected]/16V_4

C127 [email protected]/16V_4
C121 [email protected]/16V_4

+5V_S5

C138 TPC@10u/6.3V_4
C135 TPC@100p/50V_4

C130 TPC@1000p/50V_4

EMI

R576 *S_4
R577 *S_4

EMI

USB3_1_TXP_CN
USB3_1_TXN_CN
USB3_1_RXP
USB3_1_RXN

USB3_2_TXP_CN
USB3_2_TXN_CN
USB3_2_RXP
USB3_2_RXN

USBP1+
USBP1­USBP1+
USBP1-

25810_CC1
25810_CC2

TP14
TP11

3

USB_OC0# [3,9]
TypeC_HPD# [4]

C438 [email protected]/25V_4
C440 [email protected]/25V_4

C445 TPC@100p/50V_4
C436 TPC@1000p/50V_4

A2

B11
B10

B2

B3
A11
A10

A6

A7

B6

B7

A5

B5

A8

B8

CN1

SSTXp1
SSTXn1A3VBUS#1
SSRXp1
SSRXn1

SSTXp2
SSTXn2
SSRXp2
SSRXn2

Dp1
Dn1
Dp2
Dn2

CC1
CC2

RFU1
RFU2

25810_FAULT#
25810_LD_DET#
25810_UFP#
25810_POL#
25810_AUO#
25810_DBG#
TYPEC_CHG
TYPEC_CHG_HI
EC_TypeC_EN

A4
B4

VBUS#2

A9

VBUS#3

B9

VBUS#4

A1

GND#1

A12

GND#2

B1

GND#3

B12

GND#4

2

GND#6

5

GND#9

6

GND#10

1

GND#5

4

GND#8

8

GND#12

3

GND#7

7

GND#11

9

NC#1

10

NC#2

TPC@2UB3C01-023111F

R174 *TPC@100K_5%_4
R176 TPC@100K_5%_4
R181 *TPC@100K_5%_4
R177 TPC@100K_5%_4
R516 TPC@100K_5%_4
R514 TPC@100K_5%_4
R161 TPC@100K_5%_4
R160 TPC@100K_5%_4
R168 TPC@10K_5%_4

Close to connector

+TYPEC_VBUS

2

C453 [email protected]/25V_6
C441 [email protected]/25V_6
C444 [email protected]/25V_6
C447 [email protected]/25V_6

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

+3V_S5

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

PROJECT :

USB_Type C_25810

USB_Type C_25810

USB_Type C_25810

Tuesday, December 26, 2017

Tuesday, December 26, 2017

Tuesday, December 26, 2017

Z8G

Z8G

Z8G

1

21 35

21 35

21 35

1A

1A

1A

Vinafix.com

5

CLK_PCI_EC[5]

LPC_LFRAME#[5,17,18]

0.1u/16V _4

PLTRST#[6,13,16,17 ,18]

PCH_SUSPWRDNACK[6]

TPD_INT#[19]

SYS_SHDN#[24,30]

1 2

L11 BLM15AG121SN1D

12 mils

C526

0.1u/16V _4

0.1u/16V _4

R375 2.2_5% _6

+3V_S5

LPC_LAD0[5,17,18]
LPC_LAD1[5,17,18]
LPC_LAD2[5,17,18]
LPC_LAD3[5,17,18]

C519 180 p/50V_4

DDR4_SUSO N_2V5[26]

IRQ_SERIRQ[12,17]

SIO_EXT_S CI#[5]

CNVI_RGI_DT[3,9,18]

KB_BL_L ED[19]

DNBSWON#[6]

EC_FPBACK#[13]
EC_PLTRST#[6]

PCH_BLON_EC[13]

TPCLK[19]

SUSB#[6]

EC_PWROK[6]

ME_WR#[4]
AMP_MUTE#[14]

MY0[19]
MY1[19]
MY2[19]
MY3[19]
MY4[19]
MY5[19]
MY6[19]
MY7[19]
MY8[19]

MY9[19]
MY10[19]
MY11[19]
MY12[19]
MY13[19]
MY14[19]
MY15[19]

MX0[1 9]
MX1[1 9]
MX2[1 9]
MX3[1 9]
MX4[1 9]
MX5[1 9]
MX6[1 9]
MX7[1 9]

TPD_INT#_R

C281

180p/50V_4

C352

0.1u/16V _4

ECAGND

C511

0.1u/16V _4

PROCHOT_EC

WRST#

R588 *0_5%_ 4

TP30

DNBSWON#

TP27

SUSB#

EC_PWROK

PCH_SPI_CLK_EC
PCH_SPI_SO_EC

PCH_SPI_SI_EC
SPI_CS0# _UR_ME
GPG2

R32433_5%_4
R3570_4

C505

TPD_INT#_R
SYS_SHDN#_ R

EC(KBC)

+3VPCU_EC and +3V_RTC
minimum trace width 12mils.

+3V_LDO_EC

D D

CLK_PCI_EC

R557

C C

B B

*22_5%_4

C515
*10p/50V _4

TP55
TP56
TP57

TS_EN[13]

Prevent ESD/EOS Layout near EC

+3V_LDO_EC

DNBSWON#
SUSB#
SUSC#

C342 180 p/50V_4

R549 2.2_5% _6

R553
100K_5% _4

C513
1u/6.3V_ 4

R362 33_5%_4

0.1u/16V _4

1

D20
RB500V-40

2

C512

TS_EN_C

Prevent ESD/EOS Layout near device

VSTBY_FSPI

0.1u/16V _4

+3V_EC

4

+A3VPCU

R315 2.2_5% _6

+3VPCU_EC

C279

C332

0.1u/16V _4

10

LAD0

9

LAD1

8

LAD2

7

LAD3

22

LPCRST#/GP D2

13

LPCCLK/GPM4

6

LFRAME#/G PM5

17

LPCPD#/GPE6

126

GA20/GPB5

5

SERIRQ/GP M6

15

ECSMI#/GP D4

23

ECSCI#/GP D3

14

WRST#

4

KBRST#/GPB6

16

PWUREQ#/BBO/GP C7

113

CRX0/GPC0

123

CTX0/TMA0/GPB2

86

PS2DAT0/TMB1 /GPF1

85

PS2CLK0/TMB0/CEC/GP F0

88

PS2DAT1/RTS0 #/GPF3

87

PS2CLK1/DTR0#/GPF2

90

PS2DAT2/GPF5

89

PS2CLK2/GPF4

119

DSR0#/GPG6

33

GINT/CTS0#/GP D5

108

RXD/SIN0/G PB0

109

TXD/SOUT0/GPB1

125

SSCE1#/G PG0

105

FSCK/GPG7

103

FMISO/GPG 5

102

FMOSI/GPG 4

101

FSCE#/GPG3

100

SSCE0#/G PG2

36

KSO0/PD0

37

KSO1/PD1

38

KSO2/PD2

39

KSO3/PD3

40

KSO4/PD4

41

KSO5/PD5

42

KSO6/PD6

43

KSO7/PD7

44

KSO8/ACK #

45

KSO9/BUS Y

46

KSO10/PE

51

KSO11/ERR#

52

KSO12/SLCT

53

KSO13

54

KSO14

55

KSO15

58

KSI0/STB#

59

KSI1/AFD#

60

KSI2/INIT#

61

KSI3/SLIN#

62

KSI4

63

KSI5

64

KSI6

65

KSI7

128

GPJ6

2

GPJ7

C278

0.1u/16V _4

VSTBY_FSPI_ R

114

121

VCC

VSTBY_126VSTBY_250VSTBY_392VSTBY_4

106

VSTBY_6

VSTBY_FSPI

11

LPC

IT8987

PS/2

UART

FLASH

KBMX

RING#/PW RFAIL#/CK32KOUT/LP CRST#/GPB7

CLOCK

VSS_2

VSS_327VSS_4

VSS_5

1

49

91

104

L7 BLM15AG121SN1D

+3VPCU_ECPLL

C282

0.1u/16V _4

127

74

AVCC

VSTBY(PLL)

KSO16/SMOSI/GPC3
KSO17/SMISO/GPC5

L80HLAT/BAO/GPE0

GPIO

DTR1/SBUSY/GPG1/ID7

CTX1/SOUT1/SMDAT3/GPH2/ID2

CRX1/SIN1/SMCLK3/G PH1/ID1

CLKRUN#/GPH0/ID0

SMCLK2/PECI/GPF6

SMDAT2/PECIRQT#/GPF7

SM_BUS

PWM6/SSCK/GPA6
PWM7/RIG1#/GPA7

PWM

TACH1A/TMA1/G PD7

WAKE UP

A/D D/A

ADC5/DCD1# /GPI5
ADC6/DSR1#/GPI6
ADC7/CTS1#/ GPI7

DAC5/RIG0#/GPJ5

DAC4/DCD0# /GPJ4
DAC3/TACH1B/GPJ3
DAC2/TACH0B/GPJ2

VSS_1

VCORE

AVSS

12

75

ECAGND

C340

0.1u/16V _4

12

1 2

L5 BLM15AG121SN1D

EGCLK/GP E3
EGCS#/GP E2

EGAD/GPE 1

L80LLAT/G PE7

GPH6/ID6
GPH5/ID5
GPH4/ID4
GPH3/ID3

GPH7

SMCLK0/GPB3
SMDAT0/GPB 4
SMCLK1/GPC1
SMDAT1/GPC2

PWM0/GPA0
PWM1/GPA1
PWM2/GPA2
PWM3/GPA3
PWM4/GPA4
PWM5/GPA5

TACH0A/GPD6

GPJ1

TACH2/GPJ0

TMR0/GPC4
TMR1/GPC6

PWRSW /GPE4

RI1#/GPD0
RI2#/GPD1

RTS1#/GPE5

ADC0/GPI0
ADC1/GPI1
ADC2/GPI2
ADC3/GPI3
ADC4/GPI4

3

SLP_S0IX#

TP34

TP54
TP28

TP24

R327 10_5%_4

C364 10u/6.3V_4

+3VPCU_EC

BT_EN [18]

MY16 [19]
MY17 [19]

TP31

THERMTRIP# [6]

USBON# [20]
EC_TypeC_CHG_HI [21]

CLKRUN# [5,17 ]

TP22

MBCLK [23]
MBDATA [23]TPDATA[19]
2ND_MBCLK [19]
2ND_MBDATA [19]

PWRLED# [20]
BATLED1# [20]
SUSLED# [20]
BATLED0# [20]

MAINON [15,24,25,26,29,30]

FAN_PWM [19]

PCBEEP_EC [14]
FAN1_RPM [19]

SYS_HWP G [24]

VNN_ON [27,28]

SUSON [2 6]

NBSWON# [19]

SUSC# [6 ]

WLANPW R# [1 8]

RSMRST# [12]

ICMNT

VRON [2 7]
S5_ON [24,28,29]
LANPWR# [16]

TP32

ACIN [23]

TEMP_MBAT# [23]

EC_TypeC_EN [21]
CLR_CMOS [6]
PANEL_LED_EN [3 1]

R310 33_5%_4

C267 180 p/50V_4

D5 VARISTOR

ECAGND

ICMNT [23]

Output for type-c Apling ridge
reset timming"Low " Active

SM BUS ARRANGEMENT TABLE

(For PLL Power)

U20
IT8987E/BX

84
83

VccDSW

BT_EN

82
56

57

PCH_SLP_ SUS#

19
20

122
99
98
97
96
95
94
93

3

117
118
110

MBCLK

111

MBDATA
2ND_MBCLK

115

2ND_MBDATA

116

24
25
28
29
30
31
32
34

47
48

77
76

120
124

GPC6

Pin124 is a board ID for Cloud book (PD) , EC has internal PU for EJ series

107

NBSWON#

18

SUSC#

21

HWPG

35
112

C286 0.1u/16V_4

66

colsed to EC pin within 100 mils

67
68
69
70
71
72
73

TS_EN_C

81
80
79
78

SM Bus 1

SM Bus 2

SM Bus 3

SM Bus 4

Prevent ESD/EOS Layout near EC

R325 33_5%_4

C280
180p/50V_4

LID# [13]

Prevent ESD/EOS Layout near EC

Prevent ESD/EOS Layout near EC

R395 33_5%_4

C365
180p/50V_4

Battery

Thermal sensor

2

TPD_EN [19 ]

RF_EN [18]

PU/PD (KBC)

GPG2
NBSWON#

MBCLK
MBDATA

GPC6

2ND_MBCLK
2ND_MBDATA

PROCHOT_EC

MAINON
SUSON
RSMRST#
EC_PWROK
CLR_CMOS
S5_ON

R568 10K_5%_4
R330 10K_5%_4

R323 4.7K_5 %_4
R316 4.7K_5 %_4
R312 *10K_5 %_4

R317 CB@10K_5%_4
R331 100K_5%_4C283
R333 100K_5%_4
R311 100K_5%_4
R396 100K_5%_4
R365 100K_5%_4
R391 10K_5%_4

R314 [email protected] _5%_4
R313 [email protected] _5%_4

2

R351
100K_5% _4

3

1

Battery Disable (FSW)

BI#[23]

1

2

6

SW2

JTE1CQR

5

+3V_RTC

3

4

R550

2

C510

*0.1u/16V_4

100K_5% _4

SW3

TME-532W-Q-T/R

3

2

PJA138K

3

Q35

1

Q21
2N7002K

BI_GATE

4

1

5

6

1

+3V_LDO_EC

+3V

+3V_RTC +3VP CU

R545

*0_5%_4

C501 *0.1 u/16V_4

5

Q36A

22

H_PROCHOT# [6,23,27,28 ]

R544
*0_5%_4

R547
*10K_5%_4

WRST#

61

34

2

Q36B
*SSM6N43FU

Reserve power on switch for test
(MP remove)

SW1

2

3

NBSWON#

A A

*TME-532W -Q-T/R

1

4

5

6

5

SPI ROM(KBC)

3.3K_5%_4

SPI_CS0# _UR_ME
PCH_SPI_CLK_EC
PCH_SPI_SI_EC
PCH_SPI_SO_EC

SPI ROM

3.3V

VSTBY_FSPI

R535

R538

3.3K_5%_4
U32

1

CS

6

CLK

5

DI

2

DO

SPI_WP#

3

WP

W25X1 0CLSNIG

Vender Size Quanta P/N

128K
128K

GGD

128K

MAX

4

8

VCC

7

HOLD

4

GND

AKE35ZN0N00WND

AKE5BY00000
AKE35FN0Z02

3.3K_5%_4

SPI_HOLD#

R536

VSTBY_FSPI

C484

0.1u/16V _4

Vender P/N

W25X10CLSNIG
GD25D10BTIGR
MX25L1006EMI-10G

Power_Auto_Recovery

+3V_LDO_EC

15 mils

680_LDO

3

R548 *S_4

+3V_LDO_EC

20 mils

R537 *S_4

VSTBY_FSPI

2

HWPG(KBC)

HWPG_1 .8V_S5[29]

HWPG_1 .2VSUS[26 ]

IMVP_PW RGD[27]

HWPG_1 .24V_S5[29]

IMVP_PW RGD_VNN[28]

HWPG_1 .5V[29]

HWPG_1 .05V[25]

HWPG_2 .5V[26]

Size Document Num ber Rev

Size Document Num ber Rev

Size Document Num ber Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

D16 RB500V-40

1

D21 *RB500V-40

1

D15 *RB500V-40

1

D23 *RB500V-40

1

D14 *RB500V-40

1

D17 *RB500V-40

1

D25 *RB500V-40

1

D6 *RB500V-40

+3V

R542
10K_5%_ 4

2

HWPG

2
2
2
2
2
2
2

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

PROJECT :

KBC IT8987E_BX

KBC IT8987E_BX

KBC IT8987E_BX

Z8G

Z8G

Z8G

22 35Tuesday, December 26, 2017

22 35Tuesday, December 26, 2017

1

22 35Tuesday, December 26, 2017

1A

1A

1A

Vinafix.com

5

4

3

2

1

(1) Double Check ADP-IN Connector with ME
(2) Same as ZAJ

PJ14

4
3
2
1

D D

C C

B B

A A

EJ@CI2504P1H02-RB-NH

PJ15

6
5
4
3
2
1

PJ17
50458-00801-V02

8
7
6
5
4
3
2
1

9 10

7 8

CS31542FB14 15.4K 1/16W +-1% (0402) For 78W
CS31272FB17 12.7K 1/16W +-1% (0402) For 95W
CS31002FB26 10K 1/16W +-1% (0402) For 116W

PC244

*47p/50V_4

CB@50278-006T1-001

Double Check BATT Connector
with ME

VA

PC239

0.1u/50V_6

PC57

*100p/50V_4

5

PC49

0.1u/50V_6

ACIN[22]

PR257 *0_5%_4

PR258 100_5%_4

PR261
100_5%_4

2 1

PD4
PDZ5.6B

PC50

2200p/50V_4

PR260
100_5%_4

2 1

PD5
PDZ5.6B

VA VA1

PD2

2 1

P4SMAFJ20A

REGN6V

PR89
100K_1%_4

PR90
100K_1%_4

PMON[27,28]

*[email protected]_1%_4

BAT-V

TEMP_MBAT#

PR259
1M_5%_4

MBCLK [22]

MBDATA [22]

PC243
*47p/50V_4

PD3
SV1040

2

3

1

PC53

0.1u/50V_6

PR92

MBDATA
MBCLK
ICMNT
D/C#

866K_1%_4

PC63

*100p/50V_4

PR112 10K_5%_4
PR107 *10K_5%_4

PR116
316K_1%_4

4

PC60

ACDET=16.4V

PR88
137K_1%_4

ICMNT[22]

TP29 PR96 *S_4

PMON

PR95

+3VPCU

BI# [22]

TEMP_MBAT# [22]

+3VPCU

PC52
1000p/50V_4

100p/50V_4

PQ11
AON6414AL

3

D

S

2

5

1

G

4

PR86

4.02K_1%_4

PR87
20_5%_12

PC64

0.47u/50V_6

PR93 *S_4 PC65
PR102 *S_4
PR104 *S_4
PR91 *S_4

PR97 *0_5%_4

Set Floating for PMON unusing

PC54

100p/50V_4

PR109

100K_1%_4

0.01u/50V_4

PC69

VA2

PC51

0.047u/50V_6

24780_CMSRC

24780_ACDRV
24780_VCC

24780_ACDET

24780_BM#
24780_CMPOUT
24780_ILIM
24780_CMPIN

PR105
100K_5%_4

0.1u/16V_4

PR94

4.02K_1%_4

C351

3

4

28

6

5
11
12

7

8

9

16
14
21
13

PC55

0.1u/50V_6

PU3

CMSRC

ACDRV
VCC

ACDET
ACOK
SDA
SCL
IADP
IDCHG
PMON

TB_STAT
CMPOUT
ILIM

CMPIN

GND#835GND#936GND#1037GND#11

10

38

+1.8V_S5

PC61

0.1u/50V_6

2

ACP

PROCHOT

BATPRES

15

TEMP_MBAT#

PR99
*100K_5%_4

1

GND#1

GND#229GND#330GND#431GND#532GND#633GND#7

22

*S_4

PR111

3

ACN

PR100
*S_4

PR83

0.01_1%_0612

24780_ACP

24780_ACN

PC56

0.1u/50V_6

BATDRV

BATSRC

REGN

BTST

HIDRV

PHASE

LODRV

SRP

SRN

BQ24780SRUYR

34

PR110

*0_5%_4

24780_BATDRV

18

24780_BATSRC

17

24

24780_BST

25

24780_DH

26

24780_LX

27

24780_DL

23

20

19

H_PROCHOT#

PR113
*S_6

PR114
*S_6

PR84
*S_4

PR85
*S_4

REGN6V

PR103
*S_6

24780_ACN

24780_ACP

PC68

2.2u/10V_6

0.047u/50V_6

PC72

0.1u/25V_4

24780_SRP

PC71

0.1u/25V_4

24780_SRN

PC73

0.1u/25V_4

H_PROCHOT# [6,22,27,28]

PQ23
AON7410

4

PQ24
AON7410

4

PC59
2200p/50V_4

PR115
10_1%_6

PC240
2200p/50V_4

PR108
*4.7_5%_6

PC70
*680p/50V_6

PL11

PQ12
AON6414AL

D

5

6.8uH_7x7x3

1 2

PL11

BAT-V

Z8G

Z8G

Z8G

PC242
22u/25V_8

23

23 35Tuesday, December 26, 2017

23 35Tuesday, December 26, 2017

23 35Tuesday, December 26, 2017

1A

1A

1A

3

S

2
1

G

4

+VIN

PR98
*S_6

PC245
10u/25V_8

PC66

*0.01u/50V_4

PR106

0.01_1%_0612

PR117

PR118

*S_4

*S_4

24780_SRP
24780_SRN

DescriptionCloud book P/N

IND SMD 4.7UH 20% 5A(PCMB062D-4R7MS)CV-4750MZ00

REGN MAX voltage 6.5V
V_ILIM=20*(VSRP-VSRN)=20*Ichg*Rsr
=0.793V for 3.965A current limit

ILIM=0.793V
Rsr = 0.01ohm

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Charger (BQ24780S)

Charger (BQ24780S)

Charger (BQ24780S)

Date: Sheet of

Date: Sheet of

Date: Sheet of

BAT-V

PC58

PC241

2200p/50V_4

22u/25V_8

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

PROJECT :

1

+VIN

PC62

0.1u/50V_6

D

G

S

2

153

D

G

S

2

153

2

Vinafix.com

5

+VIN

PJ2
*S_3720

D D

PR9

SYS_SHDN#[22,30] SYS_HWPG[22]

To Thermal Protection

C C

Power Auto Recovery

680_LDO

680_LDO[22]

*S_4

PR8

10K_1%_4

PR21
*S_6

680_LDO V3A_VBYP

SYS_SHDN#

PC3

0.1u/16V_4

PR154
10K_1%_4

PC74

0.1u/25V_4

PR134 10K_1%_4

+3VPCU

PR142 *S_4
PR130 100K_1%_4

V3A_VBYP

PC107

4.7u/6.3V_4 PU5

PC75

2200p/50V_4

V3A_EN

V3A_VOUT

PR24

1K_1%_4

PC12

10p/50V_4

PC88

0.1u/25V_4

(1) USM : 0.8V-1.7V
(2) Normal Mode : >2.3V

PR133
*S_4

LDO=3.3V/100mA

+V3A_VIN

PC84

V3A_PWRGDSYS_SHDN# SYS_HWPG

PR23
*1K_1%_4

PR33
*10K_1%_4

4

2

3

10

4

V3A_BOOT_R

V3A_VOUT

PC113

0.1u/25V_4

PR132
*S_4

PC5

0.1u/16V_4

+V3A_LX

PR19
*4.7_5%_6

+V3A_LX_R

PC4
*680p/50V_6

PL2

1uH/11A_7x7x3

1 2

PR173
10_1%_6

PC85

10u/25V_8

10u/25V_8

11

1

5

VIN

6

EN

7

PGOOD

LDO3

8

AGND

FF

12

VCC=5V
(DON'T Connect to External Load)

V3A_BOOT

RT6256BGQUF

BOOT

LX#1

LX#2

VOUT

PGND

VCC

9

+VCC_V3A

PC102
1u/10V_4

PU6

3

+3VPCU
3

.3 Volt +/- 5%
TDC : 6A
Width : 240mil
FSW : 500KHZ

+3VPCU

PJ3

+V3A_OUT

PC95

PC80

PC77

22u/6.3V_6

PC79

22u/6.3V_6

22u/6.3V_6

PC89

PC78

22u/6.3V_6

*22u/6.3V_6

*S_3720

PC76

0.1u/16V_4

*22u/6.3V_6

2

TDC : 1A
PEAK : 1.33A
Width : 40mil

+3V_S5

+5VPCU

S5_ON[22,28,29]

S5_ON

PC87
10u/6.3V_6

PR138 *S_4

+VIN [13,20,23,25,26 ,27,28,30,31]
+3VPCU [6,13,14,16,20,22 ,23,29]
+5VPCU [25,29]

VL [30]

+5V [13,14,15,17,19,30]

+5V_S5 [6,20,21,26,27,28,31]

+3V [3,4,5,6,10,13,14,15,16,17,18,19,22,25 ,26,27,28,29,30]

+3V_S5 [3,6,7,12,15,16,17,18,19,21,22,26 ,29]

+3VPCU

PC93
1u/25V_4

1

13

VOUT1#1

14

PC91

VOUT1#2

0.1u/16V_4

4

AOZ1331DI

VBIAS

PC100

0.1u/16V_4

3

PC98
*0.1u/16V_4

1000p/50V_4

ON1

PC99

PR131
*S_4

1

24

+3VPCU

TDC : 3.66A
PEAK : 4.89A

MAINON

PC110
10u/6.3V_6

Width : 160mil

+3V

MAINON [15,22,2 5,26,29,30]

PC111
1u/25V_4

7

VIN1#22VIN1#1

VIN2#16VIN2#2

8

OUT2#1
OUT2#2

GND#1
GND#2

ON2

CT1

CT2

12

10

PC103
1000p/50V_4

PC108

9

0.1u/16V_4

11
15

PR149
*S_4

5

PC104
*0.1u/16V_4

Soft-Start

+VIN

PJ5
*S_3720

+

PC120

*33u/25V_D6.3H4.5

PR57
*S_4

B B

SYS_SHDN#

PR55

10K_1%_4

SYS_HWPG

VL

VL

PC172

0.1u/25V_4

PC32

0.1u/16V_4

PR193 *S_4

PR195 *S_6

LDO=5V/100mA

A A

5

PC170

0.1u/25V_4

PC157

4.7u/10V_6

+V5P5A_VIN

PC143

10u/25V_8

(1) USM : 0.8V-1.7V
(2) Normal Mode : >2.3V

V5P5A_EN

V5P5A_PWRGD

V5P5A_VOUT

PR52

1K_1%_4

PC26

10p/50V_4

V5P5A_BOOT_R

PU9

2
3

V5P5A_VOUT

10

4

PC171

0.1u/25V_4

PC144

0.1u/16V_4

1uH/11A_7x7x3

1 2

PR217
*S_4

PR60
*4.7_5%_6

+V5P5A_LX_R

PC41
*680p/50V_6

PL6

TDC : 5.25A

+5VPCU
5 Volt +/- 5%
TDC : 8A
Width : 320mil
FSW : 750KHZ

+5VPCU

PJ8

+V5P5A_OUT+V5P5A_LX

PC179

PC175

PC174

PC178

22u/6.3V_6

22u/6.3V_6

3

PC182

22u/6.3V_6

22u/6.3V_6

*22u/6.3V_6

*S_3720

PC183

PC173

0.1u/16V_4

*22u/6.3V_6

PEAK : 7A
Width : 240mil

+5V_S5

+5VPCU

2

S5_ON

PR67
*S_4

PR208

PC158

PC168

10u/25V_8

6

7

12

8

PR194
*1K_1%_4

PR51
*10K_1%_4

10_1%_6

2200p/50V_4

V5P5A_BOOT

1

5

VIN

BOOT

EN

PGOOD

LDO5

AGND

LX#1
LX#2

VOUT

PGND

VCC

FF

9

11

+VCC_V5P5A

PC145
1u/10V_4

VCC=5V
(DON'T Connect to External Load)

4

RT6258CGQUF

PC192
10u/6.3V_6

+5VPCU

PC189
1u/25V_4

1

13

VOUT1#1

14

PC191

VOUT1#2

0.1u/16V_4

4

AOZ1331DI

VBIAS

PC185

0.1u/16V_4

3

PC184
*0.1u/16V_4

1000p/50V_4

ON1

PC195

PR66
*S_4

+5VPCU

TDC : 4A
PEAK : 5.3A

MAINON

PC198
10u/6.3V_6

Width : 160mil

+5V

PC188
1u/25V_4

7

VIN1#22VIN1#1

VIN2#16VIN2#2

8

OUT2#1
OUT2#2

PU10

GND#1
GND#2

ON2

CT1

CT2

12

10

PC196

1000p/50V_4

PC194

9

0.1u/16V_4

11
15

PR68
*S_4

5

PC186
*0.1u/16V_4

Soft-Start

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

Z8G

PROJECT :

Z8G

PROJECT :

Size Do cument Number Rev

Size Do cument Number Rev

Size Do cument Number Rev

SYSTEM 5V/3V (RT6256B/RT6258C)

SYSTEM 5V/3V (RT6256B/RT6258C)

SYSTEM 5V/3V (RT6256B/RT6258C)

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

Z8G

1A

1A

1A

24 35Tuesday, December 26, 2017

24 35Tuesday, December 26, 2017

24 35Tuesday, December 26, 2017

Vinafix.com

5

D D

4

3

2

+VIN [13,20,23,24,26,27,28,30,31]
+1.05V [6,7,27,28]
+5VPCU [24,29]
+3V [3,4,5,6,10,13,14,15,16,17,18,19,22,24,26,27,28,29,30]

1

25

G5335-AGND-1

PC190
*0.01u/50V_4

PR231

2.2_5%_6

PC205

0.1u/25V_4

PR71
*4.7_5%_6

PC44
*680p/50V_6

PL7

0.68uH_7x7x3

1 2

PJ9
*S_3720

PC197

PC193

*0.1u/25V_4

PC210

22u/6.3V_6

PC187

10u/25V_8

2200p/50V_4

PC208

PC212

22u/6.3V_6

22u/6.3V_6

VFB=0.8V

+VIN

+1.05V

1.05 Volt +/- 5%
TDC : 3.38A
PEAK : 4.5A
Width : 160mil

PJ10
*S_3720

PC215

PC211

PC213

22u/6.3V_6

22u/6.3V_6

PC214

PC207

*22u/6.3V_6

0.1u/16V_4

*22u/6.3V_6

PR69

6.34K_1%_4

PR222
20K_1%_4

G5335-AGND-1

R1

PC209
*1000p/50V_4

R2

Vo=0.8*(R1+R2)/R2

=1.0536V

+1.05V

Fsw=550KHz

PR220

73.2K_1%_4

G5335-TON-1

6

PU11

7

+5VPCU

Double check PU high with HW

C C

HWPG_1.05V[22]

G5335-AGND-1

+5VPCU

PR233

100K_1%_4

Pulse-Skipping mode

MAINON[15,22,24,26,29,30]

B B

PR226
*S_4

+3V

PR70
*0_5%_4

PR224
0_5%_4

PR72
10_5%_6

PC199

*0.047u/16V_4

G5335-AGND-1

PR229
*S_4

PC200
10u/6.3V_6

G5335-VCC-1

G5335-PWRGD-1

G5335-PFM-1

G5335-EN-1

G5335-SS-1

PC204

0.047u/16V_4

G5335-AGND-1

NC

21

VCC

1

PGOOD

3

PFM

2

EN

23

SS

G5335QT2U

G5335-AGND-1

PR232
*S_4

TON

V+#1
V+#2
V+#3
V+#4

LX#1
LX#2
LX#3
LX#4
LX#5
LX#6

PGND#1
PGND#2
PGND#3
PGND#4
PGND#5

AGND

BST

FB

8
9
22
24

20

G5335-BST-1

25
10
11
16

G5335-LX-1

17
18

12
13
14
15
19
4

5

G5335-FB-1

A A

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

+1.05V (G5335QT2U)

+1.05V (G5335QT2U)

+1.05V (G5335QT2U)

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

PROJECT :

Z8G

Z8G

Z8G

1A

1A

25 35Tuesday, December 26, 2017

25 35Tuesday, December 26, 2017

1

25 35Tuesday, December 26, 2017

1A

Vinafix.com

1

+3V

PR251
100K_1%_4

HWPG_1.2VSUS[22]

A A

TDC : 0.375A
PEAK : 0.5A
Width : 20mil

B B

SUSON[22]

MAINON[15,22,24,25,29,30]

TDC : 0.375A
PEAK : 0.5A
Width : 20mil

+VDDQ

0.1u/16V_4

PR78
*0_5%_4

PR246
100_1%_4

PR81
*S_4

1P35V_S51P35V_S3

PR252
*S_4

PR80
*S_4

+VDDQ_VTT

PC229

0.033u/16V_4

+1.2VSUS

PC231
*0.1u/16V_4

PC228
10u/6.3V_6

VID

+5V_S5

PC232
*0.1u/16V_4

20

VTT

2

VTTSNS

1

VTTGND

4

VTTREF

19

VLDOIN

PC230

22u/6.3V_6

PR244
*S_4

PR255 *S_4

PR256 *0_5%_4

Ref. Voltage

1P35V_S5

1P35V_S3

7

RT8231BGQW

GND

3

11

1P35V_VID

1P35V_PGOOD

10

S58S3

PU14

VID

14

R2

High 0.675V

Low

OCP=10A
L ripple current
=(19-1.2)*1.2/(2.2u*500k*19)
=1.022A
Vtrip=10-(1.022/2)*14.5mohm
=137.59mV
Rlimit=137.59mV/5uA*10=275.18Kohm

0.75V

DDR=1.2V
R1=7.87K/F_4
R2=10K/F_4

PGOOD

1P35V_CS

13

CS

FB

6

1P35V_FB

OCP=10A

PR253
274K_1%_4

1P35V_TON

9

TON

VDDQ5PGND

1P35V_VDDQ

R1

PR245

7.87K_1%_4

PR248
10K_1%_4

2

17

UGATE

18

BOOT

16

PHASE

15

LGATE

12

VDD

PAD

21

Fsw=500KHz

PR250
499K_1%_4

1P35V_UGATE

1P35V_BOOT

1P35V_PHASE
1P35V_LGATE
1P35V_VDD

Vo=Vref x (R1/R2+1)
=1.206V

PC238
1u/6.3V_4

PR254
*S_4

PR249

2.2_5%_6

+5V_S5

S0

S3 (mainon off) 1

S4/S5

PC236

0.1u/50V_6

S3

1

0

+VIN [13,20,23,24,25,27,28,30,31]
+1.2VSUS [7,10,11]
+1.2V [15,30]
+VDDQ_VTT [10,11]
+5V_S5 [6,20,21,24,27,28,31]
+3V [3,4,5,6,10,13,14,15,16,17,18,19,22,24,25,27,28,29,30]

PQ19
AON7410

PQ20
AON7752

D

G

4

S

2

153

5

D

G

4

S

213

Rds(on)=14.5mohm

VDDQ

ON

1

ON ON

OFF

0

3

PC47

0.1u/25V_4

PR82
*4.7_5%_6

PC48
*680p/50V_6

PC237

10u/25V_8

ON

OFF

PC234

10u/25V_8

PL9

1uH_7x7x3

1 2

Isat=14A

VTTVTTREFS5

ON

OFF

OFF0

4

5

26

+1.2VSUS

PC46

0.1u/16V_4

1.2 Volt +/- 5%
TDC : 5.91A
PEAK : 7.88A
OCP : 10A
Width : 240mil

+1.2VSUS

PJ13
*S_3720

PC233

PC225

22u/6.3V_8

22u/6.3V_8

for HDMI re-timer IC

+1.2VSUS

3

2

MAIND[29,30]

PC224

PC235

22u/6.3V_8

22u/6.3V_8

PC227

PC226

22u/6.3V_8

22u/6.3V_8

MAIND

PQ18
AO3404

1

+1.2V

TDC : 0.261A
PEAK : 0.348A
Width : 20mil

+VIN

PJ12
*S_3720

PC45

2200p/50V_4

PR247
*S_4PC223

PC222

0.1u/25V_4

C C

+2.5VSUS Power Rail For DDR4

+3V_S5 [3,6,7,12,15,16,17,18,19,21,22,24,29]

PR271

+3V

+3V_S5

Double Check PU high with HW

SUSON

DDR4_SUSON_2V5[22]

D D

1

PR269
100K_1%_4

HWPG_2.5V[22]

PR263 *0_5%_4

PR264 *S_4

PR270
*S_4

PR267
10K_5%_4

*S_6

PC250

4.7u/6.3V_6

4

PU15

VIN

VFB

6

PR265
15K_1%_4

3

G5719LX2.5V

LX

2

GND

PR266

47.5K_1%_4

R1

5

PG

G5719CTB1U

1

EN

PC246

0.47u/6.3V_4

R2

2

+2.5V_SUS [10,11]

PL10

2.2uH_2.5x2.0x1.2

1 2

PR268
*S_4

PC248

Vo=(0.6(R1+R2)/R2)
=2.5V

PC247

10u/6.3V_6

PC249

0.1u/16V_4

*10u/6.3V_6

3

PJ16
*S_3720

+2.5V_SUS

2.5Volt +/- 5%
TDC : 0.91A
PEAK : 1.2A
Width : 40mil

+2.5V_SUS

Reserve +2.5V for DDR4 VDDSPD

+2.5V_SUS

3

2

MAIND

4

PQ21
*AO3404

1

TDC : 0.156A
PEAK : 0.21A
Width : 20mil

Double Check with HW if Reserve

+2.5V

+2.5V [10,30]

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

DDR4 (RT8231BGQW)

DDR4 (RT8231BGQW)

DDR4 (RT8231BGQW)

Date: Sheet of

Date: Sheet of

Date: Sheet of

PROJECT :

Z8G

Z8G

Z8G

26 35Tuesday, December 26, 2017

26 35Tuesday, December 26, 2017

5

26 35Tuesday, December 26, 2017

1A

1A

1A

Vinafix.com

5

SVID_CLK : UP:160 ohm Series:95 ohm
SVID_ALERT : UP:68 ohm Series:220 ohm
SVID_DATA : UP:240 ohm Series:20 ohm

+1.05V

D D

PR214
240_1%_4

PR215
*200_1%_4

PC169

PR206

1000p/50V_4

160_1%_4

H_CPU_SVIDDAT
VR_SVID_ALERT#_VCORE
H_CPU_SVIDCLK

Check SVID PU UP R/Series R with HW

PR202
10K_1%_4

+3V

IMVP_PWRGD[22]

PR204 *10K_1%_4

+3V

H_CPU_SVIDCLK[6,28]

VR_SVID_ALERT#_VCORE[6,28]

+VREF_VCGI

1425mV
901mV

PR203 *S_4
PR205 *0_5%_4

H_PROCHOT#[6,22,23,28]

H_CPU_SVIDDAT[6,28]

+VREF_VCGI

PR137

57.6K_1%_4

+1.8V_S5

Imax=26A

PR191

24.9K_1%_4

FSW=550KHZ

PR190

2.94K_1%_4

PR186

38.3K_1%_4

PC138
1000p/50V_4

PR146
1K_1%_4

PR160

9.53K_1%_4

PR153
0_5%_4

PR192
365_1%_4

PR189
20_1%_4

PR187
681_1%_4

VNN_ON[22,28]

C C

CheckENSequencewithHW

B B

VRON[22]

Vset1
Delta Vset1

PR196
*S_4

PR216
*20K_1%_4

PR198 95.3_1%_4
PR199 *S_4
PR200 20_1%_4

PR50
20K_1%_4

PR45
680_1%_4

PR43

16.9K_1%_4

PR171
121K_1%_4

12

PR139
100K_NTC_4_1%

B=4250

PUT COLSE
TO VCCGI
HOT SPOT

675mVVset2
Delta Vset2 49.8mV
Vset3

A A

Delta Vset3
VTsen

974mV

950mV

448mV

5

4

DescriptionCloud book P/N

PU7

RT3601EAGQW

19

PR164
*S_4

RES CHIP 806 1/16W +-1%(0402)CS18062FB29

CAP CHIP 0.47UF 10V(+-10%,X5R,0402)CH4472K9B00

PVCC2

12

PVCC

PC119

2.2u/10V_4

UGATE

BOOT

PHASE

LGATE

PWM

ISEN1P
ISEN1N

IMON

VREF

VSEN

COMP

RGND

GND

29

PR38

2.2_5%_6

FB

VIN

13

PC118

0.1u/25V_4

9
8

10
11

14

20
21

18

17

25

23

24
22

PR41

3.3_5%_6

PR165

PR22

CS21002FB24 RES CHIP 1K 1/16W +-1% (0402)

PC8

+5V_S5 +5V_S5

VR_READY_VCGI

PC159
*0.1u/16V_4

VRON_VCGI

PR201 *S_4

VCLK_VCGI
ALERT#_VCGI
VDIO_VCGI

SET1_VCGI

PR49
280_1%_4

SET2_VCGI

PR46
110_1%_4

SET3_VCGI

PR42
182_1%_4

TSEN_VCGI

4

PR197
22_5%_6

PMON[23,28]

PC149

2.2u/10V_4

7

VR_READY

2

EN

3

VRHOT

6

VCLK

5

ALERT

4

VDIO

28

SET1

27

SET2

26

SET3

16

TSEN

VCC_VCCGI

1

VCC

DRVEN15PSYS

PMON

3

UGATE_VCGI
BOOT_VCGI

PHASE_VCGI
LGATE_VCGI

ISEN1P_VCGI
ISEN1N_VCGI

PR30

21.5K_1%_4

Vref=0.6V

PR163 3.9_1%_4

PR39 *S_4

COMP_VCGI

PC124 100p/50V_4

PR40 35.7K_1%_4

FB_VCGI
GND_VCGI

3

PR184
*S_6

PC24

0.1u/50V_6

LL~6m

+VIN_VCC_VCGI

PQ17
AON6414AL

G

4

PQ15
AON6792

G

4

PC11

0.1u/16V_4

PR31

40.2K_1%_4

Imax=26A

PC106 0.47u/6.3V_4

PC126 220p/50V_4

PR177 10K_1%_4

153

2

5

213

D

S

D

S

+VIN_VCC_VCGI

PC28

2200p/50V_4

PHASE_VCGI

PR32
*2.2_5%_6

PC19
*2200p/50V_4

+VREF_VCGI

2

+VIN [13,20,23,24,25,26,28,30,31]
+VCC_VCCGI [7]
+3V [3,4,5,6,10,13,14,15,16,17,18,19,22,24,25,26,28,29,30]
+5V_S5 [6,20,21,24,26,28,31]
+1.8V_S5 [3,4,5,6,7,9,12,16,19,23,29]
+1.05V [6,7,25,28]

PJ1
*S_3720

PC29

0.1u/25V_4

PC139

PC114
*0.1u/25V_4

10u/25V_8

Isat=45A
DCR=0.66m ohm

PR141
*S_4

PR165
365_1%_4

PR155
604_1%_4

PC125
*100p/50V_4

PR36
*S_4

PR172
*S_4

PC116
*100p/50V_4

PC152

10u/25V_8

PL3

0.15uH/36A_7x7x4

1 2

PC8

1u/6.3V_4

PR22
10K_1%_4

1 2

PR144

1K_NTC_4_3%

+VCC_VCCGI

2

PC25

PR140
*S_4

0.1u/25V_4

PR158
100_1%_4

PR150
100_1%_4

+

+

PC22

*330u/2V_7343H1.9

Place close
with VCORE
Inductor
B=3650

VCCGI_SENSE [7]
VCCGISS_SENSE [7]

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

27

+VIN

PC15

*33u/25V_D6.3H4.5

+VCC_VCCGI

󶁪

󶁪󶁪

PC31

PC147

22u/6.3V_6

PC7

PC109

22u/6.3V_6

PC37

PC101

*10u/6.3V_4

PC122

22u/6.3V_6

PC130

22u/6.3V_6

PC16

PC162

22u/6.3V_6

22u/6.3V_6

PC9

PC136

22u/6.3V_6

22u/6.3V_6

PC36

PC115

22u/6.3V_6

22u/6.3V_6

PC148

PC154

22u/6.3V_6

22u/6.3V_6

PC153

PC163

22u/6.3V_6

22u/6.3V_6

PC137

PC105

22u/6.3V_6

22u/6.3V_6

Total 20pcs 22u_0603 (with HW)

+VCCGI

Icc Max󶁪25A
Icc TDC󶁪18A
Vboot󶁪0V
OCP󶁪35A
Fsw󶁪550KHZ

VCCGI L/L󶁪

R_DC_LL󶁪6mV/A
R_AC_LL󶁪6mV/A

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

PROJECT :

+VCC_VCCGI (RT3601EAGQW)

+VCC_VCCGI (RT3601EAGQW)

+VCC_VCCGI (RT3601EAGQW)

Z8G

Z8G

Z8G

27 35Tuesday, December 26, 2017

27 35Tuesday, December 26, 2017

1

27 35Tuesday, December 26, 2017

22u/6.3V_6

22u/6.3V_6

*10u/6.3V_4

1A

1A

1A

Vinafix.com

5

4

3

2

1

SVID_CLK : UP:160 ohm Series:95 ohm
SVID_ALERT : UP:68 ohm Series:220 ohm
SVID_DATA : UP:240 ohm Series:20 ohm

+1.05V

D D

PR179
*240_1%_4

PR181
*200_1%_4

PR180
*160_1%_4

PC129
1000p/50V_4

H_CPU_SVIDDAT
VR_SVID_ALERT#_VCORE
H_CPU_SVIDCLK

Check SVID PU UP R/Series R with HW

PR18 10K_1%_4

VNN_ON[22,27]

S5_ON[22,24,29]

+VREF_VNN

+3V

PC81

1000p/50V_4

PR122

47.5K_1%_4

PR185 *S_4

PR183 *1K_1%_4

H_PROCHOT#[6,22,23,27]

PR182
221K_1%_4

PR152
100K_1%_4

PR151
215K_1%_4

PR7
324_1%_4

PR124

6.04K_1%_4

PR3

3.83K_1%_4

IMVP_PWRGD_VNN[22]

CheckENSequencewithHW

C C

H_CPU_SVIDCLK[6,27]

VR_SVID_ALERT#_VCORE[6,27]

H_CPU_SVIDDAT[6,27]

B B

Vset1
Delta Vset1

+VREF_VNN

124.9mV
899mV

PR20
*S_4

PR169 95.3_1%_4
PR166 *S_4
PR168 20_1%_4

PR174
68K_1%_4

PR157

22.6K_1%_4

PR145

2.15K_1%_4

PR2
121K_1%_4

PR127
100K_NTC_4_1%

B=4250

PUT COLSE
TO VNN
HOT SPOT

PR25 *S_4

PR170

11.5K_1%_4

PR159

12.4K_1%_4

PR135

3.48K_1%_4

12

373.4mVVset2

VR_READY_VNN

PC121

0.1u/16V_4

VRON_VNN

VCLK_VNN
ALERT#_VNN
VDIO_VNN

PR175
210_1%_4

PR167

3.83K_1%_4

PR143

9.09K_1%_4

TSEN_VNN

PR123

PR4

PR5

PR188
22_5%_6

SET1_VNN

SET2_VNN

SET3_VNN

CS11402FB19 RES CHIP 140 1/16W +-1%(0402)
CS12002FB25 RES CHIP 200 1/16W +-1%(0402)

VCC_VNN

VNN_PVCC1

PC112

2.2u/10V_4

1

7

VR_READY

2

EN

3

VRHOT

6

VCLK

5

ALERT

4

VDIO

28

SET1

27

SET2

26

SET3

16

TSEN

DRVEN15PSYS

PMON[23,27]

PMON

VCC

PU4

RT3601EAGQW

19

PR12
*S_4

12

PVCC

ISEN1N

29

Delta Vset2 1.14V

A A

Vset3
Delta Vset3
VTsen

176mV
950mV
548mV

5

4

RES CHIP 499 1/16W +-1%(0402)CS14992FB24

PC97

2.2u/10V_4

UGATE

BOOT

PHASE

LGATE

PWM

ISEN1P

IMON

VREF

VSEN

COMP

RGND

GND

13

9
8

10
11

14

20
21

18

17

25

23

24

FB

22

VIN

PC90

0.1u/25V_4

DescriptionCloud book P/N

PR17

2.2_5%_6

UGATE_VNN
BOOT_VNN

PHASE_VNN
LGATE_VNN

ISEN1P_VNN
ISEN1N_VNN

COMP_VNN

FB_VNN
GND_VNN

PR11

3.3_5%_6

+5V_S5+5V_S5

PC6

0.1u/50V_6

PR121

30.1K_1%_4

PR10 3.9_1%_4

PR136 *S_4

PC92 82p/50V_4

PR128 57.6K_1%_4

3

+VIN_VNN

PR147
*S_6

PQ16
AON7410

G

4

G

4

PQ14
AON7752

PC2

0.1u/16V_4

PR6

20.5K_1%_4

PC83 0.47u/6.3V_4

PC133

2200p/50V_4

D

S

2

153

PHASE_VNN

5

PR37
*2.2_5%_6

D

S

213

PC10
*2200p/50V_4

PC96 330p/50V_4

PR129 10K_1%_4

PC134

0.1u/25V_4

+VREF_VNN

PC151

10u/25V_8

Isat=26A
DCR(MAX)= 4.2m ohm

0.47uH/17.5A_7X7X3

1 2

PR161
*S_4

PR123
402_1%_4

PR4
402_1%_4

PC82
*100p/50V_4

PR120
*S_4

PC94
*0.1u/25V_4

PR126
*S_4

PC86
*100p/50V_4

+VIN [13,20,23,24,25,26,27,30,31]
+VNN [7]
+5V_S5 [6,20,21,24,26,27,31]
+1.05V [6,7,25,27]
+3V [3,4,5,6,10,13,14,15,16,17,18,19,22,24,25,26,27,29,30]

PJ6
*S_3720

PC161

PC128

10u/25V_8

0.1u/25V_4

PL4

PR162
*S_4

PC1

0.47u/10V_4
PR5

1K_1%_4
PR148

1 2

1K_NTC_4_3%

2

B=3650

Place close
with VCORE
Inductor

+VNN

PR34
100_1%_4

PR35
100_1%_4

+VIN+VIN_VNN

+VNN

+

PC18

*330u/2V_7343H1.9

PC142

22u/6.3V_6

PC132

PC165

PC164

22u/6.3V_6

22u/6.3V_6

PC30

PC20

22u/6.3V_6

22u/6.3V_6

PC34

PC17

22u/6.3V_6

22u/6.3V_6

PC155

22u/6.3V_6

PC27

22u/6.3V_6

PC146

22u/6.3V_6

PC127

22u/6.3V_6

PC23

PC135

22u/6.3V_6

PC38

PC117

22u/6.3V_6

Total 6pcs 22u_0603 (with HW)

VNN_SENSE [7]
VNNSS_SENSE [7]

+VNN

Icc Max󶁪5.6A
Icc TDC󶁪N/A
Vboot󶁪1.05V
OCP󶁪10A
Fsw󶁪600KHZ

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

+VNN (RT3601EAGQW)

+VNN (RT3601EAGQW)

+VNN (RT3601EAGQW)

Date: Sheet of

Date: Sheet of

Date: Sheet of

PROJECT :

1

22u/6.3V_6

22u/6.3V_6

*10u/6.3V_4

Z8G

Z8G

Z8G

28

PC35

*10u/6.3V_4

28 35Tuesday, December 26, 2017

28 35Tuesday, December 26, 2017

28 35Tuesday, December 26, 2017

1A

1A

1A

Vinafix.com

5

D D

H cha _  pull up to 3_

HWPG_1.8V_S5[22]

S5_ON[22,24,28]

C C

hc  Hih uc with HW

PR210
100K_1%_4

HWPG_1.24V_S5[22]

+3VPCU

PJ4
*S_3720

+3V_S5

PR238
100K_1%_4

Check RC delay time with HW
(follow ZHP RC dealy time)

+3V_S5

PR209
*S_4

PC150

0.01u/50V_4

5671PG_1.24V

PR54
10_5%_6

PC141
10u/6.3V_6

4

+3VPCU[6,13,14,16,20,22,23,24]
+1.8V_S5[3,4,5,6,7,9,12,16,19,23,27]
+1.24V_S5[7]
+1.8V[3,4,13,15,30]
+1.5V[14]

+3VPCU

PR239
*S_4

PR243
110K_1%_4

5671SVIN_1.24V

PC156
1u/6.3V_4

PR234
*S_6

PC221

0.1u/16V_4

4
9

10

8

11

5

PG

1

EN

PU8

POK
VIN#1
VIN#2

VCC
GND

M5671RE1U

4

VIN

PU13

G5719CTB1U

VFB

6

R2

PC123

*2200p/50V_4

LX

GND

PR240
15K_1%_4

NC#1
SW#1
SW#2

NC#2

PC220

4.7u/6.3V_4

3

G5719LX1.8V

2

R1

PR241
30K_1%_4

PR178

*2.2_5%_6

1
2
3
7
6

FB

5

EN

3

PL8

1 2

2.2uH_2.5x2.0x1.2

PR242
*S_4

Vo=(0.6(R1+R2)/R2)
=1.8V

PL5

1uH_7x7x3

5671LX_1.24V

1 2

PC166

PC160
*68p/50V_4

PC167
*0.1u/16V_4

*22p/50V_4

PR211
*S_4

5671NC_1.24V
5671FB_1.24V
5671EN_1.24V

+3V_S5[3,6,7,12,15,16,17,18,19,21,22,24,26]
+5VPCU[24,25]
+3V[3,4,5,6,10,13,14,15,16,17,18,19,22,24,25,26,27,28,30]

PC218

10u/6.3V_6

5671FB_1.24V_S

PR213

R1

10K_1%_4

PR212

R2

10K_1%_4

PC219

PC217

0.1u/16V_4

*10u/6.3V_6

PR207
*S_4

Vo=0.6*(R1+R2)/R2
=1.24V

2

+1.8V_S5

1.8Volt +/- 5%
TDC : 0.85A
PEAK : 1.13A
Width : 40mil

PJ11
*S_3720

+1.24V_S5

1.24Volt +/- 5%
TDC : 1.875A
PEAK : 2.5A
Width : 80mil

PC131

0.1u/25V_4

+1.8V_S5

+1.24V_S5

PC140

PJ7
*S_3720

22u/6.3V_6

1

29

+1.8V_S5

3

2

MAIND[26,30]

MAIND

PQ7
AO3404

1

+1.8V

TDC : 0.173A
PEAK : 0.23A
Width : 20mil

PR237
*S_8

HWPG_1.8V_S5

+1.5V

1.5Volt +/- 5%
TDC : 0.39A
PEAK : 0.52A
Width : 20mil

+1.5V

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

+1.8V_S5 / +1.24V_S5 / +1.5V

+1.8V_S5 / +1.24V_S5 / +1.5V

+1.8V_S5 / +1.24V_S5 / +1.5V

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

PROJECT :

Z8G

Z8G

Z8G

1A

1A

29 35Tuesday, December 26, 2017

29 35Tuesday, December 26, 2017

29 35Tuesday, December 26, 2017

1

1A

B B

+3VPCU

MAINON[15,22,24,25,26,30]

+5VPCU

A A

5

MAINON

PR73
*S_4

PR230
*S_8

PR228
*S_4

PC206
1u/25V_4

PC203

10u/6.3V_6

PR227

100K_5%_4

HWPG_1.5V[22]

PC202

0.1u/50V_6

PC201

*0.1u/50V_6

+3V

4

PR225
100K_5%_4

PU12
G9661MF11U

3

VIN

2

VEN
VPP4GND#1

1

POK

5

NC

6

VO

8
9

GND#2

ADJ

7

R1

PR236
30K_1%_4

Vref=0.8V Vo =0.8(1+R1/R2)

PR235
34K_1%_4

R2

3

PC216
10u/6.3V_6

=1.506V

Vinafix.com

5

4

VL[24]
+VIN[13,20,23,24,25,26,27,28,31]
+3V[3,4,5,6,10,13,14,15,16,17,18,19,22,24,25,26,27,28,29]
+5V[13,14,15,17,19,24]
+1.8V[3,4,13,15,29]
+2.5V[10,26]

3

2

1

30

D D

Thermal Protection

(1) Need fine tune

for thermal protect point

PR64

VL

C C

Rset(Kohm)=0.0012T*T-0.9308T+96.147
=29.363 K ohm

B B

MAINON_ON_G

150_1%_4

PR62

30.1K_1%_4

+VIN

PR79
1M_5%_6

PC43

0.1u/16V_4

PR59
22_5%_8

5

OT

VCC

PU2

TMP708AIDBVR

1

SET

GND

HYST

2

4

+5V PU High R= 220 ohm for
Bo-Bo sound issue.

+5V+3V +1.8V

PR74
*220_5%_8

(2) Note placement position

TEMP=80C

3

PR61
*S_4

HYST=VCC for 10
degree Hys.
HYST=GND for 30
degree Hys.

PR58
22_5%_8

SYS_SHDN#

+2.5V +1.2V

PR262
*22_5%_8

SYS_SHDN# [22,24]

PR75
22_5%_8

+VIN

PR101
1M_5%_6

MAIND

MAIND [26,29]

MAINON[15,22,24,25,26,29]

PR76

*100K_1%_6

A A

5

2

1 3

PQ10

DDTC144EUA-7-F

PR77
1M_5%_6

3

2

PQ6

1

2N7002K

4

3

2

1

*2N7002K

3

2

PQ5

1

2N7002K

3

3

2

PQ22

1

*2N7002K

3

2

PQ9

1

2N7002K

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

2

3

2

PQ13

1

2N7002K

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

PROJECT :

Thermal / Discharge

Thermal / Discharge

Thermal / Discharge

PC67
*2200p/50V_4PQ8

Z8G

Z8G

Z8G

1

1A

1A

1A

30 35Tuesday, December 26, 2017

30 35Tuesday, December 26, 2017

30 35Tuesday, December 26, 2017

Vinafix.com

5

4

3

2

1

31

Panel Spec (TFT-LCD 17.3'')

D D

+VIN [13,20,23,24,25,26,27,28,30]
+12V_Panel [13]
+5V_S5 [6,20,21,24,26,27,28]

Isat=5A

PL1

[email protected]/4.5A_5x5x1.8

1 2

+5V_S5

PR65
VL@0_5%_8

C C

B B

PC42

*[email protected]/25V_4

PANEL_LED_EN

PR63

VL@100K_1%_4

PR53
VL@0_5%_4

S D

1

PR56

VL@10K_5%_4

2

PQ4
VL@AO3415

3

2

G

VGS=-4.5V

3

PQ3
VL@2N7002K

1

PC39

VL@1u/6.3V_4

PR47 *VL@0_5%_4

PR26
VL@0_5%_4

PC13

[email protected]/16V_4

PC40

PC33

VL@10u/25V_8

VL@10u/25V_8

PANEL_LED_EN[22]

PANEL_LED_EN

61087EN

61087FREQ

PR48
VL@0_5%_4

PR44
*VL@0_5%_4

FSW : HI = 1.2M / LO = 650K

PU1 VL@TPS61087DRCR

8

IN

3

EN

9

FREQ

4

AGND

5

PGND

EPAD#111EPAD#212EPAD#313EPAD#414EPAD#515EPAD#6

16

SW#1

SW#2

FB

COMP

SS

6

61087SW

7

2

61087FB

1

61087COMP

10

61087SS

PC21

[email protected]/25V_4

40V, 2A

PD1
VL@DFLS240-7

2

VFB=1.238V

PR29
VL@100K_5%_4

PC14
VL@820p/50V_4

1

VL@174K_1%_4

PR27

VL@20K_1%_4

R1

PC180
*VL@10u/25V_8

R2

Vo =1.238*(1+R1/R2)
=12V

PC176
*VL@10u/25V_8PR28

VLED : 6V~21V (Typ:12V)
Power Consumption : 7W (MAX)

+12V_Panel
12 Volt +/- 5%
PEAK : 0.58A
Width : 40mil

+12V_Panel

PC177
VL@22u/25V_8

PC181
VL@22u/25V_8

BL Discharge Circuit

+VIN

PR15
VL@1M_5%_6

PQ1

PR1

*VL@100K_1%_6

VL@DDTC144EUA-7-F

2

3

PR14
VL@1M_5%_6

1 3

PR13

A A

5

4

PANEL_LED_EN

VL@0_5%_4

+12V_Panel

2

PR16
VL@22_5%_8

3

PQ2
VL@2N7002K

1

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

PROJECT :

LED Panel (TPS61087)

LED Panel (TPS61087)

LED Panel (TPS61087)

Z8G

Z8G

Z8G

1A

1A

31 35Tuesday, December 26, 2017

31 35Tuesday, December 26, 2017

1

31 35Tuesday, December 26, 2017

1A

Vinafix.com

5

4

3

2

1

Gemini lake Power Tree

110mil

D D

25mil

+VCC_VCCGI

840 mil

+VNN

200 mil

PU4

PU3

32

LAN RTL8411B-CG

55mil

+1.35VSUS

420 mil

PU15

RTC

20mil

CN13

40mil

U13

TPM

5mil

105mil

+3VPCU

310mil

PU5

LED

10mil

+3V_S5

70mil

C C

PU7

U14

Touch Pad

10mil

EC

12mil

U16

Audio codec

10mil

CN15

U15

WIFI

30mil

CN9

+3V

190mil

PU7

CRD RTL8411B-CG

35mil

U13

VIN

600mil

LCDVCC

60mil

U19

M.2 SSD

20mil

CN5

eMMC

B B

+1.8V_S5

40mil

+1.8V

20mil

PQ4PU12

15mil

U2

+1.05V

110mil

PU8

+1.24V_S5

55mil

PU10

+1.5V

20mil

305mil

A A

+5VPCU

590mil

PU11

+5V

240mil

+5V_S5

350mil

5

4

PU14

PU13

PU13

3

Codec

40mil

USBPWR1

100mil

panel boost

40mil

U15

USBPWR2

100mil

U7 U18 U3

+5V_FAN1

20mil

PU1 CN10 CN12 CN16 CN3

HDD+M2_PWR

60mil

+5V_ODD

60mil

TP_PWR

10mil

+TYPEC_VBUS_C

150mil

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

PROJECT :

Z8G

Z8G

POWER TREE

POWER TREE

POWER TREE

1

Z8G

32 35Tues day, December 26 , 2017

32 35Tues day, December 26 , 2017

32 35Tues day, December 26 , 2017

1A

1A

1A

Vinafix.com

5

4

3

2

1

VCCRTC

33

RTC_RST#

VCC_RTC_3P3V power to RTC_TEST# > 9 ms

D D

Adaptor in

From PWM to EC

POWER BUTTON

RTC_TEST#

+3VPCU/+5VPCU

SYS_HWPG

NBSWON#

S5_ON

+5V_S5/+3V_S5

From EC to PWM

VNN_ON

+VNN

Delay S5_ON (6.34ms)

C C

HWPG_1.8V_S5

From EC to SOC
From EC to SOC

From SOC to EC
From EC to PWM

B B

+1.8V_S5
+1.24V_S5

RSMRST#

DNBSWON#

SUSB#/SUSC#

SUSON

+1.35VSUS

MAINON

30ms

120ms

10ms

10ms

+1.05V/+1.5V

HWPG_1.5V

From PW to MOS

HWPG

MAIND

>100ms

+1.8V

From EC to SOC

EC_PWROK

boot up by SVID

+VCC_VCCGI

PLTRST#

A A

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

Power on Sequence

Power on Sequence

Power on Sequence

PROJECT :

Z8G

Z8G

Z8G

1A

1A

1A

33 35Tuesday, December 26, 2017

33 35Tuesday, December 26, 2017

33 35Tuesday, December 26, 2017

1