Acer 6120 Schematic

A

1 1

B

C

D

E

Compal Confidential

2 2

ZZZ

PAU30 M/B Schematics Document

ZZZ

DAZ@

DAZ0F900100

PCB PAU30 LA-6392P LS-6391P/6392P/6393P/6394 P

ZZZ1

DA1@

DA80000KE10

PCB 0F9 LA-6392P REV1 M/B

ZZZ2

DA2@

DA20000KT10

ZZZ3

ZZZ4

ZZZ5

DA20000KT10

DA2@

DA20000KU10

DA2@

DA20000KV10

DA2@

DA20000LE10

A

3 3

PCB 0F9 LS-6391P REV1 POWER_BTN/B

PCB 0F9 LS-6392P REV1 SWITCH/B

PCB 0F9 LS-6393P REV1 LED/B

4 4

PCB 0F9 LS-6394P REV1 LID SWITCH/B

Intel Arrandale Processo SV with DDRIII + Ibex Peak-M

2010-11-22

REV:1.0

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2009/11/23 2010/11/23

Compal Secret Data

Deciphered Date

D

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

Cover Page

PAU30 M/B LA-6392P Schematic

1 51Monday, November 22, 2010

E

0.1

A

B

C

D

E

Compal Confidential

Model Name : PAU30 File Name : LA-6392P

1 1

HDMI Conn.

page 34

2 2

MINI Card x1

3G/GPS

page 36

port 4

port 3

port 2 port 1

CRT Conn.

page 33

HDMI(DDPC)

PCI-Express x 8 (ABD PCIE1 2.5GT/S CKD PCIE1/2 2.5/5GT/S)

Fan Control

page 46

LVDS Conn.

page 32

SDVO to LVDS Converter

page 31,32

LVDS Conn.

page 30

LVDS(UMA)

SDVO(DDPB)

Analog RGB(UMA)

SATA x 6 (GEN1 1.5GT/S ,GEN2 3GT/S)

Intel

Arrandale (UMA only)

Processor

rPGA988A

FDI x8 (UMA)

100MHz

2.7GT/s

Intel

Ibex Peak-M

100MHz

PCH

page 15,16,17,18 19,20,21,22,23

page 4,5,6,7,8,9

DMI x4

100MHz

1GB/s x4

Memory BUS(DDRIII)

Dual Channel

1.5V DDRIII 800/1066

USB conn x2

USB port 0 USB port 1

page 40 page 40 page 30

USBx14

HD Audio

3.3V 48MHz

3.3V 24MHz

SPI

204pin DDRIII-SO-DIMM X2

BANK 0, 1, 2, 3

Bluetooth Conn

USB port 13

page 10,11

Camera

USB port 8

SIMM Card

USB port 5

Touch Screen x2

USB port 2, 3

page 40

3G Minicard

USB port 9

WLAN Minicard

USB port 4

page 36page 36page 36

PCI-E to USB3.0

µPD720200

page 39

MINI Card x1

WLAN

page 36 page 37

USB Conn. (USB 3.0 x 1

3 3

USB 2.0 x 1

page 39

RTC CKT.

page 15

Power On/Off CKT.

page 43

LAN(GbE)

AR8151

RJ45

page 38

port 0

SATA HDD Conn.

page 35

EC I/O Buffer

SM BUS

LPC BUS

33MHz

ENE KB926

page 41

BIOS ROM

page 42page 42

SPI ROM x1

page 15

G-Sensor

page 46

HDA Codec

ALC271X

page 44

Int. Speaker Phone Jack x 2

page 45 page 45

Clock Generator

IDT: 9LVS3199AKLFT SILEGO: SLG8LV597VTR Realtek: RTM890N-631-GRT

133/120/100/96/14.318MHZ to PCH

page 14

Int.MIC

page 45

DC/DC Interface CKT.

4 4

page 47,48

Power Circuit DC/DC

page 47,48

A

B

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPA L ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPA L ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2009/11/23 2010/11/23

Compal Secret Data

Deciphered Date

D

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

Block Diagrams

PAU30 M/B LA-6392P Schematic

E

2 51Tuesday, September 07, 2010

0.1

A

Voltage Rails

Power Plane Description

VIN

1 1

2 2

BATT+ Battery power supply (12.6V) N/A N/A N/A

B+

+CPU_CORE

+VGA_CORE

+VGFX_CORE Core voltage for Arrandale GPU (only for arrandaleCPU)

+0.75VS +0.75VP to +0.75VS switched power rail for DDR terminator

+1.0VSDGPU

+1.05VS_VTT

+1.05VS_PCH +1.05VS_VTT to +1.05VS_PCH power for PCH

+1.5V

+1.5VS

+1.5VSDGPU +1.5VS to +1.5VSDGPU switched power rail for GPU ON OFF OFF

+1.8VS (+5VALW or +3VALW) to 1.8V switched power rail to PCH & GPU

+3VALW +3VALW always on power rail

+3VALW_EC +3VALW always to KBC ON ON ON*

+3V_LAN +3VALW to +3V_LAN power rail for LAN ON ON

+3VS

+5VALW

+5VS +5VALW to +5VS switched power rail OFFON OFF

+VSB +VSBP to +VSB always on power rail for sequence control ON ON*

+RTCVCC RTC power

Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.

EC SM Bus1 address

Device

Smart Battery

PCH SM Bus address

3 3

Device

Clock Generator (9LVS3199AKLFT, RTM890N-631-GRT)

DDR DIMM0

DDR DIMM2

43level BOM Config

431954BOL01

4 4

Adapter power supply (19V)

AC or battery power rail for power circuit.

Core voltage for CPU

Core voltage for GPU

+1.0VSPDGPU to +1.0VSDGPU switched power rail for GPU

+1.05VS_VTTP to +1.05VS_VTT switched power rail for ARD CPU

+1.5VP to +1.5V power rail for DDRIII ON ON OFF

+1.5V to +1.5VS switched power rail

+3VALW to +3VS power rail

+5VALWP to +5VALW power rail

EC SM Bus2 address

Address Address

0001 011X b

Address

1101 0010b

1001 000Xb

1001 010Xb

SMT MB A6392 PAU30 W/3G

Device

BOM ConfigP/N Des.

DAZ@

B

S1 S3 S5

N/A N/A N/A

ON

ON OFF

ON OFF OFF

ON

N/AN/AN/A

OFF

ON ON*

ON*

OFF

ON ON*

ONON

C

STATE

Full ON

S1(Power On Suspend)

S3 (Suspend to RAM)

S4 (Suspend to Disk)

S5 (Soft OFF)

Board ID / SKU ID Table for AD channel

Vcc 3.3V +/- 5%

Board ID

Rb / Rd / Rf V min

0 1 2 3 4 5 6 7 NC

BOARD ID Table

Board ID

0 1 2 3 4 5 6 7

USB Port Table

USB 2.0 USB 1.1 Port

UHCI0

EHCI1

EHCI2

UHCI1

UHCI2

UHCI3

UHCI4

UHCI5

UHCI6

SIGNAL

SLP_S1# SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock

100K +/- 5%Ra/Rc/Re

0

8.2K +/- 5% 18K +/- 5% 33K +/- 5% 56K +/- 5% 100K +/- 5% 200K +/- 5%

PCB Revision

0 1 2 3 4 5 6 7 8

9 10 11 12 13

D

HIGH HIGH HIGH HIGH

LOW

LOW LOW LOW LOW

AD_BID

HIGH

LOWLOWLOW

HIGHHIGHHIGH

HIGH

0 V

ON

V typ

AD_BID

0 V 0 V

0.216 V 0.250 V 0.289 V

0.436 V

0.712 V

1.036 V

0.503 V

0.819 V

1.185 V 1.264 V

1.453 V 1.650 V 1.759 V

1.935 V

2.500 V

2.200 V

3.300 V

BTO Option Table

BTO Item BOM Structure

0.1

0.2

0.3

1.0

VRAM VRAM

Connector CONN@

Blue Tooth BT@

3 External USB Port

USB Port (Left Side) USB Port (Left Side) USB/Touch Screen2 USB/Touch Screen1 Mini Card(WLAN) SIMM CARD

Camera Mini Card(3G)

Blue Tooth

Unpop

ON

OFF

V

AD_BID

0.538 V

0.875 V

2.341 V

3.300 V

ON ON

ON

OFF

max

E

LOW

OFF

X76@

VENTURA@Ventura

@

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

C

2009/11/23 2010/11/23

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

Notes List

PAU30 M/B LA-6392P Schematic

3 51Tuesday, September 07, 2010

E

0.1

5

JCPU1A

DMI_PTX_H RX_N0 DMI_PTX_H RX_N1 DMI_PTX_H RX_N2 DMI_PTX_H RX_N3

DMI_PTX_H RX_P0 DMI_PTX_H RX_P1 DMI_PTX_H RX_P2

H_FDI_INT(15)

DMI_PTX_H RX_P3

DMI_HTX_P RX_N0 DMI_HTX_P RX_N1 DMI_HTX_P RX_N2 DMI_HTX_P RX_N3

DMI_HTX_P RX_P0 DMI_HTX_P RX_P1 DMI_HTX_P RX_P2 DMI_HTX_P RX_P3

H_FDI_TXN 0 H_FDI_TXN 1 H_FDI_TXN 2 H_FDI_TXN 3 H_FDI_TXN 4 H_FDI_TXN 5 H_FDI_TXN 6 H_FDI_TXN 7

H_FDI_TXP 0 H_FDI_TXP 1 H_FDI_TXP 2 H_FDI_TXP 3 H_FDI_TXP 4 H_FDI_TXP 5 H_FDI_TXP 6 H_FDI_TXP 7

D D

C C

H_FDI_FSYNC0(15) H_FDI_FSYNC1(15)

H_FDI_LSYNC0(15) H_FDI_LSYNC1(15)

B B

A24

DMI_RX#[0]

C23

DMI_RX#[1]

B22

DMI_RX#[2]

A21

DMI_RX#[3]

B24

DMI_RX[0]

D23

DMI_RX[1]

B23

DMI_RX[2]

A22

DMI_RX[3]

D24

DMI_TX#[0]

G24

DMI_TX#[1]

F23

DMI_TX#[2]

H23

DMI_TX#[3]

D25

DMI_TX[0]

F24

DMI_TX[1]

E23

DMI_TX[2]

G23

DMI_TX[3]

E22

FDI_TX#[0]

D21

FDI_TX#[1]

D19

FDI_TX#[2]

D18

FDI_TX#[3]

G21

FDI_TX#[4]

E19

FDI_TX#[5]

F21

FDI_TX#[6]

G18

FDI_TX#[7]

D22

FDI_TX[0]

C21

FDI_TX[1]

D20

FDI_TX[2]

C18

FDI_TX[3]

G22

FDI_TX[4]

E20

FDI_TX[5]

F20

FDI_TX[6]

G19

FDI_TX[7]

F17

FDI_FSYNC[0]

E17

FDI_FSYNC[1]

C17

FDI_INT

F18

FDI_LSYNC[0]

D17

FDI_LSYNC[1]

IC,AUB_CFD _rPGA,R1P0

CONN@

DMI Intel(R) FDI

PEG_ICOMPI

10mil

PEG_ICOMPO

PEG_RCOMPO

PEG_RBIAS

15mil

PEG_RX#[0] PEG_RX#[1] PEG_RX#[2] PEG_RX#[3] PEG_RX#[4] PEG_RX#[5] PEG_RX#[6] PEG_RX#[7] PEG_RX#[8]

PEG_RX#[9] PEG_RX#[10] PEG_RX#[11] PEG_RX#[12] PEG_RX#[13] PEG_RX#[14] PEG_RX#[15]

PEG_RX[0] PEG_RX[1] PEG_RX[2] PEG_RX[3] PEG_RX[4] PEG_RX[5] PEG_RX[6] PEG_RX[7] PEG_RX[8]

PEG_RX[9] PEG_RX[10] PEG_RX[11] PEG_RX[12] PEG_RX[13] PEG_RX[14] PEG_RX[15]

PEG_TX#[0] PEG_TX#[1] PEG_TX#[2] PEG_TX#[3] PEG_TX#[4] PEG_TX#[5] PEG_TX#[6] PEG_TX#[7] PEG_TX#[8] PEG_TX#[9]

PEG_TX#[10] PEG_TX#[11] PEG_TX#[12] PEG_TX#[13] PEG_TX#[14]

PCI EXPRESS -- GRAPHICS

PEG_TX#[15]

PEG_TX[0]

PEG_TX[1]

PEG_TX[2]

PEG_TX[3]

PEG_TX[4]

PEG_TX[5]

PEG_TX[6]

PEG_TX[7]

PEG_TX[8]

PEG_TX[9] PEG_TX[10] PEG_TX[11] PEG_TX[12] PEG_TX[13] PEG_TX[14] PEG_TX[15]

B26 A26 B27 A25

K35 J34 J33 G35 G32 F34 F31 D35 E33 C33 D32 B32 C31 B28 B30 A31

J35 H34 H33 F35 G33 E34 F32 D34 F33 B33 D31 A32 C30 A28 B29 A30

L33 M35 M33 M30 L31 K32 M29 J31 K29 H30 H29 F29 E28 D29 D27 C26

L34 M34 M32 L30 M31 K31 M28 H31 K28 G30 G29 F28 E27 D28 C27 C25

4

PEG_IRCOM P

EXP_RBIAS

R1419

1 2

R1420

1 2

3

49.9_040 2_1%

750_040 2_1%

6/22 remove unused pin net

DMI_PTX_H RX_N[0..3] (15) DMI_PTX_H RX_P[0..3] (15)

DMI_HTX_P RX_N[0..3] (15) DMI_HTX_P RX_P[0..3] (15)

H_FDI_TXN [0..7] (15)

H_FDI_TXP [0..7] (15)

CFG0

CFG3 CFG4

CFG7

2

JCPU1E

AP25

RSVD1

AL25

RSVD2

AL24

RSVD3

AL22

RSVD4

AJ33

RSVD5

AG9 M27

H17 G25 G17

E31

E30

AM30 AM28 AP31

AL32

AL30 AM31 AN29 AM32 AK32 AK31 AK28

AJ28 AN30 AN32

AJ32

AJ29

AJ30 AK30

H16

B19 A19

A20 B20

AC9 AB9

A34 A33

C35 B35

L28 J17

U9

T9

C1

A3

J29 J28

RSVD6 RSVD7 RSVD8 SA_DIMM_VREF SB_DIMM_VREF RSVD11 RSVD12 RSVD13 RSVD14

CFG[0] CFG[1] CFG[2] CFG[3] CFG[4] CFG[5] CFG[6] CFG[7] CFG[8] CFG[9] CFG[10] CFG[11] CFG[12] CFG[13] CFG[14] CFG[15] CFG[16] CFG[17] RSVD_TP_86

RSVD15 RSVD16

RSVD17 RSVD18

RSVD19 RSVD20

RSVD21 RSVD22

RSVD_NCTF_23 RSVD_NCTF_24

RSVD26 RSVD27

RSVD_NCTF_28 RSVD_NCTF_29

RSVD_NCTF_30 RSVD_NCTF_31

(CFD Only) (CFD Only)

RSVD_NCTF_37

RSVD_NCTF_40 RSVD_NCTF_41

RSVD_NCTF_42 RSVD_NCTF_43

RSVD_NCTF_54 RSVD_NCTF_55 RSVD_NCTF_56 RSVD_NCTF_57

RSVD_TP_59 RSVD_TP_60

RESERVED

RSVD_TP_66 RSVD_TP_67 RSVD_TP_68 RSVD_TP_69 RSVD_TP_70 RSVD_TP_71 RSVD_TP_72 RSVD_TP_73 RSVD_TP_74 RSVD_TP_75

RSVD_TP_76 RSVD_TP_77 RSVD_TP_78 RSVD_TP_79 RSVD_TP_80 RSVD_TP_81 RSVD_TP_82 RSVD_TP_83 RSVD_TP_84 RSVD_TP_85

RSVD32 RSVD33

RSVD34 RSVD35

RSVD36

RSVD38 RSVD39

RSVD45 RSVD46 RSVD47 RSVD48 RSVD49 RSVD50 RSVD51 RSVD52 RSVD53

RSVD58

KEY RSVD62 RSVD63 RSVD64 RSVD65

VSS

AJ13 AJ12

AH25 AK26

AL26 AR2

AJ26 AJ27

AP1 AT2

AT3 AR1

AL28 AL29 AP30 AP32 AL27 AT31 AT32 AP33 AR33 AT33 AT34 AP35 AR35 AR32

E15 F15 A2 D15 C15 AJ15 AH15

AA5 AA4 R8 AD3 AD2 AA2 AA1 R9 AG7 AE3

V4 V5 N2 AD5 AD7 W3 W2 N3 AE5 AD9

AP34

1

IC,AUB_CFD _rPGA,R1P0

CONN@

eDP Signals Mapping eDP Singal

eDP_TX0

PEG Singals

PEG_HTX_C_GRX_P15 eDP_TX#0 PEG_HTX_C_GRX_N15 eDP_TX1 PEG_HTX_C_GRX_P14 eDP_TX#1

A A

eDP_TX2 eDP_TX#2 eDP_TX3 eDP_TX#3 eDP_AUX eDP_AUX# eDP_HPD#

PEG_HTX_C_GRX_N14

PEG_HTX_C_GRX_P13

PEG_HTX_C_GRX_N13

PEG_HTX_C_GRX_P12

PEG_HTX_C_GRX_N12

PEG_GTX_C_HRX_P13

PEG_GTX_C_HRX_N13

PEG_GTX_C_HRX_P12

5

Lane Reversal

PEG_HTX_C_GRX_P0 PEG_HTX_C_GRX_N0 PEG_HTX_C_GRX_P1 PEG_HTX_C_GRX_N1 PEG_HTX_C_GRX_P2 PEG_HTX_C_GRX_N2 PEG_HTX_C_GRX_P3 PEG_HTX_C_GRX_N3 PEG_GTX_C_HRX_P2 PEG_GTX_C_HRX_N2 PEG_GTX_C_HRX_P3

Security Class ification

2009/11/ 23 2010/11/ 23

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/11/ 23 2010/11/ 23

3

Compal Secret Data

CFG0 - PCI-Express Configuration Select

*1:Single PEG 0:Bifurcation enabled

CFG3 - PCI-Express Static Lane Reversal

*1 :Normal Operation 0 :Lane Numbers Reversed 15 -> 0, 14 -> 1, ...

Deciphered Date

Title

Size Document Num ber Rev

Date: Sheet of

2

Date: Sheet of

CFG4 - Display Port Presence

*1:Disabled; No Physical Display Port attached to Embedd ed Display Port 0:Enabled; An externa l Display Port device is connected to the Emb edded Display Port

*:Default

Compal Electronics, Inc.

PROCESSOR (1/6) DMI,FDI,PEG

B

PAU30 M/B LA-6392P Schematic

1

1.0

4 51Monday, November 22, 2 010

5

JCPU1B

R1421 20_0402 _1% R142 1 20_0402 _1%

R1422 20_0402 _1% R142 2 20_0402 _1%

R1423 49.9_040 2_1% R142 3 49.9_040 2_1%

R1424 49.9_040 2_1% R142 4 49.9_040 2_1%

D D

H_PECI(18)

H_PROCH OT#(47)

H_THERM TRIP#(18)

R1427

1 2

0_0402_ 5%

R1437

1 2

0_0402_ 5%

12

PAD

T48

R142 7

del R1442 07/22

H_PM_SYNC(15)

R1443

R144 3

1 2

0_0402_ 5%

C C

H_CPUPW RGD(18)

PM_DRAM _PWRGD(15)

PLT_RST #(17)

2009/2/4 #414044 DG

Update Rev1.11

0_0402_ 5%

R1446 0_0402_ 5%

0_0402_ 5%

R1447

1 2

0_0402_ 5%

R1449

1 2

1.5K_040 2_1%

R144 6

1 2

R144 7

R14 49

H_COMP3

H_COMP2

H_COMP1

H_COMP0

SKTOCC# _R

@

H_CATER R#

H_PECI_R

H_PROCH OT#

H_THERM TRIP#_R

H_CPURS T#

H_CPUPW RGD_1

H_CPUPW RGD_0

PM_DRAM _PWRGD_R

H_VTTPW RGD_R

H_PW RGD_XDP_R

PLT_RST #_R

12

R1450

R1450 750_040 2_1%

750_040 2_1%

JCPU1B

AT23

AT24

G16

AT26

AH24

AK14

AT15

AN26

AK15

AP26

AL15

AN14

AN27

AK13

AM15

AM26

AL14

IC,AUB_CFD _rPGA,R1P0

CONN@

4

COMP3

COMP2

COMP1

COMP0

SKTOCC#

CATERR#

PECI

PROCHOT#

THERMTRIP#

RESET_OBS#

PM_SYNC

VCCPWRGOOD_1

VCCPWRGOOD_0

SM_DRAMPWROK

VTTPWRGOOD

TAPPWRGOOD

RSTIN#

MISC THERMAL

DPLL_REF_SSCLK#

CLOCKS

DDR3

MISC

DDR3

MISC

PWR MANAGEMENT

JTAG & BPM

BCLK

BCLK#

BCLK_ITP

BCLK_ITP#

PEG_CLK

PEG_CLK#

DPLL_REF_SSCLK

SM_DRAMRST#

SM_RCOMP[0] SM_RCOMP[1] SM_RCOMP[2]

PM_EXT_TS#[0] PM_EXT_TS#[1]

PRDY#

PREQ#

TCK

TMS

TRST#

TDO

TDI_M

TDO_M

DBR#

BPM#[0] BPM#[1] BPM#[2] BPM#[3] BPM#[4] BPM#[5] BPM#[6] BPM#[7]

TDI

A16 B16

AR30 AT30

E16 D16

A18 A17

F6

AL1 AM1 AN1

AN15 AP15

AT28 AP27

AN28 AP28 AT27

AT29 AR27 AR29 AP29

AN25

AJ22 AK22 AK24 AJ24 AJ25 AH22 AK23 AH23

3

CLK_CPU _DP_R CLK_CPU _DP#_R

SM_RCOM P_0 SM_RCOM P_1 SM_RCOM P_2

PM_EXTT S#0 PM_EXTT S#1_R

XDP_PRD Y# XDP_PRE Q#

XDP_TCL K XDP_TMS XDP_TRS T#

XDP_TDI_R XDP_TDO _R XDP_TDI_M XDP_TDO _M

XDP_DBR #_R

CLK_CPU _BCLK (18) CLK_CPU _BCLK# (18)

CLK_CPU _XDP CLK_CPU _XDP#

CLK_CPU _DMI (14) CLK_CPU _DMI# (14)

R1445 0_0402_ 5% R1445 0_0402_ 5%

1 2

XDP_OBS 0 XDP_OBS 1 XDP_OBS 2 XDP_OBS 3 XDP_OBS 4 XDP_OBS 5 XDP_OBS 6 XDP_OBS 7

T55 PAD @T55 P AD@ T56 PAD @T56 P AD@

SM_DRAM RST# (10)

1 2

R1429 10 0K_0402_5%

R1433 10K_040 2_5% R143 3 10K_040 2_5%

1 2

R1435 10K_040 2_5% R143 5 10K_040 2_5%

1 2

R1436 0_0402_ 5% R1436 0_0402_ 5%

1 2

SM_RCOM P_0 SM_RCOM P_1 SM_RCOM P_2

R1439 100_040 2_1% R1439 100_040 2_1% R1440 24.9_040 2_1% R144 0 24.9_040 2_1% R1441 130_040 2_1% R1441 130_040 2_1%

XDP_DBR ESET#

2

5/26 add test point

2009/08/14 #4253 02 CP_S3PowerReduction WhitePaper_Rev1 .0

+1.05VS_ VTT_CPU

PM_EXTT S#0_1 (10,11)

1 2 1 2 1 2

XDP_DBR ESET# (15)

2009/08/14 remove DP REF SSCLK

CLK_CPU _DP_R CLK_CPU _DP#_R

XDP_PRD Y# XDP_TMS XDP_TDI_R XDP_PRE Q# XDP_TCL K

XDP_TRS T#

XDP_TDO _M

XDP_TDI_M

R1425 0_0402_ 5% R1425 0_0402_ 5% R1426 0_0402_ 5% R1426 0_0402_ 5%

1 2 1 2

R1428 51_0402 _5%@R1428 51_0402 _5%@

1 2

R1430 51_0402 _5%@R1430 51_0402 _5%@

1 2

R1431 51_0402 _5%@R1431 51_0402 _5%@

1 2

R1432 51_0402 _5%@R1432 51_0402 _5%@

1 2

R1434 51_0402 _5%@R1434 51_0402 _5%@

1 2

R1438 51_0402 _5% R1438 51_04 02_5%

1 2

12

R1444

R1444 0_0402_ 5%

0_0402_ 5%

1

+1.05VS_ VTT_CPU

B B

H_VTTPW RGD(31,45)

#425302 CP_S3PowerReduction WhitePaper_Rev0.7

H_VTTPW RGD

MC74VHC 1G08DFT2G_SC 70-5

6/2 remove R1456

A A

PM_DRAM _PWRGD_R

5

U103

2

1

12

R1457

1.5K_040 2_1%

12

R1459

750_040 2_1%

+3VALW

5

P

B

Y

A

G

3

+3VALW

5

P

B

4

Y

A

G

MC74VHC 1G08DFT2G_SC 70-5

3

2009/04/23 Intel CRB 1.55 Update Change R393 to 1.1K_1%, R394 to 3.01K_1%

4

1 2

R1454 2K_0402 _1%

U104

H_VTTPW RGD

2

1

H_VTTPW RGD_R

12

R1455

R1455 1K_0402 _1%

1K_0402 _1%

4

+1.05VS_ VTT_CPU

R1451 49.9_ 0402_1% R1451 49.9_ 0402_1% R1452 68_0 402_5% R1452 68_0 402_5% R1453 68_0 402_5%@R145 3 6 8_0402_5%@ R1492 51_0 402_5%R1492 51_0 402_5%

Security Class ification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1 2

12 12 12

H_CATER R# H_PROCH OT# H_CPURS T#

XDP_TDO _R

Compal Secret Data

2009/11/ 23 2010/11/ 23

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

PROCESSOR (2/6) CLK,JTAG

Size Document Num ber Rev

B

PAU30 M/B LA-6392P Schematic

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

5 51Monday, November 22, 2 010

1

1.0

5

JCPU1C

C10

D10

H10

G10

AH5 AF5 AK6 AK7 AF6 AG5

AJ10

AL10

AK12

AK8

AK11

AN8 AM10 AR11

AL11

AM9

AN9

AT11 AP12 AM12 AN12 AM13

AT14

AT12

AL13 AR14 AP14

AC3 AB2

AE1 AB3 AE9

A10

B10

E10

F10

J10

AJ7 AJ6

AJ9

AL7

AL8

G8

G7

M6 M8

C7 A7

A8 D8

E6 F7 E9 B7 E7 C6

K7

J8

J7

L7

L9

L6 K8 N8 P9

U7

JCPU1C

SA_DQ[0] SA_DQ[1] SA_DQ[2] SA_DQ[3] SA_DQ[4] SA_DQ[5] SA_DQ[6] SA_DQ[7] SA_DQ[8] SA_DQ[9] SA_DQ[10] SA_DQ[11] SA_DQ[12] SA_DQ[13] SA_DQ[14] SA_DQ[15] SA_DQ[16] SA_DQ[17] SA_DQ[18] SA_DQ[19] SA_DQ[20] SA_DQ[21] SA_DQ[22] SA_DQ[23] SA_DQ[24] SA_DQ[25] SA_DQ[26] SA_DQ[27] SA_DQ[28] SA_DQ[29] SA_DQ[30] SA_DQ[31] SA_DQ[32] SA_DQ[33] SA_DQ[34] SA_DQ[35] SA_DQ[36] SA_DQ[37] SA_DQ[38] SA_DQ[39] SA_DQ[40] SA_DQ[41] SA_DQ[42] SA_DQ[43] SA_DQ[44] SA_DQ[45] SA_DQ[46] SA_DQ[47] SA_DQ[48] SA_DQ[49] SA_DQ[50] SA_DQ[51] SA_DQ[52] SA_DQ[53] SA_DQ[54] SA_DQ[55] SA_DQ[56] SA_DQ[57] SA_DQ[58] SA_DQ[59] SA_DQ[60] SA_DQ[61] SA_DQ[62] SA_DQ[63]

SA_BS[0] SA_BS[1] SA_BS[2]

SA_CAS# SA_RAS# SA_WE#

DDR SYSTEM MEMORY A

DDR_A_D [0..63](10) DDR_A_D M[0..7](10)

DDR_A_D QS#[0..7](10)

DDR_A_D QS[0..7](10)

DDR_A_M A[0..15](10)

DDR_A_D 0 DDR_A_D 1

D D

C C

B B

DDR_A_B S0(10) DDR_A_B S1(10) DDR_A_B S2(10)

DDR_A_C AS#(10) DDR_A_R AS#(10)

DDR_A_W E#(10)

DDR_A_D 2 DDR_A_D 3 DDR_A_D 4 DDR_A_D 5 DDR_A_D 6 DDR_A_D 7 DDR_A_D 8 DDR_A_D 9 DDR_A_D 10 DDR_A_D 11 DDR_A_D 12 DDR_A_D 13 DDR_A_D 14 DDR_A_D 15 DDR_A_D 16 DDR_A_D 17 DDR_A_D 18 DDR_A_D 19 DDR_A_D 20 DDR_A_D 21 DDR_A_D 22 DDR_A_D 23 DDR_A_D 24 DDR_A_D 25 DDR_A_D 26 DDR_A_D 27 DDR_A_D 28 DDR_A_D 29 DDR_A_D 30 DDR_A_D 31 DDR_A_D 32 DDR_A_D 33 DDR_A_D 34 DDR_A_D 35 DDR_A_D 36 DDR_A_D 37 DDR_A_D 38 DDR_A_D 39 DDR_A_D 40 DDR_A_D 41 DDR_A_D 42 DDR_A_D 43 DDR_A_D 44 DDR_A_D 45 DDR_A_D 46 DDR_A_D 47 DDR_A_D 48 DDR_A_D 49 DDR_A_D 50 DDR_A_D 51 DDR_A_D 52 DDR_A_D 53 DDR_A_D 54 DDR_A_D 55 DDR_A_D 56 DDR_A_D 57 DDR_A_D 58 DDR_A_D 59 DDR_A_D 60 DDR_A_D 61 DDR_A_D 62 DDR_A_D 63

DDR_A_B S0 DDR_A_B S1 DDR_A_B S2

DDR_A_C AS# DDR_A_R AS# DDR_A_W E#

SA_CK[0] SA_CK#[0] SA_CKE[0]

SA_CK[1] SA_CK#[1] SA_CKE[1]

SA_CS#[0] SA_CS#[1]

SA_ODT[0] SA_ODT[1]

SA_DM[0] SA_DM[1] SA_DM[2] SA_DM[3] SA_DM[4] SA_DM[5] SA_DM[6] SA_DM[7]

SA_DQS#[0] SA_DQS#[1] SA_DQS#[2] SA_DQS#[3] SA_DQS#[4] SA_DQS#[5] SA_DQS#[6] SA_DQS#[7]

SA_DQS[0] SA_DQS[1] SA_DQS[2] SA_DQS[3] SA_DQS[4] SA_DQS[5] SA_DQS[6] SA_DQS[7]

SA_MA[0] SA_MA[1] SA_MA[2] SA_MA[3] SA_MA[4] SA_MA[5] SA_MA[6] SA_MA[7] SA_MA[8]

SA_MA[9] SA_MA[10] SA_MA[11] SA_MA[12] SA_MA[13] SA_MA[14] SA_MA[15]

4

AA6 AA7 P7

Y6 Y5 P6

AE2 AE8

AD8 AF9

B9 D7 H7 M7 AG6 AM7 AN10 AN13

C9 F8 J9 N9 AH7 AK9 AP11 AT13

C8 F9 H9 M9 AH8 AK10 AN11 AR13

Y3 W1 AA8 AA3 V1 AA9 V8 T1 Y9 U6 AD4 T2 U3 AG8 T3 V9

DDR_A_D M0 DDR_A_D M1 DDR_A_D M2 DDR_A_D M3 DDR_A_D M4 DDR_A_D M5 DDR_A_D M6 DDR_A_D M7

DDR_A_D QS#0 DDR_A_D QS#1 DDR_A_D QS#2 DDR_A_D QS#3 DDR_A_D QS#4 DDR_A_D QS#5 DDR_A_D QS#6 DDR_A_D QS#7

DDR_A_D QS0 DDR_A_D QS1 DDR_A_D QS2 DDR_A_D QS3 DDR_A_D QS4 DDR_A_D QS5 DDR_A_D QS6 DDR_A_D QS7

DDR_A_M A0 DDR_A_M A1 DDR_A_M A2 DDR_A_M A3 DDR_A_M A4 DDR_A_M A5 DDR_A_M A6 DDR_A_M A7 DDR_A_M A8 DDR_A_M A9 DDR_A_M A10 DDR_A_M A11 DDR_A_M A12 DDR_A_M A13 DDR_A_M A14 DDR_A_M A15

DDR_A_C LK0 (10) DDR_A_C LK0# (10) DDR_A_C KE0 (10)

DDR_A_C LK1 (10) DDR_A_C LK1# (10) DDR_A_C KE1 (10)

DDR_A_C S0# (10) DDR_A_C S1# (10)

DDR_A_O DT0 (10 ) DDR_A_O DT1 (10 )

3

JCPU1D

AF3

AG1

AK1 AG4 AG3

AH4

AK3

AK4 AM6

AN2

AK5

AK2 AM4 AM3

AP3

AN5

AT4

AN6

AN4

AN3

AT5

AT6

AN7

AP6

AP8

AT9

AT7

AP9

AR10 AT10

AB1

AC5

AC6

JCPU1D

B5 A5

C3

B3 E4 A6

A4 C4 D1 D2

F2

F1 C2

F5

F3 G4 H6 G2

J6

J3 G1 G5

J2

J1

J5

K2 L3

M1

K5

K4 M4 N5

AJ3

AJ4

W5

R7

Y7

DDR_B_D [0..63](11)

DDR_B_D M[0..7](11)

DDR_B_D QS#[0..7](11)

DDR_B_D QS[0..7](11) DDR_B_M A[0..15](11)

DDR_B_D 0 DDR_B_D 1 DDR_B_D 2 DDR_B_D 3 DDR_B_D 4 DDR_B_D 5 DDR_B_D 6 DDR_B_D 7 DDR_B_D 8 DDR_B_D 9 DDR_B_D 10 DDR_B_D 11 DDR_B_D 12 DDR_B_D 13 DDR_B_D 14 DDR_B_D 15 DDR_B_D 16 DDR_B_D 17 DDR_B_D 18 DDR_B_D 19 DDR_B_D 20 DDR_B_D 21 DDR_B_D 22 DDR_B_D 23 DDR_B_D 24 DDR_B_D 25 DDR_B_D 26 DDR_B_D 27 DDR_B_D 28 DDR_B_D 29 DDR_B_D 30 DDR_B_D 31 DDR_B_D 32 DDR_B_D 33 DDR_B_D 34 DDR_B_D 35 DDR_B_D 36 DDR_B_D 37 DDR_B_D 38 DDR_B_D 39 DDR_B_D 40 DDR_B_D 41 DDR_B_D 42 DDR_B_D 43 DDR_B_D 44 DDR_B_D 45 DDR_B_D 46 DDR_B_D 47 DDR_B_D 48 DDR_B_D 49 DDR_B_D 50 DDR_B_D 51 DDR_B_D 52 DDR_B_D 53 DDR_B_D 54 DDR_B_D 55 DDR_B_D 56 DDR_B_D 57 DDR_B_D 58 DDR_B_D 59 DDR_B_D 60 DDR_B_D 61 DDR_B_D 62 DDR_B_D 63

DDR_B_B S0(11) DDR_B_B S1(11) DDR_B_B S2(11)

DDR_B_C AS#(11) DDR_B_R AS#(11)

DDR_B_W E#(11)

DDR_B_BS0 DDR_B_B S1 DDR_B_B S2

DDR_B_C AS# DDR_B_R AS# DDR_B_W E#

SB_DQ[0] SB_DQ[1] SB_DQ[2] SB_DQ[3] SB_DQ[4] SB_DQ[5] SB_DQ[6] SB_DQ[7] SB_DQ[8] SB_DQ[9] SB_DQ[10] SB_DQ[11] SB_DQ[12] SB_DQ[13] SB_DQ[14] SB_DQ[15] SB_DQ[16] SB_DQ[17] SB_DQ[18] SB_DQ[19] SB_DQ[20] SB_DQ[21] SB_DQ[22] SB_DQ[23] SB_DQ[24] SB_DQ[25] SB_DQ[26] SB_DQ[27] SB_DQ[28] SB_DQ[29] SB_DQ[30] SB_DQ[31] SB_DQ[32] SB_DQ[33] SB_DQ[34] SB_DQ[35] SB_DQ[36] SB_DQ[37] SB_DQ[38] SB_DQ[39] SB_DQ[40] SB_DQ[41] SB_DQ[42] SB_DQ[43] SB_DQ[44] SB_DQ[45] SB_DQ[46] SB_DQ[47] SB_DQ[48] SB_DQ[49] SB_DQ[50] SB_DQ[51] SB_DQ[52] SB_DQ[53] SB_DQ[54] SB_DQ[55] SB_DQ[56] SB_DQ[57] SB_DQ[58] SB_DQ[59] SB_DQ[60] SB_DQ[61] SB_DQ[62] SB_DQ[63]

SB_BS[0] SB_BS[1] SB_BS[2]

SB_CAS# SB_RAS# SB_WE#

2

SB_CK[0]

SB_CK#[0]

SB_CKE[0]

SB_CK[1]

SB_CK#[1]

SB_CKE[1]

SB_CS#[0] SB_CS#[1]

SB_ODT[0] SB_ODT[1]

SB_DM[0] SB_DM[1] SB_DM[2] SB_DM[3] SB_DM[4] SB_DM[5] SB_DM[6] SB_DM[7]

SB_DQS#[0] SB_DQS#[1] SB_DQS#[2] SB_DQS#[3] SB_DQS#[4] SB_DQS#[5] SB_DQS#[6] SB_DQS#[7]

SB_DQS[0] SB_DQS[1] SB_DQS[2] SB_DQS[3] SB_DQS[4] SB_DQS[5] SB_DQS[6] SB_DQS[7]

DDR SYSTEM MEMORY - B

SB_MA[0] SB_MA[1] SB_MA[2] SB_MA[3] SB_MA[4] SB_MA[5] SB_MA[6] SB_MA[7] SB_MA[8]

SB_MA[9] SB_MA[10] SB_MA[11] SB_MA[12] SB_MA[13] SB_MA[14] SB_MA[15]

W8 W9 M3

V7 V6 M2

AB8 AD6

AC7 AD1

D4 E1 H3 K1 AH1 AL2 AR4 AT8

D5 F4 J4 L4 AH2 AL4 AR5 AR8

C5 E3 H4 M5 AG2 AL5 AP5 AR7

U5 V2 T5 V3 R1 T8 R2 R6 R4 R5 AB5 P3 R3 AF7 P5 N1

DDR_B_D M0 DDR_B_D M1 DDR_B_D M2 DDR_B_D M3 DDR_B_D M4 DDR_B_D M5 DDR_B_D M6 DDR_B_D M7

DDR_B_D QS#0 DDR_B_D QS#1 DDR_B_D QS#2 DDR_B_D QS#3 DDR_B_D QS#4 DDR_B_D QS#5 DDR_B_D QS#6 DDR_B_D QS#7

DDR_B_D QS0 DDR_B_D QS1 DDR_B_D QS2 DDR_B_D QS3 DDR_B_D QS4 DDR_B_D QS5 DDR_B_D QS6 DDR_B_D QS7

DDR_B_M A0 DDR_B_M A1 DDR_B_M A2 DDR_B_M A3 DDR_B_M A4 DDR_B_M A5 DDR_B_M A6 DDR_B_M A7 DDR_B_M A8 DDR_B_M A9 DDR_B_M A10 DDR_B_M A11 DDR_B_M A12 DDR_B_M A13 DDR_B_M A14 DDR_B_M A15

1

DDR_B_C LK0 (11) DDR_B_C LK0# (11) DDR_B_C KE0 (11)

DDR_B_C LK1 (11) DDR_B_C LK1# (11) DDR_B_C KE1 (11)

DDR_B_C S0# (11) DDR_B_C S1# (11)

DDR_B_O DT0 (11 ) DDR_B_O DT1 (11 )

IC,AUB_CFD _rPGA,R1P0

CONN@

A A

Security Class ification

2009/11/ 23 2010/11/ 23

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/11/ 23 2010/11/ 23

3

Compal Secret Data

Deciphered Date

IC,AUB_CFD _rPGA,R1P0

CONN@

2

Compal Electronics, Inc.

Title

PROCESSOR (3/6) DDRIII

Size Document Num ber Rev

B

Date: Sheet

Date: Sheet of

Compal Electronics, Inc.

PAU30 M/B LA-6392P Schematic

1

of

6 51Monday, November 22, 2 010

1.0

5

JCPU1F

W15 MOW

+CPU_CORE

W

48A Continuous 18A

AG35

VCC1

AG34

VCC2

AG33

VCC3

AG32

D D

C C

B B

A A

5

VCC4

AG31

VCC5

AG30

VCC6

AG29

VCC7

AG28

VCC8

AG27

VCC9

AG26

VCC10

AF35

VCC11

AF34

VCC12

AF33

VCC13

AF32

VCC14

AF31

VCC15

AF30

VCC16

AF29

VCC17

AF28

VCC18

AF27

VCC19

AF26

VCC20

AD35

VCC21

AD34

VCC22

AD33

VCC23

AD32

VCC24

AD31

VCC25

AD30

VCC26

AD29

VCC27

AD28

VCC28

AD27

VCC29

AD26

VCC30

AC35

VCC31

AC34

VCC32

AC33

VCC33

AC32

VCC34

AC31

VCC35

AC30

VCC36

AC29

VCC37

AC28

VCC38

AC27

VCC39

AC26

VCC40

AA35

VCC41

AA34

VCC42

AA33

VCC43

AA32

VCC44

AA31

VCC45

AA30

VCC46

AA29

VCC47

AA28

VCC48

AA27

VCC49

AA26

VCC50

Y35

VCC51

Y34

VCC52

Y33

VCC53

Y32

VCC54

Y31

VCC55

Y30

VCC56

Y29

VCC57

Y28

VCC58

Y27

VCC59

Y26

VCC60

V35

VCC61

V34

VCC62

V33

VCC63

V32

VCC64

V31

VCC65

V30

VCC66

V29

VCC67

V28

VCC68

V27

VCC69

V26

VCC70

U35

VCC71

U34

VCC72

U33

VCC73

U32

VCC74

U31

VCC75

U30

VCC76

U29

VCC77

U28

VCC78

U27

VCC79

U26

VCC80

R35

VCC81

R34

VCC82

R33

VCC83

R32

VCC84

R31

VCC85

R30

VCC86

R29

VCC87

R28

VCC88

R27

VCC89

R26

VCC90

P35

VCC91

P34

VCC92

P33

VCC93

P32

VCC94

P31

VCC95

P30

VCC96

P29

VCC97

P28

VCC98

P27

VCC99

P26

VCC100

IC,AUB_CFD_rPGA,R1P0

CONN@

1.1V RAIL POWER

CPU CORE SUPPLY

POWER

CPU VIDS

SENSE LINES

Peak 21A

VTT0_1 VTT0_2 VTT0_3 VTT0_4 VTT0_5 VTT0_6 VTT0_7 VTT0_8

VTT0_9 VTT0_10 VTT0_11 VTT0_12 VTT0_13 VTT0_14 VTT0_15 VTT0_16 VTT0_17 VTT0_18 VTT0_19 VTT0_20 VTT0_21 VTT0_22 VTT0_23 VTT0_24 VTT0_25 VTT0_26 VTT0_27 VTT0_28 VTT0_29 VTT0_30 VTT0_31 VTT0_32

VTT0_33 VTT0_34 VTT0_35 VTT0_36 VTT0_37 VTT0_38 VTT0_39 VTT0_40 VTT0_41 VTT0_42 VTT0_43 VTT0_44

PSI#

VID[0] VID[1] VID[2] VID[3] VID[4] VID[5] VID[6]

PROC_DPRSLPVR

VTT_SELECT

ISENSE

VCC_SENSE

VSS_SENSE

VTT_SENSE

VSS_SENSE_VTT

4

AH14 AH12 AH11 AH10 J14 J13 H14 H12 G14 G13 G12 G11 F14 F13 F12 F11 E14 E12 D14 D13 D12 D11 C14 C13 C12 C11 B14 B12 A14 A13 A12 A11

AF10 AE10 AC10 AB10 Y10 W10 U10 T10 J12 J11 J16 J15

AN33

AK35 AK33 AK34 AL35 AL33 AM33 AM35 AM34

H_VTTVID1

G15

H_VTTVID1 = low, 1.1V

H_VTTVID1 = high, 1.05V

AN35

VCCSENSE_R

AJ34

VSSSENSE_R

AJ35

B15

VSS_SENSE_VTT

A15

4

10U_0805_6.3V6M

1

C1344

2

10U_0805_6.3V6M

+1.05VS_VTT_CPU

+

1

2

1 2

10U_0805_6.3V6M

1

C1345

2

1

+

C1360

C1360 330U_D2_2V_Y

330U_D2_2V_Y

2

+1.05VS_VTT_CPU

VTT_SENSE (45)

10U_0805_6.3V6M

1

C1343

2

10U_0805_6.3V6M

C1359,C1360 change to ESR9 6/29

330U_D2_2V_Y

1

C1359

2

22U_0805_6.3V6M

1

C1375

C1374

2

22U_0805_6.3V6M

T49

@ T49

@

PAD

IMVP_IMON (47)

R1479 0_0402_5% R1479 0_0402_5%

1 2

R1480 0_0402_5% R1480 0_0402_5%

1 2

R1482 0_0402_5%R1482 0_0402_5%

10U_0805_6.3V6M

1

C1346

C1347

2

10U_0805_6.3V6M

H_PSI# (47)

CPU_VID0 (47) CPU_VID1 (47) CPU_VID2 (47) CPU_VID3 (47) CPU_VID4 (47) CPU_VID5 (47) CPU_VID6 (47) H_DPRSLPVR (47)

R1478 100_0402_1%

VCCSENSE VSSSENSE

R1481 100_0402_1%

VTT Rail

Auburndale +1.1VS_VTT=1.05V Clarksfield +1.1VS_VTT=1.1V

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

+1.05VS_VTT_CPU

1

C1348

C1349

2

10U_0805_6.3V6M

CSC (Current Sense Configuration) 8/25

CPU_VID0

CPU_VID1

CPU_VID2

CPU_VID3

CPU_VID4

CPU_VID5

CPU_VID6

H_DPRSLPVR

H_PSI#

1 2

3

R1460 1K_0402 _1% R1460 1K_0402 _1%

1 2

R1461 1K_0402 _1%@R1461 1K_0402_1%@

1 2

R1462 1K_0402 _1% R1462 1K_0402 _1%

1 2

R1463 1K_0402 _1%@R1463 1K_0402_1%@

1 2

R1464 1K_0402 _1% R1464 1K_0402 _1%

1 2

R1465 1K_0402 _1%@R1465 1K_0402_1%@

1 2

R1466 1K_0402 _1%@R1466 1K_0402_1%@

1 2

R1467 1K_0402 _1% R1467 1K_0402 _1%

1 2

R1468 1K_0402 _1%@R1468 1K_0402_1%@

1 2

R1469 1K_0402 _1% R1469 1K_0402 _1%

1 2

R1470 1K_0402 _1% R1470 1K_0402 _1%

1 2

R1471 1K_0402 _1%@R1471 1K_0402_1%@

1 2

R1472 1K_0402 _1%@R1472 1K_0402_1%@

1 2

R1473 1K_0402 _1% R1473 1K_0402 _1%

1 2

R1474 1K_0402 _1% R1474 1K_0402 _1%

1 2

R1475 1K_0402 _1%@R1475 1K_0402_1%@

1 2

R1476 1K_0402 _1%@R1476 1K_0402_1%@

1 2

R1477 1K_0402 _1% R1477 1K_0402 _1%

1 2

+CPU_CORE

VCCSENSE (47)

VSSSENSE (47)

Compal Secret Data

2009/11/23 2010/11/23

Compal Secret Data

+CPU_CORE

10U_0805_6.3V6M

1

C1350

2

+1.05VS_VTT_CPU

Deciphered Date

1

C1351

2

10U_0805_6.3V6M

330U_D2_2V_Y

2

+CPU-CORE Decoupling SPCAP,Polymer

MLCC 0805 X5R

10U_0805_6.3V6M

1

C1352

2

(Place these capacitors between inductor and socket on Bottom)

+CPU_CORE

1

C1361

2

10U_0805_6.3V6M

+CPU_CORE

1

C1368

2

22U_0805_6.3V6M

+CPU_CORE

1

C1376

2

22U_0805_6.3V6M

+CPU_CORE

1

+

C1382

@

2

C,uF

4X470uF 4m ohm/4

16X22uF

ESR, mohm

3m ohm/12

Stuffing Option

2X470uF

16X10uF 3m ohm/16

10U_0805_6.3V6M

1

C1353

2

10U_0805_6.3V6M

1

C1362

2

(Place these capacitors under CPU socket, top layer)

22U_0805_6.3V6M

1

C1369

2

(Place these capacitors on CPU cavity, Bottom Layer)

22U_0805_6.3V6M

1

C1377

2

(Place these capacitors on CPU cavity, Bottom Layer)

C1353

C1354

C1362

C1363

10U_0805_6.3V6M

C1370

22U_0805_6.3V6M

C1378

22U_0805_6.3V6M

1

C1354

2

10U_0805_6.3V6M

1

C1363

2

1

C1371

2

1

2

10U_0805_6.3V6M

1

C1355

2

1

C1364

2

10U_0805_6.3V6M

22U_0805_6.3V6M

1

C1371

2

22U_0805_6.3V6M

1

C1379

2

22U_0805_6.3V6M

1

C1356

2

1

C1365

2

1

C1372

2

1

C1380

2

4 x 470uF(4.5mohm@100kHz; 4.0mohm@SRF)

1

+

C1383

2

330U_D2_2V_Y

TOP side (under inductor)

Title

Size Document Number Rev

Custom

Date: Sheet of

1

+

C1384

2

330U_D2_2V_Y

Compal Electronics, Inc.

PROCESSOR (4/6) PWR,Bypass

PAU30 M/B LA-6392P Schematic

330U_D2_2V_Y

1

C1356

C1357

10U_0805_6.3V6M

C1365

C1366

22U_0805_6.3V6M

C1373

22U_0805_6.3V6M

C1381

1

+

C1385

2

1

C1357

2

1

C1366

2

1

2

1

2

330U_D2_2V_Y

7 51Monday, November 22, 2010

10U_0805_6.3V6M

1

C1358

2

1

C1367

2

10U_0805_6.3V6M

1

+

C1386

2

1.0

5

4

3

2

1

+VGFX_C ORE

10U_080 5_6.3V6M

22U_080 5_6.3V6M

10U_080 5_6.3V6M

D D

C C

B B

C1470

1

2

C1388

330U_D2 _2V_Y

1

C1389

+

2

22U_080 5_6.3V6M

C1400

22U_080 5_6.3V6M

C1404

22U_080 5_6.3V6M

C1390

+1.05VS_ VTT_CPU

1

2

+1.05VS_ VTT_CPU

1

2

10U_080 5_6.3V6M

1

C1391

C1387

2

10U_080 5_6.3V6M

1

C1401

22U_080 5_6.3V6M

2

1

C1405

22U_080 5_6.3V6M

2

1

2

JCPU1G

AT21

VAXG1

AT19

VAXG2

AT18

VAXG3

AT16

VAXG4

AR21

VAXG5

AR19

VAXG6

AR18

VAXG7

AR16

VAXG8

AP21

VAXG9

AP19

VAXG10

AP18

VAXG11

AP16

VAXG12

AN21

VAXG13

AN19

VAXG14

AN18

VAXG15

AN16

VAXG16

AM21

VAXG17

AM19

VAXG18

AM18

VAXG19

AM16

VAXG20

AL21

VAXG21

AL19

VAXG22

AL18

VAXG23

AL16

VAXG24

AK21

VAXG25

AK19

VAXG26

AK18

VAXG27

AK16

VAXG28

AJ21

VAXG29

AJ19

VAXG30

AJ18

VAXG31

AJ16

VAXG32

AH21

VAXG33

AH19

VAXG34

AH18

VAXG35

AH16

VAXG36

J24

VTT1_45

J23

VTT1_46

H25

VTT1_47

K26

VTT1_48

J27

VTT1_49

J26

VTT1_50

J25

VTT1_51

H27

VTT1_52

G28

VTT1_53

G27

VTT1_54

G26

VTT1_55

F26

VTT1_56

E26

VTT1_57

E25

VTT1_58

IC,AUB_CFD _rPGA,R1P0

CONN@

15A

GRAPHICS

FDI PEG & DMI

VAXG_SENSE

VSSAXG_SENSE

SENSE

LINES

SENSE

LINES

GFX_VID[0] GFX_VID[1] GFX_VID[2] GFX_VID[3] GFX_VID[4] GFX_VID[5] GFX_VID[6]

GFX_VR_EN

GFX_DPRSLPVR

GFX_IMON

GRAPHICS VIDs

VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8

VDDQ9 VDDQ10 VDDQ11 VDDQ12 VDDQ13 VDDQ14 VDDQ15 VDDQ16 VDDQ17 VDDQ18

DDR3 - 1.5V RAILS

VTT0_59 VTT0_60 VTT0_61 VTT0_62

VTT1_63 VTT1_64 VTT1_65

1.1V1.8V

VTT1_66 VTT1_67 VTT1_68

VCCPLL1 VCCPLL2 VCCPLL3

POWER

3A

0.6A

AR22 AT22

AM22 AP22 AN22 AP23 AM23 AP24 AN24

AR25 AT25 AM24

AJ1 AF1 AE7 AE4 AC1 AB7 AB4 Y1 W7 W4 U1 T7 T4 P1 N7 N4 L1 H1

P10 N10 L10 K10

J22 J20 J18 H21 H20 H19

L26 L27 M26

GFXVR_E N GFXVR_D PRSLPVR

C1392

1U_0402 _6.3V4Z

+1.05VS_ VTT_CPU

C140 3

+1.8VS_V CCSFR

C1406

1U_0402 _6.3V4Z

VCC_AXG _SENSE (46) VSS_AXG _SENSE (46)

GFXVR_V ID_0 (46) GFXVR_V ID_1 (46) GFXVR_V ID_2 (46) GFXVR_V ID_3 (46) GFXVR_V ID_4 (46) GFXVR_V ID_5 (46) GFXVR_V ID_6 (46)

R1484 1K_0402 _5%@R1484 1K_0402 _5%@

1 2

1U_0402 _6.3V4Z

1

C1393

2

+1.05VS_ VTT_CPU

1

2

1

C1403

22U_080 5_6.3V6M

2

1

C1407

2

1U_0402 _6.3V4Z

GFXVR_D PRSLPVR (46)

1U_0402 _6.3V4Z

1

C1395

C1394

2

1U_0402 _6.3V4Z

C1402

10U_080 5_6.3V6M

2.2U_060 3_6.3V4Z

1

C1408

2

4.7U_080 5_10V4Z

1

C1396

2

1U_0402 _6.3V4Z

40mil

1

C1409

2

GFXVR_E N (4 6)

GFXVR_IMO N (46)

22U_080 5_6.3V6M

1

C1398

C1397

2

22U_080 5_6.3V6M

1 2

1

C1410

2

22U_080 5_6.3V6M

GFXVR_E N

1

2

R1485

R1485 0_0805_ 5%

0_0805_ 5%

1 2

R1483 470_040 2_5% R14 83 470_ 0402_5%

Reserved for +1.5V to +1.5V_1

+1.5VS

1

+

C1399

C1399 330U_D2 _2V_Y

330U_D2 _2V_Y

2

+1.8VS

A A

Security Class ification

2009/11/ 23 2010/11/ 23

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/11/ 23 2010/11/ 23

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

PROCESSOR (5/6) PWR

Size Document Num ber Rev

Custom

PAU30 M/B LA-6392P Schematic

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

8 51Monday, November 22, 2 010

1

1.0

5

JCPU1H

AT20

VSS1

AT17

VSS2

AR31

VSS3

AR28

VSS4

AR26

VSS5

AR24

VSS6

D D

C C

B B

AR23 AR20 AR17 AR15 AR12

AR9 AR6

AR3 AP20 AP17 AP13 AP10

AP7

AP4

AP2 AN34 AN31 AN23 AN20 AN17 AM29 AM27 AM25 AM20 AM17 AM14 AM11

AM8

AM5

AM2

AL34 AL31 AL23 AL20 AL17 AL12

AL9 AL6

AL3 AK29 AK27 AK25 AK20 AK17

AJ31 AJ23 AJ20 AJ17 AJ14 AJ11

AJ8

AJ5

AJ2 AH35 AH34 AH33 AH32 AH31 AH30 AH29 AH28 AH27 AH26 AH20 AH17 AH13

AH9 AH6 AH3

AG10

AF8 AF4 AF2

AE35

VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65 VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80

4

VSS

VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98

VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 VSS130 VSS131 VSS132 VSS133 VSS134 VSS135 VSS136 VSS137 VSS138 VSS139 VSS140 VSS141 VSS142 VSS143 VSS144 VSS145 VSS146 VSS147 VSS148 VSS149 VSS150 VSS151 VSS152 VSS153 VSS154 VSS155 VSS156 VSS157 VSS158 VSS159 VSS160

AE34 AE33 AE32 AE31 AE30 AE29 AE28 AE27 AE26 AE6 AD10 AC8 AC4 AC2 AB35 AB34 AB33 AB32 AB31 AB30 AB29 AB28 AB27 AB26 AB6 AA10 Y8 Y4 Y2 W35 W34 W33 W32 W31 W30 W29 W28 W27 W26 W6 V10 U8 U4 U2 T35 T34 T33 T32 T31 T30 T29 T28 T27 T26 T6 R10 P8 P4 P2 N35 N34 N33 N32 N31 N30 N29 N28 N27 N26 N6 M10 L35 L32 L29 L8 L5 L2 K34 K33 K30

3

JCPU1I

K27

VSS161

K9

VSS162

K6

VSS163

K3

VSS164

J32

VSS165

J30

VSS166

J21

VSS167

J19

VSS168

H35

VSS169

H32

VSS170

H28

VSS171

H26

VSS172

H24

VSS173

H22

VSS174

H18

VSS175

H15

VSS176

H13

VSS177

H11

VSS178

H8

VSS179

H5

VSS180

H2

VSS181

G34

VSS182

G31

VSS183

G20

VSS184

G9

VSS185

G6

VSS186

G3

VSS187

F30

VSS188

F27

VSS189

F25

VSS190

F22

VSS191

F19

VSS192

F16

VSS193

E35

VSS194

E32

VSS195

E29

VSS196

E24

VSS197

E21

VSS198

E18

VSS199

E13

VSS200

E11

VSS201

E8

VSS202

E5

VSS203

E2

VSS204

D33

VSS205

D30

VSS206

D26

VSS207

D9

VSS208

D6

VSS209

D3

VSS210

C34

VSS211

C32

VSS212

C29

VSS213

C28

VSS214

C24

VSS215

C22

VSS216

C20

VSS217

C19

VSS218

C16

VSS219

B31

VSS220

B25

VSS221

B21

VSS222

B18

VSS223

B17

VSS224

B13

VSS225

B11

VSS226

B8

VSS227

B6

VSS228

B4

VSS229

A29

VSS230

A27

VSS231

A23

VSS232

A9

VSS233

2

VSS

NCTF

VSS_NCTF1 VSS_NCTF2 VSS_NCTF3 VSS_NCTF4 VSS_NCTF5 VSS_NCTF6 VSS_NCTF7

AT35 AT1 AR34 B34 B2 B1 A35

H_NCTF1 H_NCTF2

H_NCTF6 H_NCTF7

1

@

PAD

T51

@

PAD

T52

@

PAD

T53

@

PAD

T54

IC,AUB_CFD _rPGA,R1P0

CONN@

A A

Security Class ification

2009/11/ 23 2010/11/ 23

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/11/ 23 2010/11/ 23

3

Compal Secret Data

IC,AUB_CFD _rPGA,R1P0

CONN@

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Num ber Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

PROCESSOR (6/6) VSS

PAU30 M/B LA-6392P Schematic

9 51Tuesday, September 07, 2 010

1

1.0

5

DIMMA VREFDQ M1 Circuit

+1.5V

12

R1493

1K_0402_1%

D D

C C

B B

10U_0805_6.3V6M

12

DIMMA & DIMMB VREFCA circuit

+1.5V

12

R1495

1K_0402_1%

12

Layout Note: Place near JDIMM1

+1.5V

10U_0805_6.3V6M

1

C1438

C1439

2

Layout Note: Place near JDIMM1.203 & JDIMM1.204

+0.75VS

1U_0402_6.3V4Z

1

C1451

C1452

2

1U_0402_6.3V4Z

+DIMM_VREFDQA

20mil

R1494

1K_0402_1%

+DIMM_VREFCA

20mil

R1496

1K_0402_1%

Layout Note: Place these 4 Caps near Command and Control signals of DIMMA

10U_0805_6.3V6M

1

C1441

C1440

2

10U_0805_6.3V6M

1

C1453

2

1U_0402_6.3V4Z

2

1U_0402_6.3V4Z

1

C1454

2

10U_0805_6.3V6M

1

2

C1442

1

2

10U_0805_6.3V6M

1

C1443

2

C1455

10U_0805_6.3V6M

DDR_A_DQS#[0..7](6)

DDR_A_D[0..63](6)

DDR_A_DM[0..7](6)

DDR_A_DQS[0..7](6)

DDR_A_MA[0..15](6)

#425302 CP_S3PowerReduction WhitePaper_Rev1.0

SM_DRAMRST#(5)

RST_GATE(18)

1

2

0.1U_0402_16V4Z

C1444

1

C1445

2

0.1U_0402_16V4Z

RST_GATE

1

C1446

2

R1497

R1497 0_0402_5%

0_0402_5%

@

1 2

S

G

2

0.1U_0402_16V4Z

1

C1447

2

+1.5V

12

D

13

Q107

Q107 BSS138LT1G_SOT23-3

BSS138LT1G_SOT23-3

C1435

1 2

0.047U_0402_16V7K

1

+

C1448

C1448 330U_D2_2V_Y

330U_D2_2V_Y

2

4

R1498

1K_0402_1%

DIMM_DRAMRST#

+DIMM_VREFDQA

DIMM_DRAMRST# (11)

C1434

0.1U_0402_16V4Z

3

+1.5V +1.5V

JDIMM1

VREF_DQ1VSS1

3

DDR_A_D0

1

C1433

C1434

2.2U_0603_6.3V4Z

C1433

2.2U_0603_6.3V4Z

2

DDR_A_CKE0(6)

DDR_A_BS2(6)

DDR_A_CLK0(6) DDR_A_CLK0#(6)

DDR_A_BS0(6)

DDR_A_WE#(6)

DDR_A_CAS#(6) DDR_A_ODT0 (6)

DDR_A_CS1#(6)

+3VS

C1449

1

2

DDR_A_D1

DDR_A_DM0

DDR_A_D2 DDR_A_D3

DDR_A_D8 DDR_A_D9

DDR_A_DQS#1 DDR_A_DQS1

DDR_A_D10 DDR_A_D11

DDR_A_D16 DDR_A_D17

DDR_A_DQS#2 DDR_A_DQS2

DDR_A_D18 DDR_A_D19

DDR_A_D24 DDR_A_D25

DDR_A_DM3

DDR_A_D26 DDR_A_D27

DDR_A_CKE0

DDR_A_BS2

DDR_A_MA12 DDR_A_MA9

DDR_A_MA8 DDR_A_MA5

DDR_A_MA3 DDR_A_MA1

DDR_A_CLK0 DDR_A_CLK0#

DDR_A_MA10 DDR_A_BS0

DDR_A_WE# DDR_A_CAS# DDR_A_ODT0

DDR_A_MA13 DDR_A_CS1#

DDR_A_D32 DDR_A_D33

DDR_A_DQS#4 DDR_A_DQS4

DDR_A_D34 DDR_A_D35

DDR_A_D40 DDR_A_D41

DDR_A_DM5

DDR_A_D42 DDR_A_D43

DDR_A_D48 DDR_A_D49

DDR_A_DQS#6 DDR_A_DQS6

DDR_A_D50 DDR_A_D51

DDR_A_D56 DDR_A_D57

DDR_A_DM7

DDR_A_D58 DDR_A_D59

R1499 10K_0402_5% R1499 10K_0402_5%

1 2

1

C1450

0.1U_0402_16V4Z

2

12

R1500

10K_0402_5%

VSS2

5

DQ0

7

DQ1 VSS49DQS#0

11

DM0

13

VSS5

15

DQ2

17

DQ3

19

VSS7

21

DQ8

23

DQ9 VSS925VSS10

27

DQS#1 DQS129RESET# VSS1131VSS12

33

DQ10

35

DQ11 VSS1337VSS14

39

DQ16

41

DQ17 VSS1543VSS16

45

DQS#2 DQS247VSS17

49

VSS18

51

DQ18 DQ1953VSS19

55

VSS20

57

DQ24 DQ2559VSS21 VSS2261DQS#3

63

DM3 VSS2365VSS24

67

DQ26

69

DQ27 VSS2571VSS26

73

CKE0

75

VDD1

77

NC1

79

BA2

81

VDD3 A12/BC#83A11

85

A9

87

VDD5

89

A8

91

A5

93

VDD7

95

A3

97

A1 VDD999VDD10

101

CK0

103

CK0#

105

VDD11

107

A10/AP

109

BA0

111

VDD13

113

WE#

115

CAS#

117

VDD15

119

A13

121

S1#

123

VDD17

125

NCTEST

127

VSS27

129

DQ32

131

DQ33

133

VSS29

135

DQS#4

137

DQS4

139

VSS32

141

DQ34

143

DQ35

145

VSS34

147

DQ40

149

DQ41

151

VSS36

153

DM5

155

VSS37

157

DQ42

159

DQ43

161

VSS39

163

DQ48

165

DQ49

167

VSS41

169

DQS#6

171

DQS6

173

VSS44

175

DQ50

177

DQ51

179

VSS46

181

DQ56

183

DQ57

185

VSS48

187

DM7

189

VSS49

191

DQ58

193

DQ59

195

VSS51

197

SA0

199

VDDSPD

201

SA1

203

VTT1

205

G1

FOX_AS0A626-U4RN-7F

CONN@

VSS3

DQS0

VSS6

VSS8 DQ12 DQ13

DQ14 DQ15

DQ20 DQ21

DQ22 DQ23

DQ28 DQ29

DQS3

DQ30 DQ31

CKE1

VDD2

VDD4

VDD6

VDD8

CK1#

VDD12

RAS#

VDD14

ODT0

VDD16

ODT1

VDD18

VREF_CA

VSS28

DQ36 DQ37

VSS30

VSS31

DQ38 DQ39

VSS33

DQ44 DQ45

VSS35

DQS#5

DQS5

VSS38

DQ46 DQ47

VSS40

DQ52 DQ53

VSS42

VSS43

DQ54 DQ55

VSS45

DQ60 DQ61

VSS47

DQS#7

DQS7

VSS50

DQ62 DQ63

VSS52

EVENT#

VTT2

2

DDR_A_D4

4

DQ4 DQ5

DQ6 DQ7

DM1

DM2

A15 A14

CK1

BA1

S0#

NC2

DM4

DM6

SDA SCL

G2

DDR_A_D5

6 8

DDR_A_DQS#0

10

DDR_A_DQS0

12 14

DDR_A_D6

16

DDR_A_D7

18 20

DDR_A_D12

22

DDR_A_D13

24 26

DDR_A_DM1

28

DIMM_DRAMRST#

30 32

DDR_A_D14

34

DDR_A_D15

36 38

DDR_A_D20

40

DDR_A_D21

42 44

DDR_A_DM2

46 48

DDR_A_D22

50

DDR_A_D23

52 54

DDR_A_D28

56

DDR_A_D29

58 60

DDR_A_DQS#3

62

DDR_A_DQS3

64 66

DDR_A_D30

68

DDR_A_D31

70 72

DDR_A_CKE1

74 76

DDR_A_MA15

78

DDR_A_MA14

80 82

DDR_A_MA11

84

DDR_A_MA7

86

A7

88

DDR_A_MA6

90

A6 A4

A2 A0

92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204

206

DDR_A_MA4

DDR_A_MA2 DDR_A_MA0

DDR_A_CLK1 DDR_A_CLK1#

DDR_A_BS1 DDR_A_RAS#

DDR_A_CS0#

DDR_A_ODT1

20mil

DDR_VREF_CA_DIMMA

DDR_A_D36 DDR_A_D37

DDR_A_DM4

DDR_A_D38 DDR_A_D39

DDR_A_D44DDR_A_D44 DDR_A_D45

DDR_A_DQS#5 DDR_A_DQS5

DDR_A_D46 DDR_A_D47

DDR_A_D52 DDR_A_D53

DDR_A_DM6

DDR_A_D54 DDR_A_D55

DDR_A_D60 DDR_A_D61

DDR_A_DQS#7 DDR_A_DQS7

DDR_A_D62 DDR_A_D63

PM_EXTTS#0_1 D_CK_SDATA D_CK_SCLK

2

+0.75VS

DDR_A_CKE1 (6)

DDR_A_CLK1 (6) DDR_A_CLK1# (6)

DDR_A_BS1 (6) DDR_A_RAS# (6)

DDR_A_CS0# (6)

DDR_A_ODT1 (6)

1

C1436

2.2U_0603_6.3V4Z

PM_EXTTS#0_1 (5,11)

D_CK_SDATA (11,12,14,28,38) D_CK_SCLK (11,12,14,28,38)

2

DDR3 SO-DIMM A

H=8mm

+DIMM_VREFCA

1

C1437

0.1U_0402_16V4Z

2

1

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

5

4

3

2009/11/23 2010/11/23

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

C

Date: Sheet

Date: Sheet of

2

Compal Electronics, Inc.

DDRIII-SODIMM SLOT1

PAU30 M/B LA-6392P Schematic

10 51Monday, November 22, 2010

1

1.0

of

5

DDR_B_DQS#[0..7](6)

DDR_B_D[0..63](6)

DDR_B_DM[0..7](6)

DDR_B_DQS[0..7](6)

DDR_B_MA[0..15](6)

D D

DIMMB VREFDQ M1 Circuit

+1.5V

12

R1487

1K_0402_1%

12

C C

B B

A A

R1489

1K_0402_1%

10U_0805_6.3V6M

+DIMM_VREFDQB

20mil

Layout Note: Place near JDIMM2

+1.5V

10U_0805_6.3V6M

1

2

1

C1427

2

1U_0402_6.3V4Z

1

C1415

2

1U_0402_6.3V4Z

1

C1428

2

C1416

10U_0805_6.3V6M

1

C1429

2

1U_0402_6.3V4Z

1

C1414

C1413

2

10U_0805_6.3V6M

Layout Note: Place near JDIMM2.203 & JDIMM2.204

+0.75VS

C1426

1U_0402_6.3V4Z

10U_0805_6.3V6M

1

C1417

2

1

2

1K_0402_1%

1

2

DIMMB VREFDQ CA Circuit

+1.5V

12

R1488

12

R1486

1K_0402_1%

Layout Note: Place these 4 Caps near Command and Control signals of DIMMB

0.1U_0402_16V4Z

1

C1418

2

10U_0805_6.3V6M

C1430

10U_0805_6.3V6M

1

C1419

2

+DIMM_VREFCB

20mil

1

C1420

2

0.1U_0402_16V4Z

4

0.1U_0402_16V4Z

1

C1421

2

1

C1422

2

0.1U_0402_16V4Z

1

+

C1423

C1423 330U_D2_2V_Y

330U_D2_2V_Y

@

2

+DIMM_VREFDQB

2.2U_0603_6.3V4Z

+3VS

C1431

2.2U_0603_6.3V4Z

C1411

C1431

3

1

C1412

2

0.1U_0402_16V4Z

DDR_B_CKE0(6)

DDR_B_BS2(6)

DDR_B_CLK0(6) DDR_B_CLK0#(6)

DDR_B_BS0(6)

DDR_B_WE#(6)

DDR_B_CAS#(6)

DDR_B_CS1#(6)

1

C1432

0.1U_0402_16V4Z

2

DDR_B_D0

1

DDR_B_D1

DDR_B_DM0

2

DDR_B_D2 DDR_B_D3

DDR_B_D8 DDR_B_D9

DDR_B_DQS#1 DDR_B_DQS1

DDR_B_D10 DDR_B_D11

DDR_B_D16 DDR_B_D17

DDR_B_DQS#2 DDR_B_DQS2

DDR_B_D19

DDR_B_D24 DDR_B_D25

DDR_B_DM3

DDR_B_D26 DDR_B_D27

DDR_B_CKE0

DDR_B_BS2

DDR_B_MA12 DDR_B_MA9

DDR_B_MA8 DDR_B_MA5

DDR_B_MA3 DDR_B_MA1

DDR_B_CLK0 DDR_B_CLK0#

DDR_B_MA10 DDR_B_BS0

DDR_B_WE# DDR_B_CAS#

DDR_B_MA13 DDR_B_CS1#

DDR_B_D32 DDR_B_D33

DDR_B_DQS#4 DDR_B_DQS4

DDR_B_D34 DDR_B_D35

DDR_B_D40 DDR_B_D41

DDR_B_DM5

DDR_B_D42 DDR_B_D43

DDR_B_D48 DDR_B_D49

DDR_B_DQS#6 DDR_B_DQS6

DDR_B_D50 DDR_B_D51

DDR_B_D56 DDR_B_D57

DDR_B_DM7

DDR_B_D58 DDR_B_D59

R1490 10K_0402_5% R1490 10K_0402_5%

1 2

R1491 10K_0402_5%

+1.5V

JDIMM2

VREF_DQ1VSS1

3

VSS2

5

DQ0

7

DQ1 VSS49DQS#0

11

DM0

13

VSS5

15

DQ2

17

DQ3

19

VSS7

21

DQ8

23

DQ9 VSS925VSS10 DQS#127DM1 DQS129RESET# VSS1131VSS12 DQ1033DQ14 DQ1135DQ15 VSS1337VSS14 DQ1639DQ20 DQ1741DQ21 VSS1543VSS16 DQS#245DM2 DQS247VSS17 VSS1849DQ22 DQ1851DQ23 DQ1953VSS19 VSS2055DQ28 DQ2457DQ29 DQ2559VSS21 VSS2261DQS#3

63

DM3 VSS2365VSS24 DQ2667DQ30 DQ2769DQ31 VSS2571VSS26

CKE073CKE1 VDD175VDD2

77

NC1

79

BA2 VDD381VDD4 A12/BC#83A11

85

A9 VDD587VDD6

89

A8

91

A5 VDD793VDD8

95

A3

97

A1 VDD999VDD10

101

CK0

103

CK0#

105

VDD11

107

A10/AP

109

BA0

111

VDD13

113

WE#

115

CAS#

117

VDD15

119

A13

121

S1#

123

VDD17

125

NCTEST

127

VSS27

129

DQ32

131

DQ33

133

VSS29

135

DQS#4

137

DQS4

139

VSS32

141

DQ34

143

DQ35

145

VSS34

147

DQ40

149

DQ41

151

VSS36

153

DM5

155

VSS37

157

DQ42

159

DQ43

161

VSS39

163

DQ48

165

DQ49

167

VSS41

169

DQS#6

171

DQS6

173

VSS44

175

DQ50

177

DQ51

179

VSS46

181

DQ56

183

DQ57

185

VSS48

187

DM7

189

VSS49

191

DQ58

193

DQ59

195

VSS51

197

SA0

199

VDDSPD

201

SA1

203

VTT1

205

G1

FOX_AS0A626-U4SN-7F

CONN@

VSS3

DQS0

VSS6

VSS8 DQ12 DQ13

DQS3

CK1#

VDD12

RAS#

VDD14

ODT0

VDD16

ODT1

VDD18

VREF_CA

VSS28

DQ36 DQ37

VSS30

VSS31

DQ38 DQ39

VSS33

DQ44 DQ45

VSS35

DQS#5

DQS5

VSS38

DQ46 DQ47

VSS40

DQ52 DQ53

VSS42

VSS43

DQ54 DQ55

VSS45

DQ60 DQ61

VSS47

DQS#7

DQS7

VSS50

DQ62 DQ63

VSS52

EVENT#

VTT2

2

+1.5V

2

DDR_B_D4

4

DQ4 DQ5

DQ6 DQ7

A15 A14

CK1

BA1

S0#

NC2

DM4

DM6

SDA

SCL

G2

DDR_B_D5

6 8

DDR_B_DQS#0

10

DDR_B_DQS0

12 14

DDR_B_D6

16

DDR_B_D7

18 20

DDR_B_D12

22

DDR_B_D13

24 26

DDR_B_DM1

28

DIMM_DRAMRST#

30 32

DDR_B_D14

34

DDR_B_D15

36 38

DDR_B_D20

40

DDR_B_D21

42 44

DDR_B_DM2

46 48

DDR_B_D22

50

DDR_B_D23DDR_B_D18

52 54

DDR_B_D28

56

DDR_B_D29

58 60

DDR_B_DQS#3

62

DDR_B_DQS3

64 66

DDR_B_D30

68

DDR_B_D31

70 72

DDR_B_CKE1

74 76

DDR_B_MA15

78

DDR_B_MA14

80 82

DDR_B_MA11

84

DDR_B_MA7

86

A7

88

DDR_B_MA6

90

A6 A4

A2 A0

92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204

206

DDR_B_MA4

DDR_B_MA2 DDR_B_MA0

DDR_B_CLK1 DDR_B_CLK1#

DDR_B_BS1 DDR_B_RAS#

DDR_B_CS0# DDR_B_ODT0

DDR_B_ODT1

20mil

DDR_VREF_CA_DIMMB

DDR_B_D36 DDR_B_D37

DDR_B_DM4

DDR_B_D38 DDR_B_D39

DDR_B_D44 DDR_B_D45

DDR_B_DQS#5 DDR_B_DQS5

DDR_B_D46 DDR_B_D47

DDR_B_D52 DDR_B_D53

DDR_B_DM6

DDR_B_D54 DDR_B_D55

DDR_B_D60 DDR_B_D61

DDR_B_DQS#7 DDR_B_DQS7

DDR_B_D62 DDR_B_D63

PM_EXTTS#0_1 D_CK_SDATA D_CK_SCLK

+0.75VS

DIMM_DRAMRST# (10)

DDR_B_CKE1 (6)

DDR_B_CLK1 (6) DDR_B_CLK1# (6)

DDR_B_BS1 (6) DDR_B_RAS# (6)

DDR_B_CS0# (6) DDR_B_ODT0 (6)

DDR_B_ODT1 (6)

2.2U_0603_6.3V4Z

PM_EXTTS#0_1 (5,10)

D_CK_SDATA (10,12,14,28,38) D_CK_SCLK (10,12,14,28,38)

C1424

+DIMM_VREFCB

1

C1425

2

DDR3 SO-DIMM B

1

C1425

0.1U_0402_16V4Z

2

1

H=4mm

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

5

4

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

3

2009/11/23 2010/11/23

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

C

Date: Sheet

Date: Sheet of

Compal Electronics, Inc.

DDRIII-SODIMM SLOT2

PAU30 M/B LA-6392P Schematic

1

11 51Monday, November 22, 2010

of

1.0

A

B

C

D

E

F

G

H

C684

10U_080 5_10V4Z

+CLK_1.5 VS

C671

10U_080 5_10V4Z

+CLK_3V S

1

2

1

2

+CLK_1.0 5VS

+1.05VS_ VTT

1 1

1 2

R1155 0_ 0603_5%

1

C668

C668 10U_080 5_10V4Z

10U_080 5_10V4Z

2

1

C676

10U_080 5_10V4Z

2

L44 Change 0 Ω 0603 2/1

40mil

1

C675

2

0.1U_040 2_16V4Z

1

C679

0.1U_040 2_16V4Z

2

1

C1333

C1333 22P_040 2_50V8J

22P_040 2_50V8J

2

@

4/9 RF add, need report

+3VS

1

C669

10U_080 5_10V4Z

2

+1.5VS

R1156 0_ 0603_5%

R1157 0_ 0603_5%

R1158 0_ 0603_5%

1

C670

C670 10U_080 5_10V4Z

10U_080 5_10V4Z

2

1 2

@

1 2

40mil

0.1U_040 2_16V4Z

1

C680

2

0.1U_040 2_16V4Z

40mil

1

C682

2

0.1U_040 2_16V4Z

1

2

0.1U_040 2_16V4Z

1

2

C689

C678

1

2

@

1

C683

0.1U_040 2_16V4Z

2

4/9 RF add, need report

C1334

C1334 22P_040 2_50V8J

22P_040 2_50V8J

1

C1335

C1335 22P_040 2_50V8J

22P_040 2_50V8J

2

@

4/9 RF add, need report

L45.L46.L48 Change 0 Ω 0603 2/1

2 2

CLK_BUF _DREF_96M

CLK_BUF _DREF_96M#(14)

CLK_BUF _DREF_96M#

Del R710.C708.C704.C705 3/4

Del R707.C713 3/3

CLK_BUF _PCIE_SATA(14) CLK_BUF _PCIE_SATA#(14)

CLK_BUF _CPU_DMI(14) CLK_BUF _CPU_DMI#(14)

3 3

+3VS

IDT 9LVS3199AKLFT NC

Silego Have Internal Pull-Up

R293 10K_ 0402_5% R293 10K_0 402_5%

1 2

IDT Have Internal Pull-Down

FOR Realtek

R712 10K_ 0402_5% R712 10K_0 402_5%

1 2

CLK_BUF _PCIE_SATA CLK_BUF _PCIE_SATA#

CLK_BUF _CPU_DMI CLK_BUF _CPU_DMI#

REF_0/CP U_SEL

+CLK_1.0 5VS

H_STP_C PU#

CPU_1PIN 30 CPU_0

(Default)

4 4

A

0 133MHz

1

100MHz 100MHz

B

133MHz

+CLK_3V S

+CLK_1.5 VS

H_STP_C PU#

Clock Generator

U43

1

VDD_DOT

2

VSS_DOT

3

DOT_96

4

DOT_96#

5

VDD_27

6

27MHZ

7

27MHZ_SS

8

USB_48

9

VSS_27M

10

SATA

11

SATA#

12

VSS_SRC

13

SRC_1

14

SRC_1#

15

VDD_SRC_IO

16

CPU_STOP#

33

TGND

SLG8SP5 87VTR_QFN32_ 5X5

IDT SA00003HR00

REF_0/CPU_SEL

VDD_REF

XTAL_IN

XTAL_OUT

VSS_REF

CKPWRGD/PD#

VDD_CPU

CPU_0

CPU_0#

VSS_CPU

CPU_1

CPU_1#

VDD_CPU_IO

VDD_SRC

SCL SDA

32 31 30 29 28 27 26 25

24 23 22 21 20 19 18 17

+CLK_3V S

D_CK_SC LK D_CK_SD ATA REF_0/CP U_SEL

CLK_XTA L_IN CLK_XTA L_OUT

CK505_P WRGD

CLK_BUF _CPU_BCLK CLK_BUF _CPU_BCLK#

R713 33_0 402_5%R713 3 3_0402_5%

+CLK_1.0 5VS +CLK_1.5 VS

1 2

1

C952

22P_040 2_50V8J

2

CLK_BUF _CPU_BCLK (14) CLK_BUF _CPU_BCLK# (14)

D_CK_SC LK (10,1 1,14,28,38)

D_CK_SD ATA (10,11,1 4,28,38) CLK_BUF _ICH_14M (14)CLK_BUF _DREF_96M(14)

Add C952 1/12

C952 from un-stuff to stuff 7/26

Low Power:

IDT: 9LVS3199AKLFT, SA00003HR00

Realtek: RTM890N-631-GRT, SA00003HQ00

Silego: SLG8LV597VTR , SA00003MF00

Move Q50 and Q51 to PCH Side 1/12

Security Class ification

2009/11/ 23 2010/11/ 23

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

D

2009/11/ 23 2010/11/ 23

Compal Secret Data

Deciphered Date

E

+3VS

R695

R695 10K_040 2_5%

10K_040 2_5%

1 2

CK505_P WRGD

13

D

2

G

Q47

S

2N7002K W_1N_SOT3 23-3

hange Crystal CL from 16p to 20p 7/29 (sourcer suggestion)

c

14.318MH Z_20PF_7A143 00003

F

Del R694 3/9

CLK_XTA L_IN

CLK_XTA L_OUT

CLK_ENA BLE# (47)

C686

12

27P_040 2_50V8J

Y3

Title

Size Document Num ber Rev

Date: Sheet of

C685

27P_040 2_50V8J

12

Compal Electronics, Inc.

Clock Generator (CK505)

Custom

PAU30 M/B LA-6392P Schematic

G

0.1

12 51Monday, November 22, 20 10

H

5

+RTCVCC

close to RAM door

D D

+RTCVCC

close to RAM door

HDA_SYNC On Die PLL VR is supplied by

1.5V when sampled High,

1.8V when sampled Low.

+3VS

C C

If GPIO33 pull down, ME will not working. For factory update ME, pull down resistor pull under door.

ME_OVER RIDE(33)

GPIO33 has a weak internal pull-up NOTE: Asserting the GPIO33 low on th e rising edge of PWROK will also halt Intel Mana gement Engine after chipset b ringup and disable runtime Intel Management Engine f eatures. This is a debug mode and must not be

B B

asserted after manfa cturing/ debug.

A A

1 2

R558

R558 20K_040 2_1%

20K_040 2_1%

1 2

R696 10K_060 3_5%

10K_060 3_5%

C588

1U_0603 _10V6K

1 2

R551

R551 20K_040 2_1%

20K_040 2_1%

1 2

R700 10K_060 3_5%

10K_060 3_5%

C584

1U_0603 _10V6K

1 2

R623

R623 1K_0402 _5%

1K_0402 _5%

@

1 2

R225

R225 10K_040 2_5%

10K_040 2_5%

+3VALW

Have internal PD

100K_04 02_5%

Del R621.R619.R620.R618 3/16 Change R596 From 100Ω to 10KΩ 3/16

Follow SAN RAFAEL

+3VS

PCH_RTC RST#

RC Delay 18~25mS

@R696

@

PCH_SRT CRST#

RC Delay 18~25mS

@R700

@

HDA for AUDIO

(HDA_SYNC Have internal Pull-Down)

(SPKR Have internal Pull-Down)

PCH_SPK R

SERIRQ

PCH_GPIO3 3#

13

D

Q28

2

G

2N7002K W_1N_SOT3 23-3

R552

1 2

12

C130322P_040 2_50V8J C130322P_0402 _50V8J

R59851_0402 _5% R59851_0 402_5%

12

R6111K_0402 _5% @ R6111K_0402_5% @

2N7002K W_1N_SOT3 23-3

S

R21520 0_0402_5% @ R215200_ 0402_5% @

12

PCH_JTA G_TMS

R59710 0_0402_5% @ R597100_ 0402_5% @

12

R21720 0_0402_5% @ R217200_ 0402_5% @

12

PCH_JTA G_TDO

R59510 0_0402_5% @ R595100_ 0402_5% @

12

R216200_0402_5% @ R216200_0402 _5% @

12

R59610K_040 2_5% @ R59610K_04 02_5% @

R21820K_040 2_5% @ R21820K_040 2_5% @

12

PCH_JTA G_RST#

R59410K_040 2_5% @ R59410K_040 2_5% @

12

HDA_BITCL K_AUDIO

PCH_JTA G_TCK

Add C1303 3/9 Change R598 From 4.7KΩ to 51Ω 3/16

PCH_SPI_M OSI

32.768KH Z_12.5PF_Q13M C14610002

modify to 330K

INTVRMEN - Integrated SUS 1.05V VRM Enable High - Enable Internal VRs

HDA_BITCL K_AUDIO(36)

HDA_SYNC_ AUDIO(36)

C1480 12 P_0402_50V8JC148 0 12P_0402_50 V8J

1 2

HDA_RST _AUDIO#(36)

reserve C1480 9/10

hange C1480 BOM structure form @ to POP 9/14

c

HDA_SDO UT_AUDIO(36)

2009/08/23 Debug Port DG1.7 P27.28

TDO,TDI,TMS Pull Up for Production Units unpop TDO,TDI,TMS resister

2

010/5/24 R596=>@

PCH_JTA G_TDI

enable iTPM: SPI_MOSI High

MOSI This signal has a weak internal pul l-down resistor. This signal must be sampled low.

5

4

C590

18P_040 2_50V8J

12

X1

3

OSC

NC

2

OSC

NC

C594

12

18P_040 2_50V8J

+RTCVCC

R554 1M_0 402_5% R554 1 M_0402_5%

1 2

R559 330K _0402_1% R559 3 30K_0402_1%

1 2

R158 33_040 2_5%

1 2

R160 33_040 2_5%

PCH_SPK R(36)

1 2

R159 33_040 2_5%

HDA_SDIN0(36)

HDA_SDO ,This signal has a weak internal pul l-down resistor. Should not be Pull High

1 2

R162 33_040 2_5%

PIO33 can not pull down

G (manufacturing environments)

PCH_SPI_C LK_1

PCH_SPI_C S0#_1

PCH_SPI_M ISO_1 PCH_SPI_M ISO

R612 22_0 402_5%R612 2 2_0402_5%

1 2

R609 22_0 402_5%R609 2 2_0402_5%

1 2

PAD

T33

R610 22_0 402_5%R610 2 2_0402_5%

1 2

R608 22_0 402_5%R608 2 2_0402_5%

1 2

4

1

PCH_RTC X1

10M_040 2_5%

PCH_RTC X2

@

12

R569

PCH_RTC RST#

PCH_SRT CRST#

SM_INTRUD ER#

PCH_INTVR MEN

HDA_BITCL K_PCH

HDA_SYNC_ PCH

PCH_SPK R

HDA_RST _PCH#

HDA_SDO UT_PCH

PCH_GPIO3 3#

PCH_JTA G_TCK

PCH_JTA G_TMS

PCH_JTA G_TDI

PCH_JTA G_TDO

PCH_JTA G_RST#

PCH_SPI_C LK

PCH_SPI_C S1#

PCH_SPI_M OSIPCH_SPI_M OSI_1

3

Change Netname From LOCAL_DIM to LOCAL_DIM_R 3/18

U30A

REV1.0

B13 D13

C14

D17

A16

A14

A30

D29

C30

G30

F30

E32

F32

B29

H32

BA2

AV3

AY3

AY1

AV1

P1

J30

M3

K3

K1

J2

J4

REV1.0

RTCX1 RTCX2

RTCRST#

SRTCRST#

INTRUDER#

INTVRMEN

HDA_BCLK

HDA_SYNC

SPKR

HDA_RST#

HDA_SDIN0

HDA_SDIN1

HDA_SDIN2

HDA_SDIN3

HDA_SDO

HDA_DOCK_EN# / GPIO33

HDA_DOCK_RST# / GPIO13

JTAG_TCK

JTAG_TMS

JTAG_TDI

JTAG_TDO

TRST#

SPI_CLK

SPI_CS0#

SPI_CS1#

SPI_MOSI

SPI_MISO

IBEXPEAK-M _FCBGA107

Change U37 BOM from SA000021A00(MXIC 4M) to SA000041P00(MXIC 4M)

PCH_SPI_C S0#_1

R634 3.3K_ 0402_5% R 634 3.3K_0402_5 %

+3VS

1 2

R643 3.3K_ 0402_5% R 643 3.3K_0402_5 %

1 2

change C1303 BOM structure form @ to POP 9/14

SPI_WP 1# SPI_HOLD1 #

SPI ROM Footprint 200mil

R608.R609.R610.R612 Change From 0Ω to 22Ω 1/12

Change Netname From PCH_SPI_CS0#_R to PCH_SPI_CS0# 1/13

Change R609.1 Netname From PCH_SPI_CS0# to PCH_SPI_CS0#_1 1/28

Security Class ification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/11/ 23 2010/11/ 23

3

LOCAL_D IM_R

FWH0 / LAD0 FWH1 / LAD1 FWH2 / LAD2 FWH3 / LAD3

FWH4 / LFRAME#

LDRQ1# / GPIO23

RTCIHDA

LPC

SATA

SATAICOMPO

SATAICOMPI

SATA0GP / GPIO21

SATA1GP / GPIO19

SPI JTAG

U37

1

CS#

3

WP#

7

HOLD#

4

GND

MX25L32 05DM2I-12G SOP 8P

SA00004 1P00 <BOM S tructure>

VCC

SCLK

8 6 5

SI

2

SO

D33 B33 C32 A32

C34

A34

LDRQ0#

F34

AB9

SERIRQ

AK7

SATA0RXN

AK6

SATA0RXP

AK11

SATA0TXN

AK9

SATA0TXP

AH6

SATA1RXN

AH5

SATA1RXP

AH9

SATA1TXN

AH8

SATA1TXP

AF11

SATA2RXN

AF9

SATA2RXP

AF7

SATA2TXN

AF6

SATA2TXP

AH3

SATA3RXN

AH1

SATA3RXP

AF3

SATA3TXN

AF1

SATA3TXP

AD9

SATA4RXN

AD8

SATA4RXP

AD6

SATA4TXN

AD5

SATA4TXP

AD3

SATA5RXN

AD1

SATA5RXP

AB3

SATA5TXN

AB1

SATA5TXP

AF16

AF15

T3

SATALED#

Y9

V1

change R625 BOM structure form @ to pop 9/3

+3VS

PCH_SPI_C LK_1 PCH_SPI_M OSI_1 PCH_SPI_M ISO_1

Samsung 256MX8 : SA000041E00

Hynix 256MX8 : SA000042700

Compal Secret Data

Deciphered Date

2

+3VS

@

1 2

R150 20K_04 02_5%

1 2

R742

R742 10K_040 2_5%

10K_040 2_5%

LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3

LPC_FRA ME#

LOCAL_D IM_R

SERIRQ

SATA_DT X_C_PRX_N0 SATA_DT X_C_PRX_P0 SATA_PT X_DRX_N0 SATA_PT X_DRX_P0

LPC_AD0 (33) LPC_AD1 (33) LPC_AD2 (33) LPC_AD3 (33)

LPC_FRA ME# (33)

2/10 SATA2, SATA3 not support on HM55

4/1 add JBATT1

5/18 DEL D59, Add D35, D36

6/8 change diode to BAS40CW

SATA_CO MP

PCH_SAT ALED#PCH_SPI_C S0#

PROJECT _ID2

R168 37.4_ 0402_1% R168 37.4_0 402_1%

1 2

@

R600 10K_ 0402_5%

1 2

PCH_SAT ALED# (3 4)

GPIO21 RAM ID2 M/B version

PCH_SPI_C LK_1

H

L

2

10K_040 2_5%

@

C603 10P_0 402_50V8J

Samsung

Hynix

Title

Size Document Num ber Rev

Custom

Date: Sheet of

1

SERIRQ (33)

SATA_DT X_C_PRX_N0 (27)

SATA_DT X_C_PRX_P0 (2 7) SATA_PT X_DRX_N0 (27) SATA_PT X_DRX_P0 (27)

SATA for HDD1

+NEW RTCBAT_R

Del SATA for ODD 3/3

1K_0402 _5%

+

2

3

D65

D65 BAS40CW _SOT323-3

BAS40CW _SOT323-3

1

R625

1 2

JBATT1

2

SUYIN_060003 FA002G202NL

+NEW RTCBAT_R

+1.05VS_ VTT

+RTCVCC

+3VS

R207 10K_ 0402_5%R207 10K_040 2_5%

R602 10K_ 0402_5%

12

R187

@

10K_040 2_5%

change R602 BOM structure form pop to @ 9/3

-

1 2

@

ID3ID2ID1ID0

256MX8

128MX8

PCH (1/9) SATA,HDA,SPI, LPC

PAU30 M/B LA-6392P Schematic

2 channel

1 channel

Compal Electronics, Inc.

DVT

PVT

1

13 51Monday, November 22, 20 10

R1384

1

+3VS

1 2

+CHGRTC

0.1

5

PCIE_DTX_ C_PRX_N1(29)

For PCIE LAN

For Wireless LAN

D D

Add for USB30 3/1

For USB3.0

For 3G/GPS MiniCard

PCIE_DTX_ C_PRX_P1(29) PCIE_PTX_ C_DRX_N1(29) PCIE_PTX_ C_DRX_P1(29)

PCIE_DTX_ C_PRX_N2(28) PCIE_DTX_ C_PRX_P2(28) PCIE_PTX_ C_DRX_N2(28) PCIE_PTX_ C_DRX_P2(28)

PCIE_DTX_ C_PRX_N3(31) PCIE_DTX_ C_PRX_P3(31) PCIE_PTX_ C_DRX_N3(31) PCIE_PTX_ C_DRX_P3(31)

PCIE_DTX_ C_PRX_N4(28) PCIE_DTX_ C_PRX_P4(28) PCIE_PTX_ C_DRX_N4(28) PCIE_PTX_ C_DRX_P4(28)

C577 .1U_0 402_16V7K C577 .1U_0 402_16V7K C578 .1U_0 402_16V7K C578 .1U_0 402_16V7K

C284 .1U_040 2_16V7K C284 .1U_040 2_16V7K C275 .1U_040 2_16V7K C275 .1U_040 2_16V7K

C1244 .1U _0402_16V7K C1 244 .1U_0402_1 6V7K C1245 .1U _0402_16V7K C1 245 .1U_0402_1 6V7K

C273 .1U_040 2_16V7K C273 .1U_040 2_16V7K C272 .1U_040 2_16V7K C272 .1U_040 2_16V7K

12 12

2/10 PCIE7, PCIE8 not support on HM55

C C

For PCIE LAN

LAN_CLK REQ#(29 )

For Wireless LAN

MINI1_CLKREQ #(28)

LAN_CLKREQ# Pull High to 3V_LAN at Lan Chip Side

CLK_PCIE_ MINI1#(28)

CLK_PCIE_ MINI1(28)

Del R647,R646,Q39 1/7

Del PCH-GPIO18 off page 1/8

Change Netname From MINI1_CLKREQ# to PCH_GPIO18 1/12

Del PCH_GPIO20 off page 1/8

Add R1244 for USB30 3/1

1 2 1 2

5

USB30_C LKREQ#(31)

+3VALW

12

MINI2_CLKREQ #

+3VS

Del Q39.R647 3/12

Move R208 to MINI1 Side 3/18

B B

Move R638 to MINI2 Side 3/18

MINI2_CLKREQ #(28)

MINI1_CLKREQ # PCH_GPIO2 0

A A

R227 10K_ 0402_5% R227 10K_0 402_5% R622 10K_ 0402_5% R622 10K_0 402_5%

R633

R633 10K_040 2_5%

10K_040 2_5%

PCH_SMB CLK PCH_SMB DATA

PCH_GPIO6 0

PCH_SML 1CLK PCH_SML 1DAT

PCH_GPIO7 4

PCH_GPIO4 4 PCH_GPIO5 6

CLK_PCIE_ USB30#(31) CLK_PCIE_ USB30(31)

CLK_PCIE_ MINI2#(28)

CLK_PCIE_ MINI2(28)

4

PCIE_DTX_ C_PRX_N1 PCIE_DTX_ C_PRX_P1

PCIE_PTX_ DRX_N1 PCIE_PTX_ DRX_P1

PCIE_DTX_ C_PRX_N2 PCIE_DTX_ C_PRX_P2

PCIE_PTX_ DRX_N2 PCIE_PTX_ DRX_P2

PCIE_DTX_ C_PRX_N3 PCIE_DTX_ C_PRX_P3

PCIE_PTX_ DRX_N3 PCIE_PTX_ DRX_P3

PCIE_DTX_ C_PRX_N4 PCIE_DTX_ C_PRX_P4

PCIE_PTX_ DRX_N4 PCIE_PTX_ DRX_P4

CLK_PCIE_ LAN#(29) CLK_PCIE_ LAN(2 9)

R173 4 .7K_0402_5%R173 4 .7K_0402_5% R582 4.7K_0402 _5%R 582 4.7K_040 2_5%

R169 10K_ 0402_5% R169 10K_0 402_5%

R191 3.3K_ 0402_5%R191 3.3K_ 0402_5% R183 3.3K_ 0402_5%R183 3.3K_ 0402_5%

R214 10K_ 0402_5% R214 10K_0 402_5%

R190 10K_ 0402_5% R190 10K_0 402_5% R211 10K_ 0402_5% R211 10K_0 402_5%

LAN_CLK REQ#

MINI2_CLKREQ #

PCH_GPIO4 4

PCH_GPIO5 6

1 2 1 2

1 2

1 2 1 2

1 2

1 2 1 2

4

MINI1_CLKREQ #

PAD

T3

PAD

T4

PCH_GPIO2 0

PAD

T21

PAD

T18

PAD

T20

PAD

T22

U30B

BG30

PERN1

BJ30

PERP1

BF29

PETN1

BH29

PETP1

AW30

PERN2

BA30

PERP2

BC30

PETN2

BD30

PETP2

AU30

PERN3

AT30

PERP3

AU32

PETN3

AV32

PETP3

BA32

PERN4

BB32

PERP4

BD32

PETN4

BE32

PETP4

BF33

PERN5

BH33

PERP5

BG32

PETN5

BJ32

PETP5

BA34

PERN6

AW34

PERP6

BC34

PETN6

BD34

PETP6

AT34

PERN7

AU34

PERP7

AU36

PETN7

AV36

PETP7

BG34

PERN8

BJ34

PERP8

BG36

PETN8

BJ36

PETP8

AK48

CLKOUT_PCIE0N

AK47

CLKOUT_PCIE0P

P9

PCIECLKRQ0# / GPIO73

AM43

CLKOUT_PCIE1N

AM45

CLKOUT_PCIE1P

U4

PCIECLKRQ1# / GPIO18

@

AM47

CLKOUT_PCIE2N

@

AM48

CLKOUT_PCIE2P

N4

PCIECLKRQ2# / GPIO20

AH42

CLKOUT_PCIE3N

AH41

CLKOUT_PCIE3P

A8

PCIECLKRQ3# / GPIO25

AM51

CLKOUT_PCIE4N

AM53

CLKOUT_PCIE4P

M9

PCIECLKRQ4# / GPIO26

@

AJ50

CLKOUT_PCIE5N

@

AJ52

CLKOUT_PCIE5P

H6

PCIECLKRQ5# / GPIO44

@

AK53

CLKOUT_PEG_B_N

@

AK51

CLKOUT_PEG_B_P

P13

PEG_B_CLKRQ# / GPIO56

IBEXPEAK-M _FCBGA107

+3VALW

REV1.0

3

SMBALERT# / GPIO11

SML0ALERT# / GPIO60

SML1ALERT# / GPIO74

SMBus

PCI-E*

Link

Controller

PEG_A_CLKRQ# / GPIO47

PEG

CLKOUT_DP_N / CLKOUT_BCLK1_N CLKOUT_DP_P / CLKOUT_BCLK1_P

From CLK BUFFER

CLKIN_SATA_N / CKSSCD_N CLKIN_SATA_P / CKSSCD_P

CLKIN_PCILOOPBACK

CLKOUTFLEX0 / GPIO64

CLKOUTFLEX1 / GPIO65

CLKOUTFLEX2 / GPIO66

Clock Flex

CLKOUTFLEX3 / GPIO67

SMBCLK

SMBDATA

SML0CLK

SML0DATA

SML1CLK / GPIO58

SML1DATA / GPIO75

CL_CLK1

CL_DATA1

CL_RST1#

CLKOUT_PEG_A_N CLKOUT_PEG_A_P

CLKOUT_DMI_N CLKOUT_DMI_P

CLKIN_DMI_N CLKIN_DMI_P

CLKIN_BCLK_N

CLKIN_BCLK_P

CLKIN_DOT_96N

CLKIN_DOT_96P

REFCLK14IN

XTAL25_IN

XTAL25_OUT

XCLK_RCOMP

B9

H14

C8

J14

C6

G8

M14

E10

G12

T13

T11

T9

PEG_CLK REQ#_R

H1

AD43 AD45

AN4 AN2

@

AT1

@

AT3

AW24 BA24

AP3 AP1

F18 E18

AH13 AH12

P41

J42

AH51 AH53

AF38

T45

PROJECT _ID1

P43

PROJECT _ID0

T42

N50

EC_LID_OU T#

PCH_SMB CLK

PCH_SMB DATA

PCH_GPIO6 0

PCH_GPIO7 4

PCH_SML 1CLK

PCH_SML 1DAT

CLK_PEG _VGA# CLK_PEG _VGA

PAD

T28

PAD

T32

XTAL25_ IN XTAL25_ OUT

XCLK_RC OMP

T23

PAD

T24

PAD

EC_LID_OU T# (3 3)

R149 90.9_ 0402_1% R149 90.9_0402 _1%

@

Project Structure ID

@T24

@

2

PCH_SMB CLK

PCH_SMB DATA

+3VALW

12

R592

10K_040 2_5%

CLK_CPU _DMI# (5) CLK_CPU _DMI (5)

CLK_BUF _CPU_DMI# (1 2) CLK_BUF _CPU_DMI (12 )

CLK_BUF _CPU_BCLK# (12) CLK_BUF _CPU_BCLK (1 2)

CLK_BUF _DREF_96M# (12 ) CLK_BUF _DREF_96M (12)

CLK_BUF _PCIE_SATA# (12) CLK_BUF _PCIE_SATA (12)

CLK_PCI_F B (1 7)

1 2

R106 10K_ 0402_5%R106 10K_040 2_5%

1 2

R107 10K_ 0402_5%

R107

1 2

@

R109 10K_ 0402_5%R109 10K_040 2_5%

1 2

R108 10K_ 0402_5%

1 2

@

3/22 add test point

ID3ID2ID1RAM ID0

GPIO65GPIO66 GPIO21 GPIO19

Samsung

H

Hynix

L

Security Class ification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

256MX8

128MX8

2009/11/ 23 2010/11/ 23

3

2 channel

1 channel

Compal Secret Data

Reserved*

Reserved

Deciphered Date

2

1

+3VS

R715

2

G

1 3

D

S

D

S

Q51 2 N7002KW_ 1N_SOT323-3

Move Q50.Q51.R714.R715 From P12 to here 1/13

+3VS

2

G

1 3

D

S

D

S

Q50 2 N7002KW_ 1N_SOT323-3

R715

4.7K_040 2_5%

1 2

R714

4.7K_040 2_5%

1 2

+3VS

D_CK_SC LK (10,1 1,12,28,38)

+3VS

D_CK_SD ATA (10,11,1 2,28,38)

Del R593.Q41.R668.R667.R666 1/9

Add R843 1/11

R592 Change BOM Structure From VGA@ to POP 1/12

Add Netname PEG_CLKREQ#_R 1/11

Change Netname From PEG_CLKREQ#_R to VGA_PWROK# 1/13

Change Back From PEG_CLKREQ#_R to VGA_PWROK# 1/14

6/9 MOW23 Request add 25MHz crystal supporting Integrated Graphics

CLK_BUF _ICH_14M (12)

Del R148 C268 1/12

Y2 from 20 PF change to 12 PF 6/28

+1.05VS_ VTT

+3VS

10K_040 2_5%

RAM ID1

RAM ID0

PCH_SML 1CLK EC_SMB_CK 2

12

R521

1M_0402 _5%

C554,C555 from 27p change to 12p 6/28

1 2

R909 0 _0402_5%R90 9 0_0402_5%

Del R505 1/12

C554

C554 12P_040 2_50V8J

12P_040 2_50V8J

1 2

12

Y2

Y2 25MHZ_1 2PF_X5H02500 0FC1H-H

25MHZ_1 2PF_X5H02500 0FC1H-H

1 2

C555

C555 12P_040 2_50V8J

12P_040 2_50V8J

EC_SMB_ CK2 (33)

Change to 5x3.2

Change From MOS to 0 Ω 1/13

PCH_SML 1DAT EC_ SMB_DA2

Title

Size Document Num ber Rev

Custom

Date: Sheet

Date: Sheet of

1 2

R910 0 _0402_5%R91 0 0_0402_5%

Compal Electronics, Inc.

PCH (2/9) PCIE, SMBUS, CLK

PAU30 M/B LA-6392P Schematic

1

EC_SMB_ DA2 (33)

of

14 51Monday, November 22, 20 10

0.1

5

DMI_HTX_P RX_N[0..3](4)

DMI_HTX_P RX_P[0..3](4)

DMI_PTX_H RX_N[0..3](4)

DMI_PTX_H RX_P[0..3](4)

DMI_HTX_P RX_N[0..3]

DMI_HTX_P RX_P[0..3]

DMI_PTX_H RX_N[0..3]

DMI_PTX_H RX_P[0..3]

4

3

2

1

D D

+3VS

+3VALW

R599 10K_04 02_5%

R584 8.2K_04 02_5%

R178 10K_04 02_5%

C C

B B

Add R911 1/13 Add R1348 3/18

A A

R178 10K_04 02_5%

R188 10K_04 02_5%

R198 10K_04 02_5%

SYS_PW ROK

4/15 change pull down connect to PWROK_R

H_FDI_TXN [0..7](4)

H_FDI_TXP [0..7](4)

@

1 2

R604 8.2K_04 02_5%

R791 1K_040 2_5%R791 1K_0402_5%

1 2

@

1 2

PWRO K

PM_CLKR UN#

XDP_DBR ESET#

12

SUS_PW R_DN_ACK

PCH_GPIO7 2

EC_SW I#

PCH_PCIE_ WAKE#

PM_SLP_ LAN#

+3VALW

EC_ACIN(33)

1 2

R1348 22 _0402_5%

1 2

R911 22_04 02_5%

5

H_FDI_TXN [0..7]

H_FDI_TXP [0..7]

+1.05VS_ VTT

R163

49.9_040 2_1%

1 2

09/09/14 WW37 PCH WAKE# PU 10K

XDP_DBR ESET#(5)

3/22 add R1358

PM_DRAM _PWRGD(5)

SUS_PW R_DN_ACK(33)

@

1 2

R230 10K_04 02_5%

R908 0_04 02_5%R908 0_04 02_5%

PWRO K_R

4

Y

PWRO K_R

EC_PW ROK

LAN_RST #

No used Integrated LAN, connecting LAN_RST# to GND

PBTN_OU T#(33)

12

+3VS

5

U40

2

P

B

1

A

G

MC74VHC 1G08DFT2G_SC 70-5

3

1 2

R181 1 0K_0402_5%

1 2

R676 1 0K_0402_5%

1 2

R184 1 0K_0402_5%

EC_SW I#(33)

R1358

1 2

0_0402_ 5%

EC_PW ROK

VGATE

DMI_HTX_P RX_N0 DMI_HTX_P RX_N1 DMI_HTX_P RX_N2 DMI_HTX_P RX_N3

DMI_HTX_P RX_P0 DMI_HTX_P RX_P1 DMI_HTX_P RX_P2 DMI_HTX_P RX_P3

DMI_PTX_H RX_N0 DMI_PTX_H RX_N1 DMI_PTX_H RX_N2 DMI_PTX_H RX_N3

DMI_PTX_H RX_P0 DMI_PTX_H RX_P1 DMI_PTX_H RX_P2 DMI_PTX_H RX_P3

DMI_COMP

XDP_DBR ESET#

SYS_PW ROK

PWRO K

MEPW ROK

LAN_RST #

PCH_RSM RST#

SUS_PW R_DN_ACK

PBTN_OU T#

PCH_ACIN

PCH_GPIO7 2

EC_SW I#

EC_PW ROK (33)

VGATE (47)

4

U30C

BC24

DMI0RXN

BJ22

DMI1RXN

AW20

DMI2RXN

BJ20

DMI3RXN

BD24

DMI0RXP

BG22

DMI1RXP

BA20

DMI2RXP

BG20

DMI3RXP

BE22

DMI0TXN

BF21

DMI1TXN

BD20

DMI2TXN

BE18

DMI3TXN

BD22

DMI0TXP

BH21

DMI1TXP

BC20

DMI2TXP

BD18

DMI3TXP

BH25

DMI_ZCOMP

BF25

DMI_IRCOMP

T6

SYS_RESET#

M6

SYS_PWROK

B17

PWROK

K5

MEPWROK

A10

LAN_RST#

D9

DRAMPWROK

C16

RSMRST#

M1

SUS_PWR_DN_ACK / GPIO30

P5

PWRBTN#

P7

ACPRESENT / GPIO31

A6

BATLOW# / GPIO72

F14

RI#

IBEXPEAK-M _FCBGA107

REV1.0

FDI_FSYNC0

DMI

FDI

DMI

FDI

FDI_FSYNC1

FDI_LSYNC0

FDI_LSYNC1

CLKRUN# / GPIO32

SUS_STAT# / GPIO61

SUSCLK / GPIO62

SLP_S5# / GPIO63

System Power Management

SLP_LAN# / GPIO29

Security Class ification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

FDI_RXN0 FDI_RXN1 FDI_RXN2 FDI_RXN3 FDI_RXN4 FDI_RXN5 FDI_RXN6 FDI_RXN7

FDI_RXP0 FDI_RXP1 FDI_RXP2 FDI_RXP3 FDI_RXP4 FDI_RXP5 FDI_RXP6 FDI_RXP7

FDI_INT

WAKE#

SLP_S4#

SLP_S3#

SLP_M#

TP23

PMSYNCH

BA18 BH17 BD16 BJ16 BA16 BE14 BA14 BC12

BB18 BF17 BC16 BG16 AW16 BD14 BB14 BD12

BJ14

BF13

BH13

BJ12

BG14

PCH_PCIE_ WAKE#

J12

PM_CLKR UN#

Y1

PCH_GPIO6 1

P8

PCH_GPIO6 2

F3

E4

H7

P12

PM_SLP_ M#

K8

PM_SLP_ DSW#

N2

BJ10

PM_SLP_ LAN#

F6

2009/11/ 23 2010/11/ 23

3

H_FDI_TXN 0 H_FDI_TXN 1 H_FDI_TXN 2 H_FDI_TXN 3 H_FDI_TXN 4 H_FDI_TXN 5 H_FDI_TXN 6 H_FDI_TXN 7

H_FDI_TXP 0 H_FDI_TXP 1 H_FDI_TXP 2 H_FDI_TXP 3 H_FDI_TXP 4 H_FDI_TXP 5 H_FDI_TXP 6 H_FDI_TXP 7

PCH_PCIE_ WAKE# (28,29,31 )

@

PAD

T7

@

PAD

T31

PM_SLP_ S5# (33)

PM_SLP_ S4# (33)

PM_SLP_ S3# (33)

@

PAD

T8

@

PAD

T29

H_PM_SYNC (5)

Compal Secret Data

Deciphered Date

H_FDI_INT (4)

H_FDI_FSYNC0 (4)

H_FDI_FSYNC1 (4)

H_FDI_LSYNC0 (4)

H_FDI_LSYNC1 (4)

12

R1371

R1371 1K_0402 _5%

1K_0402 _5%

Change From +3V to +3VALW 1/8Change D24 to 0Ω 1/12

@

R645 0_04 02_5%

Q38

Q38 MMBT390 6_SOT23-3

PCH_RSM RST#

R656

R656 10K_040 2_5%

10K_040 2_5%

Title

Size Document Num ber Rev

Custom

Date: Sheet of

2

Date: Sheet of

MMBT390 6_SOT23-3

12

Compal Electronics, Inc.

PCH (3/9) DMI, FDI, PM

PAU30 M/B LA-6392P Schematic

@

12

123

C

E

B

1 2

R644 4.7K_04 02_5%

D27A

1

2

BAV99DW -7_SOT363

D27B

4

5

BAV99DW -7_SOT363

6

3

1

EC_RSMR ST# (33)

+3VALW

12

R655

2.2K_040 2_5%

15 51Monday, November 22, 20 10

0.1

5

IGPU_BKLT_EN Pul l down 100K at EC Side

D D

PCH_ENVDD Pull d own 100k at JLV DS1 Side

PCH_LCD_CLK and PCH_LCD_DATA Pu ll high 4.7K at JLVDS1 Side

+3VS

C C

Del R116 R119 1/13

R117 10K_ 0402_5% R117 10K_0 402_5%

1 2

R118 10K_ 0402_5% R118 10K_0 402_5%

1 2

R517 2.2K_ 0402_5% R517 2.2 K_0402_5%

1 2

R518 2.2K_ 0402_5% R518 2.2 K_0402_5%

1 2

R1048 4.7K_040 2_5%R 1048 4.7K_0 402_5%

1 2

R1049 4.7K_040 2_5%R 1049 4.7K_0 402_5%

1 2

LCTLA_C LK

LCTLB_D ATA

PCH_CRT _CLK

PCH_CRT _DATA

SDVOB_S CLK

SDVOB_S DATA

Change R1048.R1049 From 2.2KΩ to 4.7KΩ 1/18

1 2

R511 150_040 2_1%R511 150_040 2_1%

1 2

R512 150_040 2_1%R512 150_040 2_1%

1 2

R513 150_040 2_1%R513 150_040 2_1%

close to PCH

B B

A A

ENBKL(33)

R112 0_04 02_5%R112 0_04 02_5%

1 2

Del U11.C230.R115.R126 1/7

PCH_CRT _B

PCH_CRT _G

PCH_CRT _R

PCH_CRT _HSYNC(25) PCH_CRT _VSYNC(2 5)

IGPU_BKLT _ENENBKL

4

PCH_ENV DD(22)

DPST_PW M(22)

PCH_LCD _CLK(22)

PCH_LCD _DATA(22)

R145

1 2

2.37K_04 02_1%

R141

1 2

0_0402_ 5%

PCH_TXC LK-(22) PCH_TXC LK+(22)

PCH_TXO UT0-(22) PCH_TXO UT1-(22) PCH_TXO UT2-(22)

PCH_TXO UT0+(22 ) PCH_TXO UT1+(22 ) PCH_TXO UT2+(22 )

PCH_CRT _B(25)

PCH_CRT _G(25) PCH_CRT _R(2 5)

PCH_CRT _CLK(25) PCH_CRT _DATA(25)

R974 22_0 402_5%R974 2 2_0402_5%

1 2

R975 22_0 402_5%R975 2 2_0402_5%

1 2

Add R974.R975 1/14

IGPU_BKLT _EN

PCH_LCD _CLK PCH_LCD _DATA

LCTLA_C LK LCTLB_D ATA

LVDS_IBG

LVD_VRE F

PCH_TXC LKPCH_TXC LK+

PCH_TXO UT0PCH_TXO UT1PCH_TXO UT2-

PCH_TXO UT0+ PCH_TXO UT1+ PCH_TXO UT2+

PCH_CRT _B PCH_CRT _G PCH_CRT _R

PCH_CRT _CLK PCH_CRT _DATA

PCH_CRT _HSYNC_R PCH_CRT _VSYNC_R

CRT_IREF

12

R135

R135 1K_0402 _0.5%

1K_0402 _0.5%

2/3 Change to 1K_0402_0.5% from Intel Suggestion. (EDS 1.0 is incorrect)

U30D

T48

L_BKLTEN

T47

L_VDD_EN

Y48

L_BKLTCTL

AB48

L_DDC_CLK

Y45

L_DDC_DATA

AB46

L_CTRL_CLK

V48

L_CTRL_DATA

AP39

LVD_IBG

AP41

LVD_VBG

AT43

LVD_VREFH

AT42

LVD_VREFL

AV53

LVDSA_CLK#

AV51

LVDSA_CLK

BB47

LVDSA_DATA#0

BA52

LVDSA_DATA#1

AY48

LVDSA_DATA#2

AV47

LVDSA_DATA#3

BB48

LVDSA_DATA0

BA50

LVDSA_DATA1

AY49

LVDSA_DATA2

AV48

LVDSA_DATA3

AP48

LVDSB_CLK#

AP47

LVDSB_CLK

AY53

LVDSB_DATA#0

AT49

LVDSB_DATA#1

AU52

LVDSB_DATA#2

AT53

LVDSB_DATA#3

AY51

LVDSB_DATA0

AT48

LVDSB_DATA1

AU50

LVDSB_DATA2

AT51

LVDSB_DATA3

AA52

CRT_BLUE

AB53

CRT_GREEN

AD53

CRT_RED

V51

CRT_DDC_CLK

V53

CRT_DDC_DATA

Y53

CRT_HSYNC

Y51

CRT_VSYNC

AD48

DAC_IREF

AB51

CRT_IRTN

IBEXPEAK-M _FCBGA107

3

DDPB_0N DDPB_0P DDPB_1N DDPB_1P DDPB_2N DDPB_2P DDPB_3N DDPB_3P

DDPC_0N DDPC_0P DDPC_1N DDPC_1P DDPC_2N DDPC_2P DDPC_3N DDPC_3P

DDPD_0N DDPD_0P DDPD_1N DDPD_1P DDPD_2N DDPD_2P DDPD_3N DDPD_3P

BJ46 BG46

BJ48 BG48

BF45 BH45

T51 T53

BG44 BJ44 AU38

BD42 BC42 BJ42 BG42 BB40 BA40 AW38 BA38

Y49 AB49

BE44 BD44 AV40

BE40 BD40 BF41 BH41 BD38 BC38 BB36 BA36

U50 U52

BC46 BD46 AT38

BJ40 BG40 BJ38 BG38 BF37 BH37 BE36 BD36

SDVO_TVCLKINN SDVO_TVCLKINP

SDVO_STALLN SDVO_STALLP

SDVO_INTN SDVO_INTP

SDVO_CTRLCLK

SDVO_CTRLDATA

DDPB_AUXN DDPB_AUXP

DDPB_HPD

LVDS

DDPC_CTRLCLK

DDPC_CTRLDATA

DDPC_AUXN DDPC_AUXP

DDPC_HPD

Digital Display Interface

DDPD_CTRLCLK

DDPD_CTRLDATA

DDPD_AUXN DDPD_AUXP

DDPD_HPD

CRT

REV1.0

SDVOB_S CLK SDVOB_S DATA

DDPB_0N DDPB_0P DDPB_1N DDPB_1P DDPB_2N DDPB_2P DDPB_3N DDPB_3P

DDPC_SC LK DDPC_SD ATA

DDPC_0N DDPC_0P DDPC_1N DDPC_1P DDPC_2N DDPC_2P DDPC_3N DDPC_3P

PORT B

2

SDVOB_S TALL- (24) SDVOB_S TALL+ (2 4)

SDVOB_S CLK (24) SDVOB_S DATA (24)

4/13 add test point

@

C1004 .1 U_0402_16V7KC1004 .1 U_0402_16V7K

1 2

C1005 .1 U_0402_16V7KC1005 .1 U_0402_16V7K

1 2

C1006 .1 U_0402_16V7KC1006 .1 U_0402_16V7K

1 2

C1007 .1 U_0402_16V7KC1007 .1 U_0402_16V7K

1 2

C1008 .1 U_0402_16V7KC1008 .1 U_0402_16V7K

1 2

C1009 .1 U_0402_16V7KC1009 .1 U_0402_16V7K

1 2

C1010 .1 U_0402_16V7KC1010 .1 U_0402_16V7K

1 2

C1011 .1 U_0402_16V7KC1011 .1 U_0402_16V7K

1 2

C1078 .1U_0402 _16V7KC1078 .1U_0402 _16V7K

1 2

C1014 .1U_0402 _16V7KC1014 .1U_0402 _16V7K

1 2

C1028 .1U_0402 _16V7KC1028 .1U_0402 _16V7K

1 2

C1065 .1U_0402 _16V7KC1065 .1U_0402 _16V7K

1 2

C1068 .1U_0402 _16V7KC1068 .1U_0402 _16V7K

1 2

C1070 .1U_0402 _16V7KC1070 .1U_0402 _16V7K

1 2

C1071 .1U_0402 _16V7KC1071 .1U_0402 _16V7K

1 2

C1075 .1U_0402 _16V7KC1075 .1U_0402 _16V7K

1 2

T42 PAD@T42 PAD

DDPC_SC LK (26) DDPC_SD ATA (2 6)

Configuration Wise Pin Mapping for DDI Ports

DDI PCH Pin Names

DDPB_[0]P

DDPB_[0]N

DDPB_[1]P

DDPB_[1]N

DDPB_[2]P

DDPB_[2]N

DDPB_[3]P

DDPB_[3]N

DDPB_AUXP

DDPB_AUXN

DDPB_HPD

SDVO_CTRLCLK

SDVO_CTRLDATA

SDVO Mapping

SDVO_RED

SDVO_RED#

SDVO_GREEN

SDVO_GREEN#

SDVO_BLUE

SDVO_BLUE#

SDVO_CLK

SDVO_CLK#

NA

SDVO_CTRLCLK

SDVO_CTRLDATA

HDMI/DVI Mapping

TMDSB_DATA2

TMDSB_DATA2#

TMDSB_DATA1

TMDSB_DATA1#

TMDSB_DATA0

TMDSB_DATA0#

TMDSB_CLK

TMDSB_CLK#

NA

HDMIB_HPD

HDMIB_CTRLCLK

HDMIB_CTRLDATA

1

SDVOB_R - (24) SDVOB_R + (24) SDVOB_G - (2 4) SDVOB_G + (24) SDVOB_B - (2 4) SDVOB_B + (24) SDVOB_C LK- (24) SDVOB_C LK+ (24)

PCH_DPC _HPD (26)

PCH_TMD S_D2# (2 6) PCH_TMD S_D2 (26 ) PCH_TMD S_D1# (2 6) PCH_TMD S_D1 (26 ) PCH_TMD S_D0# (2 6) PCH_TMD S_D0 (26 ) PCH_TMD S_CK# (2 6) PCH_TMD S_CK (26 )

DisplayPort Mapping

DDPB_[0]P

DDPB_[0]N

DDPB_[1]P

DDPB_[1]N

DDPB_[2]P

DDPB_[2]N

DDPB_[3]P

DDPB_[3]N

DDPB_AUXP

DDPB_AUXN

DDPB_HPD

NA

Security Class ification

2009/11/ 23 2010/11/ 23

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/11/ 23 2010/11/ 23

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

PCH (4/9) LVDS, CRT, DPI

Size Document Num ber Rev

Custom

PAU30 M/B LA-6392P Schematic

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

16 51Monday, November 22, 20 10

1

0.1

5

+3VS

R139 8.2K_ 0402_5% R139 8.2K_0 402_5%

1 2

R542 8.2K_ 0402_5% R542 8.2K_0 402_5%

1 2

R140 8.2K_ 0402_5% R140 8.2K_0 402_5%

1 2

D D

C C

R131 8.2K_ 0402_5% R131 8.2K_0 402_5%

1 2

R134 8.2K_ 0402_5% R134 8.2K_0 402_5%

1 2

R540 8.2K_ 0402_5% R540 8.2K_0 402_5%

1 2

R538 8.2K_ 0402_5% R538 8.2K_0 402_5%

1 2

R1391 2.2 K_0402_5%R1391 2.2K_0402 _5%

1 2

R1392 2.2 K_0402_5%R1392 2.2K_0402 _5%

1 2

R528 8.2K_ 0402_5% R528 8.2K_0 402_5%

1 2

R526 8.2K_ 0402_5% R526 8.2K_0 402_5%

1 2

R516 8.2K_ 0402_5% R516 8.2K_0 402_5%

1 2

R537 8.2K_ 0402_5% R537 8.2K_0 402_5%

1 2

R535 8.2K_ 0402_5% R535 8.2K_0 402_5%

1 2

R536 8.2K_ 0402_5% R536 8.2K_0 402_5%

1 2

R133 8.2K_ 0402_5% R133 8.2K_0 402_5%

1 2

R531 8.2K_ 0402_5% R531 8.2K_0 402_5%

1 2

R532 8.2K_ 0402_5% R532 8.2K_0 402_5%

1 2

R530 8.2K_ 0402_5% R530 8.2K_0 402_5%

1 2

R529 8.2K_ 0402_5%R529 8.2K_ 0402_5%

1 2

PCI_GNT[0:3]# has a weak internal pull-up

change netname PCI_PIRQE# to G_SENSOR_G

change netname PCI_PIRQG# to TOUCH_PANEL_INT2#

change netname PCI_PIRQF# to TOUCH_PANEL_INT1#

1/7

G_SENSO R_INT#(38)

TOUCH_P ANEL_INT1_PCH#(34)

TOUCH_P ANEL_INT2_PCH#(34)

PCI_GNT2# ESI Strap (Server Only) this signal should not be pulled low

Boot BIOS Strap

PCI_GNT#0 PCI_GNT#1 Boot BIOS Location

0 0

B B

0 1

1 0

1 1

*

PCI_PIRQA#

PCI_PIRQC# PCI_SERR#

PCI_PLOCK # PCI_PERR# G_SENSO R_INT# PCI_STOP#

GPIO3

4/1 add two pull up resistors

GPIO4

PCI_REQ0# PCI_PIRQB#

PCI_REQ3#

PCI_IRDY# PCI_PIRQD# PCI_REQ2# PCI_DEVSE L#

PCI_FRAME # PCI_REQ1# PCI_PIRQH# PCI_TRDY#

3/25 add T15

G_SENSO R_INT#

R1393 0_0402_ 5%@R1393 0_040 2_5%@

1 2

R1394 0_0402_ 5%@R1394 0_040 2_5%@

1 2

@

PAD

T15

@

PAD

T9

LPC

Reserved (NAND)

PCI

SPI

PLT_RST #(5 )

PCI_PIRQA# PCI_PIRQB# PCI_PIRQC# PCI_PIRQD#

PCI_REQ0# PCI_REQ1# PCI_REQ2# PCI_REQ3#

PCI_GNT0# PCI_GNT1# PCI_GNT2# PCI_GNT3#

GPIO3 GPIO4 PCI_PIRQH#

TP_PCI_RS T#

PCI_SERR# PCI_PERR#

PCI_IRDY#

PCI_DEVSE L# PCI_FRAME #

PCI_PLOCK #

PCI_STOP# PCI_TRDY#

PLT_RST #

2008/1/6 2009MOW01 change to 22 ohm

R520 2 2_0402_5% R520 22_04 02_5%

@

1 2

R136 2 2_0402_5% R136 22_04 02_5%

1 2

1

2

RF Recommand

C254

@

22P_040 2_50V8J

CLK_PCI_L PC(3 3)

CLK_PCI_F B(14)

C953

22P_040 2_50V8J

Add C953 1/13

A A

CLK_PCI_L PC_R CLK_PCI_F B_R

4

U30E

H40

AD0

N34

AD1

C44

AD2

A38

AD3

C36

AD4

J34

AD5

A40

AD6

D45

AD7

E36

AD8

H48

AD9

E40

AD10

C40

AD11

M48

AD12

M45

AD13

F53

AD14

M40

AD15

M43

AD16

J36

AD17

K48

AD18

F40

AD19

C42

AD20

K46

AD21

M51

AD22

J52

AD23

K51

AD24

L34

AD25

F42

AD26

J40

AD27

G46

AD28

F44

AD29

M47

AD30

H36

AD31

J50

C/BE0#

G42

C/BE1#

H47

C/BE2#

G34

C/BE3#

G38

PIRQA#

H51

PIRQB#

B37

PIRQC#

A44

PIRQD#

F51

REQ0#

A46

REQ1# / GPIO50

B45

REQ2# / GPIO52

M53

REQ3# / GPIO54

F48

GNT0#

K45

GNT1# / GPIO51

F36

GNT2# / GPIO53

H53

GNT3# / GPIO55

B41

PIRQE# / GPIO2

K53

PIRQF# / GPIO3

A36

PIRQG# / GPIO4

A48

PIRQH# / GPIO5

K6

PCIRST#

E44

SERR#

E50

PERR#

A42

IRDY#

H44

PAR

F46

DEVSEL#

C46

FRAME#

D49

PLOCK#

D41

STOP#

C48

TRDY#

M7

PME#

D5

PLTRST#

N52

CLKOUT_PCI0

P53

CLKOUT_PCI1

P46

CLKOUT_PCI2

P51

CLKOUT_PCI3

P48

CLKOUT_PCI4

IBEXPEAK-M _FCBGA107

Have internal PU

3

REV1.0

PCI

NV_DQ0 / NV_IO0 NV_DQ1 / NV_IO1 NV_DQ2 / NV_IO2 NV_DQ3 / NV_IO3 NV_DQ4 / NV_IO4 NV_DQ5 / NV_IO5 NV_DQ6 / NV_IO6 NV_DQ7 / NV_IO7 NV_DQ8 / NV_IO8

NV_DQ9 / NV_IO9 NV_DQ10 / NV_IO10 NV_DQ11 / NV_IO11

NVRAM

NV_DQ12 / NV_IO12 NV_DQ13 / NV_IO13 NV_DQ14 / NV_IO14 NV_DQ15 / NV_IO15

NV_RCOMP

NV_WR#0_RE# NV_WR#1_RE#

NV_WE#_CK0 NV_WE#_CK1

USB

USBRBIAS#

OC0# / GPIO59 OC1# / GPIO40 OC2# / GPIO41 OC3# / GPIO42 OC4# / GPIO43

OC5# / GPIO9 OC6# / GPIO10 OC7# / GPIO14

NV_CE#0 NV_CE#1 NV_CE#2 NV_CE#3

NV_DQS0 NV_DQS1

NV_ALE NV_CLE

NV_RB#

USBP0N

USBP0P

USBP1N

USBP1P

USBP2N

USBP2P

USBP3N

USBP3P

USBP4N

USBP4P

USBP5N

USBP5P

USBP6N

USBP6P

USBP7N

USBP7P

USBP8N

USBP8P

USBP9N

USBP9P USBP10N USBP10P USBP11N USBP11P USBP12N USBP12P USBP13N USBP13P

USBRBIAS

AY9 BD1 AP15 BD8

AV9 BG8

AP7 AP6 AT6 AT9 BB1 AV6 BB3 BA4 BE4 BB6 BD6 BB7 BC8 BJ8 BJ6 BG6

BD3 AY6

AU2

AV7

AY8 AY5

AV11 BF5

H18 J18 A18 C18 N20 P20 J20 L20 F20 G20 A20 C20 M22 N22 B21 D21 H22 J22 E22 F22 A22 C22 G24 H24 L24 M24 A24 C24

B25

D25

N16 J16 F16 L16 E14 G16 F12 T15

NV_ALE NV_CLE

USB20_N 0 USB20_P 0 USB20_N 1 USB20_P 1 USB20_N 2 USB20_P 2 USB20_N 3 USB20_P 3 USB20_N 4 USB20_P 4 USB20_N 5 USB20_P 5

USB20_N 8 USB20_P 8 USB20_N 9 USB20_P 9 USB20_N 10 USB20_P 10

USB20_N 13 USB20_P 13

USB_BIAS

USB_OC# 0 USB_OC# 1 USB_OC# 2 USB_OC# 3 USB_OC# 4 USB_OC# 5 USB_OC# 6 USB_OC# 7

1 2

R549

22.6_040 2_1%

Change Netname From USB_OC#x_R to USB_OC#x 1/14

PCI_GNT0#

PCI_GNT1#

PCI_GNT3#

R132 1K_0 402_5%@R132 1K_04 02_5%@

1 2

R137 1K_0 402_5%@R137 1K_04 02_5%@

1 2

R514 1K_0 402_5%@R514 1K_04 02_5%@

1 2

TOUCH_P ANEL_INT1_PCH#(34)

TOUCH_P ANEL_INT2_PCH#(34)

6/9 add +3VALW path, reserve +3VS

4/13 add 1410

PLT_RST #

47_0402 _5%

1 2

.1U_0402 _16V7K

MC74VHC 1G08DFT2G_SC 70-5

R1410

C601

1

@

2

Del R607 1/27

3/22 USB port0

4/8 change control board 2 to USB port 2

USB20_N 0 (32) USB20_P 0 (3 2) USB20_N 1 (32) USB20_P 1 (3 2) USB20_N 2 (34) USB20_P 2 (3 4) USB20_N 3 (34) USB20_P 3 (3 4) USB20_N 4 (28) USB20_P 4 (2 8) USB20_N 5 (28) USB20_P 5 (2 8)

USB20_N 8 (22) USB20_P 8 (2 2) USB20_N 9 (28) USB20_P 9 (2 8)

USB20_N 13 (32) USB20_P 13 (32)

R549

USB Conn. (Left Side)

USB/Touch Screen2

USB/Touch Screen1

Mini Card 1(WLAN)

SIMM Card

CMOS Camera (LVDS)

Mini Card 2 (3G/GPS)

Bluetooth

Del R167 1/7

OC[0..3] use for EHCI 1 OC[4..7] use for EHCI 2

R1399 0_0402_ 5%R13 99 0_0402 _5%

1 2

R1400 0_0402_ 5%R14 00 0_0402 _5%

1 2

USB_OC# 0 (32)

2

+3VS

R1512 0_0402_ 5%@R1512 0_040 2_5%@

1 2

R1513 0_0402_ 5%R15 13 0_0402 _5%

1 2

5

U34

2

P

B

1

A

G

3

Change R614 From 0 to 22 Ohm 1/13 R614 and R590 Swap Position 1/13

6/3 DEL USB port3

EHCI 1 (Device 29)

R822 22_040 2_5%

1 2

4

Y

Add R822 1/8

NV_ALE

NV_CLE

NV_ALE

Enable Intel Ant i-Theft Technology：8.2K PU to +NVRA M_VCCQ

Disable Intel An ti-Theft Technology：floating(interna l PD)

NV_CLE

DMI termination voltage. weak internal PU , don't PD

R194 1K_0 402_5%@R194 1K_04 02_5%@

R195 1K_0 402_5%@R195 1K_04 02_5%@

Change usb port 1/8

2/10 USB6, USB7 not support on HM55

Change Touch screen1 form U

SB port10 to port3 08/24

EHCI 2 (Device 26)

Del USB Port12 3/3

Del USB_OC#2_R to PCH XDP 1/7

change R1385.R1396 from 10k to 4.7k 8/2

(For USB CONN) 1/8

(For USB 2.0 &3.0 Conn.) 3/3

USB_OC# 0

USB_OC# 5

USB_OC# 6

USB_OC# 1

USB_OC# 4

USB_OC# 2

USB_OC# 5

USB_OC# 6

USB_OC# 3

USB_OC# 7

R165 10K_ 0402_5% R165 10 K_0402_5%

1 2

R166 10K_ 0402_5% R166 10 K_0402_5%

1 2

R176 10K_ 0402_5% R176 10 K_0402_5%

1 2

R640 10K_ 0402_5%R640 10K_040 2_5%

1

+3VALW

12

R616

R616 100K_04 02_5%

100K_04 02_5%

1 2

R1395 4.7 K_0402_5%R1395 4.7K_0402 _5%

R1396 4.7 K_0402_5%R1396 4.7K_0402 _5%

R1397 10 K_0402_5%R1397 10K _0402_5%

R1398 10 K_0402_5% R1398 10K_04 02_5%

PLT_RST _BUF# (24,28,2 9,31,33)

+3VALW

1 2

12

+1.8VS

R640 Move From P .36 to here

A16 swap overide Strap/Top-Block Swap Override jumper

Low=A16 swap

PCI_GNT3#

override/Top-Block Swap Override enabled High=Default

*

5

4

Security Class ification

2009/11/ 23 2010/11/ 23

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/11/ 23 2010/11/ 23

3

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

PCH (5/9) PCI, USB, VRAM

Size Document Num ber Rev

Custom

PAU30 M/B LA-6392P Schematic

Date: Sheet

Date: Sheet of

Compal Electronics, Inc.

17 51Monday, November 22, 20 10

1

of

0.1

5

3/22 R543, R546

+3VS

12

GPIO1

COLOR_E NG_EN VGA_PRS NT_L#

PCH_TEM P_ALERT#

PCH_GPIO2 2

PCH_GPIO3 9

PCH_GPIO4 8

DGPU_PW R_EN

PCH_GPIO3 4

PCH_GPIO1 2

PCH_GPIO1 5

PCH_GPIO2 4

PCH_GPIO2 8 PCH_GPIO5 7 PCH_GPIO4 5 RST_GAT E

VGA_PRS NT_L#

DGPU_HO LD_RST#

DGPU_PW R_EN

PCH_GPIO3 5

PCH_GPIO2 7

CRT_DET Reserve Pull high to +3 VS at U99 side

(GPIO15 Have Internal Pull Down)

VGA_PW ROK_R(35)

2009/09/07 GPIO24 pull high +3V

(GPIO27 Have Internal Pull High)

DGPU_PWR_EN Pull Down at Page 47

R539 10K_ 0402_5% R539 10K_0 402_5%

1 2

R603 10K_ 0402_5% R603 10K_0 402_5%

1 2

R224 10K_ 0402_5%R224 10K_040 2_5%

1 2

R605 10K_ 0402_5% R605 10K_0 402_5%

1 2

R226 10K_ 0402_5% R226 10K_0 402_5%

1 2

R209 10K_ 0402_5% R209 10K_0 402_5%

D D

C C

1 2

Del R144 3/9

R206 10K_ 0402_5% R206 10K_0 402_5%

1 2

R205 10K_ 0402_5%@R205 10K_04 02_5%@

1 2

R228 10K_ 0402_5% R228 10K_0 402_5%

1 2

+3VALW

change R189 from 10k to 4.7k 8/2

R189 4.7K_ 0402_5%R189 4.7K_ 0402_5%

1 2

R229 1K_0 402_5% R229 1 K_0402_5%

1 2

10/7 Not Use PCH_GPIO15 PU 1K to +3V

R182 10K_ 0402_5%@R182 10K_04 02_5%@

1 2

R210 10K_ 0402_5% R210 10K_0 402_5%

1 2

R197 10K_ 0402_5% R197 10K_0 402_5%

1 2

R589 10K_ 0402_5% R589 10K_0 402_5%

1 2

R586 10K_ 0402_5% R586 10K_0 402_5%

1 2

@

R223 10K_ 0402_5%

1 2

R606 10K_ 0402_5% R606 10K_0 402_5%

1 2

R725 10K_ 0402_5%

R180 10K_ 0402_5% R180 10K_0 402_5%

1 2

R204 10K_ 0402_5%@R204 10K_04 02_5%@

1 2

GPIO27 (Have internal Pull-High) High: VCCVRM VR Enable Low: VCCVRM VR Disable

Change Netname From DGPU_EDIDSEL# to GPIO0 3/18

PCH_CRT _DET(33)

PCH_HDM I_HPD_INT#(33)

EC_SCI#(33)

EC_SMI#(33)

PCH_GPIO1 2(31)

Del off page 1/ 8

Del VGA_PRSNT_L# off page 1/8

RST_GAT E(10)

PCH_TEM P_ALERT#(33)

Del R626 3/18

Move R192.R153.R605 to EC side 3/18

Move R205 to Page.47 3/18

B B

Move R124 to Page.43 3/18

VGA_PRSNT_L#

StructureGPIO37

DIS/OPT/SG

0

UMA Only

1

*

GPIO8

This signal has a weak internal pull up can't Pull low

GPIO27

On-Die PLL Voltage Regulator This signal has a weak internal pull up

A A

H：On-Die voltage r egulator enable

*

L：On-Die PLL Volta ge Regulator di sable

Note: the intern al pull-up is d isabled after RSMR ST# de-asserts. The On-Die PLL v oltage regulato r is enabled when sampled hig h. When sampled low the On-Die PLL Volta ge Regulator is disabled.

5

GPIO15

L：Intel ME Crypto Transport

*

Layer Security(T LS) chiper suit e with no confiden tiality

H：Intel ME Crypto Transport Layer Security(T LS) chiper suit e with confidentia lity

CRB has a 1-k pu ll-up on this s ignal to +3.3VA rail.

4

Del R143 1/14

PCH_CRT _DET

GPIO1

PCH_HDM I_HPD_INT#

EC_SCI#

EC_SMI#

PCH_GPIO1 2

PCH_GPIO1 5

DGPU_HO LD_RST#

VGA_PW ROK_R

PCH_GPIO2 2

PCH_GPIO2 4

PCH_GPIO2 7

PCH_GPIO2 8

PCH_GPIO3 4

PCH_GPIO3 5

DGPU_PW R_EN

VGA_PRS NT_L#

COLOR_E NG_EN

PCH_GPIO3 9

PCH_GPIO4 5

RST_GAT E

PCH_GPIO4 8

PCH_GPIO5 7

4

U30F

Y3

BMBUSY# / GPIO0

C38

TACH1 / GPIO1

D37

TACH2 / GPIO6

J32

TACH3 / GPIO7

F10

GPIO8

(GPIO8 Have Internal Pull High,Should not be Pull-Low)

K9

LAN_PHY_PWR_CTRL / GPIO12

T7

GPIO15

AA2

SATA4GP / GPIO16

F38

TACH0 / GPIO17

Y7

SCLOCK / GPIO22

H10

GPIO24

AB12

GPIO27

V13

GPIO28

M11

STP_PCI# / GPIO34

V6

SATACLKREQ# / GPIO35

AB7

SATA2GP / GPIO36

AB13

SATA3GP / GPIO37

V3

SLOAD / GPIO38

P3

SDATAOUT0 / GPIO39

H3

PCIECLKRQ6# / GPIO45

F1

PCIECLKRQ7# / GPIO46

AB6

SDATAOUT1 / GPIO48

AA4

SATA5GP / GPIO49

F8

GPIO57

A4

VSS_NCTF_1

A49

VSS_NCTF_2

A5

VSS_NCTF_3

A50

VSS_NCTF_4

A52

VSS_NCTF_5

A53

VSS_NCTF_6

B2

VSS_NCTF_7

B4

VSS_NCTF_8

B52

VSS_NCTF_9

B53

VSS_NCTF_10

BE1

VSS_NCTF_11

BE53

VSS_NCTF_12

BF1

VSS_NCTF_13

BF53

VSS_NCTF_14

BH1

VSS_NCTF_15

BH2

VSS_NCTF_16

BH52

VSS_NCTF_17

BH53

VSS_NCTF_18

BJ1

VSS_NCTF_19

BJ2

VSS_NCTF_20

BJ4

VSS_NCTF_21

BJ49

VSS_NCTF_22

BJ5

VSS_NCTF_23

BJ50

VSS_NCTF_24

BJ52

VSS_NCTF_25

BJ53

VSS_NCTF_26

D1

VSS_NCTF_27

D2

VSS_NCTF_28

D53

VSS_NCTF_29

E1

VSS_NCTF_30

E53

VSS_NCTF_31

IBEXPEAK-M _FCBGA107

Security Class ification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MISC

CLKOUT_BCLK0_N / CLKOUT_PCIE8N

CLKOUT_BCLK0_P / CLKOUT_PCIE8P

GPIO

CPU

NCTF

RSVD

REV1.0

3

A20GATE

PECI

RCIN#

TP1

TP2

TP3

TP4

TP5

TP6

TP7

TP8

TP9

TP10

TP11

TP12

TP13

TP14

TP15

TP16

TP17

TP18

TP19

NC_1

NC_2

NC_3

NC_4

NC_5

INIT3_3V#

TP24

AH45 AH46

AF48 AF47

EC_GA20

U2

AM3

AM1

BG10

EC_KBRS T#

T1

BE10

BD10

2009/08/23

BA22

AW22

BB22

AY45

AY46

AV43

AV45

AF13

M18

N18

AJ24

AK41

AK42

M32

N32

M30

N30

H12

AA23

AB45

AB38

AB42

AB41

T39

2009/08/23

P6

(Have internal PH,Do not pull down)

C10

Series resistor of 56±5% Pull-up of 56±5% to VTT (both these should be close to PCH)

INIT3_3V

This signal has weak internal PH, can't pull low

EC_GA20 (33)

CLK_CPU _BCLK# (5)

CLK_CPU _BCLK (5)

H_PECI (5)

EC_KBRS T# (33)

H_CPUPW RGD (5)

R175 56_0402_5 %

CLKOUT_PCIE6N

CLKOUT_PCIE6P

CLKOUT_PCIE7N

CLKOUT_PCIE7P

PROCPWRGD

THRMTRIP#

Del T27 1/14

Compal Secret Data

2009/11/ 23 2010/11/ 23

3

Compal Secret Data

Deciphered Date

2

1

Move R601.R624 to EC side 3/18

12

2

H_THERM TRIP#THRMTRIP_ PCH#

R174 56_0402_5 %

R570

330_040 2_5%@

+1.05VS_ VTT

1 2

Title

PCH (6/9) GPIO, CPU, MISC

Size Document Num ber Rev

Custom

PAU30 M/B LA-6392P Schematic

Date: Sheet

Date: Sheet of

H_THERM TRIP# (5 )

12

H_THERM TRIP#

+1.05VS_ VTT

MAINPW ON (41,4 2)

1

C

Q33

2

B

2SC2411 K_SOT23-3

E

3

@

Compal Electronics, Inc.

1

0.1

of

18 51Monday, November 22, 20 10

5

4

3

2

1

Add J10 1/14 Del J1.J10 1/21

+1.05VS_ VTT

POWER

U30G

1U_0402 _6.3V4Z

C257

1U_0402 _6.3V4Z

1

C259

2

Near AB24

10U_080 5_10V4Z

Near AB24

op Side

T

1

2

D D

1

+

C1003

C1003 330U_D2 _2V_Y

330U_D2 _2V_Y

2

Intel suggest follow CRB 8/21

All Ibex Peak-M Power rails with netnames +1.1VS and +1.1V rails are actually +1.05VS and +1.05V rails

10mil

C C

+1.05VS_ VTT

10U_080 5_10V4Z

1

C580

2

Top Side

B B

Near AN20

C583

1U_0402 _6.3V4Z

1

2

1U_0402 _6.3V4Z

C582

Follow Intel suggestion 8/21

1

2

T25

DG 1.6 (Page 329) Have Internal VRM

1

C287

2

1U_0402 _6.3V4Z

Near AN35

0.1U_040 2_16V4Z

C270

Change Netname From +VCCVRM to +1.8VS 3/22

DG 1.6 (Page 329)

10mil

Have Internal VRM

PAD

T26

PAD

1U_0402 _6.3V4Z

C274

12

+1.8VS

@

+1.05VS_ VTT

+VCCAPL L_EXP

@

1

2

+3VS

+VCCAPL L_FDI

U30G

AB24

VCCCORE[1]

AB26

VCCCORE[2]

AB28

VCCCORE[3]

AD26

VCCCORE[4]

AD28

VCCCORE[5]

AF26

VCCCORE[6]

AF28

VCCCORE[7]

AF30

VCCCORE[8]

AF31

VCCCORE[9]

AH26

VCCCORE[10]

AH28

VCCCORE[11]

AH30

VCCCORE[12]

AH31

VCCCORE[13]

AJ30

VCCCORE[14]

AJ31

VCCCORE[15]

AK24

VCCIO[24]

42mA

BJ24

VCCAPLLEXP

AN20

VCCIO[25]

AN22

VCCIO[26]

AN23

VCCIO[27]

AN24

VCCIO[28]

AN26

VCCIO[29]

AN28

VCCIO[30]

BJ26

VCCIO[31]

BJ28

VCCIO[32]

AT26

VCCIO[33]

AT28

VCCIO[34]

AU26

VCCIO[35]

AU28

VCCIO[36]

AV26

VCCIO[37]

AV28

VCCIO[38]

AW26

VCCIO[39]

AW28

VCCIO[40]

BA26

VCCIO[41]

BA28

VCCIO[42]

BB26

VCCIO[43]

BB28

VCCIO[44]

BC26

VCCIO[45]

BC28

VCCIO[46]

BD26

VCCIO[47]

BD28

VCCIO[48]

BE26

VCCIO[49]

BE28

VCCIO[50]

BG26

VCCIO[51]

BG28

VCCIO[52]

BH27

VCCIO[53]

AN30

VCCIO[54]

AN31

VCCIO[55]

AN35

VCC3_3[1]

AT22

VCCVRM[1]

BJ18

VCCFDIPLL

AM23

VCCIO[1]

IBEXPEAK-M _FCBGA107

POWER

1524mA

3208mA

6mA

69mA

CRTLVDS

VCC CORE

HVCMOS

DMI

PCI E*

NAND / SPI

FDI

REV1.0

VCCADAC[1]

VCCADAC[2]

VSSA_DAC[1]

VSSA_DAC[2]

00mA

3

VCCALVDS

VSSA_LVDS

59mA

VCCTX_LVDS[1] VCCTX_LVDS[2] VCCTX_LVDS[3] VCCTX_LVDS[4]

VCC3_3[2]

VCC3_3[3]

VCC3_3[4]

35mA

VCCVRM[2]

61mA

VCCDMI[1]

VCCDMI[2]

156mA

VCCPNAND[1] VCCPNAND[2] VCCPNAND[3] VCCPNAND[4] VCCPNAND[5] VCCPNAND[6] VCCPNAND[7] VCCPNAND[8] VCCPNAND[9]

85mA

VCCME3_3[1] VCCME3_3[2] VCCME3_3[3] VCCME3_3[4]

AE50

AE52

AF53

AF51

AH38

AH39

AP43 AP45 AT46 AT45

AB34

AB35

AD35

AT24

AT16

AU16

AM16 AK16 AK20 AK19 AK15 AK13 AM12 AM13 AM15

AM8 AM9 AP11 AP9

R114 Change BOM Structure DISO@ to @ 1/9

el R114 1/14

D

15mil

+VCCADA C

1

C233

0.01U_04 02_16V7K

2

C232

0.1U_040 2_16V4Z

Del R146 1/14

20mil

Del R148.R152 1/14

+VCCTX_ LVDS

C260

0.01U_04 02_16V7K

1

C269

0.1U_040 2_16V4Z

2

40mil

Near AT24

10mil

55mA

C304

C304 1U_0402 _6.3V4Z

1U_0402 _6.3V4Z

Near AP43

1

2

+3VS

Near AB34

156mA

C1304 0.1 U_0402_16V4Z

1

2

Near AT16

+1.8VS

1

C261

0.01U_04 02_16V7K

2

1 2

15mil

C247

1

22U_080 5_6.3V6M

2

Add C1304 3/13

5.5mA

1

C297

0.1U_040 2_16V4Z

2

Near AK13

+3VS

31mA

1

C308

0.1U_040 2_16V4Z

2

Near AM8

60mA

1

2

C229

C229 10U_080 5_10V4Z

10U_080 5_10V4Z

Near AE50

L8

0.1UH_ML F1608DR10KT_ 10%_1608

0.1uH inductor, 200mA

Del R129 1/14

Del R164 1/14 Del R170 3/12

+1.8VS

+1.05VS_ VTT

Del R563 3/12

L6

2010/5/28 Add 22uF for DAC VCCC1003 change to ESR=9 6/29

+1.8VS

1 2

BLM18PG 181SN1D_2P

C1456

+3VS

12

C1456

1

22U_080 5_6.3V6M

2

1

2

+3VS

A A

Security Class ification

2009/11/ 23 2010/11/ 23

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/11/ 23 2010/11/ 23

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Num ber Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

PCH (7/9) PWR

PAU30 M/B LA-6392P Schematic

19 51Tuesday, September 07, 201 0

1

0.1

5

@

PAD

T19

DG 1.6 (Page 329) Have Internal VRM

12

R553

D D

Del R555.C291 1/26

R553

0_0402_ 5%

DG2.0 Table162 Note2 (C295 unpop)

+1.05VS_ VTT

22U_080 5_6.3V6M

1

C244

2

22U_080 5_6.3V6M

All Ibex Peak-M Power rails with netnames +1.1VS and +1.1V rails are actually +1.05VS and +1.05V rails

C C

1

C251

2

1U_0402 _6.3V4Z

Near AD38 Near V39

1U_0402 _6.3V4Z

C255

1

2

Follow Intel suggestion

@

C252

C252 22U_080 5_6.3V6M

22U_080 5_6.3V6M

Near V9

Change Netname From +VCCVRM to +1.8VS 3/22

C290

1U_0402 _6.3V4Z

Near AH35

+1.05VS_ VTT

1

2

Near AH23

R157 for HDMI deep color issue

1

C267

1U_0402 _6.3V4Z

2

1 2

R157 0_0603_5%R157 0 _0603_5%

10mil

+1.05VS_ VTT

C587

10mil

+3VALW

0.1U_040 2_16V4Z

1

2

1

C307

2

+3VS

C296

0.1U_040 2_16V4Z

C313

0.1U_040 2_16V4Z

B B

4.7U_080 5_10V4Z

A A

+RTCVCC

1U_0402 _6.3V4Z

5

4

+1.1VS_V CCACLK

+PCH_VC CD6W

10mil

1

C300

0.1U_040 2_16V4Z

2

Near Y20

1

C263

C263 1U_0402 _6.3V4Z

1U_0402 _6.3V4Z

2

C314

0.1U_040 2_16V4Z

1 2

+VCCADP LLA

+VCCADP LLB

Near AF32

C271 1U_0402 _6.3V4Z

1U_0402 _6.3V4Z

1 2

C305

0.1U_040 2_16V4Z

1 2

C293

0.1U_040 2_16V4Z

1

C299

2

Near P18

1

C302

2

Near V15

1

C292

0.1U_040 2_16V4Z

2

1

C315

0.1U_040 2_16V4Z

2

4

+VCCLAN

1

2

+1.8VS

+PCH_VC CIO

12

+VCCSST

C30 5

+VCCSUS

C293

1

2

Near AT18

20mil

1

2

Near A12

10mil

+VCCRTC EXT

88mA

20mil

88mA

20mil

C271

Near V12

Near Y22

3

POWER

U30J

52mA

AP51

VCCACLK[1]

AP53

VCCACLK[2]

344mA

AF23

VCCLAN[1]

AF24

VCCLAN[2]

Y20

DCPSUSBYP

998mA

1

AD38

VCCME[1]

AD39

VCCME[2]

AD41

VCCME[3]

AF43

VCCME[4]

AF41

VCCME[5]

AF42

VCCME[6]

V39

VCCME[7]

V41

VCCME[8]

V42

VCCME[9]

Y39

VCCME[10]

Y41

VCCME[11]

Y42

VCCME[12]

V9

DCPRTC

AU24

VCCVRM[3]

72mA

BB51

VCCADPLLA[1]

BB53

VCCADPLLA[2]

73mA

BD51

VCCADPLLB[1]

BD53

VCCADPLLB[2]

AH23

VCCIO[21]

AJ35

VCCIO[22]

AH35

VCCIO[23]

AF34

VCCIO[2]

AH34

VCCIO[3]

AF32

VCCIO[4]

V12

DCPSST

Y22

DCPSUS

P18

VCCSUS3_3[29]

U19

VCCSUS3_3[30]

U20

VCCSUS3_3[31]

U22

VCCSUS3_3[32]

V15

VCC3_3[5]

V16

VCC3_3[6]

Y16

VCC3_3[7]

> 1mA

AT18

V_CPU_IO[1]

AU18

V_CPU_IO[2]

2mA

A12

VCCRTC

IBEXPEAK-M _FCBGA107

POWER

REV1.0

VCCSUS3_3[1] VCCSUS3_3[2] VCCSUS3_3[3] VCCSUS3_3[4] VCCSUS3_3[5] VCCSUS3_3[6] VCCSUS3_3[7] VCCSUS3_3[8]

VCCSUS3_3[9] VCCSUS3_3[10] VCCSUS3_3[11] VCCSUS3_3[12] VCCSUS3_3[13]

USB

VCCSUS3_3[14] VCCSUS3_3[15] VCCSUS3_3[16]

163mA

VCCSUS3_3[17] VCCSUS3_3[18] VCCSUS3_3[19] VCCSUS3_3[20] VCCSUS3_3[21] VCCSUS3_3[22] VCCSUS3_3[23] VCCSUS3_3[24] VCCSUS3_3[25] VCCSUS3_3[26] VCCSUS3_3[27]

VCCSUS3_3[28]

>1mA

V5REF_SUS

Clock and Miscellaneous

PCI/GPIO/LPC

SATA

PCI/GPIO/LPC

CPU

RTC

Security Class ification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

HDA

VCC3_3[10]

VCC3_3[11]

VCC3_3[12]

VCC3_3[13]

VCC3_3[14]

VCCSATAPLL[1] VCCSATAPLL[2]

VCCVRM[4]

VCCME[13] VCCME[14] VCCME[15] VCCME[16]

VCCSUSHDA

3

V24

VCCIO[5]

V26

VCCIO[6]

Y24

VCCIO[7]

Y26

VCCIO[8]

V28 U28 U26 U24 P28 P26 N28 N26 M28 M26 L28 L26 J28 J26 H28 H26 G28 G26 F28 F26 E28 E26 C28 C26 B27 A28 A26

U23

V23

VCCIO[56]

F24

10mil

>1mA

K49

V5REF

357mA

J38

VCC3_3[8]

L38

VCC3_3[9]

M36

N36

P36

U35

AD13

32mA

AK3 AK1

AH22

VCCIO[9]

AT20

AH19

VCCIO[10]

AD20

VCCIO[11]

AF22

VCCIO[12]

AD19

VCCIO[13]

AF20

VCCIO[14]

AF19

VCCIO[15]

AH20

VCCIO[16]

AB19

VCCIO[17]

AB20

VCCIO[18]

AB22

VCCIO[19]

AD22

VCCIO[20]

AA34 Y34 Y35 AA35

6mA

L30

2009/11/ 23 2010/11/ 23

87mA

+1.05VS_ VTT

+VCC5RE FSUS

C285

+VCC5RE F

10mil

+VCCSAT APLL

15mil

PCH_VCC ME13 PCH_VCC ME14 PCH_VCC ME15 PCH_VCC ME16

Compal Secret Data

1

C277

C277 1U_0402 _6.3V4Z

1U_0402 _6.3V4Z

2

Near V24

1

C278

0.1U_040 2_16V4Z

2

Near A26

+3VALW

D5

21

CH751H-4 0PT_SOD323-2

3/25 follow CRB

10mil

Near F24

+3VS

C266

0.1U_040 2_16V4Z

+1.05VS_ VTT

1

2

@

12

Near J38

0.1U_040 2_10V6K

1 2

PAD

DG 1.6 (Page 329) Have Internal VRM

Change Netname From +VCCVRM to +1.8VS 3/22

+1.8VS

+1.05VS_ VTT

1

C298

C298 1U_0402 _6.3V4Z

1U_0402 _6.3V4Z

2

Near AB19

Change footprint from 0603 to 0402 3/12

R504 0_04 02_5%R504 0_04 02_5%

1 2

R502 0_04 02_5%R502 0_04 02_5%

1 2

R501 0_04 02_5%R501 0_04 02_5%

1 2

R503 0_04 02_5%R503 0_04 02_5%

1 2

C276 1 U_0402_6.3V4Z

1 2

Deciphered Date

+1.05VS_ VTT

1

C288

0.1U_040 2_16V4Z

2

R155

10_0402 _5%

1 2

T30

+3VALW

Near L30

2

+3VALW

Near U23

10mil

+3VS

Near AD13

C306

0.1U_040 2_16V4Z

+1.05VS_ VTT

2

+1.05VS_ VTT

+5VALW

+3VS

21

D4

D4 CH751H-4 0PT_SOD323-2

CH751H-4 0PT_SOD323-2

C250

12

1U_0402 _6.3V6K

Near K49

Title

Size Document Num ber Rev

Custom

Date: Sheet of

09/09/14 W W37 remove +VCCADPLLA,+VCCADPLLB external 1U

L7

1 2

10UH_LB 2012T100MR_2 0%

10uH inductor, 120mA

C551

L9

1 2

10_0402 _5%

C551

C552

+5VS

220U_B2 _2.5VM_R35

L9 10UH_LB 2012T100MR_2 0%

10UH_LB 2012T100MR_2 0%

10uH inductor, 120mA

220U_B2 _2.5VM_R35

R127

1 2

3/25 follow CRB

Compal Electronics, Inc.

PCH (8/9) PWR

PAU30 M/B LA-6392P Schematic

1

Near BB51

1

+

@

2

1U_0402 _6.3V4Z

1

+

@

2

1

C245

Del R128 3/12

2

1

C249

C249 1U_0402 _6.3V4Z

1U_0402 _6.3V4Z

2

Near BD51

20 51Monday, November 01, 20 10

+VCCADP LLA

+VCCADP LLB

0.1

5

U30I

AY7

VSS[159]

B11

VSS[160]

B15

VSS[161]

B19

VSS[162]

B23

VSS[163]

B31

VSS[164]

B35

VSS[165]

B39

VSS[166]

B43

VSS[167]

B47

VSS[168]

B7

VSS[169]

D D

C C

B B

A A

BG12

VSS[170]

BB12

VSS[171]

BB16

VSS[172]

BB20

VSS[173]

BB24

VSS[174]

BB30

VSS[175]

BB34

VSS[176]

BB38

VSS[177]

BB42

VSS[178]

BB49

VSS[179]

BB5

VSS[180]

BC10

VSS[181]

BC14

VSS[182]

BC18

VSS[183]

BC2

VSS[184]

BC22

VSS[185]

BC32

VSS[186]

BC36

VSS[187]

BC40

VSS[188]

BC44

VSS[189]

BC52

VSS[190]

BH9

VSS[191]

BD48

VSS[192]

BD49

VSS[193]

BD5

VSS[194]

BE12

VSS[195]

BE16

VSS[196]

BE20

VSS[197]

BE24

VSS[198]

BE30

VSS[199]

BE34

VSS[200]

BE38

VSS[201]

BE42

VSS[202]

BE46

VSS[203]

BE48

VSS[204]

BE50

VSS[205]

BE6

VSS[206]

BE8

VSS[207]

BF3

VSS[208]

BF49

VSS[209]

BF51

VSS[210]

BG18

VSS[211]

BG24

VSS[212]

BG4

VSS[213]

BG50

VSS[214]

BH11

VSS[215]

BH15

VSS[216]

BH19

VSS[217]

BH23

VSS[218]

BH31

VSS[219]

BH35

VSS[220]

BH39

VSS[221]

BH43

VSS[222]

BH47

VSS[223]

BH7

VSS[224]

C12

VSS[225]

C50

VSS[226]

D51

VSS[227]

E12

VSS[228]

E16

VSS[229]

E20

VSS[230]

E24

VSS[231]

E30

VSS[232]

E34

VSS[233]

E38

VSS[234]

E42

VSS[235]

E46

VSS[236]

E48

VSS[237]

E6

VSS[238]

E8

VSS[239]

F49

VSS[240]

F5

VSS[241]

G10

VSS[242]

G14

VSS[243]

G18

VSS[244]

G2

VSS[245]

G22

VSS[246]

G32

VSS[247]

G36

VSS[248]

G40

VSS[249]

G44

VSS[250]

G52

VSS[251]

AF39

VSS[252]

H16

VSS[253]

H20

VSS[254]

H30

VSS[255]

H34

VSS[256]

H38

VSS[257]

H42

VSS[258]

IBEXPEAK-M _FCBGA107

REV1.0

5

VSS[259] VSS[260] VSS[261] VSS[262] VSS[263] VSS[264] VSS[265] VSS[266] VSS[267] VSS[268] VSS[269] VSS[270] VSS[271] VSS[272] VSS[273] VSS[274] VSS[275] VSS[276] VSS[277] VSS[278] VSS[279] VSS[280] VSS[281] VSS[282] VSS[283] VSS[284] VSS[285] VSS[286] VSS[287] VSS[288] VSS[289] VSS[290] VSS[291] VSS[292] VSS[293] VSS[294] VSS[295] VSS[296] VSS[297] VSS[298] VSS[299] VSS[300] VSS[301] VSS[302] VSS[303] VSS[304] VSS[305] VSS[306] VSS[307] VSS[308] VSS[309] VSS[310] VSS[311] VSS[312] VSS[313] VSS[314] VSS[315] VSS[316] VSS[317] VSS[318] VSS[319] VSS[320] VSS[321] VSS[322] VSS[323] VSS[324] VSS[325] VSS[326] VSS[327] VSS[328] VSS[329] VSS[330] VSS[331] VSS[332] VSS[333] VSS[334] VSS[335] VSS[336] VSS[337] VSS[338] VSS[339] VSS[340] VSS[341] VSS[342] VSS[343] VSS[344] VSS[345] VSS[346] VSS[347] VSS[348] VSS[349] VSS[350] VSS[351] VSS[352] VSS[353] VSS[354] VSS[355] VSS[356] VSS[366]

H49 H5 J24 K11 K43 K47 K7 L14 L18 L2 L22 L32 L36 L40 L52 M12 M16 M20 N38 M34 M38 M42 M46 M49 M5 M8 N24 P11 AD15 P22 P30 P32 P34 P42 P45 P47 R2 R52 T12 T41 T46 T49 T5 T8 U30 U31 U32 U34 P38 V11 P16 V19 V20 V22 V30 V31 V32 V34 V35 V38 V43 V45 V46 V47 V49 V5 V7 V8 W2 W52 Y11 Y12 Y15 Y19 Y23 Y28 Y30 Y31 Y32 Y38 Y43 Y46 P49 Y5 Y6 Y8 P24 T43 AD51 AT8 AD47 Y47 AT12 AM6 AT13 AM5 AK45 AK39 AV14

4

U30H

AB16

VSS[0]

AA19

VSS[1]

AA20

VSS[2]

AA22

VSS[3]

AM19

VSS[4]

AA24

VSS[5]

AA26

VSS[6]

AA28

VSS[7]

AA30

VSS[8]

AA31

VSS[9]

AA32

VSS[10]

AB11

VSS[11]

AB15

VSS[12]

AB23

VSS[13]

AB30

VSS[14]

AB31

VSS[15]

AB32

VSS[16]

AB39

VSS[17]

AB43

VSS[18]

AB47

VSS[19]

AB5

VSS[20]

AB8

VSS[21]

AC2

VSS[22]

AC52

VSS[23]

AD11

VSS[24]

AD12

VSS[25]

AD16

VSS[26]

AD23

VSS[27]

AD30

VSS[28]

AD31

VSS[29]

AD32

VSS[30]

AD34

VSS[31]

AU22

VSS[32]

AD42

VSS[33]

AD46

VSS[34]

AD49

VSS[35]

AD7

VSS[36]

AE2

VSS[37]

AE4

VSS[38]

AF12

VSS[39]

Y13

VSS[40]

AH49

VSS[41]

AU4

VSS[42]

AF35

VSS[43]

AP13

VSS[44]

AN34

VSS[45]

AF45

VSS[46]

AF46

VSS[47]

AF49

VSS[48]

AF5

VSS[49]

AF8

VSS[50]

AG2

VSS[51]

AG52

VSS[52]

AH11

VSS[53]

AH15

VSS[54]

AH16

VSS[55]

AH24

VSS[56]

AH32

VSS[57]

AV18

VSS[58]

AH43

VSS[59]

AH47

VSS[60]

AH7

VSS[61]

AJ19

VSS[62]

AJ2

VSS[63]

AJ20

VSS[64]

AJ22

VSS[65]

AJ23

VSS[66]

AJ26

VSS[67]

AJ28

VSS[68]

AJ32

VSS[69]

AJ34

VSS[70]

AT5

VSS[71]

AJ4

VSS[72]

AK12

VSS[73]

AM41

VSS[74]

AN19

VSS[75]

AK26

VSS[76]

AK22

VSS[77]

AK23

VSS[78]

AK28

VSS[79]

IBEXPEAK-M _FCBGA107

4

3

AK30

VSS[80]

AK31

VSS[81]

AK32

VSS[82]

AK34

VSS[83]

AK35

VSS[84]

AK38

VSS[85]

AK43

VSS[86]

AK46

VSS[87]

AK49

VSS[88]

AK5

VSS[89]

AK8

VSS[90]

AL2

VSS[91]

AL52

VSS[92]

AM11

VSS[93]

BB44

VSS[94]

AD24

VSS[95]

AM20

VSS[96]

AM22

VSS[97]

AM24

VSS[98]

AM26

VSS[99]

AM28

VSS[100]

BA42

VSS[101]

AM30

VSS[102]

AM31

VSS[103]

AM32

VSS[104]

AM34

VSS[105]

AM35

VSS[106]

AM38

VSS[107]

AM39

VSS[108]

AM42

VSS[109]

AU20

VSS[110]

AM46

VSS[111]

AV22

VSS[112]

AM49

VSS[113]

AM7

VSS[114]

AA50

VSS[115]

BB10

VSS[116]

AN32

VSS[117]

AN50

VSS[118]

AN52

VSS[119]

AP12

VSS[120]

AP42

VSS[121]

AP46

VSS[122]

AP49

VSS[123]

AP5

VSS[124]

AP8

VSS[125]

AR2

VSS[126]

AR52

VSS[127]

AT11

VSS[128]

BA12

VSS[129]

AH48

VSS[130]

AT32

VSS[131]

AT36

VSS[132]

AT41

VSS[133]

AT47

VSS[134]

AT7

VSS[135]

AV12

VSS[136]

AV16

VSS[137]

AV20

VSS[138]

AV24

VSS[139]

AV30

VSS[140]

AV34

VSS[141]

AV38

VSS[142]

AV42

VSS[143]

AV46

VSS[144]

AV49

VSS[145]

AV5

VSS[146]

AV8

VSS[147]

AW14

VSS[148]

AW18

VSS[149]

AW2

VSS[150]

BF9

VSS[151]

AW32

VSS[152]

AW36

VSS[153]

AW40

VSS[154]

AW52

VSS[155]

AY11

VSS[156]

AY43

VSS[157]

REV1.0

Security Class ification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

VSS[158]

AY47

Compal Secret Data

2009/11/ 23 2010/11/ 23

3

Compal Secret Data

Deciphered Date

2

Del PCH XDP Port 1/7

2

1

Compal Electronics, Inc.

Title

Size Document Num ber Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

PCH (9/9) VSS & PCH XDP Port

PAU30 M/B LA-6392P Schematic

21 51Tuesday, September 07, 201 0

1

0.1

5

4

3

2

1

Change 1STPNL_DPST_SEL# Circuit 3/18

+LCDVDD

12

R823

200_0603_5%

61

Q61A

R826

Q61A

12

D D

PCH_ENVDD(16)

2N7002KDW_SOT363-6

100K_0402_5%

LCD POWER CIRCUIT

7/14 Chang e

12

R824

4.7K_0402_5%

2

3

Q61B

Q61B 2N7002KDW_SOT363-6

2N7002KDW_SOT363-6

5

4

R825

12

100K_0402_5%

C892

4.7U_0603_6.3V6M

+3VS

1

2

0.1U_0402_16V4Z

G

2

C894

change R823 BOM from 300_0603 to 200_0603 9/14

Change LCD POWER Circuit (Follow NAYF0) 1/8

W

=60mils

S

Q64

Q64 AO3413_SOT23-3

AO3413_SOT23-3

D

1 3

+LCDVDD

1

2

1

C893

4.7U_0805_10V4Z

2

W=60mils

1A

1

C895

0.1U_0402_16V4Z

2

+5VS

R1349

R1349 10K_0402_5%

10K_0402_5%

1 2

1STPNL_EC_PWM _SEL#

13

D

1STPNL_DPST_SEL#(33)

DPST_PWM_1

1STPNL_EC_PWM(33)

1STPNL_EC_PWM 1STPNL_DPST_SEL# 1STPNL_EC_PWM _SEL#

1STPNL_DPST_SEL#

2N7002KW_1N_SOT323-3

D

2

G

Q96

S

@

U50

2

1A 2A 1OE# 2OE#

VCC

GND

1B 2B

5 1 7

SN74CBTD3306CPW R_TSSOP8

8 3 6 4

Add PWM Select Circuit 1/8

change U50,C901 BOM structure from pop to @ 08/25

Del U28,U7,U9,U10,U29 1/7

+5VS

C901

@C901

@

0.1U_0402_16V4Z

1 2

1STPNL_PWM

12

R842

R842 10K_0402_5%

10K_0402_5%

Change C894 footprint from 0805 to 0603 3/12

change R825 value from 47k ohm to 100K ohm 7/26

c

hange C892 value from 0.047uf to 0.1uf 7/26

C C

W=60mils

+INVPWR_B+

500mA

1

C405

680P_0402_50V7K

2

KB_SW(33)

R1364 1K_0402_5%R1364 1K_0402_5%

SM010014520 3000ma 220ohm@100mhz DCR 0.04

L21

FBMA-L11-201209-221LMA30T_0805

1

C406

0.1U_0402_25V6

2

Change C406 from 68pf to 0.1uf 3/12

1 2

Del L22 2/1

+3VALW

R1363

R1363 10K_0402_5%

10K_0402_5%

1 2

12

KB_SW_R

B+

PESD5V2S2UT_SOT23-3

2

3

1

D63

USB20_CMOS_P8

+3VS

Move R1364,R1363,D63 from JSW1 to JLVDS1 08/26

LCD/LED PANEL Conn.

B B

Del JLVDS1 08/30

A A

PCH_LCD_CLK PCH_LCD_DATA 1STPNL_PWM DISPOFF#

KB_SW_R

PCH_TXOUT0PCH_TXOUT0+

PCH_TXOUT1PCH_TXOUT1+

PCH_TXOUT2PCH_TXOUT2+

PCH_TXCLKPCH_TXCLK+

USB20_CMOS_N8 USB20_CMOS_P8

W=60mils

+INVPWR_B+

W=60mils

+LCDVDD

+3VS

PCH_LCD_CLK (16) PCH_LCD_DATA (16)

PCH_TXOUT0- (16) PCH_TXOUT0+ (16)

PCH_TXOUT1- (16) PCH_TXOUT1+ (16)

PCH_TXOUT2- (16) PCH_TXOUT2+ (16)

PCH_TXCLK- (16) PCH_TXCLK+ (16)

+3VS

RF Recommand

Del R1350,R154 08/25 Del COLOR_ENG_EN and LOCAL_DIM

VBIOS PWM SETTING CHANGE TO INVERT

DPST_PWM(16)

6

CH3

5

Vp

4

CH4

CM1293-04SO_SOT23-6

@

DPST_PWM

D1

CH2

Vn

CH1

Del C1.C2.C5 3/12

+3VS

1

C3

0.1U_0402_16V4Z

2

1STPNL_PWM

R120 _0402_5% R120_0402_5%

12

3

@

2

WCM-2012-900T_0805

4

1

2

L1

12

R110 _0402_5%

Change JLVDS1 Singal netname 1/7

Add R1350 3/18

DISPOFF#

Move R154 From PCH side to JLVDS side 3/18

5

R20_0402_5% R20_0402_5%

12

R110K_04 02_5% R110K _0402_5%

12

4

2009/09/08 change P/N to SA741140100

USB20_CMOS_N8

3

2

1

+LCDVDD

1

C4

2

0.1U_0402_16V4Z

1 2

C6 220P_0402_50V 7K C6 220P_0402_50V7K

USB20_N8

4

USB20_P8

1

BKOFF# (33)

R980 22_0402_5%R980 22_0402_5%

+3VS

1

5

P

NC

A2Y

G

U8

3

74AHC1G14GW_SOT3535

4

1 2

Del R477 1/7

R981 22_0402_5%R981 22_0402_5%

1 2

DPST_PWM_1

Del R476.R467.R477 1/7

Add R980.R981 1/14

Del R466 3/4

W=60mils W=60mils

+3VS

PCH_LCD_CLK PCH_LCD_DATA

1STPNL_PWM DISPOFF#

1

C9

2

10U_0603_6.3V6MC910U_0603_6.3V6M

+3VS

1

C1323

0.1U_0402_16V4Z

2

+3VS

USB20_CMOS_N8 USB20_CMOS_P8

KB_SW_R

4/1 add for RF

5/4 PCH_LCD_CLK& PCH_LCD_DATA

+3VS

Pull high 2.2K change to 4.7K

USB20_N8 (17)

USB20_P8 (17)

R748 2.2K_0402_5%R748 2.2K_0402_5% R747 2.2K_0402_5%R747 2.2K_0402_5%

Change netname From USB20_N8 to USB20_N3 1/8

Change netname From USB20_P8 to USB20_P3 1/8

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

add JLVDS3 08/26

modify JLVDS3 pin define 08/27

1STPNL_EC_PWM 1STPNL_PW M

Add R1517 08/24

DPST_PWM_2 (23)

JLVDS3

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30

GND

CONN@

GND

1

3

5

7

9

11

13

15

17

19

21

23

25

27

29

31

PCH_TXOUT0PCH_TXOUT0+

PCH_TXOUT1PCH_TXOUT1+

PCH_TXOUT2PCH_TXOUT2+

PCH_TXCLKPCH_TXCLK+

PCH_LCD_CLK PCH_LCD_DATA

Compal Secret Data

Deciphered Date

2 4 6

8 10 12 14 16 18 20 22 24 26 28 30

32

ACES_87242-3001-09

1 2 1 2

2009/11/23 2010/11/23

R15170 _0402_5% R15170_0402_5%

12

Brightness control

Intel DPST

PCH

+LCDVDD+INVPWR_B+

PWM1

EC

PWM2

GPIO SEL

Del UMA Only ,Switchable ,DIS Only Circuit 1/7

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

MUX (3306)

Compal Electronics, Inc.

LVDS Connector

PAU30 M/B LA-6392P Schematic

LCD CONN

KB CONN

0.1

22 51Monday, November 22, 2010

1

22 51Monday, November 22, 2010

0.1

5

D D

4

+3VS

3

U61

12

C1012

1U_0402_6.3V6K

2

IN

APL5508-25DC-TRL_SOT89-3

GND

3

OUT

1

2

130mA

12

C1013

4.7U_0805_6.3V6K

12

@R1050

@

+2.5VS_CH

R1050 150_1206_5%

150_1206_5%

1

Change 2NDPNL_DPST_SEL# Circuit 3/18

2

G

Q97

G

Q97

+5VS

R1351

R1351 10K_0402_5%

10K_0402_5%

1 2

2NDPNL_EC_PWM _SEL#

13

D

S

C C

Brightness control

2NDPNL_DPST_SEL#

2N7002KW_1N_SOT323-3

PCH

Intel DPST

MUX (3306)

2NDPNL_DPST_SEL#(33)

LCD CONN

change U63,C1015 BOM structure from pop to @ 08/25

+5VS

C1015

@C1015

@

0.1U_0402_16V4Z

@

U63

DPST_PWM_2(22)

PWM1

B B

EC

PWM2

MUX (3306)

KB C

ONN

DPST_PWM_2 2NDPNL_EC_PWM 2NDPNL_DPST_SEL# 2NDPNL_EC_PWM _SEL#

U63

2

1A 2A 1OE# 2OE#

VCC

GND

1B 2B

5 1 7

SN74CBTD3306CPW R_TSSOP8

0.1U_0402_16V4Z

1 2

8 3 6 4

12

R1051

R1051 10K_0402_5%

10K_0402_5%

2NDPNL_PWM (24)2NDPNL_EC_PWM(33)

GPIO SEL

2NDPNL_EC_PWM 2NDPNL_PWM

Add R1518 08/24

R15180 _0402_5% R15180_0402_5%

12

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008/10/20 2008/10/20

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet

Compal Electronics, Inc.

CH7308 SDVO to LVDS

PAU30 M/B LA-6392P Schematic

23 51Monday, November 22, 2010

1

1.0

of

5

+3VS

L62

1 2

BLM18PG181SN1D_2P

+AVDD_PLL

0.1U_0402_16V4Z

close to U64 pi n3

L63

D D

1 2

0_0603_5%

+LVDD1

0.1U_0402_16V4Z

C1016

28.6mA

C1022

11mA

1

2

0.1U_0402_16V4Z

1

2

close to U64 pi n38 and pin44

L64

1 2

0_0603_5%

change L63,L64,L68 footprint name t

o R_0603 08/24

+2.5VS_CH

L65

1 2

BLM18PG181SN1D_2P

C C

L68

1 2

0_0603_5%

Change Netname From PLT_RST# to PLT_RST_BUF# 3/2

3.8mA

+LVDD2

0.1U_0402_16V4Z

+AVDD

0.1U_0402_16V4Z

close to U64 pi n56 and pin62

+DVDD

0.1U_0402_16V4Z

1

C1020

2

close to U64 pi n19 and pin25

51.4mA

1

C1030

2

0.1U_0402_16V4Z

80.2mA

0.1U_0402_16V4Z

1

C1036

2

close to U64 pi n16 and pin49

add Q83 and R1170 02/24

1

C1017

C1017 10U_0805_10V4Z

10U_0805_10V4Z

2

R1060.R1061 Change BOM Structure From POP to @ 2/23

1

C1023

C1019

2

10U_0805_10V4Z

1

C1024

2

0.1U_0402_16V4Z

1

C1031

2

1

C1037

2

1

C1025

10U_0805_10V4Z

2

1

C1032

2

1

C1038

10U_0805_10V4Z

2

PLT_RST_BUF#(17,28,29,31,33)

SDVOB_STALL+(16) SDVOB_STALL-(16)

1

C1033

10U_0805_10V4Z

2

SDVOB_SCLK(16)

SDVOB_SDATA(16)

change R1065 BOM from 300_0603 to 200_0603 9/14

change SOT363-6 to SOT323-3 02/24

+2ND_PAL_LCDVDD

12

R1065

B B

2ND_PANEL_ENAVDD

change neme from RTD_PANEL_ON to 2ND_PANEL_ENAVDD 02/24

A A

R1065

200_0603_5%

BSS138W-7-F_SOT323

13

D

S

12

LCD POWER CIRCUIT

12

R1066

4.7K_0402_5%

2N7002KW_1N_SOT323-3

2

G

Q84

13

D

2

G

Q85

S

R1330

10K_0402_5%

S

6/8 change Q85 to BSS138

change R1067 value from 47k ohm to 100K ohm 7/26

change C1043 value from 0.047uf to 0.1uf 7/26

5

7/14 Change

R1067

100K_0402_5%

C1043

12

4.7U_0805_10V4Z

1

2

0.1U_0402_16V4Z

4

+3VS

G

@

R1060

10K_0402_5%

R1061

100K_0402_5%

Q82A

@

S

2N7002KW_1N_SOT323-3

EC_2NDPNL_BKLT_EN(33)

+2.5VS_CH

12

add R1168 02/24

12

@

SDVOB_R+(16) SDVOB_R-(16)

SDVOB_G+(16) SDVOB_G-(16)

SDVOB_B+(16) SDVOB_B-(16)

SDVOB_CLK+(16) SDVOB_CLK-(16)

+3VS

2

6 1

12

R1166 0_0402_5%@R1166 0_0402_5%@

+3VS

5

Q82B

3

4

12

R1167 0_0402_5%@R1167 0_0402_5%@

2NDPNL_BKLT_EN_CH 2NDPNL_BKLT_EN

2N7002KDW_SOT363-6

Change From +3VS to +3VALW 2/26

+3VS

W=60mils

1

C1044

4.7U_0805_10V4Z

2

S

G

Q74

2

AO3413_SOT23-3

D

1 3

+2ND_PAL_LCDVDD

W=60mils

1A

1

C1045

1

C1046

0.1U_0402_16V4Z

2

4

12

R1170

4.7K_0402_5%

2

Q83

@

13

D

R1168

PLT_RST_R#

12

0_0402_5%

1 2

C10210.1U_0402_16V4Z C10210.1U_0402_16V4Z

1 2

C10290.1U_0402_16V4Z C10290.1U_0402_16V4Z

1 2

SDVOB_CH_SCLK

SDVOB_CH_SDATA

Add Q82.R1166.R1167 2/9

R1056

12

0_0402_5%

U64

+AVDD_PLL

+DVDD

2NDPNL_BKLT_EN_CH 2ND_PANEL_ENAVDD

SDVOB_CH_SCLK SDVOB_CH_SDATA

SD_PROM SC_PROM

2NDPAL_I2CC_SDA 2NDPAL_I2CC_SCL

CH7308_CLK_XTAL_IN CH7308_CLK_XTAL_OUT

R10622.4K_0402_1% R10622.4K_0402_1%

SDVOB_STALL_C+ SDVOB_STALL_C-

SDVOB_R+ SDVOB_R-

SDVOB_G+ SDVOB_G-

SDVOB_B+ SDVOB_B-

SDVOB_CLK+ SDVOB_CLK-

U64

3

AVDD_PLL

16

DVDD

49

DVDD

1

ENAVBKL

2

ENAVDD

4

RESET#

5

AS

6

SPC

7

SPD

9

SD_PROM

10

SC_PROM

11

SD_DDC

12

SC_DDC

14

XI

15

XO

VSWING

32

VSWING

47

SDVO_STALL+

48

SDVO_STALL-

51

SDVO_R+

52

SDVO_R-

54

SDVO_G+

55

SDVO_G-

57

SDVO_B+

58

SDVO_B-

60

SDVO_CLK+

61

SDVO_CLK-

8

AGND_PLL

13

DGND

31

DGND

53

AGND

59

AGND

CH7308B-TF_LQFP64_10X10

C1041

20P_0402_50V8

14.318MHZ_20PF_7A14300003

20P_0402_50V8

C1042

change Crystal CL from 16p to 20p 7/29 (sourcer suggestion)

4/13 ESD add D62 D62 from SC10T24C000 change to SCA00000R00 6/28

add C1471 (ESD request) 7/22

Security Classification

THIS SHEET OF ENGINEERING DR AWING IS THE PR OPRIETARY PROPER TY OF COMPAL ELECT RONICS, INC. AND CONTAINS CON FIDENTIAL

THIS SHEET OF ENGINEERING DR AWING IS THE PR OPRIETARY PROPER TY OF COMPAL ELECT RONICS, INC. AND CONTAINS CON FIDENTIAL AND TRAD E SECRET INFOR MATION. THIS SHEET M AY NOT BE TRANSF ERED FROM T HE CUSTODY OF THE COMPETEN T DIVISION OF R&D

AND TRAD E SECRET INFOR MATION. THIS SHEET M AY NOT BE TRANSF ERED FROM T HE CUSTODY OF THE COMPETEN T DIVISION OF R&D

AND TRAD E SECRET INFOR MATION. THIS SHEET M AY NOT BE TRANSF ERED FROM T HE CUSTODY OF THE COMPETEN T DIVISION OF R&D DEPARTMEN T EXCEPT AS AUT HORIZED BY COMPA L ELECTRONICS, INC . NEITHER THIS SH EET NOR THE INF ORMATION IT CONT AINS

DEPARTMEN T EXCEPT AS AUT HORIZED BY COMPA L ELECTRONICS, INC . NEITHER THIS SH EET NOR THE INF ORMATION IT CONT AINS

DEPARTMEN T EXCEPT AS AUT HORIZED BY COMPA L ELECTRONICS, INC . NEITHER THIS SH EET NOR THE INF ORMATION IT CONT AINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, IN C.

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, IN C.

3

1 2

12

Y5

12

Issued Date

3

100K_0402_5%

R1390

100K_0402_5%

CH7308_CLK_XTAL_IN

12

CH7308_CLK_XTAL_OUT

ON/OFFBTN#PWR_LED#

2

3

D62

D62 PSOT24C_SOT23-3

PSOT24C_SOT23-3

1

2

SDVOB_CH_SCLK

12

R1389

SDVOB_CH_SDATA

4/1 add R1389, R1390

C1464

1

2

+3VS

1 2 3 4

S IC EE 16K CAT24C16WI-GT3 SOIC 8P

C1467

C1466

C1465

1

2

10P_0402_50V8C

19

LVDD

25

LVDD

38

LVDD2

44

LVDD2

56

AVDD

62

AVDD

17

LL2C

18

LL2C#

29

LDC4

30

LDC4#

26

LDC5

27

LDC5#

23

LDC6

24

LDC6#

20

LDC7

21

LDC7#

[Channel 2]

36

LL1C

37

LL1C#

45

LDC0

46

LDC0#

42

LDC1

43

LDC1#

39

LDC2

40

LDC2#

33

LDC3

34

LDC3#

[Channel 1]

50

TEST

63

BSCAN

64

RESERVED

22

LGND

28

LGND

35

LGND

41

LGND

2NDPNL_BL_EN_CH2.5V (33)

+LVDD2

+LVDD1

+AVDD

CH_TXOC+ CH_TXOC-

CH_TXO0+ CH_TXO0CH_TXO1+ CH_TXO1CH_TXO2+ CH_TXO2-

C1462

C1463

1

2

10P_0402_50V8C

6/17 RF add

hange BOM Structure from un-stuff to stuff 7/26

c

+3VS+3VS

12

R1063

5.6K_0402_5%

Add net:COLOR_ENG_EN and LOCAL_DIM 3/16

Del R1352.R1353 Del COLOR_ENG_EN and LOCAL_DIM 8/25

1

C1471

C1471 100P_0402_50V8J

100P_0402_50V8J

2

@

PWR_LED#(34)

R1064

5.6K_0402_5%

1

C1315

0.1U_0402_16V4Z

2

ON/OFFBTN#(35)

+2ND_PAL_INVPWR_B+

+5VALW

Modify JLVDS4 pindefine 08/27

+3VS

2NDPAL_I2CC_SCL 2NDPAL_I2CC_SDA

2NDPNL_PWM 2NDPNL_BKLT_EN

+5VALW

Compal Secret Data

2008/10/20 2008/10/20

Compal Secret Data

Deciphered Date

2

C1018 0.1U_0402_16V4Z

U65

A0

VCC

A1

WP

SCL

A2

SDA

GND

AT24C16BN-SH-T_SO8@

C1469

C1468

1

2

10P_0402_50V8C

2NDPNL_PWM

2NDPNL_BKLT_EN

+2ND_PAL_LCDVDD

+3VS

2NDPNL_PWM(23)

Add JLVDS4 08/26

ON/OFFBTN# PWR_LED#

1

R10545.6K_0402_5% R10545.6K_0402_5%

12

+2.5VS_CH

R10555.6K_0402_5% R10555.6K_0402_5%

12

+2.5VS_CH

@

1 2

8

WP

R1058 0_0402_5%@ R1058 0_0402_5%@

7 6 5

10U_0805_10V4Z

W=60mils

C1034

680P_0402_50V7K

1 2

C1039 220P_0402_50V7K C1039 220P_0402_50V7K

1 2

C1040 220P_0402_50V7K

@

12

+2ND_PAL_LCDVDD

1

C1026

2

0.1U_0402_16V4Z

+2ND_PAL_INVPWR_B+

500mA

1

2

+3VS +3VS

12

R1057

5.6K_0402_5%

@

SC_PROM SD_PROM

4/9 RF add, need report

1

C1027

@

1

2

@

C1336

C1336 22P_0402_50V8J

22P_0402_50V8J

2

L66

FBMA-L11-201209-221LMA30T_0805

C1035

C1035 68P_0402_50V8J

68P_0402_50V8J

Del L67 2/26

RF Recommand

R1059

5.6K_0402_5%

@

12

4/7 connect JLVDS2 pin27 to GND

W=60mils

2NDPAL_I2CC_SCL 2NDPAL_I2CC_SDA 2NDPNL_PWM 2NDPNL_BKLT_EN

CH_TXO0CH_TXO0+

CH_TXO1CH_TXO1+

CH_TXO2CH_TXO2+

CH_TXOCCH_TXOC+

JLVDS4

2

112

4

334

6

556

8

778

10

9910

12

111112

14

131314

16

15

16

18

171718

20

19

20

22

212122

24

232324

26

252526

28

272728

30

292930

32

GND31GND

ACES_87242-3001-09

CONN@

Title

Size Document Number Rev

Custom

Date: Sheet of

Del JLVDS2 08/30

+2ND_PAL_LCDVDD+2ND_PAL_INVPWR_B+

CH_TXO0CH_TXO0+

CH_TXO1CH_TXO1+

15

CH_TXO2-

19

CH_TXO2+

CH_TXOCCH_TXOC+

Compal Electronics, Inc.

7308 SDVO to LVDS

PAU30 M/B LA-6392P Schematic

24 51Monday, November 22, 2010

1

B+

1.0

A

CRT Connector

Change L30,L32,L34 from SM01000HJ00 to SHI0000A800

hange L30,L32,L34 P/N form SM01000HI00 to SM01000HJ00(bead 60 ohm) 9/9

C

1 1

PCH_CRT_R(16)

PCH_CRT_G(16)

PCH_CRT_B(16)

2 2

3 3

PCH_CRT_R

PCH_CRT_HSYNC(16)

Del L77.L78.L79.C571.C564.C561 3/4 NV DG RGB recommended one pi filter

PCH_CRT_G

R533 150_0402_1% R533 150_0402_1%

R541 150_0402_1% R541 150_0402_1%

12

C256 0.1U_0402_16V4Z

1 2

B

R527 150_0402_1% R527 150_0402_1%

12

PCH_CRT_HSYNC

PCH_CRT_VSYNC(16)

C

11/01

Change from Inductor to Bead 60 ohm 7/26

1 2

L34 FCM1608K F-600T05_0603L34 FCM1608KF-600T05_0603

1 2

L32 FCM1608K F-600T05_0603L32 FCM1608KF-600T05_0603

1 2

L30 FCM1608K F-600T05_0603L30 FCM1608KF-600T05_0603

C567

10P_0402_50V8J

1

C563

C563 10P_0402_50V8J

10P_0402_50V8J

2

1

2

C559

C559 10P_0402_50V8J

10P_0402_50V8J

2

Change BOM Structure from un-pop to pop 7/26

Change BOM Structure from POP to @ 9/9

SM010012010 300ma 120ohm@100mhz DCR 0.4

+CRT_VCC

5

1

U13

P

4

OE#

A2Y

G

74AHCT1G125GW_SOT353-5

3

C265 0.1U_0402_16V4Z

1 2

PCH_CRT_VSYNC

+CRT_VCC

A2Y

R138 10K_0402_5% R138 10K _0402_5%

5

P

G

3

12

CRT_HSYNC_1

1

U12

CRT_VSYNC_1

4

OE#

74AHCT1G125GW_SOT353-5

5/24 Change CRT connet to PCH

D

Change ESD protect circuit (follow NAV50) 3/12

Close to CRT CONN for ESD.

2

3

D53

1

PJDLC05C_SOT23-3

1

C570

@C570

@

10P_0402_50V8J

C565

@C565

@

10P_0402_50V8J

2

L11 22_0402_5%L11 22_0402_5%

1 2

L10 22_0402_5%L10 22_0402_5%

1 2

PCH_CRT_DATA(16)

PCH_CRT_CLK(16)

1

2

CRT_R_2

CRT_G_2

CRT_B_2PCH_CRT_B

1

C562

@C562

@

10P_0402_50V8J

2

C262

10P_0402_50V8J

+5VS

2

3

D54

CH491DPT_SOT23-3

1

PJDLC05C_SOT23-3

CRT_HSYNC_2

CRT_VSYNC_2

1

C253

C253 10P_0402_50V8J

10P_0402_50V8J

2

PCH_CRT_DATA DSUB_12

PCH_CRT_CLK

W=40mils

+R_CRT_VCC

D64

2 1

1

2

+3VS

2

5

Q92A

Q92A 2N7002KDW_SOT363-6

2N7002KDW_SOT363-6

3

4

Q92B

Q92B 2N7002KDW_SOT363-6

2N7002KDW_SOT363-6

E

5/26 change to fuse

+CRT_VCC

F1

1.1A_6VDC_FUSE

0.1U_0402_16V4Z

C246

100P_0402_50V8J

1

2

C264

68P_0402_50V8J

C258

T57PAD@T57PAD

21

@

1

2

W=30mils

1

2

CRT_11

DSUB_12

DSUB_15

C241

C241 68P_0402_50V8J

68P_0402_50V8J

JCRT1

6

11

1 7

12

2 8

13

3 9

14

G

4

G

10 15

5

SUYIN_070546HR015M22JZR

3/22 add R1359, update net CRT_DET#

+CRT_VCC

12

R151

R130

4.7K_0402_5%

61

R151

4.7K_0402_5%

DSUB_15

16 17

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2009/11/23 2010/11/23

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

CRT Connector

PAU30 M/B LA-6392P Schematic

E

of

25 51Monday, November 22, 2010

0.1

5

+5VALW

U105

3

VIN

VOUT

12

5

R425

510K_0402_5%

34

4

VIN/CE

VOUT

2

GND

RT9701-PB_SOT23-5

@

+HDMI_5V_OUT_GATE

12

61

Q99A

Q99A 2N7002KDWH_SOT363-6

2N7002KDWH_SOT363-6

2

Q99B

Q99B 2N7002KDWH_SOT363-6

2N7002KDWH_SOT363-6

Connection to 3.4K external resistor.

SUSP#(33,35,39)

+5VS

D D

12

R1360

10K_0402_5%

+VSB

3/25 add R1360, Q99, R1365

R1365

47K_0402_5%

change R1365 value from 10K to 47K ohm 7/27

C C

B B

5/26 add RT9701 for HDMI VCC

1 5

Q98

Q98 SI3456BDV-T1-E3_TSOP6

SI3456BDV-T1-E3_TSOP6

D

S

6

4 5

2 1

G

3

1

C1310

0.1U_0603_25V7K

2

W=40mils

F2

21

1.1A_6VDC_FUSE

0.1U_0402_16V4Z

Change +5VS to +HDMI_5V_OUT Circuit 3/18

6/3 temprately restore Q99

Vendor Recommand : CFG SETTING 000

change R238,R629,R232 BOM structure from pop to @ 9/9

R237 2.2K_0402_5%@R237 2.2K_0402_5%@

+3VS

R628 2.2K_0402_5%@R628 2.2K_0402_5%@ R238 2.2K_0402_5%@R238 2.2K_0402_5%@ R629 2.2K_0402_5%@R629 2.2K_0402_5%@

R236 3.3K_0402_5%R236 3.3K_0402_5%

R631 2.2K_0402_5%R631 2.2K_0402_5%

+3VS

DDPC_SDATA(16)

DDPC_SCLK(16)

0 0

0 1 1 1 1

PCH_DPC_HPD(16)

R234 from 100ohm change to 100K 6/28

R632 2.2K_0402_5%R632 2.2K_0402_5%

R233 2.2K_0402_5%@R233 2.2K_0402_5%@

+3VS

R232 2.2K_0402_5%@R232 2.2K_0402_5%@

SwingCG0 CG1

0

0 0

11 1

+3VS

CG2

Pre-amp

450

0

420

110

450

0100 1

460 340

1

400

0

400 420

R630 10K_0402_5%@R630 10K_0402_5%@

1 2

R235 0_0402_5%R235 0_0402_5%

1 2

R234 100K_0402_5%R234 100K_0402_5%

+HDMI_5V_OUT

C295

1 2 1 2 1 2 1 2

1 2

1 2 1 2

0 0 0 0 0 2db 2db

0

1

2

Slew-rate

0

-3db

-4db 0 0 0

0

HPD_SOURCE

4

(default)

+3VS

CG_0 CG_1

REXT

HPD_SOURCE

DDPC_SDATA

DDPC_SCLK

CG_2

HDMI_TX2+ HDMI_TX2-

HDMI_TX1+ HDMI_TX1-

HDMI_CLK+ HDMI_CLK-

HDMI_TX0+ HDMI_TX0-

2N7002KW_1N_SOT323-3

U32

2

VCC3V

11

VCC3V

15

VCC3V

21

VCC3V

26

VCC3V

33

VCC3V

40

VCC3V

46

VCC3V

3

CG_0

4

CG_1

6

REXT

7

HPD#

8

SDA

9

SCL

10

CG_2

13

OUT_D4+

14

OUT_D4-

16

OUT_D3+

17

OUT_D3-

19

OUT_D2+

20

OUT_D2-

22

OUT_D1+

23

OUT_D1-

1

GND

5

GND

12

GND

18

GND

24

GND

27

GND

31

GND

36

GND

37

GND

43

GND

ASM1442 PN: SA00003GT00

3

+3VS

12

R831

10K_0402_5%

HDMI_HPD_INT#

Change HPD Circuit 1/8

R832 Change From 10k to 0 3/4

C896 Change From 0.1u to 220P 3/4

ASM1442T_QFN48_7X7

10K_0402_5%

2009/04/30 add C101 & R145

13

D

Q65

S

2

G

220P_0402_50V7K

HDMI_HPD_R

1

C896

2

SCL_SINK

SDA_SINK

HPD_SINK

DDC_EN

EQ_0 EQ_1

IN_D4+

IN_D4-

IN_D3+

IN_D3-

IN_D2+

IN_D2-

IN_D1+

IN_D1-

OE#

GND

1 2

R832 0_0402_5%

12

R833

100K_0402_5%

HDMI_HPD_INT#

25

HDMI_SCLK

28

HDMI_SDATA

29

HDMI_HPD

30

R562 2.2K_0402_5%R562 2.2K_0402_5%

1 2

32

EQ_S0

34

EQ_S1

35

1

48 47

45 44

42 41

39 38

49

HDMI_HPD

EqualizationEQ0 EQ1

0 110 01

PCH_TMDS_CK PCH_TMDS_CK#

+HDMI_5V_OUT

HDMI_HPD

HDMI_SDATA HDMI_SCLK

HDMI_R_CK-

HDMI_R_CK+ HDMI_R_D0-

HDMI_R_D0+ HDMI_R_D1-

HDMI_R_D1+ HDMI_R_D2-

HDMI_R_D2+

4/13 change HDMI footprint

@

1 2

R568 0_0402_5%

change R561,R557 BOM structure from pop to @ 9/9

+3VS

R561 2.2K_0402_5%@R 561 2.2K_0402_5%@

1 2

R557 2.2K_0402_5%@R 557 2.2K_0402_5%@

1 2

R560 2.2K_0402_5%@R 560 2.2K_0402_5%@

1 2

R556 2.2K_0402_5%@R 556 2.2K_0402_5%@

1 2

12dB0

9dB 6dB 3dB

(default)

PCH_TMDS_D2 (16) PCH_TMDS_D2# (16)

PCH_TMDS_D1 (16) PCH_TMDS_D1# (16)

PCH_TMDS_CK (16) PCH_TMDS_CK# (16)

PCH_TMDS_D0 (16) PCH_TMDS_D0# (16)

R464 2.2K_0402_5%@R464 2.2K_0402_5%@

1 2

R751 2.2K_0402_5%R751 2.2K_0402_5%

1 2

2

HDMI connector

JHDMI1

19

HP_DET

18

+5V

17

DDC/CEC_GND

16

SDA

15

SCL

14

Reserved

13

CEC

12

CK-

11 10

G1

CK_shield

G2

CK+

G3

9

D0-

G4

8

D0_shield

7

D0+

6

D1-

5

D1_shield

4

D1+

3

D2-

2

D2_shield

1

D2+

SUYIN_100042GR019M23DZL

CONN@

+3VS

20 21 22 23

SM070001310 400ma 90ohm@100mhz DCR 0.3

HDMI_CLK- H DMI_R_CK-

L37

L37 WCM-2012-900T_0805

WCM-2012-900T_0805

@

HDMI_CLK+

HDMI_TX0- HDMI_R_D0-

L36

L36 WCM-2012-900T_0805

WCM-2012-900T_0805

@

HDMI_TX0+

HDMI_TX1- HDMI_R_D1-

L38

L38 WCM-2012-900T_0805

WCM-2012-900T_0805

@

HDMI_TX1+

HDMI_TX2- HDMI_R_D2-

L39

L39 WCM-2012-900T_0805

WCM-2012-900T_0805

@

HDMI_TX2+

R583 0_0402_5% R583 0_0402_5%

1 2

1

4

1 2

1

4

1 2

1

4

1 2

1

4

1 2

2

3

2

3

2

3

2

3

4

R585 0_0402_5% R585 0_0402_5%

R579 0_0402_5% R579 0_0402_5%

1

4

R581 0_0402_5% R581 0_0402_5%

R588 0_0402_5%

1

4

R591 0_0402_5% R591 0_0402_5%

R615 0_0402_5% R615 0_0402_5%

1

4

R617 0_0402_5% R617 0_0402_5%

6/3 swap for layout

1

2

3

HDMI_R_CK+

2

3

HDMI_R_D0+

2

3

HDMI_R_D1+

2

3

HDMI_R_D2+

+HDMI_5V_OUT

5/24 DEL HDMI from VGA

+3VS

0.1U_0402_16V4Z

1

C607

C592

12

R171

4.7K_0402_5%

HDMI_SCLK

A A

5

HDMI_SDATA

12

R172

4.7K_0402_5%

4

C592

2

0.1U_0402_16V4Z

2

1

C600

2

0.1U_0402_16V4Z

1

C331

2

0.1U_0402_16V4Z

1

C591

C608

2

0.1U_0402_16V4Z

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

3

C602

2

0.1U_0402_16V4Z

1

2

Compal Secret Data

2009/11/23 2010/11/23

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

C

Date: Sheet

Date: Sheet of

Compal Electronics, Inc.

HDMI Conn

PAU30 M/B LA-6392P Schematic

1

of

26 51Monday, November 22, 2010

0.1

5

4

3

2

1

CL 4.0 mm

D D

SATA_PTX_DRX_P0(13) SATA_PTX_DRX_N0(13)

SATA_DTX_C_PRX_N0(13) SATA_DTX_C_PRX_P0(13)

SATA_PTX_DRX_P0 SATA_PTX_DRX_N0

SATA_DTX_C_PRX_N0 SATA_DTX_C_PRX_P0

700mA

R673 0_0805_5% R673 0_0805_5%

+5VS

C C

1 2

C663 0.01U_0402_16V7K C663 0.01U_0402_16V7K

1 2

C661 0.01U_0402_16V7K C661 0.01U_0402_16V7K

1 2

C659 0.01U_0402_16V7K C659 0.01U_0402_16V7K

1 2

C656 0.01U_0402_16V7K C656 0.01U_0402_16V7K

1 2

10U_0805_10V4Z

1

C627

2

+3VS

100mils

1

C618

2

1U_0402_6.3V4Z

1

2

C647

+3VS

0.1U_0402_16V4Z

+5VS_HDD1

0.1U_0402_16V4Z

1

C619

2

1000P_0402_50V7K

SATA_PTX_C_DRX_P0 SATA_PTX_C_DRX_N0

SATA_DTX_PRX_N0 SATA_DTX_PRX_P0

C623

SATA HDD1 Conn.

JHDD1

1 2 3 4 5 6 7

8

9 10 11 12 13 14 15 16 17 18 19

1

2

20 21 22

TYCO_1775706-1

CONN@

GND A+ AGND BB+ GND

VCC3.3 VCC3.3 VCC3.3 GND GND GND VCC5 VCC5 VCC5 GND RESERVED GND VCC12 VCC12 VCC12

GND GND

23 24

6/8 change HDD symbol

change HDD symbol 8/26

B B

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/11/23 2010/11/23

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

HDD & ODD Connector

PAU30 M/B LA-6392P Schematic

1

0.1

27 51Monday, November 22, 2010

0.1

A

+3VS +3VS_W LAN

12

R680 0_1206_5%

60mil

B

C

D

E

For Wireless LAN (Half Card)

+3VS_W LAN+3VS_W LAN +1.5VS

1

C393

4.7U_080 5_10V4Z

1 1

2

Del R285 08/27

MINI1_CLKREQ #(14)

PCIE_DTX_ C_PRX_N2(14) PCIE_DTX_ C_PRX_P2(14)

PCIE_PTX_ C_DRX_N2(14)

PCIE_PTX_ C_DRX_P2(14)

2 2

E51TXD_ P80DATA(33 )

E51RXD_ P80CLK(33)

Del R208 08/27

CLK_PCIE_ MINI1#(14)

CLK_PCIE_ MINI1(14)

+3VS_W LAN

R1372 0_0402_ 5% R1372 0_0402_ 5% R1373 0_0402_ 5% R1373 0_0402_ 5%

1 2 1 2

3/26 add

1

2

R1374

100K_04 02_5%

C392

0.1U_040 2_16V4Z

(WLAN_BT_DA TA) (WLAN_BT_CL K)

12

1

C654

4.7U_080 5_10V4Z

2

JMINI2

1 3 5 7

9 11 13 15

17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51

53 54

CONN@

1

C657

0.1U_040 2_16V4Z

2

1 3 5 7 9 11 13 15

17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51

GND GND

P-TWO _A54402-A0G16 -N

2

4

6

8

10

12

14

16

18

20

22

24

26

28

30

32

34

36

38

40

42

44

46

48

50

52

4 mm High

1

C655

0.1U_040 2_16V4Z

2

(WWAN_LED#) (MLAN_LED#)

WL_O FF# PLT_RST _BUF#

MINI_SMBCLK MINI_SMBDATA

R687 0_04 02_5% R687 0_0402_5 %

1 2

+3VS_W LAN

1

C653

0.1U_040 2_16V4Z

2

+3VS_W LAN

+1.5VS

Del +3VALW and R684 1/8

Change Netname From +3VS to +3VS_WLAN 1/12

Del R685 1/14

WL_O FF# (33) PLT_RST _BUF# (17,24,2 9,31,33)

@R672

@ @

@

USB20_N 4 (17) USB20_P 4 (1 7)

+3VS_W LAN

D_CK_SC LK (10,1 1,12,14,38) D_CK_SD ATA (10,11,1 2,14,38)

R672

R669 0_0402 _5%

MINI1_LED#

(9~16mA)

12

R284

R284 100K_04 02_5%

100K_04 02_5%

0_0402_ 5%

1 2 1 2

Power

+3VS

+3V

+1.5VS

Mini Card Power Rating

Primary Power (mA)

Peak Normal

1000

330

500

750

250

375

For SIMM CARD

6/4 SWAP for layout

D17

@D17

@

CM1293-0 4SO_SOT23-6

1

CH1

2

Vn

UIM_CLK

3

CH2

Auxiliary Power (mA)

Normal

250 (wake enable)

5 (Not wake enable)

UIM_VPPUIM_DATA

4

CH4

5

Vp

CH3

+UIM_PW R

UIM_RST

6

Del L41.R661.R663 1/14

12

+

+3VS_FU LL

1050mA

1 2 1 2

R662 0_1206_5%

R1514 0_ 1206_5%

150U_B2 _6.3VM_R35M

PCH_PCIE_ WAKE#(1 5,29,31)

PCIE_DTX_ C_PRX_N4(14)

PCIE_DTX_ C_PRX_P4(14)

PCIE_PTX_ C_DRX_N4(14) PCIE_PTX_ C_DRX_P4(14)

C634

MINI2_CLKREQ #(14)

@

CLK_PCIE_ MINI2#(14)

CLK_PCIE_ MINI2(14)

1

2

R682 0_04 02_5% R682 0_0402_5 % R1333 0_0402_ 5% R1333 0_0402_ 5%

+3VS +3VS_FU LL

+3VALW

Peak: 2.75A Normal: 1.1A

3 3

4 4

E51TXD_ P80DATA(33 )

E51RXD_ P80CLK(33)

Add R1333 3/12

100K_04 02_5%

60mil

6/10 add R1514 for 3G

1

C667

0.1U_040 2_16V4Z

2

R701 0_04 02_5%@R7 01 0_0402_5%@

1 2

(WLAN_BT_DA TA)

R638 0_04 02_5% R638 0_0402_5 %

R683

(WLAN_BT_CL K)

1 2

E51TXD_ P80DATA1_R

E51RXD_ P80CLK_R

12

R683 Change From 10K to 100K EC recommand 3/12

A

For 3G/GPS (FULL Card)

1

C637

4.7U_080 5_10V4Z

2

11 13 15

17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51

1 3 5 7 9

JMINI1

1 3 5 7 9 11 13 15

17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51

1

C666

0.1U_040 2_16V4Z

2

2 4 6

8 10 12 14 16

18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52

G153G254G355G3

ACES_88 910-5204

56

CONN@

4 mm High

B

2 4 6 8 10 12 14 16

18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52

1

C615

0.1U_040 2_16V4Z

2

+UIM_PW R UIM_DATA UIM_CLK UIM_RST UIM_VPP

R1375

MINI_SMBCLK MINI_SMBDATA

USB20_N 9 USB20_P 9

R658 0 _0402_5%

+3VS_FU LL+3VS_FU LL +1.5VS

1

C612

0.1U_040 2_16V4Z

2

Del C709.C710.C711 3/12

Del +3VALW and R677 1/8

Change Netname From +3VS to +3VS_FULL 1/12

Del R675 1/14

PLT_RST _BUF#

MINI2_LED#

+3VS_FU LL

1 2

R657 100K_ 0402_5%

UIM_VPP UIM_DATA UIM_CLK

1

+UIM_PW R

C42922P_0402_50V8J@C42922P_0402_50V8J

2

@

+3VS_FU LL

+UIM_PW R

USB20_P 5(17)

USB20_N 5(17)WW AN_OFF# (33)

@

1 2

R329 10K_0402_ 5%

USB20_P 5 USB20_N 5

WW AN_OFF#

1 2

0_0402_ 5%

1 2

+3VS_FU LL

+1.5VS

+UIM_PW R

(9~16mA)

Security Class ification

2009/11/ 23 2010/11/ 23

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/11/ 23 2010/11/ 23

C

Compal Secret Data

Deciphered Date

Change Netname From USB20_N10_1 to USB20_N10 1/12

Change Netname From USB20_P10_1 to USB20_P10 1/12

USB20_P 9(17)

USB20_N 9(1 7)

JSIM1

4

GND

5

VPP

6

I/O

7

DET

8

D+

9

D-

TAITW_ PMPAT2-08GLBS 7N14N0

D

USB20_P 9

USB20_N 9

40mil

1

VCC

2

RST

3

CLK

10

GND

11

GND

CONN@TAITW_ PMPAT2-08GLBS 7N14N0

CONN@

Title

Size Document Num ber Rev

Custom

PAU30 M/B LA-6392P Schematic

Date: Sheet of

Date: Sheet

+UIM_PW R UIM_RST

1

C42722P_0402_50V8J@C42722P_0402_50V8J

C42822P_0402_50V8J@C42822P_0402_50V8J

2

C132456P_0402_50V8@C132456P_0402_50V8

@

Compal Electronics, Inc.

MINI CARD & SIM CARD

1

C6651U_0402_6.3V4Z C6651U_0402_6.3V4Z

2

C132556P_0402_50V8@C132556P_0402_50V8

@

28 51Monday, November 22, 20 10

E

1

C42656P_0402_50V8@C42656P_0402_50V8

C6640.1U_0402_16V4Z C6640.1U_0402_16V4Z

2

@

0.1

of

5

4

3

2

1

LAN Power Circuit & Refer NTUC0

+1.7_VDDCT

change R362 BOM structure from @ to POP 01/28

R1130 0_0603_5%R11 30 0_0603_5%

+3VALW

D D

1 2

1

C1098

2

10U_0805_10V4Z

1U_0402_6.3V4Z

1

C1099

2

0.1U_0402_16V4Z

C1100

+3V_LAN

60mil

1000P_0402_50V7K

1

C1101

2

1

2

196mA

1

C1102

10U_0805_10V4Z

2

1

C1095

C1096

2

10U_0805_10V4Z

0.1U_0402_16V4Z

1 2

L76 4.7UH_SIA4012-4R7M_20%L76 4.7UH_SIA4012 -4R7M_20%

1

Layout note : C1095,C1096,C109 7&L76 Close to Pin40

C1097

2

1000P_0402_50V7K

N Place Close to LAN chip L76 DCR< 0.15 ohm Rate current of L76 > 1A

+1.7_LX

+1.7_LX+1.7_VDDCT

ote:

Place Close to Pin 1

Del Q21,R363,C273

Refer CRB

(WOL function) 01/28

10/22 Remove R364

10/100_LINK_LED

C C

R1132

5.1K_0402_5%

1 2

U69

C1103 .1U_0402_16V7K

PCIE_DTX_C_PRX_N1(14)

PCIE_DTX_C_PRX_P1(14)

PCIE_PTX_C_DRX_N1(14)

PCIE_PTX_C_DRX_P1(14)

CLK_PCIE_LAN#(14) CLK_PCIE_LAN(14)

PLT_RST_BUF#(17,24,28,31,33)

PCH_PCIE_WAKE#(15,28,31)

change name from PCH_PCIE_WAKE#_R to EC_PME# 01/28

B B

Del R1138 2/9

LAN_CLKREQ#(14)

+3V_LAN

EC_PME#(33)

1 2

C1104 .1U_0402_16V7K

1 2

R1277 10K_040 2_5%@R1277 10K_040 2_5%@ R1243 0_0402_5%R1243 0_0402_5%

R1135 0_0402_5%R1135 0_0402_5% R1136 0_0402_5%

R1136 0_0402_5%

Add R1243 .R1277 Vendor recommend 3/1

1 2 1 2

@

+3VALW

1 2

R231 0_0402 _5% R231 0_0402_5%

12 12

R212

R212 10K_0402_5%

10K_0402_5%

1 2

PCIE_DTX_PRX_N1

PCIE_DTX_PRX_P1

CLK_PCIE_LAN# CLK_PCIE_LAN

PLT_RST_LAN#

LAN_PME#

LAN_XTALO LAN_XTALI

LAN_CLKREQ_R#

Remove R212.R231 From PCH Side 3/1

+1.1_AVDDL

1

C1111

2

C1109

0.1U_0402_16V4Z

Layout note : C1113&C1114 Close to Pin6 C1109 Close to Pin13 C1110 Close to Pin19 C1111 Close to Pin31 C1112 Close to Pin34

25MHZ_12PF_X5H025000FC1H-H

A A

Y6

1 2

1

C1127

2

15P_0402_50V8J

5

C1111

2

C1110

LAN_XTALI

LAN_XTALO

1

C1128

2

1U_0402_6.3V4Z

0.1U_0402_16V4Z

Y6 from 20 pf change to 12 pf 6/28 C1127,C1128 from 27p change to 15p 6/28

1

2

C1112

0.1U_0402_16V4Z

1

2

C1113

C1114

0.1U_0402_16V4Z

U69

29

TX_N

30

TX_P

36

RX_N

35

RX_P

32

REFCLK_N

33

REFCLK_P

2

PERST#

3

WAKE#

25

SMCLK

26

SMDATA

28

TEST_RST

27

TESTMODE

7

XTLO

8

XTLI

4

CLKREQ#

13

AVDDL

19

AVDDL

31

AVDDL

34

AVDDL

6

AVDDL_REG

41

GND

AR8151-BL1A-RL_QFN40_5X5

4

Atheros

8151-AL1A

DVDDL_REG

AVDDH_REG

P/N: SA00003LE30

38

LED_0

39

LED_1

23

LED_2

12

TRXN0

11

TRXP0

15

TRXN1

14

TRXP1

18

TRXN2

17

TRXP2

21

TRXN3

20

TRXP3

LAN_RBIAS

10

RBIAS

+3V_LAN

1

VDD33

+1.7_LX

40

LX

+1.7_VDDCT

5

VDDCT

+1.1_DVDDL

24

DVDDL

37

16

AVDDH

22

AVDDH

9

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

LAN_ACTIVITY# 10/100_LINK_LED LED2_CKR#

MIDI0MIDI0+ MIDI1MIDI1+ MIDI2MIDI2+ MIDI3MIDI3+

1 2

+3V_LAN

C1105 0.1U_ 0402_16V4Z

C1107 0.1U_ 0402_16V4Z

C1107 0.1U_ 0402_16V4Z C1108 1U _0402_6.3V4Z

C1108 1U _0402_6.3V4Z

+2.7_AVDDH

1

C1115

Issued Date

2

C1116

0.1U_0402_16V4Z

Layout note : C1115&C1116Close to Pin9 C1118 Close to Pin16 C1119 Close to Pin22

3

+1.7_LX

1 2

1 2 1 2

Near Pin37

1

2

C1118

0.1U_0402_16V4Z

no overclocking PD 5.1K

LAN_ACTIVITY# (30)

MIDI0- (30) MIDI0+ (30) MIDI1- (30) MIDI1+ (30) MIDI2- (30) MIDI2+ (30) MIDI3- (30) MIDI3+ (30)

R1137

2.37K_0402_1%

1

2

C1119

0.1U_0402_16V4Z

1U_0402_6.3V4Z

2009/10/10

+1.7_VDDCT

1

C1106

0.1U_0402_16V4Z

2

Compal Secret Data

Deciphered Date

10/22 Change R376 from mount to @

1

1/02 Change R373 from mount to @

11/02 Delete Q3(@),R375(@),R377(@)

11/09 Delete R373(@),R376(@)

MIDI0+

MIDI0-

MIDI1+

MIDI1-

MIDI2+

MIDI2-

MIDI3+

MIDI3-

2010/10/10

2

5/17 remove

Place Close to LAN chip

49.9_0402_1%

R1139

1 2

49.9_0402_1%

R1140

1 2

49.9_0402_1%

R1141

1 2

49.9_0402_1%

R1142

1 2

49.9_0402_1%

R1143

1 2

49.9_0402_1%

R1144

1 2

49.9_0402_1%

R1145

1 2

49.9_0402_1%

R1146

1 2

Title

Size Document Number Rev

Custom

Date: Sheet of

Date: Sheet

C1117 1000P_040 2_50V7K

1 2

C1120 0.1U_0402_16V 4Z

1 2

C1121 1000P_040 2_50V7K

1 2

C1122 0.1U_0402_16V 4Z

1 2

C1123 1000P_040 2_50V7KC1123 1000P_ 0402_50V7K

1 2

C1124 0.1U_0402_16V 4ZC 1124 0.1U_0402_16V4Z

1 2

C1125 1000P_040 2_50V7KC1125 1000P_ 0402_50V7K

1 2

C1126 0.1U_0402_16V 4ZC 1126 0.1U_0402_16V4Z

1 2

Compal Electronics, Inc.

LAN AR8151

PAU30 M/B LA-6392P Schematic

Monday, November 22, 2010

LAN_LINK# (30)

1

of

29 51

0.3

5

Copy NIMUA

+1.7_VDDCT

Layout note : C300 Close to R386

10/28 Swap transformer signal 10/28 Swap transformer signal

1

2

0.1U_0402_16V4Z C1132

0.1U_0402_16V4Z

MIDI3MIDI3+

MIDI2MIDI2+

MIDI1MIDI1+

MIDI0MIDI0+

1

1000P_0402_50V7K

2

C1134

0.1U_0402_16V4Z C1134

0.1U_0402_16V4Z

C1133

Place close to TCT pin

MIDI3-(29)

D D

MIDI3+(29)

MIDI2-(29) MIDI2+(29)

MIDI1-(29) MIDI1+(29)

MIDI0-(29) MIDI0+(29)

1

1000P_0402_50V7K

2

C1132

C1131

near Pin1 near Pin4 near Pin7 near Pin10

C C

R1147

R1147 0_0603_5%

0_0603_5%

+1.7_VDDCT_R

1 2

C1129

C1129 1U_0402_6.3V4Z

1U_0402_6.3V4Z

12

Close to R7

1

1000P_0402_50V7K

2

C1135

C1138

0.1U_0402_16V4Z

C1138

0.1U_0402_16V4Z

1

1000P_0402_50V7K

2

C1137

0.1U_0402_16V4Z

C1137

0.1U_0402_16V4Z

C1136

4

change transformer P/N from TAIMAG(SP050004M00) change to BOTHHAND (SP050006B00) 9/9

BOTHHAND (SP050006B00)

change to (SP050006900) HDT 10/29

T47

1

TCT1

2

TD1+

3

TD1-

4

TCT2

5

TD2+

6

TD2-

7

TCT3

8

TD3+

9

TD3-

10

TCT4

11

TD4+

12

TD4-

350UH_IH-037-2

MCT1 MX1+

MX1-

MCT2 MX2+

MX2-

MCT3 MX3+

MX3-

MCT4 MX4+

MX4-

MCT3

24 23 22

MCT2

21 20 19

MCT1

18 17 16

MCT0

15 14 13

12

RJ45_MIDI3RJ45_MIDI3+

RJ45_MIDI2RJ45_MIDI2+

RJ45_MIDI1RJ45_MIDI1+

RJ45_MIDI0RJ45_MIDI0+

LAN_ACTIVITY#(29)

12

R1152 75_0402_1%R1152 75_0402_1%12R1151 75_0402_1%R1151 75_0402_1%

R1150 75_0402_1% R1150 75_0402_1%

R1149 75_0402_1% R1149 75_0402_1%

RJ45_GND

40mil

+3V_LAN

3

C1130

12

470P_0402_50V7K

R1153 510_0402_5%R1153 510_0402_5%

R1148 510_0402_5% R1148 510_0402_5%

1 2

RJ45_MIDI3-

RJ45_MIDI3+

RJ45_MIDI1-

RJ45_MIDI2-

RJ45_MIDI2+

RJ45_MIDI1+

RJ45_MIDI0-

RJ45_MIDI0+

JLAN1

12

11

8

7

6

5

4

3

2

1

10

9

SANTA_130452-V

CONN@

1

C1146

470P_0402_50V7K

2

Yellow LED-

Yellow LED+

PR4-

PR4+

PR2-

PR3-

PR3+

PR2+

PR1-

PR1+

Green LED-

Green LED+

R1154

0_0402_5%

12

SHLD2

SHLD1

LAN_LINK# (29)

2

1

add R1525 9/7

14

13

C1139

1000P_1206_2KV7K

RJ45_GND

1 2

Del C1140~1145 follow NAYF0 3/12

12

R1525

R1525 0_1206_5%

0_1206_5%

Follow CRB

40mil

B B

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

5

4

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

3

2009/10/10 2010/10/10

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Date: Sheet

LAN Magnetic & RJ45

PAU30 M/B LA-6392P Schematic

1

30 51Monday, November 22, 2010

of

0.3

5

+3VALW

D D

+1.05V_USB30+3V_USB30

C1262 .1U_0402_16V7KC1262 .1U_0402_16V7K

C1260 .1U_0402_16V7KC1260 .1U_0402_16V7K

C1259 .1U_0402_16V7KC1259 .1U_0402_16V7K

1

2

C C

USB30_CLKREQ#(14)

B B

USB_SI_SPI_SO U SB_SI_SPI_SO_R

A A

SPI_CS_USB#_R USB_SI_SPI_SO_R

C1261 .1U_0402_16V7KC1261 .1U_0402_16V7K

1

2

PCH_GPIO12(18)

R1272

R1272 47K_0402_5%

47K_0402_5%

@

C1263 .1U_0402_16V7KC1263 .1U_0402_16V7K

1

2

22_0402_5%

R1406

1 2

22_0402_5%

R1407

1 2

22_0402_5%

R1408

1 2

22_0402_5%

C1264 .1U_0402_16V7KC1264 .1U_0402_16V7K

1

2

CLK_PCIE_USB30(14) CLK_PCIE_USB30#(14)

2N7002KW_SOT323-3

R1409

1 2

+3V_USB30

1 2

C1265 .1U_0402_16V7KC1265 .1U_0402_16V7K

1

2

PCIE_DTX_C_PRX_P3(14) PCIE_DTX_C_PRX_N3(14)

PCIE_PTX_C_DRX_P3(14) PCIE_PTX_C_DRX_N3(14)

R1334 0_0402_5%R1334 0_0402_5%

SPI_CS_USB#_RSPI_CS_USB#

SPI_CLK_USB_RSPI_C LK_USB

USB_SO_SPI_SI_RUSB_SO_SPI_SI

R1273

R1273 47K_0402_5%

47K_0402_5%

USB30_CLKREQ#

C1269 .1U_0402_16V7KC1269 .1U_0402_16V7K

C1267 .1U_0402_16V7KC1267 .1U_0402_16V7K

C1268 .1U_0402_16V7KC1268 .1U_0402_16V7K

C1266 .1U_0402_16V7KC1266 .1U_0402_16V7K

1

2

13

D

Q103

2

G

S

12

C1285,C1286 from 12p change to 15p 6/28

R1263 from 100ohm change to 430ohm 6/28

U95

1

CS#

VCC

2

SO

HOLD#

3

WP#

SCK

4

GND

SI

MX25L5121EMC-20G_SO8

R580 10K_0402_5% R 580 10K_0402_5%

C1270 .1U_0402_16V7KC1270 .1U_0402_16V7K

C1272 .1U_0402_16V7KC1272 .1U_0402_16V7K

C1271 .1U_0402_16V7KC1271 .1U_0402_16V7K

C1273 .1U_0402_16V7KC1273 .1U_0402_16V7K

1

2

C1277 .1U _0402_16V7KC1277 .1U_0402_16V7K C1275 .1U _0402_16V7KC1275 .1U_0402_16V7K

PLT_RST_BUF#(17,24,28,29,33)

PCH_PCIE_WAKE#(15,28,29)

+1_05V_USB30_PWRGD

+3V_USB30

USB30_SMIB

CLKREQ_USB3

Y7

1 2

24MHZ_12PF_X5H024000DC1H

15P_0402_50V8J

C1285

1

2

8

R1274

7

1 2

10K_0402_5%

6 5

1 2

+3V_USB30

L84

1 2

BLM18PG181SN1D_2P

1 2 1 2

+3V_USB30

12

1

2

C1288 .1U_0402_16V7KC1288 .1U_0402_16V7K

1 2

SPI_CLK_USB_R USB_SO_SPI_SI_R

R1257 10K_0402_1%R1257 10K_0402_1% R1249 100_0402_1%@R1249 100_0402_1%@ R1250 10K_0402_5%R1250 10K_0402_5%

@

1 2

R1278 0_0402_5%

1 2

R1258 10K_0402_5%R 1258 10K_0402_5%

1

221

D52

D52 1SS355TE-17_SOD323-2

1SS355TE-17_SOD323-2

R1263

R1263 430_0402_5%

430_0402_5%

15P_0402_50V8J

C1286

+3VA

CLK_PCIE_USB30 CLK_PCIE_USB30#

PCIE_DTX_PRX_P3 PCIE_DTX_PRX_N3

PCIE_PTX_C_DRX_P3 PCIE_PTX_C_DRX_N3

R1253 0_0402_5%R1253 0_0402_5%

1 2

R1254 0_0402_5%R1254 0_0402_5%

1 2

1 2 1 2 1 2

1U_0603_10V6K

1

2

@

1 2

+3V_USB30

6/9 change U95 to MX25L512EMC

5

1

C1274

C1274 10U_0805_6.3V6M

10U_0805_6.3V6M

2

CLKREQ_USB3

USB30_SMIB

PONRSTB

SPI_CLK_USB

SPI_CS_USB#

C1282

USB_SO_SPI_SI

USB_SI_SPI_SO

USB30_XT1 USB30_XT2

R1267

0_0402_5%@R1267

0_0402_5%

1 2

4

6/8 add 100uF

C1461 chang to 150U 6/30

150U_B2_6.3VM_R35M

+VSB

H_VTTPWRGD(5,45) SYSON(33,39,44)

+3V_USB30

U92

D10

F13

F14

L10

VDD33

PECLKP PECLKN

PETXP PETXN

PERXP PERXN

PERSTB PEWAKEB PECREQB

AUXDET PSEL SMIB

PONRSTB

SPISCK SPISCB SPISI SPISO

GND GND GND GND

GND

XT1 XT2

CSEL

GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND

C12

VDD33F3VDD33G3VDD33G4VDD33L9VDD33

GND

GNDD3GNDD4GND

GND

GNDE1GNDE2GND

C13

E13

D11

D12

D13

D14

B2 B1

D2 D1

F2 F1

H2

K1 K2

J2 J1

H1

P5

M2 N2 N1 M1

K13 K14

J13

P4

C14

N14

M14

P6

A1 A2

R1268

0_0402_5%

R1268

0_0402_5%

A3 A4 A5 A7

A9 A11 A13 A14

B3

B4

B5

B7

B9 B11 B13 B14

C1 C2

C3 C10 C11

+1.05V_USB30

L13

L14

VDD33

VDD33N4VDD33N5VDD33N6VDD33P3VDD10C4VDD10C5VDD10C6VDD10C7VDD10D5VDD10C8VDD10C9VDD10D8VDD10D9VDD10E3VDD10E4VDD10

GND

E14

GNDF4GNDF6GNDF7GNDF8GNDF9GND

GNDG1GNDG2GNDG6GNDG7GNDG8GND

GND

F11

F12

UPD720200F1-XXX-A_FBGA176

GND

G9

G11

3

1

C1461

+

@

2

R1280 510K_0402_5%@R1280 510K_0402_5%@

R1279 100K_0402_5%@R1279 100K_0402_5%@

@

R1366 0_0402_5%

1 2

E11

E12

GND

GNDH6GND

GNDH7GNDH8GNDH9GND

GNDJ3GNDJ4GNDJ6GNDJ7GNDJ8GNDJ9GND

H12

G13

G12

VDD10

+1.05V_USB30

12

VDD10H3VDD10H4VDD10L5VDD10

GND

J11

J12

@

5

H11

K11

K12

L8

VDD10

GNDK3GNDK4GNDL1GNDL2GNDL3GND

8 7 6 5

2

3

Q89B

Q89B 2N7002KDW_SOT363-6

2N7002KDW_SOT363-6

4

+3VA

D7

P13

VDD10

U2AVDD10

U3AVDO33

U3TXDP2

U3TXDN2

U2DM2

U2DP2

U3RXDP2

U3RXDN2

OCI2B OCI1B

PPON2 PPON1

U3TXDP1

U3TXDN1

U2DM1

U2DP1

U3RXDP1

U3RXDN1

RREF

U2AVSS

U2PVSS

U3AVSS

GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND

L4

U96

@U96

@

AO4430L_SO8

4

61

@

1

Q89A

C537

2N7002KDW_SOT363-6

0.1U_0603_25V7K

2

B6

A6

R1345 0_0402_5%R1345 0_0402_5%

N8

R1346 0_0402_5%R1346 0_0402_5%

P8

R1347 0_0402_5%R1347 0_0402_5%

B8

R1344 0_0402_5%R1344 0_0402_5%

A8

OCI2B

R1255 10K_0402_5%R1255 10K_0402_5%

G14

OCI1B

R1256 10K_0402_5%R1256 10K_0402_5%

H13

PPON2

H14

PPON1

J14

U3TX_C_DP1

B10

A10 N10

P10 B12

A12

P12 N12

N11

D6

P14 P11 P9 P7 P2 P1 N13 N9 N7 N3 M13 M12 M11 M10 M9 M8 M7 M6 M5 M4 M3 L12 L11 L7 L6

C1280 .1U_0402_16V7KC1280 .1U_0402_16V7K

U3TX_C_DN1

C1281 .1U_0402_16V7KC1281 .1U_0402_16V7K

U2DN1_L

U2DP1_L U3RXDP1_L

U3RXDN1_L

RREF

R1262 1.6K_0402_1%R1262 1.6K_0402_1%

1 2 3

1 2

1 2 1 2

1 2

1 2 1 2

1 2

SYSON

2

+1.05VS_VTT

+3V_USB30

U3TXDP1_L

U3TXDN1_L

1

2

1 2

R1343 0_0402_5%R1343 0_0402_5%

1

+3VALW

R1284

47K_0402_5%

4.7K_0402_5%

C1251 0. 01U_0402_16V7KC1251 0.01U_0402_16V7K

1

2

1

GND

VOUT VOUT

1

C1289

2

0.047U_0402_16V7K

12

2

12

R1502

C1291

C1249 8P_0402_50V8D@C1249 8P_0402_50V8D

1

@

2

3 4

2

FB

12

R1283

4.7K_0402_5%

Q91

13

D

2N7002KW_1N_SOT323-3

OCI1B (32)

U3TXDP1_L (32)

U3TXDN1_L (32) U2DN1_L (32)

U2DP1_L (32) U3RXDP1_L (32)

U3RXDN1_L (32)

+1.5V+5VALW

1U_0603_10V6K

10U_0603_6.3V6M

C1246

C1247

1

2

+1.5V

R1286

0_0805_5%

R1286

0_0805_5%

1 2

+1.05V_USB30_EN

+1_05V_USB30_PWRGD

D

2

G

S

+3VA +3VA

C1248 . 1U_0402_16V7KC1248 .1U_0402_16V7K

1

2

U91

6

VCNTL

5

VIN

9

VIN

8

EN

7

POK

APL5930KAI-TRG_SO8

G

1 3

1

2

4.7U_0805_10V4Z

C1252 . 1U_0402_16V7KC1252 .1U_0402_16V7K

1

2

R1246

1 2

10K_0402_1%

R1247

33.2K_0402_1%

S

Q90

Q90 AO3413_SOT23-3

AO3413_SOT23-3

D

+3V_USB30

C1253 0. 01U_0402_16V7KC1253 0.01U_0402_16V7K

1

2

1

C1290

4.7U_0805_10V4Z

2

1

C1292

0.1U_0402_16V4Z

2

C1254 8P_0402_50V8D@C1254 8P_0402_50V8D

1

@

2

+1.05V_USB30+5VALW

10U_0603_6.3V6M

1

2

C1250

change U92 P/N from SA000033W 10 to SA000048H00 10/22

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

4

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

3

2007/1/15 2008/1/15

Compal Secret Data

Deciphered Date

2

Title

USB3.0 PD720200

Size Document Number Rev

C

PAU30 M/B LA-6392P Schematic

Date: Sheet of

1

31 51Monday, November 22, 2010

0.1

A

Left

+5VALW

1

C1293

4.7U_0805_10V4Z

6

5

4

USB20_N1(17)

USB20_P1(17)

2

SYSON#

D32

CH3

Vp

CH4

CM1293-04SO_SOT23-6

USB20_N1

USB20_P1

1 1

SYSON#(39)

USB20_P1_1

+USB_VCCB

U98

1

GND

2

VIN3VOUT

4

EN

RT9715BGS_SO8

USB_OC#1 Pull High at PCH Side

6/3 swap for layout

D32 P/N change to SC300001100 6/28

3

CH2

2

Vn

USB20_N1_1

1

CH1

R836 0_0402_5%@R836 0_0402_5%@

L52

WCM-2012-900T_0805

R837 0_0402_5%@R837 0_0402_5%@

8

VOUT VOUT7VIN

6 5

FLG

150U_B2_6.3VM_R35M

1 2

1

4

1 2

+USB_VCCB

C897

2

3

1

+

2

3

+USB_VCCB

1

C898

2

470P_0402_50V7K

USB20_N1_1 USB20_P1_1

USB_OC#0 (17)

1 2 3 4 5 6 7 8

ACON_UARBG-4K1926

JUSB1

VBUS DD+ GND GND GND GND GND

B

3/22 Change JUSB2 power net

D25 P/N change to SC300001100 6/28

D25

+USB_VCCB

USB20_P0_1

6

5

4

CM1293-04SO_SOT23-6

USB20_N0(17)

USB20_P0(17)

D25

CH3

Vp

CH4

CH2

CH1

USB20_N0

USB20_P0

Vn

USB20_N0_1

3

2

1

R635 0_0402_5%@R635 0_0402_5%@

1

L40

4

WCM-2012-900T_0805

R636 0_0402_5%@R636 0_0402_5%@

150U_B2_6.3VM_R35M

1 2

1

4

1 2

C339

C

+USB_VCCB

1

+

2

3

R640 Move to P.17 1/12

Del R639 And C614 1/8

D

el U36 And C605 3/3

+USB_VCCB

1

C359

2

470P_0402_50V7K

USB20_N0_1 USB20_P0_1

JUSB2

1

VBUS

2

D-

3

D+

4

GND

5

GND

6

GND

7

GND

8

GND

ACON_UARBG-4K1926

Right

D

For EMI request

U3RXDN1_L(31)

U3RXDP1_L(31)

U3TXDN1_L(31)

U3TXDP1_L(31)

U3RXDN1_L

U3RXDP1_L U3RXDP1

U3TXDP1_L

U2DP1_L(31)

U2DN1_L(31)

U2DP1_L

U2DN1_L

E

1 2

R1288 0_0402_5%R1288 0_0402_5%

DLP11TB800UL2L_4P

3 4

@

L88

1 2

R1293 0_0402_5%R1293 0_0402_5%

1 2

R1295 0_0402_5%R1295 0_0402_5%

DLP11TB800UL2L_4P

3 4

@

L89

1 2

R1299 0_0402_5%R1299 0_0402_5%

1 2

R1302 0_0402_5%R1302 0_0402_5%

3

2

4

1

2

L86 WCM-2012-670T_4P@L86 WCM-2012-670T_4P@

1 2

R1303 0_0402_5%R1303 0_0402_5%

12

4

1

U3RXDN1

U3TXDN1U3TXDN1_L

U3TXDP1

U2DP1U2DP1U2DP1U2DP1

U2DN1

6/3 DEL USB port3

2 2

BT Conn.

5

GND

6

GND

ACES_87213-0400G

+BT_VCC

JBT1

120mA

1

2

3

4

USB20_P13 (17) USB20_N13 (17)

2N7002KDW_SOT363-6

3/23 change BT conn. symbol

1

C692

0.047U_0402_16V7K

2

C695

4.7U_0805_10V4Z

1

2

G

0.047U_0402_16V7K

2

+3VS

S

G

Q48

D

AO3413_SOT23-3

1 3

1

2

0.1U_0402_16V4Z

2N7002KW_1N_SOT323-3

+5VALW

W=40mils

1

2

S

Q108

Q108 AO3413_SOT23-3

AO3413_SOT23-3

D

1 3

+5V_TCH1

200mA

1

C690

1U_0603_10V4Z

2

60mA

C696

2

G

Q49

G

Q49

C1458

4.7U_0805_10V4Z

W=40mils

TOUCH_EN1(33)

12

R720

R720 300_0603_5%

300_0603_5%

13

D

S

+BT_VCC

Q111B_3

2N7002KDW_SOT363-6

12

3

5

4

B

R1507

4.7K_0402_5%

Q111B

Q111B 2N7002KDW_SOT363-6

2N7002KDW_SOT363-6

+3VS

BT_ON#

2

5

1 2

R719

R719 47K_0402_5%

47K_0402_5%

12

R1505

4.7K_0402_5%

R1506

47K_0402_5%

3

Q109B

Q109B 2N7002KDW_SOT363-6

2N7002KDW_SOT363-6

4

C1457

12

BT_ON#(33)

change R719 value from 100K to 47K ohm 7/28

3 3

change C692 value from 0.1uf to 0.047uf 7/28

+5V_TCH1

12

R1509

300_0603_5%

61

Q109A

2N7002KDW_SOT363-6

4 4

TOUCH_EN1(33)

5/28 add R1503 for discharging path

5/19 change enable pin control by EC

A

+5V_TCH2

12

R1503

300_0603_5%

61

Q101A

2

TOUCH_EN2(33)

5/19 change enable pin control by EC

+3V_TCH2

12

R1504

300_0603_5%

61

Q106A

2

TOUCH_EN2(33)

+3VALW

1

C1460

2

G

0.047U_0402_16V7K

R1510

2

12

47K_0402_5%

5/18 add PMOS for +3V_TCH, control by EC

5/28 add R1504 for discharging path

12

R1403

4.7K_0402_5%

R1404

47K_0402_5%

3

Q101B

Q101B 2N7002KDW_SOT363-6

2N7002KDW_SOT363-6

5

4

5/28 add R1503 for discharging path

12

C1342

R1416

4.7K_0402_5%

R1417

12

47K_0402_5%

3

Q106B

Q106B 2N7002KDW_SOT363-6

2N7002KDW_SOT363-6

5

4

5/18 add PMOS for +3V_TCH, control by EC

W=40mils

1

C1459

4.7U_0805_10V4Z

2

S

Q110

Q110 AO3413_SOT23-3

AO3413_SOT23-3

D

1 3

+3V_TCH1

W=40mils

200mA

C1328

1

2

For ESD request

+5VALW

W=40mils

1

2

G

0.047U_0402_16V7K

2

12

+3VALW

W=40mils

S

G

0.047U_0402_16V7K

Q105

2

AO3413_SOT23-3

D

1 3

200mA

5/28 add R1504 for discharging path4/2 add PMOS for +5V_TCH

Q111B_3

4/2 add PMOS for +5V_TCH

1

C1329

4.7U_0805_10V4Z

2

S

Q100

Q100 AO3413_SOT23-3

AO3413_SOT23-3

D

1 3

+5V_TCH2

W=40mils

200mA

1

C1341

4.7U_0805_10V4Z

2

+3V_TCH2

+3V_TCH1

R1508

300_0603_5%

2

C

+3V_TCH2

W=40mils

12

61

Q111A

Q111A 2N7002KDW_SOT363-6

2N7002KDW_SOT363-6

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

2009/11/23 2010/11/23

+USB3_VCCA

U3TXDP1

U3TXDN1 U2DP1

U2DN1 U3RXDP1

U3RXDN1

C1284 .1U_0402_16V7KC1284 .1U_0402_16V7K

1 2

Compal Secret Data

9 1 8 3 7 2 6 4 5

OCI1B(31)

Deciphered Date

D

JUSB3

SSTX+ VBUS SSTXD+ GND DSSRX+ GND SSRX-

ACON_TARA4-9K1311

+5VALW

SYSON#

10

GND

11

GND

12

GND

13

GND

OCI1B

Del R1264 08/27

add R1528 09/10

U93

1

GND

2

VIN3VOUT

4

EN

RT9715BGS_SO8

R1528

1 2

VOUT VOUT7VIN

FLG

U3TXDP1_L U3TXDN1_L U3RXDP1_L U3RXDN1_L

0_0402_5%

D58

1

R-

VCC

2

R+

GND

3

D-

T-

4

D+

T+

LXES4XBAA6-027_MSOP8

4/19 swap for layout

+USB3_VCCA

8

6

OCI1

5

Compal Electronics, Inc.

Title

Size Document Number Rev

C

Date: Sheet of

Compal Electronics, Inc.

USB / BT / LAN CON

PAU30 M/B LA-6392P Schematic

+USB3_VCCA

8 7

U2DP1_L

6

U2DN1_L

5

+USB3_VCCA

C1255 150U_B2_6.3VM_R 35M+C1255 150U_B2_6.3VM_R 35M

10U_0805_6.3V6M

1

C1256

2

+

1

2

D-case for customer request can use B-case, either.

32 51Monday, November 22, 2010

E

32 51Monday, November 22, 2010

0.1

5

+3VALW

R572

D D

R294 2 .2K_0402_5% R2 94 2.2K_0402 _5%

R297 2 .2K_0402_5% R2 97 2.2K_0402 _5%

R308 1 00K_0402_5% R308 10 0K_0402_5%

R290 4 7K_0402_5%

R289 4 7K_0402_5%

R306 1 0K_0402_5%

R192 1 0K_0402_5%

C C

4/7 move from PCH

1 2

10K_040 2_5%

EC_SMB_ CK1

EC_SMB_ DA1

LID_SW #

KSO1

KSO2

EC_PME#

EC_SMI#

@

EC_LID_OU T#

CLK_PCI_L PC(17)

+3VALW

R299.R302 Change BOM Structure POP to @ 1/13

Del R711.C688 1/13

R288 47K_04 02_5%

C396 0.1U_04 02_16V4Z C396 0.1U_0 402_16V4Z

Change Netname From PLT_RST# to PLT_RST_BUF# 3/2

1 2

R718

R718 0_0805_ 5%

0_0805_ 5%

12

KSO[8..11](34)

0.1U_040 2_16V4Z

KSO[2..3](34)

2NDPNL_ BL_EN_CH2.5V(24)

EC_2NDP NL_BKLT_EN(24)

1STPNL_ DPST_SEL#(22) 2NDPNL_ DPST_SEL#(23)

TOUCH_P ANEL_INT1_EC#(3 4) TOUCH_P ANEL_INT2_EC#(3 4)

Add HV_15V_EN 9/1

Change HV_15V_EN from pin 82 to pin 85 9/3

B B

PCH_TEM P_ALERT#(18)

SUS_PW R_DN_ACK(15)

1STPNL_ EC_PWM(22)

3/22 DEL R298,R295, R300

+3VS

EC_SMB_ CK2

1 2

12

EC_SMB_ DA2

12

GFX_COR E_PWRGD

EC_SCI#

EC_GA20

12

EC_KBRS T#

12

5

R299 2.2K_04 02_5%@R299 2.2K_0402_5 %@

R302 2.2K_04 02_5%@R302 2.2K_0402_5 %@

R303 10K_04 02_5%

A A

R153 10K_04 02_5%@R153 10K_040 2_5%@

R601 10K_04 02_5%

R624 10K_04 02_5%

Add R1354.R1355 3/18 Del R301.R296 3/12

SYSON_R

R1305 0_0402_ 5%R130 5 0_040 2_5%

PM_SLP_ S4#

R1306 0_0402_ 5%@R1306 0 _0402_5%@

2NDPNL_ EC_PWM(23)

+3VS

4/20 Change AC_OFF connect to pin36

R543 10K_04 02_5%R543 10K_ 0402_5%

R546 10K_04 02_5%R546 10K_ 0402_5%

12

4

0.1U_040 2_16V4Z

1

C691

C681

EC_GA20(18)

SERIRQ(13)

EC_SMI#(18 )

BT_ON#(32)

ON/OFF(35)

ACOFF

LPC_AD3(13) LPC_AD2(13) LPC_AD1(13) LPC_AD0(13)

2

0.1U_040 2_16V4Z

PCH_HDM I_HPD_INT#

PCH_CRT _DET

PCH_CRT _DET (18)

PCH_HDM I_HPD_INT# (18)

SYSON (31,3 9,44)

2

EC_KBRS T#(18)

LPC_FRA ME#(13 )

PLT_RST _BUF#(17,2 4,28,29,31)

EC_SCI#(18)

TOUCH_E N1(32)

EC_SMB_ CK1(41) EC_SMB_ DA1(41) EC_SMB_ CK2(14) EC_SMB_ DA2(14)

PM_SLP_ S3#(15) PM_SLP_ S5#(15)

FAN_SPE ED1(38)

1 2

Add R1305.R1306 3/2

4

0.1U_040 2_16V4Z

1

C672

C401

2

EC_GA20 EC_KBRS T# SERIRQ LPC_FRA ME# LPC_AD3 LPC_AD2 LPC_AD1 LPC_AD0

EC_RST# EC_SCI#

R1511

1 2

10K_040 2_5%

KSO1 KSO2 KSO3

KSO8 KSO9 KSO10 KSO11

EC_SMB_ CK1 EC_SMB_ DA1 EC_SMB_ CK2 EC_SMB_ DA2

PM_SLP_ S3# PM_SLP_ S5# EC_SMI# PCH_TEM P_ALERT#

SUS_PW R_DN_ACK

1STPNL_ EC_PWM FAN_SPE ED1 BT_ON#

E51TXD_ P80DATA

E51RXD_ P80CLK ON/OFF 2NDPNL_ EC_PWM

ACOFF

ACOFF (40,43)

EC_CRY1 EC_CRY2

3

2

C402

1

1000P_0 402_50V7K

1 2 3 4 5 7 8

10

12 13 37 20 38

55 56 57 58 59 60 61 62 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 81 82

77 78 79 80

6 14 15 16 17 18 19 25 28 29 30 31 32 34 36

122 123

SM010015410 300ma 80ohm@100mhz DCR 0.3

+3VALW _EC

2

C694

1000P_0 402_50V7K

1

U45

GA20/GPIO00 KBRST#/GPIO01 SERIRQ# LFRAME# LAD3 LAD2 LAD1

LPC & MISC

LAD0

PCICLK PCIRST#/GPIO05 ECRST# SCI#/GPIO0E CLKRUN#/GPIO1D

KSI0/GPIO30 KSI1/GPIO31 KSI2/GPIO32 KSI3/GPIO33 KSI4/GPIO34 KSI5/GPIO35 KSI6/GPIO36 KSI7/GPIO37 KSO0/GPIO20 KSO1/GPIO21 KSO2/GPIO22 KSO3/GPIO23 KSO4/GPIO24 KSO5/GPIO25 KSO6/GPIO26 KSO7/GPIO27 KSO8/GPIO28 KSO9/GPIO29 KSO10/GPIO2A KSO11/GPIO2B KSO12/GPIO2C KSO13/GPIO2D KSO14/GPIO2E KSO15/GPIO2F KSO16/GPIO48 KSO17/GPIO49

SCL1/GPIO44 SDA1/GPIO45 SCL2/GPIO46 SDA2/GPIO47

PM_SLP_S3#/GPIO04 PM_SLP_S5#/GPIO07 EC_SMI#/GPIO08 LID_SW#/GPIO0A SUSP#/GPIO0B PBTN_OUT#/GPIO0C EC_PME#/GPIO0D EC_THERM#/GPIO11 FAN_SPEED1/FANFB1/GPIO14 FANFB2/GPIO15 EC_TX/GPIO16 EC_RX/GPIO17 ON_OFF/GPIO18 PWR_LED#/GPIO19 NUMLED#/GPIO1A

XCLK1 XCLK0

BLM18PG 181SN1D_2P

9

PS2 Interface

Int. K/B

Int. K/B Matrix

Matrix

SM Bus

1 2

22

VCC

11

L47

33

VCC

PWM Output

DA Output

SPI Device Interface

GPIO

GND

24

96

111

125

VCC

INVT_PWM/PWM1/GPIO0F

ACOFF/FANPWM2/GPIO13

BATT_TEMP/AD0/GPIO38

AD Input

TP_CLK/PSCLK3/GPIO4E

TP_DATA/PSDAT3/GPIO4F

SPI Flash ROM

FSTCHG/SELIO#/GPIO50

BATT_CHGI_LED#/GPIO52

GPIO

BATT_LOW_LED#/GPIO54

VR_ON/XCLK32K/GPIO57

GPO

GPI

GND

35

94

113

+EC_VCC A

67

AVCC

BEEP#/PWM2/GPIO10

BATT_OVP/AD1/GPIO39

SELIO2#/AD5/GPIO43

DAC_BRIG/DA0/GPIO3C EN_DFAN1/DA1/GPIO3D

EC_RSMRST#/GPXO03

EC_LID_OUT#/GPXO04

ICH_PWROK/GPXO06

PM_SLP_S4#/GPXID1

AGND

KB926QF E0_LQFP128_1 4X14

69

20mil

ECAGND

20mil40mil

1

2

ECAGND

FANPWM1/GPIO12

ADP_I/AD2/GPIO3A

AD3/GPIO3B

AD4/GPIO42

IREF/DA2/GPIO3E

DA3/GPIO3F

PSCLK1/GPIO4A PSDAT1/GPIO4B PSCLK2/GPIO4C

PSDAT2/GPIO4D

SDICS#/GPXOA00 SDICLK/GPXOA01

SDIDO/GPXOA02

SDIDI/GPXID0

SPIDI/RD#

SPIDO/WR#

SPICLK/GPIO58

SPICS#

CIR_RX/GPIO40

CIR_RLC_TX/GPIO41

CAPS_LED#/GPIO53

SUSP_LED#/GPIO55

SYSON/GPIO56

AC_IN/GPIO59

EC_ON/GPXO05

EC_SWI#/GPXO06

BKOFF#/GPXO08

WL_OFF#/GPXO09

GPXO10 GPXO11

ENBKL/GPXID2

GPXID3 GPXID4 GPXID5 GPXID6 GPXID7

V18R

SA00001 J5A0

1 2

R982 0_060 3_5%

C677

0.1U_040 2_16V4Z

21 23 26 27

63 64 65 66 75 76

68 70 71 72

83 84 85 86 87 88

97 98 99 109

119 120 126 128

73 74 89 90 91 92 93 95 121 127

100 101 102 103 104 105 106 107 108

110 112 114 115 116 117 118

124

For EC Tools

Change From RAM door to 3G door 1/14

JP3

1

2

3

4

ACES_85 205-0400

CONN@

Change H_PROCHOT_# From Pin76 to Pin 68 (follow NELA0) 3/18

Remove Netname: EC_PWM_2 From Pin 21 to Pin34 3/2

BATT_AM B_LED BEEP# FANPW M

PWR_ SUSP_LED

BATT_TE MP

ADP_I AD_BID0

AD_BID1

TMSNS1_ PANEL_R

IREF CALIBRATE #

EC_MUTE # GFX_COR E_PWRGD

TP_CLK TP_DATA

3S/4S# 65W/9 0W#

LID_SW #

EC_SI_SPI_SO EC_SO_S PI_SI EC_SPICLK EC_SPICS# /FSEL#

WW AN_OFF#

KB_SW FSTCHG BATT_GR N_LED

EC_ACIN

PWR_ LED SYSON_R VR_ON ACIN

EC_RSMR ST# EC_LID_OU T# EC_ON EC_SW I# EC_PW ROK BKOFF# WL_O FF# EC_ID

4/7 change PANEL_THRM_ALERT# to pin 115

ENBKL EAPD

SUSP# PBTN_OU T# EC_PME#

V18R

1

C698

4.7U_080 5_10V4Z

2

Change L49 to R982 1/14

Security Class ification

2009/11/ 23 2010/11/ 23

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/11/ 23 2010/11/ 23

3

Compal Secret Data

Deciphered Date

2

+3VALW

C

hange HV_15V_EN from pin 82

to pin 85 9/3

2

Place on 3G door

E51RXD_ P80CLK E51TXD_ P80DATA

BATT_AM B_LED (34) BEEP# (36) FANPW M (3 8)

PWR_ SUSP_LED (34)

BATT_TE MP (41)

ADP_I (43)

TMSNS1_ PANEL_R (34 )

TOUCH_E N2 (32 )

IREF (43 )

CALIBRATE # (43)

EC_MUTE # (36) GFX_COR E_PWRGD (46) HV_15V_ EN (49)

3S/4S# (43) 65W/9 0W# (43)

ME_OVER RIDE (1 3)

LID_SW # (34)

EC_SI_SPI_SO (34 ) EC_SO_S PI_SI (3 4) EC_SPICLK (34)

EC_SPICS# /FSEL# (34)

WW AN_OFF# (28) KB_SW (22)

FSTCHG (43)

BATT_GR N_LED (34) EC_ACIN (15)

PWR_ LED (34)

VR_ON (4 7)

ACIN (39,43)

EC_RSMR ST# (15) EC_LID_OU T# (14 )

EC_ON (3 5,42) EC_SW I# (15) EC_PW ROK (15)

BKOFF# (22)

WL_O FF# (28)

PM_SLP_ S4# (15) ENBKL (16) EAPD (36)

PANEL_T HRM_ALERT# (34) SUSP# (26,3 5,39) PBTN_OU T# (15)

EC_PME# (29)

ENBKL

1 2

R307 100K_0402 _5%

E51RXD_ P80CLK (28) E51TXD_ P80DATA (28 )

Change R292 value from 8.2K to 18K 9/03

Del C395 3/12

12

R1418

R1418 10K_040 2_5%

10K_040 2_5%

Change R292 value from 18K to 33K 10/29

EC_ID: HIGH is D3 ; LOW is E0

change C699&C700 value from 15pf to 22pf 7/27

32.768KH Z_12.5PF_Q13M C14610002

Title

Size Document Num ber Rev

B

PAU30 M/B LA-6392P Schematic

Date: Sheet of

1

+3VALW

Board ID definition,

lease see page 3.

P

R1379

R1379 100K_04 02_5%

100K_04 02_5%

Rc

@

1 2

AD_BID1

R1380

R1380 0_0402_ 5%

0_0402_ 5%

Rd

1 2

0.1U_040 2_16V4Z

+3VALW

Board ID definition, Please see page 3.

R291

R291 100K_04 02_5%

100K_04 02_5%

Ra

1 2

AD_BID0

12

R292

R292 33K_040 2_5%

33K_040 2_5%

Rb

TP_CLK

R304 4.7K_04 02_5%

TP_DATA

R305 4.7K_04 02_5%

3S/4S#

R310 1 00K_0402_5%

65W/9 0W#

R309 1 00K_0402_5%

+3VALW

R746

R746 100K_04 02_5%

100K_04 02_5%

@

1 2

R745

R745 0_0402_ 5%

0_0402_ 5%

1 2

1

C699

22P_040 2_50V8J

Compal Electronics, Inc.

2

C394 100P_0 402_50V8J

BATT_TE MP

C400 100P_0 402_50V8J C 400 10 0P_0402_50V8 J

ACIN

EC ENE KB926

1

C397

2

0.1U_040 2_16V4Z

12

EC_ID

3/29 remove cap

EC_CRY1 E C_CRY2

1

X2

OSC4OSC

NC3NC

2

12

1

C1314

2

+5VS

+3VALW

1

C700

22P_040 2_50V8J

2

33 51Monday, November 22, 20 10

0.1

EC_SPICS#/FSEL#(33)

+3VALW

KSO[2..3](33)

BATT_AMB_LED (33)

KSO[8..11](33)

BATT_AMB_LED#

61

Q104A

BATT_AMB_LED

12

R1415

R1415 100K_0402_5%

100K_0402_5%

BATT_GRN_LED

12

2

5

BATT_GRN_LED (33)

R1414

R1414 100K_0402_5%

100K_0402_5%

Q104A 2N7002KDW_SOT363-6

2N7002KDW_SOT363-6

BATT_GRN_LED#

3

Q104B

Q104B 2N7002KDW_SOT363-6

2N7002KDW_SOT363-6

12 11

4

ACES_88514-1041

CONN@

GND

JLED1

1010GND

SW/B LEFT (KEYB SW + TOUCH1)

4/21add +3VALW for control board and 2 caps

+3V_TCH1

1

C1239

2

4.7U_0603_6.3V6M

5/19 Add C1239, Del C1316

TOUCH_PANEL_INT1_PCH#(17)

add Q112,R1515 07/22

3/23 change R1324 => @, short path to PCH

+3VALW

R1383

1 2

2.2K_0402_5%

+3V_TCH1

1

C1318

2

0.1U_0402_16V4Z

+5V_TCH1

200mA

+3V_TCH1

2

G

Q112 2N7002KW _1N_SOT323-3

1 3

D

S

D

S

4/1 change to +3VALW

TOUCH_PANEL_INT1_EC# (33)

change +3V to +3V_TCH1 0723

Del R702 3/12

+3VALW

Add R838 1/11

R838 22_040 2_5%R838 22_0402_5%

1 2

R717 4.7K_0402 _5%

1 2

R703 4.7K_0402 _5%R703 4.7K_0402_5%

1 2

KSO2 KSO3 KSO8

KSO9 KSO10 KSO11

3/24 add c onnectors

LED/B FRONT

PCH_SATALED#(13)

+5VALW_LED

PWR_LED#

9

PWR_SUSP_LED#

8

BATT_GRN_LED#

7

BATT_AMB_LED#

6

6 5 4 3 2 1

MEDIA_LED#

5 4 3

+5VS_LED

2 1

R1411 0_0402_5%R1411 0_0402_5%

1 2

Del R1388,R983 08/27

200mA

1

C1235

C1234

2

0.1U_0402_16V4Z

4.7U_0603_6.3V6M

USB20_N3(17) USB20_P3(17)

TOUCH_PANEL_INT1_PCH_R#

Del R1324 8/27Del R1515 8/27

+3V_TCH1

USB20_P3

C674 0.1U_0402_16V4Z

20mil

+SPI_VCC

EC_SPICS#/FSEL#_R

SPI_WP#

SPI_HOLD#

del U44 07/21

JP26

1

2

3

4

5

7

5

G1

6

8

6

G2

ACES_85202-0605L

CONN@

+3VS

G

2

Q1022N7002KW_1N_SOT323-3 @

MEDIA_LED#

13

D

S

D

S

R1362 0_0402_5%R1362 0_0402_5%

1 2

R1412 0_0402_5%R1412 0_0402_5%

1 2

+5VALW

+5VS

D63 change to SCA00000J00 6/28

change BOM Structure to @ 9/3

add HV_15V 08/30

HV_15V_1

2.2U_0603_16V6K

1

C1476

0.1U_0402_16V4Z

1

2

D61

6

CH3

5

Vp

4

CH4

CM1293-04SO_SOT23-6

2

CH2

Vn

CH1

C1475

2

JSW1

1

GND

2

3

4

5

6

7

8

GND

ACES_87213-0800G

CONN@

USB20_N3

3

2

1

1 2

220mils

EC_SPICLK_R EC_SO_SPI_SI_R EC_SI_SPI_SO_R

EC_SPICS#/FSEL#_R +SPI_VCC SPI_WP# SPI_HOLD#

R704 22_0402_5%R704 22_0402_5% R706 22_0402_5%R706 22_0402_5% R716 22_0402_5%R716 22_0402_5%

150mils

U42

1

CE#

3

WP#

7

HOLD#

4

VSS

MX25L1005AMC-12G_SOP8

Reserved for BIOS simulator. Footprint SO8

change R1413,LED1 BOM structure from pop to @ 08/25

+5VALW

12

R1413

@R1413

@

560_0402_5%

21

LED1

@BLED1

@

HT-191NB5_BLUE

B

PWR_LED#

TOUCH_PANEL_INT2_EC#(33)

P/N: Mulata NXFT15X103F

+5VS

Typical 4.16K @50 degree

C1312

@ C1312

@

0.1U_0402_16V4Z

1

C1477

2.2U_0603_16V6K

2

9

c

hang JSW1 pin6,pin7 form USB20_N10/P10

to USB20_N3/P3 08/24

10

Rset=3*Rtmh Rhyst=(Rset*Rtml)/(3*Rtml-Rset)

U102

1

VCC

2

GND

3

OT1

4

OT2

G718TM1U_SOT23-8

100K_0402_1%_NCP15WF104F0 3RC

D61 P/N change to SC300001100 6/28

1 2 1 2 1 2

EC_SPICLK (33) EC_SO_SPI_SI (33) EC_SI_SPI_SO (33)

Change R704.R706.R716 Vaule From 0Ω to 22Ω 1/11

8

VDD

SCK

EC_SPICLK_R

6

EC_SO_SPI_SI_R

5

SI

EC_SI_SPI_SO_R

2

SO

33P_0402_50V8K

+3VS

Del R705 1/14

@

C673

TOUCH/B RIGHT

12

R1519

4.7K_0402_1%

TMSNS1_PANEL_R(33)

C1472

100P_0402_50V8J

TOUCH_PANEL_INT2_EC#

set2

R1376

10K_0402_1%

@

1 2

47K_0402_1%

Rhyst2

R1378

@R1378

@

R1377

@R1377

@

@U102

@

8

TMSNS1

7

RHYST1

6

TMSNS2

5

RHYST2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

R1520

TMSNS1_PANEL

1 2

0_0402_5%

1

add Q113,R1516 07/22

2

Rset1R

1 2

TMSNS1_PANEL

R1370

@R1370

@

1 2

20K_0402_1%

Rhyst1

12

2009/11/23 2010/11/23

TOUCH_PANEL_INT2_PCH#(17)

R1382

1 2

2.2K_0402_5%

3/23 change R1326 => @, short path to PCH

42 5.350 5.437 5.525 43 5.169 5.255 5.342 44 4.995 5.080 5.165

R1369

12

TMSNS1_PANEL

45 4.828 4.911 4.996 46 4.667 4.749 4.832 47 4.512 4.593 4.675

12K_0402_1%

48 4.363 4.443 4.524

@

49 4.220 4.299 4.379 50 4.083 4.160 4.239 51 3.950 4.027 4.104 52 3.823 3.898 3.974

+3VS

12

R1368

R1368 10K_0402_5%

10K_0402_5%

JTHM1

1

2

3

G1

4

G2

ACES_87213-0200

CONN@

Compal Secret Data

Deciphered Date

Del R1387,R984 08/27

Q113 2N7002KW _1N_SOT323-3

+3VALW

+3V_TCH2

2

1 3

D

G

+5V_TCH2

S

add HV_15V 08/30

change +3V to +3V_TCH2 0723

D60 P/N change to SC300001100 6/28

PANEL_THRM_ALERT# (33)

PWR_LED(33) PWR_SUSP_LED(33)

R692

100K_0402_5%

add control top HV_15V 09/07

del control top HV_15V 11/22

change R1523 BOM(4.7k_0402→22K_0402) 9/9

HV_15V

W=20mils

C1483

10U_0805_25V6K

12

C1484

@C1484

@

10U_0805_25V6K

1

C1479

2.2U_0603_16V6K

2

add C1483 11/22

Reserve C1484 11/22

HV_15V

@

R1527 0_0402_5%

1 2

eserve R1527 9/9

R

4/15 JTCH1 change to 10 pin

5/19 ADD C1238, DEL C1317

3/30 add +3V_USB for control board and 2 caps

+3V_TCH2

200mA

1

C1236

2

4.7U_0603_6.3V6M

USB20_N2(17) USB20_P2(17)

TOUCH_PANEL_INT2_PCH_R#

Del R1326 08/27Del R1516 08/27

HV_15V

0.1U_0402_16V4Z

+3V_TCH2

USB20_N2

PWR_LED# PWR_SUSP_LED#

61

Q46A

Q46A 2N7002KDW_SOT363-6

2N7002KDW_SOT363-6

2

1 2

Title

Size Document Number Rev

B

Date: Sheet of

LID_SW#(33)

1

12

C1473

C1474

C1474 10U_0805_25V6K

10U_0805_25V6K

2

6

5

4

CM1293-04SO_SOT23-6

PWR_LED# (24)

PAU30 M/B LA-6392P Schematic

200mA

C1319

1

2

+3VALW

D60

CH3

Vp

CH4

100K_0402_5%

Compal Electronics, Inc.

2

C1237

0.1U_0402_16V4Z

LID_SW#

3

CH2

2

Vn

1

CH1

3

5

R697

BIOS, I/O Port

4

1 2

4.7U_0603_6.3V6M

0.1U_0402_16V4Z

1 2 3 4 5 6 7 8 9

10

11 12

USB20_P2

Q46B

Q46B 2N7002KDW_SOT363-6

2N7002KDW_SOT363-6

34 51Monday, November 22, 2010

HV_15V_1

1

C1238

2

JTCH1

1 2 3 4 5 6 7 8 9 10

GND1 GND2

ACES_87213-1000G

CONN@

0.1

A

B

C

D

E

Power Button

ON/OFF switch

+3VALW

1 1

2 2

ON/OFFBTN#(24)

TOP Side

SW1 SMT1-05-A_4P

SMT1-05-A_4P

1

2

6

BOT Side

SMT1-05-A_4P

1

2

6

@SW1

@

5

SW2

5

3

4

3

4

@

ON/OFFBTN#

EC_ON(33,42)

10K_0402_5%

Add SW2 1/11

EC_ON

R727

1

D31

D31 CHN202UPT_SC70-3

CHN202UPT_SC70-3

1 2

Test Only

Power ON Circuit

Change R13 17 From 1KΩ to 8.2KΩ 3/18

Change c70 4 From 0.1 uf to 2.2u f 3/18

R1317 8.2K_0402_5%

1 2

13

D

SUSP(39)

3 3

2

G

Q94

S

2N7002KW_1N_SOT323-3

Change R73 8 From 75KΩ to 200KΩ 3/18

R738 200K_0402_5%R738 200K_0402_5%

SUSP#

1 2

SUSP

13

D

2

G

.1U_0402_16V7K

Q53

Q53 2N7002KW_1N_SOT323-3

2N7002KW_1N_SOT323-3

.1U_0402_16V7K

S

2

C704

2.2U_0402_6.3VM

1

Del R737 3 /9

2

C702

1

R733

100K_0402_5%

1 2

2

51ON#

3

13

D

2

G

Q55

S

2N7002KW_1N_SOT323-3

+1.8VSP_ON (44)SUSP#(26,33,39)

VTT_ON (45)

ON/OFF (33)

51ON# (40)

C1307

0.1U_0402_16V4Z

SUSP#

NC7SZ14P5X_NL_SC70-5

Add +0.75VSP_EN Circuit 3/13

Change +3VS to +3VALW 3/16

D55

+3VALW

12

U100

1

5

P

NC

A2Y

G

3

VGA_PWROK is Ope n-Drain (Pull h igh at HW side)

2 1

CH751H-40PT_SOD323-2

R1337 22K_0402_5%R1337 22K_0402_5%

4

1 2

1U_0402_6.3V6K

1

C1308

2

+0.75VSP_EN# (44)

R722

10K_0402_5%

Change C13 08 From 0. 1uf to 1uf 3/18

Change R13 37 From 1K

Chaneg Netname From VGA_PWROK# to PEG_CLKREQ#_R 3/18

+3VS

1 2

Ω

to 22KΩ 3/18

Del U46.R7 34.R1159.R 739.R740.D 45.R729.R7 30.D46 3/9

VGA_PWROK_R (18)

12

R142

R142 10K_0402_5%

10K_0402_5%

@

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2009/11/23 2010/11/23

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

Power OK

PAU30 M/B LA-6392P Schematic

35 51Monday, November 22, 2010

E

0.1

A

B

C

D

E

F

G

H

+VDDA

12

R1071

Del ALC272 circuit 3/12

D43

C1052

1U_0402_6.3V4Z

C1053

1U_0402_6.3V4Z

38

AVDD125AVDD2

D43

C1052

1 2

C1053

1 2

46

39

PVDD2

PVDD1

1 1

PCH_SPKR(13)

1

2

0.1U_0402_16V4Z

1 2

40mil

1

C1063

2

MIC1_C_L

MIC1_C_R

AMP_LEFT

AMP_RIGHT

0.1U_0402_16V4Z

+VDDA

10U_0805_10V4Z

2 2

MIC1_L(37)

MIC1_R(37)

0.1U_0402_16V4Z

1

C1062

C1061

2

MIC1_L

C1072 4.7U _0805_6.3V6K

MIC1_R

C1073 4.7U _0805_6.3V6K

C1064 2.2U _0402_6.3VMC1064 2.2U_0402_6.3VM

Del R1092.1088 3/17

MIC1_VREFO_R

MIC1_VREFO_L

MIC1_VREFO

3 3

Change Netname From SENSE_B to CPVEE 3/18

HP_PLUG#(37)

MIC_PLUG#(37)

EAPD(33)

SPDIF(37)

Need update this table

10mil

C1074 10U_0603_6.3V6MC1074 10U_0603_6.3V6M

R1083 20K_0402_1%R1083 20K_0402_1%

C1079 2.2U _0402_6.3VMC1079 2.2U_0402_6.3VM

R1091 39.2K +-1% 0402R1091 39.2K +-1% 0402 R1093 20K_0402_1%

R1093 20K_0402_1%

1 2

R1095 0_0402_5%

MIC1_VREFO

12

JDREF

12

12 12

10mil

CPVEE

SENSE_A

EAPD_R

SPDIF

Change U90 from SA00003LA00 to SA00003LA10 10/26

271X change 271X-VB3 10/26

BEEP#(33)

CH751H-40PT_SOD323-2

PVDD1_AUDIO +VDDA

U90

14

LINE2_L

15

LINE2_R

16

MIC2_L

17

MIC2_R

23

LINE1_L

24

LINE1_R

21

MIC1_L

22

MIC1_R

35

CBN

36

CBP

29

MIC2_VREFO

30

MIC1_VREFO_R

31

MIC1_VREFO_L

28

LDD_CAP

19

JDREF

34

CPVEE

13

SENSE A

18

SENSE B

47

EAPD

48

SPDIFO

7

DVSS

49

GND

R1076

10K_0402_5%

2 1

R1074

1 2

560_0402_5%

R1077

1 2

560_0402_5%

1

DVDD

SPK_OUT_L+

SPK_OUT_L-

SPK_OUT_R+

SPK_OUT_R-

HPOUT_L

HPOUT_R

SDATA_IN

SDATA_OUT

RESET#

GPIO0/DMIC_DATA

GPIO1/DMIC_CLK

PCBEEP

MONO_OUT

ALC271X-GR_QFN48_7X7

Sense Pin Impedance Codec Signals

39.2K

SENSE A

4 4

20K

10K

5.1K

39.2K

SENSE B

20K

10K

5.1K

A

PORT-A (PIN 39, 41)

PORT-B (PIN 21, 22)

PORT-C (PIN 23, 24)

PORT-D (PIN 35, 36)

PORT-E (PIN 14, 15)

PORT-F (PIN 16, 17)

PORT-G (PIN 43, 44)

PORT-H (PIN 45, 46)

Change R1105.R1106.R1107 footprint From 0805 to 0603 3/18

1 2

R1105 0_0603_5%@R1105 0_0603_5%@

1 2

R1106 0_0603_5%R1106 0_0603_5%

GND GNDA

B

C

GND GNDA

+3VS

12

C

2

B

E

D33

D33 CH751H-40PT_SOD323-2

CH751H-40PT_SOD323-2

2 1

PVDD2_AUDIO +3VS_DVDD

0.1U_0402_16V4Z

9

DVDD_IO

40

41

45

44

32

33

8

5

10

SYNC

11

6

BCLK

2

3

4

PD#

12

20

37

AVSS2

27

VREF

26

AVSS1

43

PVSS2

42

PVSS1

1 2

R1107 0_0603_5%R1107 0_0603_5%

D

R1071 10K_0402_5%

10K_0402_5%

1 2

C1047 4.7U_0603_6.3V6MC1047 4.7U _0603_6.3V6M

12

R1073

R1073 10K_0402_5%

10K_0402_5%

C1051

1U_0402_6.3V4Z

1

Q75

2SC2411KT146_SOT23-3

3

1

C1058

2

HP_LEFT

HP_RIGHT

HDA_SDIN0_AUDIO

HDA_SDOUT_AUDIO

HDA_SYNC_AUDIO

HDA_RST_AUDIO#

HDA_BITCLK_AUDIO

DMIC_DATA

DMIC_CLK

EC_MUTE_CODEC#

MONO_IN

CODEC_VREF

10mil

PVSS2 PVSS1

1 2

R1075

R 1075

2.4K_0402_1%

1

C1059

2

0.1U_0402_16V4Z

1 2

R1086 33_0402_5%

R1098 0_0402_5%R1098 0_0402_5%

C1080 0.1U_0402_16V4Z C1080 0.1U_0402_16V4Z

1 2

C1081 10U_0805_10V4Z@ C1081 10U_0805_10V4Z@

1 2

0.1U_0402_16V4Z

PVDD1_AUDIO

PVDD2_AUDIO

0.1U_0402_16V4Z

1

C1048

2

1

C1054

0.1U_0402_16V4Z

2

1

C1066

0.1U_0402_16V4Z

2

1

2

MONO_IN

C1060

C1060 10U_0805_10V4Z

10U_0805_10V4Z

L70

1 2

BLM18PG181SN1D_2P

+5VS

+3VS

Del R1100.R1080.R1081.R1084 3/17

SPKL+ (37)

SPKL- (37)

SPKR+ (37)

@

R1526 10K_0402_5%

1 2

12

SPKR- (37)

HP_LEFT (37)

HP_RIGHT (37)

HDA_SDIN0 (13)

HDA_SDOUT_AUDIO (13)

HDA_SYNC_AUDIO (13)

HDA_RST_AUDIO# (13)

HDA_BITCLK_AUDIO (13)

EC_MUTE# (33)

change C1481 BOM structure form @ to POP 9/14

reserve C1481 9/10

C1481

12P_0402_50V8J

1 2

R1320.R1321.C1076.C1077 Close to Codec

change R1320 & R1321 value from 22 ohm to 33 ohm 7/26

+5VS

DMIC_CLK

R1320 33_0402_5%R1320 33_0402_5%

DMIC_DATA

R1321 33_0402_5%R1321 33_0402_5%

reserve R1526 9/8

12

R1131

4.7K_0402_5%

+5VS

A2Y

1

5

U106

P

4

OE#

G

74AHCT1G125GW_SOT353-5@

3

R1529 10K_0402_5%

C1482 0.1U_0402_16V4Z

EC_MUTE#(33)

1 2

@

EC_MUTE# EC_MUTE_CODEC#

Reserve C1428,U106,R1529,R1133 10/22

Add R1131 10/22

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

E

2008/08/10 2009/08/10

Compal Secret Data

Deciphered Date

F

R1072

1 2

FBMA-L11-201209-221LMA30T_0805

U66

1

IN

OUT

2

GND

3

SHDN

BYP

G9191-475T1U_SOT23-5

@

5

4

40mil

+VDDA

1 2

C1050

0.01U_0402_25V7K

@

4.75V

1

C1049

0.1U_0402_16V4Z

2

60mil

(output = 300 mA)

L69

1 2

0_0603_5%

1

C1055

C1055 10U_0603_6.3V6M

10U_0603_6.3V6M

2

1 2

0_0603_5%

1

C1067

C1067 10U_0603_6.3V6M

10U_0603_6.3V6M

2

1

C1056

0.1U_0402_16V4Z

2

L71

1

2

1

C1057

C1057 10U_0603_6.3V6M

10U_0603_6.3V6M

2

C1069

C1069 10U_0603_6.3V6M

10U_0603_6.3V6M

+5VS

Change MIC from Analog MIC to Digital MIC 3/12

Digital MIC

+3VS

JDMIC1

1

DMIC_CLK_R

1 2

DMIC_DATA_R

1 2

2

3

D34

PJDLC05C

change C1077 value from 220pf to 33pf and stuff 7/26

D34 P/N change to SCA00000T00 6/28

@

12

R1133

@ R1133

@

4.7K_0402_5%

Title

Size Document Number Rev

C

Date: Sheet of

G

1

2

1

HD Audio Codec ALC271X

PAU30 M/B LA-6392P Schematic

1

C1076

C1076 220P_0402_50V8J

220P_0402_50V8J

@

Compal Electronics, Inc.

2 3 4

C1077

C1077 33P_0402_50V8J

33P_0402_50V8J

1 2 3

GND

4

GND

ACES_87213-0400G

CONN@

36 51Monday, November 22, 2010

H

5 6

0.2

A

1 1

B

C

Q76

AO3413_SOT23-3

+5VSPDIF

+5VS

S

D

1 3

0.047U_0402_16V7K

G

SPDIF_PLUG_GATE#

2

C1311

2

1

R1361

1 2

100K_0402_5%

12

R1109

5.6K_0402_5%

SPDIF_PLUG#

D

SPDIF_PLUG_GATE#

+5VS

1 2 61

2

R1108

R1108 100K_0402_5%

100K_0402_5%

Q77A

Q77A 2N7002KDW_SOT363-6

2N7002KDW_SOT363-6

3/22 change net name to SPDIF_PLUG_GATE#

3

5

4

E

HP_PLUG#

Q77B

Q77B 2N7002KDW_SOT363-6

2N7002KDW_SOT363-6

HP_PLUG# (36)

20mil

change back R1361 value from 56k ohm to 100K ohm 7/26

change C1311 value from 0.1u to 0.047uf 7/28

2

C1089

330P_0402_50V7K

5/19 exchange R-L channel

HP_LEFT(36)

HP_RIGHT(36)

2 2

change R1116.R1119 value from 56.2 ohm to 47 ohm 7/26 (realtek suggest)

3/22 need check value, owner: Vincent

1 2

R1116 47_0402_1%R1116 47_0402_1%

1 2

R1119 47_0402_1%R1119 47_0402_1%

HPOUT_R_1

1 2

L72 BLM18AG121SN 1D_2PL72 BLM18AG121SN 1D_2P

1 2

L73 BLM18AG121SN 1D_2PL73 BLM18AG121SN 1D_2P

330P_0402_50V7K

HPOUT_L_2HPOUT_L_1

HPOUT_R_2

+5VSPDIF

330P_0402_50V7K

1

SPDIF_PLUG#

SPDIF(36)

C1092

100P_0402_50V8J

@

S/PDIF Out JACK

2

LINE Out/Headphone Out

C1090

1

SPDIF

1

2

JHP1

6 1

4

5

7 3 8

2

SINGA_2SJ1533-000111

CONN@

Int. Speaker Conn.

JSPK1

SPKL+(36) SPKL-(36) SPKR+(36) SPKR-(36)

3 3

4 4

A

B

SPKL+ SPKLSPKR+ SPKR-

20mil

MIC1_R(36)

MIC1_L(36)

R1128

R1129

R1122 0_0603_5% R 1122 0_0603_5% R1123 0_0603_5% R 1123 0_0603_5% R1124 0_0603_5% R 1124 0_0603_5% R1125 0_0603_5% R 1125 0_0603_5%

R1128

1 2

R1129

1 2

1 2 1 2 1 2 1 2

PJDLC05C_SOT23-3

4.7K_0402_5%

MIC1_R_1

1K_0603_1%

MIC1_L_1

1K_0603_1%

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2

3

D38

@

1

12

R1126

C

SPK_L+ SPK_LSPK_R+ SPK_R-

2

3

D39

@

PJDLC05C_SOT23-3

1

12

R1127

4.7K_0402_5%

L74 BLM 18AG121SN1D_2PL74 BLM 18AG121SN1D_2P

L75 BLM 18AG121SN1D_2PL75 BLM 18AG121SN1D_2P

2008/08/10 2009/08/10

JSPK1

1 2 3 4

ACES_88266-04001

CONN@

MIC1_VREFO_RMIC1_VREFO_L

1 2

220P_0402_50V7K

Compal Secret Data

1 2 3

G1

4

G2

Deciphered Date

5 6

C1093

MIC_PLUG#(36)

1

2

MIC1_R_R

MIC1_L_R

1

C1094

C1094 220P_0402_50V7K

220P_0402_50V7K

2

MIC_PLUG#

D

3

@

1

3/22 change headpone symbol following NELA0

MIC_PLUG#SP DIF_PLUG#

2

D40

D40 PJDLC05_SOT23-3

PJDLC05_SOT23-3

MIC JACK

3/22 change MIC jack symbol following NELA0

JMIC1

1 2

3

4

5 6

CONN@

SUYIN_010030FR006G109ZL

5/19 exchange pin4 and pin5 connection, pin5 normal open, short with pin4 when plugin

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet of

Compal Electronics, Inc.

Amplifier & Audio Jack

PAU30 M/B LA-6392P Schematic

0.2

37 51Monday, November 22, 2010

E

0.2

hange D66 BOM structure form @ to POP 10/29

C

reserve D66 10/26

D66

2 1

CH491DPT_SOT23-3

@

R417

+5VS

R417

0_0603_5%

10U_0805_10V4Z

Change R417 BOM structure form POP to @ 10/29

Add G-Sensor Circuit 1/12

C899

10U_0603_6.3V6M

GSEN@

R839

4.7K_0402_5%

+3VS

1 2

GSEN@

10U_0603_6.3V6M

1

2

R839 Change From 3.4K to 4.7K 3/4

D_CK_SDATA(10,11,12,14,28)

D_CK_SCLK(10,11,12,14,28)

6/17 DEL R912.R913

FAN1 Conn

+VCC_FAN1

2

C500

1

+3VS

12

R429

R429 10K_0402_5%

10K_0402_5%

FAN_SPEED1(33)

+3VS

C900

0.1U_0402_16V4Z

1

GSEN@

2

U? LIS33DE P/N SA00003VT00

1

C515

C515 1000P_0402_50V7K

1000P_0402_50V7K

2

LIS33DE ST G-SENSOR

U49

14

VDD

INT_1

VDD_IO

INT_2

CS

SDA/SDI/SDO

SDO/SA0

SCL/SPC

NC_1 NC_2

GND_1 GND_2

RSVD_1

GND_3

RSVD_2

GND_4

LIS331DLTR_LGA16_3X3

10 15

1

8

6

4

2 3

GSEN@

40mil

+VCC_FAN1

FANPWM(33)

11

9

7

5 12 13 16

+5VS

12

D18

D18 1SS355_SOD323-2

1SS355_SOD323-2

@

10U_0805_10V4Z

1000P_0402_50V7K

4/6 add

1 2

R1405 0_0402_5%

GSEN@

D20

1 2

C518

1 2

C516

1 2

2009/12/18

1SS355_SOD323-2

JFAN1

1

2

3

4

5

G1

6

G2

ACES_85204-04001

CONN@

G_SENSOR_INT#

5/18 DEL D19, ADD D20

5/18 change footprint

G_SENSOR_INT# (17)

H1

H_3P2

@

1

H11

H_3P2

@

1

H28

H_2P8

@

1

FIDUCIAL_C40M80

H_3P2

H_4P0

FD4

H2

H12

H22

1

@

1

@

1

@

1

@

H3

H_3P2

@

1

H13

H_3P2

@

1

FD2

1

FIDUCIAL_C40M80

H4

@

1

H14

H_3P2

1

H24

H_4P2X4P7

@

H5

H_3P2

1

H15

H_3P2

@

1

H_4P2

@

1

H31

H_4P0X4P6

@

1

FIDUCIAL_C40M80

H8

H6

H_3P2

@

1

H16

H_3P2

@

1

H25

H_4P7

@

1

@

H26

H_3P2

1

@

1

H_3P2

@

H17

H_3P2

1

@

1

H27

H_4P2X4P7

@

@ 1

@

H_3P2

H18

H8

H7

H6

H9

H_3P2

@

1

H10

H_3P2

@

1

H20

H19

H_3P2

H_2P8

@

1

add H32,H33 7/12

H32

H_3P2

H33

H_3P2

@

1

@

1

modify 03/24

FD1

@

1

FD3

@

1

FIDUCIAL_C40M80

Del Q63.R840.R841 1/13

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/11/23 2010/11/23

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet of

Compal Electronics, Inc.

FAN & G-Sensor & Screw Hole

PAU30 M/B LA-6392P Schematic

38 51Monday, November 22, 2010

0.1

A

B

C

D

E

+5VALW TO +5VS

+5VALW

U39

SI4800BDY-T1-GE3_SO8

8 7

1

2

10U_0805_10V4Z

12

SUSP

5

10mil

61

2

4

5VS_GATE

Q44A

Q44A 2N7002KDW_SOT363-6

2N7002KDW_SOT363-6

1

C620

C616

10U_0805_10V4Z

20mil

+VSB

2

R679 150K_0402_5%R679 150K_04 02_5%

1 1

1 2 36

+5VS

1

C649

10U_0805_10V4Z

2

2N7002KDW_SOT363-6

1

C645

0.1U_0603_25V7K

2

1

C646

2

1U_0603_10V4Z

Q44B

R678

R678 470_0603_5%

470_0603_5%

1 2

3

4

SUSP

5

Del +3VLAWS to +3V 1/8 Del +5VLAWS to +5V 1/8

+3VALW TO +3VS

+3VALW

U35

SI4800BDY-T1-GE3_SO8

8 7

5

1

C610

C606

10U_0805_10V4Z

2 2

10U_0805_10V4Z

20mil

+VSB

2

10U_0805_10V4Z

R637 220K_0402_5%R637 220K_0402_5%

SUSP

12

10mil

2

4

3VS_GATE

61

Q40A

Q40A 2N7002KDW_SOT363-6

2N7002KDW_SOT363-6

+1.5V to +1.5VS

+1.5V

U14

U14 AO4430L_SO8

AO4430L_SO8

8 7 6 5

1

C294

C303

10U_0805_10V4Z

3 3

20mil

2

+VSB

2

10U_0805_10V4Z

R202

R202 510K_0402_5%

510K_0402_5%

SUSP

ACIN(33,43)

Change BOM Struc ture VGA@ to PO P 1/9

10mil

12

61

2

ACIN

1 2 3

4

1.5VS_GATE

12

@

R219

510K_0402_5%

Q9A

Q9A 2N7002KDW_SOT363-6

2N7002KDW_SOT363-6

13

D

Q11

2

G

2N7002KW_1N_SOT323-3

S

@

1 2 36

C318

10U_0805_10V4Z

1

C325

0.1U_0603_25V7K

2

+3VS

1

C611

10U_0805_10V4Z

2

2N7002KDW_SOT363-6

1

C604

0.1U_0603_25V7K

2

+1.5VS

1

C319

2

1U_0603_10V4Z

2N7002KDW_SOT363-6

1

C609

2

1U_0603_10V4Z

1

2

Q9B

Q40B

R641

R641 470_0603_5%

470_0603_5%

1 2 3

4

R222

R222 470_0603_5%

470_0603_5%

1 2

3

5

4

5

SUSP

HV_15V

R1521

R1521 470_0603_5%

470_0603_5%

1 2

13

D

HV_15V_EN#

2

G

Q114

S

2N7002KW_1N_SOT323-3

HV_15V_EN# (49)

R690.R699 Change From 100KΩ to 10KΩ 1/14

+5VALW

R690

R690 10K_0402_5%

10K_0402_5%

1 2

13

D

Q81

2

G

12

2N7002KW_1N_SOT323-3

S

100K_0402_5%

SYSON#

R698

SYSON#(32)

SYSON(31,33,44)

Q45 Change Footprint From SOT-363 to SOT-323(Q80,Q81) 2/3

+5VALW

R699

R699 10K_0402_5%

10K_0402_5%

1 2

13

D

Q80

2

G

12

2N7002KW_1N_SOT323-3

S

10K_0402_5%

SUSP

R691

SUSP(35)

SUSP#(26,33,35)

+1.05VS_VTT

12

R587

R587 22_0603_5%

22_0603_5%

4 4

13

D

2

G

Q35

G

Q35

S

2N7002KW_1N_SOT323-3

2009/08/14 CP_S3PowerReduction WhitePaper_Rev0.9

0.75VS speed up discharge

D

S

A

R534

R534 470_0603_5%

470_0603_5%

1 2

13

2

G

Q26

G

Q26

2N7002KW_1N_SOT323-3

+1.8VS

R613

R613 470_0603_5%

470_0603_5%

1 2

13

D

SUSP

2

G

Q36

G

Q36

S

2N7002KW_1N_SOT323-3

+1.5V+0.75VS

R544

R544 470_0603_5%

470_0603_5%

@

1 2

13

D

SYSON#SUSP SUSP

2

G

Q27

G

Q27

@

S

2N7002KW_1N_SOT323-3

B

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2009/11/23 2010/11/23

Compal Secret Data

Deciphered Date

D

4/6 remove

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet of

Compal Electronics, Inc.

DC Interface

PAU30 M/B LA-6392P Schematic

39 51Monday, November 22, 2010

E

0.1

A

B

C

D

PreCHG

PR1

1K_1206_5%

VIN

PL1

PJP1

1 2

1 1

3

4 GND GND

ACES_50305-00441-001

12

PC1

PC1 1000P_0402_50V7K

1000P_0402_50V7K

PL1

SMB3025500YA_2P

1 2

12

PC2

100P_0402_50V8J

DC_IN_S2DC_IN_S1

12

PC3

100P_0402_50V8J

12

PC4

1000P_0402_50V7K

VIN

ACOFF(33,43 )

+5VALWP(42)

PR8

68_1206_5%

13

VIN

PD3

LL4148_LL34-2

1 2

12

PC6

0.1U_0603_25V7K

12

PR9

PR9 68_1206_5%

68_1206_5%

VS

2 2

PD4

LL4148_LL34-2

PR10

100K_0402_1%

PR11

22K_0402_1%

1 2

12

PQ4

TP0610K-T1-E3_SOT23- 3

N1

12

PC5

0.22U_0603_25V7K

2

BATT+

51ON#(35)

1K_1206_5%

1 2

PR2

1K_1206_5%

1 2

PR5

1K_1206_5%

1 2

PR6

1K_1206_5%

1 2

PD2

2

3

BAS40CW _SOT323-3

LL4148_LL34-2

1

PD1

PQ1

TP0610K-T1-E3_SOT23- 3

12

PR3

PR4

100K_0402_5%

13

PQ2

PQ2 PDTC115EU_SOT323-3

PDTC115EU_SOT323-3

2

100K_0402_5%

12

PR7

100K_0402_5%

13

2

B+

13

PQ3

PQ3 PDTC115EU_SOT323-3

PDTC115EU_SOT323-3

PJ1

3 3

+5VALWP

+3VALWP +3VALW

+3VLP

PR12

0_0402_5%

+CHGRTC

4 4

1 2

+1.8VSP +1.8VS

+VSBP +VSB

HV_15VP HV_15V

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/11/23 2010/11/23

2

112

JUMP_43X118

PJ3

2

112

JUMP_43X118

PJ5

2

112

JUMP_43X118

PJ8

2

112

JUMP_43X39

PJ10

2

112

JUMP_43X39

PJ20

2

112

JUMP_43X39

Compal Secret Data

Deciphered Date

C

+5VALW

+0.75VS+0.75VSP

+VGFX_COREP

+1.05VS_VTTP

PJ2

2

112

JUMP_43X118

PJ4

2

112

JUMP_43X118

PJ6

2

112

JUMP_43X118

JUMP_43X118 PJ7

PJ7

2

112

JUMP_43X118

PJ9

2

112

JUMP_43X118

JUMP_43X118 PJ11

PJ11

2

112

JUMP_43X118

PJ14

2

112

JUMP_43X118

Title

Size D ocument Number Rev

Custom

Date: Sheet of

+VGFX_CORE

+1.5V+1.5VP

+1.05VS_VTT

+1.05VS_VTT_CPU

Compal Electronics, Inc.

DCIN & PRECHARGE

SR40 Schematic

D

40 51Monday, November 22, 2010

0.1

A

PJP2

10

GND

9

GND

8

7

7 6 5 4 3

1 1

SUYIN_200275GR008G16MZR

2 2

2 1

EC_SMDA

6 5 4 3 2 1

TH PI

BATT_S1

VMB

12

PC8

PC8 1000P_0402_50V7K

1000P_0402_50V7K

PL2

SMB3025500YA_2P

1 2

BATT+

12

PC9

0.01U_0402_25V7K

12

PR15

PR15 1K_0402_5%

1K_0402_5%

EC_SMCA

100_0402_1%

6.49K_0402_1%

12

PR20

PR20 1K_0402_1%

1K_0402_1%

PR14

PR18

B

C

D

PH1 under CPU botten side :

PR13

PR13 100_0402_1%

100_0402_1%

1 2

12

EC_SMB_DA1 (33)

EC_SMB_CK1 (33)

+3VALWP

BATT_TEMP (33)

.1U_0402_16V7K

MAINPWO N( 18,42)

CPU thermal protection at 92 degree C Recovery at 56 degree C

VL

12

PC7

PU1

VL

PR22

@PR2 2

@

100K_0402_1%

1 2

1

VCC

2

GND

3

OT1

4

OT2

G718TM1U_SOT23-8

8

TMSNS1

RHYST1

TMSNS2

RHYST2

100K_0402_1%_NCP15W F104F03RC

7

6

5

1 2

9.53K_0402_1%

1 2

47K_0402_1%

PH1

PR19

PR21

@PR2 1

@

12

PR17

PR17 21K_0402_1%

21K_0402_1%

12

PR16

10K_0402_1%

1 2

12

PH2

@PH2

@

100K_0402_1%_NCP15W F104F03RC

PQ5

TP0610K-T1-E3_SOT23- 3

B+

PR24

100K_0402_1%

A

VL

PR26

1 2

1K_0402_5%

1 2

1U_0402_6.3V6K

PC12

12

3 3

SPOK(42)

4 4

PQ6

2

G

100K_0402_1%

22K_0402_1%

13

D

S

12

PR23

PR25

1 2

2N7002W- T/R7_SOT323-3

12

PC10

0.22U_0603_25V7K

13

2

B

+VSBP

12

PC11

0.1U_0603_25V7K

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/11/23 2010/11/23

Compal Secret Data

Deciphered Date

C

Compal Electronics, Inc.

Title

Size D ocument Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

BATTERY CONN / OTP

SR40 Schematic

D

41 51Monday, November 22, 2010

0.1

5

Note: Use TPS51125 IC can remove RTC refernece LDO Use TPS51427 IC must keep RTC refernece LDO

4

3

2

1

2VREF_8205

D D

PR27

13K_040 2_1%

1 2

PR29

RT8205_B+

PJ15

ACPRN(43)

EC_ON(33,35)

PJ15

2

JUMP_43 X118

112

PC15

VS

PR43

200K_04 02_1%

1 2

2

12

0.1U_0603_25V7K

+3VALWP

MAINPWON(18,41)

1 2

PR41

100K_04 02_1%

13

5

12

PC16

PC17

10U_1206_25V6M

2200P_0402_50V7K

PC24

220U_6.3 V_M

DMN66D0 LDW-7_SOT3 63-6

VL

13

D

PQ13

2

G

2N7002W -T/R7_SOT32 3-3

PQ14

PQ14 PDTC115 EU_SOT323-3

PDTC115 EU_SOT323-3

2N7002W -T/R7_SOT32 3-3

S

12

4.7UH_PC MC063T-4R7MN_ 5.5A_20%

1

+

2

PQ11A

PR40

P R40

1 2

0_0402_ 5%

PL4

1 2

D

S

100K_04 02_1%

12

PR42

40.2K_0402_1%

PR35

@

PC26

@

ENTRIP1

61

PR39

12

4.7_1206_5%

12

680P_0402_50V7K

G

12

2

PC31

2.2U_0402_6.3V6M

578

PQ7

AO4466_ SO8

3 6

241

578

PQ9

PQ9 AO4468_ SO8

AO4468_ SO8

3 6

241

2

5

G

13

PQ12

PQ12 PDTC115 EU_SOT323-3

PDTC115 EU_SOT323-3

4

B+

C C

B B

A A

Typ: 175mA

PC21

4.7U_0805_10V6K

B+

ENTRIP2

34

D

PQ11B

DMN66D0 LDW-7_SOT3 63-6

S

+3VLP

12

PR33

1 2

0_0603_ 5%

PC22

0.1U_060 3_25V7K

PR37

499K_04 02_1%

1 2

12

PR38

100K_0402_1%

+3.3VALWP Ipeak=4.3A ; Imax=3.01A Rds(on)=22m ohm(max) ; Rds(on)=17.4m ohm(typical) Vlimit=(10E-06 * 105K)/10=105mV Ilimit=127mV/(22m*1.2) ~ 127mV/(17.4m*1.2) =4.81A ~ 6.08A Iocp=Ilimit+Delta I/2 =5.58A ~ 6.85A Delta I=1.547A (Freq=375KHz)

Security Class ification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

PR29

20K_040 2_1%

1 2

PR31

127K_04 02_1%

1 2

25

7

8

BST_3V

9

UG_3V

10

LX_3V

11

LG_3V

12

PC28

1U_0603_10V6K

2VREF_8205

PU2

P PAD

VO2

VREG3

BOOT2

UGATE2

PHASE2

LGATE2

3

12

PC13

1U_0603_10V6K

PR28

30.9K_04 02_1%

1 2

PR30

20K_040 2_1%

1 2

PR32

154K_04 02_1%

1

2

FB1

PGOOD

UGATE1

PHASE1

LGATE1

17

12

PC29

0.1U_0603_25V7K

154K_04 02_1%

ENTRIP1

1 2

ENTRIP1

24

VO1

23

22

BOOT1

21

20

19

RT8205E GQW_W QFN24_4X4

NC18VREG5

VL

Typ: 175mA

4.7U_0805_10V6K

Deciphered Date

BST_5V

UG_5V

LX_5V

LG_5V

ENTRIP2

6

4

3

5

FB2

REF

TONSEL

ENTRIP2

VFB=2.0V

SKIPSEL

EN

13

RT8205_ B+

2010/01/ 25 2010/12/ 31

VIN16GND

14

15

12

PC30

Compal Secret Data

RT8205_ B+

12

PC18

10U_1206_25V6M

SPOK (41)

PC23

PR34

0.1U_060 3_25V7K

0_0603_ 5%

1 2

0.1U_060 3_25V7K

1 2

RT8205 TONSEL=VREF (1)SMPS1=300KHZ (+5VALWP) (2)SMPS2=375KHZ(+3VALWP)

TPS51125A TONSEL=VREF (1)SMPS1=245KHZ (+5VALWP) (2)SMPS2=305KHZ(+3VALWP)

3.3VALWP Delta I = 1.902A (Freq=305KHz) Iocp = 5.76A ~ 7.03A 5VALWP Delta I = 3.199A (Freq=245KHz) Iocp = 8.74A ~ 10.16A

2

12

PC19

2200P_0402_50V7K

+5VALWP Ipeak=5.645A ; Imax=3.952A Rds(on)=18m ohm(max) ; Rds(on)=15m ohm(typical) Vlimit=(10E-06 * 154K)/10=154mV Ilimit=154mV/(18m*1.2) ~ 154mV/(15m*1.2) =7.14A ~ 8.56A Iocp=Ilimit+Delta I/2 =8.44A ~ 9.86A Delta I=2.613A (Freq=300KHz)

12

PC20

0.1U_0603_25V7K

AO4466_ SO8

AO4712_ SO8

PQ10

Custom

578

PQ8

3 6

241

4.7UH_PC MC063T-4R7MN_ 5.5A_20%

PL5

1 2

12

578

PR36

@

4.7_1206_5%

12

PC27

@

3 6

Compal Electronics, Inc.

Title

3VALWP/5VALWP

Size Document Num ber Rev

Date: Sheet of

@

241

680P_0402_50V7K

SR40 Schematic

PC25

220U_6.3 V_M

1

42 51Monday, November 22, 20 10

1

+

2

+5VALWP

0.1

A

Iada=0~4.74A(90W/19V=4.736A) Iada=0~3.42A(65W/19V=3.421A)

PQ15 AO4435L_SO 8PQ15 AO4435L_SO8

VIN

1 1

12

PR46

PR46 200K_0402_1%

200K_0402_1%

VIN_1

2

61

D

2 2

G

DMN66D0LDW -7_SOT363-6

S

PACIN

ACOFF(33,40)

2

PQ21A

47K

2

47K

13

PQ20

PDTC115EU_SOT323-3

PR66

47K_0402_5%

PACIN

1 2

ACOFF

2

8 7

5

4

PQ18

PQ18 PDTA144EU_SOT323-3

PDTA144EU_SOT323-3

1 3

DMN66D0LDW -7_SOT363-6

13

ADP_I = 19.9*Iadapter*Rsense

P2

1 2 36

12

PC37

0.1U_0603_25V7K

1 2 3 6

12

PR47

PR47 200K_0402_1%

200K_0402_1%

12

6251VDD

PR55

PR55 150K_0402_1%

150K_0402_1%

PQ16 AO4407A_S O8PQ16 AO4407A_SO8

3S/4S#(33)

PQ21B

5

G

@PQ22 (only 4S)

34

D

S

80.6K_0402_1%

IREF(33)

PQ28

PQ28 PDTC115EU_SOT323-3

PDTC115EU_SOT323-3

100K_0402_1%

4

FSTCHG(33)

PR68

PR70

8 7

5

PC32

5600P_0402_25V7K

PR57 47K _0402_5%PR57 47K_0402_5%

1 2

2

0.01U_0402_25V7K

ADP_I(33)

12

PC51

1 2

FSTCHG

13

@PQ 22

@

1 2

PC46

0.1U_0402_16V7K

12

6251VREF 6251aclim

0.01U_0402_25V7K

CP = 85%*Iada ; CP = 4.07A CP = 85%*Iada ; CP = 2.91A

P3

PR54

0_0402_5%

PQ22 PDTC115EU_SOT323-3

PDTC115EU_SOT323-3

PC45 6800P_0402_25V7KPC45 6800P_0402_25V7K

1 2

PR62 10K_ 0402_1%PR62 10K_0402_1%

1 2

PC48

100P_0402_50V8J@

PC49

1 2

PR71

1 2

11.5K_0402_1%

65W/90W#(33)

PR80 change to 2.1K from 20K

3 3

CP mode

Iinput=(1/0.02)(0.05*Vaclm/2.39+0.05)

only 65W adp

where Vaclm=1.502V, Iinput=4.07A where Vaclm=0.392V, Iinput=2.91A

CC=0.6~4.48A

Iref=0.7224*Ichanrge kI=0.7224

IREF=0.43V~3.24V

BATT Type

4 4

Normal 4S LI-ON Cells

Charging Voltage (0x15)

16800mV

Ki Vchlim=Iref*(PR374/(PR372+PR374)) =Iref*(100K/(80.6K+100K)) =Iref*0.5537 Ichanrge=(165mV/PR369)*(Vchlim/3.3V) =(165m/20m)*(1/3.3V)*Iref*0.5537 =1.3842*Iref Iref=0.7224*Ichanrge =>Ki=0.7224

Kv Rinternal ic=514K Rec=3K R1=PR379=15.4K R2=PR381=31.6K R=514K//31.6K//(15.4K+3k)=11.372K r=514K//514K//31.6K=28.14K Vcell=0.175*Vadj+3.99v

CV mode

16.80V

4.2V=0.175*Vadj+3.99V =>Vadj=1.2V Vadj=Vref*(R/(R+514K))+CALIBRATE*(r/(r=514K))

1.1483=CALIBRATE*0.6046 =>CALIBRATE=1.899

1.899=(4.2-(Vcell+A*0.175))*Kv=(4.2-(4.2+A*0.175))*Kv A=Vref*(R/(R+514K))=0.052 Kv=9.451

CALIBRATE#(33 )

1

2

6251VREF

PQ29

@

PQ29

@

2

G

12

B

PR44 0. 02_2512_1%PR44 0.02_2512_1%

4

3

B+

PR189

0_1206_5%

VIN

6251VDD

PD5

RB751V-40_SOD323-2

12

PC39

ACSETIN

2.2U_0603_6.3V6K

PU3

12

PR58

100K_0402_1%

PR64

100_0402_1%

1 2

2.37K_0402_1%

12

2.1K_0402_1%

@

PR74

PR72

12

13

D

2N7002W- T/R7_SOT323-3

S

PR75

15.4K_0402_1%

1 2

1

VDD

2

ACSET

6251_EN CSON

3

EN

4

CELLS

5

ICOMP

6

VCOMP

7

ICM

6251VREF

8

VREF

9

CHLIM

10

ACLIM

11

VADJ

12

GND

ISL6251AHAZ-T_QSOP24

PR76

31.6K_0402_1%

1 2

47K_0402_1%

ACPRN

PHASE

UGATE

PR79

ACPRN

10_1206_5%

DCIN

CSON

CSOP

CSIN

CSIP

BOOT

VDDP

LGATE

PGND

PR52

12

24

23

22

21

20

19

18

17

16

15

14

13

BST_CHG

DL_CHG

2

PR48

@PR4 8

@

191K_0402_1%

1 2

12

PC38

PC41

0.1U_0603_25V7K

DCIN

ACPRN

PC44

0.047U_0402_16V7K

1 2

PC47

0.1U_0603_25V7K

1 2

LX_CHG

DH_CHG

0_0603_5%

1 2

6251VDDP

6251VDD

12

13

12

1000P_0402_25V8J

12

1 2

PR60

20_0402_5%

PR69

PC55

1 2

4.7U_0603_6.3V6M

PR78

PR78 10K_0402_1%

10K_0402_1%

PQ30

PDTC115EU_SOT323-3

12

CSIN

CSIP

PreCHG

12

PR49

191K_0402_1%

ACSETIN

12

PR53

14.3K_0402_1%

ACPRN (42)

PR59

20_0402_5%

1 2

12

PR61

PR61 20_0402_5%

20_0402_5%

1 2

PR63

2_0402_5%

0.1U_0603_25V7K

BST_CHGA

12

PD8

RB751V-40_SOD323-2

1 2

PR73

4.7_0603_5%

10K_0402_1%

1 2

PACIN

12

PR80

14.3K_0402_1%

PR77

PC50

PC33

10U_1206_25V6M

CSOP

12

6251VDD

C

D

B+

CHG_B+

12

@

12

PC34

10U_1206_25V6M

12

PC35

PC36

0.1U_0603_25V7K

0.1U_0603_25V7K 2200P_0402_25V7K

2200P_0402_25V7K

578

PQ24

AO4466_SO8

10UH_SIL1045RA-100PF_4.5A_3 0%

3 6

241

578

PQ27

PQ27 AO4468_SO8

AO4468_SO8

3 6

241

ACIN (33,39)

PQ17 AO4435L_SO8PQ17 AO4435L_SO8

1 2 3 6

4

PR50

10K_0402_1%

1 2 13

PR56

100K_0402_1%

PL7

1 2

12

@

PR67

4.7_1206_5%

12

@

PC52

680P_0402_50V7K

8 7

5

PR45

47K_0402_1%

1 2

PQ19

PQ19 PDTC115EU_SOT323-3

PDTC115EU_SOT323-3

2

12

PC42

2200P_0402_25V7K

VIN_1

ACPRN

2

G

TCR=50ppm / C

CHGCH G

@

PD7

1

BAS40CW _SOT323-3

13

D

2N7002W- T/R7_SOT323-3

S

1

2

VIN

PQ25

4

0.02_1206_1%

3

@

PR65

3

2

PC43

ACOFF

PR51

@PR5 1

@

200K_0402_1%

1 2

D

12

S

0.1U_0603_25V7K

PC53

10U_1206_25V6M

VIN

13

PQ23

@

PQ23

@

PACIN

2

2N7002W- T/R7_SOT323-3

G

<40,41>

12

PC54

10U_1206_25V6M

BATT+

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

-

A

B

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2007/09/20 2008/09/20

Compal Secret Data

Deciphered Date

C

Compal Electronics, Inc.

Title

Size D ocument Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

CHARGER

SR40 Schematic

D

43 51Monday, November 22, 2010

0.1

5

4

3

2

1

Note:Iload(max)=3.5A

PU4

0.1U_0402_10V7K

PR96

10

PVIN

9

PVIN

8

SVIN

5

EN

4

2

LX

PG

3

LX

6

FB

TP

NC

7

1

11

SY8033BDBC_DFN10_3X3

PR89

PR89 280K_0402_1%

280K_0402_1%

1 2

PU6

2

TON

3

VOUT

4

V5FILT

5

VFB

6

PGOOD

VFB=0.75V

LX_1.8V

1

EN_PSV

FB=0.6Volt

15

TP

GND7PGND

PJ12

D D

+3VALW

+1.8VSP_ON(35)

C C

B B

SYSON(31,33,39)

+5VALW

Layout Note: Place near V5FILT Pin

A A

PJ12

112

@

JUMP_43X79

22U_0805_6.3VAM

1 2

PR83 0_0 402_5%PR83 0_0402_5%

PR90

0_0402_5%

1 2

PR92

@ PR92

@

47K_0402_5%

PR94

PR94 100_0603_5%

100_0603_5%

1 2

PC76

4.7U_0603_6.3V6K

2

PC56

EN_1.8V

PR85

@PR8 5

@

1M_0402_5%

12

0.1U_0402_16V7K

12

PR97

5.76K_0402_1%

12

1 2

PC72

@ PC72

@

12

PC60

@

PC77

@ PC77

@

47P_0402_50V8J

1 2

5.9K_0402_1%

1 2

PL8

2.2U_FDV0630-2R2M- P3_7.2A_20%

1 2

12

20K_0402_1%

PR81

4.7_1206_5%

FB_1.8V

12

10K_0402_1%

PC61

680P_0402_50V7K

BST_1.5V1.5V_E N

14

VBST

DRVH

LL

TRIP

V5DRV

DRVL

RT8209BGQW _WQFN14_3P5X3P5

8

12

PR82

12

PR84

UG_1.5V

13

LX_1.5V

12

11

10

LG_1.5V

9

PR95

7.87K_0402_1%

PC57

PR91

0_0603_5%

1 2

12

68P_0402_50V8J

BST_1.5V-1

12

+0.75VSP_EN#(35)

12

PC58

22U_0805_6.3VAM

PC71

1 2

0.1U_0603_25V7K

+5VALW

12

+1.8VSP

12

PC59

22U_0805_6.3VAM

PR87

0.1U_0402_16V7K

PQ33

PQ33 AO4726L_SO8

AO4726L_SO8

PC75

4.7U_0805_10V6K

PR87

0_0402_5%

1 2

@PC6 4

@

PC64

578

3 6

678

35241

2N7002W- T/R7_SOT323-3

12

PQ32

PQ32 AO4466_SO8

AO4466_SO8

241

Rdson typ=5.3m ohm max=7m ohm

+1.5V

1

PJ13

1

JUMP_43X79

2

PC62

4.7U_0603_6.3V6M

12

PC67

2200P_0402_50V7K

1.8UH_MSCDRI-104A- 1R8N-E_9.5A_30%

12

@PR9 3

@

4.7_1206_5%

12

@PC7 4

@

680P_0402_50V7K

PQ31

2

G

51117_1.5V_B+

12

PC68

4.7U_0805_25V6-K

PL10

1 2

PR93

PC74

1 2

13

12

4.7K_0402_1%

D

4.7K_0402_1%

S

PC69

4.7U_0805_25V6-K

PU5

PR86

PR88

PJ17

2

JUMP_43X118

1

VIN

2

12

112

12

PC65

2.2U_0402_6.3V6M

B+

GND

3

VREF

4

VOUT

APL5336KAI-TRL_SOP8P8

+0.75VSP

12

PC66

PC66 10U_0805_6.3V6M

10U_0805_6.3V6M

VCNTL

8

NC

7

NC

6

5

NC

9

TP

+1.5VP

1

+

PC73

330U_2.5V_M

2

VFB=0.75V Vo=VFB*(1+PR116/PR113)=1.52V Ton=19E-12*Ron*(((2/3)*Vo+100mV)/Vin)+50ns=3.8E-7 Freq=282KHz(min) , 300KHz(typ)

Cesr=15m ohm Ipeak=8.56A Imax=5.99A Delta I=((19-1.5)*(1.5/19))/(L*Freq)=2.56A Vtrip=Rtrip*10uA=0.0787V Iocp-min=Vtrip/(Rds(on)(max)*1.2)+Delta I / 2= 10.64A Iocp-max=Vtrip/(Rds(on)(typ)*1.2)+Delta I / 2=13.65A Iocp=10.64~13.65A

12

PC63

PC63 1U_0402_6.3V6K

1U_0402_6.3V6K

+3VALW

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/08/25 2010/08/25

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size D ocument Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

+1.8VSP/+1.5VP/+0.75VSP

SR40 Schematic

44 51Monday, November 22, 2010

1

0.1

5

D D

PR100

0_0402_5%

1 2

VTT_ON(35)

C C

+5VALW

Layout Note: Place near V5FILT Pin

B B

H_VTTPWRGD(5,31)

12

PR102

@PR102

@

47K_0402_5%

PR104

PR104 100_0603_5%

100_0603_5%

1 2

PC87

4.7U_0603_6.3V6K

5.76K_0402_1%

3.65K_0402_1%

PR110

12

@PC83

@

1U_0402_6.3V6K

12

PR107

12

PC83

12

1 2

PR109

0_0402_5%

PC88

@ PC88

@

47P_0402_50V8J

1 2

PR106

2.4K_0402_1%

1 2

+5VS

12

PR108

2K_0402_1%

4

PR99

PR99 280K_0402_1%

280K_0402_1%

1 2

2

3

4

5

6

VFB=0.75V

PU7

TON

VOUT

V5FILT

VFB

PGOOD

BST_1.05V1.05V_EN

1

14

15

TP

VBST

EN_PSV

V5DRV

GND7PGND

RT8209BGQW_WQFN14_3P 5X3P5

8

DRVH

TRIP

DRVL

3

51117_1.05V_B+

12

5

4

PR101

0_0603_5%

BST_1.05V-1

1 2

UG_1.05V

13

LX_1.05V

12

LL

11

10

LG_1.05V

9

12

PR105

7.5K_0402_1%

PC82

0.1U_0603_25V7K

1 2

+5VALW

12

PC86

4.7U_0805_10V6K

4

PC78

PQ34

PQ34 TPCA8030-H_SOP-ADV8-5

TPCA8030-H_SOP-ADV8-5

123

PQ35

PQ35 TPCA8028-H_SOP-ADVANCE8-5

TPCA8028-H_SOP-ADVANCE8-5

123 5

12

PC79

4.7U_0805_25V6-K

2200P_0402_50V7K

2

PJ18

2

112

JUMP_43X118

PC80

4.7U_0805_25V6-K

PL12

1.0UH_PCMC104T-1R0MN_20A_ 20%

1 2

12

PR103

@PR103

@

4.7_1206_5%

12

PC85

@PC85

@

680P_0402_50V7K

B+

1

+

2

PR98

10_0402_1%

1 2

PC84

PC84 330U_2.5V_M

330U_2.5V_M

1

PR98

VTT_SENSE (7)

+1.05VS_VTTP

Rdson=2.3mΩ/3.2mΩ

VFB=0.75V Vo=VFB*(1+PR115/PR114)=1.062V Ton=19E-12*Ron*(((2/3)*Vo+100mV)/Vin)+50ns=2.74E-07 Freq=282KHz , 300KHz(typ)

Cesr=15m ohm Ipeak=17.2A Imax=12.04A Delta I=((19-1.05)*(1.05/19))/(L*Freq)=3.306A Vtrip=Rtrip*10uA=0.075V Iocp-min=Vtrip/(Rds(on)(max)*1.2)+Delta I / 2= 21.18A Iocp-max=Vtrip/(Rds(on)(typ)*1.2)+Delta I / 2=28.82A Iocp=21.18A~28.82A

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERT Y OF COMPAL ELECTRONICS, INC. AND CONTAINS CON FIDENTIAL

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERT Y OF COMPAL ELECTRONICS, INC. AND CONTAINS CON FIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/11/23 2010/11/23

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

+1.05VS_VTTP

SR40 Schematic

45 51Monday, November 22, 2010

1

0.1

5

4

3

2

1

Intel Auburndale CPU(Integrate Graphics) Ipeak=22A Imax=15A OCP calculation : Assume DCR=1.1m ohm G1=Rn/(Rn+Rsum)=0.617 where Rn=PR127 // (PR124+PH3)=5.875k ohm Rsum=PR119=3.65k ohm

D D

C C

+VGFX_COREP

B B

LL=2*Rdroop*G1*DCR/Ri= 6.96m V/A where Rdroop=PR121=2.87k ohm, Ri=PR130=562 ohm Iocp=OCP Threshold*Rdroop/LL=24.89A

B+

PJ19

2

112

JUMP_43X118

PR114

12

10_0402_1%

VSS_AXG_SENSE(8)

VCC_AXG_SENSE(8)

PR116

10_0402_1%

PR116

12

PC106

150P_0402_50V8J

8.66K_0402_1%

12

PC106

PC97

1000P_0402_50V7K

1 2

PC100

330P_0402_50V7K

PR121

12

PR125

17.8K_0402_1%

PR122

825K_0402_1%

1 2

22P_0402_50V8J

GFX_B+

12

PC90

2200P_0402_50V7K

12

PR122

1 2

PC102

100P_0402_50V8J

PC107

1 2

GFX_CORE_PWRGD(33)

12

PC91

10U_1206_25V6M

PC99

330P_0402_50V7K

PC103

1000P_0402_50V7K

PR126

8.06K_0402_1%

PC103

12

PR126

12

PC92

10U_1206_25V6M

147K for CPU 47K for GPU

PC93

@ PC93

@

12

0.1U_0402_25V6

+5VALW

47K_0402_1%

PR118

Vvid = 1.25 LL = 7m ohm Iccaxg = 22A Icctdc_axg = 12 A Iccaxg_dyn 19 A

PR112

12

1_0603_5%

7

VSEN

6

FB

5

COMP

4

VW

12

3

RBIAS

2

PGOOD

1

CLK_EN#

PR111

12

PC94

1U_0402_6.3V6K

ISUM+

ISUM-

8

29

9

RTN

ISUM

AGND

PU8

ISL62881HRZ-T_QFN28_4X4

28

PR111

0_0603_5%

10

11

VDD

ISUM+

VID5

25

PR113

22.6K_0402_1%

PR115

DH_GFX

LX_GFX

DL_GFX

PR123

12

VSS_AXG_SENSE

PC96

0.22U_0402_6.3V6K

1 2

PC98

0.22U_0603_25V7K

PR123

1 2

0_0603_5%

PC105

2.2U_0603_6.3V6K

PR140

@ PR140

@

0_0402_5%

PC96

GFXVR_IMON (8)

+5VALW

Rds=2.3mOHM(typ) Rds=3.2mOHM(max)

PR1280_0402_5% PR1280_0402_5%

12

GFXVR_VID_0 (8)

PR1290_0402_5% PR1290_0402_5%

12

GFXVR_VID_1 (8)

PR1310_0402_5% PR1310_0402_5%

12

GFXVR_VID_2 (8)

PR1330_0402_5% PR1330_0402_5%

12

GFXVR_VID_3 (8)

PR1340_0402_5% PR1340_0402_5%

12

GFXVR_VID_4 (8)

PR1350_0402_5% PR1350_0402_5%

12

GFXVR_VID_5 (8)

PR1370_0402_5% PR1370_0402_5%

12

GFXVR_VID_6 (8)

PR1380_0402_5% PR1380_0402_5%

12

GFXVR_EN (8)

PR1390_0402_5% PR1390_0402_5%

12

GFXVR_DPRSLPVR (8)

12

+1.05VS_VTT_CPU

5

4

PQ36

TPCA8030-H_SOP-ADV8-5

123

PQ37

TPCA8028-H_SOP-ADVANCE8-5

123 5

Layout Note: Place near Choke

12

PR117

@ PR117

@

4.7_1206_5%

PC104

@ PC104

@

680P_0603_50V7K

1 2

ISUM+

ISUM-

12

PR124

2.61K_0402_1%

DCR=1.1 mOHM

PL14

0.45UH_PCMB104T-R45MN_25A_20%

PR119

3.65K_0805_1%

PR124

1 2

PR127

11K_0402_1%

1 2

PC108

0.1U_0402_16V7K

1 2

PC109

0.1U_0402_16V7K

PR136

82.5_0402_1%

1 2

1

4

3

2

PR119

PH3

PH3 1 2

10K +-5% TSM0A103J4302RE 0402

PR127

PC108

PC109

PR130

1.69K_0402_1%

1 2

PC110

0.01U_0402_16V7K

+VGFX_COREP

12

PR120

0_0402_5%

1 2

1

+

+PC101

2

PR132

@ PR132

@

100_0402_1%

PC111

@ PC111

@

180P 50V J NPO 0402

330U_X_2VM_R6M

PR120

Material Note: 330uF/6 mΩ, number are 3, PW 1, HW 1, 1 of HW is backup

1 2

PC101

1 2

PC95

12

PC95

1 2

0.22U_0603_25V7K

BST_GFX

1 2

0_0603_5%

13

14

12

VIN

IMON

BOOT

15

UGATE

16

PHASE

17

VSSP

18

LGATE

19

VCCP

20

VID0

21

VID1

VID2

VID323VID424VID626VR_ON27DPRSLPVR

22

2009-1214 common circiut modify.

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

5

4

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

3

2009/4/15 2010/04/15

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

C

Date: Sheet of

Compal Electronics, Inc.

GFX_COREP

SR40 Schematic

1

46 51Monday, November 22, 2010

0.1

8

7

6

5

4

3

2

1

HFM_Icc LL

H H

(7)

CPU_VID0

CPU_VID1

CPU_VID3

CPU_VID2

H_PSI#

CPU_VID5

CPU_VID4

CPU_VID6

(7)

H_DPRSLPVR

PH0 PH1 # of PH

0 1

1 1

2

3

Auburndale 45W

Clarksfield SV

Clarksfield XE

+5VALW

G G

+3VS

PR144

PR144 3K_0402_5%

3K_0402_5%

1 2

VGATE(15)

PR151

@ PR151

@

0_0402_5%

PC122 150P_0402_50V8JPC122 150P_0402_50V8J

1 2

PR157

1.65K_0402_1%

1 2

PR164

0_0402_5%

1 2

CLK_EN#

12

PC120

0.068U_0402_16V7K

150P_0402_50V8J

+5VALW

PR169 0_0402_5%PR169 0_0402_5%

+5VALW

12

PR174

7.32K_0402_1%

12

PR178

PR178 0_0402_5%

0_0402_5%

PH5

100K_0402_1%_NCP15WF104F03RC

1 2

VCCSENSE

VSSSENSE

@PR182

@

100_0402_1%

5.49K_0402_1%

1 2

PR163

PR163 0_0402_5%

0_0402_5%

PR149 0_0402_5%PR149 0_0402_5%

+1.05VS_VTT_CPU

12

PR155

1 2

H_PROCHOT#(5)

CLK_ENABLE#(12)

F F

IMVP_IMON(7)

PC121

1000P_0402_50V7K

E E

D D

Avoid high dV/dt

C C

B B

A A

8

PR150 0_0402_5%PR150 0_0402_5%

1 2

3212_FB

PC124

39.2K_0402_1%

1 2

PR159 5.11K_0402_1% PR159 5.11K_0402_1%

1 2

PQ43

PR181

@PR181

@

100_0402_1%

12

PR182

+3VS

12

PR145

1 2

3K_0402_5%

PR147 0_0402_5%PR147 0_0402_5%

IMVP_IMON

CLK_EN#

3212_FBRTN

12

PC123

12P_0402_50V8J

PR158

12

3212_VRTT

TTSense

+3VS

PR165

@

499_0402_1%

1 2

13

D

3212_VRTT

2

G

S

2N7002W-T/R7_SOT323-3

Connect to input caps

TTSense

12

PC132

0.01U_0402_50V7K

+CPU_CORE

VCCSENSE (7)

VSSSENSE (7)

7

(33)

VR_ON

12

PR142 0_0402_5%PR142 0_0402_5%

+CPU_B+

PU9

1

EN

2

PWRGD

3

IMON

4

CLKEN

5

FBRTN

6

FB

7

COMP

8

TRDET

9

VARFREQ

10

VRTT

11

TTSNS

12

GND

PR166

80.6K_0402_1%

69.8K_0402_1%

1K_0402_1%

1000P_0402_50V7K

CSREF

48

NCP3218MNR2G_QFN48_6X6

IREF

15

14

13

12

PR168

162K_0402_1%

PR167

12

PR173

PR173 649K_0402_1%

649K_0402_1%

PR176

12

PC133

1U_0603_16V6K

Ipeak = 38A, Imax = 29A Delta I = 8.56A RILIM = Vdroop/ILIM = Iocp*Ro/ 20uA RILIM = 2.05K ohm, Iocp = 43A, Ro = LL = 1.9m ohm Rcs = (PH4*PR175)/(PH4+PR175) + PR177 = 207K ohm Ro = Rcs*Rsense / PR179 Ro = LL = 1.9m ohm, Rcs = 207K ohm, Rsense = DCR = 1.1m ohm, so PR179 = 137K ohm

41

VID642VID543VID444VID345VID246VID147VID0

CSSUM19LLINE17RT

RAMP16RPM

18

3212_CSCOMP

PC130

PC134

1 2

6

12

PR143 499_0402_1%PR143 499_0402_1%

40

39

PSI

PH138PH0

DPRSLP

OD3

ILIM21PWM3

CSCOMP20CSREF

22

23

12

PR172

2.05K_0402_1%

12

560P_0402_50V7K

PR179 127K_0603_1%PR179 127K_0603_1%

PR180 127K_0603_1%PR180 127K_0603_1%

12

37

VCC

SWFB3

24

2.05K

PC131

1200P_0402_50V7K

12

PR141

PR141 10_0603_5%

10_0603_5%

BST1

DRVH1

SWFB1

PVCC

DRVL1

PGND

DRVL2

SWFB2

DRVH2

BST2

1 2

165K_0402_1%

1 2

AGND

SW1

SW2

TP

49

PR177

1 2

PC117

1U_0603_16V6K

36

35

34

33

32

31

30

29

28

27

26

25

PR175

3212_CS_PH1

3212_CS_PH2

PR148

0_0603_5%

12

PR153

2.2_0603_5%

3212_DRVH1

PR156 100_0402_1%

1 2

3212_DRVL1

3212_DRVL2

PR160 100_0402_1%

1 2

3212_DRVH2

PR161

2.2_0603_5%

Place PH1 close to PHASE 1 inductor on the same layer

12

73.2K_0402_1%

5

PGND

PC118

0.1U_0603_25V7K

3212_SW1

3212_CS_PH1

3212_SW2

PC128

0.1U_0603_25V7K

12

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

12

3212_CS_PH2

12

PH4

100K_0402_1%_NCP15WF104F03RC

1 2

12

PC125

4.7U_0603_6.3V6K

Issued Date

3212_DRVH1

+5VALW

4

5

PQ39

TPCA8030-H_SOP-ADV8-5

PR146

0_0603_5%

3212_DRVH1_1

12

3212_SW1

PQ40

TPCA8028-H_SOP-ADVANCE8-5

PR162

0_0603_5%

3212_DRVH2

TPCA8028-H_SOP-ADVANCE8-5

PQ40

3212_DRVL1

3212_DRVH2_1

12

3212_SW2

PQ42

3212_DRVL2

2009/02/04 2010/02/04

TPCA8030-H_SOP-ADV8-5

4

123

4

123 5

5

PQ41

TPCA8030-H_SOP-ADV8-5

4

123

4

123 5

Compal Secret Data

Deciphered Date

3

HFM_VID

1.075

0.975

50

38

51

0.95 TBD

65

12

PR152

4.7_1206_5%

12

PC119

680P_0603_50V7K

12

PC126

4.7U_0805_25V6-K

12

PR170

4.7_1206_5%

12

PC129

680P_0603_50V7K

1.9m

12

DCR=1.1m OHM

+CPU_B+

12

PC127

4.7U_0805_25V6-K

PR170

PC129

Title

Size Document Number Rev

C

Date: Sheet of

2

Icc_Dyn

Icc_TDC

37

35

27

29Auburndale 35W

39

380.95

TBD

48

+CPU_B+

PC113

PC112

4.7U_0805_25V6-K

0.36UH +-20% ETQP4LR36WFC 24A

3212_CS_PH1

0.36UH +-20% ETQP4LR36WFC 24A

3212_CS_PH2

PL15

FBMA-L18-453215-900LMA90T_1812

12

PC114

4.7U_0805_25V6-K

PL16

1

4

3

2

PL17

1

4

3

2

1 2

CSREF

Compal Electronics, Inc.

CPU_CORE

SR40 Schematic

PC115

560P_0402_50V7K

12

PR154

PR154 10_0402_5%

10_0402_5%

CSREF

PR171

PR171 10_0402_5%

10_0402_5%

B+

12

1

12

+

2

1

PC116

47 51Monday, November 22, 2010

1

+

100U_25V_M

2

+CPU_CORE

B+

PC135

100U_25V_M

0.1

5

4

3

2

1

Version change list (P.I.R. List) Page 1 of 2

for PWR

Reason for change Rev. PG# Modify List Date PhaseFixed IssueItem

D D

1

2

change bead to jamp 6 layers change to 8 layers, so change b ead to jamp

change bead to jamp 6 layers change to 8 layers, so change b ead to jamp 2010-0617

change bead to jamp 6 layers change to 8 layers, so change b ead to jamp

0.1

0.1 51 del PL6 SM010016380 (FBMA-L11-322513-201LMA40T) to DVT

0.1 52 to DVT

3

change bead to jamp

6 layers change to 8 layers, so change bead to jamp

0.1

4

change bead to jamp

6 layers change to 8 layers, so change bead to jamp

0.1

5

6

7

C C

8

9

10

11

12

13

14

B B

15

16

17

18

change main souce cost down

reduce components quantity cost down 0.1 53

reduce components quantity

cost down 0.1 52

change main souce cost down 0.1 51

change main souce cost down 0.1 50

Because Rds(on) change to 22m(MAX) and 17.4m(TYP) ohm of low side MOS, so change OCP setting

change main souce ISL62881C has hang up issue, so change to ISL62881. 0.2 54

adjust resistance value

adjust resistance value for ISL62881

adjust resistance value adjust resistance value for ISL62881

add resistance pop resistance for ISL62881

add cup. pop Cup. for ISL62881

0.1

0.2

19

20

21

A A

22

add cup. Because ME height limit, so add an 8 height capacitor. 0.2 55 Add PC135 SF000000S80 (S ELE CAP 100U 25V M

adjust resistance value adjust resistance value for CPU loadline 0.2 55

1 del PC14 SE074681K80 (S CER CAP 680P 50V K X7R 0402) 2 del PL3 SM010016380 (FBMA-L11-322513-201LMA40T)

50

1 del PC70 SE074561K80 (S CER CAP 560P 50V K X7R 0402) 2 del PL9 SM010016380 (FBMA-L11-322513-201LMA40T)

1 del PC81 SE074561K80 (S CER CAP 560P 50V K X7R 0402)

53 to DVT

2 del PL11 SM010020720 (FBMA-L18-453215-900LMA90T)

1 del PC89 SE074561K80 (S CER CAP 560P 50V K X7R 0402)

54

2 del PL13 SM010016380 (FBMA-L11-322513-201LMA40T)

Chnage PQ36 from SB000008L80(S TR SI7686DP-T1-E3 1N POWERPAK SO8) to SB00000HL00(S TR TPCA8030-H 1N SOP-ADV) change PQ37 from SB000009F80(S TR AO4456 1N SO8)

54

to SB00000GL00(S TR TPCA8028-H 1N SOP ADVANCE) Del PQ38 SB000009F80(S TR AO4456 1N SO8)

Chnage PR104 from SD014100080(S RES 1/10W 100 +5% 0603) to SD013100080 (S RES 1/10W 100 +-1% 0603)

Chnage PR94 from SD014100080(S RES 1/10W 100 +5% 0603) to SD013100080 (S RES 1/10W 100 +-1% 0603)

Chnage PQ15, PQ17 from SB00000DL00(S TR AO4407A 1P SO8) to SB00000DJ10 (S TR AO4435L 1P SO8)

Chnage PQ27 from SB00000CG00(S TR AO4466 1N SO8) to SB000009580 (S TR AO4468 1N SO8)

Chnage PQ9 from SB00000AJ00(S TR AO4712 1N SO8) to SB000009580 (S TR AO4468 1N SO8)

Chnage PR31 from SD034105380(S RES 1/16W 105K +-1% 0402)

500.1adjust OCP setting

to SD034127380 (S RES 1/16W 127K +-1% 0402)

Chnage PU8 from SA000043N00(S IC ISL62881CHRZ-T QFN 28P PWM) to SA000030200 (S IC ISL62881HRZ-T QFN 28P PWM)

Chnage PR113 from SD034750180(S RES 1/16W 7.5K +-1% 0402)

54

to SD034226280 (S RES 1/16W 22.6K +-1% 0402)

Chnage PR121 from SD034287180(S RES 1/16W 2.87K +-1% 0402)

54

to SD034866180 (S RES 1/16W 8.66K +-1% 0402)

Chnage PR130 from SD000009380(S RES 1/16W 562 +-1% 0402)

54

to SD00000JB80 (S RES 1/16W 1.69K +-1% 0402)

add PR136 SD034825A80(S RES 1/16W 82.5 +-1% 0402)

54

add PC110 SE076103K80(S CER CAP .01U 16V K X7R 0402)

54

Chnage PC116 from SF22004M210(S ELE CAP 220U 25V M 8X10.2 CE-AX) to SF000000S80 (S ELE CAP 100U 25V M

6.3X7.7 CE-LX)

6.3X7.7 CE-LX) Chnage PR179 and PR180 from SD014137380(S RES 1/10W 137K +-1% 0603) to SD014127380(S RES 1/10W 127K +-1% 0603)

Chnage PR28 from SD034300280(S RES 1/16W 30K +1% 0402) to SD034309280(S RES 1/16W 30.9K +-1% 0402)

2010-0617 to DVT

2010-0617

to DVT

2010-0624 to DVT

2010-0713 to DVT

2010-0713

to DVT

2010-0713 to DVT0.2 55adjust capacitor Because ME height limit, so change to 8 height capacitor.

2010-0713 to DVT

2010-0715

2010-0723

to DVT

to DVTadjust resistance value for +5Valwp to 5.1V 0.2 50adjust resistance value

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2007/09/20 2008/09/20

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet o f

2

Date: Sheet o f

Compal Electronics, Inc.

PIR (PWR)

48 51Thursday, October 2 8, 2010

1

0.1

5

PQ44

AO4435L_SO8

PJ21

2

112

JUMP_43X39

PR183

D D

HV_15V_EN(33)

C C

PR183

100K_0402_5%

2N7002W-T/R7_SOT323-3

CH751H-40PT_SOD323-2

1 2

PQ45

1 2

PR187

10K_0402_5%

PD10

1 2 3 6

12

PC136

0.01U_0402_16V7K

PR185

10K_0402_5%

21

100K_0402_5%

AO4435L_SO8

4

1 2 13

D

2

G

S

PR188

1 2

8 7

5

HV_15V_EN#(39)

12

4

12

PC140

0.01U_0402_16V7K

PC139

0.1U_0402_10V7K

PC137

1U_0402_6.3V6K

PL18

1 2

22UH_NR3010T220M_20%

PU10

6

VIN

LX

4

EN

VOUT

2

GND

FB

RT9293AGJ6_TSOT23-6

1

5

3

FB=0.104V

PD9

SX34 SMA

3

12

PR184

PR184 143K_0402_1%

143K_0402_1%

1 2

PR186

1K_0402_1%

1 2

PC138

12

PC141

@

10U_0805_25V6K

2

HV_15VP+5VALW

1

B B

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/10/02 2010/10/02

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

12V

49 51Monday, November 22, 2010

1

0.3

5

4

3

2

1

Version change list (P.I.R. List) Page 2 of 2

for PWR

Reason for change Rev. PG# Modify List Date PhaseFixed IssueItem

D D

1

Add boost resister EMI reguest add boost resister for EMI test 0.3 47

2

0.3

Add snubber EMI reguest add snubber for EMI test 0.3 47

3

Add boost circuit

4

5

Add boost circuit

6

Add boost circuit

7

C C

Add boost circuit

8

Add boost circuit

9

Touch panel control board need high voltage 15V

0.3 49

0.3

10

change PJ16 to SD011000080(S RES 1/4W 0 +-5% 1206)

43

change PR153 and PR161 form SD013000080 to

SD013220B80(S RES 1/10W 2.2 +-5% 0603) Add PR152 and PR170 SD001470B80(S RES 1/4W 4.7 +-5% 1206) Add PC119 and PC129 SE025681K80(S CER CAP 680P 50V K X7R

0603)

Add PU10 SA00004DD00(S IC RT9293AGJ6 TSOT-23 6P BOOST) Add PL18 SHI00005P00(S INDUC_ 22UH +-20% NR3010T220M)

Add PD9 SCSSSM24A20(S DIO SSM24APT SMA-S) Add PQ44 SB00000DJ10(S TR AO4435L 1P SO8)

49

Add PQ45 SB000006800(S TR 2N7002W T/R7 1N SOT-323)

Add PD10 SC1H751H010(S DIO CH751H-40PT SOD323) Add PR183, PR188 SD028100380(S RES 1/16W 100K +-5% 0402)

49

Add PR185, PR187 SD028100280(S RES 1/16W 10K +-5% 0402)

Add PC136, PC140 SE076103K80(S CER CAP .01U 16V K X7R 0402) Add PC137 SE00000OU00(S CER CAP 1U 16V K X5R 0402)

49

Add PC139 SE102104K00(S CER CAP 0.1U 10V +-10% X7R 0402)

Add PR184 SD034143380(S RES 1/16W 143K +-1% 0402)

49

Add PR186 SD034100180(S RES 1/16W 1K +-1% 0402)

Add PC138 SE00000QK00(S CER CAP 10U 25V K X5R 0805 H1.25)

49

2010-0907 PVTEMI reguest reserve 0 ohm EMI reguest reserve 0 ohm for EMI ISN test

2010-0907 PVT

2010-0907

PVT

11

12

13

14

B B

15

16

17

18

19

20

21

A A

22

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2007/09/20 2008/09/20

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet o f

2

Date: Sheet o f

Compal Electronics, Inc.

PIR (PWR)

50 51Thursday, October 2 8, 2010

1

0.1

5

4

3

2

1

Version change list (P.I.R. List) Page 1 of 2 for HW

Reason for change Rev. PG# Modify List Date PhaseFixed IssueItem

D D

1

2

3

4

5

6

7

C C

8

9

10

11

12

13

14

15

B B

16

17

18

19

20

21

22

A A

23

0.1 48

0.1

0.1 53

0.1 46

0.1 47

0.1

0.1 48

0.1

0.2 46

0.2 51

0.2 53

0.2

0.2 55

0.2 53

0.2 55

0.2 52

50

51

52

520.2

52

50

480.2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/11/23 2010/11/23

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet o f

2

Date: Sheet o f

Compal Electronics, Inc.

PIR (PWR)

NEW70 M/B LA-5891P Schematic

51 51Tuesday, September 07, 2 010

1

0.1

Acer 6120 Schematic

Specifications and Main Features

Frequently Asked Questions

User Manual