Page 1
A
Garda-D Block Diagram
(Discrete)
4 4
DDR2
533 MHz
533 MHz
3 3
Line In
29
29
MIC In
INT.MIC
Line Out
(SPDIF)
29
2 2
29
INT.SPKR
1 1
CLK GEN.
IDT CV125PA
(ICS 954206)
DDR2
RJ11
3
533/667MHz
11,12
533/667MHz
11,12
Codec
ALC883
AZALIA
28
OP AMP
G1421B
29
MODEM
MDC Card
New card
PWR SW
TPS2231
21
PCI Express
30
30
Yonah 478
1.83G/2G/2.16G
Ver.:A3 :71.945PM.A0U / QK58
HDD
20
B
Mobile CPU
HOST BUS
400/533/667MHz
Calistoga
6,7,8,9,10
DMI I/F
100MHz
ICH7M
Ver. : B0, 71.ICH7M.A0U / QK65
KI.80101.017
15,16,17,18
PATA
SATA
CDROM
USB
3 PORT
18
21
MINI USB
Blue-tooth
4, 5
G792
PCI Express x16
M56 Ver.: B24
M52 Ver.: A12
M54 Ver.: A12
PCI BUS
PCIEx1
SPI I/F
LPC BUS
21
C
19
ATI
M54P / M52P
45,46,47,48,49
VRAM x4
128/256M
50,51
TI
PCI 7412
CARDBUS
1394
CardReader
LAN
10/100
BCM4401-E
BIOS
SST25LF080A
34
SIO
NS87381
FIR
32
32
Project code: 91.4A901.001
PCB P/N : 55.4A901.XXX
REVISION : 05217-1
(Hannstar, ACCL)
-1M-0111
LVDS
14"WSXGA+
LCD
RGB CRT
PCMCIA I/F
PWR SW
TSP2220A
27
24,25
Mini-PCI
802.11A/B/G
22
KBC
Renesas
RE144B
Touch
Pad
33 33
1394
CONN
TXFM
Mini Card*1
26
30
23
802.11A/B/G
31
INT.
KB
MS/MS Pro/xD/
MMC/SD/SDIO
RJ45
LPC
DEBUG
CONN.
TVO
CRT
PCMCIA
SLOT
Support
TypeII
6 in 1
23
26
34
D
TOP
14
GND
S
13
S
VCC
14
S
GND
BOTTOM
27
26
BCM5787MKFBG-A1
BCM5789KFBG-C1
BCM4401EKFBG-B0
Giga LAN
BCM5789/5787M
E
SYSTEM DC/DC
TPS51120
PCB STACKUP
35
INPUTS
DCBATOUT
SYSTEM DC/DC
TPS51124
INPUTS OUTPUTS
DCBATOUT
TPS51100
APL5332KAC
3D3V_S0 2D5V_S0
APL5912-U
1D8V_S3 1D5V_S0
MAXIM CHARGER
MAX8725
DCBATOUT
CPU DC/DC
ISL6262
INPUTS
DCBATOUT
OUTPUTS
5V_S5
3D3V_S5
1D05V_S0
1D8V_S3
DDR_VREF_S0 1D8V_S3
OUTPUTS INPUTS
CHG_PWR
18V 4.0A
UP+5V
5V 100mA
OUTPUTS
VCC_CORE_S0
0~1.3V
44A
ATI M54 DC/DC
FAN5234
INPUTS
DCBATOUT
1D8V_S0 1D2V_S0
<Variant Name>
<Variant Name>
<Variant Name>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet of
Date: Sheet of
BLOCK DIAGRAM
BLOCK DIAGRAM
BLOCK DIAGRAM
AG1 -1M
AG1 -1M
AG1 -1M
OUTPUTS
VGA_CORE_S0
APL5331KAC
15 3 Wednesday, January 11, 2006
15 3 Wednesday, January 11, 2006
15 3 Wednesday, January 11, 2006
of
40
41
43
43
43
42
38,39
52
43
Page 2
A
ICH7M Integrated Pull-up
and Pull-down Resistors
EE_DIN, EE_DOUT,
GNT[4]#/GPIO48,
LAD[3:0]#/FHW[3:0]#,
LDRQ[0], LDRQ[1]/GPIO[41],
4 4
PWRBTN#,
DDREQ
DD[7],
ACZ_BIT_CLK, ACZ_RST#, ACZ_SDIN[2:0],
EE_CS,
SPI_ARB, SPI_CLK,
USB[7:0][P,N]
LAN_CLK
GNT[3:0],
GNT[5]#/GPO17,
TP[3]
ACZ_SYNC, ACZ_SDOUT,
GPIO[25],
PME#,
LAN_RXD[2:0]
DPRSLPVR/GPIO16,
SPKR,
ICH7 internal 20K pull-ups
ICH7 internal 11.5K pull-downs
ICH7 internal 20K pull-downs
ICH7 internal 15K pull-downs
ICH7 internal 15K pull-up SATALED#
ICH7 internal 100K pull-down
ICH7-M EDS 17837 1.5V1
ICH7M IDE Integrated Series
Termination Resistors
3 3
DD[15:0],
DDACK#,
DCS3#,
IORDY,
IDEIRQ
DIOR#, DREQ, DIOW#,
DA[2:0],
DCS1#,
approximately 33 ohm
ICH7M Functional Strap Definitions
Signal
ACZ_SDOUT
ACZ_SYNC
EE_CS
EE_DOUT
2 2
GNT2#
GNT3#
GNT5#/
GPIO17#,
GNT4#/
GPIO48
DPRSLPVR Reserved
GPIO25
INTVRMEN
LINKALERT#
REQ[4:1]#
1 1
SATALED#
SPKR
TP3
Usage/When Sampled
XOR Chain Entrance/
PCIE Port Config bit1,
Rising Edge of PWROK
PCIE bit0,
Rising Edge of PWROK.
Reserved
Reserved
Reserved
Top-Block
Swap Override.
Rising Edge of PWROK.
Boot BIOS Destination
Selection.
Rising Edge of PWROK.
Reserved.
Rising Edge of RSMRST#.
Integrated VccSus1_05
VRM Enable/Disable.
Always sampled.
Reserved
XOR Chain Selection.
Rising Edge of PWROK.
Reserved This signal should not be pull low.
No Reboot.
Rising Edge of PWROK.
XOR Chain Entrance.
Rising Edge of PWROK.
Allows entrance to XOR Chain testing when TP3
pulled low.When TP3 not pulled low at rising edge
of PWROK,sets bit1 of RPC.PC(Config Registers:
offset 224h)
Sets bit0 of RPC.PC(Config Registers:Offset 224h)
This signal should not be pull high.
This signal should not be pull low.
This signal should not be pull low.
Sampled low:Top-Block Swap mode(inverts A16 for
all cycles targeting FWH BIOS space).
Note: Software will not be able to clear the
Top-Swap bit until the system is rebooted
without GNT3# being pulled down.
Controllable via Boot BIOS Destination bit
(Config Registers:Offset 3410h:bit 11:10).
GNT5# is MSB, 01-SPI, 10-PCI, 11-LPC.
This signal should not be pull high.
This signal should not be pull low.
Enables integrated VccSus1_05 VRM when
sampled high
Requires an external pull-up resistor.
TBD, Chapter 8.
If sampled high, the system is strapped to the
"No Reboot" mode(ICH7 will disable the TCO Timer
system reboot feature). The status is readable
via the NO REBOOT bit.
This signal should not be pull low unless using
XOR Chain testing.
Comment
B
954305D 27Mhz/LCDCLK Spread
and Frequency Selection Table
SS3
SS2
Byte9
bit 7
000
0000
0
0
0
0
0
1 +-0.25 Center
1
1
1
1
1
11
11
SS1
bit6
bit5
1
0
1
0
0
1
0
1
1
1
11
0
0
00
001
1
0
1
0
1
1
1
PCI Routing
7412
page 16
MiniPCI
LAN
22
21
23
SS0
bit4
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
C
Spread Amount%
-0.50 Down
-1.00 Down
-1.50 Down
-2.00 Down
-0.75 Down
-1.25 Down
-1.75 Down
-2.25 Down
+-0.5 Center
+-0.75 Center
+-1.0 Center
+-0.25 Center
+-0.5 Center
+-0.75 Center
+-1.0 Center
page 16
INT -> PIRQ
A->G, B->B,
C->F, D->G
A/C -> E
B/D -> E
A -> H
D
E
Calistoga Strapping Signals and
Configuration
page 3
REQ/GNT IDSEL
Pin Name
CFG[2:0]
CFG[4:3]
CFG5
CFG7
CFG8
CFG9
CFG[11:10] Reserved
CFG[13:12]
CFG[15:14]
CFG16
CFG17
CFG18
CFG19
0
1
2
CFG20
SDVOCRTL
_DATA
All strap signals are sampled with respect to the leading
NOTE:
edge of the Calistoga GMCH PWORK in signal.
Strap Description
FSB Frequency Select
Reserved
DMI x2 Select
Reserved CFG6
CPU Strap
Reserved
PCI Express Graphics
Lane Reversal
XOR/ALL Z test
straps
Reserved
FSB Dynamic ODT
Global R-comp Disable
(All R-comps)
VCC Select
DMI Lane Reversal
SDVO/PCIE
Concurrent
SDVO Present
EDS 17050 0.71
Configuration
001 = FSB533
011 = FSB667
others = Reserved
0 = DMI x2
1 = DMI x4
0 = Reserved
1 =Mobile CPU(Default)
0 = Reverse Lanes,15->0,14->1 ect..
1= Normal operation(Default):Lane
Numbered in order
00 = Reserved
01 = XOR mode enabled
10 = All Z mode enabled
11 = Normal Operation
(Default)
Reserved
0 = Dynamic ODT Disabled
1 = Dynamic ODT Enabled
0 = All R-comp Disable
1 = Normal Operation (Default)
0 = 1.05V
1 = 1.5V
0 = Normal operation (Default):lane
Numbered in order
1 =Reverse Lane,4->0,3->1 ect...
0 = Only SDVO or PCIE x1 is
operational (Default)
1 =SDVO and PCIE x1 are operating
simultaneously via the PEG port
0 = No SDVO Card present
1= SDVO Card present
(Default)
(Default)
(Default)
page 7
(Default)
History
<Variant Name>
<Variant Name>
<Variant Name>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
Reference
Reference
Reference
AG1 SD
AG1 SD
AG1 SD
25 3 Tuesday, January 10, 2006
25 3 Tuesday, January 10, 2006
25 3 Tuesday, January 10, 2006
of
of
of
Page 3
A
B
C
D
E
3D3V_S0
R155
R155
1 2
0R0603-PAD
0R0603-PAD
C258
C258
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
CLK_MCH_3GPLL 7
CLK_MCH_3GPLL# 7
CLK_PCIE_ICH 16
CLK_PCIE_ICH# 16
CLK_PCIE_LAN 35
CLK_PCIE_LAN# 35
CLK_PCIE_SATA 15
CLK_PCIE_SATA# 15
CLK_PCIE_NEW 30
CLK_PCIE_NEW# 30
CLK_PCIE_MINI1 26
CLK_PCIE_MINI1# 26
CLK_PCIE_PEG 45
CLK_PCIE_PEG# 45
CLK_CPU_BCLK 4
CLK_CPU_BCLK# 4
CLK_MCH_BCLK 6
CLK_MCH_BCLK# 6
PM_STPCPU# 16
1 2
C508
C508
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
CLK14_SIO 32
CLK_ICH14 16
3D3V_S0
R213
R213
0R0603-PAD
0R0603-PAD
R173 33R2J-2-GP R173 33R2J-2-GP
1 2
R176 33R2J-2-GP R176 33R2J-2-GP
1 2
R179 22R2J-2-GP R179 22R2J-2-GP
R209 33R2J-2-GP R209 33R2J-2-GP
1 2
R214 22R2J-2-GP R214 22R2J-2-GP
R210 33R2J-2-GP
R210 33R2J-2-GP
1 2
MINI
MINI
R211 33R2J-2-GP R211 33R2J-2-GP
1 2
H/L : CPU_ITP/SRC7
GEN_XTAL_IN
1 2
R154 470R2J-2-GP R154 470R2J-2-GP
R177 22R2J-2-GP R177 22R2J-2-GP
1 2
R181 22R2J-2-GP R181 22R2J-2-GP
1 2
10KR2J-3-GP
10KR2J-3-GP
3D3V_48MPWR_S0
1 2
1 2
C301
C301
SC1U6D3V2ZY-GP
SC1U6D3V2ZY-GP
1 2
1 2
1 2
R174 10KR2J-3-GP R174 10KR2J-3-GP
3D3V_S0
1 2
R212
R212
DY
DY
PCLKCLK0
PCLKCLK1
PCLKCLK2
PCLKCLK2
PCLKCLK3
SS_SEL
ITP_EN
GEN_XTAL_OUT
GEN_REF
GEN_REF
GEN_IREF
R157 475R2F-L1-GP R157 475R2F-L1-GP
1 2
1 2
C226
C226
SC4D7U10V5ZY-3GP
SC4D7U10V5ZY-3GP
56
PCI0
3
PCI1
4
PCI2
5
PCI3
9
PCIF1/SEL100/96#
8
PCIF0/ITP_EN
55
PCI_STOP#
46
SCL
47
SDA
14
DOT96
15
DOT96#
50
XTAL_IN
49
XTAL_OUT
52
REF
39
IREF
10
VTT_PWRGD#/PD
2
VSS_PCI
6
VSS_PCI
51
VSS_REF
45
VSS_CPU
38
VSSA
13
VSS48
29
VSS_SRC
IDTCV125PAG-GP 71.00125.A0W
IDTCV125PAG-GP 71.00125.A0W
1 2
CPU2_ITP/SRC7
CPU2_ITP#/SRC7#
CPU_STOP#
FSC/TEST_SEL
FSB/TEST_MODE
USB48/FSA
3D3V_CLKGEN_S0
C257
C257
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
U24
U24
17
LVDS
18
LVDS#
19
SRC1
20
SRC1#
22
SRC2
23
SRC2#
24
SRC3
25
SRC3#
26
SRC4
27
SRC4#
31
SRC5
30
SRC5#
33
SRC6
32
SRC6#
36
35
44
CPU0
43
CPU0#
41
CPU1
40
CPU1#
54
53
16
12
34
VDD_SRC
21
VDD_SRC
7
VDD_PCI
1
VDD_PCI
48
VDD_REF
42
VDD_CPU
37
VDDA
11
VDD48
28
VDD_SRC
1 2
C254
C254
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
CLK_MCH_3GPLL_1
CLK_MCH_3GPLL_1#
CLK_PCIE_ICH_1
CLK_PCIE_ICH_1#
CLK_PCIE_LAN_1
CLK_PCIE_LAN_1#
CLK_PCIE_SATA_1
CLK_PCIE_SATA_1#
CLK_PCIE_NEW_1
CLK_PCIE_NEW_1#
CLK_PCIE_MINI1_1
CLK_PCIE_MINI1_1#
CLK_PCIE_PEG_1
CLK_PCIE_PEG_1#
CLK_CPU_BCLK_1
CLK_CPU_BCLK_1#
CLK_MCH_BCLK_1
CLK_MCH_BCLK_1#
CPU_SEL2
CPU_SEL1
CLK48
1 2
C230
C230
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
3D3V_CLKGEN_S0
3D3V_CLKPLL_S0
3D3V_48MPWR_S0
1 2
C255
C255
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
RN35 SRN33J-5-GP-U RN35 SRN33J-5-GP-U
RN21 SRN33J-5-GP-U RN21 SRN33J-5-GP-U
RN40 SRN33J-5-GP-U
RN40 SRN33J-5-GP-U
RN25 SRN33J-5-GP-U
RN25 SRN33J-5-GP-U
RN29 SRN33J-5-GP-U
RN29 SRN33J-5-GP-U
RN27 SRN33J-5-GP-U
RN27 SRN33J-5-GP-U
RN28 SRN33J-5-GP-U
RN28 SRN33J-5-GP-U
RN17 SRN33J-5-GP-U RN17 SRN33J-5-GP-U
RN19 SRN33J-5-GP-U RN19 SRN33J-5-GP-U
R601 22R2J-2-GP R601 22R2J-2-GP
1 2
R600 22R2J-2-GP R600 22R2J-2-GP
1 2
R602
R602
1 2
2K2R2J-2-GP
2K2R2J-2-GP
1 2
1
2 3
1
2 3
2 3
1
GIGA
GIGA
2 3
SATA
SATA
1
1
2 3
NEW
NEW
1
2 3
MINIC
MINIC
1
2 3
VGA
VGA
4
4
C303
C303
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
4
4
4
4
4
4
4
2 3
1
2 3
1
CPU_SEL2 4,7
CPU_SEL1 4,7
CLK48_ICH 16
CLK48_CARDBUS 25
CPU_SEL0 4,7
1 2
Dummy when use UMA
3D3V_S0
3D3V_CLKPLL_S0
R158
R158
1 2
0R0603-PAD
0R0603-PAD
4 4
3 3
2 2
1 2
C228
C228
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
3D3V_S0
1 2
R598
R598
10KR2J-3-GP
10KR2J-3-GP
SS_SEL
H/L: 100/96MHz
1 2
R597
R597
10KR2J-3-GP
10KR2J-3-GP
DY
DY
PCLK_FWH & PCLK_PCM
need equal length
1 2
C229
C229
SC1U6D3V2ZY-GP
SC1U6D3V2ZY-GP
C256
C256
1 2
SC20P50V2JN-1GP
SC20P50V2JN-1GP
C225
C225
1 2
SC20P50V2JN-1GP
SC20P50V2JN-1GP
1 2
X2
X2
X-14D31818M-31GP
X-14D31818M-31GP
82.30005.831
82.30005.831
PCLK_KBC 31
PCLK_LAN 22
PCLK_PCM 25
PCLK_SIO 32
PCLK_FWH 34
PCLK_MINI 30
CLK_ICHPCI 16
PM_STPPCI# 16
SMBC_ICH 11,18
SMBD_ICH 11,18
GEN_XTAL_OUT_R
CLK_EN# 38
EMI capacitor
CLK_PCIE_MINI1
CLK_PCIE_MINI1#
PCLK_MINI
RN34
CLK_PCIE_MINI1
CLK_PCIE_MINI1#
SRN49D9F-GP
SRN49D9F-GP
CLK_PCIE_LAN
CLK_PCIE_LAN#
SRN49D9F-GP
SRN49D9F-GP
CLK_PCIE_SATA
CLK_PCIE_SATA#
SRN49D9F-GP
1 1
A
SEL1
SEL2
0
0
0
0
1
1
0
0
1
0
1 100M
1
1
1
1
SEL0
0
01200M
1
00333M
1
0
1
CPU
266M
133M
166M
400M
Reserved
FSB
X
533M
X
667M
X
X
X
X
B
SRN49D9F-GP
CLK_PCIE_ICH
CLK_PCIE_ICH#
SRN49D9F-GP
SRN49D9F-GP
CLK_PCIE_NEW
CLK_PCIE_NEW#
SRN49D9F-GP
SRN49D9F-GP
RN34
1
2 3
MINIC
MINIC
RN42
RN42
2 3
GIGA
GIGA
1
RN32
RN32
2 3
SATA
SATA
1
RN20
RN20
1
2 3
RN30
RN30
1
2 3
NEW
NEW
4
RN18
CLK_CPU_BCLK
4
4
4
4
C
CLK_CPU_BCLK#
SRN49D9F-GP
SRN49D9F-GP
CLK_MCH_BCLK
CLK_MCH_BCLK#
SRN49D9F-GP
SRN49D9F-GP
CLK_PCIE_PEG
CLK_PCIE_PEG#
SRN49D9F-GP
SRN49D9F-GP
CLK_MCH_3GPLL
CLK_MCH_3GPLL#
SRN49D9F-GP
SRN49D9F-GP
RN18
1
2 3
RN16
RN16
1
2 3
RN31
RN31
1
2 3
VGA
VGA
RN36
RN36
1
2 3
4
4
4
4
D
CLK_ICH14
CLK_ICHPCI
CLK48_ICH
<Variant Name>
<Variant Name>
<Variant Name>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet of
Date: Sheet of
1 2
DY
EC20 SC22P50V2JN-4GP
EC20 SC22P50V2JN-4GP
EC18 SC22P50V2JN-4GP
EC18 SC22P50V2JN-4GP
EC19 SC22P50V2JN-4GP
EC19 SC22P50V2JN-4GP
EC17 SC22P50V2JN-4GP
EC17 SC22P50V2JN-4GP
EC21 SC22P50V2JN-4GP
EC21 SC22P50V2JN-4GP
EC34 SC22P50V2JN-4GP
EC34 SC22P50V2JN-4GP
Clock Generator IDT CVT125PAG
Clock Generator IDT CVT125PAG
Clock Generator IDT CVT125PAG
DY
1 2
DY
DY
1 2
DY
DY
1 2
DY
DY
1 2
DY
DY
1 2
DY
DY
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
AG1 -1
AG1 -1
AG1 -1
35 3 Tuesday, January 10, 2006
35 3 Tuesday, January 10, 2006
35 3 Tuesday, January 10, 2006
E
of
Page 4
A
B
C
D
E
H_RS#0
H_RS#1
H_RS#2
XDP_BPM#0
XDP_BPM#1
XDP_BPM#2
XDP_BPM#3
XDP_BPM#4
XDP_BPM#5
XDP_TCK
XDP_TDI
XDP_TDO
XDP_TMS
XDP_TRST#
XDP_DBRESET#
R605
R605
1 2
0R0402-PAD
0R0402-PAD
TP28 TPAD30 TP28 TPAD30
TP20 TPAD30 TP20 TPAD30
TP24 TPAD30 TP24 TPAD30
TP45 TPAD30 TP45 TPAD30
TP17 TPAD30 TP17 TPAD30
TP16 TPAD30 TP16 TPAD30
TP15 TPAD30 TP15 TPAD30
TP27 TPAD30 TP27 TPAD30
H_ADS# 6
H_BNR# 6
H_BPRI# 6
H_DEFER# 6
H_DRDY# 6
H_DBSY# 6
H_BREQ#0 6
H_INIT# 15
H_LOCK# 6
H_CPURST# 6
H_TRDY# 6
H_HIT# 6
H_HITM# 6
TP41 TPAD30 TP41 TPAD30
TP44 TPAD30 TP44 TPAD30
TP46 TPAD30 TP46 TPAD30
TP40 TPAD30 TP40 TPAD30
TP43 TPAD30 TP43 TPAD30
TP47 TPAD30 TP47 TPAD30
TP39 TPAD30 TP39 TPAD30
TP30 TPAD30 TP30 TPAD30
TP33 TPAD30 TP33 TPAD30
TP29 TPAD30 TP29 TPAD30
TP42 TPAD30 TP42 TPAD30
TP18 TPAD30 TP18 TPAD30
H_THERMDA 19
H_THERMDC 19
PM_THRMTRIP-A# 7
CLK_CPU_BCLK 3
CLK_CPU_BCLK# 3
1D05V_S0
3D3V_S0
U72A
4 4
3 3
2 2
1 1
H_A#[31..3] 6
H_ADSTB#0 6
H_REQ#[4..0] 6
H_ADSTB#1 6
H_A20M# 15
H_FERR# 15
H_IGNNE# 15
H_STPCLK# 15
H_INTR 15
H_NMI 15
H_SMI# 15
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
TP37 TPAD30 TP37 TPAD30
TP31 TPAD30 TP31 TPAD30
TP36 TPAD30 TP36 TPAD30
TP35 TPAD30 TP35 TPAD30
TP26 TPAD30 TP26 TPAD30
TP25 TPAD30 TP25 TPAD30
TP34 TPAD30 TP34 TPAD30
TP32 TPAD30 TP32 TPAD30
TP19 TPAD30 TP19 TPAD30
TP14 TPAD30 TP14 TPAD30
U72A
J4
A[3]#
L4
A[4]#
M3
A[5]#
K5
A[6]#
M1
A[7]#
N2
A[8]#
J1
A[9]#
N3
A[10]#
P5
A[11]#
P2
A[12]#
L1
A[13]#
P4
A[14]#
P1
A[15]#
R1
A[16]#
L2
ADSTB[0]#
K3
REQ[0]#
H2
REQ[1]#
K2
REQ[2]#
J3
REQ[3]#
L5
REQ[4]#
Y2
A[17]#
U5
A[18]#
R3
A[19]#
W6
A[20]#
U4
A[21]#
Y5
A[22]#
U2
A[23]#
R4
A[24]#
T5
A[25]#
T3
A[26]#
W3
A[27]#
W5
A[28]#
Y4
A[29]#
W2
A[30]#
Y1
A[31]#
V4
ADSTB[1]#
A6
A20M#
A5
FERR#
C4
IGNNE#
D5
STPCLK#
C6
LINT0
B4
LINT1
A3
SMI#
AA1
RSVD[01]
AA4
RSVD[02]
AB2
RSVD[03]
AA3
RSVD[04]
M4
RSVD[05]
N5
RSVD[06]
T2
RSVD[07]
V3
RSVD[08]
B2
RSVD[09]
C3
RSVD[10]
B25
RSVD[11]
BGA479-SKT6-GPU1
BGA479-SKT6-GPU1
62.10079.001
62.10079.001
2nd source: 62.10053.401
ADDR GROUP 0
ADDR GROUP 0
DEFER#
DRDY#
DBSY#
LOCK#
CONTROL
CONTROL
RESET#
RS[0]#
RS[1]#
RS[2]#
TRDY#
ADDR GROUP 1
ADDR GROUP 1
BPM[0]#
BPM[1]#
BPM[2]#
BPM[3]#
PRDY#
PREQ#
TRST#
XDP/ITP SIGNALS H CLK
XDP/ITP SIGNALS H CLK
PROCHOT#
THERMDA
THERMDC
THERM
THERM
THERMTRIP#
BCLK[0]
BCLK[1]
RSVD[12]
RSVD[13]
RSVD[14]
RSVD[15]
RSVD[16]
RSVD[17]
RESERVED
RESERVED
RSVD[18]
RSVD[19]
RSVD[20]
XDP_TDI
XDP_TMS
XDP_TDO
H_CPURST#
XDP_DBRESET#
ADS#
BNR#
BPRI#
BR0#
IERR#
INIT#
HITM#
DBR#
H1
E2
G5
H5
F21
E1
F1
D20
B3
H4
B1
F3
F4
G3
G2
G6
HIT#
E4
AD4
AD3
AD1
AC4
AC2
AC1
AC5
TCK
AA6
TDI
AB3
TDO
AB5
TMS
AB6
C20
D21
A24
A25
C7
A22
A21
T22
D2
F6
D3
C1
AF1
D22
C23
C24
R284 150R2F-1-GP R284 150R2F-1-GP
1 2
R282 39D2R3F-2-GP R282 39D2R3F-2-GP
1 2
DY
DY
R283 54D9R2F-L1-GP
R283 54D9R2F-L1-GP
1 2
DY
DY
R606 54D9R2F-L1-GP
R606 54D9R2F-L1-GP
1 2
DY
DY
R207 150R2F-1-GP
R207 150R2F-1-GP
1 2
H_IERR#
H_RS#[2..0] 6
1D05V_S0
1 2
R613
R613
56R2J-4-GP
56R2J-4-GP
Place testpoint on
H_IERR# with a GND
0.1" away
1D05V_S0
R595
R595
56R2J-4-GP
56R2J-4-GP
1 2
1 2
PM_THRMTRIP-I# 36
Layout Note:
0.5" max length.
2KR2F-3-GP
2KR2F-3-GP
H_THERMDA
H_THERMDC
R596
R596
0R2J-2-GP
0R2J-2-GP
DY
DY
1D05V_S0
1 2
1 2
R627
R627
1 2
PM_THRMTRIP#
should connect to
ICH7 and Calistoga
without T-ing
R628
R628
1KR2F-3-GP
1KR2F-3-GP
1 2
SC1KP16V2KX-GP
SC1KP16V2KX-GP
C675
C675
SC2200P50V2KX-2GP
SC2200P50V2KX-2GP
H_DSTBN#0 6
H_DSTBP#0 6
H_DINV#0 6
CPU_PROCHOT# 38
( No stub)
H_DSTBN#1 6
H_DSTBP#1 6
H_DINV#1 6
CPU_GTLREF0
C321
C321
CPU_SEL0 3,7
CPU_SEL1 3,7
CPU_SEL2 3,7
R614 1KR2J-1-GP
R614 1KR2J-1-GP
DY
DY
1 2
R615 51R2F-2-GP R615 51R2F-2-GP
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
1 2
TEST2
U72B
U72B
E22
D[0]#
F24
D[1]#
E26
D[2]#
H22
D[3]#
F23
D[4]#
G25
D[5]#
E25
D[6]#
E23
D[7]#
K24
D[8]#
G24
D[9]#
J24
D[10]#
J23
D[11]#
H26
D[12]#
F26
D[13]#
K22
D[14]#
H25
D[15]#
H23
DSTBN[0]#
G22
DSTBP[0]#
J26
DINV[0]#
N22
D[16]#
K25
D[17]#
P26
D[18]#
R23
D[19]#
L25
D[20]#
L22
D[21]#
L23
D[22]#
M23
D[23]#
P25
D[24]#
P22
D[25]#
P23
D[26]#
T24
D[27]#
R24
D[28]#
L26
D[29]#
T25
D[30]#
N24
D[31]#
M24
DSTBN[1]#
N25
DSTBP[1]#
M26
DINV[1]#
AD26
GTLREF
C26
TEST1
D25
TEST2
B22
BSEL[0]
B23
BSEL[1]
C21
BSEL[2]
BGA479-SKT6-GPU1
BGA479-SKT6-GPU1
MISC
MISC
DATA GRP 0 DATA GRP 1
DATA GRP 0 DATA GRP 1
D[32]#
D[33]#
D[34]#
D[35]#
D[36]#
D[37]#
D[38]#
D[39]#
D[40]#
D[41]#
D[42]#
DATA GRP 2
DATA GRP 2
D[43]#
D[44]#
D[45]#
D[46]#
D[47]#
DSTBN[2]#
DSTBP[2]#
DINV[2]#
D[48]#
D[49]#
D[50]#
D[51]#
D[52]#
D[53]#
D[54]#
D[55]#
D[56]#
D[57]#
D[58]#
D[59]#
DATA GRP 3
DATA GRP 3
D[60]#
D[61]#
D[62]#
D[63]#
DSTBN[3]#
DSTBP[3]#
DINV[3]#
COMP[0]
COMP[1]
COMP[2]
COMP[3]
DPRSTP#
DPSLP#
DPWR#
PWRGOOD
SLP#
PSI#
AA23
AB24
V24
V26
W25
U23
U25
U22
AB25
W22
Y23
AA26
Y26
Y22
AC26
AA24
W24
Y25
V23
AC22
AC23
AB22
AA21
AB21
AC25
AD20
AE22
AF23
AD24
AE21
AD21
AE25
AF25
AF22
AF26
AD23
AE24
AC20
R26
U26
U1
V1
E5
B5
D24
D6
D7
AE6
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
COMP0
COMP1
COMP2
COMP3 TEST1
<Variant Name>
<Variant Name>
<Variant Name>
H_DINV#[3..0] 6
H_DSTBN#[3..0] 6
H_DSTBP#[3..0] 6
H_D#[63..0] 6
H_DSTBN#2 6
H_DSTBP#2 6
H_DINV#2 6
H_DSTBN#3 6
H_DSTBP#3 6
H_DINV#3 6
R630 27D4R2F-L1-GP R630 27D4R2F-L1-GP
1 2
R629 54D9R2F-L1-GP R629 54D9R2F-L1-GP
1 2
R287 27D4R2F-L1-GP R287 27D4R2F-L1-GP
1 2
R286 54D9R2F-L1-GP R286 54D9R2F-L1-GP
1 2
H_DPRSLP# 15,38
H_DPSLP# 15
H_DPWR# 6
H_PWRGD 15,36
H_CPUSLP# 6,15
PSI# 38
Layout Note:
Comp0, 2 connect with Zo=27.4 ohm, make
trace length shorter than 0.5" .
Comp1, 3 connect with Zo=55 ohm, make
trace length shorter than 0.5" .
Wistron Corporation
Wistron Corporation
XDP_TCK
XDP_TRST#
A
R299 27D4R2F-L1-GP R299 27D4R2F-L1-GP
1 2
R301 680R3F-GP R301 680R3F-GP
1 2
All place within 2" to CPU
B
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet of
C
D
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
CPU (1 of 2)
CPU (1 of 2)
CPU (1 of 2)
AG1 SC
AG1 SC
AG1 SC
45 3 Tuesday, January 10, 2006
45 3 Tuesday, January 10, 2006
45 3 Tuesday, January 10, 2006
E
of
Page 5
A
B
C
D
E
VCC_CORE_S0
4 4
3 3
2 2
1 1
U72C
U72C
A7
VCC[001]
A9
VCC[002]
A10
VCC[003]
A12
VCC[004]
A13
VCC[005]
A15
VCC[006]
A17
VCC[007]
A18
VCC[008]
A20
VCC[009]
B7
VCC[010]
B9
VCC[011]
B10
VCC[012]
B12
VCC[013]
B14
VCC[014]
B15
VCC[015]
B17
VCC[016]
B18
VCC[017]
B20
VCC[018]
C9
VCC[019]
C10
VCC[020]
C12
VCC[021]
C13
VCC[022]
C15
VCC[023]
C17
VCC[024]
C18
VCC[025]
D9
VCC[026]
D10
VCC[027]
D12
VCC[028]
D14
VCC[029]
D15
VCC[030]
D17
VCC[031]
D18
VCC[032]
E7
VCC[033]
E9
VCC[034]
E10
VCC[035]
E12
VCC[036]
E13
VCC[037]
E15
VCC[038]
E17
VCC[039]
E18
VCC[040]
E20
VCC[041]
F7
VCC[042]
F9
VCC[043]
F10
VCC[044]
F12
VCC[045]
F14
VCC[046]
F15
VCC[047]
F17
VCC[048]
F18
VCC[049]
F20
VCC[050]
AA7
VCC[051]
AA9
VCC[052]
AA10
VCC[053]
AA12
VCC[054]
AA13
VCC[055]
AA15
VCC[056]
AA17
VCC[057]
AA18
VCC[058]
AA20
VCC[059]
AB9
VCC[060]
AC10
VCC[061]
AB10
VCC[062]
AB12
VCC[063]
AB14
VCC[064]
AB15
VCC[065]
AB17
VCC[066]
AB18
VCC[067]
BGA479-SKT6-GPU1
BGA479-SKT6-GPU1
VCCP[01]
VCCP[02]
VCCP[03]
VCCP[04]
VCCP[05]
VCCP[06]
VCCP[07]
VCCP[08]
VCCP[09]
VCCP[10]
VCCP[11]
VCCP[12]
VCCP[13]
VCCP[14]
VCCP[15]
VCCP[16]
VCCSENSE
VSSSENSE
A
VCC[068]
VCC[069]
VCC[070]
VCC[071]
VCC[072]
VCC[073]
VCC[074]
VCC[075]
VCC[076]
VCC[077]
VCC[078]
VCC[079]
VCC[080]
VCC[081]
VCC[082]
VCC[083]
VCC[084]
VCC[085]
VCC[086]
VCC[087]
VCC[088]
VCC[089]
VCC[090]
VCC[091]
VCC[092]
VCC[093]
VCC[094]
VCC[095]
VCC[096]
VCC[097]
VCC[098]
VCC[099]
VCC[100]
VCCA
VID[0]
VID[1]
VID[2]
VID[3]
VID[4]
VID[5]
VID[6]
AB20
AB7
AC7
AC9
AC12
AC13
AC15
AC17
AC18
AD7
AD9
AD10
AD12
AD14
AD15
AD17
AD18
AE9
AE10
AE12
AE13
AE15
AE17
AE18
AE20
AF9
AF10
AF12
AF14
AF15
AF17
AF18
AF20
V6
G21
J6
K6
M6
J21
K21
M21
N21
N6
R21
R6
T21
T6
V21
W21
B26
AD6
AF5
AE5
AF4
AE3
AF2
AE2
AF7
AE7
VCC_CORE_S0
CPU_V6
1 2
0R0402-PAD
0R0402-PAD
1 2
C369
C369
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
H_VID0 38
H_VID1 38
H_VID2 38
H_VID3 38
H_VID4 38
H_VID5 38
H_VID6 38
H_VID[0..6] 38
1 2
R298
R298
100R2F-L1-GP-U
100R2F-L1-GP-U
1D05V_S0
R285
R285
VCC_CORE_S0
Layout Note
1D5V_VCCA_S0
C674
C674
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
VCC_CORE_S0
1 2
R300
R300
100R2F-L1-GP-U
100R2F-L1-GP-U
Layout Note:
1 2
1 2
C715
C715
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
B
L22
L22
1 2
HCB1608KF121T30-GP
HCB1608KF121T30-GP
1 2
1 2
VCCSENSE and VSSSENSE lines
should be of equal length.
Layout Note:
Provide a test point (with
no stub) to connect a
differential probe
between VCCSENSE and
VSSSENSE at the location
where the two 54.9ohm
resistors terminate the
55 ohm transmission line.
C346
C346
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
68.00230.041
68.00230.041
C673
C673
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
VCC_SENSE 38
VSS_SENSE 38
1 2
C344
C344
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
1 2
C343
C343
1D5V_S0
1 2
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
1D05V_S0
1 2
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
VCC_CORE_S0
1 2
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
DY
DY
1 2
C701
C701
C713
C713
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
1 2
C363
C363
C364
C364
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
C716
C716
C700
C700
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
DY
DY
1 2
1 2
C702
C702
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
C
1 2
1 2
C348
C348
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
DY
DY
1 2
1 2
C365
C365
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
DY
DY
1 2
C703
C703
C714
C714
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
1 2
C342
C342
C347
C347
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
C676
C676
C341
C341
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
1 2
1 2
C677
C677
C370
C370
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
1 2
C340
C340
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
C680
C680
1 2
C711
C711
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
1 2
C682
C682
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
DY
DY
1 2
1 2
C683
C683
C712
C712
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
1 2
C368
C368
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
1 2
1 2
C678
C678
C366
C366
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
D
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
<Variant Name>
<Variant Name>
<Variant Name>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet of
Date: Sheet of
Date: Sheet
U72D
U72D
A4
VSS[001]
A8
VSS[002]
A11
VSS[003]
A14
VSS[004]
A16
VSS[005]
A19
VSS[006]
A23
VSS[007]
A26
VSS[008]
B6
VSS[009]
B8
VSS[010]
B11
VSS[011]
B13
VSS[012]
B16
VSS[013]
B19
VSS[014]
B21
VSS[015]
B24
VSS[016]
C5
VSS[017]
C8
VSS[018]
C11
VSS[019]
C14
VSS[020]
C16
VSS[021]
C19
VSS[022]
C2
VSS[023]
C22
VSS[024]
C25
VSS[025]
D1
VSS[026]
D4
VSS[027]
D8
VSS[028]
D11
VSS[029]
D13
VSS[030]
D16
VSS[031]
D19
VSS[032]
D23
VSS[033]
D26
VSS[034]
E3
VSS[035]
E6
VSS[036]
E8
VSS[037]
E11
VSS[038]
E14
VSS[039]
E16
VSS[040]
E19
VSS[041]
E21
VSS[042]
E24
VSS[043]
F5
VSS[044]
F8
VSS[045]
F11
VSS[046]
F13
VSS[047]
F16
VSS[048]
F19
VSS[049]
F2
VSS[050]
F22
VSS[051]
F25
VSS[052]
G4
VSS[053]
G1
VSS[054]
G23
VSS[055]
G26
VSS[056]
H3
VSS[057]
H6
VSS[058]
H21
VSS[059]
H24
VSS[060]
J2
VSS[061]
J5
VSS[062]
J22
VSS[063]
J25
VSS[064]
K1
VSS[065]
K4
VSS[066]
K23
VSS[067]
K26
VSS[068]
L3
VSS[069]
L6
VSS[070]
L21
VSS[071]
L24
VSS[072]
M2
VSS[073]
M5
VSS[074]
M22
VSS[075]
M25
VSS[076]
N1
VSS[077]
N4
VSS[078]
N23
VSS[079]
N26
VSS[080]
VSS[081]P3VSS[162]
BGA479-SKT6-GPU1
BGA479-SKT6-GPU1
P6
VSS[082]
P21
VSS[083]
P24
VSS[084]
R2
VSS[085]
R5
VSS[086]
R22
VSS[087]
R25
VSS[088]
T1
VSS[089]
T4
VSS[090]
T23
VSS[091]
T26
VSS[092]
U3
VSS[093]
U6
VSS[094]
U21
VSS[095]
U24
VSS[096]
V2
VSS[097]
V5
VSS[098]
V22
VSS[099]
V25
VSS[100]
W1
VSS[101]
W4
VSS[102]
W23
VSS[103]
W26
VSS[104]
Y3
VSS[105]
Y6
VSS[106]
Y21
VSS[107]
Y24
VSS[108]
AA2
VSS[109]
AA5
VSS[110]
AA8
VSS[111]
AA11
VSS[112]
AA14
VSS[113]
AA16
VSS[114]
AA19
VSS[115]
AA22
VSS[116]
AA25
VSS[117]
AB1
VSS[118]
AB4
VSS[119]
AB8
VSS[120]
AB11
VSS[121]
AB13
VSS[122]
AB16
VSS[123]
AB19
VSS[124]
AB23
VSS[125]
AB26
VSS[126]
AC3
VSS[127]
AC6
VSS[128]
AC8
VSS[129]
AC11
VSS[130]
AC14
VSS[131]
AC16
VSS[132]
AC19
VSS[133]
AC21
VSS[134]
AC24
VSS[135]
AD2
VSS[136]
AD5
VSS[137]
AD8
VSS[138]
AD11
VSS[139]
AD13
VSS[140]
AD16
VSS[141]
AD19
VSS[142]
AD22
VSS[143]
AD25
VSS[144]
AE1
VSS[145]
AE4
VSS[146]
AE8
VSS[147]
AE11
VSS[148]
AE14
VSS[149]
AE16
VSS[150]
AE19
VSS[151]
AE23
VSS[152]
AE26
VSS[153]
AF3
VSS[154]
AF6
VSS[155]
AF8
VSS[156]
AF11
VSS[157]
AF13
VSS[158]
AF16
VSS[159]
AF19
VSS[160]
AF21
VSS[161]
AF24
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
CPU (2 of 2)
CPU (2 of 2)
CPU (2 of 2)
AG1 SA
AG1 SA
AG1 SA
55 3 Tuesday, January 10, 2006
55 3 Tuesday, January 10, 2006
55 3 Tuesday, January 10, 2006
E
of
Page 6
A
H_XRCOMP
1 2
R643
R643
24D9R2F-L-GP
24D9R2F-L-GP
4 4
1D05V_S0
R647
R647
54D9R2F-L1-GP
54D9R2F-L1-GP
1 2
H_XSCOMP
1D05V_S0
1 2
R645
R645
221R2F-2-GP
221R2F-2-GP
H_XSWING
3 3
2 2
1 2
1 2
1D05V_S0
1 2
1D05V_S0
1 2
1 2
R644
R644
100R2F-L1-GP-U
100R2F-L1-GP-U
H_YRCOMP
R639
R639
24D9R2F-L-GP
24D9R2F-L-GP
R642
R642
54D9R2F-L1-GP
54D9R2F-L1-GP
H_YSCOMP
R641
R641
221R2F-2-GP
221R2F-2-GP
H_YSWING
R640
R640
100R2F-L1-GP-U
100R2F-L1-GP-U
H_D#[63..0] 4
C743
C743
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
C741
C741
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
B
U71A
W11
AB7
AA9
AB8
AA4
AA7
AA2
AA6
AA10
AA1
AB4
AC9
AB11
AC11
AB3
AC2
AD1
AD9
AC1
AD7
AC6
AB5
AD10
AD4
AC8
AG2
AG1
K11
T10
U11
T11
Y10
F1
J1
H1
J6
H3
K2
G1
G2
K9
K1
K7
J8
H4
J3
G4
T3
U7
U9
W9
T1
T8
T4
W7
U5
T9
W6
T5
W4
W3
Y3
Y7
W5
W2
Y8
E1
E2
E4
Y1
U1
W1
U71A
H_D#_0
H_D#_1
H_D#_2
H_D#_3
H_D#_4
H_D#_5
H_D#_6
H_D#_7
H_D#_8
H_D#_9
H_D#_10
H_D#_11
H_D#_12
H_D#_13
H_D#_14
H_D#_15
H_D#_16
H_D#_17
H_D#_18
H_D#_19
H_D#_20
H_D#_21
H_D#_22
H_D#_23
H_D#_24
H_D#_25
H_D#_26
H_D#_27
H_D#_28
H_D#_29
H_D#_30
H_D#_31
H_D#_32
H_D#_33
H_D#_34
H_D#_35
H_D#_36
H_D#_37
H_D#_38
H_D#_39
H_D#_40
H_D#_41
H_D#_42
H_D#_43
H_D#_44
H_D#_45
H_D#_46
H_D#_47
H_D#_48
H_D#_49
H_D#_50
H_D#_51
H_D#_52
H_D#_53
H_D#_54
H_D#_55
H_D#_56
H_D#_57
H_D#_58
H_D#_59
H_D#_60
H_D#_61
H_D#_62
H_D#_63
H_XRCOMP
H_XSCOMP
H_XSWING
H_YRCOMP
H_YSCOMP
H_YSWING
H_CLKIN
H_CLKIN#
CALISTOGA
CALISTOGA
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
H_XRCOMP
H_XSCOMP
H_XSWING
H_YRCOMP
H_YSCOMP
H_YSWING
CLK_MCH_BCLK 3
CLK_MCH_BCLK# 3
C
H_ADSTB#_0
H_ADSTB#_1
HOST
HOST
H_DSTBN#_0
H_DSTBN#_1
H_DSTBN#_2
H_DSTBN#_3
H_DSTBP#_0
H_DSTBP#_1
H_DSTBP#_2
H_DSTBP#_3
H_A#_3
H_A#_4
H_A#_5
H_A#_6
H_A#_7
H_A#_8
H_A#_9
H_A#_10
H_A#_11
H_A#_12
H_A#_13
H_A#_14
H_A#_15
H_A#_16
H_A#_17
H_A#_18
H_A#_19
H_A#_20
H_A#_21
H_A#_22
H_A#_23
H_A#_24
H_A#_25
H_A#_26
H_A#_27
H_A#_28
H_A#_29
H_A#_30
H_A#_31
H_ADS#
H_VREF_0
H_BNR#
H_BPRI#
H_BREQ#0
H_CPURST#
H_DBSY#
H_DEFER#
H_DPWR#
H_DRDY#
H_VREF_1
H_DINV#_0
H_DINV#_1
H_DINV#_2
H_DINV#_3
H_HIT#
H_HITM#
H_LOCK#
H_REQ#_0
H_REQ#_1
H_REQ#_2
H_REQ#_3
H_REQ#_4
H_RS#_0
H_RS#_1
H_RS#_2
H_SLPCPU#
H_TRDY#
H9
C9
E11
G11
F11
G12
F9
H11
J12
G14
D9
J14
H13
J15
F14
D12
A11
C11
A12
A13
E13
G13
F12
B12
B14
C12
A14
C14
D14
E8
B9
C13
J13
C6
F6
C7
B7
A7
C3
J9
H8
K13
J7
W8
U3
AB10
K4
T7
Y5
AC4
K3
T6
AA5
AC5
D3
D4
B3
D8
G8
B8
F8
A8
B4
E6
D6
E3
E7
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_VREF
H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3
H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3
H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_RS#0
H_RS#1
H_RS#2
R646
R646
1 2
0R0402-PAD
0R0402-PAD
D
H_ADS# 4
H_ADSTB#0 4
H_ADSTB#1 4
H_BNR# 4
H_BPRI# 4
H_BREQ#0 4
H_CPURST# 4
H_DBSY# 4
H_DEFER# 4
H_DPWR# 4
H_DRDY# 4
H_HIT# 4
H_HITM# 4
H_LOCK# 4
H_CPUSLP# 4,15
H_TRDY# 4
H_A#[31..3] 4
C362
C362
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
H_DINV#[3..0] 4
H_DSTBN#[3..0] 4
H_DSTBP#[3..0] 4
H_REQ#[4..0] 4
1D05V_S0
1 2
1 2
H_RS#[2..0] 4
R274
R274
100R2F-L1-GP-U
100R2F-L1-GP-U
R246
R246
200R2F-L-GP
200R2F-L-GP
E
1 1
Place them near to the chip ( < 0.5")
A
B
C
D
<Variant Name>
<Variant Name>
<Variant Name>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet of
Date: Sheet of
GMCH (1 of 5)
GMCH (1 of 5)
GMCH (1 of 5)
AG1 SA
AG1 SA
AG1 SA
65 3 Tuesday, January 10, 2006
65 3 Tuesday, January 10, 2006
65 3 Tuesday, January 10, 2006
E
of
Page 7
A
DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3
DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3
DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3
AY35
AR1
AW7
AW40
AW35
AT1
AY7
AY40
AU20
AT20
BA29
AY29
AW13
AW12
AY21
AW21
AL20
AF10
BA13
BA12
AY20
AU21
AV9
AT9
AK1
AK41
AF33
AG33
AE35
AF39
AG35
AH39
AC35
AE39
AF35
AG39
AE37
AF41
AG37
AH41
AC37
AE41
AF37
AG41
A27
A26
C40
D41
SM_CK_0
SM_CK_1
SM_CK_2
SM_CK_3
SM_CK#_0
SM_CK#_1
SM_CK#_2
SM_CK#_3
SM_CKE_0
SM_CKE_1
SM_CKE_2
SM_CKE_3
SM_CS#_0
SM_CS#_1
SM_CS#_2
SM_CS#_3
SM_OCDCOMP_0
SM_OCDCOMP_1
SM_ODT_0
SM_ODT_1
SM_ODT_2
SM_ODT_3
SM_RCOMP#
SM_RCOMP
SM_VREF_0
SM_VREF_1
G_CLKIN#
G_CLKIN
D_REFCLKIN#
D_REFCLKIN
D_REFSSCLKIN#
D_REFSSCLKIN
DMI_RXN_0
DMI_RXN_1
DMI_RXN_2
DMI_RXN_3
DMI_RXP_0
DMI_RXP_1
DMI_RXP_2
DMI_RXP_3
DMI_TXN_0
DMI_TXN_1
DMI_TXN_2
DMI_TXN_3
DMI_TXP_0
DMI_TXP_1
DMI_TXP_2
DMI_TXP_3
CALISTOGA
CALISTOGA
M_CLK_DDR0 11
M_CLK_DDR1 11
M_CLK_DDR2 11
M_CLK_DDR3 11
M_CLK_DDR#0 11
M_CLK_DDR#1 11
M_CLK_DDR#2 11
M_CLK_DDR#3 11
4 4
1 2
R244
R244
40D2R2F-GP
40D2R2F-GP
DY
DY
3 3
2 2
1 1
M_CKE0 11,12
M_CKE1 11,12
M_CKE2 11,12
M_CKE3 11,12
M_CS0# 11,12
M_CS1# 11,12
M_CS2# 11,12
M_CS3# 11,12
1 2
R273
R273
40D2R2F-GP
40D2R2F-GP
DY
DY
DDR_VREF_S3
1 2
C737
C737
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
DMI_TXN[3..0] 16
DMI_TXP[3..0] 16
DMI_RXN[3..0] 16
DMI_RXP[3..0] 16
3D3V_S0
RN43
RN43
1
2 3
SRN10KJ-5-G P
SRN10KJ-5-GP
1D8V_S3
1 2
R271
R271
80D6R2F-L-GP
80D6R2F-L-GP
1 2
R272
R272
80D6R2F-L-GP
80D6R2F-L-GP
A
M_OCDCOMP0
M_OCDCOMP1
M_ODT0 11,12
M_ODT1 11,12
M_ODT2 11,12
M_ODT3 11,12
1 2
CLK_MCH_3GPLL# 3
CLK_MCH_3GPLL 3
C667
C667
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
PM_EXTTS#0
4
PM_EXTTS#1
M_RCOMPN
M_RCOMPP
M_RCOMPN
M_RCOMPP
DMI_TXP3
B
CFG RSVD
CFG RSVD
DDR MUXING CLK DMI
DDR MUXING CLK DMI
B
PM
PM
PM_THRMTRIP#
MISC
MISC
SDVO_CTRLCLK
SDVO_CTRLDATA
NC
NC
3D3V_S0
RSVD_0
RSVD_1
RSVD_2
RSVD_3
RSVD_4
RSVD_5
RSVD_6
RSVD_7
RSVD_8
RSVD_9
RSVD_10
RSVD_11
RSVD_12
RSVD_13
RSVD_14
RSVD_15
CFG_0
CFG_1
CFG_2
CFG_3
CFG_4
CFG_5
CFG_6
CFG_7
CFG_8
CFG_9
CFG_10
CFG_11
CFG_12
CFG_13
CFG_14
CFG_15
CFG_16
CFG_17
CFG_18
CFG_19
CFG_20
PM_BMBUSY#
PM_EXTTS#_0
PM_EXTTS#_1
PWROK
RSTIN#
LT_RESET#
NC10
NC11
NC12
NC13
NC14
NC15
NC16
NC17
NC18
R2 54
R254
1 2
D UMMY-R2
DUMMY-R2
R2 42
R242
1 2
D UMMY-R2
DUMMY-R2
R2 41
R241
1 2
D UMMY-R2
DUMMY-R2
R2 49
R249
1 2
D UMMY-R2
DUMMY-R2
R2 55
R255
1 2
D UMMY-R2
DUMMY-R2
R2 47
R247
1 2
D UMMY-R2
DUMMY-R2
R2 60
R260
1 2
D UMMY-R2
DUMMY-R2
R2 53
R253
1 2
D UMMY-R2
DUMMY-R2
R2 52
R252
1 2
D UMMY-R2
DUMMY-R2
R2 59
R259
1 2
D UMMY-R2
DUMMY-R2
R2 51
R251
1 2
D UMMY-R2
DUMMY-R2
R256
R256
1 2
2K2R2J-2-GP
2K2R2J-2-GP
R2 77
R277
1 2
D UMMY-R2
DUMMY-R2
R2 75
R275
1 2
D UMMY-R2
DUMMY-R2
R2 48
R248
1 2
D UMMY-R2
DUMMY-R2
R2 58
R258
1 2
D UMMY-R2
DUMMY-R2
R2 50
R250
1 2
D UMMY-R2
DUMMY-R2
R2 76
R276
1 2
D UMMY-R2
DUMMY-R2
NC0
NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9
U71B
U71B
H32
T32
R32
F3
F7
AG11
AF11
H7
J19
K30
J29
A41
A35
A34
D28
D27
K16
K18
J18
F18
E15
F15
E18
D19
D16
G16
E16
D15
G15
K15
C15
H16
G18
H15
J25
K27
J26
G28
F25
H26
G6
AH33
AH34
H28
H27
K28
D1
C41
C1
BA41
BA40
BA39
BA3
BA2
BA1
B41
B2
AY41
AY1
AW41
AW1
A40
A4
A39
A3
DY
DY
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
CFG18
CFG19
CFG20
PM_EXTTS#0
PM_EXTTS#1
1 2
CFG18
CFG19
CFG20
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
CPU_SEL0 3,4
CPU_SEL1 3,4
CPU_SEL2 3,4
SEL1
SEL2
0
0
0
1
1 100M
1
1
PM_BMBUSY# 16
PM_THRMTRIP-A# 4
R238
R238
100R2J-2-GP
100R2J-2-GP
TP13 TPAD30 TP13 TPAD30
TP12 TPAD30 TP12 TPAD30
MCH_ICH_SYNC# 16
When High 1K Ohm
CFG6:
0=Moby Dick ,1=Calistoga (default)
When Low choice
lower than 3.5K
Ohm
C
CPU
SEL0
0
0
266M
01200M
1
00333M
1
0
1
R237
R237
1 2
0R2J-2-GP
0R2J-2-GP
R239
R239
1 2
0R0402-PAD
0R0402-PAD
RN97
RN97
SRN10KJ-5-GP
SRN10KJ-5-GP
2 3
133M
166M
400M
Reserved
DY
DY
1D05V_S0 3D3V_S0
VGATE_PWRGD 16,38,48
PWROK 16,19
0
1
1
0
0
1
1
PLT_RST1# 16,20,26,30,31,32,34,35,45
4
1
When PM replace to GM
C
1D5V_S0
GMCH_DDCCLK
GMCH_DDCDATA
D32
H30
H29
G26
G25
B38
C35
F32
C33
C32
A33
A32
E27
E26
C37
B35
A37
B37
B34
A36
G30
D30
F29
F30
D29
F28
A16
C18
A19
B16
B18
B19
E23
D23
C22
B22
A21
B21
C26
C25
G23
H23
J30
J20
J22
U71C
U71C
CALISTOGA
CALISTOGA
L_BKLTCTL
L_BKLTEN
L_CLKCTLA
L_CLKCTLB
L_DDC_CLK
L_DDC_DATA
L_IBG
L_VBG
L_VDDEN
L_VREFH
L_VREFL
LA_CLK#
LA_CLK
LB_CLK#
LB_CLK
LA_DATA#_0
LA_DATA#_1
LA_DATA#_2
LA_DATA_0
LA_DATA_1
LA_DATA_2
LB_DATA#_0
LB_DATA#_1
LB_DATA#_2
LB_DATA_0
LB_DATA_1
LB_DATA_2
TV_DACA_OUT
TV_DACB_OUT
TV_DACC_OUT
TV_IREF
TV_IRTNA
TV_IRTNB
TV_IRTNC
CRT_BLUE
CRT_BLUE#
CRT_GREEN
CRT_GREEN#
CRT_RED
CRT_RED#
CRT_DDC_CLK
CRT_DDC_DATA
CRT_HSYNC
CRT_IREF
CRT_VSYNC
D
D
LVDS
LVDS
TV
TV
VGA
VGA
E
1D5V_PCIE_S0
R594
R594
EXP_A_COMPI
EXP_A_COMPO
EXP_A_RXN_0
EXP_A_RXN_1
EXP_A_RXN_2
EXP_A_RXN_3
EXP_A_RXN_4
EXP_A_RXN_5
EXP_A_RXN_6
EXP_A_RXN_7
EXP_A_RXN_8
EXP_A_RXN_9
EXP_A_RXN_10
EXP_A_RXN_11
EXP_A_RXN_12
EXP_A_RXN_13
EXP_A_RXN_14
EXP_A_RXN_15
EXP_A_RXP_0
EXP_A_RXP_1
EXP_A_RXP_2
EXP_A_RXP_3
EXP_A_RXP_4
EXP_A_RXP_5
EXP_A_RXP_6
EXP_A_RXP_7
EXP_A_RXP_8
EXP_A_RXP_9
EXP_A_RXP_10
EXP_A_RXP_11
EXP_A_RXP_12
EXP_A_RXP_13
EXP_A_RXP_14
EXP_A_RXP_15
EXP_A_TXN_0
EXP_A_TXN_1
EXP_A_TXN_2
EXP_A_TXN_3
EXP_A_TXN_4
EXP_A_TXN_5
EXP_A_TXN_6
EXP_A_TXN_7
EXP_A_TXN_8
EXP_A_TXN_9
EXP_A_TXN_10
EXP_A_TXN_11
EXP_A_TXN_12
PCI-EXPRESS GRAPHICS
PCI-EXPRESS GRAPHICS
EXP_A_TXN_13
EXP_A_TXN_14
EXP_A_TXN_15
EXP_A_TXP_0
EXP_A_TXP_1
EXP_A_TXP_2
EXP_A_TXP_3
EXP_A_TXP_4
EXP_A_TXP_5
EXP_A_TXP_6
EXP_A_TXP_7
EXP_A_TXP_8
EXP_A_TXP_9
EXP_A_TXP_10
EXP_A_TXP_11
EXP_A_TXP_12
EXP_A_TXP_13
EXP_A_TXP_14
EXP_A_TXP_15
<Variant Name>
<Variant Name>
<Variant Name>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet of
Date: Sheet of
Date: Sheet of
D40
D38
PEG_RXN0
F34
PEG_RXN1
G38
PEG_RXN2
H34
PEG_RXN3
J38
PEG_RXN4
L34
PEG_RXN5
M38
PEG_RXN6
N34
PEG_RXN7
P38
PEG_RXN8
R34
PEG_RXN9
T38
PEG_RXN10
V34
PEG_RXN11
W38
PEG_RXN12
Y34
PEG_RXN13
AA38
PEG_RXN14
AB34
PEG_RXN15
AC38
PEG_RXP0
D34
PEG_RXP1
F38
PEG_RXP2
G34
PEG_RXP3
H38
PEG_RXP4
J34
PEG_RXP5
L38
PEG_RXP6
M34
PEG_RXP7
N38
PEG_RXP8
P34
PEG_RXP9
R38
PEG_RXP10
T34
PEG_RXP11
V38
PEG_RXP12
W34
PEG_RXP13
Y38
PEG_RXP14
AA34
PEG_RXP15
AB38
GTXN0 PEG_TXN0
F36
G40
H36
J40
L36
M40
N36
P40
R36
T40
V36
W40
Y36
AA40
AB36
AC40
D36
F40
G36
H40
J36
L40
M36
N40
P36
R40
T36
V40
W36
Y40
AA36
AB40
1 2
GTXN1
C298 SCD1U16V2KX-3GP C298 SCD1U16V2KX-3GP
1 2
GTXN2
C297 SCD1U16V2KX-3GP C297 SCD1U16V2KX-3GP
1 2
GTXN3
C294 SCD1U16V2KX-3GP C294 SCD1U16V2KX-3GP
1 2
GTXN4
C293 SCD1U16V2KX-3GP C293 SCD1U16V2KX-3GP
1 2
GTXN5
C290 SCD1U16V2KX-3GP C290 SCD1U16V2KX-3GP
1 2
GTXN6
C289 SCD1U16V2KX-3GP C289 SCD1U16V2KX-3GP
1 2
GTXN7
C287 SCD1U16V2KX-3GP C287 SCD1U16V2KX-3GP
1 2
GTXN8
C284 SCD1U16V2KX-3GP C284 SCD1U16V2KX-3GP
1 2
GTXN9
C283 SCD1U16V2KX-3GP C283 SCD1U16V2KX-3GP
1 2
GTXN10
C280 SCD1U16V2KX-3GP C280 SCD1U16V2KX-3GP
1 2
GTXN11
C279 SCD1U16V2KX-3GP C279 SCD1U16V2KX-3GP
1 2
GTXN12
C248 SCD1U16V2KX-3GP C248 SCD1U16V2KX-3GP
1 2
GTXN13
C277 SCD1U16V2KX-3GP C277 SCD1U16V2KX-3GP
1 2
C245 SCD1U16V2KX-3GP C245 SCD1U16V2KX-3GP
1 2
GTXN15
C275 SCD1U16V2KX-3GP C275 SCD1U16V2KX-3GP
1 2
C273 SCD1U16V2KX-3GP C273 SCD1U16V2KX-3GP
GTXP0 PEG_TXP0
1 2
GTXP1
C300 SCD1U16V2KX-3GP C300 SCD1U16V2KX-3GP
1 2
GTXP2
C299 SCD1U16V2KX-3GP C299 SCD1U16V2KX-3GP
1 2
GTXP3
C296 SCD1U16V2KX-3GP C296 SCD1U16V2KX-3GP
1 2
GTXP4
C295 SCD1U16V2KX-3GP C295 SCD1U16V2KX-3GP
1 2
GTXP5
C292 SCD1U16V2KX-3GP C292 SCD1U16V2KX-3GP
1 2
GTXP6
C291 SCD1U16V2KX-3GP C291 SCD1U16V2KX-3GP
1 2
GTXP7
C288 SCD1U16V2KX-3GP C288 SCD1U16V2KX-3GP
1 2
GTXP8
C286 SCD1U16V2KX-3GP C286 SCD1U16V2KX-3GP
1 2
GTXP9
C285 SCD1U16V2KX-3GP C285 SCD1U16V2KX-3GP
1 2
GTXP10
C282 SCD1U16V2KX-3GP C282 SCD1U16V2KX-3GP
1 2
GTXP11
C281 SCD1U16V2KX-3GP C281 SCD1U16V2KX-3GP
1 2
GTXP12
C249 SCD1U16V2KX-3GP C249 SCD1U16V2KX-3GP
1 2
GTXP13
C278 SCD1U16V2KX-3GP C278 SCD1U16V2KX-3GP
1 2
GTXP14
C247 SCD1U16V2KX-3GP C247 SCD1U16V2KX-3GP
1 2
GTXP15 PEG_TXP15
C276 SCD1U16V2KX-3GP C276 SCD1U16V2KX-3GP
1 2
C274 SCD1U16V2KX-3GP C274 SCD1U16V2KX-3GP
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
GMCH (2 of 5)
GMCH (2 of 5)
GMCH (2 of 5)
AG1 -1
AG1 -1
AG1 -1
E
1 2
24D9R2F-L-GP
24D9R2F-L-GP
PEG_RXN[15..0] 45
PEG_RXP[15..0] 45
PEG_TXN1
PEG_TXN2
PEG_TXN3
PEG_TXN4
PEG_TXN5
PEG_TXN6
PEG_TXN7
PEG_TXN8
PEG_TXN9
PEG_TXN10
PEG_TXN11
PEG_TXN12
PEG_TXN13
PEG_TXN14 GTXN14
PEG_TXN15
PEG_TXP1
PEG_TXP2
PEG_TXP3
PEG_TXP4
PEG_TXP5
PEG_TXP6
PEG_TXP7
PEG_TXP8
PEG_TXP9
PEG_TXP10
PEG_TXP11
PEG_TXP12
PEG_TXP13
PEG_TXP14
75 3 Tuesday, January 10, 2006
75 3 Tuesday, January 10, 2006
75 3 Tuesday, January 10, 2006
PEG_TXN[15..0] 45
PEG_TXP[15..0] 45
Page 8
A
4 4
U71D
M_A_DQ[63..0] 11
3 3
2 2
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
AJ35
AJ34
AM31
AM33
AJ36
AK35
AJ32
AH31
AN35
AP33
AR31
AP31
AN38
AM36
AM34
AN33
AK26
AL27
AM26
AN24
AK28
AL28
AM24
AP26
AP23
AL22
AP21
AN20
AL23
AP24
AP20
AT21
AR12
AR14
AP13
AP12
AT13
AT12
AL14
AL12
AK9
AN7
AK8
AK7
AP9
AN9
AT5
AL5
AY2
AW2
AP1
AN2
AV2
AT3
AN1
AL2
AG7
AF9
AG4
AF6
AG9
AH6
AF4
AF8
U71D
SA_DQ0
SA_DQ1
SA_DQ2
SA_DQ3
SA_DQ4
SA_DQ5
SA_DQ6
SA_DQ7
SA_DQ8
SA_DQ9
SA_DQ10
SA_DQ11
SA_DQ12
SA_DQ13
SA_DQ14
SA_DQ15
SA_DQ16
SA_DQ17
SA_DQ18
SA_DQ19
SA_DQ20
SA_DQ21
SA_DQ22
SA_DQ23
SA_DQ24
SA_DQ25
SA_DQ26
SA_DQ27
SA_DQ28
SA_DQ29
SA_DQ30
SA_DQ31
SA_DQ32
SA_DQ33
SA_DQ34
SA_DQ35
SA_DQ36
SA_DQ37
SA_DQ38
SA_DQ39
SA_DQ40
SA_DQ41
SA_DQ42
SA_DQ43
SA_DQ44
SA_DQ45
SA_DQ46
SA_DQ47
SA_DQ48
SA_DQ49
SA_DQ50
SA_DQ51
SA_DQ52
SA_DQ53
SA_DQ54
SA_DQ55
SA_DQ56
SA_DQ57
SA_DQ58
SA_DQ59
SA_DQ60
SA_DQ61
SA_DQ62
SA_DQ63
CALISTOGA
CALISTOGA
B
M_B_DQ[63..0] 11
AU12
SA_BS_0
AV14
SA_BS_1
BA20
SA_BS_2
AY13
SA_CAS#
AJ33
SA_DM_0
AM35
SA_DM_1
AL26
SA_DM_2
AN22
SA_DM_3
AM14
SA_DM_4
AL9
SA_DM_5
AR3
SA_DM_6
AH4
SA_DM_7
SA_MA_0
SA_MA_1
SA_MA_2
SA_MA_3
SA_MA_4
SA_MA_5
SA_MA_6
SA_MA_7
SA_MA_8
SA_MA_9
SA_RAS#
SA_WE#
AK33
AT33
AN28
AM22
AN12
AN8
AP3
AG5
AK32
AU33
AN27
AM21
AM12
AL8
AN3
AH5
AY16
AU14
AW16
BA16
BA17
AU16
AV17
AU17
AW17
AT16
AU13
AT17
AV20
AV12
AW14
AK23
AK24
AY14
SA_DQS_0
SA_DQS_1
SA_DQS_2
SA_DQS_3
SA_DQS_4
SA_DQS_5
SA_DQS_6
SA_DQS_7
SA_DQS#_0
SA_DQS#_1
SA_DQS#_2
SA_DQS#_3
SA_DQS#_4
SA_DQS#_5
SA_DQS#_6
SA_DQS#_7
SA_MA_10
SA_MA_11
SA_MA_12
SA_MA_13
SA_RCVENIN#
SA_RCVENOUT#
DDR SYSTEM MEMORY A
DDR SYSTEM MEMORY A
M_A_CAS# 11,12
M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7
M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS6
M_A_DQS7
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
SA_RCVENIN#
SA_RCVENOUT#
Place Test PAD Near to Chip
as could as possible
M_A_BS#0 11,12
M_A_BS#1 11,12
M_A_BS#2 11,12
M_A_DM[7..0] 11
M_A_DQS[7..0] 11
M_A_DQS#[7..0] 11
M_A_A[13..0] 11,12
M_A_RAS# 11,12
TP23 TPAD30 TP23 TPAD30
TP11 TPAD30 TP11 TPAD30
M_A_WE# 11,12
C
U71E
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63
AK39
AJ37
AP39
AR41
AJ38
AK38
AN41
AP41
AT40
AV41
AU38
AV38
AP38
AR40
AW38
AY38
BA38
AV36
AR36
AP36
BA36
AU36
AP35
AP34
AY33
BA33
AT31
AU29
AU31
AW31
AV29
AW29
AM19
AL19
AP14
AN14
AN17
AM16
AP15
AL15
AJ11
AH10
AN10
AK13
AH11
AK10
BA10
AW10
BA4
AW4
AY10
AY9
AW5
AY5
AV4
AR5
AK4
AK3
AT4
AK5
AJ9
AJ8
AJ5
AJ3
U71E
SB_DQ0
SB_DQ1
SB_DQ2
SB_DQ3
SB_DQ4
SB_DQ5
SB_DQ6
SB_DQ7
SB_DQ8
SB_DQ9
SB_DQ10
SB_DQ11
SB_DQ12
SB_DQ13
SB_DQ14
SB_DQ15
SB_DQ16
SB_DQ17
SB_DQ18
SB_DQ19
SB_DQ20
SB_DQ21
SB_DQ22
SB_DQ23
SB_DQ24
SB_DQ25
SB_DQ26
SB_DQ27
SB_DQ28
SB_DQ29
SB_DQ30
SB_DQ31
SB_DQ32
SB_DQ33
SB_DQ34
SB_DQ35
SB_DQ36
SB_DQ37
SB_DQ38
SB_DQ39
SB_DQ40
SB_DQ41
SB_DQ42
SB_DQ43
SB_DQ44
SB_DQ45
SB_DQ46
SB_DQ47
SB_DQ48
SB_DQ49
SB_DQ50
SB_DQ51
SB_DQ52
SB_DQ53
SB_DQ54
SB_DQ55
SB_DQ56
SB_DQ57
SB_DQ58
SB_DQ59
SB_DQ60
SB_DQ61
SB_DQ62
SB_DQ63
CALISTOGA
CALISTOGA
D
AT24
SB_BS_0
AV23
SB_BS_1
AY28
SB_BS_2
AR24
SB_CAS#
AK36
SB_DM_0
AR38
SB_DM_1
AT36
SB_DM_2
BA31
SB_DM_3
AL17
SB_DM_4
AH8
SB_DM_5
BA5
SB_DM_6
AN4
SB_DM_7
AM39
SB_DQS_0
AT39
SB_DQS_1
AU35
SB_DQS_2
AR29
SB_DQS_3
AR16
SB_DQS_4
AR10
SB_DQS_5
AR7
SB_DQS_6
AN5
SB_DQS_7
SB_MA_0
SB_MA_1
SB_MA_2
SB_MA_3
SB_MA_4
SB_MA_5
SB_MA_6
SB_MA_7
SB_MA_8
SB_MA_9
SB_MA_10
SB_MA_11
SB_MA_12
SB_MA_13
SB_RAS#
SB_WE#
AM40
AU39
AT35
AP29
AP16
AT10
AT7
AP5
AY23
AW24
AY24
AR28
AT27
AT28
AU27
AV28
AV27
AW27
AV24
BA27
AY27
AR23
AU23
AK16
AK18
AR27
SB_DQS#_0
SB_DQS#_1
SB_DQS#_2
SB_DQS#_3
SB_DQS#_4
SB_DQS#_5
SB_DQS#_6
SB_DQS#_7
SB_RCVENIN#
SB_RCVENOUT#
DDR SYSTEM MEMORY B
DDR SYSTEM MEMORY B
M_B_CAS# 11,12
M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7
M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7 M_A_DQS5
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
SB_RCVENIN#
SB_RCVENOUT#
Place Test PAD Near to Chip
ascould as possible
E
M_B_BS#0 11,12
M_B_BS#1 11,12
M_B_BS#2 11,12
M_B_DM[7..0] 11
M_B_DQS[7..0] 11
M_B_DQS#[7..0] 11
M_B_A[13..0] 11,12
M_B_RAS# 11,12
M_B_WE# 11,12
TP22 TPAD30 TP22 TPAD30
TP21 TPAD30 TP21 TPAD30
1 1
A
B
C
D
<Variant Name>
<Variant Name>
<Variant Name>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet of
Date: Sheet of
GMCH (3 of 5)
GMCH (3 of 5)
GMCH (3 of 5)
AG1 SA
AG1 SA
AG1 SA
85 3 Tuesday, January 10, 2006
85 3 Tuesday, January 10, 2006
85 3 Tuesday, January 10, 2006
E
of
Page 9
A
R593
R593
2D5V_S0
1 2
1 2
C401
C401
1 2
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
C738
C738
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
1D5V_HPLL_S0
1 2
C400
C400
1D5V_MPLL_S0
1 2
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
C739
C739
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
2D5V_3GBG_S0
4 4
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1D5V_S0
3 3
2 2
1 1
1 2
C672
C672
1 2
HCB1608KF121T30-GP
HCB1608KF121T30-GP
68.00230.041
68.00230.041
1 2
HCB1608KF121T30-GP
HCB1608KF121T30-GP
68.00230.041
68.00230.041
A
0R0603-PAD
0R0603-PAD
L11
L11
L30
L30
1D5V_S0
B
1D5V_S0 1D5V_PCIE_S0
R592
R592
1 2
0R0805-PAD
1D5V_3GPLL_S0
1 2
R240 0R0603-PAD R240 0R0603-PAD
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
3D3V_S0
0R0603-PAD
0R0603-PAD
B
0R0805-PAD
1 2
C316
C316
R619
R619
1D5V_S0
1 2
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
1 2
1D5V_S0
1 2
0R0805-PAD
0R0805-PAD
C670
C670
0R0603-PAD
0R0603-PAD
R245
R245
1 2
C669
C669
1 2
C315
C315
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
1 2
C698
C698
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
1D5V_QTVDAC_S0
R620
R620
1 2
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
C336
C336
1 2
C668
C668
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
1D5V_S0
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
C697
C697
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
C338
C338
C314
C314
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
C671
C671
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1D05V_S0
1D5V_S0
R257
R257
0R0603-PAD
0R0603-PAD
1D5V_AUX
1 2
C330
C330
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
C
2D5V_3GBG_S0
1D5V_TVDAC_S0
1 2
C339
C339
1 2
C
1D5V_HPLL_S0
1D5V_MPLL_S0
1 2
C334
C334
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1D5V_S0
1 2
D
U71H
U71H
H22
VCCSYNC
C30
VCC_TXLVDS0
B30
VCC_TXLVDS1
A30
VCC_TXLVDS2
AJ41
VCC3G0
AB41
VCC3G1
Y41
VCC3G2
V41
VCC3G3
R41
VCC3G4
N41
VCC3G5
L41
VCC3G6
AC33
VCCA_3GPLL
G41
VCCA_3GBG
H41
VSSA_3GBG
F21
VCCA_CRTDAC0
E21
VCCA_CRTDAC1
G21
VSSA_CRTDAC
B26
VCCA_DPLLA
C39
VCCA_DPLLB
AF1
VCCA_HPLL
A38
VCCA_LVDS
B39
VSSA_LVDS
AF2
VCCA_MPLL
H20
VCCA_TVBG
G20
VSSA_TVBG
E19
VCCA_TVDACA0
F19
VCCA_TVDACA1
C20
VCCA_TVDACB0
D20
VCCA_TVDACB1
E20
VCCA_TVDACC0
F20
VCCA_TVDACC1
AH1
VCCD_HMPLL0
AH2
VCCD_HMPLL1
A28
VCCD_LVDS0
B28
VCCD_LVDS1
C28
VCCD_LVDS2
D21
VCCD_TVDAC
A23
VCC_HV0
B23
VCC_HV1
B25
VCC_HV2
H19
VCCD_QTVDAC
AK31
VCCAUX0
AF31
VCCAUX1
AE31
VCCAUX2
AC31
VCCAUX3
AL30
VCCAUX4
AK30
VCCAUX5
AJ30
VCCAUX6
AH30
VCCAUX7
AG30
VCCAUX8
AF30
VCCAUX9
AE30
VCCAUX10
AD30
VCCAUX11
AC30
VCCAUX12
AG29
VCCAUX13
AF29
VCCAUX14
AE29
VCCAUX15
AD29
VCCAUX16
AC29
VCCAUX17
AG28
VCCAUX18
AF28
VCCAUX19
AE28
VCCAUX20
AH22
VCCAUX21
AJ21
VCCAUX22
AH21
VCCAUX23
AJ20
VCCAUX24
AH20
VCCAUX25
AH19
VCCAUX26
P19
VCCAUX27
P16
VCCAUX28
AH15
VCCAUX29
P15
VCCAUX30
AH14
VCCAUX31
AG14
VCCAUX32
AF14
VCCAUX33
AE14
VCCAUX34
Y14
VCCAUX35
AF13
VCCAUX36
AE13
VCCAUX37
AF12
VCCAUX38
AE12
AD12
VCCAUX39
VCCAUX40
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
POWER
POWER
CALISTOGA
CALISTOGA
D
VTT_0
VTT_1
VTT_2
VTT_3
VTT_4
VTT_5
VTT_6
VTT_7
VTT_8
VTT_9
VTT_10
VTT_11
VTT_12
VTT_13
VTT_14
VTT_15
VTT_16
VTT_17
VTT_18
VTT_19
VTT_20
VTT_21
VTT_22
VTT_23
VTT_24
VTT_25
VTT_26
VTT_27
VTT_28
VTT_29
VTT_30
VTT_31
VTT_32
VTT_33
VTT_34
VTT_35
VTT_36
VTT_37
VTT_38
VTT_39
VTT_40
VTT_41
VTT_42
VTT_43
VTT_44
VTT_45
VTT_46
VTT_47
VTT_48
VTT_49
VTT_50
VTT_51
VTT_52
VTT_53
VTT_54
VTT_55
VTT_56
VTT_57
VTT_58
VTT_59
VTT_60
VTT_61
VTT_62
VTT_63
VTT_64
VTT_65
VTT_66
VTT_67
VTT_68
VTT_69
VTT_70
VTT_71
VTT_72
VTT_73
VTT_74
VTT_75
VTT_76
AC14
AB14
W14
V14
T14
R14
P14
N14
M14
L14
AD13
AC13
AB13
AA13
Y13
W13
V13
U13
T13
R13
N13
M13
L13
AB12
AA12
Y12
W12
V12
U12
T12
R12
P12
N12
M12
L12
R11
P11
N11
M11
R10
P10
N10
M10
P9
N9
M9
R8
P8
N8
M8
P7
N7
M7
R6
P6
M6
A6
R5
P5
N5
M5
P4
N4
M4
R3
P3
N3
M3
R2
P2
M2
D2
AB1
R1
P1
N1
M1
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
VCCP_GMCH_CAP3
VCCP_GMCH_CAP2
VCCP_GMCH_CAP1
C740
C740
SCD47U10V3ZY-GP
SCD47U10V3ZY-GP
<Variant Name>
<Variant Name>
<Variant Name>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet of
Date: Sheet of
Date: Sheet of
1 2
C361
C361
SC2D2U6D3V3MX-1-GP
SC2D2U6D3V3MX-1-GP
1 2
C710
C710
SCD22U16V3ZY-GP
SCD22U16V3ZY-GP
1 2
1 2
GMCH (4 of 5)
GMCH (4 of 5)
GMCH (4 of 5)
AG1 SA
AG1 SA
AG1 SA
E
1D05V_S0
1 2
C332
C332
C744
C744
SCD47U10V3ZY-GP
SCD47U10V3ZY-GP
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
95 3 Tuesday, January 10, 2006
95 3 Tuesday, January 10, 2006
95 3 Tuesday, January 10, 2006
E
C742
C742
SC4D7U10V5ZY-3GP
SC4D7U10V5ZY-3GP
Page 10
A
U71G
1D05V_S0
4 4
3 3
2 2
1 1
AA33
W33
AA32
W32
M32
AA31
W31
M31
AA30
W30
M30
AA29
W29
M29
AB28
AA28
M28
M27
M25
M24
AB23
AA23
M23
AC22
AB22
W22
M22
AC21
AA21
W21
M21
AC20
AB20
W20
M20
AB19
AA19
M19
M18
M17
M16
P33
N33
L33
Y32
V32
P32
N32
L32
V31
T31
R31
P31
N31
Y30
V30
U30
T30
R30
P30
N30
L30
Y29
V29
U29
R29
P29
L29
Y28
V28
U28
T28
R28
P28
N28
L28
P27
N27
L27
P26
N26
L26
N25
L25
P24
N24
Y23
P23
N23
L23
Y22
P22
N22
L22
N21
L21
Y20
P20
N20
L20
Y19
N19
L19
N18
L18
P17
N17
N16
L16
U71G
VCC_0
VCC_1
VCC_2
VCC_3
VCC_4
J33
VCC_5
VCC_6
VCC_7
VCC_8
VCC_9
VCC_10
VCC_11
VCC_12
VCC_13
J32
VCC_14
VCC_15
VCC_16
VCC_17
VCC_18
VCC_19
VCC_20
VCC_21
VCC_22
VCC_23
VCC_24
VCC_25
VCC_26
VCC_27
VCC_28
VCC_29
VCC_30
VCC_31
VCC_32
VCC_33
VCC_34
VCC_35
VCC_36
VCC_37
VCC_38
VCC_39
VCC_40
VCC_41
VCC_42
VCC_43
VCC_44
VCC_45
VCC_46
VCC_47
VCC_48
VCC_49
VCC_50
VCC_51
VCC_52
VCC_53
VCC_54
VCC_55
VCC_56
VCC_57
VCC_58
VCC_59
VCC_60
VCC_61
VCC_62
VCC_63
VCC_64
VCC_65
VCC_66
VCC_67
VCC_68
VCC_69
VCC_70
VCC_71
VCC_72
VCC_73
VCC_74
VCC_75
VCC_76
VCC_77
VCC_78
VCC_79
VCC_80
VCC_81
VCC_82
VCC_83
VCC_84
VCC_85
VCC_86
VCC_87
VCC_88
VCC_89
VCC_90
VCC_91
VCC_92
VCC_93
VCC_94
VCC_95
VCC_96
VCC_97
VCC_98
VCC_99
VCC_100
VCC_101
VCC_102
VCC_103
VCC_104
VCC_105
VCC_106
VCC_107
VCC_108
VCC_109
VCC_110
A
VCC
VCC
VCC_SM_10
VCC_SM_11
VCC_SM_12
VCC_SM_13
VCC_SM_14
VCC_SM_15
VCC_SM_16
VCC_SM_17
VCC_SM_18
VCC_SM_19
VCC_SM_20
VCC_SM_21
VCC_SM_22
VCC_SM_23
VCC_SM_24
VCC_SM_25
VCC_SM_26
VCC_SM_27
VCC_SM_28
VCC_SM_29
VCC_SM_30
VCC_SM_31
VCC_SM_32
VCC_SM_33
VCC_SM_34
VCC_SM_35
VCC_SM_36
VCC_SM_37
VCC_SM_38
VCC_SM_39
VCC_SM_40
VCC_SM_41
VCC_SM_42
VCC_SM_43
VCC_SM_44
VCC_SM_45
VCC_SM_46
VCC_SM_47
VCC_SM_48
VCC_SM_49
VCC_SM_50
VCC_SM_51
VCC_SM_52
VCC_SM_53
VCC_SM_54
VCC_SM_55
VCC_SM_56
VCC_SM_57
VCC_SM_58
VCC_SM_59
VCC_SM_60
VCC_SM_61
VCC_SM_62
VCC_SM_63
VCC_SM_64
VCC_SM_65
VCC_SM_66
VCC_SM_67
VCC_SM_68
VCC_SM_69
VCC_SM_70
VCC_SM_71
VCC_SM_72
VCC_SM_73
VCC_SM_74
VCC_SM_75
VCC_SM_76
VCC_SM_77
VCC_SM_78
VCC_SM_79
VCC_SM_80
VCC_SM_81
VCC_SM_82
VCC_SM_83
VCC_SM_84
VCC_SM_85
VCC_SM_86
VCC_SM_87
VCC_SM_88
VCC_SM_89
VCC_SM_90
VCC_SM_91
VCC_SM_92
VCC_SM_93
VCC_SM_94
VCC_SM_95
VCC_SM_96
VCC_SM_97
VCC_SM_98
VCC_SM_99
VCC_SM_100
VCC_SM_101
VCC_SM_102
VCC_SM_103
VCC_SM_104
VCC_SM_105
VCC_SM_106
VCC_SM_107
VCC_SM_0
VCC_SM_1
VCC_SM_2
VCC_SM_3
VCC_SM_4
VCC_SM_5
VCC_SM_6
VCC_SM_7
VCC_SM_8
VCC_SM_9
AU41
AT41
AM41
AU40
BA34
AY34
AW34
AV34
AU34
AT34
AR34
BA30
AY30
AW30
AV30
AU30
AT30
AR30
AP30
AN30
AM30
AM29
AL29
AK29
AJ29
AH29
AJ28
AH28
AJ27
AH27
BA26
AY26
AW26
AV26
AU26
AT26
AR26
AJ26
AH26
AJ25
AH25
AJ24
AH24
BA23
AJ23
BA22
AY22
AW22
AV22
AU22
AT22
AR22
AP22
AK22
AJ22
AK21
AK20
BA19
AY19
AW19
AV19
AU19
AT19
AR19
AP19
AK19
AJ19
AJ18
AJ17
AH17
AJ16
AH16
BA15
AY15
AW15
AV15
AU15
AT15
AR15
AJ15
AJ14
AJ13
AH13
AK12
AJ12
AH12
AG12
AK11
BA8
AY8
AW8
AV8
AT8
AR8
AP8
BA6
AY6
AW6
AV6
AT6
AR6
AP6
AN6
AL6
AK6
AJ6
AV1
AJ1
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
CALISTOGA
CALISTOGA
1 2
ST220U2VBM-3GP
ST220U2VBM-3GP
1D05V_S0
C320
C320
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
1 2
TC21
TC21
B
U71F
U71F
AD27
VCC_NCTF0
AC27
VCC_NCTF1
AB27
VCC_NCTF2
AA27
VCC_NCTF3
Y27
VCC_NCTF4
W27
VCC_NCTF5
V27
VCC_NCTF6
U27
VCC_NCTF7
T27
VCC_NCTF8
R27
VCC_NCTF9
AD26
VCC_NCTF10
AC26
VCC_NCTF11
AB26
VCC_NCTF12
AA26
VCC_NCTF13
Y26
VCC_NCTF14
W26
VCC_NCTF15
V26
VCC_NCTF16
U26
VCC_NCTF17
T26
VCC_NCTF18
R26
VCC_NCTF19
AD25
VCC_NCTF20
AC25
VCC_NCTF21
AB25
VCC_NCTF22
AA25
VCC_NCTF23
Y25
VCC_NCTF24
W25
VCC_NCTF25
V25
VCC_NCTF26
U25
VCC_NCTF27
T25
VCC_NCTF28
R25
VCC_NCTF29
AD24
VCC_NCTF30
AC24
VCC_NCTF31
AB24
VCC_NCTF32
AA24
VCC_NCTF33
Y24
VCC_NCTF34
W24
VCC_NCTF35
V24
VCC_NCTF36
U24
VCC_NCTF37
T24
VCC_NCTF38
R24
VCC_NCTF39
AD23
VCC_NCTF40
V23
VCC_NCTF41
U23
VCC_NCTF42
T23
VCC_NCTF43
R23
VCC_NCTF44
AD22
VCC_NCTF45
V22
VCC_NCTF46
U22
VCC_NCTF47
T22
VCC_NCTF48
R22
VCC_NCTF49
AD21
VCC_NCTF50
V21
U21
T21
R21
AD20
V20
U20
T20
R20
AD19
V19
U19
T19
AD18
AC18
AB18
AA18
Y18
W18
V18
U18
T18
1 2
C337
C337
VCC_NCTF51
VCC_NCTF52
VCC_NCTF53
VCC_NCTF54
VCC_NCTF55
VCC_NCTF56
VCC_NCTF57
VCC_NCTF58
VCC_NCTF59
VCC_NCTF60
VCC_NCTF61
VCC_NCTF62
VCC_NCTF63
VCC_NCTF64
VCC_NCTF65
VCC_NCTF66
VCC_NCTF67
VCC_NCTF68
VCC_NCTF69
VCC_NCTF70
VCC_NCTF71
VCC_NCTF72
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
NCTF
NCTF
CALISTOGA
CALISTOGA
1 2
C317
C317
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
C319
C319
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
Place these Caps close VCC_0 ~ VCC_110
1D8V_S3
1 2
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
B
C708
C708
DY
DY
1 2
C360
C360
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
C736
C736
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
VSS_NCTF0
VSS_NCTF1
VSS_NCTF2
VSS_NCTF3
VSS_NCTF4
VSS_NCTF5
VSS_NCTF6
VSS_NCTF7
VSS_NCTF8
VSS_NCTF9
VSS_NCTF10
VSS_NCTF11
VSS_NCTF12
VCCAUX_NCTF0
VCCAUX_NCTF1
VCCAUX_NCTF2
VCCAUX_NCTF3
VCCAUX_NCTF4
VCCAUX_NCTF5
VCCAUX_NCTF6
VCCAUX_NCTF7
VCCAUX_NCTF8
VCCAUX_NCTF9
VCCAUX_NCTF10
VCCAUX_NCTF11
VCCAUX_NCTF12
VCCAUX_NCTF13
VCCAUX_NCTF14
VCCAUX_NCTF15
VCCAUX_NCTF16
VCCAUX_NCTF17
VCCAUX_NCTF18
VCCAUX_NCTF19
VCCAUX_NCTF20
VCCAUX_NCTF21
VCCAUX_NCTF22
VCCAUX_NCTF23
VCCAUX_NCTF24
VCCAUX_NCTF25
VCCAUX_NCTF26
VCCAUX_NCTF27
VCCAUX_NCTF28
VCCAUX_NCTF29
VCCAUX_NCTF30
VCCAUX_NCTF31
VCCAUX_NCTF32
VCCAUX_NCTF33
VCCAUX_NCTF34
VCCAUX_NCTF35
VCCAUX_NCTF36
VCCAUX_NCTF37
VCCAUX_NCTF38
VCCAUX_NCTF39
VCCAUX_NCTF40
VCCAUX_NCTF41
VCCAUX_NCTF42
VCCAUX_NCTF43
VCCAUX_NCTF44
VCCAUX_NCTF45
VCCAUX_NCTF46
VCCAUX_NCTF47
VCCAUX_NCTF48
VCCAUX_NCTF49
VCCAUX_NCTF50
VCCAUX_NCTF51
VCCAUX_NCTF52
VCCAUX_NCTF53
VCCAUX_NCTF54
VCCAUX_NCTF55
VCCAUX_NCTF56
VCCAUX_NCTF57
1 2
C333
C333
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
C331
C331
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
C
U71I
U71I
AC41
VSS_0
AA41
VSS_1
W41
VSS_2
T41
AV40
AP40
AN40
AK40
AJ40
AH40
AG40
AF40
AE40
AY39
AW39
AV39
AR39
AN39
AJ39
AC39
AB39
AA39
W39
AT38
AM38
AH38
AG38
AF38
AE38
AK37
AH37
AB37
AA37
W37
AY36
AW36
AN36
AH36
AG36
AF36
AE36
AC36
BA35
AV35
AR35
AH35
AB35
AA35
W35
AN34
P41
M41
J41
F41
B40
Y39
V39
T39
R39
P39
N39
M39
L39
J39
H39
G39
F39
D39
C38
Y37
V37
T37
R37
P37
N37
M37
L37
J37
H37
G37
F37
D37
C36
B36
Y35
V35
T35
R35
P35
N35
M35
L35
J35
H35
G35
F35
D35
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
CALISTOGA
CALISTOGA
1 2
C709
C709
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
C686
C686
VSS
VSS
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
C313
C313
AE27
AE26
AE25
AE24
AE23
AE22
AE21
AE20
AE19
AE18
AC17
Y17
U17
AG27
AF27
AG26
AF26
AG25
AF25
AG24
AF24
AG23
AF23
AG22
AF22
AG21
AF21
AG20
AF20
AG19
AF19
R19
AG18
AF18
R18
AG17
AF17
AE17
AD17
AB17
AA17
W17
V17
T17
R17
AG16
AF16
AE16
AD16
AC16
AB16
AA16
Y16
W16
V16
U16
T16
R16
AG15
AF15
AE15
AD15
AC15
AB15
AA15
Y15
W15
V15
U15
T15
R15
1 2
C335
C335
1 2
C359
C359
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1D5V_AUX
1 2
1 2
C318
C318
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
C399
C399
DY
DY
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
C
TC20
TC20
ST220U2VBM-3GP
ST220U2VBM-3GP
1 2
C695
C695
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
VSS_97
VSS_98
VSS_99
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
VSS_146
VSS_147
VSS_148
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_154
VSS_155
VSS_156
VSS_157
VSS_158
VSS_159
VSS_160
VSS_161
VSS_162
VSS_163
VSS_164
VSS_165
VSS_166
VSS_167
VSS_168
VSS_169
VSS_170
VSS_171
VSS_172
VSS_173
VSS_174
VSS_175
VSS_176
VSS_177
VSS_178
VSS_179
D
AK34
AG34
AF34
AE34
AC34
C34
AW33
AV33
AR33
AE33
AB33
Y33
V33
T33
R33
M33
H33
G33
F33
D33
B33
AH32
AG32
AF32
AE32
AC32
AB32
G32
B32
AY31
AV31
AN31
AJ31
AG31
AB31
Y31
AB30
E30
AT29
AN29
AB29
T29
N29
K29
G29
E29
C29
B29
A29
BA28
AW28
AU28
AP28
AM28
AD28
AC28
W28
J28
E28
AP27
AM27
AK27
J27
G27
F27
C27
B27
AN26
M26
K26
F26
D26
AK25
P25
K25
H25
E25
D25
A25
BA24
AU24
AL24
AW23
<Variant Name>
<Variant Name>
<Variant Name>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet of
Date: Sheet of
D
Date: Sheet
AT23
AN23
AM23
AH23
AC23
W23
K23
C23
AA22
K22
G22
E22
D22
A22
BA21
AV21
AR21
AN21
AL21
AB21
Y21
P21
K21
H21
C21
AW20
AR20
AM20
AA20
K20
B20
A20
AN19
AC19
W19
K19
G19
C19
AH18
P18
H18
D18
A18
AY17
AR17
AP17
AM17
AK17
AV16
AN16
AL16
C16
AN15
AM15
AK15
N15
M15
B15
A15
BA14
AT14
AK14
AD14
AA14
U14
K14
H14
E14
AV13
AR13
AN13
AM13
AL13
AG13
P13
D13
B13
AY12
AC12
K12
H12
E12
AD11
AA11
Y11
U71J
U71J
VSS_180
VSS_181
VSS_182
VSS_183
VSS_184
VSS_185
VSS_186
J23
VSS_187
F23
VSS_188
VSS_189
VSS_190
VSS_191
VSS_192
F22
VSS_193
VSS_194
VSS_195
VSS_196
VSS_197
VSS_198
VSS_199
VSS_200
VSS_201
VSS_202
VSS_203
VSS_204
VSS_205
J21
VSS_206
VSS_207
VSS_208
VSS_209
VSS_210
VSS_211
VSS_212
VSS_213
VSS_214
VSS_215
VSS_216
VSS_217
VSS_218
VSS_219
VSS_220
VSS_221
VSS_222
VSS_223
VSS_224
VSS_225
VSS_226
VSS_227
VSS_228
VSS_229
VSS_230
VSS_231
VSS_232
VSS_233
VSS_234
J16
VSS_235
F16
VSS_236
VSS_237
VSS_238
VSS_239
VSS_240
VSS_241
VSS_242
L15
VSS_243
VSS_244
VSS_245
VSS_246
VSS_247
VSS_248
VSS_249
VSS_250
VSS_251
VSS_252
VSS_253
VSS_254
VSS_255
VSS_256
VSS_257
VSS_258
VSS_259
VSS_260
VSS_261
F13
VSS_262
VSS_263
VSS_264
VSS_265
VSS_266
VSS_267
VSS_268
VSS_269
VSS_270
VSS_271
VSS_272
VSS
VSS
CALISTOGA
CALISTOGA
GMCH (5 of 5)
GMCH (5 of 5)
GMCH (5 of 5)
AG1
AG1
AG1
E
J11
VSS_273
D11
VSS_274
B11
VSS_275
AV10
VSS_276
AP10
VSS_277
AL10
VSS_278
AJ10
VSS_279
AG10
VSS_280
AC10
VSS_281
W10
VSS_282
U10
VSS_283
BA9
VSS_284
AW9
VSS_285
AR9
VSS_286
AH9
VSS_287
AB9
VSS_288
Y9
VSS_289
R9
VSS_290
G9
VSS_291
E9
VSS_292
A9
VSS_293
AG8
VSS_294
AD8
VSS_295
AA8
VSS_296
U8
VSS_297
K8
VSS_298
C8
VSS_299
BA7
VSS_300
AV7
VSS_301
AP7
VSS_302
AL7
VSS_303
AJ7
VSS_304
AH7
VSS_305
AF7
VSS_306
AC7
VSS_307
R7
VSS_308
G7
VSS_309
D7
VSS_310
AG6
VSS_311
AD6
VSS_312
AB6
VSS_313
Y6
VSS_314
U6
VSS_315
N6
VSS_316
K6
VSS_317
H6
VSS_318
B6
VSS_319
AV5
VSS_320
AF5
VSS_321
AD5
VSS_322
AY4
VSS_323
AR4
VSS_324
AP4
VSS_325
AL4
VSS_326
AJ4
VSS_327
Y4
VSS_328
U4
VSS_329
R4
VSS_330
J4
VSS_331
F4
VSS_332
C4
VSS_333
AY3
VSS_334
AW3
VSS_335
AV3
VSS_336
AL3
VSS_337
AH3
VSS_338
AG3
VSS_339
AF3
VSS_340
AD3
VSS_341
AC3
VSS_342
AA3
VSS_343
G3
VSS_344
AT2
VSS_345
AR2
VSS_346
AP2
VSS_347
AK2
VSS_348
AJ2
VSS_349
AD2
VSS_350
AB2
VSS_351
Y2
VSS_352
U2
VSS_353
T2
VSS_354
N2
VSS_355
J2
VSS_356
H2
VSS_357
F2
VSS_358
C2
VSS_359
AL1
VSS_360
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
10 53 Tuesday, January 10, 2006
10 53 Tuesday, January 10, 2006
10 53 Tuesday, January 10, 2006
E
of
SA
SA
SA
Page 11
A
DM1
M_B_A[13..0] 8,12
4 4
M_B_BS#2 8,12
M_B_BS#0 8,12
M_B_BS#1 8,12
M_B_DQ[63..0] 8
3 3
2 2
M_B_DQS#[7..0] 8
M_B_DQS[7..0] 8
1 1
M_ODT2 7,12
M_ODT3 7,12
DDR_VREF_S3
SC2D2U6D3V3MX-1-GP
SC2D2U6D3V3MX-1-GP
1 2
C328
C328
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7
M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
1 2
BC4
BC4
DY
DY
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
A
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63
DM1
102
A0
101
A1
100
A2
99
A3
98
A4
97
A5
94
A6
92
A7
93
A8
91
A9
105
A10/AP
90
A11
89
A12
116
A13
86
A14
84
A15
85
A16/BA2
107
BA0
106
BA1
5
DQ0
7
DQ1
17
DQ2
19
DQ3
4
DQ4
6
DQ5
14
DQ6
16
DQ7
23
DQ8
25
DQ9
35
DQ10
37
DQ11
20
DQ12
22
DQ13
36
DQ14
38
DQ15
43
DQ16
45
DQ17
55
DQ18
57
DQ19
44
DQ20
46
DQ21
56
DQ22
58
DQ23
61
DQ24
63
DQ25
73
DQ26
75
DQ27
62
DQ28
64
DQ29
74
DQ30
76
DQ31
123
DQ32
125
DQ33
135
DQ34
137
DQ35
124
DQ36
126
DQ37
134
DQ38
136
DQ39
141
DQ40
143
DQ41
151
DQ42
153
DQ43
140
DQ44
142
DQ45
152
DQ46
154
DQ47
157
DQ48
159
DQ49
173
DQ50
175
DQ51
158
DQ52
160
DQ53
174
DQ54
176
DQ55
179
DQ56
181
DQ57
189
DQ58
191
DQ59
180
DQ60
182
DQ61
192
DQ62
194
DQ63
11
/DQS0
29
/DQS1
49
/DQS2
68
/DQS3
129
/DQS4
146
/DQS5
167
/DQS6
186
/DQS7
13
DQS0
31
DQS1
51
DQS2
70
DQS3
131
DQS4
148
DQS5
169
DQS6
188
DQS7
114
ODT0
119
ODT1
1
VREF
2
VSS
202
GND
DDR2-200P-5-GP 62.10017.771
DDR2-200P-5-GP 62.10017.771
High 5.2mm
2nd source:62.10017.661
/RAS
/WE
/CAS
/CS0
/CS1
CKE0
CKE1
CK0
/CK0
CK1
/CK1
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
SDA
SCL
VDDSPD
SA0
SA1
NC#50
NC#69
NC#83
NC#120
NC#163/TEST
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
NORMAL TYPE
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
GND
108
109
113
110
115
79
80
30
32
164
166
10
26
52
67
130
147
170
185
195
197
199
198
200
50
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
69
83
120
163
81
82
87
88
95
96
103
104
111
112
117
118
3
8
9
12
15
18
21
24
27
28
33
34
39
40
41
42
47
48
53
54
59
60
65
66
71
72
77
78
121
122
127
128
132
133
138
139
144
145
149
150
155
156
161
162
165
168
171
172
177
178
183
184
187
190
193
196
201
M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7
B
BC6
BC6
B
1 2
1D8V_S3
M_B_RAS# 8,12
M_B_WE# 8,12
M_B_CAS# 8,12
M_CS2# 7,12
M_CS3# 7,12
M_CKE2 7,12
M_CKE3 7,12
M_CLK_DDR3 7
M_CLK_DDR#3 7
M_CLK_DDR2 7
M_CLK_DDR#2 7
M_B_DM[7..0] 8
SMBD_ICH 3,18
SMBC_ICH 3,18
R363
R363
1 2
10KR2J-3-GP
10KR2J-3-GP
Place near DM2
1 2
DY
DY
1 2
DY
DY
3D3V_S0
M_CLK_DDR3
C326
C326
SC10P50V2JN-4GP
SC10P50V2JN-4GP
M_CLK_DDR#3
M_CLK_DDR2
C448
C448
SC10P50V2JN-4GP
SC10P50V2JN-4GP
M_CLK_DDR#2
C
M_A_A[13..0] 8,12
M_A_BS#2 8,12
M_A_BS#0 8,12
M_A_BS#1 8,12
M_A_DQ[63..0] 8
M_A_DQS#[7..0] 8
M_A_DQS[7..0] 8
M_ODT0 7,12
M_ODT1 7,12
DDR_VREF_S3
C
SC2D2U6D3V3MX-1-GP
SC2D2U6D3V3MX-1-GP
1 2
C696
C696
DDR_VREF_S3
DY
DY
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7
M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
1 2
BC10
BC10
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
D
DM2
DM2
102
A0
101
A1
100
A2
99
A3
98
A4
97
A5
94
A6
92
A7
93
A8
91
A9
105
A10/AP
90
A11
89
A12
116
A13
86
A14
84
A15
85
A16/BA2
107
BA0
106
BA1
5
DQ0
7
DQ1
17
DQ2
19
DQ3
4
DQ4
6
DQ5
14
DQ6
16
DQ7
23
DQ8
25
DQ9
35
DQ10
37
DQ11
20
DQ12
22
DQ13
36
DQ14
38
DQ15
43
DQ16
45
DQ17
55
DQ18
57
DQ19
44
DQ20
46
DQ21
56
DQ22
58
DQ23
61
DQ24
63
DQ25
73
DQ26
75
DQ27
62
DQ28
64
DQ29
74
DQ30
76
DQ31
123
DQ32
125
DQ33
135
DQ34
137
DQ35
124
DQ36
126
DQ37
134
DQ38
136
DQ39
141
DQ40
143
DQ41
151
DQ42
153
DQ43
140
DQ44
142
DQ45
152
DQ46
154
DQ47
157
DQ48
159
DQ49
173
DQ50
175
DQ51
158
DQ52
160
DQ53
174
DQ54
176
DQ55
179
DQ56
181
DQ57
189
DQ58
191
DQ59
180
DQ60
182
DQ61
192
DQ62
194
DQ63
11
/DQS0
29
/DQS1
49
/DQS2
68
/DQS3
129
/DQS4
146
/DQS5
167
/DQS6
186
/DQS7
13
DQS0
31
DQS1
51
DQS2
70
DQS3
131
DQS4
148
DQS5
169
DQS6
188
DQS7
114
ODT0
119
ODT1
1
VREF
2
VSS
202
GND
DDR2-200P-4-GP 62.10017.761
DDR2-200P-4-GP 62.10017.761
High 9.2mm
2nd source:62.10017.A61
/RAS
/WE
/CAS
/CS0
/CS1
CKE0
CKE1
CK0
/CK0
CK1
/CK1
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
SDA
SCL
VDDSPD
SA0
SA1
NC#50
NC#69
NC#83
NC#120
NC#163/TEST
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
NORMAL TYPE
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
GND
D
108
109
113
110
115
79
80
30
32
164
166
M_A_DM0
10
M_A_DM1
26
M_A_DM2
52
M_A_DM3
67
M_A_DM4
130
M_A_DM5
147
M_A_DM6
170
M_A_DM7
185
SMBD_ICH
195
SMBC_ICH
197
199
198
200
50
69
83
120
163
81
82
87
88
95
96
103
104
111
112
117
118
3
8
9
12
15
18
21
24
27
28
33
34
39
40
41
42
47
48
53
54
59
60
65
66
71
72
77
78
121
122
127
128
132
133
138
139
144
145
149
150
155
156
161
162
165
168
171
172
177
178
183
184
187
190
193
196
201
1D8V_S3
<Variant Name>
<Variant Name>
<Variant Name>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
M_A_RAS# 8,12
M_A_WE# 8,12
M_A_CAS# 8,12
M_CS0# 7,12
M_CS1# 7,12
M_CKE0 7,12
M_CKE1 7,12
M_CLK_DDR0 7
M_CLK_DDR#0 7
M_CLK_DDR1 7
M_CLK_DDR#1 7
M_A_DM[7..0] 8
BC7
BC7
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
DDR2 Socket
DDR2 Socket
DDR2 Socket
DY
DY
DY
DY
1 2
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
AG1 SB
AG1 SB
AG1 SB
E
Place near DM1
M_CLK_DDR0
1 2
C329
C329
SC10P50V2JN-4GP
SC10P50V2JN-4GP
M_CLK_DDR#0
M_CLK_DDR1
1 2
C449
C449
SC10P50V2JN-4GP
SC10P50V2JN-4GP
M_CLK_DDR#1
3D3V_S0
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11 53 Tuesday, January 10, 2006
11 53 Tuesday, January 10, 2006
11 53 Tuesday, January 10, 2006
E
Page 12
A
B
C
D
PARALLEL TERMINATION Decoupling Capacitor
E
DDR_VREF_S0
4 4
3 3
2 2
1 1
A
Put decap near power(0.9V) and pull-up resistor
RN55
RN55
1
8
7
6
SRN56J-2-GP
SRN56J-2-GP
1 2
1 2
1 2
1 2
RN62
RN62
8
7
6
SRN56J-2-GP
SRN56J-2-GP
RN60
RN60
8
7
6
SRN56J-2-GP
SRN56J-2-GP
RN59
RN59
8
7
6
SRN56J-2-GP
SRN56J-2-GP
RN54
RN54
8
7
6
SRN56J-2-GP
SRN56J-2-GP
RN61
RN61
8
7
6
SRN56J-2-GP
SRN56J-2-GP
RN63
RN63
8
7
6
SRN56J-2-GP
SRN56J-2-GP
RN65
RN65
8
7
6
SRN56J-2-GP
SRN56J-2-GP
RN66
RN66
8
7
6
SRN56J-2-GP
SRN56J-2-GP
RN56
RN56
8
7
6
SRN56J-2-GP
SRN56J-2-GP
RN64
RN64
8
7
6
SRN56J-2-GP
SRN56J-2-GP
RN67
RN67
8
7
6
SRN56J-2-GP
SRN56J-2-GP
2
M_B_A12
3
M_B_A9
4 5
R314 56R2J-4-GP R314 56R2J-4-GP
R312 56R2J-4-GP R312 56R2J-4-GP
R315 56R2J-4-GP R315 56R2J-4-GP
R313 56R2J-4-GP R313 56R2J-4-GP
M_B_A5
1
M_B_A3
2
M_B_A1
3
M_B_A10
4 5
M_B_A13
1
2
3
4 5
1
M_B_A0
2
M_B_A2
3
M_B_A4
4 5
M_B_A6
1
M_B_A7
2
M_B_A11
3
4 5
1
2
3
4 5
M_A_A13
1
2
3
4 5
1
M_A_A0
2
M_A_A2
3
M_A_A4
4 5
1
2
3
4 5
1
2
M_A_A12
3
M_A_A8
4 5
M_A_A6
1
M_A_A7
2
M_A_A11
3
4 5
M_A_A5
1
M_A_A3
2
M_A_A1
3
M_A_A10
4 5
M_A_A9
M_B_A8
M_CKE2 7,11
M_B_BS#2 8,11
M_ODT2 7,11
M_CS2# 7,11
M_B_RAS# 8,11
M_B_BS#1 8,11
M_CKE3 7,11
M_B_BS#0 8,11
M_B_WE# 8,11
M_CS3# 7,11
M_B_CAS# 8,11
M_ODT0 7,11
M_CS0# 7,11
M_A_RAS# 8,11
M_A_BS#1 8,11
M_A_BS#0 8,11
M_A_WE# 8,11
M_A_CAS# 8,11
M_CS1# 7,11
M_CKE0 7,11
M_A_BS#2 8,11
M_CKE1 7,11
M_ODT1 7,11
M_ODT3 7,11
B
M_A_A[13..0] 8,11
M_B_A[13..0] 8,11
DDR_VREF_S0
1D8V_S3
1D8V_S3
1 2
C435
C435
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
C418
C418
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
C733
C733
SC2D2U6D3V3MX-1-GP
SC2D2U6D3V3MX-1-GP
1 2
C382
C382
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
DY
DY
Put decap near power(0.9V)
and pull-up resistor
1 2
C419
C419
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
DY
DY
1 2
C396
C396
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
DY
DY
1 2
C734
C734
SC2D2U6D3V3MX-1-GP
SC2D2U6D3V3MX-1-GP
1 2
C389
C389
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
DY
DY
1 2
C383
C383
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
DY
DY
C
1 2
1 2
1 2
C387
C413
C413
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
C415
C415
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
C387
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
C434
C434
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
Place these Caps near DM1
1 2
C735
C735
SC2D2U6D3V3MX-1-GP
SC2D2U6D3V3MX-1-GP
1 2
1 2
C414
C414
C388
C388
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
DY
DY
DY
DY
Place these Caps near DM2
1 2
C392
C392
SC2D2U6D3V3MX-1-GP
SC2D2U6D3V3MX-1-GP
1 2
1 2
C416
C416
C393
C393
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
DY
DY
1 2
1 2
1 2
1 2
C386
C386
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
C436
C436
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
1 2
C410
C410
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
C390
C390
SC2D2U6D3V3MX-1-GP
SC2D2U6D3V3MX-1-GP
1 2
C384
C411
C411
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
C398
C398
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
C394
C394
SC2D2U6D3V3MX-1-GP
SC2D2U6D3V3MX-1-GP
C384
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
DY
DY
1 2
C397
C397
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
C759
C759
SC2D2U6D3V3MX-1-GP
SC2D2U6D3V3MX-1-GP
1 2
C412
C412
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
C409
C409
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
DY
DY
1 2
C395
C395
SC2D2U6D3V3MX-1-GP
SC2D2U6D3V3MX-1-GP
1 2
D
1 2
1 2
C761
C761
SC2D2U6D3V3MX-1-GP
SC2D2U6D3V3MX-1-GP
1 2
C438
C438
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
C408
C408
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
C417
C417
SC2D2U6D3V3MX-1-GP
SC2D2U6D3V3MX-1-GP
<Variant Name>
<Variant Name>
<Variant Name>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
1 2
C385
C385
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
C407
C407
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
C391
C391
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
C437
C437
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
DDR2 Termination Resistor
DDR2 Termination Resistor
DDR2 Termination Resistor
AG1 SA
AG1 SA
AG1 SA
12 53 Tuesday, January 10, 2006
12 53 Tuesday, January 10, 2006
12 53 Tuesday, January 10, 2006
E
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Page 13
3D3V_S0
LAUNCH1
LAUNCH1
14
12
11
10
9
8
7
6
5
4
3
2
1
20.K0174.012
20.K0174.012
13
ACES-CON12-GP
ACES-CON12-GP
2nd source: 20.K0185.012
CAP_LED 31
NUM_LED 31
EMAIL_LED 31
STDBY_LED 31
PWRLED 31
1 2
EC52 SCD01U16V 2KX-3GP EC52 SCD01U16V 2KX-3GP
EMAIL_LED#
1 2
EC15 SC100P50V2JN-3GP EC15 SC100P50V2JN-3GP
MAIL#
INTERNET#
EBUTTON#
PROGRAM#
PWRBTN#
1 2
EC16
EC16
GND
GND
IN
IN
GND
GND
IN
IN
GND
GND
IN
IN
GND
GND
IN
IN
GND
GND
IN
IN
SRC100P50V-2-GP
SRC100P50V-2-GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
Q12
Q12
2
R2
R2
R1
R1
1
CHDTC124EU-1GP
CHDTC124EU-1GP
Q13
Q13
2
R2
R2
R1
R1
1
CHDTC124EU-1GP
CHDTC124EU-1GP
Q40
Q40
2
R2
R2
R1
R1
1
CHDTC124EU-1GP
CHDTC124EU-1GP
Q42
Q42
2
R2
R2
R1
R1
1
CHDTC124EU-1GP
CHDTC124EU-1GP
Q41
Q41
2
R2
R2
R1
R1
1
CHDTC124EU-1GP
CHDTC124EU-1GP
RC1
RC1
OUT
OUT
CAP_LED#
3
84.00124.F1K
84.00124.F1K
OUT
OUT
NUM_LED#
3
84.00124.F1K
84.00124.F1K
OUT
OUT
EMAIL_LED#
3
84.00124.F1K
84.00124.F1K
OUT
OUT
STDBY_LED#
3
84.00124.F1K
84.00124.F1K
OUT
OUT
PWRLED#
3
84.00124.F1K
84.00124.F1K
4 5
678
ATI_LCDVDD_ON 48
1 2
100R2J-2-GP
100R2J-2-GP
1 2
100R2J-2-GP
100R2J-2-GP
123
SC1U10V3KX-3GP
SC1U10V3KX-3GP
R709
R709
R708
R708
INT_MICP 29
MAIL# 31
INTERNET# 31
EBUTTON# 31
PROGRAM# 31
Layout 40 mil
1 2
C9
C9
LED6
LED6
LED-Y-47-GP
LED-Y-47-GP
83.00190.D7A
83.00190.D7A
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
LED5
LED5
LED-G-62-GP
LED-G-62-GP
83.00190.Q70
83.00190.Q70
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
LAUNCH BD CONN
3D3V_AUX_S5
Launch
12 1
EC_PWRBTN# 31
3D3V_S0 LCDVDD_S0
6
5
4
1 2
A K
EC53
EC53
1 2
1 2
EC54
EC54
1 2
R72
R72
100KR2J-1-GP
100KR2J-1-GP
1 2
R120
R120
1 2
470R2J-2-GP
470R2J-2-GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
U2
U2
1
OUT
2
GND
ON/OFF#3IN
1 2
C8
C8
AAT4280IGU-3-T1GP
AAT4280IGU-3-T1GP
SCD1U50V3KX-GP
SCD1U50V3KX-GP
74.04280.B9P
74.04280.B9P
3D3V_S5
on Front Panel
3D3V_S0
on Front Panel
C127
C127
1 2
Layout 40 mil
IN
GND
C20
C20
SC1U10V3KX-3GP
SC1U10V3KX-3GP
CCD Pin
Pin
Symbol
5V
1
USB-
2
USB+
3
GND
4
5
GND
Inverter Pin
Symbol
Pin
Vin
1
Vin
2
PWM
3
BLON
4
GND
5
GND
6
Launch BD
Pin
Symbol
3V_S0
1
2
PWRBTN#
3
PROGRAM#
EBUTTON#
4
5
INTERNET#
6
MAIL#
79NC
MAIL_LED#
8
PWR_B_LED#
10 NC
11
INT_MICP
12 INT_MICN
LCD/INVERTER/CCD CONN
5V_S0
LCD1
LCD1
MH1
45
46
MH2
44 42
IPEX-CON40-2-GP
IPEX-CON40-2-GP
20.F0763.040
20.F0763.040
D41
D41
1N4148W-7-F-GP
1N4148W-7-F-GP
41 43
1
VCC_CCD
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
2 1
5VCCD
5VCCD
R169
R169
1 2
0R2J-2-GP
0R2J-2-GP
3VCCD
3VCCD
BRIGHTNESS
1 2
R475 0R2J-2-GP R475 0R2J-2-GP
1 2
R474 0R2J-2-GP R474 0R2J-2-GP
SC modify
Layout 60 mil
L29
L29
1
FILTER-79-GP
FILTER-79-GP
69.10084.071
69.10084.071
3D3V_S0
EC3
EC3
1 2
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
EC4
EC4
1 2
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
ATI_TXACLK- 48
ATI_TXACLK+ 48
ATI_TXAOUT2- 48
ATI_TXAOUT2+ 48
ATI_TXAOUT1- 48
ATI_TXAOUT1+ 48
ATI_TXAOUT0- 48
ATI_TXAOUT0+ 48
ATI_TXBOUT0- 48
ATI_TXBOUT0+ 48
ATI_TXBOUT1- 48
ATI_TXBOUT1+ 48
ATI_TXBOUT2- 48
ATI_TXBOUT2+ 48
ATI_TXBCLK- 48
ATI_TXBCLK+ 48
1 2
C554
C554
DY
DY
2
SC1U50V5ZY-1-GP
SC1U50V5ZY-1-GP
3 4
1 2
EC6
EC6
SC1KP16V2KX-GP
SC1KP16V2KX-GP
USB_PN5 16
USB_PP5 16
DCBATOUT
1 2
C553
C553
SCD1U25V3KX-GP
SCD1U25V3KX-GP
1 2
EC5
EC5
SC1KP16V2KX-GP
SC1KP16V2KX-GP
EVEN CHANNEL
ODD CHANNEL
1 2
EC31
EC31
EDID_CLK 46
EDID_DAT 46
1 2
EC32
EC32
SC1KP16V2KX-GP
SC1KP16V2KX-GP
TOP VIEW
40
LCDVDD_S0
1 2
1 2
C12
C12
C19
C19
DY
DY
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
BRIGHTNESS 31
BLON_OUT 31
R9
R9
100KR2J-1-GP
100KR2J-1-GP
1 2
SC1KP16V2KX-GP
SC1KP16V2KX-GP
LCD
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1
GND
GND
IN
CHRGER_LED 31
DC_BATFULL 31
BLUETOOTH_LED 31
WLAN_LED# 26
IN
GND
GND
IN
IN
GND
GND
IN
IN
Front panel
LED
ButtonVV
BlutTooth Wireless Charger Power2
V
V
Q20
Q20
2
R2
R2
R1
R1
1
CHDTC124EU-1GP
CHDTC124EU-1GP
Q24
Q24
2
R2
R2
R1
R1
1
CHDTC124EU-1GP
CHDTC124EU-1GP
Q26
Q26
2
R2
R2
R1
R1
1
CHDTC124EU-1GP
CHDTC124EU-1GP
VV
OUT
OUT
CHRGER_LED#
3
84.00124.F1K
84.00124.F1K
OUT
OUT
DC_BATFULL#
3
84.00124.F1K
84.00124.F1K
OUT
OUT
BT_LED#
3
84.00124.F1K
84.00124.F1K
1 2
1 2
1 2
1 2
100R2J-2-GP
100R2J-2-GP
2nd source: 62.40066.001
R445
R445
100R2J-2-GP
100R2J-2-GP
R444
R444
100R2J-2-GP
100R2J-2-GP
R430
R430
330R2J-3-GP
330R2J-3-GP
R431
R431
LED4
LED4
83.00190.D7A
83.00190.D7A
LED3
LED3
83.00190.Q70
83.00190.Q70
LED1 LED-B-27-U-GP
LED1 LED-B-27-U-GP
LED2
LED2
83.00190.D7A
83.00190.D7A
BT_BTN# 31
WIRELESS_BTN# 31
BTBTN1
BTBTN1
4
5
SW-SLIDE47-GP
SW-SLIDE47-GP
62.40018.251
62.40018.251
A K
LED-Y-47-GP
LED-Y-47-GP
1 2
LED-G-62-GP
LED-G-62-GP
1 2
83.00190.P70
83.00190.P70
A K
LED-Y-47-GP
LED-Y-47-GP
1
2
3
3D3V_S5
5V_S0
3D3V_S0
on Front Panel
on Front Panel
on Front Panel
on Front Panel
3D3V_S0
RN78
RN78
1
2 3
SRN10KJ-5-GP
SRN10KJ-5-GP
WLBTN1
WLBTN1
1
2
3
SW-SLIDE47-GP
SW-SLIDE47-GP
62.40018.251
62.40018.251
Charger:
OFF : Battery or DC only
Orange : Charging
Orange Blink : Battery low
Power:
Green : S0
Orange : S3
Orange Blinking : Enter S4
1st source: 20.K0228.008
4
13
4
5
Edge Trigger
LED BD CONN
LEDB1
LEDB1
MLX-CON8-7-GP-U
MLX-CON8-7-GP-U
20.K0185.008
20.K0185.008
8
1
10
8
7
6
5
4
3
2
1
9
CHRGER_LED#
DC_BATFULL#
PWRLED#
STDBY_LED#
MEDIA_LED#
NUM_LED
CAP_LED
BT_LED#
WLAN_LED#
3D3V_S0
MEDIA_LED#
NUM_LED#
CAP_LED#
-1 modify
SRC100P50V-2-GP
SRC100P50V-2-GP
SRC100P50V-2-GP
SRC100P50V-2-GP
1 2
EC33
EC33
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
RC9
RC9
1
2
3
4 5
RC2
RC2
1
2
3
4 5
EC29
EC29
1 2
SC100P50V2JN-3GP
SC100P50V2JN-3GP
EC30
EC30
1 2
SC100P50V2JN-3GP
SC100P50V2JN-3GP
R236
R236
4K7R2J-2-GP
4K7R2J-2-GP
D22
D22
3
BAW56PT-U
BAW56PT-U
83.00056.E11
83.00056.E11
DY
DY
8
7
6
DY
DY
8
7
6
DY
DY
DY
DY
5V_S0
2
1
1 2
SATA
SATA
HDLED#
Dummy when use IDE
CDROM_LED# 20
R798
R798
1 2
0R2J-2-GP
0R2J-2-GP
PATA
PATA
SATA
SATA
R233
R233
0R2J-2-GP
0R2J-2-GP
R234
R234
0R2J-2-GP
0R2J-2-GP
PATA
PATA
3D3V_S0
1 2
1 2
1 2
R235
R235
10KR2J-3-GP
10KR2J-3-GP
Dummy when use SATA
<Variant Name>
<Variant Name>
<Variant Name>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
LCD / LAUNCH / LEDs
LCD / LAUNCH / LEDs
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
LCD / LAUNCH / LEDs
AG1 -1
AG1 -1
AG1 -1
13 53 Tuesday, January 10, 2006
13 53 Tuesday, January 10, 2006
13 53 Tuesday, January 10, 2006
SATA_LED# 15
HDD_LED# 20
of
of
of
Page 14
A
B
C
D
E
Layout Note:
Place these resistors
close to the CRT-out
connector
ATI_RED 46
4 4
ATI_GREEN 46
ATI_BLUE 46
1 2
1 2
R457
R457
R456
R456
150R2F-1-GP
150R2F-1-GP
150R2F-1-GP
150R2F-1-GP
1 2
R458
R458
150R2F-1-GP
150R2F-1-GP
1 2
C541
C541
DY
DY
Layout Note:
* Must be a ground return path between this ground and the ground on
the VGA connector.
Pi-filter & 150 Ohm pull-down resistors should be as close as to CRT
CONN. RGB will hit 75 Ohm first, pi-filter, then CRT CONN.
3 3
Ferrite bead impedance: 10 ohm@100MHz
1 2
C543
C543
DY
DY
SC3P50V2CN-1-GP
SC3P50V2CN-1-GP
SC3P50V2CN-1-GP
SC3P50V2CN-1-GP
1 2
C545
C545
1 2
1 2
1 2
DY
DY
SC3P50V2CN-1-GP
SC3P50V2CN-1-GP
L17
L17
FCB1608CF-GP
FCB1608CF-GP
L18
L18
FCB1608CF-GP
FCB1608CF-GP
L19
L19
FCB1608CF-GP
FCB1608CF-GP
1 2
C542
C542
-1 for CRT SIV Fail
1 2
C544
C544
SC6D8P50V2DN-GP
SC6D8P50V2DN-GP
SC6D8P50V2DN-GP
SC6D8P50V2DN-GP
CRT_R
CRT_G
CRT_B
3D3V_S0
1 2
R6
R6
10KR2J-3-GP
10KR2J-3-GP
1 2
C546
C546
CRT_IN# 31
DAT_DDC1_5
SC6D8P50V2DN-GP
SC6D8P50V2DN-GP
JVGA_HS
JVGA_VS
CLK_DDC1_5
1 2
C3
C3
SC100P50V2JN-3GP
SC100P50V2JN-3GP
Hsync & Vsync level shift
5V_S0
1 2
C539
C539
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
U59A
U59A
14
1
R451
R451
ATI_HSY 46
ATI_VSY 46
2 2
1 2
47R2J-2-GP
47R2J-2-GP
R449
R449
1 2
47R2J-2-GP
47R2J-2-GP
HSYNC_4 JVGA_HS
14
VSYNC_4
5 6
7
2 3
U59B
U59B
4
TSAHCT125PW-GP
TSAHCT125PW-GP
TSAHCT125PW-GP
TSAHCT125PW-GP
7
For System CRT
JVGA_VS
DDC_CLK & DATA level shift
ATI_DDCDAT 46
ATI_DDCCLK 46
CRT I/F & CONNECTOR
5V_S0
2 1
D2
D2
CH751H-40PT
CH751H-40PT
4
RN3
RN3
SRN10KJ-5-GP
SRN10KJ-5-GP
RN4
RN4
SRN2K2J-1-GP
SRN2K2J-1-GP
2 3
2 3
S
S
2N7002-8-GP
2N7002-8-GP
17
11
12
13
14
15
16
VIDEO-15-42-GP-U
VIDEO-15-42-GP-U
G
G
1
D
D
Q3
Q3
1
2 3
1 2
1 2
C7
C7
SC100P50V2JN-3GP
SC100P50V2JN-3GP
C4
C4
SC100P50V2JN-3GP
SC100P50V2JN-3GP
1 2
C5
C5
SC18P50V2JN-1-GP
SC18P50V2JN-1-GP
-1 for CRT SIV Fail
1 2
C6
C6
SC18P50V2JN-1-GP
SC18P50V2JN-1-GP
3D3V_S0
4
1
CRT1
CRT1
20.20378.015
20.20378.015
G
G
1
2 3
S
S
Q4
Q4
2N7002-8-GP
2N7002-8-GP
6
1
7
2
8
3
9
4
10
5
DAT_DDC1_5
CLK_DDC1_5
D
D
CRT_R
CRT_G
CRT_B
1 2
R461
R461
0R2J-2-GP
0R2J-2-GP
1 2
R455
R455
0R2J-2-GP
0R2J-2-GP
5V_CRT_S0
C2
C2
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
CRT_IN#
DY
DY
TVOUT1
C705
C705
1 2
SC33P50V3JN-GP
SC33P50V3JN-GP
TV
TV
L26
TV
TV
TV
TV
TV
TV
L26
1 2
IND-1D2UH-5-GP
IND-1D2UH-5-GP
1 2
C704
C704
SC150P-GP
SC150P-GP
1 2
L24
L24
1 2
IND-1D2UH-5-GP
IND-1D2UH-5-GP
1 2
C689
C689
SC150P-GP
SC150P-GP
1 2
L25
L25
1 2
IND-1D2UH-5-GP
IND-1D2UH-5-GP
1 2
C688
C688
SC150P-GP
SC150P-GP
TV
TV
C690
C690
SC33P50V3JN-GP
SC33P50V3JN-GP
TV
TV
TV
TV
C691
C691
SC33P50V3JN-GP
SC33P50V3JN-GP
TV
TV
TV
TV
CRMA_1
1 2
TV
TV
C706
C706
SC270P50V2JN-2GP
SC270P50V2JN-2GP
LUMA_1
1 2
TV
TV
C693
C693
SC270P50V2JN-2GP
SC270P50V2JN-2GP
COMP_1
1 2
TV
TV
C692
C692
SC270P50V2JN-2GP
SC270P50V2JN-2GP
B
TV OUT CONN
ATI_TV_CRMA 46
ATI_TV_LUMA 46
1 1
ATI_TV_COMP 46
A
TV
TV
TV
TV
TV
TV
1 2
1 2
1 2
R621
R621
150R2F-1-GP
150R2F-1-GP
R617
R617
150R2F-1-GP
150R2F-1-GP
R616
R616
150R2F-1-GP
150R2F-1-GP
TVOUT1
TV
TV
22.10021.D81
22.10021.D81
9
8
3
6
7
5
2
4
1
MINDIN7-11-U1-GP
MINDIN7-11-U1-GP
Reverse type
LUMA_1
CRMA_1
COMP_1
D23
D23
3
TV
TV
BAV99PT-GP-U
BAV99PT-GP-U
D25
D25
3
TV
TV
BAV99PT-GP-U
BAV99PT-GP-U
D24
D24
3
TV
TV
BAV99PT-GP-U
BAV99PT-GP-U
C
5V_S0
2
1
2
1
2
1
CRT_R
CRT_G
CRT_B
D32
D32
3
BAV99PT-GP-U
BAV99PT-GP-U
D33
D33
3
BAV99PT-GP-U
BAV99PT-GP-U
D34
D34
3
BAV99PT-GP-U
BAV99PT-GP-U
5V_S0
2
1
2
1
2
1
<Variant Name>
<Variant Name>
<Variant Name>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet of
D
Date: Sheet of
CRT/TV Connector
CRT/TV Connector
CRT/TV Connector
AG1 -1
AG1 -1
AG1 -1
E
of
14 53 Tuesday, January 10, 2006
14 53 Tuesday, January 10, 2006
14 53 Tuesday, January 10, 2006
Page 15
A
B
C
D
E
4 4
3D3V_AUX_S5
D19
D19
2 1
CH751H-40PT
CH751H-40PT
RTC_AUX_S5
1 2
C135
C135
SC1U10V3ZY-6GP
SC1U10V3ZY-6GP
RTC circuitry
RTC1
RTC1
4
1
2
3
5
ACES-CON3-GP
ACES-CON3-GP
20.F0714.003
20.F0714.003
2nd source: 20.D0198.103
3 3
2 2
1 1
R123
R123
BAT
1 2
C133
C133
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
DY
DY
RTC_AUX_S5
DY
DY
1KR2J-1-GP
1KR2J-1-GP
1 2
1 2
D20
D20
BAT_D RTC_RST#
2 1
CH751H-40PT
CH751H-40PT
R543
R543
300KR2J-GP
300KR2J-GP
P.H. for internal VCCSUS1_05
INTVRMEN
R549
R549
0R2J-2-GP
0R2J-2-GP
1 2
1 2
INTVRMEN
Enable
Disable10
R540 20KR2J-L2-GP R540 20KR2J-L2-GP
1MR2J-1-GP
1MR2J-1-GP
R541
R541
C178
C178
SC1U10V3ZY-6GP
SC1U10V3ZY-6GP
AC97_BTCLK 28
ACZ_BTCLK_MDC 21
ACZ_SYNC 21,28
ACZ_RST# 21,28
ACZ_SDATAOUT 21,28
Place within 500 mils
of ICH7ball
Change to 24.9 1% ohm
when use SATA HD
1 2
C234 SC4D7P50V3DN-1GP C234 SC4D7P50V3DN-1GP
X-32D768KHZ-41GP
X-32D768KHZ-41GP
82.30001.731
82.30001.731
1 2
C236 SC4D7P50V3DN-1GP C236 SC4D7P50V3DN-1GP
1 2
AC97_BTCLK
X1
X1
R124
R124
22R2J-2-GP
22R2J-2-GP
R126
R126
22R2J-2-GP
22R2J-2-GP
R547 39R2J-L-GP R547 39R2J-L-GP
R545 39R2J-L-GP R545 39R2J-L-GP
R544
R544
4 1
2 3
1 2
1 2
1 2
1 2
ACZ_SDATAIN0 28
ACZ_SDATAIN1 21
1 2
39R2J-L-GP
39R2J-L-GP
SATA_LED# 13
SATA_RXN0 20
SATA_RXP0 20
SATA_TXN0 20
SATA_TXP0 20
CLK_PCIE_SATA# 3
CLK_PCIE_SATA 3
1 2
R569 24D9R2F-L-GP R569 24D9R2F-L-GP
IDE_PDIOR# 20
IDE_PDIOW# 20
IDE_PDDACK# 20
INT_IRQ14 20
IDE_PDIORDY 20
TP5 TPAD30 TP5 TPAD30
1 2
R164
R164
10MR2J-L-GP
10MR2J-L-GP
RCT_X1
RCT_X2
INTRUDER#
INTVRMEN
ACZ_BIT_CLK
ACZ_SYNC_R
ACZ_RST#_R
ACZ_SDATAOUT_R
SATARBIAS
AB1
AB2
AA3
AF18
AF3
AE3
AG2
AH2
AF7
AE7
AG6
AH6
AF1
AE1
AH10
AG10
AF15
AH15
AF16
AH16
AG16
AE15
Y5
W4
W1
Y1
Y2
W3
V3
U3
U5
V4
T5
U7
V6
V7
U1
R6
R5
T2
T3
T1
T4
U20A
U20A
RTXC1
RTCX2
RTCRST#
INTRUDER#
INTVRMEN
EE_CS
EE_SHCLK
EE_DOUT
EE_DIN
LAN_CLK
LAN_RSTSYNC
LAN_RXD0
LAN_RXD1
LAN_RXD2
LAN_TXD0
LAN_TXD1
LAN_TXD2
ACZ_BIT_CLK
ACZ_SYNC
ACZ_RST#
ACZ_SDIN0
ACZ_SDIN1
ACZ_SDIN2
ACZ_SDOUT
SATALED#
SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP
SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP
SATA_CLKN
SATA_CLKP
SATARBIASN
SATARBIASP
DIOR#
DIOW#
DDACK#
IDEIRQ
IORDY
DDREQ
ICH7-M-GP
ICH7-M-GP
LPC CPU
LPC CPU
RTC LAN
RTC LAN
AC-97/AZALIA
AC-97/AZALIA
SATA
SATA
IDE
IDE
LAD0
LAD1
LAD2
LAD3
LDRQ0#
LDRQ1#/GPIO23
LFRAME#
A20GATE
A20M#
CPUSLP#
TP1/DPRSTP#
TP2/DPSLP#
FERR#
GPIO49/CPUPWRGD
IGNNE#
INIT3_3V#
INIT#
INTR
RCIN#
NMI
SMI#
STPCLK#
THERMTRIP#
DD0
DD1
DD2
DD3
DD4
DD5
DD6
DD7
DD8
DD9
DD10
DD11
DD12
DD13
DD14
DD15
DA0
DA1
DA2
DCS1#
DCS3#
71.ICH7M.00U
71.ICH7M.00U
AA6
AB5
AC4
Y6
AC3
AA5
AB3
AE22
AH28
AG27
AF24
AH25
AG26
AG24
AG22
AG21
AF22
AF25
AG23
AH24
AF23
AH22
AF26
AB15
AE14
AG13
AF13
AD14
AC13
AD12
AC12
AE12
AF12
AB13
AC14
AF14
AH13
AH14
AC15
AH17
AE17
AF17
AE16
AD16
LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3
1 2
H_CPUSLP#_2
H_DPRSLP#_2
H_THERMTRIP_R
3D3V_S0
LPC _LDRQ0# 32
R5 59
R559
10KR2J-3-GP
10KR2J-3-GP
LPC_LFRAME# 31
K_A20GATE 31
H_A20M# 4
H_DPSLP# 4
H_PWRGD 4,36
H_IGNNE# 4
FWH_INIT# 34
H_INIT# 4
H_INTR 4
H_RCIN# 31
H_NMI 4
H_SMI# 4
H_STPCLK# 4
IDE_PDD0 20
IDE_PDD1 20
IDE_PDD2 20
IDE_PDD3 20
IDE_PDD4 20
IDE_PDD5 20
IDE_PDD6 20
IDE_PDD7 20
IDE_PDD8 20
IDE_PDD9 20
IDE_PDD10 20
IDE_PDD11 20
IDE_PDD12 20
IDE_PDD13 20
IDE_PDD14 20
IDE_PDD15 20
IDE_PDA0 20
IDE_PDA1 20
IDE_PDA2 20
IDE_PDCS1# 20
IDE_PDCS3# 20 IDE_PDDREQ 20
LPC_LAD[0..3] 31
Open R168 for Dothan A step
Shunt for Dothan B step
& all Yonah
R170
R170
1 2
DY
DY
0R2J-2-GP
0R2J-2-GP
R168
R168
1 2
0R0402-PAD
0R0402-PAD
<Variant Name>
<Variant Name>
<Variant Name>
1D05V_S0
1 2
R567
R567
56R2J-4-GP
56R2J-4-GP
DY
H_DPSLP#
H_PWRGD
1 2
200R2F-L-GP
200R2F-L-GP
-1 Modify
Layout Note: R568 needs to placed
within 2" of ICH7, R568 must be placed
within 2" of R169 w/o stub.
DY
H_CPUSLP# 4,6
H_DPRSLP# 4,38
R563
R563
DY
DY
1D05V_S0
1 2
1D05V_S0
1D05V_S0
R565
R565
56R2J-4-GP
56R2J-4-GP
1 2
R568
R568
56R2J-4-GP
56R2J-4-GP
H_FERR# 4
Placement Note:
Diatance between the ICH-7 M and cap on the "P" signal
should be identical distance between the ICH-7 M and cap
on the "N" signal for same pair.
A
B
C
D
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet of
Date: Sheet of
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
ICH7-M (1 of 4)
ICH7-M (1 of 4)
ICH7-M (1 of 4)
AG1 -1
AG1 -1
AG1 -1
15 53 Tuesday, January 10, 2006
15 53 Tuesday, January 10, 2006
15 53 Tuesday, January 10, 2006
E
of
Page 16
A
PCI_AD[0..31] 22,24,25,30
4 4
INT_PIRQB# 25
3 3
PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31
INT_PIRQA#
INT_PIRQB#
INT_PIRQC#
INT_PIRQD#
U20B
U20B
E18
AD0
C18
AD1
A16
AD2
F18
AD3
E16
AD4
A18
AD5
E17
AD6
A17
AD7
A15
AD8
C14
AD9
E14
AD10
D14
AD11
B12
AD12
C13
AD13
G15
AD14
G13
AD15
E12
AD16
C11
AD17
D11
AD18
A11
AD19
A10
AD20
F11
AD21
F10
AD22
E9
AD23
D9
AD24
B9
AD25
A8
AD26
A6
AD27
C7
AD28
B6
AD29
E6
AD30
D6
AD31
Interrupt I/F
Interrupt I/F
A3
PIRQA#
B4
PIRQB#
C5
PIRQC#
B5
PIRQD#
AE5
RSVD[1]
AD5
RSVD[2]
AG4
RSVD[3]
AH4
RSVD[4]
AD9
RSVD[5]
ICH7-M-GP
ICH7-M-GP
PCI
PCI
MISC
MISC
REQ0#
GNT0#
REQ1#
GNT1#
REQ2#
GNT2#
REQ3#
GNT3#
REQ4#/GPIO22
GNT4#/GPIO48
GPIO1/REQ5#
GPIO17/GNT5#
C/BE0#
C/BE1#
C/BE2#
C/BE3#
IRDY#
PAR
PCIRST#
DEVSEL#
PERR#
PLOCK#
SERR#
STOP#
TRDY#
FRAME#
PLTRST#
PCICLK
PME#
GPIO2/PIRQE#
GPIO3/PIRQF#
GPIO4/PIRQG#
GPIO5/PIRQH#
RSVD[6]
RSVD[7]
RSVD[8]
RSVD[9]
MCH_SYNC#
D7
E7
C16
D16
C17
D17
E13
F13
A13
A14
C8
D8
B15
C12
D12
C15
A7
E10
R511 47R2J-2-GP R511 47R2J-2-GP
B18
A12
C9
E11
B10
F15
F14
F16
C26
A9
B19
G8
F7
F8
G7
AE9
AG8
AH8
F21
AH20
ICH7 Pullups
RP5
PCI_FRAME#
PCI_IRDY#
PCI_TRDY#
PCI_STOP#
3D3V_S0
MCH_ICH_SYNC#
PCI_REQ#1
2 2
1 1
PCI_REQ#5
3D3V_S0
INT_PIRQD#
INT_PIRQG# INT_PIRQB#
INT_PIRQF#
INT_PIRQC#
3D3V_S0
PM_CLKRUN#
ACZ_SPKR
ECSCI#
EXT_FWH#
1 2
1KR2J-1-GP
1KR2J-1-GP
R562
R562
DY
DY
R532
R532
1 2
10KR2J-3-GP
10KR2J-3-GP
SPI
SPI
1 2
1KR2J-1-GP
1KR2J-1-GP
R42
R42
DY
DY
R557
R557
1 2
10KR2J-3-GP
10KR2J-3-GP
DY
DY
RP5
1
2
3
4
5 6
SRN8K2J-2-GP
SRN8K2J-2-GP
RP6
RP6
1
2
3
4
5 6
SRN8K2J-2-GP
SRN8K2J-2-GP
RP4
RP4
1
2
3
4
5 6
SRN8K2J-2-GP
SRN8K2J-2-GP
1 2
R625
R625
R513 1KR2J-1-GP
R513 1KR2J-1-GP
DY
DY
1 2
1 2
PCI_GNT#5
SPI_WP#
PCI_GNT#4
PWROK
A
8K2R2J-3-GP
8K2R2J-3-GP
R560
R560
R561
R561
D
D
S
S
2N7002-8-GP
2N7002-8-GP
2 3
84.27002.L04
84.27002.L04
Boot from various source
10
PCI_SERR#
9
PCI_LOCK#
8
PCI_PERR#
7
PCI_DEVSEL#
10
PCI_REQ#3
9
INT_SERIRQ PCI_REQ#2
8
PCI_REQ#4
7
PCI_REQ#0
10
9
INT_PIRQH#
8
INT_PIRQE#
7
INT_PIRQA#
3D3V_S0
1 2
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
Q43
Q43
EXT_FWH#
1
G
G
Default:H
LPC H H
PCI H L
SPI L H
3D3V_S0
3D3V_S0
3D3V_S0
GNT5# GNT4#
SMB_LINK_ALERT#
3D3V_S5
3D3V_S5
EXT_FWH# 34
4K7R2J-2-GP
4K7R2J-2-GP
T=22ms
ICH7_GPI12
PM_BATLOW#_R
PCI_REQ#0
PCI_REQ#1
PCI_REQ#2
PCI_REQ#3
PCI_GNT#3
PCI_REQ#4
PCI_GNT#4
PCI_REQ#5
PCI_GNT#5
1 2
PCI_LOCK#
R516
R516
ICH_PME#_1
1 2
R512 0R0402-PAD R512 0R0402-PAD
INT_PIRQE#
INT_PIRQF#
INT_PIRQG#
INT_PIRQH#
USB_OC#2
USB_OC#1
USB_OC#3
USB_OC#0
ECSWI#
ECSMI#
SMLINK0
SMLINK1
3D3V_S5
R587
R587
B
TP69 TPAD30 TP69 TPAD30
TP2 TPAD30 TP2 TPAD30
TP68 TPAD30 TP68 TPAD30
PCI_C/BE#0 22,24,30
PCI_C/BE#1 22,24,30
PCI_C/BE#2 22,24,30
PCI_C/BE#3 22,24,30
PCI_IRDY# 22,25,30
PCI_PAR 22,24,30
PCI_DEVSEL# 22,25,30
PCI_PERR# 22,25,30
PCI_SERR# 22,25,30
PCI_STOP# 22,25,30
PCI_TRDY# 22,25,30
PCI_FRAME# 22,25,30
1 2
0R0402-PAD
0R0402-PAD
CLK_ICHPCI 3
RP7
RP7
1
2
3
4
5 6
SRN10KJ-L3-GP
SRN10KJ-L3-GP
RP9
RP9
1
2
3
4
5 6
SRN10KJ-L3-GP
SRN10KJ-L3-GP
4
SRN100KJ-6-GP
SRN100KJ-6-GP
4
SRN10KJ-5-GP
SRN10KJ-5-GP
1 2
1
1 2
1 2
R588
R588
100KR2J-1-GP
100KR2J-1-GP
B
PCI_REQ#0 25
PCI_GNT#0 25
PCI_REQ#1 30
PCI_GNT#1 30
PCI_REQ#2 22
PCI_GNT#2 22
PCIRST1# 22,25,27,30
PLT_RST1# 7,20,26,30,31,32,34,35,45
ICH_PME# 22
INT_PIRQE# 30
INT_PIRQF# 25
INT_PIRQG# 25
INT_PIRQH# 22
MCH_ICH_SYNC# 7
3D3V_S5
10
PCIE_WAKE#
9
PSW_CLR# DBRESET#
8
SMB_ALERT#
7
PM_RI#
3D3V_S5
10
USB_OC#5
9
USB_OC#7
8
USB_OC#4
7
USB_OC#6
3D3V_S5
RN90
RN90
2 3
1
RN88
RN88
2 3
1
3
D40
D40
BAT54PT-GP
BAT54PT-GP
2
RSMRST#_TO_KBC 31
C659
C659
SC4D7U10V5ZY-3GP
SC4D7U10V5ZY-3GP
LAN
MiniC
NEW
C
U20C
U20C
PSW_CLR#
ECSMI#
R125
R125
C22
SMBCLK
B22
SMBDATA
A26
LINKALERT#
B25
SMLINK0
A25
SMLINK1
A28
RI#
A19
SPKR
A27
SUS_STAT#
A22
SYS_RST#
AB18
GPIO0/BM_BUSY#
B23
GPIO11/SMBALERT#
AC20
GPIO18/STPPCI#
AF21
GPIO20/STPCPU#
A21
GPIO26
B21
GPIO27
E23
GPIO28
AG18
GPIO32/CLKRUN#
AC19
GPIO33/AZ_DOCK_EN#
U2
GPIO34/AZ_DOCK_RST#
F20
WAKE#
AH21
SERIRQ
AF20
THRM#
AD22
VRMPWRGD
AC21
GPIO6
AC18
GPIO7
E21
GPIO8
ICH7-M-GP
ICH7-M-GP
C602 SCD1U16V2KX- 3GP C602 SCD1U16V2KX- 3GP
1 2
C601 SCD1U16V2KX- 3GP C601 SCD1U16V2KX-3GP
1 2
C574 SCD1U16V2KX- 3GP C574 SCD1U16V2KX- 3GP
1 2
C575 SCD1U16V2KX- 3GP C575 SCD1U16V2KX-3GP
1 2
C625 SCD1U16V2KX- 3GP
C625 SCD1U16V2KX-3GP
1 2
C626 SCD1U16V2KX- 3GP
C626 SCD1U16V2KX-3GP
1 2
SPI_CLK_1
SPI_CS#
SPI_ARB
SPI_MOSI
SPI_MISO
USB_OC#0
USB_OC#1
USB_OC#2
USB_OC#3
USB_OC#4
USB_OC#5
USB_OC#6
USB_OC#7
F26
F25
E28
E27
H26
H25
G28
G27
K26
K25
NEW
NEW
J28
NEW
NEW
J27
M26
M25
L28
L27
P26
P25
N28
N27
T25
T24
R28
R27
R2
P6
P1
P5
P2
D3
C4
D5
D4
E5
C3
A2
B3
U20D
U20D
PERn1
PERp1
PETn1
PETp1
PERn2
PERp2
PETn2
PETp2
PERn3
PERp3
PETn3
PETp3
PERn4
PERp4
PETn4
PETp4
PERn5
PERp5
PETn5
PETp5
PERn6
PERp6
PETn6
PETp6
SPI_CLK
SPI_CS#
SPI_ARB
SPI_MOSI
SPI_MISO
OC0#
OC1#
OC2#
OC3#
OC4#
OC5#/GPIO29
OC6#/GPIO30
OC7#/GPIO31
ICH7-M-GP
ICH7-M-GP
SMB_CLK 18,26,30,35
SMB_DATA 18,26,30,35
ACZ_SPKR 28
PM_SUS_STAT# 31,32
PM_BMBUSY# 7
PM_STPPCI# 3
PM_STPCPU# 3
PSW_CLR# 33
PM_CLKRUN# 22,25,30,31,32
PCIE_WAKE# 30,31,35
VGATE_PWRGD 7,38,48
PCIE_RXN1 35
PCIE_RXP1 35
PCIE_TXN1 35
PCIE_TXP1 35
PCIE_RXN2 26
PCIE_RXP2 26
PCIE_TXN2 26
PCIE_TXP2 26
PCIE_RXN3N 30
PCIE_RXP3N 30
PCIE_TXN3N 30
PCIE_TXP3N 30
SPI_CLK 34
C
INT_SERIRQ 25,30,31,32
SPI_WP# 34
ECSCI# 31
USB_OC#2 21
USB_OC#4 21
SMB_LINK_ALERT#
SMLINK0
SMLINK1
PM_RI#
DBRESET#
SMB_ALERT#
PCIE_WAKE#
THRM# 19
1 2
47R2J-2-GP
47R2J-2-GP
TP4 TPAD30 TP4 TPAD30
SPI_CS# 34
SPI_MOSI 34
SPI_MISO 34
D
SATA
GPIO
SATA
GPIO
SMB
SMB
Clocks
Clocks
GPIO16/DPRSLPVR
SYS
GPIO
SYS
GPIO
Power MGT
Power MGT
GPIO
GPIO
PCI-Express
PCI-Express
DMI_CLKN
DMI_CLKP
Direct Media Interface
Direct Media Interface
DMI_ZCOMP
DMI_IRCOMP
SPI
SPI
USB
USB
USBRBIAS#
USBRBIAS
1 2
R542 10KR2J-3-GP R542 10KR2J-3-GP
RN91
RN91
2 3
1
4
SRN10KJ-5-GP
SRN10KJ-5-GP
D
GPIO21/SATA0GP
GPIO19/SATA1GP
GPIO36/SATA2GP
GPIO37/SATA3GP
CLK14
CLK48
SUSCLK
SLP_S3#
SLP_S4#
SLP_S5#
PWROK
TP0/BATLOW#
PWRBTN#
LAN_RST#
RSMRST#
GPIO9
GPIO10
GPIO12
GPIO13
GPIO14
GPIO15
GPIO24
GPIO25
GPIO35
GPIO38
GPIO39
V26
DMI0RXN
V25
DMI0RXP
U28
DMI0TXN
U27
DMI0TXP
Y26
DMI1RXN
Y25
DMI1RXP
W28
DMI1TXN
W27
DMI1TXP
AB26
DMI2RXN
AB25
DMI2RXP
AA28
DMI2TXN
AA27
DMI2TXP
AD25
DMI3RXN
AD24
DMI3RXP
AC28
DMI3TXN
AC27
DMI3TXP
AE28
AE27
C25
D25
F1
USBP0N
F2
USBP0P
G4
USBP1N
G3
USBP1P
H1
USBP2N
H2
USBP2P
J4
USBP3N
J3
USBP3P
K1
USBP4N
K2
USBP4P
L4
USBP5N
L5
USBP5P
M1
USBP6N
M2
USBP6P
N4
USBP7N
N3
USBP7P
D2
D1
3D3V_S5
E
RN24
SATA0_R0
AF19
SATA0_R1
AH18
SATA0_R2
AH19
SATA0_R3
AE19
AC1
B2
C20
B24
D23
F22
AA4
PM_DPRSLPVR_R
AC22
PM_BATLOW#_R
C21
PWRBTN#_ICH
C23
C19
Y4
E20
A20
ICH7_GPI12
F19
E19
R4
E22
R3
D20
AD21
AD20
AE20
USB_PN0 21
USB_PP0 21
USB_PN1 21
USB_PP1 21
USB_PN2 21
USB_PP2 21
USB_PN3 30
USB_PP3 30
USB_PN4 21
USB_PP4 21
USB_PN5 13
USB_PP5 13
USB_PN6 26
USB_PP6 26
USB_PN7 21
USB_PP7 21
USB_RBIAS_PN
1 2
DMI_RXN0 7
DMI_RXP0 7
DMI_TXN0 7
DMI_TXP0 7
DMI_RXN1 7
DMI_RXP1 7
DMI_TXN1 7
DMI_TXP1 7
DMI_RXN2 7
DMI_RXP2 7
DMI_TXN2 7
DMI_TXP2 7
DMI_RXN3 7
DMI_RXP3 7
DMI_TXN3 7
DMI_TXP3 7
CLK_PCIE_ICH# 3
CLK_PCIE_ICH 3
DMI_IRCOMP_R
SATA0_R2
SATA0_R0
SATA0_R3
SATA0_R1
SRN10KJ-4-GP
SRN10KJ-4-GP
PM_SUS_CLK 18
PM_SLP_S3# 18,30,31,36,41,43,52
PM_SLP_S5# 31,41,43
R564 100R2J-2-GP R564 100R2J-2-GP
1 2
DY
D16
D16
BAS16-1-GP
BAS16-1-GP
1
R5 10
R510
10KR2J-3-GP
10KR2J-3-GP
2
ECSWI# 31
NEWCARD_RST# 30
Layout Note:
PCIE AC coupling caps
need to be within 250 mils of the driver.
1 2
R80
R80
RN24
1
2
3
4 5
CLK_ICH14 3
CLK48_ICH 3
PWROK 7,19
1 2
R566 100KR2J-1-GPDYR566 100KR2J-1-GP
3
1 2
R546
R546
100KR2J-1-GP
100KR2J-1-GP
DMI_TXN[3..0] 7
DMI_TXP[3..0] 7
DMI_RXN[3..0] 7
DMI_RXP[3..0] 7
1D5V_S0
Place within 500 mils of ICH
1 2
R535
R535
24D9R2F-L-GP
24D9R2F-L-GP
Pair
0
1
2
3
4 USB3
5
22D6R2F-L1-GP
22D6R2F-L1-GP
67MINIC1
SC Modify
<Variant Name>
<Variant Name>
<Variant Name>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet of
Date: Sheet of
ICH7-M (2 of 4)
ICH7-M (2 of 4)
ICH7-M (2 of 4)
AG1 -1M
AG1 -1M
AG1 -1M
16 53 Tuesday, January 10, 2006
16 53 Tuesday, January 10, 2006
16 53 Tuesday, January 10, 2006
E
3D3V_S0
8
7
6
PM_DPRSLPVR 38
SB_PWRBTN# 31
SB_RSMRST# 31
USB
Device
USB1
BT
USB2
NEW C
CCD
BT2
of
Page 17
A
B
C
D
E
Layout Note:
Place near pin AA19
U20F
U20F
G10
V5REF[1]
AD17
V5REF[2]
F6
V5REF_Sus
AA22
Vcc1_5_B[1]
AA23
Vcc1_5_B[2]
AB22
Vcc1_5_B[3]
AB23
Vcc1_5_B[4]
AC23
Vcc1_5_B[5]
AC24
Vcc1_5_B[6]
AC25
Vcc1_5_B[7]
AC26
Vcc1_5_B[8]
AD26
Vcc1_5_B[9]
AD27
Vcc1_5_B[10]
AD28
Vcc1_5_B[11]
D26
Vcc1_5_B[12]
D27
Vcc1_5_B[13]
D28
Vcc1_5_B[14]
E24
Vcc1_5_B[15]
E25
Vcc1_5_B[16]
E26
Vcc1_5_B[17]
F23
Vcc1_5_B[18]
F24
Vcc1_5_B[19]
G22
Vcc1_5_B[20]
G23
Vcc1_5_B[21]
H22
Vcc1_5_B[22]
H23
Vcc1_5_B[23]
J22
Vcc1_5_B[24]
J23
Vcc1_5_B[25]
K22
Vcc1_5_B[26]
K23
Vcc1_5_B[27]
L22
Vcc1_5_B[28]
L23
Vcc1_5_B[29]
M22
Vcc1_5_B[30]
M23
Vcc1_5_B[31]
N22
Vcc1_5_B[32]
N23
Vcc1_5_B[33]
P22
Vcc1_5_B[34]
P23
Vcc1_5_B[35]
R22
Vcc1_5_B[36]
R23
Vcc1_5_B[37]
R24
Vcc1_5_B[38]
R25
Vcc1_5_B[39]
R26
Vcc1_5_B[40]
T22
Vcc1_5_B[41]
T23
Vcc1_5_B[42]
T26
Vcc1_5_B[43]
T27
Vcc1_5_B[44]
T28
Vcc1_5_B[45]
U22
Vcc1_5_B[46]
U23
Vcc1_5_B[47]
V22
Vcc1_5_B[48]
V23
Vcc1_5_B[49]
W22
Vcc1_5_B[50]
W23
Vcc1_5_B[51]
Y22
Vcc1_5_B[52]
Y23
Vcc1_5_B[53]
B27
Vcc3_3[1]
AG28
VccDMIPLL
AB7
Vcc1_5_A[1]
AC6
Vcc1_5_A[2]
AC7
Vcc1_5_A[3]
AD6
Vcc1_5_A[4]
AE6
Vcc1_5_A[5]
AF5
Vcc1_5_A[6]
AF6
Vcc1_5_A[7]
AG5
Vcc1_5_A[8]
AH5
Vcc1_5_A[9]
AD2
VccSATAPLL
AH11
Vcc3_3[2]
AB10
Vcc1_5_A[10]
AB9
Vcc1_5_A[11]
AC10
Vcc1_5_A[12]
AD10
Vcc1_5_A[13]
AE10
Vcc1_5_A[14]
AF10
Vcc1_5_A[15]
AF9
Vcc1_5_A[16]
AG9
Vcc1_5_A[17]
AH9
Vcc1_5_A[18]
E3
VccSus3_3[19]
C1
VccUSBPLL
AA2
VccSus1_05/VccLAN1_05[1]
Y7
VccSus1_05/VccLAN1_05[2]
ICH7-M-GP
ICH7-M-GP
CORE
CORE
Vcc1_05[10]
Vcc1_05[11]
Vcc1_05[12]
Vcc1_05[13]
Vcc1_05[14]
Vcc1_05[15]
Vcc1_05[16]
Vcc1_05[17]
Vcc1_05[18]
Vcc1_05[19]
Vcc1_05[20]
VCC PAUX
VCC PAUX
VccSus3_3/VccLAN3_3[1]
VccSus3_3/VccLAN3_3[2]
VccSus3_3/VccLAN3_3[3]
VccSus3_3/VccLAN3_3[4]
Vcc3_3/VccHDA
VccSus3_3/VccSusHDA
V_CPU_IO[1]
V_CPU_IO[2]
VCCA3GP
VCCA3GP
V_CPU_IO[3]
IDE
IDE
PCI
PCI
VccSus3_3[1]
VccSus3_3[2]
VccSus3_3[3]
VccSus3_3[4]
VccSus3_3[5]
VccSus3_3[6]
VccSus3_3[7]
VccSus3_3[8]
VccSus3_3[9]
VccSus3_3[10]
VccSus3_3[11]
VccSus3_3[12]
USB
USB
VccSus3_3[13]
VccSus3_3[14]
VccSus3_3[15]
VccSus3_3[16]
VccSus3_3[17]
VccSus3_3[18]
Vcc1_5_A[19]
Vcc1_5_A[20]
Vcc1_5_A[21]
ATX ARX
ATX ARX
Vcc1_5_A[22]
Vcc1_5_A[23]
Vcc1_5_A[24]
Vcc1_5_A[25]
VccSus1_05[1]
VccSus1_05[2]
VccSus1_05[3]
Vcc1_5_A[26]
Vcc1_5_A[27]
Vcc1_5_A[28]
Vcc1_5_A[29]
Vcc1_5_A[30]
USB CORE
USB CORE
1 2
1 2
DY
DY
1 2
C638
C638
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
DY
DY
V5REF_S0
V5REF_S5
1 2
C600
C600
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
TP7 TPAD28 TP7 TPAD28
4 4
1D5V_S0
1 2
L20 0R0603-PAD L20 0R0603-PAD
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
3 3
Layout Note:
Place near ICH7
2 2
1 1
1 2
C60
C60
*Within a given well, 5VREF needs to be up before the
corresponding 3.3V rail
V5REF_S0
V5REF_S5
1D5V_S0
R558 0R0603-PAD R558 0R0603-PAD
1D5V_S0
1 2
NO_STUFF
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
C619
C619
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
3D3V_S0
2 1
1 2
2 1
1 2
1D5V_S0
1 2
1 2
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
C591
C591
DY
DY
A
1 2
1 2
C599
C599
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
D7
D7
CH751H-40PT
CH751H-40PT
C34
C34
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
D15
D15
CH751H-40PT
CH751H-40PT
C57
C57
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1D5V_GPLL_ICH_S0
L21
L21
1 2
IND-1D2UH-5-GP
IND-1D2UH-5-GP
C637
C637
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
1D5V_ICH_S0
1 2
C636
C636
1 2
C618
C618
5V_S0
1 2
5V_S5 3D3V_S5
1 2
1 2
3D3V_S0
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
C61
C61
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
R21
R21
100R2J-2-GP
100R2J-2-GP
R41
R41
100R2J-2-GP
100R2J-2-GP
C649
C649
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
1 2
1D5V_S0
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
C643
C643
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
C592
C592
1D5V_ICH7
1 2
C645
C645
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
C612
C612
1D5V_S0
1 2
3D3V_ICH_S5
1 2
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
C627
C627
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
3D3V_S0
1 2
C597
C597
C606
C606
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
NO_STUFF NO_STUFF
C642
C642
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1D5V_ICH_S0
C587
C587
1 2
B
Vcc1_05[1]
Vcc1_05[2]
Vcc1_05[3]
Vcc1_05[4]
Vcc1_05[5]
Vcc1_05[6]
Vcc1_05[7]
Vcc1_05[8]
Vcc1_05[9]
Vcc3_3[3]
Vcc3_3[4]
Vcc3_3[5]
Vcc3_3[6]
Vcc3_3[7]
Vcc3_3[8]
Vcc3_3[9]
Vcc3_3[10]
Vcc3_3[11]
Vcc3_3[12]
Vcc3_3[13]
Vcc3_3[14]
Vcc3_3[15]
Vcc3_3[16]
Vcc3_3[17]
Vcc3_3[18]
Vcc3_3[19]
Vcc3_3[20]
Vcc3_3[21]
VccRTC
C
L11
L12
L14
L16
L17
L18
M11
M18
P11
P18
T11
T18
U11
U18
V11
V12
V14
V16
V17
V18
V5
V1
W2
W7
U6
R7
AE23
AE26
AH26
AA7
AB12
AB20
AC16
AD13
AD18
AG12
AG15
AG19
A5
B13
B16
B7
C10
D15
F9
G11
G12
G16
W5
P7
A24
C24
D19
D22
G19
K3
K4
K5
K6
L1
L2
L3
L6
L7
M6
M7
N7
AB17
AC17
T7
F17
G17
AB8
AC8
K7
C28
G20
A1
H6
H7
J6
J7
3D3V_S0
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
1D5V_S0
1 2
C646
C646
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
3D3V_S5
1 2
C596
C596
V3D3A_VCCPSUS
C588
C588
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
1 2
C611
C611
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
C607
C607
3D3V_S0
1 2
1 2
C644
C644
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
0R0603-PAD
0R0603-PAD
1 2
C598
C598
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
1 2
1 2
C639
C639
C610
C610
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
C647
C647
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
3D3V_S5
1 2
C605
C605
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
C641
C641
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
3D3V_S0
C593
C593
3D3V_S5
R548
R548
1 2
NO_STUFF
C608
C608
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
C590
C590
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1D5V_S0
1 2
C613
C613
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1D05V_S0
C595
C595
1 2
C571
C571
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
C136
C136
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
C617
C617
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
C616
C616
DY
DY
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
C609
C609
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
RTC_AUX_S5
Layout Note:
D
Place near AB3
R531
R531
1 2
0R0603-PAD
0R0603-PAD
1 2
C589
C589
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
DY
DY
1 2
1 2
3D3V_S5 3D3V_ICH_S5
1D05V_S0
1 2
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
C620
C620
<Variant Name>
<Variant Name>
<Variant Name>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet of
Date: Sheet of
Date: Sheet of
1 2
C699
C699
C615
C615
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
3D3V_S0
1 2
C570
C570
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
DY
DY
NO_STUFF
3D3V_S0
Layout Note:
PCI decoupling
Layout Note:
IDE decoupling
1 2
C594
C594
C640
C640
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
ICH7-M (3 of 4)
ICH7-M (3 of 4)
ICH7-M (3 of 4)
AG1 -1M
AG1 -1M
AG1 -1M
1 2
1 2
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
17 53 Tuesday, January 10, 2006
17 53 Tuesday, January 10, 2006
17 53 Tuesday, January 10, 2006
E
1 2
C55
C55
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
C54
DY
C54
DY
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
Page 18
A
U20E
U20E
A4
VSS[1]
A23
VSS[2]
B1
VSS[3]
B8
VSS[4]
B11
VSS[5]
B14
VSS[6]
B17
VSS[7]
4 4
3 3
2 2
1 1
A
B20
B26
B28
C27
D10
D13
D18
D21
D24
E15
F12
F27
F28
G14
G18
G21
G24
G25
G26
H24
H27
H28
J24
J25
J26
K24
K27
K28
L13
L15
L24
L25
L26
M12
M13
M14
M15
M16
M17
M24
M27
M28
N11
N12
N13
N14
N15
N16
N17
N18
N24
N25
N26
P12
P13
P14
P15
P16
P17
P24
P27
C2
C6
E1
E2
E4
E8
F3
F4
F5
G1
G2
G5
G6
G9
H3
H4
H5
M3
M4
M5
N1
N2
N5
N6
P3
P4
J1
J2
J5
VSS[8]
VSS[9]
VSS[10]
VSS[11]
VSS[12]
VSS[13]
VSS[14]
VSS[15]
VSS[16]
VSS[17]
VSS[18]
VSS[19]
VSS[20]
VSS[21]
VSS[22]
VSS[23]
VSS[24]
VSS[25]
VSS[26]
VSS[27]
VSS[28]
VSS[29]
VSS[30]
VSS[31]
VSS[32]
VSS[33]
VSS[34]
VSS[35]
VSS[36]
VSS[37]
VSS[38]
VSS[39]
VSS[40]
VSS[41]
VSS[42]
VSS[43]
VSS[44]
VSS[45]
VSS[46]
VSS[47]
VSS[48]
VSS[49]
VSS[50]
VSS[51]
VSS[52]
VSS[53]
VSS[54]
VSS[55]
VSS[56]
VSS[57]
VSS[58]
VSS[59]
VSS[60]
VSS[61]
VSS[62]
VSS[63]
VSS[64]
VSS[65]
VSS[66]
VSS[67]
VSS[68]
VSS[69]
VSS[70]
VSS[71]
VSS[72]
VSS[73]
VSS[74]
VSS[75]
VSS[76]
VSS[77]
VSS[78]
VSS[79]
VSS[80]
VSS[81]
VSS[82]
VSS[83]
VSS[84]
VSS[85]
VSS[86]
VSS[87]
VSS[88]
VSS[89]
VSS[90]
VSS[91]
VSS[92]
VSS[93]
VSS[94]
VSS[95]
VSS[96]
VSS[97]
ICH7-M-GP
ICH7-M-GP
VSS[98]
VSS[99]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
VSS[159]
VSS[160]
VSS[161]
VSS[162]
VSS[163]
VSS[164]
VSS[165]
VSS[166]
VSS[167]
VSS[168]
VSS[169]
VSS[170]
VSS[171]
VSS[172]
VSS[173]
VSS[174]
VSS[175]
VSS[176]
VSS[177]
VSS[178]
VSS[179]
VSS[180]
VSS[181]
VSS[182]
VSS[183]
VSS[184]
VSS[185]
VSS[186]
VSS[187]
VSS[188]
VSS[189]
VSS[190]
VSS[191]
VSS[192]
VSS[193]
VSS[194]
P28
R1
R11
R12
R13
R14
R15
R16
R17
R18
T6
T12
T13
T14
T15
T16
T17
U4
U12
U13
U14
U15
U16
U17
U24
U25
U26
V2
V13
V15
V24
V27
V28
W6
W24
W25
W26
Y3
Y24
Y27
Y28
AA1
AA24
AA25
AA26
AB4
AB6
AB11
AB14
AB16
AB19
AB21
AB24
AB27
AB28
AC2
AC5
AC9
AC11
AD1
AD3
AD4
AD7
AD8
AD11
AD15
AD19
AD23
AE2
AE4
AE8
AE11
AE13
AE18
AE21
AE24
AE25
AF2
AF4
AF8
AF11
AF27
AF28
AG1
AG3
AG7
AG11
AG14
AG17
AG20
AG25
AH1
AH3
AH7
AH12
AH23
AH27
B
C
32K suspend clock output
PM_SLP_S3# 16,30,31,36,41,43,52
PM_SUS_CLK 16
D
U11
U11
1
OE
2
A
GND3Y
NC7SZ126P5X-GP
NC7SZ126P5X-GP
73.7S126.AAH
73.7S126.AAH
VCC
E
3D3V_S5
5
32KHZ
4
1 2
1 2
R43
R43
240KR3-GP
240KR3-GP
63.24434.15L
63.24434.15L
R44
R44
100R2J-2-GP
100R2J-2-GP
G792_32K 19
SMBUS
1
G
G
2 3
S
S
D
D
84.27002.L04
84.27002.L04
3D3V_S0
4
RN9
RN9
SRN4K7J-8-GP
SRN4K7J-8-GP
1
2 3
1
G
G
2 3
Q36
Q36
S
S
2N7002-8-GP
2N7002-8-GP
<Variant Name>
<Variant Name>
<Variant Name>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet of
Date: Sheet of
Date: Sheet
SMBC_ICH 3,11
SMBD_ICH 3,11
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
ICH7-M (4 of 4)
ICH7-M (4 of 4)
ICH7-M (4 of 4)
AG1 SD
AG1 SD
AG1 SD
E
18 53 Tuesday, January 10, 2006
18 53 Tuesday, January 10, 2006
18 53 Tuesday, January 10, 2006
of
3D3V_S5
4
RN10
RN10
SRN4K7J-8-GP
SRN4K7J-8-GP
1
2 3
SMB_CLK 16,26,30,35
SMB_DATA 16,26,30,35
B
C
Q13 & Q14 connect SMLINK and
SMBUS in S) for SMBus 2.0
compliance
5V_S0
Q37
Q37
2N7002-8-GP
2N7002-8-GP
D
D
D
Page 19
5V_S0
5V_S0
R140
R140
1 2
10R3J-3-GP
10R3J-3-GP
*Layout* 30 mil
1 2
C174
C174
SC1U10V3ZY-6GP
SC1U10V3ZY-6GP
Setting T8 as
100 Degree
V_DEGREE
=(((Degree-72)*0.02)+0.34)*VCC
PURE_HW_SHUTDOWN# 31,36
1 2
R141
R141
4K99R2F-L-GP
4K99R2F-L-GP
1 2
R138
R138
49K9R2F-L-GP
49K9R2F-L-GP
1 2
R156
R156
10KR2J-3-GP
*Layout* 15 mil
1 2
C125
C125
R118
R118
R139
R139
1 2
C173
C173
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
1 2
C124
C124
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
G792_RESET#
C120
C120
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
C123
C123
3D3V_AUX_S5
5V_S0
1 2
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
0R2J-2-GP
0R2J-2-GP
DY
DY
R119
R119
100KR2J-1-GP
100KR2J-1-GP
1 2
1 2
4K7R2F-GP
4K7R2F-GP
1 2
R137
R137
10KR2F-2-GP
10KR2F-2-GP
3D3V_S0
1 2
R117
R117
SC4D7U10V5ZY-3GP
10KR2J-3-GP
10KR2J-3-GP
THRM# 16
PWROK 7,16
SC4D7U10V5ZY-3GP
FAN1_VCC
5V_G792_S0
ALERT#
V_DEGREE
2
U18
U18
VCC
DVCC
DXP1
DXP2
DXP3
ALERT#
THERM#
THERM_SET
RESET#
G792SFUF-GP
G792SFUF-GP
1 2
C119
C119
SC2200P50V2KX-2GP
SC2200P50V2KX-2GP
FAN1
FG1
CLK
SDA
SCL
NC#19
DGND
DGND
SGND1
SGND2
SGND3
74.00792.A79
74.00792.A79
1
4
14
16
18
19
5
17
8
10
12
3
D21
D21
BAS16-1-GP
BAS16-1-GP
1
6
20
7
9
11
15
13
3
2
DXP1:108 Degree (CPU)
DXP2:H/W Setting 100(System)
DXP3:105 Degree (VGA)
Place near chip as close
as possible
10KR2J-3-GP
C227
C227
1 2
SC1KP16V2KX-GP
SC1KP16V2KX-GP
G792_32K 18
SMBD_KBC 31
SMBC_KBC 31
G792_DXP2
G792_DXP3
G792_DXN2
G792_DXN3
G68
G68
GAP-CLOSE
GAP-CLOSE
1 2
G69
G69
GAP-CLOSE
GAP-CLOSE
1 2
SC2200P50V2KX-2GP
SC2200P50V2KX-2GP
FAN1_VCC
FAN1
FAN1
FAN1_FG1
*Layout* 15 mil
3
2
1
ACES-CON3-GP
ACES-CON3-GP
20.F0714.003
20.F0714.003
5
4
2nd source: 20.D0198.103
Change to 0R2-0 when using UMA
1 2
C176
C176
1 2
C126
C126
SC2200P50V2KX-2GP
SC2200P50V2KX-2GP
G792_DXP3 46
G792_DXN3 46
System Sensor, Put between CPU and NB.
System
改接第二組
M52/54: T[op]/105, Tj/125 degree.
1 2
C175
C175
SC2200P50V2KX-2GP
SC2200P50V2KX-2GP
,VGA
接第三組
For CPU Sensor
1
C687
C687
SC470P50V3JN-2GP
SC470P50V3JN-2GP
3
Q46
Q46
PMBS3904-1-GP
PMBS3904-1-GP
2
H_THERMDA 4
H_THERMDC 4
TEMP.
Digital Output Data Bits
Sign MSB
+127.875
+126.375
+25.5
+1.75 0
+0.5
+0.125
-0.125
-1.125
-25.5
-55.25
-65.000
0
111 111
111
0
0
001
000
000
0
000
0
1
111
111
1
1
110
1
100
011 1
LSB EXT
1111
1110
1001
0001
0000
0000
1111
1110
0110
1000
1111
011
100
110
100
001
111
111
100
110
000
Dummy when G792 enhanced T8 function
HW thermal shut down tempature setting 95 degree
(18D2 Ohm), 85 degree (25.699 Ohm).
Put the back of CPU .
U34
CPU_THSET
R281
R281
1 2
25D5R2F-GP
25D5R2F-GP
PURE_HW_SHUTDOWN#
Rset=0.0012T*T-0.9308T+96.147
U34
1
SET
2
GND
OUT#3HYST
G709T1UF-GP
G709T1UF-GP
VCC
74.00709.A7F
74.00709.A7F
5
4
5V_AUX_S5
1 2
R280
R280
10R2J-2-GP
10R2J-2-GP
1 2
C367
C367
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
CPU_TH_HYST
5V_AUX_S5
1 2
1 2
DY
DY
R278
R278
0R0402-PAD
0R0402-PAD
R279
R279
0R2J-2-GP
0R2J-2-GP
Thermal Get Setting
Sencor 0
Sencor 1
Sencor 2
Sencor 3
CPU DTS
G792-1 CPU
G792-2 System
G792-3 VGA
<Variant Name>
<Variant Name>
<Variant Name>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Thermal/Fan Controllor G792
Thermal/Fan Controllor G792
Thermal/Fan Controllor G792
T6
98
98
78
110
AG1
AG1
AG1
T7
100
100
83
115
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
SC
SC
19 53 Tuesday, January 10, 2006
19 53 Tuesday, January 10, 2006
19 53 Tuesday, January 10, 2006
of
of
of
SC
Page 20
SATA Connector
PWR TRACE 100mil
TP55
TP55
K A
D27
D27
SSM22LLPT-GP
SSM22LLPT-GP
5V_S0
1 2
1 2
C440
C440
EC26
EC26
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
C439
C439
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
TPAD30
TPAD30
TPAD30
TPAD30
TP50
TP50
IDE_PDD15
IDE_PDD14
IDE_PDD13
IDE_PDD12
IDE_PDD11
IDE_PDD10
IDE_PDD9
IDE_PDD8
IDE_PDD7
IDE_PDD6
IDE_PDD5
IDE_PDD4
IDE_PDD3
IDE_PDD2
IDE_PDD1
IDE_PDD0
IDE_PDA0
IDE_PDA1
IDE_PDA2
IDE_PDCS1#
IDE_PDCS3#
HDD1
5V_S0
HDD1
42
+5V_MOTOR
41
+5V_LOGIC
1A
V33
2A
V33
3A
V33
7A
V5
8A
V5
9A
V5
13A
V12
14A
V12
15A
V12
18
16
14
12
10
11
13
15
17
35
33
36
37
38
NP1
NP2
CON44+15P+S7-GP 20.F0794.066
CON44+15P+S7-GP 20.F0794.066
RESERVED#11A
DD15
DD14
DD13
DD12
DD11
8
DD10
6
DD9
4
DD8
3
DD7
5
DD6
7
DD5
9
DD4
DD3
DD2
DD1
DD0
DA0
DA1
DA2
CS0#
CS1#
NP1
NP2
PATA : 20.F0793.044
KEY
CSEL
PDIAG#
RESET#
DASP#
INTRQ
IORDY
DIOR#
DIOW#
DMARQ
DMACK#
RESERVED#44
RESERVED#32
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
5V_S0
1
2 3
RN69
RN69
SRN10KJ-5-GP
SRN10KJ-5-GP
PATA
PATA
SATA
SATA
SATA
SATA
SATA
SATA
SATA
SATA
PATA
R349
R349
470R2J-2-GP
470R2J-2-GP
1 2
C481 SC4700P50V2KX-1GP
C481 SC4700P50V2KX-1GP
1 2
C482 SC4700P50V2KX-1GP
C482 SC4700P50V2KX-1GP
1 2
C480 SC4700P50V2KX-1GP
C480 SC4700P50V2KX-1GP
1 2
C479 SC4700P50V2KX-1GP
C479 SC4700P50V2KX-1GP
1 2
SATA_RXP0 15
SATA_RXN0 15
SATA_TXN0 15
SATA_TXP0 15
20
HDD_CSEL
28
PDIAG
34
HDDDRV#_5
1
HDD_LED#
39
INT_IRQ14
31
IDE_PDIORDY
27
IDE_PDIOR#
25
IDE_PDIOW#
23
IDE_PDDREQ
21
IDE_PDDACK#
29
44
32
11A
S6
B+
S5
B-
S3
A-
S2
A+
40
30
26
24
22
43
19
45
46
2
S1
S4
S7
4A
5A
6A
10A
12A
4
R373
R373
1 2
10KR2J-3-GP
10KR2J-3-GP
DY
DY
PATA
HDD_LED# 13
3D3V_S0
IDE_PDD8 15
IDE_PDD9 15
IDE_PDD10 15
IDE_PDD11 15
IDE_PDD12 15
IDE_PDD13 15
IDE_PDD14 15
IDE_PDD15 15
IDE_PDDREQ 15
IDE_PDIOR# 15
IDE_PDDACK# 15
IDE_PDA2 15
IDE_PDCS3# 15
5V_S0
C131
C131
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
Close to Connector
CDROM Connector
CDROM1
CDROM1
52
20.80346.050
20.80346.050
50
48
HDDDRV#_5
46
44
42
40
38
36
34
32
30
28
26
24
22
20
18
16
14
12
10
8
6
4
2
51
CSEL
IDE_PDIOW# 15
IDE_PDA1 15
IDE_PDA0 15
IDE_PDCS1# 15
CDROM_LED# 13
SATA
SATA
IDE_PDD7 15
IDE_PDD6 15
IDE_PDD5 15
IDE_PDD4 15
IDE_PDD3 15
IDE_PDD2 15
IDE_PDD1 15
IDE_PDD0 15
-1 Modify
1 2
R374
R374
0R2J-2-GP
0R2J-2-GP
PDIAG
1 2
C130
C130
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
49
47
45
43
41
39
37
35
33
31
29
27
25
23
21
19
17
15
13
11
9
7
5
3
1
SPD-CONN50-4R-19GPU
SPD-CONN50-4R-19GPU
3D3V_S0
4
1
2 3
5V_S0
1
RN23
RN23
SRN8K2J-3-GP
SRN8K2J-3-GP
IDE_PDIORDY 15
INT_IRQ14 15
49
CDROM
2
50
5V_S0 3D3V_S0
3V to 5V level shift for HDD
4
RN74
RN74
SRN10KJ-5-GP
SRN10KJ-5-GP
PATA
PATA
1
2 3
G
G
1
D
PLT_RST1# 7,16,26,30,31,32,34,35,45
2 3
S
S
Q25
Q25
PATA
PATA
D
2N7002-8-GP
2N7002-8-GP
84.27002.L04
84.27002.L04
HDDDRV#_5
<Variant Name>
<Variant Name>
<Variant Name>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
SATA/PATA HDD / ODD
SATA/PATA HDD / ODD
SATA/PATA HDD / ODD
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
AG1 -1
AG1 -1
AG1 -1
of
of
of
20 53 Tuesday, January 10, 2006
20 53 Tuesday, January 10, 2006
20 53 Tuesday, January 10, 2006
Page 21
TC22
80.22715.L02
80.22715.L02
KEMET
TC22
ST220U6D3VDM-LGP
ST220U6D3VDM-LGP
5V_USB1_S5 5V_USB5_S5
C812
1 2
5V_S5
1 2
C810
C810
SC1KP16V2KX-GP
SC1KP16V2KX-GP
1 2
1 2
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
U78
U78
1
2
3
G546A2P1UF-GP
G546A2P1UF-GP
R694
R694
100KR2J-1-GP
100KR2J-1-GP
GND
OC1#
IN
OUT1
EN1/EN1#
OUT2
EN2/EN2#4OC2#
74.00546.A7D
74.00546.A7D
5V_USB1_S5
8
7
6
5
5V_USB5_S5
C812
C808
C808
1 2
80 mil 100 mil
1 2
C809
C809
SC1KP16V2KX-GP
SC1KP16V2KX-GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
1 2
C811
C811
C829
C829
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
BLUETOOTH MODULE CONNECTOR
3D3V_S0
5
4
C827
C827
1 2
BLUETOOTH_EN 31
3D3V_BT_S0
Place near BT1
U80
U80
1
OUT
2
GND
NC#33ON/OFF#
AAT4250IGV-T1-GP
AAT4250IGV-T1-GP
74.04250.A3F
74.04250.A3F
IN
1 2
USB_OC#2 16
USB_OC#4 16 USB_EN# 31
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
TC16
TC16
ST100U6D3VDM-5
ST100U6D3VDM-5
80.10715.591
80.10715.591
AVX
USB PORT
5V_USB5_S5
L28
L28
DY
DY
USB_PN0 16
USB_PP0 16
USB_PN4 16
USB_PP4 16
1
FILTER-79-GP
FILTER-79-GP
69.10084.071
69.10084.071
L33
L33
1
FILTER-79-GP
FILTER-79-GP
69.10084.071
69.10084.071
2
3 4
1 2
R632 0R2J-2-G P R632 0R2J-2-G P
1 2
R631 0R2J-2-GP R631 0R2J-2-GP
DY
DY
2
3 4
1 2
R651 0R2J-2-G P R651 0R2J-2-G P
1 2
R652 0R2J-2-GP R652 0R2J-2-GP
USB_1ÂUSB_1+
5V_USB5_S5
USB_5-
USB_5+
-1 Modify
USB1
USB1
1
2
3
4
SKT-USB-105-GP-U
SKT-USB-105-GP-U
22.10218.J11
22.10218.J11
USB2
USB2
1
2
3
4
SKT-USB-105-GP-U
SKT-USB-105-GP-U
22.10218.J11
22.10218.J11
7
5
6
8
7
5
6
8
L47
L47
DY
BT1
BT1
4
3
2
1
5 6
ACES-CON4-1-GP
ACES-CON4-1-GP
20.D0197.104
20.D0197.104
2nd source: 20.F0760.004
1
FILTER-79-GP
FILTER-79-GP
69.10084.071
69.10084.071
1 2
R428 0R2J-2-G P R428 0R2J-2-G P
1 2
R429 0R2J-2-GP R429 0R2J-2-GP
3D3V_BT_S0
DY
2
3 4
C828 SCD1U16V2ZY-2GP C828 SCD1U16V2ZY-2GP
1 2
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
BT2
BT2
USB_PN1 16
USB_PP1 16
DY
DY
5 6
ACES-CON4-1-GP
ACES-CON4-1-GP
2nd source: 20.F0760.004
4
3
2
1
20.D0197.104
20.D0197.104
BT2_POWER
MDC 1.5 CONN
MDC1
MDC1
13
MH1
1
ACZ_SDATAOUT 15,28
ACZ_SYNC 15,28
ACZ_SDATAIN1 15
ACZ_RST# 15,28 ACZ_BTCLK_MDC 15
1 2
39R2J-L-GP
39R2J-L-GP
1 2
C562
C562
SC22P50V2JN-4GP
SC22P50V2JN-4GP
R494
R494
AC_DIN1A_R
3
5
7
9
11
MH2 17
16
AMP-CONN12A-GP
AMP-CONN12A-GP
2nd source: 20.F0604.012
20.F0582.012
20.F0582.012
15
14
2
4
6
8
10
12
18
EC563
EC563
1 2
1 2
SC22P50V2JN-4GP
SC22P50V2JN-4GP
1 2
C564
C564
SC1U10V3KX-3GP
SC1U10V3KX-3GP
R495
R495
100KR2J-1-GP
100KR2J-1-GP
3D3V_LAN_S5
TP38 TPAD30 TP38 TPAD30
USB_PN7 16
USB_PP7 16
5V_USB1_S5
L38
L38
DY
DY
USB_PN2 16
USB_PP2 16
1
FILTER-79-GP
FILTER-79-GP
69.10084.071
69.10084.071
2
3 4
1 2
R685 0R2J-2-G P R685 0R2J-2-G P
1 2
R684 0R2J-2-GP R684 0R2J-2-GP
<Variant Name>
<Variant Name>
<Variant Name>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet of
Date: Sheet of
USB and MDC I/F
USB and MDC I/F
USB and MDC I/F
USB_3ÂUSB_3+
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
AG1 -1
AG1 -1
AG1 -1
USB3
USB3
1
2
3
4
SKT-USB-105-GP-U
SKT-USB-105-GP-U
22.10218.J11
22.10218.J11
21 53 Tuesday, January 10, 2006
21 53 Tuesday, January 10, 2006
21 53 Tuesday, January 10, 2006
7
5
6
8
of
Page 22
A
B
C
D
E
CLOSE TO PHY PINS
MDI0-_M
MDI1-_M
MDI0+_M
3D3V_LAN_S5
XTALVDD
L9
L9
1 2
0R0603-PAD
3D3V_LAN_S5
4 4
SPROMCS
SPROMCLK
SPROMDOUT
SPROMDIN
AT93C46-10SU-1GP
3D3V_LAN_S5
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
L14
L14
L15
L15
PME#_LAN
1 2
C728
C728
4401E
4401E
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
DY
DY
4401E
AVDDL
C471
C471
PLLVDD
1 2
R292 0R2J-2-GP
R292 0R2J-2-GP
Q14
Q14
GND
GND
2
IN
IN
1
CHDTC124EU-1GP
CHDTC124EU-1GP
84.00124.F1K
84.00124.F1K
A
4401E
1 2
C424
C424
1 2
SCD47U10V3 ZY-GP
SCD47U10V3ZY-GP
C444
C444
DY
DY
PCI_AD23 LAN_IDSEL
4401E
4401E
R2
R2
R1
R1
DY
DY
1 2
C349
C349
4401E
4401E
1D8V_LAN_S5
3 3
2 2
1 1
1 2
0R0603-PAD
0R0603-PAD
Place PLLVDD/AVDDL
CKT as close to chip as
possible
1 2
0R0603-PAD
0R0603-PAD
3D3V_LAN_S5
PCI_AD[0..31] 16,24,25,30
1 2
1 2
SCD1U10V2 KX-4GP
SCD1U10V2KX-4GP
C470
C470
4401E
4401E
SCD1U10V2KX-4GP
PCI_C/BE#0 16,24,30
PCI_C/BE#1 16,24,30
PCI_C/BE#2 16,24,30
PCI_C/BE#3 16,24,30
PCI_FRAME# 16,25,30
PCI_TRDY# 16,25,30
PCI_PERR# 16,25,30
PCI_SERR# 16,25,30
PCI_REQ#2 16
PCI_GNT#2 16
PCI_DEVSEL# 16,25,30
1 2
INT_PIRQH# 16
PCLK_LAN 3
PM_CLKRUN# 16,25,30,31,32
PCI_STOP# 16,25,30
ICH_PME# 16
SCD1U10V2KX-4GP
PCI_IRDY# 16,25,30
PCI_PAR 16,24,30
SCD47U10V3ZY-GP
SCD47U10V3ZY-GP
R310 100R2F-L1-GP-U
R310 100R2F-L1-GP-U
4401E
4401E
OUT
OUT
3
PCIRST1# 16,25,27,30
PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31
PCI_C/BE#0
PCI_C/BE#2
PME#_LAN
BCM4401EKFBG-GP
BCM4401EKFBG-GP
M7
M5
M1
M2
M3
M4
G3
4401E
4401E
71.04401.C0U
71.04401.C0U
N7
P7
P5
N5
P4
N4
P3
N3
N2
L1
L2
K1
E3
D1
D2
D3
C1
B1
B2
D4
A5
B5
B6
C6
C7
C8
C9
L3
F3
C4
F2
F1
J2
A2
C3
J3
H3
A4
J1
C2
H2
A3
H4
H1
A6
4401E
4401E
1D8V_LAN_S5
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
CBE_0#
CBE_1#
CBE_2#
CBE_3#
FRAME#
IRDY#
TRDY#
PERR#
SERR#
REQ
GNT#
DEVSEL#
IDSEL
PAR
PCI_RST#
INTA#
PCI_CLK
CLKRUN#
STOP#
PME#
R795
R795
1KR2J-1-GP
1KR2J-1-GP
MDI0+_M 23
MDI0-_M 23
MDI1+_M 23
MDI1-_M 23
B
VDDCB8VDDCE5VDDCE6VDDCE7VDDCE8VDDCE9VDDC
TCKD7TDI
TDOD6TMS
TRST#
H12
C11
D12
1 2
AT93C46-10SU-1GP
3D3V_S5
E10
F10
VDDCF5VDDC
VDDCG4VDDCJ4VDDCJ5VDDC
Broadcom LAN
SPROM_DIN
TRD1-
TRD1+
TRD0-
TRD0+
B14
B13
N13
C14
C13
SPROMDIN
U26
U26
4401E
4401E
J10
VDDCK4VDDCK5VDDCK6VDDCK7VDDC
1
CS
2
SK
3
DI
DO4GND
R649
R649
1 2
0R0603-PAD
0R0603-PAD
K8
VCC
DC
ORG
3D3V_LAN_S5
D11
G11
K12
VDDIO
VDDIO
VDDIO
8
7
6
5
VDDIO_PCIB3VDDIO_PCIA7VDDIO_PCIC5VDDIO_PCIE1VDDIO_PCIE4VDDIO_PCIG1VDDIO_PCIK3VDDIO_PCIL4VDDIO_PCI
BCM4401E
IDSEL:AD23
INTA-->:INT_PIRQH#
GNT:PCI_GNT#2
REQ:PCI_REQ#2
SPROM_DOUT
SPROM_CLK
SPROM_CS
LINK_LED10
LINK_LED100
ACT_LED
COL_LED
XTALI
XTALO
EXT_PORL9GPIO0
J11
L10
K11
A11
B11
B10
A12
P12
N12
SPROMDOUT
SPROMCS
SPROMCLK
1 2
4K7R2J-2-GP
4K7R2J-2-GP
R201
R201
10KR2J-3-GP
10KR2J-3-GP
DY
DY
P2
GPIO1
VSSB4VSSB7VSS
H13
G12
4401E
4401E
R634
R634
1 2
10KR2J-3-GP
10KR2J-3-GP
R635
R635
DY
DY
LAN_ACT_LED# 23,35
100M_LED# 23,35
10M_LED# 23,35
C
1 2
C270
C270
1 2
4401E
4401E
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
AVDDL
F12
F13
A1
VESD1P1VESD2G2VESD3
EPHY_AVDD
VSSE2VSSF6VSSF7VSSF8VSSF9VSSG5VSSG6VSSG7VSSG8VSSG9VSS
B12
3D3V_LAN_S5
C355
C355
XTALVDD
BIASVDD
H14
A14
BIASVDD
G10
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
XTALVDD
VSSH5VSS
H6
LAN_X0
1 2
4401E
4401E
4K7R2J-2-GP
4K7R2J-2-GP
3D3V_LAN_S5
1D8V_LAN_S5
K14
L14
J14
REGSUP18
REG18OUT
VSSH7VSSH8VSSH9VSS
H10
LAN_X1
C381
C381
4401E
4401E
1 2
R288
R288
VAUXPRSNT
L6
J12
REGSUP18
VAUX_PRSNT
VSSJ6VSSJ7VSSJ8VSSJ9VSSK2VSSN1VSSN9VSS
200R2J-L1-GP
200R2J-L1-GP
1 2
XTAL-25MHZ-70GP
XTAL-25MHZ-70GP
SC27P50V2JN-2-GP
SC27P50V2JN-2-GP
A10
TEST_MODE
1 2
1 2
82.30020.581
82.30020.581
4401E
4401E
PLLVDD
G14
PLLVDD
EPHY_AVDD
0R0603-PAD
1 2
0R0603-PAD
0R0603-PAD
4401E
4401E
R290 1K24R2F-GP
R290 1K24R2F-GP
1 2
U36
U36
K13
VREF
RDAC
DC#A8
DC#A9
DC#A13
DC#B9
DC#C10
DC#C12
DC#D5
DC#D8
DC#D9
DC#D10
DC#D13
DC#D14
DC#E13
DC#E14
DC#F4
DC#F11
DC#F14
DC#G13
DC#H11
DC#J13
DC#K9
DC#K10
DC#L5
DC#L7
DC#L8
DC#L11
DC#L12
DC#L13
DC#M6
DC#M8
DC#M9
DC#M10
DC#M11
DC#M12
DC#M13
DC#M14
DC#N11
DC#N14
DC#P11
DC#P13
DC#P14
NC#N6
NC#P6
RSVD#N8
RSVD#N10
RSVD#P8
RSVD#P10
EEDATA_PXE
EECLK_PXE
P9
4401E
4401E
R297
R297
X4
X4
4401E
4401E
D
L7
L7
A8
A9
A13
B9
C10
C12
D5
D8
D9
D10
D13
D14
E13
E14
F4
F11
F14
G13
H11
J13
K9
K10
L5
L7
L8
L11
L12
L13
M6
M8
M9
M10
M11
M12
M13
M14
N11
N14
P11
P13
P14
N6
P6
N8
N10
P8
P10
E12
E11
4401E
4401E
1 2
C378
C378
4401E
4401E
BIASVDD
C377
C377
4401E
4401E
3D3V_LAN_S5
1D8V_LAN_S5
4401E
4401E
1 2
C756
C756
<Variant Name>
<Variant Name>
<Variant Name>
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
Title
Title
Title
C404
C404
4401E
4401E
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
SC27P5 0V2JN-2-GP
SC27P50V2JN-2-GP
Date: Sheet
Date: Sheet
Date: Sheet of
1 2
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
4401E
4401E
1 2
1 2
C754
C754
C750
C750
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
BCM4401E
BCM4401E
BCM4401E
4401E
4401E
RN50
RN50
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
MDI1+_M
4
4
4401E
4401E
RN51
RN51
1
2 3
4401E
4401E
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
4401E
4401E
AG1 -1
AG1 -1
AG1 -1
1
2 3
SRN49D9F-GP
SRN49D9F-GP
SRN49D9F-GP
SRN49D9F-GP
1 2
1 2
C350
C350
C351
C351
4401E
4401E
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
4401E
4401E
4401E
4401E
1 2
C727
C727
1 2
C729
C729
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
22 53 Tuesday, January 10, 2006
22 53 Tuesday, January 10, 2006
22 53 Tuesday, January 10, 2006
E
1 2
C749
C749
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
4401E
4401E
1 2
C753
C753
of
of
4401E
4401E
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
C751
C751
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
Page 23
A
B
C
D
E
Voltage
Rail
VDDIO_PCI
4 4
VDDC
VDDIO
VESD
VDDP
3D3V_2D5V_S5
1D8V_1D2V_S5
3 3
2 2
1.route on bottom as differential pairs.
2.Tx+/Tx- are pairs. Rx+/Rx- are pairs.
3.No vias, No 90 degree bends.
4.pairs must be equal lengths.
5.6mil trace width,12mil separation.
6.36mil between pairs and any other trace.
7.Must not cross ground moat,except
RJ-45 moat.
RJ11 signal must leave the other signal
or power plane 100mil.
4401E
3D3V_LAN_S5
1D8V_LAN_S5
3D3V_LAN_S5
3D3V_LAN_S5
Don't Care 2D5V_S5
3D3V_S5
1D8V_LAN_S5
DOC_TIP,DOC_RING,TIP,RING:
W/S : 10/100 @ Surface layers
10/20 @ Inner layers
10/100 LAN Transformer RJ45 PIN
1 1
TD+ --> TX+
TD- --> TX-
RD+ --> RX+
RD- --> RX-
A
RJ45-1
RJ45-2
RJ45-3
RJ45-6
5789
3D3V_S0
1D2V_LAN_S5
3D3V_LAN_S5
3D3V_S0
2D5V_S5
1D2V_S5
2D5V_LAN_S5
R478
R478
0R2J-2-GP
0R2J-2-GP
GIGA
GIGA
5787
Don't Care
Don't Care
3D3V_LAN_S5
R471
R471
0R2J-2-GP
0R2J-2-GP
4401E
4401E
1 2
1 2
C16
C16
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
1 2
C552
C552
C551
C551
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
1 2
MDI0+_M 22
MDI0-_M 22
MDI1+_M 22
MDI1-_M 22
B
C17
C17
MDI1+ 35
MDI1- 35
MDI0+ 35
MDI0- 35
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
MDI3+ 35
MDI3- 35
MDI2+ 35
MDI2- 35
4401E
4401E
4401E
4401E
4401E
4401E
4401E
4401E
MDI1+
MDI1-
MDI0+
MDI0-
R486 0R2J-2-GP
R486 0R2J-2-GP
1 2
R491 0R2J-2-GP
R491 0R2J-2-GP
1 2
R492 0R2J-2-GP
R492 0R2J-2-GP
12
R501 0R2J-2-GP
R501 0R2J-2-GP
12
XF2
XF2
1
RD+
2
RD-
3
RDCT
4
TDCT
5
TD+
6
TD-
68.68161.30A
68.68161.30A
XF1
XF1
1
RD+
2
RD-
3
RDCT
4
TDCT
5
TD+
6
TD-
RX+
RX-
RXCT
TXCT
TX+
TX-
XFORM-208-GP
XFORM-208-GP
GIGA
GIGA
RX+
RX-
RXCT
TXCT
TX+
TX-
XFORM-208-GP
XFORM-208-GP
MCT4
MCT3
MCT2
MCT1
12
11
10
9
8
7
12
11
10
9
8
7
123
RJ45_7
RJ45_8
MCT4 TCT1
MCT3
RJ45_4
RJ45_5
RJ45_3
RJ45_6
MCT2
MCT1
RJ45_1
RJ45_2
C
678
4 5
RN6
RN6
SRN75J-1-GP
SRN75J-1-GP
LAN_TERMINAL
10M_LED# 22,35
100M_LED# 22,35
1G_LED# 35
3D3V_LAN_S5
3D3V_LAN_S5
LAN_ACT_LED# 22,35
D36
D36
1
2
3 4
CH731UPT-GP
CH731UPT-GP
EC2
EC2
1 2
SC1KP2KV8KX-LGP
SC1KP2KV8KX-LGP
For Modem Cable from MDC
TRING1
TRING1
3
1
2
4
ACES-CON2-GP-U
ACES-CON2-GP-U
20.F0714.002
20.F0714.002
2nd source: 20.D0196.102
1 2
470R2J-2-GP
470R2J-2-GP
R10
R10
R473
R473
470R2J-2-GP
470R2J-2-GP
1 2
SRC100P50V-2-GP
SRC100P50V-2-GP
77.61012.02L
77.61012.02L
6
LAN_LED#
5
1 2
L5 HFB16 08VF-102-GP L5 HFB16 08VF-102-GP
1 2
L4 HFB1608VF-102-GP L4 HFB1608VF-102-GP
LAN_LED#
LAN_ACT_LED#
CONN_PWR_1
CONN_PWR_2
ERC1
ERC1
678
123
D
LAN Connector
RJ1
CONN_PWR_2
RJ45_1
RJ45_2
RJ45_3
RJ45_4
RJ45_5
RJ45_6
RJ45_7
RJ45_8
CONN_PWR_1
TIP
RING
4 5
RJ1
9
B1
NP1
B2
RJ45_1
RJ45_2
RJ45_3
RJ45_4
RJ45_5
RJ45_6
RJ45_7
RJ45_8
A1
A2
A3
RJ11_1
RJ11_2
NP2
10
RJ45-107-GP
RJ45-107-GP
22.10245.J01
22.10245.J01
LAN Link:
LAN Data: Yellow(B2), when LAN is
<Variant Name>
<Variant Name>
<Variant Name>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
LAN Connector
LAN Connector
LAN Connector
LED COLOR
B2:YELLOW
A1:Amber
A3:GREEN
Green(A3), behavior is the
same for 10/100/1000 bits
transfering data.
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
AG1 SD
AG1 SD
AG1 SD
53 Tuesday, January 10, 2006
53 Tuesday, January 10, 2006
53 Tuesday, January 10, 2006
of
of
of
23
23
23
E
Page 24
A
4 4
PCI_C/BE#0 16,22,30
PCI_C/BE#1 16,22,30
PCI_C/BE#2 16,22,30
PCI_C/BE#3 16,22,30
1 OF 2
R11
P11
U11
V11
W11
R10
U10
V10
1 OF 2
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
R9
AD8
U9
AD9
V9
AD10
W9
AD11
V8
AD12
U8
AD13
R8
AD14
W7
AD15
W4
AD16
T2
AD17
T1
AD18
R3
AD19
P5
AD20
R2
AD21
R1
AD22
P3
AD23
N3
AD24
N2
AD25
N1
AD26
M5
AD27
M6
AD28
M3
AD29
M2
AD30
M1
AD31
U7
PAR
1394_AGND
SD_D[0..3] 26
PCI_AD[0..31] 16,22,25,30
3 3
PCI_PAR 16,22,30
2 2
1 1
PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31
P2
U14
B
C766 should close Pin-P15
and Pin-R17.
1394_AGND
3D3V_PLL_S0
VCC_ASKT_S0
C766
C423
C423
1 2
VR_PORTK1VR_PORT
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
C766
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
P15
U19
U15
J19
VCCCB
AVDD_33
VDDPLL_15
VDDPLL_33
P14
AVDD_33
P13
AVDD_33
W8
A15
L14
P10
VCCL6VCC
VCCCB
VCCP6VCCP8VCC
VCCPP1VCCP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
C442
C442
1 2
K19
W10
K2
C/BE0#
C/BE1#V7C/BE2#U5C/BE3#
VR_EN#
TI PCI7412
AGND
AGND
AGND
U13
R14
GND
GNDN6GNDP7GND
P9
K14
M14
GNDF7GND
GND
GND
GNDH6GNDK6GND
SD_D3 26
SD_D2 26
SD_D1 26
SD_D0 26
SD_WP 26
SD_CMD 26
SD_CLK 26
SM_R# 26
G14
VSSPLL
F10
F13
R17
SD_DAT0/SM_D4C6SD_DAT1/SM_D5A5SD_DAT2/SM_D6B5SD_DAT3/SM_D7
E6
MC_PWR_CTRL_0
MC_PWR_CTRL_1/SM_R/B#F8SD_CD#
SD_CLK/SM_RE#A4SD_CMD/SM_ALE
SD_WP/SM_CE#
E9
E7
C8
C5
MC_PWR_CTRL1_0
C
3D3V_S0
C776
C776
1 2
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
U38A
VCCF6VCCF9VCC
CAD10/CE2#
CAD11/OE#
CAD12/A11
CAD13/IORD#
CAD15/IOWR#
CAD16/A17
CAD17/A24
CAD19/A25
CAD31/D10
CPAR/A13
CC/BE0#/CE1#
CC/BE1#/A8
PCI7412ZHK-GP71.07412.B0U
PCI7412ZHK-GP71.07412.B0U
L17
H18
U38A
CAD0/D3
CAD1/D4
CAD2/D11
CAD3/D5
CAD4/D12
CAD5/D6
CAD6/D13
CAD7/D7
CAD8/D15
CAD9/A10
CAD14/A9
CAD18/A7
CAD20/A6
CAD21/A5
CAD22/A4
CAD23/A3
CAD24/A2
CAD25/A1
CAD26/A0
CAD27/D0
CAD28/D8
CAD29/D1
CAD30/D9
B
P19
N18
N17
M15
N19
M18
M17
L19
L18
L15
K18
K17
K15
J18
J15
J17
H19
F15
E17
D19
A16
E14
B15
B14
A14
C13
B13
C11
E11
F11
A10
C10
H14
3D3V_S0
4
1
2 3
C
Q48
Q48
CHT2222APT-GP
CHT2222APT-GP
E
CBB_A8 27
CBB_A12 27
SD_CD# 26
RN101
RN101
SRN10KJ-5-GP
SRN10KJ-5-GP
CardR
CardR
CardR
CardR
CBB_CE1# 27
CBB_REG# 27
MC_PWR_CTRL 26
CBB_D[0..15] 25,27
CBB_A[0..25] 25,27
CBB_D3 27
CBB_D4 27
CBB_D11 27
CBB_D5 27
CBB_D12 27
CBB_D6 27
CBB_D13 27
CBB_D7 27
CBB_D15 27
CBB_A10 27
CBB_CE2# 27
CBB_OE# 27
CBB_A11 27
CBB_IORD# 27
CBB_A9 27
CBB_IOWR# 27
CBB_A17 27
CBB_A24 27
CBB_A7 27
CBB_A25 27
CBB_A6 27
CBB_A5 27
CBB_A4 27
CBB_A3 27
CBB_A2 27
CBB_A1 27
CBB_A0 27
CBB_D0 27
CBB_D8 27
CBB_D1 27
CBB_D9 27
CBB_D10 27
CBB_A13 27
F12
F14
J14
VCC
VCCJ6VCC
CC/BE3#/REG#
CC/BE2#/A12
E13
E18
D
* All 1394 signals must be routed on top side only
* Differential pairs of each ports should have equal trace length
* Stubs must be keep as short as possible
E
Bypass/Decupoling Capacitors
Should be places as close to
PCI7412 as possible
3D3V_S0
1 2
C768
C768
1 2
C764
C764
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
1 2
C765
C765
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
C762
C762
SC1KP16V2KX-GP
SC1KP16V2KX-GP
1 2
C778
C778
SC1KP16V2KX-GP
SC1KP16V2KX-GP
3D3V_PLL_S0 3D3V_S0
1 2
C767
C767
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
1 2
C769
C769
3D3V_S0
SC1KP16V2KX-GP
SC1KP16V2KX-GP
1 2
C770
C770
SC1KP16V2KX-GP
SC1KP16V2KX-GP
1 2
0R0603-PAD
0R0603-PAD
<Variant Name>
<Variant Name>
<Variant Name>
R648
R648
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet of
A
B
C
D
Date: Sheet of
TI PCI7412 (1 of 2)
TI PCI7412 (1 of 2)
TI PCI7412 (1 of 2)
AG1 SB
AG1 SB
AG1 SB
E
24 53 Tuesday, January 10, 2006
24 53 Tuesday, January 10, 2006
24 53 Tuesday, January 10, 2006
of
Page 25
A
4 4
MS_D[1..3] 26
G89
G89
1 2
GAP-CLOSE
GAP-CLOSE
1394_AGND
2 OF 2
2 OF 2
B
TP81
TP81
TPAD28
TPAD28
1
E5
NC#E5
TP48
TP48
TPAD28
TPAD28
C
TP49
TP49
TPAD28
TPAD28
1
1
W12
V12
PC2
PC1
1
U12
PC0
TP79
TP79
TPAD28
TPAD28
U38B
U38B
PCI7412ZHK-GP
PCI7412ZHK-GP
D
E
7412_IDSEL
1394_R0
W5
TRDY#
V6
STOP#
W6
SERR#
L3
REQ#
R7
PERR#
V5
IRDY#
N5
IDSEL
L2
GNT#
R6
FRAME#
U6
DEVSEL#
B6
MS_DATA3/SD_DAT3/SM_D3
A6
MS_DATA2/SD_DAT2/SM_D2
C7
MS_DATA1/SD_DAT1/SM_D1
B7
MS_SDIO/DATA0/SD_DAT0/SM_D0
A7
MS_CLK/SD_CLK/SM_EL_WP#
A8
MS_CD#
E8
MS_BS/SD_CMD/SM_WE#
W17
TPBIAS1
R13
TPBIAS0
V15
TPB1P
W15
TPB1N
V13
TPB0P
W13
TPB0N
V16
TPA1P
W16
TPA1N
V14
TPA0P
W14
TPA0N
T19
R1
T18
R0
R12
CPS
R18
XO
R19
XI
CBB_D2 27
R344
R344
1 2
43KR2J-GP
43KR2J-GP
CBB_A18 27
CBB_D14 27
CB_LATCH 27
CB_CLOCK 27
CB_DATA 27
CBB_BVD2# 27
CBB_A21 27
CBB_A23 27
CBB_WE# 27
RSVD#B10/D2
RSVD#C4/VD0/VCCD1#C4RSVD#D1D1RSVD#E1E1RSVD#E2E2RSVD#E3E3RSVD#F2F2RSVD#F3F3RSVD#F5F5RSVD#G6G6RSVD#H17/A18
B10
TI PCI7412
IDSEL:AD22
INTA-->:INT_PIRQG#
INTB-->:INT_PIRQB#
INTC-->:INT_PIRQF#
INTD-->:INT_PIRQG#
GNT:PCI_GNT#0
REQ:PCI_REQ#0
LATCH/VD3/VPPD0C9CLOCK/VD1/VCCD0#A9DATA/VD2/VPPD1
H17
RSVD#M19/D14
M19
CAUDIO/BVD2/SPKR#
CDEVSEL#/A21
CFRAME#/A23
CGNT#/WE#
CINT#/READY/IREQ#
CIRDY#/A15
B9
F19
F17
B12
E19
E12
G17
G19
R337
R337
F18
CCLK/A16
SM_CLE
SM_CD#
SPKROUT
SDA
SCL
MFUNC6
MFUNC5
MFUNC4
MFUNC3
MFUNC2
MFUNC1
MFUNC0
CLK_48
TEST0
RSVD#G5
A11
C15
A3
B4
B8
J5
H3
G3
G2
L5
P17
J3
J2
J1
H1
H2
H5
G1
F1
E10
H15
P12
G5
CCLKRUN#/WP/IOIS16#
CRST#/RESET
XD_CD#/SM_PHYS_WP#
SUSPEND#
RI_OUT#/PME#
PHY_TEST_MA
A_USB_EN#
CBLOCK#/A19
GRST#K5PCLKL1PRST#
CCD1#/CD1#
CPERR#/A14
CREQ#/INPACK#
CSERR#/WAIT#
CSTOP#/A20
CSTSCHG/BVD1/STSCHG#/RI#
CTRDY#/A22
A12
C14
C12
G18
G15
CCD2#/CD2#
CVS1/VS1#
CVS2/VS2#
K3
B11
A13
B16
N15
1 2
1 2
R653 4K7R2J-2-GP R653 4K7R2J-2-GP
1 2
INTD#
INTC#
INTB#
INTA#
PCIRST1# 16,22,27,30
PCLK_PCM 3
CBB_CD2# 27
CBB_CD1# 27
CBB_VS2# 27
CBB_VS1# 27
CBB_A22 27
CBB_BVD1# 27
CBB_A20 27
CBB_WAIT# 27
CBB_INPACK# 27
CBB_A14 27
CBB_A15 27
CBB_RDY 27
33R2J-2-GP
33R2J-2-GP
CBB_WP 27
CBB_RESET 27
XD_CD# 26
SM_CLE 26
SM_CD# 26
R6 55
R655
10KR2J-3-GP
10KR2J-3-GP
RN68
RN68
4
SRN4K7J-8-GP
SRN4K7J-8-GP
R343
R343
1 2
47KR2J-2-GP
47KR2J-2-GP
2 3
1
CBB_A16 27
3D3V_S0
CLK48_CARDBUS 3
CBB_A19 27
TP80 TPAD30 TP80 TPAD30
PCI_SPKR 28
3D3V_PLL_S0
PM_CLKRUN# 16,22,30,31,32
3D3V_S0
INT_SERIRQ 16,30,31,32
INT_PIRQF# 16
INT_PIRQB# 16
INT_PIRQG# 16
<Variant Name>
<Variant Name>
<Variant Name>
INTA# CARBUS 1 (INT_PIRQG#)
INTB# 1394 (INT_PIRQB#)
INTC# Flash Media (INT_PIRQF#)
INTD# SD Host (INT_PIRQG#) share
MFUNC4: use bit 19-16 Register define.
PCI_TRDY# 16,22,30
PCI_STOP# 16,22,30
PCI_SERR# 16,22,30
PCI_REQ#0 16
PCI_PERR# 16,22,30
PCI_IRDY# 16,22,30
PCI_AD22 16,22,24,30
3 3
2 2
1 1
PCI_FRAME# 16,22,30
PCI_DEVSEL# 16,22,30
1394_TPBIAS0 26
1394_AGND
SC12P50V2JN-3GP
SC12P50V2JN-3GP
SC12P50V2JN-3GP
SC12P50V2JN-3GP
PCI_GNT#0 16
MS_D3 26
MS_D2 26
MS_D1 26
MSCSDIO 26
MS_CLK 26
MS_CD# 26
MSCBS 26
1 2
C763 SCD1U16V2ZY-2GP
C763 SCD1U16V2ZY-2GP
1394_TPB0P 26
1394_TPB0N 26
1394_TPA0P 26
1394_TPA0N 26
1394_R1
C441
C441
1394
1394
C422
C422
1394
1394
1 2
1394_TPBIAS1
1394
1394
1 2
6K34R2F-GP
6K34R2F-GP
1 2
1394
1394
3D3V_S0
R654
R654
100R2F-L1-GP-U
100R2F-L1-GP-U
R322
R322
1394
1394
1394_XO
1394_XI MC_PWR_CTRL-1
X5
X5
X-24D576MHZ-46GP
X-24D576MHZ-46GP
82.30023.351
82.30023.351
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
TI PCI7412 (2 of 2)
TI PCI7412 (2 of 2)
TI PCI7412 (2 of 2)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet of
Date: Sheet of
A
B
C
D
Date: Sheet of
AG1 SA
AG1 SA
AG1 SA
25 53 Tuesday, January 10, 2006
25 53 Tuesday, January 10, 2006
25 53 Tuesday, January 10, 2006
E
Page 26
A
B
C
D
E
3D3V_S5
3D3V_S0
4 4
UIM
RF_ON/OFF# 30,31
R476
R476
10KR2J-3-GP
10KR2J-3-GP
3 3
2 2
1 1
TP60 TPAD28 TP60 TPAD28
TP61 TPAD28 TP61 TPAD28
WLAN_LED# 13
1
1
Mini Card Connector
1D5V_S0
1 2
DY
DY
LED_WPAN#
WLAN_LED#
LED_WWAN#
1 2
C58
C58
80211_ACTIVE 30
A
MINIC2
MINIC2
6
2
28
48
52
24
3
5
8
10
12
14
16
17
19
20
37
39
41
43
45
47
49
51
42
44
46
SKT-MINI52P-3-GP 62.10043.231
SKT-MINI52P-3-GP 62.10043.231
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
MINIC
MINIC
1.5V
3.3V
+1.5V
+1.5V
+3.3V
+3.3VAUX
RESERVED#3
RESERVED#5
RESERVED#8
RESERVED#10
RESERVED#12
RESERVED#14
RESERVED#16
RESERVED#17
RESERVED#19
RESERVED#20
RESERVED#37
RESERVED#39
RESERVED#41
RESERVED#43
RESERVED#45
RESERVED#47
RESERVED#49
RESERVED#51
LED_WWAN#
LED_WLAN#
LED_WPAN#
NP1
NP2
NP1
NP2
C573
C573
1 2
1 2
C59
C59
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
Place near MINIC2
3D3V_S0
1 2
R401
R401
100KR2J-1-GP
100KR2J-1-GP
RF_ON/OFF#
WLAN_TEST_LED 31
REFCLK+
REFCLK-
PERN0
PERP0
PETN0
PETP0
USB_D-
USB_D+
SMB_CLK
SMB_DATA
WAKE#
CLKREQ#
PERST#
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
DY
DY
13
11
23
25
31
33
36
38
30
32
1
7
22
4
9
15
18
21
26
27
29
34
35
40
50
53
54
1 2
C572
C572
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
Q29
Q29
1
G
G
DY
DY
Q30
Q30
1
G
G
DY
DY
DY
DY
R800 0R2J-2-G P
R800 0R2J-2-G P
1 2
R801 0R2J-2-G P
R801 0R2J-2-GP
1 2
DY
DY
3D3V_S5 3D3V_S0 1D5V_S0
1 2
C56
C56
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
D
D
2N7002-8-GP
2N7002-8-GP
84.27002.L04
84.27002.L04
S
S
2 3
D
D
2N7002-8-GP
2N7002-8-GP
84.27002.L04
84.27002.L04
S
S
2 3
G
S D
CLK_PCIE_MINI1 3
CLK_PCIE_MINI1# 3
PCIE_RXN2 16
PCIE_RXP2 16
PCIE_TXN2 16
PCIE_TXP2 16
USB_PN6 16
USB_PP6 16
SMB_CLK 16,18,30,35
SMB_DATA 16,18,30,35
TP62 TPAD30 TP62 TPAD30
PLT_RST1# 7,16,20,30,31,32,34,35,45
Q28
Q28
2N7002EPT-GP
2N7002EPT-GP
-1M Modify
B
NP1
NP2
3D3V_CR_S0
C787
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
C787
DY
DY
C
1394_TPA0P 25
1394_TPA0N 25
1394_TPB0P 25
1394_TPB0N 25
1394_TPBIAS0 25
Close to TI7412(Device)
3D3V_CR_S0
CARD1
CARD1
37
38
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
TTN-CON36-GP-U
TTN-CON36-GP-U
62.10024.661
62.10024.661
CardR
CardR
1 2
POWER SWITCH
1394
1394
SC1U10V3ZY-6GP
SC1U10V3ZY-6GP
CardR
CardR
MS_CLK-R
MS_D3
MS_D2
MSCSDIO
MS_D1
U75
U75
1
OUT
2
GND
NC#33ON/OFF#
CardR
CardR
74.04250.A3F
74.04250.A3F
1 2
R302
R302
56R2J-4-GP
56R2J-4-GP
1394
1394
C402
C402
1 2
1 2
C788
C788
C790
C790
SC1U10V3ZY-6GP
SC1U10V3ZY-6GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
CardR
CardR
R680
R680
1 2
0R0402-PAD
0R0402-PAD
MS_D2
MS_D3
MSCBS
MS_CLK
MSCSDIO
MS_D1
SM_CD# SM_CD# SM_CD# SM_CD# SM_CD#
MSCBS WLAN_LED#
MSCSDIO
MS_D1
MS_D2
MS_D3
SD_D0
SD_D1
SD_D2
SD_D3
SD_WP
IN
AAT4250IGV-T1-GP
AAT4250IGV-T1-GP
1 2
R303
R303
56R2J-4-GP
56R2J-4-GP
1 2
1394
1394
1 2
C791
C791
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
CardR
CardR
R677
R677
1 2
DY
DY
R678
R678
1 2
CardR
CardR
3D3V_S0
5
4
1 2
R304
R304
56R2J-4-GP
56R2J-4-GP
1394
1394
C403
C403
1394
1394
SC220P50V3JN-GP
SC220P50V3JN-GP
SD_CD# 24
MS_CLK 25
MS_CD# 25
MSCSDIO 25
MSCBS 25
SM_CD# 25
SM_CLE 25
SD_CMD 24
MS_CLK-R
0R2J-2-GP
0R2J-2-GP
0R2J-2-GP
0R2J-2-GP
1 2
C789
C789
SC1U10V3ZY-6GP
SC1U10V3ZY-6GP
CardR
CardR
D
FILTER-79-GP
FILTER-79-GP
69.10084.071
69.10084.071
FILTER-79-GP
FILTER-79-GP
69.10084.071
69.10084.071
1 2
R306
R306
56R2J-4-GP
56R2J-4-GP
1394
1394
1 2
R305
R305
5K1R2-GP
5K1R2-GP
1394
1394
R741
R741
R146
R146
R145
R145
1 2
1 2
100KR2J-1-GP
100KR2J-1-GP
1 2
100KR2J-1-GP
100KR2J-1-GP
CardR
CardR
100KR2J-1-GP
100KR2J-1-GP
CardR
CardR
CardR
CardR
CardR
CardR
XD_CD# 25
MC_PWR_CTRL 24
1394 Connector
L12
L12
1394
1394
1
L13
L13
1
1 2
R88
R88
1394
1394
2
TPA0+
TPA0-
3 4
TPB0+
2
TPB0-
3 4
MS/MS PRO
22KR2J-GP
22KR2J-GP
SD/SD IO/MMC
SM_R# 24
SD_CLK 24
SD_WP 24
xD
Bottom VIEW
<Variant Name>
<Variant Name>
<Variant Name>
Title
Title
Title
MINI CARD / 1394
MINI CARD / 1394
MINI CARD / 1394
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet of
Date: Sheet of
AG1 -1M
AG1 -1M
AG1 -1M
CN1
CN1
6
4
3
2
1
5
SKT-1394-4P-12GP
SKT-1394-4P-12GP
1394
1394
62.10027.451
62.10027.451
SD_D[0..3] 24
MS_D[1..3] 25
1
Reader
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
26 53 Tuesday, January 10, 2006
26 53 Tuesday, January 10, 2006
26 53 Tuesday, January 10, 2006
E
of
36
Page 27
5
4
3
2
1
PCMCIA Socket
D D
CBB_D3
CBB_D4
CBB_D11
CBB_D5
CBB_D12
CBB_D6
CBB_D13
CBB_D7
CBB_D14
CBB_D15
VCC_ASKT_S0
C C
SC4D7U10V5ZY-3GP
SC4D7U10V5ZY-3GP
PCMCIA
PCMCIA
B B
1 2
C464
C464
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
PCMCIA
PCMCIA
CBB_A16
PCMCIA
PCMCIA
C467
C467
1 2
C468
C468
SC1KP16V2KX-GP
SC1KP16V2KX-GP
VPP_ASKT_S0
1 2
SC4D7U10V5ZY-3GP
SC4D7U10V5ZY-3GP
Place close to pin 19.
1 2
C469
C469
DUMMY-C2
DUMMY-C2
PCMCIA
PCMCIA
C465
C465
1 2
C466
C466
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
PCMCIA
PCMCIA
1 2
CBB_D0
CBB_D8
CBB_D1
CBB_D9
CBB_D2
CBB_D10
CBB_A10
CBB_A11
CBB_A9
CBB_A8
CBB_A17
CBB_A13
CBB_A18
CBB_A14
CBB_A19
CBB_A20
CBB_A21
CBB_A16
CBB_A22
CBB_A15
CBB_A23
CBB_A12
CBB_A24
CBB_A7
CBB_A25
CBB_A6
CBB_A5
CBB_A4
CBB_A3
CBB_A2
CBB_A1
CBB_A0
Clock AC termination
CBB_CD1#
CBB_CE1#
CBB_CE2#
CBB_OE#
CBB_VS1#
CBB_IORD#
CBB_IOWR#
CBB_WE#
CBB_RDY
CBB_VS2#
CBB_RESET
CBB_WAIT#
CBB_INPACK#
CBB_REG#
CBB_BVD2#
CBB_BVD1#
CBB_WP
CBB_CD2#
33MHz clock for 32-bit
Cardbus card I/F
NP1 NP2
PCMCIA1
PCMCIA1
69
1
35
2
36
3
37
4
38
5
39
6
40
7
41
8
42
9
43
10
44
11
45
12
46
13
47
14
48
15
49
16
50
17
51
18
52
19
53
20
54
21
55
22
56
23
57
24
58
25
59
26
60
27
61
28
62
29
63
30
64
31
65
32
66
33
67
34
68
70
Cardbus I/F
CBB_D[0..15] 24,25
CBB_A[0..25] 24,25
CBB_IORD# 24
CBB_IOWR# 24
CBB_OE# 24
CBB_WE# 25
CBB_REG# 24
CBB_RESET 25
CBB_WAIT# 25
CBB_INPACK# 25
CBB_CE1# 24
CBB_CE2# 24
CBB_BVD1# 25
CBB_BVD2# 25
CBB_CD1# 25
CBB_CD2# 25
CBB_VS1# 25
CBB_VS2# 25
PC1
PC1
1
CARDBUS-SKT43-GP
CARDBUS-SKT43-GP
21.H0057.011
21.H0057.011
CBB_RDY 25
CBB_WP 25
4
3 2
SC4D7U10V5ZY-3GP
SC4D7U10V5ZY-3GP
PCMCIA
PCMCIA
Power switch
U55
U55
CB_DATA 25
CB_CLOCK 25
CB_LATCH 25
PCIRST1# 16,22,25,30
5V_S0 VPP_ASKT_S0
3D3V_S0
5V_S0
1 2
C512
C512
C494
C494
DY
DY
1 2
PCMCIA
PCMCIA
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
C493
C493
SC1U10V3ZY-6GP
SC1U10V3ZY-6GP
10KR2J-3-GP
10KR2J-3-GP
R384
R384
PCMCIA
PCMCIA
TPAD28
TPAD28
1 2
TP56
TP56
TP57
TP57
TPAD28
TPAD28
3
DATA
4
CLOCK
5
LATCH
12
RESET#
21
SHDN#
13
3.3V
1
5V
2
5V
7
12V
20
12V
11
GND
25
GND
TPS2220APWPRG-GP
TPS2220APWPRG-GP
74.02220.A7G
74.02220.A7G
AVCC
AVCC
AVPP
OC#
NC#24
NC#23
NC#22
NC#19
NC#18
NC#17
NC#16
NC#14
NC#6
VCC_ASKT_S0
9
10
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
8
1 2
15
24
23
22
19
18
17
16
14
6
C510
C510
1 2
PCMCIA
PCMCIA
PCMCIA
PCMCIA
C511
C511
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
R404
R404
100KR2J-1-GP
100KR2J-1-GP
PCMCIA
PCMCIA
CARDBUS68P-15-GP
CARDBUS68P-15-GP
62.10024.671
62.10024.671
A A
5
DY
DY
1 2
C492
C492
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
4
3
2
<Variant Name>
<Variant Name>
<Variant Name>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet of
Date: Sheet of
PCMCIA
PCMCIA
PCMCIA
AG1 SC
AG1 SC
AG1 SC
27 53 Tuesday, January 10, 2006
27 53 Tuesday, January 10, 2006
27 53 Tuesday, January 10, 2006
1
of
Page 28
A
B
C
D
E
4 4
PCI_SPKR 25
ACZ_SPKR 16
KBC_BEEP 31
3 3
2 2
C477
C477
C478
C478
C476
C476
1 2
1 2
1 2
PCI_SPKR1
SCD47U10V3ZY-GP
SCD47U10V3ZY-GP
ACZ_SPKR1
SCD47U10V3ZY-GP
SCD47U10V3ZY-GP
KBC_BEEP1
SCD47U10V3ZY-GP
SCD47U10V3ZY-GP
LINEIN_L 29
LINEIN_R 29
MIC_IN 29
R371
R371
1 2
47KR2J-2-GP
47KR2J-2-GP
R370
R370
1 2
47KR2J-2-GP
47KR2J-2-GP
R369
R369
1 2
47KR2J-2-GP
47KR2J-2-GP
-1 Modify
AUD_AGND
R696
R696
1 2
2K2R2J-2-GP
2K2R2J-2-GP
1 2
1 2
1 2
R686
R686
1KR2J-1-GP
1KR2J-1-GP
C819 SC1U10V3ZY-6GP C819 SC1U10V3ZY-6GP
1 2
C818 SC1U10V3ZY-6GP C818 SC1U10V3ZY-6GP
1 2
C806 SC1U10V3ZY-6GP C806 SC1U10V3ZY-6GP
C831 SC1U10V3ZY-6GP C831 SC1U10V3ZY-6GP
C814
C814
1 2
C499
C499
AUDIP_PC_BEEP AUDIO_BEEP
1 2
SC1U10V3KX-3GP
SC1U10V3KX-3GP
1 2
C805
C805
SC100P50V3JN-2GP
SC100P50V3JN-2GP
25
38
1
U77
U77
LINE1_L
23
LINE1_R
MIC1_L
MIC1V_L MIC1V_L
LINE1-L
24
LINE1-R
14
LINE2-L
15
LINE2-R
29
LINE1-VREFO
31
LINE2-VREFO
21
MIC1-L
22
MIC1-R
16
MIC2-L
17
MIC2-R
32
MIC1-VREFO-R
28
MIC1-VREFO-L
30
MIC2-VREFO
ALC883-1-GP 71.00883.A0G
ALC883-1-GP 71.00883.A0G
SC4D7U10V5ZY-3GP
SC4D7U10V5ZY-3GP
AUD_AGND
9
AVDD1
DVDD1
DVDD2
ALC 883
DVSS1
AVSS126VREF
AVSS2
4
7
42
C816
C816
AVDD2
DVSS2
12
27
1 2
SCD47U50V5ZY
SCD47U50V5ZY
3D3V_S0
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
11
10
6
SYNC
RESET#
PCBEEP
JDREF
37
40
1 2
C821
C821
DY
DY
AUD_AGND
1 2
33
VAUX
BIT-CLK
PIN37_VREFO
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
C803
C803
44
LFE-OUT
GPIO02GPIO1
3
-1M Modify
43
1 2
C804
C804
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
AC97_BTCLK
34
CEN-OUT
SENSE_B
SIDESURR-OUT-L
SIDESURR-OUT-R
CD-L18CD-GND
CD-R
20
13
SENSE_A
FRONT-OUT-R
19
HP_JKIN 29
5VA_S0
AUD_AGND AUD_AGND
SDATA-OUT
SPDIFI/EAPD
SURR-OUT-L
SURR-OUT-R
FRONT-OUT-L
"VAUX" Pull high to enable standby mode
1 2
C497
C497
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
5
AC97_DATIN
8
SDATA-IN
48
SPDIFO
47
45
46
39
41
35
36
1 2
C817
C817
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
ACZ_RST# 15,21
ACZ_SYNC 15,21
AC97_BTCLK 15
R695
R695
1 2
10KR2J-3-GP
10KR2J-3-GP
R391
R391
1 2
39R2J-L-GP
39R2J-L-GP
1 2
4K7R2J-2-GP
4K7R2J-2-GP
R390
R390
OUT_L 29
OUT_R 29
ACZ_SDATAOUT 15,21
ACZ_SDATAIN0 15
SPDIFO 29
MUTEIN 29
1) When GPIO0 is assered, AMP should be muted.
2) SPDIFO should be turned off when not used.
Configuation:
(3 External Jacks, 1 internal Mic, 1 stereo output Speaker Amp.
Pin
35/36
39/41
1 1
43/44
45/46
23/24
21/22
14/15
16/17
Symbol
FRONT
SURR
CEN/LEFT
SIDESURR
LINE1
MIC1
LINE2
MIC2
Location
AMP,Jack1
X
X
X
Jack 2
Jack 3
X
Int. Mic
A
Re-tasking
AMP output, line input
X
SURR-VREFO-L/R
SIDESURR-L is MIC2-VREFO-R, SIDESURR-R is LINE2-VREFO-R
Line input, line output
Mic input, line output
X
Mic input
B
POWER GENERATE
C475
C475
SC1U10V3KX-3GP
SC1U10V3KX-3GP
5V_S0
1 2
U53
U53
1
SHDN#
SET
2
GND
IN3OUT
G923-330T1UF-GP
G923-330T1UF-GP
74.00923.A3F
74.00923.A3F
SC1U10V3KX-3GP
SC1U10V3KX-3GP
C
5
4
C796
C796
AUD_AGND AUD_AGND
1 2
1 2
C473
C473
SC22P50V2JN-4GP
SC22P50V2JN-4GP
5VA_SETPIN
1 2
*Layout*
5VA_S0
20 mil
1 2
R368
R368
28K7R3F-GP
28K7R3F-GP
R389
R389
1 2
10KR2F-2-GP
10KR2F-2-GP
C474
C474
SC2D2U6D3V3MX-1-GP
SC2D2U6D3V3MX-1-GP
G54
G54
1 2
GAP-CLOSE
AUD_AGND
<Variant Name>
<Variant Name>
<Variant Name>
Title
Title
Title
Azalia codec ALC883
Azalia codec ALC883
Azalia codec ALC883
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet of
Date: Sheet of
D
Date: Sheet
GAP-CLOSE
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
AG1 -1M
AG1 -1M
AG1 -1M
28 53 Tuesday, January 10, 2006
28 53 Tuesday, January 10, 2006
28 53 Tuesday, January 10, 2006
E
of
Page 29
A
B
C
D
E
AUDIO OP AMPLIFIER
-1 Modify
4 4
OUT_L 28
5V_S0
1 2
R424
R424
10KR2J-3-GP
10KR2J-3-GP
AMP_SHUTDOWN 31
3 3
I/P signal level
need +5V level
R425
R425
1 2
0R0603-PAD
0R0603-PAD
C503
C503
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
5V_OP_S0 5V_S0
1 2
1 2
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
OUT_R 28
-1M Modify
C528
C528
1 2
C527
C527
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
C526
C526
SOUND_L2 SOUND_L_OP1
1 2
SC2D2U6D3V3MX-1-GP
SC2D2U6D3V3MX-1-GP
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
1 2
C530
C530
AUD_AGND
C501
C501
1 2
SC2D2U6D3V3MX-1-GP
SC2D2U6D3V3MX-1-GP
L_BYPASS
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
1 2
C504
C504
AUD_AGND
SOUND_R2
R426
R426
1 2
10KR2J-3-GP
10KR2J-3-GP
R_BYPASS
R691
R691
1 2
10KR2J-3-GP
10KR2J-3-GP
Gain(HP) = -(RF/RI) RF RI
4
5
6
7
8
2
17
23
18
19
20
21
1 2
R693
R693
0R2J-2-GP
0R2J-2-GP
AUD_AGND
SOUND_R_OP1
U79
U79
LLINEIN
LHPIN
LBYPASS
LVDD
SHUTDOWN
TJ
HP-IN
VOL
RVDD
RBYPASS
RHPIN
RLINEIN
G1421BF3UF-GP
G1421BF3UF-GP
DY
DY
74.01421.B1G
74.01421.B1G
C529
C529
1 2
SC220P50V2JN-3GP
SC220P50V2JN-3GP
R427
R427
1 2
10KR2J-3-GP
10KR2J-3-GP
LOUT+
LOUT-
SE/BTL#
HP/LINE#
MUTEIN
MUTEOUT
GND/HS
GND/HS
GND/HS
GND/HS
ROUT-
ROUT+
GND
25
AUD_AGND
R692
R692
1 2
10KR2J-3-GP
10KR2J-3-GP
C807
C807
SC220P50V2JN-3GP
SC220P50V2JN-3GP
5V_S0
1 2
R432
R432
10KR2J-3-GP
10KR2J-3-GP
DY
SPKR_L+
3
SPKR_L-
10
14
16
11
9
1
12
13
24
SPKR_R-
15
SPKR_R+
22
DY
MUTEIN 28
100KR2J-1-GP
100KR2J-1-GP
AUD_AGND
R689
R689
-1 Modify
HP_JKIN HP_JKIN
1 2
CHT2222APT-GP
CHT2222APT-GP
HP_JKIN 28
R701
R701
1KR2J-1-GP
1KR2J-1-GP
5VA_S0
4
1
2 3
C
Q49
Q49
E
1 2
AUD_AGND
RN102
RN102
SRN10KJ-5-GP
SRN10KJ-5-GP
HP_JKIN#
B
LINEIN_L 28
LINEIN_R 28
SRC100P50V-2-GP
SRC100P50V-2-GP
R419 1KR2J-1-GP R419 1KR2J-1-GP
1 2
R421
R421
4K7R2J-2-GP
4K7R2J-2-GP
ERC4
ERC4
1
8
2
7
3
6
4 5
1 2
1 2
R420 1KR2J-1-GP R420 1KR2J-1-GP
1 2
R418
R418
4K7R2J-2-GP
4K7R2J-2-GP
AUD_AGND AUD_AGND
1 2
C815
C815
SC100P50V3JN-2GP
SC100P50V3JN-2GP
Internal SPKR
SPKR_R+
SPKR_RÂSPKR_L+
SPKR_L-
ACES-CON4-1-GP
ACES-CON4-1-GP
20.D0197.104
20.D0197.104
Lin-In
AUD_AGND
SC100P50V3JN-2GP
SC100P50V3JN-2GP
NP1
NP2
1
2
6
3
4
5
LINEIN_L_1
LINEIN_R_1
1 2
C813
C813
SPKR1
SPKR1
5 6
1
2
3
4
2nd source: 20.F0760.004
LIN1
LIN1
PHONE-JK234-GP
PHONE-JK234-GP
22.10133.B11
22.10133.B11
-1 Modify
R710
R710
1 2
0R0402-PAD
0R0402-PAD
5
IN
4
ON/OFF#
1 2
C824
C824
DY
DY
SC680P50V2KX-2GP
SC680P50V2KX-2GP
HP_OUT_L
ST100U6D3VDM-5
ST100U6D3VDM-5
HP_OUT_R
ST100U6D3VDM-5
ST100U6D3VDM-5
1 2
R706
R706
AUD_AGND
U82
U82
OUT
GND
NC#3
AAT4250IGV-T1-GP
AAT4250IGV-T1-GP
74.04250.A3F
74.04250.A3F
C825
C825
1 2
R707
R707
1 2
R703
R703
1 2
1 2
R702
R702
1KR2J-1-GP
1KR2J-1-GP
AUD_AGND
1
2
3
AUD_AGND
22R2J-2-GP
22R2J-2-GP
22R2J-2-GP
22R2J-2-GP
1 2
C826
C826
AUD_AGND
SC680P50V2KX-2GP
SC680P50V2KX-2GP
SPDIF_PWR
HP_OUT_L_1
HP_OUT_R_1
AUD_AGND
D
1 2
C823
C823
SC680P50V2KX-2GP
SC680P50V2KX-2GP
Line-Out
LOUT1
LOUT1
9
GND
GND
8
VCC
VCC
7
VIN
VIN
16
HP_JKIN#
1 2
EC71
EC71
AUD_AGND
<Variant Name>
<Variant Name>
<Variant Name>
SC1KP16V2KX-GP
SC1KP16V2KX-GP
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet of
Date: Sheet of
6
5
4
2
3
1
PHONE-JK236-GP
PHONE-JK236-GP
22.10271.061
22.10271.061
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Audio AMP G1421B / Jack
Audio AMP G1421B / Jack
Audio AMP G1421B / Jack
AG1 -1
AG1 -1
AG1 -1
E
29 53 Tuesday, January 10, 2006
29 53 Tuesday, January 10, 2006
29 53 Tuesday, January 10, 2006
of
AVX
SPDIFO 28
5VA_S0
HP_JKIN
TC15
TC15
1 2
TC14
TC14
1 2
1KR2J-1-GP
1KR2J-1-GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
2 2
MIC-In
5VA_S0
1 2
R394
R394
DY
DY
1KR2J-1-GP
1KR2J-1-GP
MIC1
MIC1
C498
C498
DY
DY
1 2
R395
R395
SC4D7U10V5ZY-3GP
2K2R2J-2-GP
2K2R2J-2-GP
A
SC4D7U10V5ZY-3GP
1 2
R697
R697
1 2
10R3J-3-GP
10R3J-3-GP
INT_MICP 13
MIC_L
B
1 2
1 2
EC69
EC69
C820
C820
SC1KP16V2KX-GP
SC1KP16V2KX-GP
SC100P50V3JN-2GP
SC100P50V3JN-2GP
DY
DY
MIC_IN 28
1 1
NP2
NP1
5
4
3
6
2
1
PHONE-JK233-GP
PHONE-JK233-GP
22.10133.B01
22.10133.B01
AUD_AGND AUD_AGND
OUT_L
OUT_R
-1 Modify
C
Page 30
A
PCI_AD[0..31] 16,22,24,25
5V_S0
1 2
IDSEL:AD21
INTA-->:INT_PIRQE#
4 4
RF_ON/OFF# 26,31
3 3
2 2
GNT:PCI_GNT1#
REQ:PCI_REQ1#
DY
DY
SB Modify
PM_CLKRUN# 16,22,25,31,32
1 2
R638
R638
10KR2J-3-GP
10KR2J-3-GP
1 2
0R0402-PAD
0R0402-PAD
PCLK_MINI 3
1 2
R122
R122
PCI_C/BE#3 16,22,24
PCI_C/BE#2 16,22,24
PCI_IRDY# 16,22,25
PCI_SERR# 16,22,25
PCI_C/BE#1 16,22,24
R121
R121
DY
DY
80211_ACTIVE 26
PCI_REQ#1 16
10KR2J-3-GP
10KR2J-3-GP
PCI_PERR# 16,22,25
3D3V_S0
5V_S0
80211_ACTIVE
INT_PIRQE#
PCI_AD31
PCI_AD29
PCI_AD27
PCI_AD25 PCI_AD28
PCI_C/BE#3
PCI_AD23
PCI_AD21
PCI_AD19 PCI_AD20
PCI_AD17 PCI_AD18
PCI_C/BE#2
MINI_CLKRUN#
PCI_AD14 PCI_AD15
PCI_AD12 PCI_AD11
PCI_AD10
PCI_AD8 PCI_C/BE#0
PCI_AD7
PCI_AD5 PCI_AD4
PCI_AD1
B
C79
C79
SC4D7U10V5ZY-3GP
SC4D7U10V5ZY-3GP
MINI
MINI
PCI_C/BE#1
PCISLT124-2-GP
PCISLT124-2-GP
2nd source: 62.10043.151
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
MINI1
MINI1
62.10034.151
62.10034.151
125
MH1
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
MH2
126
3D3V_S0
1 2
C585
C585
DY
DY
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
PIN 3-16 : LAN RESERVE
PCI_AD30
PCI_AD26
PCI_AD24
MOD_IDSEL
PCI_AD22
PCI_AD16
PCI_AD13
PCI_AD9
PCI_AD6
PCI_AD2
PCI_AD0 PCI_AD3
1 2
C583
C583
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
R142
R142
1 2
100R2J-2-GP
100R2J-2-GP
C
1 2
C586
C586
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
5V_S0
INT_PIRQE# 16
3D3V_S0
PCIRST1# 16,22,25,27
PCI_GNT#1 16
PCI_AD21
PCI_PAR 16,22,24
PCI_FRAME# 16,22,25
PCI_TRDY# 16,22,25
PCI_STOP# 16,22,25
PCI_DEVSEL# 16,22,25
PCI_C/BE#0 16,22,24
INT_SERIRQ 16,25,31,32
PM_SLP_S3# 16,18,31,36,41,43,52
D
1 2
C235
C235
1 2
DY
DY
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
C177
C177
1 2
C80
C80
PCIE_TXP3N 16
PCIE_TXN3N 16
SC4D7U10V5ZY-3GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SC4D7U10V5ZY-3GP
-1 Modify
PCIE_WAKE# 16,31,35
SMB_DATA 16,18,26,35
SMB_CLK 16,18,26,35
CARDBUS-SKT73-GPU
CARDBUS-SKT73-GPU
PCIE_RXP3N 16
PCIE_RXN3N 16
CLK_PCIE_NEW 3
CLK_PCIE_NEW# 3
USB_PP3 16
USB_PN3 16
SKT1
SKT1
1 2
21.H0114.001
21.H0114.001
NEW
NEW
TP3TP3
3D3V_NEW_S0
3D3V_NEW_LAN_S5
DY
DY
R687 0R2J-2-GP
R687 0R2J-2-GP
1D5V_NEW_S0
SRN33J-5-GP-U
SRN33J-5-GP-U
TP54 TP54
TP51 TP51
1 2
CPPE#
TPS2231_PERST#
RN72
RN72
1
2 3
NEW
NEW
CONN_TP1
CONN_TP2
CPUTSB#
4
E
NEW1
NEW1
NP2
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
NP1
FCI-CON26-5-GP
FCI-CON26-5-GP
20.F0789.026
20.F0789.026
NEW
NEW
NEWCARD Connector
Reserve the symbol
for bottom side
connector
RN70
CPUTSB#
20
SHDN#
NC#16
16
CPPE# TPS2231_PERST#
8
6
9
10
CPPE#
PERST#
CPUSB#
SYSRST#
NC#44NC#55NC#1313NC#14
14
S5_EN 31,36
U41
U41
1
STBY#
18
RCLKEN
19
OC#
21
THERMAL_PAD
7
GND
RN70
1
2 3
SRN100KJ-6- GP
SRN100KJ-6-GP
DY
DY
3.3VIN
3.3VOUT
1.5VIN
1.5VOUT
AUXIN
AUXOUT
NEW
NEW
TPS2231RGP-GP
TPS2231RGP-GP
74.02231.073
74.02231.073
4
1 2
R336 DUMMY-R2 R336 DUMMY-R2
2
3
12
11
17
15
3D3V_S0
3D3V_NEW_S0
1D5V_S0
1D5V_NEW_S0
3D3V_S5
3D3V_NEW_LAN_S5
3D3V_S5
NEWCARD_RST# 16
PLT_RST1# 7,16,20,26,31,32,34,35,45
1 1
A
B
3D3V_S0 3D3V_NEW_LAN_S5
C179
C179
1 2
NEW
NEW
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
C
1 2
NEW
NEW
3D3V_NEW_S0 1D5V_NEW_S0
C462
C462
NEW
NEW
1 2
NEW
NEW
C463
C463
SC1U10V3ZY-6GP
SC1U10V3ZY-6GP
Place them Near to Connector Place them Near to Chip
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
C452
C452
SC1U10V3ZY-6GP
SC1U10V3ZY-6GP
NEW
NEW
<Variant Name>
<Variant Name>
<Variant Name>
C451
C451
1 2
C450
C450
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
NEW
NEW
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
D
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet of
Date: Sheet of
Date: Sheet of
MINI-PCI/NEW Card
MINI-PCI/NEW Card
MINI-PCI/NEW Card
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
AG1 -1
AG1 -1
AG1 -1
30 53 Tuesday, January 10, 2006
30 53 Tuesday, January 10, 2006
30 53 Tuesday, January 10, 2006
E
1 2
Page 31
A
B
C
D
E
For S/W Debug
Pin No. Pin No.
MODE1
1 3D3V_AUX_KBC
H8_RESET#
3
KBC_AC_IN# H8_TXD1
5
LID_CLOSE#
7
PM_SLP_S3#
9
4 4
SB_RSMRST# 16
3 3
GF_LPC_LAD0 32,34
GF_LPC_LAD2 32,34
GF_LPC_LAD1 32,34
GF_LPC_LAD3 32,34
PCLK_KBC 3
100R2J-2-GP
100R2J-2-GP
2 2
LPC_LFRAME# 15 GF_LPC_LFRAME# 32,34
Place near KBC
(Near H11,Top side).
KBC_3D3V_AUX
4
1 1
1
2 3
KBC_SCL
KBC_SDA
TP101 TP101
TP102 TP102
TP103 TP103
TP104 TP104
TP75 TP75
TP106 TP106
TP74 TP74
TP108 TP108
3D3V_AUX_S5
3D3V_S5
R802
R802
2K2R2J-2-GP
2K2R2J-2-GP
1 2
1
BAT54PT-GP
BAT54PT-GP
2
DY
DY
R3
R3
1 2
0R2J-2-GP
0R2J-2-GP
1 2
DY
DY
1 2
DY
DY
R799
R799
1 2
0R2J-2-GP
0R2J-2-GP
FIR
FIR
RN96
RN96
SRN10KJ-5-GP
SRN10KJ-5-GP
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
D42
D42
3
3D3V_AUX_S5
1 2
GF_LPC_LAD0
GF_LPC_LAD2
GF_LPC_LAD1
GF_LPC_LAD3
SRN0J-4-GP
SRN0J-4-GP
R626
R626
PCLK_KBC_RC
C707
C707
SC10P50V2JN-4GP
SC10P50V2JN-4GP
5V_S0
SRN10KJ-5-GP
SRN10KJ-5-GP
1
G
G
Q39
Q39
2N7002-8-GP
2N7002-8-GP
2 3
S
D
S
D
A
SB_RSMRST#_KBC
R472
R472
100KR2J-1-GP
100KR2J-1-GP
BRIGHTNESS 13
MODE0
H8_RXD1
GND 10
R261
R261
0R0805-PAD
0R0805-PAD
CHG_I_PWM 42
CHG_V_PWM 42
RSMRST#_TO_KBC 16
KBC_BB_EN#
1
2
3
4 5
3D3V_S0
RN94
RN94
1
G
G
D
D
2
4
6
8
KBC_3D3V_AUX
1 2
1 2
DY
DY
C357
C357
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
RN71
RN71
FIR
FIR
2M2R3-GP
2M2R3-GP
3D3V_S0
4
1
2 3
Q44
Q44
2N7002-8-GP
2N7002-8-GP
2 3
S
S
5V_AUX_S5
AD_OFF 44
CHG_4D35V# 42
LPC_LAD0
8
LPC_LAD2
7
LPC_LAD1
6
LPC_LAD3
1 2
R637
R637
DY
DY
SB_PWRBTN# 16
WIRELESS_BTN# 13
AMP_SHUTDOWN 29
0R0805-PAD
0R0805-PAD
C732
C732
BT_BTN# 13
S5_EN 30,36
USB_EN# 21
PLT_RST1# 7,16,20,26,30,32,34,35,45
INT_SERIRQ 16,25,30,32
KBC_BEEP 28
RF_ON/OFF# 26,30
BLON_OUT 13
BLON_IN 48
1
2
3
4 5
MAIL# 13
EBUTTON# 13
PROGRAM# 13
SMBC_KBC 19
SMBD_KBC 19
KBC_5V_AUX
R584
R584
1 2
1 2
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
LPC_LAD[0..3] 15
R618
R618
1 2
0R0402-PAD
0R0402-PAD
RN98
RN98
8
7
6
SRN10KJ-4-GP
SRN10KJ-4-GP
C724
C724
SC4D7U10V5ZY-3GP
SC4D7U10V5ZY-3GP
C324
C324
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
CHG_I_PWM
CHG_V_PWM
3D3V_S5_SENSE
SB_PWRBTN#
S5_EN
AD_OFF
USB_EN#
LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3
LPC_LFRAME#
PLT_RST1#
KBC_BEEP
KBC_SDA
RF_ON/OFF#
BRIGHTNESS
BLON_OUT
BLON_IN
KBC_BB_EN#
KROW1
KROW2
KROW3
KROW4
KROW5
KROW6
KROW7
KROW8
INTERNET#
B
1 2
C723
C723
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
1 2
C312
C312
U73
U73
112
P10/PW0
110
P11/PW1
109
P12/PW2
108
P13/PW3
107
P14/PW4
106
P15/PW5
105
P16/PW6
104
P17/PW7
103
P20
102
P21
101
P22
100
P23
99
P24
98
P25
97
P26
96
P27
121
P30/LAD0
122
P31/LAD1
123
P32/LAD2
124
P33/LAD3
125
P34/LFRAME#
126
P35/LRESET#
127
P36/LCLK
128
P37/SERIRQ
136
P40/TMCI0
137
P41/TMO0
138
P42/TMRI0/SDA1
2
P43/TMCI1
3
P44/TMO1
4
P45/TMRI1
5
P46
6
P47
78
P60/FTCI/KIN0#/TMIX
79
P61/FTOA/KIN1#
80
P62/FTIA/KIN2#/TMIY
81
P63/FTIB/KIN3#
82
P64/FTIC/KIN4#
83
P65/FTID/KIN5#
84
P66/FTOB/KIN6#/IRQ6#
85
P67/TMOX/KIN7#/IRQ7#
MAIL#
EBUTTON#
PROGRAM#
BATA_SCL 44
86
P7068P7169P7270P7371P7472P7573P7674P77
ECSWI#_KBC
K_A20GATE 15
PM_CLKRUN# 16,22,25,30,32
PM_SUS_STAT# 16,32
49
PF0/TMIA50PF1/TMIB
47
PF2/TMOA48PF3/TMOB
45
44
43
PF4/EXTMIX46PF5/EXTMIY
PF6/EXTMOX
54
52
142
55
53
PG058PG157PG256PG3
PF7/TMOY
PG4/EXSDAA
12
8
51
RES#
STBY#
RESO#
PG5/EXSCLA
PG7/EXSCLB
PG6/EXSDAB
13
36
VCL
VCC1VCC76VCC77VCC
VCCB
RE144B
P50/EXTXD116P51/EXRXD115P52/EXSCK1/SCL0
P80/PME#
P81/GA20
P82/CLKRUN#
P83/LPCPD#
P84/IRQ3#/TXD1
P85/IRQ4#/RXD1
P86/IRQ5#/SCK1/SCL1
P90/IRQ2#24P91/IRQ1#23P92/IRQ0#22P9321P9420P9519P96/EXCL18P97/SDA0
14
75
H8_TXD1
H8_RXD1
KBC_SCL
129
130
131
132
133
134
135
KBC_AC_IN#
C
17
LID_CLOSE#
NMI
11
1
2
BAT54PT-GP
BAT54PT-GP
140X2141
9
MD010MD1
PA2/KIN10#/PS2AC
PA3/KIN11#/PS2AD
PA4/KIN12#/PS2BC
PA5/KIN13#/PS2BD
PA6/KIN14#/PS2CC
PA7/KIN15#/PS2CD
PB0/WUE0#/LSMI
PB1/WUE1#/LSCI
VSS7VSS42VSS67VSS95VSS
KBC_NMI
D39
D39
3
PLANARID0 33
PLANARID1 33
PLANARID2 33
INTERNET# 13
BLUETOOTH_EN 21
H8_RESET#
MODE0
KBC_NMI
H8_STBY#
MODE1
KBC_XTAL
KBC_EXTAL
143
144
X1
XTAL
EXTAL
PA0/KIN8#
PA1/KIN9#
PB2/WUE2#
PB3/WUE3#
PB4/WUE4#
PB5/WUE5#
PB6/WUE6#
PB7/WUE7#
PC0
PC1
PC2
PC3
PC4
PC5
PC6
PC7
PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7
PE0
PE1
PE2
PE3
PE4
PE5
PE6
PE7
VSS
RE144B-GP71.00144.B0G
RE144B-GP71.00144.B0G
111
139
NUM_LED 13
CAP_LED 13
STDBY_LED 13
PWRLED 13
CHRGER_LED 13
DC_BATFULL 13
EMAIL_LED 13
RN48
RN48
ECSCI#_KBC
EC_PWRBTN#
PCIE_WAKE#
KCOL1
KCOL2
KCOL3
KCOL4
KCOL5
KCOL6
KCOL7
KCOL8
KCOL9
KCOL10
KCOL11
KCOL12
KCOL13
KCOL14
KCOL15
KCOL16
KBC_MATRIX0
KBC_MATRIX1
NAPA_U_V
D
1
2
3
4 5
8
7
6
SRN10KJ-4-GP
SRN10KJ-4-GP
41
40
39
38
37
35
34
33
120
119
118
117
116
115
114
113
94
93
92
91
90
89
88
87
66
65
64
63
62
61
60
59
32
31
30
29
28
27
26
25
BATA_SDA 44
BLUETOOTH_LED 13
WLAN_TEST_LED 26
H_RCIN# 15
PM_SLP_S3# 16,18,30,36,41,43,52
LID_CLOSE# 33
AC_IN# 42
3D3V_AUX_S5
non CardR
non CardR
10KR2J-3-GP
10KR2J-3-GP
NAPA_U_V
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
CRT_IN# 14
EC_PWRBTN# 13
PM_SLP_S5# 16,41,43
PCIE_WAKE# 16,30,35
SC100P50V2JN-3GP
SC100P50V2JN-3GP
KBC_MATRIX0 33
KBC_MATRIX1 33
KCOL[1..16] 33
KROW[1..8] 33
<Variant Name>
<Variant Name>
<Variant Name>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet of
1394/CardReader Detect Pin
1 2
H:non 1394/CardReader
R267
R267
L:has 1394/CardReader
-1 Modify
1 2
R268
R268
10KR2J-3-GP
10KR2J-3-GP
CardR
CardR
KBC_3D3V_AUX
C660
C660
TCLK 33
TDATA 33
1 2
C694
C694
KBC_3D3V_AUX
1 2
R586
R586
10KR2J-3-GP
10KR2J-3-GP
Q45
Q45
SC10P50V2JN-4GP
SC10P50V2JN-4GP
ECSCI#_KBC
ECSWI#_KBC
BATA_SCL
BATA_SDA
KBC_AC_IN#
KBC_MATRIX0
KBC_MATRIX1
K_A20GATE
AG1
AG1
AG1
E
C
1
2
3
4 5
BATA_IN# 42,44
3
3
1 2
CH3906PT-GP
CH3906PT-GP
050510:For
Battery switch
fail issue
KBC_RE144B
KBC_RE144B
KBC_RE144B
B
C380
C380
RN45
RN45
SRN10KJ-4-GP
SRN10KJ-4-GP
D37
D37
BAT54PT-GP
BAT54PT-GP
D38
D38
BAT54PT-GP
BAT54PT-GP
1
2 3
SRN10KJ-5-GP
SRN10KJ-5-GP
1 2
1
2 3
SRN10KJ-5-GP
SRN10KJ-5-GP
1 2
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
PURE_HW_SHUTDOWN# 19,36
R270 100R2J-2-GP R270 100R2J-2-GP
X3
X3
1 2
XTAL-10MHZ-3GP
XTAL-10MHZ-3GP
82.30054.041
82.30054.041
SC10P50V2JN-4GP
SC10P50V2JN-4GP
4
KBC_3D3V_AUX
10KR2J-3-GP
10KR2J-3-GP
4
10KR2J-3-GP
10KR2J-3-GP
5V_S0
EC25
EC25
ECSCI# 16
ECSWI# 16
KBC_3D3V_AUX
3D3V_S0
8
7
6
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1
2
1
2
RN47
RN47
R585
R585
RN46
RN46
R599
R599
-1 Modify
of
of
31
31
31
E
1 2
1 2
C358
C358
1 2
DY
DY
53 Tuesday, January 10, 2006
53 Tuesday, January 10, 2006
53 Tuesday, January 10, 2006
1 2
-1M
-1M
-1M
Page 32
5
D D
C C
Connecting a 10 K external pull-down resistor
makes the base address sample low, setting the
B B
Index-Data pair at 2Eh-2Fh.
4
1 2
C105
C105
SC1U10V3ZY-6GP
SC1U10V3ZY-6GP
FIR
FIR
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
C833
C833
1 2
C68
C68
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
FIR
FIR
1 2
FIR
FIR
FIR
FIR
VCORF
BADRR_STRAP
1 2
R128
R128
10KR2J-3-GP
10KR2J-3-GP
1 2
C39
C39
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
FIR
FIR
U13
U13
1
CTS1#
44
DCD1#
45
DSR1#
3
RI1#
46
SIN1
10
VCORF
2
DTR1#_BOUT1/BADDR
47
RTS1#/TRIS#
48
SOUT1/TEST#
71.87381.A0G
71.87381.A0G
FIR
FIR
3D3V_S0
R159
R159
1 2
FIR
FIR
10KR2J-3-GP
10KR2J-3-GP
3
GF_LPC_LAD0
GF_LPC_LAD1
GF_LPC_LAD2
GF_LPC_LAD3
3D3V_S0
16
30
28
32
8
24
35
VDD
VDD
VDD
27
36
38
40
LAD0
LAD1
LAD2
LAD3
SERIRQ
LRESET#
LFRAME#
LDRQ#/XOR_OUT
SIO PC87381
GPIO0011GPIO0112GPIO0213GPIO0314GPIO04
GPIO20
15
17
IRRX15IRTX6IRRX2_IRSL0/GPIO17
CLKRUN#/GPIO2219RESERVED/GPO2420GPIO21/LPCPD#21GPIO23
7
22
IRRX1
IRSL0
IRTX
LPCPD#
1 2
R25 DUMMY-R2 R25 DUMMY-R2
43
25
LCLK
CLKIN
NC#42
NC#33
NC#37
NC#39
NC#41
NC#4
NC#18
NC#26
NC#29
NC#31
VSS
VSS
VSS
PC87381-VBH-GP
PC87381-VBH-GP
9
23
34
PM_CLKRUN# 16,22,25,30,31
42
33
37
39
41
4
18
26
29
31
2
1 2
R26
R26
DUMMY-R2
DUMMY-R2
PCLK_SIO_RC
PM_SUS_STAT# 16,31
GF_LPC_LAD[0..3] 31,34
PCLK_SIO 3
R68
R68
DUMMY-R2
DUMMY-R2
C38
C38
1 2
DUMMY-C2
DUMMY-C2
1 2
CLK14_SIO_RC
1
LPC_LDRQ0# 15
PLT_RST1# 7,16,20,26,30,31,34,35,45
INT_SERIRQ 16,25,30,31
GF_LPC_LFRAME# 31,34
CLK14_SIO 3
C69
C69
1 2
DUMMY-C2
DUMMY-C2
VISHAY FIR/CIR Module
Place C581
3D3V_S0
1 2
C509
A A
C509
FIR
FIR
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
,C583 near Pin1
and Pin6
1 2
C532
C532
FIR
FIR
IR_GND
1 2
C531
C531
FIR
FIR
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
5
G55
G55
1 2
GAP-CLOSE
GAP-CLOSE
IRTX
IRRX1
IRSL0
IR_GND
Layout Guide:
(1) FIR_3D3V : 30 mils,
(2) C583, C581 close
to U32
U56
U56
1
VCC2/IRED_ANODE
2
IRED_CATHODE
3
TXD
4
RXD
5
SD
6
VCC1
7
MODE
8
GND
FIR-TFDU6102-GP 56.15001.051
FIR-TFDU6102-GP 56.15001.051
FIR
FIR
4
<Variant Name>
<Variant Name>
<Variant Name>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
3
2
Date: Sheet
SIO 87381 / FIR
SIO 87381 / FIR
SIO 87381 / FIR
AG1
AG1
AG1
-1
-1
-1
53 Tuesday, January 10, 2006
53 Tuesday, January 10, 2006
53 Tuesday, January 10, 2006
of
of
of
32
32
32
1
Page 33
4
3
PUSH-SW81-GP
PUSH-SW81-GP
62.40014.141
62.40014.141
LEFT1
LEFT1
1 2
SW-TACT-59-GP-U1
SW-TACT-59-GP-U1
62.40009.431
62.40009.431
2nd source: 62.40009.341
COVER SWITCH
CVR1
CVR1
2
1
R459
R459
1 2
100R2F-L1-GP-U
100R2F-L1-GP-U
SCROLL KEY
TP_SCROLL_LEFT
SCRL2
SCRL2
1 2
5
4 3
SW-TACT-59-GP-U1
SW-TACT-59-GP-U1
62.40009.431
62.40009.431
5
4 3
3D3V_AUX_S5
R460
R460
100KR2J-1-GP
100KR2J-1-GP
1 2
1 2
C547
C547
SC1KP16V2KX-GP
SC1KP16V2KX-GP
1 2
SW-TACT-59-GP-U1
SW-TACT-59-GP-U1
SW-TACT-59-GP-U1
SW-TACT-59-GP-U1
TP_SCROLL_UP
SCRL1
SCRL1
5
4 3
62.40009.431
62.40009.431
TP_SCROLL_DOWN
SCRL3
SCRL3
1 2
62.40009.431
62.40009.431
5
4 3
LID_CLOSE# 31
SCRL4
SCRL4
1 2
SW-TACT-59-GP-U1
SW-TACT-59-GP-U1
62.40009.431
62.40009.431
Internal KeyBoard Connector
SW1
PSW_CLR# 16
KBC_MATRIX0 31
KBC_MATRIX1 31
PSW_CLR#
Keyboard matrix ( from vendor )
MATRIXID0#
MATRIXID1#
PSW_CLR#
NC
KBC_MATRIX1
KBC_MATRIX2 4 - 8 ON
TDATA 31
TCLK 31
TP_RIGHT TP_LEFT TP_SCROLL_RIGHT
RIGHT1
RIGHT1
1 2
5
4 3
SW-TACT-59-GP-U1
SW-TACT-59-GP-U1
62.40009.431
62.40009.431
PLANARID2 31
PLANARID1 31
PLANARID0 31
SW1
1
2
3
4
SW-DIP-4-2-U2-GP
SW-DIP-4-2-U2-GP
1
SRN33J-5-GP-U
SRN33J-5-GP-U
5
4 3
ON
5
6
7
8
00 1
1 1
Low Active
1 - 5 ON
2 - 6 ON
3 - 7 ON
5V_S0
1
2 3
RN100
RN100
SRN10KJ-5-GP
SRN10KJ-5-GP
4
1
2 3
PLANARID2
PLANARID1
PLANARID0
Ohter Eur
Jap US
00
RN44
RN44
4
3D3V_AUX_S5
R265
R265
100KR2J-1-GP
100KR2J-1-GP
DY
DY
1 2
R623
R623
100KR2J-1-GP
100KR2J-1-GP
1 2
ACES-CON25-GP
ACES-CON25-GP
2nd source: 20.K0198.025
1 2
EC35
EC35
TP_DATA
TP_CLK
R264
R264
100KR2J-1-GP
100KR2J-1-GP
1 2
R624
R624
100KR2J-1-GP
100KR2J-1-GP
DY
DY
1 2
KROW[1..8] 31
KCOL[1..16] 31
KB1
KB1
26
NC#26
NC#25
NC#27
20.K0197.025
20.K0197.025
C01
C02
C03
R01
R02
R03
C04
R04
R05
R06
R07
R08
R09
C05
R10
C06
C07
R11
R12
C08
R13
R14
R15
R16
KROW1
1
KROW2
2
KROW3
3
4
5
6
KROW4
7
8
9
10
11
12
13
KROW5
14
15
16
17
18
19
20
21
22
23
24
25
27
KROW6
KROW7
KROW8
KCOL10
KCOL11
KCOL12
KCOL13
KCOL14
KCOL15
KCOL16
12 5
K/B
5V_S0
1 2
EC327
EC327
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
R263
R263
100KR2J-1-GP
100KR2J-1-GP
DY
DY
1 2
R622
R622
100KR2J-1-GP
100KR2J-1-GP
1 2
Planar
ID(2,1,0)
SA: 0,0,0
SB: 0,0,1
SC: 0,1,0
SD: 0,1,1
-1: 1,0,0
KCOL1
KCOL2
KCOL3
KCOL4
KCOL5
KCOL6
KCOL7
KCOL8
KCOL9
TP_SCROLL_RIGHT
TP_SCROLL_UP
TP_SCROLL_DOWN
TP_LEFT
TP_RIGHT
TP_SCROLL_LEFT
ERC3
ERC3
SRC100P50V-2-GP
SRC100P50V-2-GP
77.61012.02L
77.61012.02L
TOUCH PAD
TPAD1
TPAD1
14
12
11
10
9
8
7
6
5
4
3
2
1
13
ACES-CON12-GP
ACES-CON12-GP
20.K0174.012
20.K0174.012
2nd source: 20.K0185.012
11 2
123
678
ERC2
123
ERC2
SRC100P50V-2-GP
SRC100P50V-2-GP
DY
DY
4 5
678
4 5
T/P
<Variant Name>
<Variant Name>
<Variant Name>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
KEYBOARD/TOUCHPAD
KEYBOARD/TOUCHPAD
KEYBOARD/TOUCHPAD
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet of
Date: Sheet of
AG1 SC
AG1 SC
AG1 SC
of
33 53 Tuesday, January 10, 2006
33 53 Tuesday, January 10, 2006
33 53 Tuesday, January 10, 2006
Page 34
A
B
C
D
E
4 4
GF_LPC_LAD[0..3] 31,32
PLT_RST1# 7,16,20,26,30,31,32,35,45
GF_LPC_LFRAME# 31,32
PCLK_FWH 3
FWH_INIT# 15
EXT_FWH# 16
-1 Modify
SPI FLASH ROM
3D3V_S0
3 3
R403
R403
10KR2J-3-GP
10KR2J-3-GP
1 2
SPI_CS# 16
SPI_WP# 16
SPI_MISO 16
SPI_CS#
SPI_MISO SPI_HOLD#
8M Bits
U54
U54
1
CE#
2
SO
HOLD#
3
WP#
4
VSS
SST25LF080A-1GP
SST25LF080A-1GP
72.25080.E01
72.25080.E01
VDD
SCK
SPI
SPI
3D3V_S5
8
7
SPI_CLK SPI_WP#
6
SPI_MOSI
5
SI
R402
R402
1 2
10KR2J-3-GP
10KR2J-3-GP
3D3V_S5
SPI_CLK 16
SPI_MOSI 16
GOLDEN FINGER FOR DEBUG BOARD
5V_S0
PLT_RST1#
GF_LPC_LFRAME#
PCLK_FWH
FWH_INIT#
GF_LPC_LAD3
GF_LPC_LAD2
GF_LPC_LAD1
GF_LPC_LAD0
EXT_FWH#
3D3V_S0
U46
U46
A1
A1
A2
A2
A3
A3
A4
A4
A5
A5
A6
A6
A7
A7
A8
A8
A9
A9
A10
A10
A11
A11
A12
A12
A13
A13
A14
A14
A15
A15
FOX-GF30
FOX-GF30
ZZ.GF030.XXX
ZZ.GF030.XXX
Boot Device must have ID[3:0] = 0000
Has internal pull-down resistors
All may be left floated
FPET7 Elec. P3-46
B10
B11
B12
B13
B14
B15
B1
B1
B2
B2
B3
B3
B4
B4
B5
B5
B6
B6
B7
B7
B8
B8
B9
B9
B10
B11
B12
B13
B14
B15
5V_S0
PLT_RST1#
GF_LPC_LFRAME#
PCLK_FWH
FWH_INIT#
GF_LPC_LAD3
GF_LPC_LAD2
GF_LPC_LAD1
GF_LPC_LAD0
EXT_FWH#
3D3V_S0
SOIC 200 Socket P/N:
Wieson: 62.10076.001
SPI ROM:
SST25LF080A: 72.25080.E01
SST25VF080B : 72.25080.G01
TOP VIEW
ST M25P80: 72.25P80.001
(B1)
2 2
A15
A14
(B2)
....
....
A2 (B14)
A1
(B15)
(BOTTOM VIEW)
1 1
A
B
C
D
<Variant Name>
<Variant Name>
<Variant Name>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
BIOS : SPI
BIOS : SPI
BIOS : SPI
AG1 -1
AG1 -1
AG1 -1
34 53 Tuesday, January 10, 2006
34 53 Tuesday, January 10, 2006
34 53 Tuesday, January 10, 2006
of
of
E
of
Page 35
5
1D2V_LAN_S5
D D
1 2
1 2
C798
C798
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
GIGA
GIGA
GIGA
GIGA
3D3V_S0
R750
R750
0R3-0-U-GP
0R3-0-U-GP
GIGA
GIGA
3D3V_LAN_S0
C C
GIGA
GIGA
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
B B
A A
1 2
1 2
C837
C837
C839
C839
GIGA
GIGA
GIGA
GIGA
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
C797
C797
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
GIGA
GIGA
5789
5789
1 2
R776
R776
1 2
0R3-0-U-GP
0R3-0-U-GP
1 2
C838
C838
1D2V_LAN_S5
3D3V_LAN_S5
2D5V_LAN_S5
1 2
C836
C836
GIGA
GIGA
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
C800
C800
3D3V_S5
1 2
C835
C835
GIGA
GIGA
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
5
1 2
C801
C801
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
GIGA
GIGA
1 2
0R0603-PAD
0R0603-PAD
A1
A3
A4
A5
VDDIO_PCI_G
A7
A9
B1
B2
B3
B5
B6
B9
C1
C3
C5
C6
C7
C8
C9
C10
D1
D2
D3
D4
E1
E3
E4
F1
F2
F3
G1
G2
G3
H1
H4
H11
J1
J3
J11
J14
K3
K9
K10
K13
L2
L4
L5
L11
L12
L14
M2
M3
M4
M9
M11
M12
M13
M14
N2
N3
N4
N13
N14
P1
P2
P3
P4
P14
GIGA
GIGA
R751
R751
DC
DC
DC
DC
DC
DC
DC
DC
DC
DC
DC
DC
DC
DC
DC
DC
DC
DC
DC
DC
DC
DC
DC
DC
DC
DC
DC
DC
DC
DC
DC
DC
DC
DC
DC
DC
DC
DC
DC
DC
DC
DC
DC
DC
DC
DC
DC
DC
DC
DC
DC
DC
DC
DC
DC
DC
DC
DC
DC
DC
DC
DC
DC
DC
DC
DC
DC
DC
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
GIGA
GIGA
U83B
U83B
1 2
1 2
C830
C830
C802
C802
GIGA
GIGA
GIGA
GIGA
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
3D3V_LAN_S5
D11
G11
K12
VDDID
VDDID
VDDIO
BCM5789
BCM5787M
VSSB4VSSB7VSS
VSSE2VSSF6VSSF7VSSF8VSSF9VSSG5VSSG6VSSG7VSSG8VSSG9VSS
B12
1 2
C799
C799
0R0402-PAD
0R0402-PAD
1 2
C834
C834
GIGA
GIGA
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
R747
R747
1 2
VDDP_G
P13
VDDPA8VDDPD5VDDP
GPHY_PLLVDD
PCIE_SDSVDD
VSSH5VSSH6VSSH7VSSH8VSSH9VSS
G10
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
PCIE_PLLVDD
REGCTL25
REGCTL12
4
3D3V_LAN_S5
1 2
C841
C841
GIGA
GIGA
2D5V_LAN_S5
1 2
C852
C852
GIGA
GIGA
1D2V_LAN_S5
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
B8
VDDC1.2
E5
VDDC1.2
E6
VDDC1.2
E7
VDDC1.2
E8
VDDC1.2
E9
VDDC1.2
E10
VDDC1.2
F5
VDDC1.2
F10
VDDC1.2
G4
VDDC1.2
J4
VDDC1.2
J5
VDDC1.2
J10
VDDC1.2
K4
VDDC1.2
K5
VDDC1.2
K6
VDDC1.2
K7
VDDC1.2
K8
VDDC1.2
F12
AVDDL
F13
AVDDL
G14
M8
M6
L13
J13
J6
VSS
J7
VSS
J8
VSS
J9
VSS
K2
VSS
M5
VSS
M7
VSS
M10
VSS
N1
VSS
N5
VSS
N7
VSS
N9
VSS
N11
VSS
P5
VSS
P7
VSS
P9
VSS
P11
VSS
BCM5787MKFBG-GP
BCM5787MKFBG-GP
H10
71.05787.00U
71.05787.00U
4
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
GIGA
GIGA
AVDDL_G
GPHY_PLLVDD
PCIE_PLLVDD
PCIE_SDSVDD
REGCTL25
REGCTL12
R766 0R2J-2-GP
R766 0R2J-2-GP
R767 0R2J-2-GP
R767 0R2J-2-GP
R768 0R2J-2-GP
R768 0R2J-2-GP
R769 0R2J-2-GP
R769 0R2J-2-GP
R770 0R2J-2-GP
R770 0R2J-2-GP
LAN_ N11
R772 0R2J-2-GP
R772 0R2J-2-GP
R771 0R2J-2-GP
R771 0R2J-2-GP
R773 0R2J-2-GP
R773 0R2J-2-GP
R774 0R2J-2-GP
R774 0R2J-2-GP
1 2
C840
C840
1D2V_LAN_S5
MMJT9435T1G-GPU
MMJT9435T1G-GPU
1 2
5787
5787
12
5787
5787
12
5787
5787
1 2
5787
5787
12
5787
5787
1 2
5787
5787
12
5787
5787
12
5787
5787
1 2
5787
5787
2D5V_LAN_S5
XTALVDD_G
L39
L39
1 2
0R0603-PAD
0R0603-PAD
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
L40
L40
1 2
0R0603-PAD
0R0603-PAD
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
AVDD_A13
L41
L41
1 2
0R0603-PAD
0R0603-PAD
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
AVDD_F14
L44
L44
1 2
0R0603-PAD
0R0603-PAD
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
Place PLLVDD/AVDDL
CKT as close to chip as
possible
AVDDL_G
L42
L42
1 2
0R0603-PAD
0R0603-PAD
L45
L45
1 2
0R0603-PAD
0R0603-PAD
L43
L43
1 2
0R0603-PAD
0R0603-PAD
L46
L46
1 2
0R0603-PAD
0R0603-PAD
1 2
C854
C854
DY
DY
GPHY_PLLVDD
1 2
DY
DY
C856
C856
1 2
C857 SC4D7U10V5ZY-3GP
C857 SC4D7U10V5ZY-3GP
DY
DY
1 2
C859 SC4D7U10V5ZY-3GP
C859 SC4D7U10V5ZY-3GP
DY
DY
3D3V_LAN_S5
1 2
C861
C861
E
Q53
Q53
B
5787
5787
C
GIGA
GIGA
GIGA
GIGA
1 2
1 2
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
C862
C862
C864
C864
GIGA
GIGA
GIGA
GIGA
SC4D7U10V5ZY-3GP
SC4D7U10V5ZY-3GP
3D3V_LAN_S5
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
E
GIGA
GIGA
Q54
Q54
B
MMJT9435T1G-GPU
MMJT9435T1G-GPU
1D2V_LAN_S5
C
1 2
C868
C868
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
GIGA
GIGA
GIGA
GIGA
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
C842
C842
BIASVDD_G
C843
C843
C845
C845
C851
C851
SCD47U10V3 ZY-GP
SCD47U10V3ZY-GP
PCIE_PLLVDD
SCD47U10V3ZY-GP
SCD47U10V3ZY-GP
PCIE_SDSVDD
C863
C863
1 2
SC4D7U10V5ZY-3GP
SC4D7U10V5ZY-3GP
2D5V_LAN_S5
1 2
1 2
C869
C869
3
1 2
GIGA
GIGA
1 2
GIGA
GIGA
1 2
GIGA
GIGA
1 2
GIGA
GIGA
1 2
C855
C855
GIGA
GIGA
1 2
SCD1U10V2 KX-4GP
SCD1U10V2KX-4GP
GIGA
GIGA
C850
C850
1 2
C858
C858
GIGA
GIGA
SCD47U10V3ZY-GP
SCD47U10V3ZY-GP
1 2
C860
C860
GIGA
GIGA
SCD47U10V3ZY-GP
SCD47U10V3ZY-GP
C865
C865
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
GIGA
GIGA
C866
C866
1 2
GIGA
GIGA
GIGA
GIGA
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SC4D7U10V5ZY-3GP
SC4D7U10V5ZY-3GP
3
2
3D3V_LAN_S5
5789
5789
1 2
1 2
R746
R746
1KR2J-1-GP
1KR2J-1-GP
PLT_RST1# 7,16,20,26,30,31,32,34,45
PCIE_WAKE# 16,30,31
3D3V_LAN_S5
R752
R752
R753 4K7R2J-2-GP
R753 4K7R2J-2-GP
R754 4K7R2J-2-GP
R754 4K7R2J-2-GP
R762 0R0402-PAD R762 0R0402-PAD
1 2
1 2
LAN_EE_WP
LAN_EECLK
LAN_EEDATA
CLK_PCIE_LAN
CLK_PCIE_LAN#
GIGA
GIGA
1 2
5787
5787
1 2
5789
5789
R775 1KR2J-1-GP
R775 1KR2J-1-GP
DY
DY
4K7R2F-GP
4K7R2F-GP
R756
R756
4K7R2F-GP
4K7R2F-GP
5787
5787
R749 0R2J-2-GP
R749 0R2J-2-GP
R758 0R2J-2-GP
R758 0R2J-2-GP
1 2
5787
5787
1K24R2F-GP
1K24R2F-GP
8
VCC
7
WP
6
SCL
5
SDA
AT24C256N-10SU-GP
AT24C256N-10SU-GP
U83A
U83A
P10
PCIE_RXDP
N10
PCIE_RXDN
GIGA
GIGA
C849 SCD1U16V2KX-3G P
C849 SCD1U16V2KX-3GP
1 2
N6
GIGA
GIGA
PCIE_TXDP
C853 SCD1U16V2KX-3GP
C853 SCD1U16V2KX-3GP
1 2
P6
PCIE_TXDN
N8
REFCLK+
P8
REFCLK-
C2
PERST#
A6
WAKE#
VAUX_PRESENT
1 2
LOW_PWR
1 2
DY
DY
LAN_SMB_CLK
LAN_SMB_DATA
GIGA
GIGA
J12
1KR2J-1-GP
1KR2J-1-GP
3D3V_LAN_S0
R755
R755
5789
5789
1 2
CLK_SEL CLK_SEL CS#
1 2
R759
R759
VAUX_PRESENT
A2
ATTN_BTN#
1 2
L3
VMAINPRESNT
L6
LOW_PWR
H2
PWR_IND_LED#
J2
ATTN_IND_LED#
H3
CLKREQ#
F4
REFCLK_SE
D10
SMB_CLK
D9
SMB_DATA
A10
RDAC
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
5789
5789
R744
R744
1KR2J-1-GP
1KR2J-1-GP
CLK_PCIE_LAN 3
CLK_PCIE_LAN# 3
SMB_CLK 16,18,26,30
SMB_DATA 16,18,26,30
PCIE_TXP1 16
PCIE_TXN1 16
PCIE_RXP1 16
PCIE_RXN1 16
1 2
1KR2J-1-GP
1KR2J-1-GP
3D3V_LAN_S0
5789
5789
R745
R745
3D3V_LAN_S5
K14
NC#K14
L8
NC#L8
L9
NC#L9
M1
UART_MODE
K1
SERIAL_DI
L1
SERIAL_DO
1 2
C867
C867
C870
C870
X8
X8
GIGA
GIGA
1 2
XTAL-25MHZ-70GP
XTAL-25MHZ-70GP
1 2
82.30020.581
82.30020.581
GIGA
GIGA
SC27P50V2JN-2-GP
SC27P50V2JN-2-GP
GIGA
GIGA
LAN_X1_G
R765
R765
GIGA
GIGA
1 2
C871
C871
SC27P50V2JN-2-GP
SC27P50V2JN-2-GP
LAN_X0_G
1 2
200R2J-L1-GP
200R2J-L1-GP
P12
XTALI
N12
XTALO
BCM5787MKFBG-GP
BCM5787MKFBG-GP
"GIGA" -- stuff when 5789 or 5787M.
"5789" -- stuff when 5789.
"5787" -- stuff when 5787.
2
U84
U84
NC#3
GND
1
CLOSE TO GPHY PINS
5789
5789
4
1
1 2
C848
C848
SRN49D9F-GP
SRN49D9F-GP
TP78 TPAD28 TP78 TPAD28
of
of
RN106
RN106
MDI3-
MDI3+
2 3
5789
5789
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
5789
5789
4
1
1 2
C847
C847
SRN49D9F-GP
SRN49D9F-GP
MDI2-
MDI0-
1 2
C872
C872
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1
A0
2
A1
3
4
GIGA
GIGA
BIASVDD
XTALVDD
AVDD
AVDD
TRD0P
TRD0N
TRD1P
TRD1N
TRD2P
TRD2N
TRD3P
TRD3N
CS#
SSCLK
SI
SO
GPIO0
GPIO1
GPIO2
ENERGY_DET
SPEED1000LED#
SPD100LED#
TRAFFICLED#
LINKLED#
TRST#
TMS
TDI
TCK
TDO
EEDATA
EECLK
TEST#
GPHY_TVCOI
GIGA
GIGA
<Variant Name>
<Variant Name>
<Variant Name>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet of
BCM5787M / BCM5789
BCM5787M / BCM5789
BCM5787M / BCM5789
MDI0+
RN103
RN103
2 3
5789
5789
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
BIASVDD_G
A14
XTALVDD_G
H14
AVDD_A13
A13
AVDD_F14
F14
B13
B14
C13
C14
D13
D14
E13
E14
C12
E11
E12
SO
F11
1 2
G12
LAN_EE_WP
H13
1 2
G13
C4
A12
B11
B10
A11
1 2
D12
R796 4K7R2F-GP
R796 4K7R2F-GP
C11
H12
D7
D6
LAN_EEDATA
L10
LAN_EECLK
K11
1 2
L7
R763 4K7R2F-GP
R763 4K7R2F-GP
5787
5787
1 2
D8
R764 4K7R2F-GP
R764 4K7R2F-GP
5789
5789
AG1 -1
AG1 -1
AG1 -1
MDI1-
MDI2+
MDI1+
5789
5789
4
1
1 2
C846
C846
R757 4K7R2J-2-GP
R757 4K7R2J-2-GP
DY
DY
R761
R761
5789
5789
GIGA
GIGA
5789
5789
4
RN105
RN105
RN104
RN104
SRN49D9F-GP
SRN49D9F-GP
5787
5787
1 2
R760 10KR2J-3-GP
R760 10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
2 3
1
2 3
SRN49D9F-GP
SRN49D9F-GP
1 2
C844
C844
5789
5789
5789
5789
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
MDI0+ 23
MDI0- 23
MDI1+ 23
MDI1- 23
MDI2+ 23
MDI2- 23
MDI3+ 23
MDI3- 23
1
1G_LED# 23
100M_LED# 22,23
LAN_ACT_LED# 22,23
10M_LED# 22,23
35 53 Tuesday, January 10, 2006
35 53 Tuesday, January 10, 2006
35 53 Tuesday, January 10, 2006
1
Page 36
5V_AUX_S5
1 2
C35
C35
C36
C36
SC10U10V6ZY-U
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SC10U10V6ZY-U
DY
DY
*Layout*
15 mil
1 2
R45
R45
0R0402-PAD
0R0402-PAD
Aux Power
100mA
U4
U4
1
OUTPUT
2
AUX_SD
1 2
SENSE
3
SHUTDOWN
4
GND
LP2951CDR2G-GP
LP2951CDR2G-GP
DY
DY
C37
C37
1 2
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
INPUT
FEEDBACK
VO TAP
ERROR# OUTPUT
74.02951.F31
74.02951.F31
C623
C623
1 2
1D05V_S0
1 2
E
CHT2222APT-GP
CHT2222APT-GP
B
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
1 2
DY
DY
C
C71
C71
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
R719
R719
56R2J-4-GP
56R2J-4-GP
PM_THRMTRIP-I# 4
Q51
Q51
PURE_HW_SHUTDOWN# 19,31
S5_EN 30,31
-1M Modify
4.7K / 0.22U ?
3D3V_AUX_S5
1 2
R525
R525
100KR2J-1-GP
100KR2J-1-GP
DCBATOUT
8
7
6
5
1 2
C33
C33
SC1U50V5ZY-1-GP
SC1U50V5ZY-1-GP
DY
DY
SHUTDOWN_S5 S5_EN_3
R496
R496
1 2
1KR2J-1-GP
1KR2J-1-GP
CHT2222APT-GP
CHT2222APT-GP
Q8
Q8
C
B
E
H_PWRGD 4,15
1
BAT54PT-GP
BAT54PT-GP
2
S5_EN_2
1 2
10KR2J-3-GP
10KR2J-3-GP
D17
D17
3
R70
R70
1 2
10KR2J-3-GP
10KR2J-3-GP
R720
R720
T(soft)=1.736ms
3D3V_AUX_S5
D
D
1
G
G
S
S
2 3
T(soft)=1.736ms
D
D
Q16
Q16
2N7002-8-GP
2N7002-8-GP
S
S
BC2
BC2
SC22P50V3JN-GP
SC22P50V3JN-GP
C272
C272
SCD1U25V3KX-GP
SCD1U25V3KX-GP
Q52
Q52
2N7002-8-GP
2N7002-8-GP
84.27002.L04
84.27002.L04
1 2
R24
R24
36K5R3F-2-GP
36K5R3F-2-GP
R1
1 2
R23
R23
22KR2J-GP
22KR2J-GP
R2
Vout = 1.25*(1+ R1/R2)
1 2
1 2
R359
R359
200KR3J-GP
200KR3J-GP
DY
DY
SCD1U25V3KX-GP
SCD1U25V3KX-GP
K A
D29
D29
MMGZ5242BPT-GP
MMGZ5242BPT-GP
5V_S0
U51
U51
S
S
1
S
C323
C323
1 2
3D3V_S0
1D8V_S0 1D8V_S3
S
2
S
S
3
GD
GD
4 5
AO4422-1-GP
AO4422-1-GP
84.04422.B37
84.04422.B37
U52
U52
S
S
1
S
S
2
S
S
3
GD
GD
4 5
AO4422-1-GP
AO4422-1-GP
U27
U27
S
S
1
S
S
2
S
S
3
GD
GD
4 5
IRF7805ZPBF-GP
IRF7805ZPBF-GP
84.07805.A37
84.07805.A37
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
5V_S5
8
7
6
3D3V_S5
8
7
6
8
7
6
SHUTDOWN_S5
1
G
G
1 2
R358
R358
1MR2J-1-GP
1MR2J-1-GP
2 3
5V_AUX_S5
1 2
BC1
BC1
SC1U10V3ZY-6GP
SC1U10V3ZY-6GP
I max = 120 mA
U5
U5
1
SHDN#
2
GND
3
IN
G913CF-GP
G913CF-GP
74.00913.A3F
74.00913.A3F
SET
OUT
1 2
5
4
1 2
BC3
BC3
SC1U10V3ZY-6GP
SC1U10V3ZY-6GP
Run Power
Q18
DCBATOUT
Z_12V RUN_PWR_CTLR
R3 60
R360
1 2
10KR2J-3-GP
10KR2J-3-GP
1 2
R367 330KR2F-L-GP R367 330KR2F-L-GP
100KR2J-1-GP
Q19
Q19
GND
GND
2
IN
IN
PM_SLP_S3# 16,18,30,31,41,43,52
1
CHDTC124EU-1GP
CHDTC124EU-1GP
84.00124.F1K
84.00124.F1K
100KR2J-1-GP
OUT
OUT
3
R2
R2
R1
R1
TP0610K-T1-GP
TP0610K-T1-GP
S
S
2 3
84.00610.C31
84.00610.C31
1
G
G
1 2
R366
R366
Q18
D
D
1
G
G
1 2
R742
R742
47KR2J-2-GP
47KR2J-2-GP
D
D
S
S
2 3
Q17
Q17
2N7002-8-GP
2N7002-8-GP
TPS51120_EN1_5
1 2
C472
C472
SC4700P50V2KX-1GP
SC4700P50V2KX-1GP
TPS51120_EN2_3D3
1 2
C457
C457
SC4700P50V2KX-1GP
SC4700P50V2KX-1GP
TPS51120_EN1_5 40
TPS51120_EN2_3D3 40
<Variant Name>
<Variant Name>
<Variant Name>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
RUN and AUX POWER
RUN and AUX POWER
RUN and AUX POWER
AG1 -1M
AG1 -1M
AG1 -1M
36 53 Tuesday, January 10, 2006
36 53 Tuesday, January 10, 2006
36 53 Tuesday, January 10, 2006
of
of
of
Page 37
A
B
C
D
E
TPS51124
CPU_CORE
Intersil ISL6262
5V_S5
4 4
H_VID0
H_VID1
H_VID2
H_VID3
H_VID4
H_VID5
H_VID6
PSI#
CPUCORE_ON
PM_DPRSLPVR
H_DPRSTP#
VID Setting Output Signal
VID0(I / 1.05V)
VID1(I / 1.05V)
VID2(I / 1.05V)
PGOOD(OD / 3.3V)
CLK_EN#(O)
VID3(I / 1.05V)
VID4(I / 1.05V)
VID5(I / 1.05V)
VID6(I / 1.05V)
Input Signal
Output Power
VCC_CORE_PWR(O)
PSI# (I / 3.3V)
PGD_IN (I / 3.3V)
DPRSLPVR (I / 3.3V)
DPRSTP# (I / 3.3V)
6262_PWRGOOD
CLK_EN#
VCC_CORE_S0(Imax=48A)
DCBATOUT_TPS51124
TPS51124_EN1
TPS51124_EN2
CPUCORE_ON
CPUCORE_ON
1D8V/1D05V
Input Power
VCC
VIN
Input Signal
EN1
EN2
Output Signal
PGOOD1
PGOOD2
Output Power
1D8V (O)
1D05V(O)
1D8V_S0 (7A)
1D05V_S0 (7A)
3 3
2 2
VCC_SENSE
VSS_SENSE
DCBATOUT_6262
5V_S0
3D3V_S0
VSEN(I / Vcore)
RTN(I / Vcore)
Input Power
VCC(I)
VCC(I)
VCC(I)
TPS51120
CHGON#/OFF
BT_TH
AD+
Charger Max8725
Input Signal Output Signal
ICTL
PKPRES
Input Power Output Power
ACIN
BATT
ACOK
VOUT (O)
VOUT (O)
BT+SENSE
AC_IN
BT+
DCBATOUT
5V/3D3V
Voltage Sense
Input Signal
TPS51120_EN1_5
TPS51120_EN2_3D3
EN1
EN2
Input Power
1 1
DCBATOUT_TPS51120
VIN
A
Output Signal
PGOOD1(OD / 5V)
CPUCORE_ON
PGOOD2(OD / 5V) CPUCORE_ON
Output Power
5V(O)
3D3V(O)
B
5V_DC_S5 (6A)
3D3V_DC_S5 (5A)
AD_OFF
AD_JK
5V_AUX_S5
C
Input Signal
(I)
Input Power
VCC(I)
VCC(I)
Adapter
Output Signal
Output Power
(O)
VCC(O)
AD_IN
<Variant Name>
<Variant Name>
<Variant Name>
AD+
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet of
D
Date: Sheet of
Power Block Diagram
Power Block Diagram
Power Block Diagram
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
AG1
AG1
AG1
37 53 Tuesday, January 10, 2006
37 53 Tuesday, January 10, 2006
37 53 Tuesday, January 10, 2006
E
of
SA
SA
SA
Page 38
5
D D
PSI# 4
6262_AGND
CPU_PROCHOT# 4
R612 4K02R3F-GP R612 4K02R3F-GP
1 2
C269
C269
6262_AGND
C C
Place close to phase 1 chocke
1 2
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
470K /0402 size
If NTC=330Kohm, R10=8.66K
H_VID[0..6] 5
CPUCORE_ON 40,41,43,48
PM_DPRSLPVR 16
H_DPRSLP# 4,15
CLK_EN# 3
B B
R611
R611
1 2
NTC-470K-1-GP
NTC-470K-1-GP
6262_AGND
H_VID0
H_VID1
H_VID2
H_VID3 6262_VID3
1 2
R160 1K4R3F-1-GP R160 1K4R3F-1-GP
1 2
R162 61K9R2F-GP R162 61K9R2F-GP
1 2
C231 SC390P50V3JN-GP C231 SC390P50V3JN-GP
Switching Frequency=300KHz
PL
VSS_SENSE 5
VCC_SENSE 5
A A
When test without cpu,
R183 & R184 change to 0 ohms
If VCC_SENSE and VSS_SENSE pins have pulled
resistors to VCC_CORE_S0
==> Remove R183/R184
5
PH
4
R199
R199
1 2
0R0402-PAD
0R0402-PAD
R192
R192
1 2
0R0402-PAD
0R0402-PAD
1 2
R191 147KR2F-GP R191 147KR2F-GP
C268
C268
1 2
SCD015U25V3KX-GP
SCD015U25V3KX-GP
1 2
R227 0R0402-PAD R227 0R0402-PAD
1 2
R228 0R0402-PAD R228 0R0402-PAD
1 2
R231 0R0402-PAD R231 0R0402-PAD
1 2
R232 0R0402-PAD R232 0R0402-PAD
1 2
R229 0R0402-PAD R229 0R0402-PAD
1 2
R230 0R0402-PAD R230 0R0402-PAD
1 2
R197 0R0402-PAD R197 0R0402-PAD
1 2
R198 0R0402-PAD R198 0R0402-PAD
1 2
R196 0R0402-PAD R196 0R0402-PAD
1 2
R194 0R0402-PAD R194 0R0402-PAD
1 2
R195 0R0402-PAD R195 0R0402-PAD
R161 1K82R3F-GP R161 1K82R3F-GP
1 2
1 2
C266 SC470P50V2KX-3GP C266 SC470P50V2KX-3GP
R189
R189
1 2
2KR2-GP
2KR2-GP
C232
C232
1 2
SCD033U16V3KX-GP
SCD033U16V3KX-GP
1 2
R190 3K57R3F-L-GP R190 3K57R3F-L-GP
1 2
C267 SC5600P50V3KX-GP C267 SC5600P50V3KX-GP
R184
R184
1 2
0R0402-PAD
0R0402-PAD
R183
R183
1 2
0R0402-PAD
0R0402-PAD
4
5V_S5
R777
R777
0R2J-2-GP
0R2J-2-GP
DY
DY
SC1U10V3KX-3GP
SC1U10V3KX-3GP
6262_VID0
6262_VID1
6262_VID2
6262_VID4 H_VID4
6262_VID5 H_VID5
6262_VID6 H_VID6
6262_CORE_ON
6262_DPRSLP
6262_DPRSTP#
6262_CLKEN#
6262_VDIFF
DY
DY
1 2
C262
C262
6262_AGND
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
DCBATOUT_6262
5V_S0
1 2
1 2
R222
R222
10R2J-2-GP
10R2J-2-GP
1 2
C307
C307
21
49
6262_AGND
6262_PSI#
2
6262_PGD_INCPUCORE_ON
3
6262_RBIAS
4
5
6262_NTC
6
6262_SOFT
7
37
38
39
40
41
42
43
44
45
46
47
13
6262_FB2
12
6262_FB
11
6262_COMP
10
6262_VW
9
74.06262.073 U25
74.06262.073 U25
6262_RTN
1 2
C265
C265
SCD01U50V3KX-4GP
SCD01U50V3KX-4GP
6262_VSEN
1 2
C263
C263
6262_AGND
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
1 2
22
VCC
GND
GND_T
PSI#
PGD_IN
RBIAS
VR_TT#
NTC
SOFT
VID0
VID1
VID2
VID3
VID4
VID5
VID6
VR_ON
DPRSLPVR
DPRSTP#
CLK_EN#
VDIFF
FB2
FB
COMP
VW
RTN
15
1 2
R188
R188
10R3J-3-GP
10R3J-3-GP
C264
C264
SCD01U25V2KX-3GP
SCD01U25V2KX-3GP
6262_ AGND
20
VIN
ISL6262CRZ-T-GPU
ISL6262CRZ-T-GPU
VSEN
14
16
6262_DROOP
3
3D3V_S0
1 2
R193
R193
1K91R3F-GP
1K91R3F-GP
1 2
R200 0R0402-PAD R200 0R0402-PAD
1
48
3V3
PGOOD
35
UGATE1
36
BOOT1
34
PHASE1
32
LGATE1
33
PGND1
24
ISEN1
31
PVCC
27
UGATE2
26
BOOT2
28
PHASE2
30
LGATE2
29
PGND2
23
ISEN2
25
NC
8
OCSET
19
VSUM
18
VO
DFB
DROOP
17
6262_DFB
R187
R187
1 2
2K55R3F-GP
2K55R3F-GP
1 2
C261 SC180P50V3JN-LGP C261 SC180P50V3JN-LGP
3
PGOOD
Power good open-drain output.
Will be pulled up externally by
a 680. resistor to VCCP or 1.9k. to 3.3V.
6262_BOOT1
6262_ISEN1
6262_BOOT2
6262_ISEN2
6262_AGND
6262_OCSET
6262_VSUM
SCD22U10V3KX-2GP
SCD22U10V3KX-2GP
6262_VO
Load Line
R226
R226
1 2
0R0603-PAD
0R0603-PAD
DY
DY
R778
R778
1 2
0R3-0-U-GP
0R3-0-U-GP
1 2
C309 SC4D7U6D3V3KX-GP C309 SC4D7U6D3V3KX-GP
R225
R225
1 2
0R0603-PAD
0R0603-PAD
C233 SC1KP25V3MX-GP C233 SC1KP25V3MX-GP
1 2
C259
C259
SCD047U50V3KX-GP
SCD047U50V3KX-GP
1 2
R186
R186
1KR2F-3-GP
1KR2F-3-GP
6262_VO
1 2
R797
R797
1 2
0R0603-PAD
0R0603-PAD
1 2
1 2
R163
R163
1 2
18K7R3F-1-GP
18K7R3F-1-GP
1 2
C260
C260
-1
6262_AGND
VGATE_PWRGD 7,16,48
6262_UGATE1 39
C310
C310
SCD22U25V3ZY-GP
SCD22U25V3ZY-GP
6262_PHASE1 39
6262_LGATE1 39
5V_S5
5V_S0
6262_UGATE2 39
C308
C308
SCD22U25V3ZY-GP
SCD22U25V3ZY-GP
6262_PHASE2 39
6262_LGATE2 39
OCP>=88A
1 2
1 2
R219
R219
11KR2F-L-GP
11KR2F-L-GP
1 2
1 2
Place close to phase 1 chocke
C304
C304
SCD22U10V2KX-1GP
SCD22U10V2KX-1GP
G75
G75
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
2
R182
R182
2K61R3F-GP
2K61R3F-GP
R185
R185
NTC-10K-9-GP
NTC-10K-9-GP
6262_AGND
2
DCBATOUT
SCD22U10V3KX-2GP
SCD22U10V3KX-2GP
SCD22U10V3KX-2GP
SCD22U10V3KX-2GP
C306
C306
C305
C305
<Variant Name>
<Variant Name>
<Variant Name>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
A3
A3
A3
6262_VSUM
1 2
R221
R221
0R2J-2-GP
0R2J-2-GP
DY
DY
1 2
R223 1R3F-GP R223 1R3F-GP
6262_VSUM
1 2
R224
R224
0R2J-2-GP
0R2J-2-GP
DY
DY
1 2
G81
G81
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G80
G80
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G79
G79
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G78
G78
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G26
G26
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G25
G25
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G24
G24
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G23
G23
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
R609 3K65R3F-GP R609 3K65R3F-GP
1 2
1 2
R608 10KR3F-L-GP R608 10KR3F-L-GP
1 2
3K65R3F-GP
3K65R3F-GP
R610
R610
1 2
1 2
R607 10KR3F-L-GP R607 10KR3F-L-GP
1 2
R220 1R3F-GP R220 1R3F-GP
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
CPU Vcore Power_1
CPU Vcore Power_1
CPU Vcore Power_1
AG1
AG1
AG1
1
DCBATOUT_6262
6262_ISENP1 39
6262_ISENN1 39
6262_ISENP2 39
6262_ISENN2 39
38 53 Tuesday, January 10, 2006
38 53 Tuesday, January 10, 2006
38 53 Tuesday, January 10, 2006
1
-1
-1
of
of
of
-1
Page 39
5
4
DCBATOUT_6262
3
2
1
1 2
D D
678
DDD
DDD
U30
U30
IRF7807ZPBF-GP
IRF7807ZPBF-GP
SSS
G D
SSS
G D
4 5
6262_UGATE1 38
6262_PHASE1 38
6262_LGATE1 38
678
DDD
DDD
U28
U28
IRF7805ZPBF-GP
Id=30A
C C
Qg=8~11nC, Rdson=14.4~18mohm
IRF7805ZPBF-GP
G D
G D
4 5
ENG
123
IRF7805ZPBF-GP
IRF7805ZPBF-GP
SSS
SSS
123
U29
U29
678
DDD
DDD
SSS
G D
SSS
G D
123
4 5
C685
C685
1 2
SC10U35V0ZY-1GP
SC10U35V0ZY-1GP
C322
C322
1 2
SC10U35V0ZY-1GP
SC10U35V0ZY-1GP
1 2
ENG
DCBATOUT_6262
C718
C718
1 2
SC10U35V0ZY-1GP
SC10U35V0ZY-1GP
1 2
678
DDD
DDD
U33
U33
IRF7807ZPBF-GP
IRF7807ZPBF-GP
SSS
G D
SSS
G D
4 5
B B
6262_UGATE2 38
6262_PHASE2 38
6262_LGATE2 38
Id=46A
Qg=15~21nC, Rdson=6.9~8.6mohm
IRF7805ZPBF-GP
IRF7805ZPBF-GP
U32
U32
678
DDD
DDD
G D
G D
4 5
ENG
123
IRF7805ZPBF-GP
IRF7805ZPBF-GP
SSS
SSS
123
U35
U35
678
DDD
DDD
SSS
G D
SSS
G D
123
4 5
1 2
C373
C373
SC10U35V0ZY-1GP
SC10U35V0ZY-1GP
L23
L23
1 2
L-D36UH-1-GP
L-D36UH-1-GP
G76
G76
GAP-CLOSE-PWR
GAP-CLOSE-PWR
1 2
C311
C311
SC10U35V0ZY-1GP
SC10U35V0ZY-1GP
1 2
G82
G82
GAP-CLOSE-PWR
GAP-CLOSE-PWR
1 2
EC321
EC321
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
Panasonic ETQP4LR36WFC
10*11.5*4mm
0.34uH / 24A
DCR=1.1mohm
G77
G77
GAP-CLOSE-PWR
GAP-CLOSE-PWR
1 2
6262_ISENN1 38
6262_ISENP1 38
1 2
C717
C717
C372
C372
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
DY
DY
Panasonic ETQP4LR36WFC
SC10U35V0ZY-1GP
SC10U35V0ZY-1GP
10*11.5*4mm
0.34uH / 24A
L27
L27
L-D36UH-1-GP
L-D36UH-1-GP
DCR=1.1mohm
G83
G83
GAP-CLOSE-PWR
GAP-CLOSE-PWR
1 2
1 2
1 2
TC9
TC4
TC4
SE330U2VDM-L2GP
SE330U2VDM-L2GP
TC9
SE330U2VDM-L2GP
SE330U2VDM-L2GP
KEMET
330uF / 3V / V size
ESR=9mohm / Iripple=3.7A
VCC_CORE_S0
Iomax=44A
OCP>=88A
1 2
1 2
TC6
TC6
SE330U2VDM-L2GP
SE330U2VDM-L2GP
1 2
TC5
TC5
SE330U2VDM-L2GP
SE330U2VDM-L2GP
TC7
TC7
1 2
C684
C684
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
DY
DY
SE330U2VDM-L2GP
SE330U2VDM-L2GP
1 2
TC8
TC8
SE330U2VDM-L2GP
SE330U2VDM-L2GP
ENG
A A
5
4
6262_ISENP2 38
6262_ISENN2 38
3
2
<Variant Name>
<Variant Name>
<Variant Name>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
CPU Vcore Power_2
CPU Vcore Power_2
CPU Vcore Power_2
AG1
AG1
AG1
39 53 Tuesday, January 10, 2006
39 53 Tuesday, January 10, 2006
39 53 Tuesday, January 10, 2006
1
of
of
of
SD
SD
SD
Page 40
A
G48
G48
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G49
G49
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G50
G50
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G51
G51
TPS51120_EN1_5 36
TPS51120_EN2_3D3 36
1 2
1 2
51120_V5FILT
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G52
G52
GAP-CLOSE-PWR
GAP-CLOSE-PWR
4 4
DCBATOUT
3 3
2 2
GND
SKIPSEL
COMP
TONSEL
1 1
VFB1
VFB2
EN1,EN2
EN3,EN5 not use
AUTOSKIP
N/A
380k/CH1
590k/CH2
N/A
N/A
Switcher OFF
LDO OFF
A
51120_LL2
51120_LL1
1 2
R352 0R0402-PAD R352 0R0402-PAD
1 2
R356 0R0402-PAD R356 0R0402-PAD
1 2
R664 0R0402-PAD R664 0R0402-PAD
1 2
R665 0R0402-PAD R665 0R0402-PAD
VREF2
AUTOSKIP
/FAULTS
OFF
N/A
290k/CH1
440k/CH2
not use
not use
not use
DCBATOUT_51120
C453
C453
1 2
SCD1U50V3ZY-GP
SCD1U50V3ZY-GP
C456
C456
1 2
SCD1U50V3ZY-GP
SCD1U50V3ZY-GP
TP52 TPAD28 TP52 TPAD28
TP53 TPAD28 TP53 TPAD28
51120_AGND
51120_V5FILT
FLOAT
PWM
CURRENT
MODE
220k/CH1
330k/CH2
ADJ.
ADJ.
Swithchr ON
LDO ON
R354
51120_VREG5
51120_VBST2_1 51120_VBST2
51120_VBST1_1
SC10U10V5KX-2GP
SC10U10V5KX-2GP
1
1
1 2
1 2
1 2
SC10U10V5KX-2GP
SC10U10V5KX-2GP
1 2
C784
C784
51120_EN1
51120_EN2
51120_VFB1
5V_PWR
3D3V_PWR
51120_VREF2
C779
C779
SC1KP25V3MX-GP
SC1KP25V3MX-GP
TPS51120RHBR-GPU1 74.51120.073
TPS51120RHBR-GPU1 74.51120.073
R355
R355
1 2
15KR3F-GP
15KR3F-GP
1 2
R353 20KR3F-GP R353 20KR3F-GP
1 2
5D1R3F-GP
5D1R3F-GP
SC1U10V3KX-3GP
SC1U10V3KX-3GP
R351
R351
0R0603-PAD
0R0603-PAD
R357
R357
0R0603-PAD
0R0603-PAD
51120_VREG5
51120_VREG3
1 2
C783
C783
29
EN1
12
EN2
10
EN3
9
EN5
6
VFB2
3
VFB1
1
VO1
8
VO2
4
VREF2
OCP
R354
SC
V5FILT
PWM
D-Cap
MODE
180k/CH1
280k/CH2
5V
Fixed Output
3.3V
Fixed Output
Switcher ON
VREG3 on
C454
C454
51120_AGND
51120_VBST1
19
21
VREG3
VREG5
PGND2
PGND1
5
17
24
51120_AGND
51120_CS1
51120_CS2
SC390P50V3JN-GP
SC390P50V3JN-GP
SC390P50V3JN-GP
SC390P50V3JN-GP
B
51120_V5FILT
1 2
13
28
20
VBST2
VBST1
GND
GND
23
33
B
DCBATOUT_51120
1 2
C455
C455
SCD1U50V3ZY-GP
SCD1U50V3ZY-GP
51120_COMP2
51120_COMP1
2
7
22
VIN
V5FILT
COMP1
COMP2
CS2
CS1
TONSEL31SKIPSEL
18
32
51120_SKIPSEL
R340
R340
0R0402-PAD
0R0402-PAD
1 2
51120_AGND
51120_COMP1
1 2
C786
C786
DY
DY
51120_AGND
51120_COMP2
1 2
C782
C782
DY
DY
U45
U45
LL2
LL1
PGOOD1
PGOOD2
DRVL1
DRVL2
DRVH1
DRVH2
51120_TONSEL
1 2
R675
R675
22KR2J-GP
22KR2J-GP
DY
DY
1 2
C785
C785
SC1KP25V3MX-GP
SC1KP25V3MX-GP
DY
DY
1 2
R674
R674
22KR2J-GP
22KR2J-GP
DY
DY
1 2
C781
C781
SC1KP25V3MX-GP
SC1KP25V3MX-GP
DY
DY
51120_AGND
51120_V5FILT
R663
R663
1 2
0R0603-PAD
0R0603-PAD
R666
R666
1 2
0R0603-PAD
0R0603-PAD
51120_LL2
15
51120_LL1
26
51120_PGOOD1
30
51120_PGOOD251120_VFB2
11
51120_DRVL1
25
51120_DRVL2
16
51120_DRVH1
27
51120_DRVH2
14
1 2
R341 0R0402-PAD R341 0R0402-PAD
C
DCBATOUT_51120
SC10U35V0ZY-1GP
SC10U35V0ZY-1GP
SC10U35V0ZY-1GP
SC10U35V0ZY-1GP
1 2
1 2
C792
C792
GS 10*10*4 4D7uH
L37
L37
DCR=25mohm, Isat=6A
1 2
IND-4D7UH-85-GP
IND-4D7UH-85-GP
C780
C780
SC33P50V2JN-3GP
SC33P50V2JN-3GP
L36
L36
1 2
IND-3D3UH-43-GP
IND-3D3UH-43-GP
51120_VFB2
51120_VFB1
SC10U35V0ZY-1GP
SC10U35V0ZY-1GP
1 2
C795
C795
C777
C777
DY
DY
DY
DY
SC10U35V0ZY-1GP
SC10U35V0ZY-1GP
1 2
1 2
51120_AGND
C794
C794
1 2
51120_AGND
DCBATOUT_51120
C793
C793
ENG
1 2
R662
R662
30K9R3F-GP
30K9R3F-GP
1 2
Iomax=11A
Qg=9.8nC,
Rdson=20~25mohm
Iomax=11A
Qg=9.8nC,
Rdson=19.6~24mohm
R342
R342
1 2
0R0402-PAD
0R0402-PAD
1 2
R339 0R0402-PAD R339 0R0402-PAD
Iomax=11A
Qg=9.8nC,
Rdson=20~25mohm
51120_VREF2
Iomax=11A
Qg=9.8nC,
Rdson=19.6~24mohm
3D3V_S0
1 2
R338
R338
100KR2J-1-GP
100KR2J-1-GP
CPUCORE_ON 38,41,43,48
51120_DRVH2
51120_LL2
51120_DRVL2
AO4422-1-GP
AO4422-1-GP
51120_DRVH1
51120_LL1
U50
U50
AO4422-1-GP
AO4422-1-GP
51120_DRVL1
AO4422-1-GP
AO4422-1-GP
U48
U48
AO4422-1-GP
AO4422-1-GP
U49
U49
U47
U47
678
DDD
DDD
SSS
G D
SSS
G D
123
4 5
678
DDD
DDD
SSS
G D
SSS
G D
123
4 5
678
DDD
DDD
SSS
G D
SSS
G D
123
4 5
678
DDD
DDD
SC33P50V2JN-3GP
SC33P50V2JN-3GP
SSS
G D
SSS
G D
123
4 5
Vout=1V*(R1+R2)/R2
For TPS51120,
Vout=5V
1. If you use a 6.8uH inductor, the minimum ESR is 70m ohm.
2. If you use a 4.7uH inductor, the minimum ESR is 48m ohm.
3. If you use a 3.3uH inductor, the minimum ESR is 34m ohm.
Vout=3.3V
1. If you use a 4.7uH inductor, the minimum ESR is 51m ohm.
2. If you use a 3.3uH inductor, the minimum ESR is 36m ohm.
3. If you use a 2.5uH inductor, the minimum ESR is 27m ohm.
C
D
1 2
EC470
EC470
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
5V_PWR
1 2
R667
R667
30KR2F-GP
30KR2F-GP
DY
DY
1 2
R668
R668
7K5R3F-GP
7K5R3F-GP
DY
DY
1 2
EC471
EC471
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
3D3V_PWR
1 2
TC12
TC12
ST220U6D3VDM-15GP
ST220U6D3VDM-15GP
DY
DY
NEC 220uF ,V size
ESR=25mohm
Iripple=2.2A
R661
R661
13K3R2F-L1-GP
13K3R2F-L1-GP
DY
DY
D
5V Iomax=6A
OCP>12A
1 2
TC13
TC13
ST220U6D3VDM-15GP
ST220U6D3VDM-15GP
NEC 220uF ,V size
ESR=25mohm
Iripple=2.2A
3D3V Iomax=6A
OCP>12A
<Variant Name>
<Variant Name>
<Variant Name>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet of
Date: Sheet of
E
G33
G33
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G34
G34
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G35
G35
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G36
G36
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G37
G37
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G38
G38
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G39
G39
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G53
G53
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G40
G40
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G41
G41
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G42
G42
3D3V_PWR 3D3V_S5
5V_UP_S5/3D3V_S5/5V_S5
5V_UP_S5/3D3V_S5/5V_S5
5V_UP_S5/3D3V_S5/5V_S5
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G43
G43
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G44
G44
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G45
G45
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G46
G46
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G47
G47
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G104
G104
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
51120_AGND
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
AG1
AG1
AG1
40 53 Tuesday, January 10, 2006
40 53 Tuesday, January 10, 2006
40 53 Tuesday, January 10, 2006
E
5V_S5 5V_PWR
of
-1
-1
-1
Page 41
1D05V_S0/7A
OCP>=14A
1D05V_PWR
U40
U40
AO4422-1-GP
AO4422-1-GP
51124_DRVH2
51124_LL2
U39
U39
AO4422-1-GP
AO4422-1-GP
51124_DRVL2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
678
G D
G D
4 5
678
G D
G D
4 5
G90
G90
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G85
G85
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G92
G92
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G91
G91
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G84
G84
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G87
G87
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G88
G88
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G86
G86
GAP-CLOSE-PWR
GAP-CLOSE-PWR
DDD
DDD
SSS
SSS
123
DDD
DDD
SSS
SSS
123
1D05V_S0
DCBATOUT_51124
1 2
C446
C446
SC10U35V0ZY-1GP
SC10U35V0ZY-1GP
L34
L34
1 2
IND-3D3UH-55-GP
IND-3D3UH-55-GP
51124_VFB2
1 2
DY
DY
C445
C445
SC33P50V3JN-GP
SC33P50V3JN-GP
SC10U35V0ZY-1GP
SC10U35V0ZY-1GP
ENG
ENG
1 2
C880
C880
Vout=0.75V*(R1+R2)/R2
DCBATOUT DCBATOUT_51124
1 2
1 2
1 2
1 2
1 2
1 2
PM_SLP_S5# 16,31,43
PM_SLP_S3# 16,18,30,31,36,43,52
1 2
EC424
EC424
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
1D05V Iomax=7A
OCP>14A
Voutsetting=1.051V
1D05V_PWR
TC10
TC10
30K1R3F-GP
30K1R3F-GP
1 2
R793
R793
75KR3F-GP
75KR3F-GP
1 2
51124_GND
1 2
1 2
SE220U2VDM-8GP
SE220U2VDM-8GP
R794
R794
Panasonic 220uF ESR=15mohm
Iripple=2.7A
G27
G27
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G28
G28
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G29
G29
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G30
G30
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G31
G31
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G32
G32
GAP-CLOSE-PWR
GAP-CLOSE-PWR
SC4D7U10V5ZY-3GP
SC4D7U10V5ZY-3GP
1 2
R785 0R0402-PAD R785 0R0402-PAD
1 2
R787 0R0402-PAD R787 0R0402-PAD
C447
C447
SCD1U50V3ZY-GP
SCD1U50V3ZY-GP
DY
DY
5V_S5
1 2
R782
R782
3D3R3J-L-GP
3D3R3J-L-GP
C874
C874
1 2
1 2
C875
C875
SC1U10V3ZY-6GP
SC1U10V3ZY-6GP
51124_GND
1 2
1 2
DY
DY
C876
C876
SCD01U16V3KX-GP
SCD01U16V3KX-GP
51124_GND 51124_GND
51124_LL1
15
51124_EN1_1
51124_EN2_1
51124_LL1
51124_LL2
DY
DY
C877
C877
SCD01U16V3KX-GP
SCD01U16V3KX-GP
20KR3F-GP
20KR3F-GP
51124_GND 51124_GND
16
23
8
20
11
TPS51124RGER-GPU1
TPS51124RGER-GPU1
51124_TRIP1
1 2
R789
R789
C878
C878
1 2
SCD1U50V3ZY-GP
SCD1U50V3ZY-GP
C879
C879
1 2
SCD1U50V3ZY-GP
SCD1U50V3ZY-GP
DCBATOUT_51124
1D05V_PWR
1D8V_PWR
51124_VFB2
51124_VFB1
U44
U44
V5FILT
V5IN
EN1
EN2
LL1
LL2
51124_TRIP2
1 2
R790
R790
20KR3F-GP
20KR3F-GP
51124_VBST1
51124_VBST2 51124_LL2
2
17
5
VFB1
TRIP1
14
VFB2
TRIP2
1
VO1
VBST1
22
6
9
AO4422-1-GP
AO4422-1-GP
51124_DRVH1
51124_LL1
AO4422-1-GP
AO4422-1-GP
51124_DRVL1
51124_PGD1
51124_PGD2
24
VO2
PGOOD1
VBST2
DRVL119DRVL2
7
12
U43
U43
U42
U42
1 2
R783 0R0402-PAD R783 0R0402-PAD
1 2
R784 0R0402-PAD R784 0R0402-PAD
PGOOD2
4
TONSEL
21
DRVH1
10
DRVH2
18
PGND1
13
PGND2
25
GND
3
GND
51124_DRVL2
51124_DRVL1
678
DDD
DDD
G D
G D
123
4 5
678
DDD
DDD
G D
G D
123
4 5
3D3V_S0
51124_DRVH1
51124_DRVH2
51124_GND
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
SSS
SSS
ENG
K A
DY
DY
D28
D28
SSM24PT-GP
SSM24PT-GP
SSS
SSS
1 2
DY
DY
R781
R781
100KR2J-1-GP
100KR2J-1-GP
51124_TONSEL 51124_V5FILT 51124_V5FILT
1 2
L35
L35
1 2
R779
R779
1 2
R780
R780
51124_GND
R786
R786
1 2
1 2
R788
R788
0R0402-PAD
0R0402-PAD
1 2
DY
DY
SC33P50V3JN-GP
SC33P50V3JN-GP
EC444
EC444
1 2
IND-3D3UH-55-GP
IND-3D3UH-55-GP
39K2R2F-L-GP
39K2R2F-L-GP
51124_VFB1
27KR2F-L-GP
27KR2F-L-GP
CPUCORE_ON 38,40,43,48
51124_GND
1 2
C425
C425
C426
C426
1D8V_PWR
SC10U35V0ZY-1GP
SC10U35V0ZY-1GP
SC10U35V0ZY-1GP
SC10U35V0ZY-1GP
TC11
TC11
1 2
1 2
C873
C873
DY
DY
SE220U2D5VDM-3GP
SE220U2D5VDM-3GP
Panasonic 220uF ESR=15mohm
Iripple=2.7A
10KR2J-3-GP
10KR2J-3-GP
Vtrip(mV)=Rtrip(Kohm)*10(uA)
Iocp=(Vtrip/Rdson)+((1/(2*L*f))*((Vin-Vout)*Vout)/Vin))
TONSEL
GND
230k/CH1
283k/CH2
OPEN
283k/CH1
346k/CH2
V5FILT
346k/CH1
423k/CH2
Voutsetting=1.838V
1D8V Iomax=7A
OCP>14A
1 2
C443
C443
SCD1U50V3ZY-GP
SCD1U50V3ZY-GP
DY
DY
<Variant Name>
<Variant Name>
<Variant Name>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet of
Date: Sheet of
Date: Sheet of
1D8V / 7.0A
OCP>=14A
1D8V_S3
G102
G102
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G98
G98
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G99
G99
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G96
G96
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G100
G100
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G97
G97
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G103
G103
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G101
G101
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G105
G105
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
51124_GND
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
TPS51124 1D8V_S3/1D05V_S0
TPS51124 1D8V_S3/1D05V_S0
TPS51124 1D8V_S3/1D05V_S0
AG1
AG1
AG1
41 53 Tuesday, January 10, 2006
41 53 Tuesday, January 10, 2006
41 53 Tuesday, January 10, 2006
1D8V_PWR
-1
-1
-1
Page 42
5
4
3
2
1
C567
C567
MAX8725_PDS
AD+_TO_SYS
MAX8725_DC_IN
C25
C25
MAX8725_PDS
AD+_TO_SYS
1 2
G57
G57
GAP-CLOSE
GAP-CLOSE
C569
C569
SCD1U50V3KX-GP
SCD1U50V3KX-GP
1 2
U10
U10
27
PDS
24
SRC
1
DCIN
11
VCTL
10
ICTL
7
MODE
3
ACIN
8
IINP
9
CLS
6
ACOK
5
PKPRES
13
CCV
12
CCI
14
CCS
MAX8725ETI-GP-U
MAX8725ETI-GP-U
74.08725.A73
74.08725.A73
SC1U10V3ZY-6GP
SC1U10V3ZY-6GP
1 2
D01R3720F-2-GP
D01R3720F-2-GP
1 2
MAX8725_CSSP
26
CSSP
MAX8725_REF
1 2
C29
C29
R465
R465
G56
G56
GAP-CLOSE
GAP-CLOSE
1 2
C568
C568
MAX8725_CSSN
SCD1U50V3KX-GP
SCD1U50V3KX-GP
1 2
25
CSSN
22
DHIV
28
PDL
2
LDO
21
DLOV
23
DHI
20
DLO
19
PGND
29
PGND
18
CSIP
17
CSIN
16
BATT
15
GND
REF
4
V_REF :4.2235V (<500uA)
1 2
R488
R488
15K4R2F-GP
15K4R2F-GP
MAX8725_CLS
1 2
R490
R490
20KR2F-L-GP
20KR2F-L-GP
AD+
D D
SC1U10V3ZY-6GP
SC1U10V3ZY-6GP
Near MAX1909
Pin 3
SET Vout MAX VCELL= 4.1998V/CELL
C C
VBAT=CELL*VCELL==>VCELL=VBAT/CELL
=VREF+(VVCTL-1.8) /9.52 =4.1998V
CHG_I_PWM 31
B B
CHG_V_PWM 31
5V_AUX_S5
100KR2J-1-GP
100KR2J-1-GP
CHG_4D35V# 31
A A
MAX8725_ACIN
C30
C30
100KR2J-1-GP
100KR2J-1-GP
DY
DY
R503
R503
100KR2J-1-GP
100KR2J-1-GP
1 2
R500
R500
100KR2F-L1-GP
100KR2F-L1-GP
1 2
100KR2F-L1-GP
100KR2F-L1-GP
R17
R17
SA rework 0920
R489
R489
R507
R507
13KR2F-GP
13KR2F-GP
R482
R482
1 2
1 2
1 2
C557
C557
SC1U10V3ZY-6GP
SC1U10V3ZY-6GP
1 2
1
G
G
2 3
100KR2J-1-GP
100KR2J-1-GP
1st BTY
1st BTY
MAX8725_ACOK
5
1 2
1 2
1 2
C549
C549
SCD1U50V3KX-GP
SCD1U50V3KX-GP
AC_IN Threshold 2.089V Max.
AC_IN > 2.089V --> AC DETECT
MAX8725_REF
1 2
1 2
R16
R16
240KR2F-L-GP
240KR2F-L-GP
SC1U10V3 ZY-6GP
SC1U10V3 ZY-6GP
DY
DY
R504
R504
78K7R3F-GP
78K7R3F-GP
D
D
Q38
Q38
2N7002-8-GP
2N7002-8-GP
S
S
MAX1909_LDO
1 2
R713
R713
MAX1909_LDO
1 2
V( MODE ) >=2.8V = 4 Cell
1 2
C558
C558
V( MODE ) = 1.8V = 3 Cell
1 2
R20
R20
1
G
G
Near MAX1909
Pin 1
R19
R19
39KR2F-GP
39KR2F-GP
When V(ICTL)<0.8V or DCIN<7V
-->Charge Disable
20KR2F-L-GP
20KR2F-L-GP
SC1U10V3ZY-6GP
SC1U10V3ZY-6GP
1 2
C28
C28
MAX1909_LDO
5V_AUX_S5
1 2
R468
R468
47KR2J-2-GP
47KR2J-2-GP
1st BTY
1st BTY
D
D
S
S
2 3
84.27002.L04
84.27002.L04
2N7002-8-GP
2N7002-8-GP
Q31
Q31
1st BTY
1st BTY
C26
C26
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
6
D
D
7
D
D
8
D
D
AO4407-1-GP
AO4407-1-GP
C52
C52
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
1 2
R18
R18
10KR2F-2-GP
10KR2F-2-GP
1 2
100KR2J-1-GP
100KR2J-1-GP
BATA_IN# 31,44
1 2
R15
R15
1KR2J-1-GP
1KR2J-1-GP
AC_IN# 31
U61
U61
4 5
GD
GD
3
S
S
2
S
S
1
S
S
SC1U50V5ZY-1-GP
SC1U50V5ZY-1-GP
Near MAX1909
Pin 24
AD+
D12
D12
CH521S-30-GP-U
CH521S-30-GP-U
2 1
1 2
MAX8725_VCTL
MAX8725_ICTL
MAX8725_MODE
MAX8725_ACIN
MAX8725_IINP
MAX8725_CLS
MAX8725_ACOK
R487
R487
CHARGE_ON1#
R22
R22
1 2
1KR2J-1-GP
1KR2J-1-GP
MAX8725_CCV
MAX8725_CCI
MAX8725_CCS
C27 SCD01U50V3KX-4GP C27 SCD01U50V3KX-4GP
SCD01U50V3KX-4GP
SCD01U50V3KX-4GP
4
DCBATOUT
1 2
EC559
EC559
SCD1U50V3KX-GP
SCD1U50V3KX-GP
AD+_TO_SYS
LDO :5.40V (< 5mA)
1 2
C49
C49
SCD1U50V3KX-GP
SCD1U50V3KX-GP
MAX8725_DHIV
MAX8725_DLOV
MAX8725_DHI
MAX8725_DLO
8725_CSIP
8725_CSIN
Pre-CHG_I = 305mA
BATA_CHG_I = (0.075/R477)*(VICTL/3.6)
=3.0A
BATB_CHG_I = (0.075/R477)*(VICTL/3.6)
=2.46A
MAX1909_LDO
Near MAX1909
Pin 2
C51
C51
1 2
SC1U10V3ZY-6GP
SC1U10V3ZY-6GP
R37
R37
33R2J-2-GP
33R2J-2-GP
1 2
1 2
C48
C48
SC1U10V3ZY-6GP
SC1U10V3ZY-6GP
Near MAX1909
Pin 21
ISOURCE_MAX = (0.075/R465)*(VCLS/VREF)
=4.1A
So,Constant Power=19V*4.1A=77.9W
Current limit setting:
85W(85W/20V=4.25A)
3
DCBATOUT
123
4 5
SSGD
S
SSGD
S
DDD
DDD
678
CHG_PWR-2
678
DDD
DDD
SSS
G D
SSS
G D
123
4 5
ID = 10A @
VGS = 10V
U16
U16
S
D
S
1
2
3
4 5
U66
U66
SI4835BDY-T1-GP
SI4835BDY-T1-GP
U65
U65
AO4422-1-GP
AO4422-1-GP
D
S
D
S
D
S
D
S
D
GD
GD
AO4407-1-GP
AO4407-1-GP
1 2
IND-6D8UH-43-GP
IND-6D8UH-43-GP
-1 Modify
2
8
7
6
C31
C31
1 2
SC10U35V0ZY-1GP
SC10U35V0ZY-1GP
L3
L3
G59
G59
GAP-CLOSE
GAP-CLOSE
1 2
C881
C881
SC1KP25V3MX-GP
SC1KP25V3MX-GP
BT+
1 2
EC68
EC68
DY
DY
SCD1U50V3ZY-GP
SCD1U50V3ZY-GP
C32
C32
1 2
SC10U35V0ZY-1GP
SC10U35V0ZY-1GP
CHG_PWR-3
1 2
R477
R477
1 2
D01R3720F-2-GP
D01R3720F-2-GP
1 2
C10
C10
G58
G58
GAP-CLOSE
GAP-CLOSE
1 2
SC10U25V0KX-3GP
SC10U25V0KX-3GP
CHG_PWR-3
1 2
1 2
EC49
EC49
EC50
EC50
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
<Variant Name>
<Variant Name>
<Variant Name>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
CHARGER_MAX8725
CHARGER_MAX8725
CHARGER_MAX8725
A3
A3
A3
AG1
AG1
AG1
1 2
C14
C14
SC10U25V0KX-3GP
SC10U25V0KX-3GP
G15
G15
1 2
GAP-CLOSE
GAP-CLOSE
1
BT+
42 53 Tuesday, January 10, 2006
42 53 Tuesday, January 10, 2006
42 53 Tuesday, January 10, 2006
1 2
C15
C15
1 2
1 2
C24
C24
C13
C13
DY
DY
SC10U35V0ZY-1GP
SC10U25V0KX-3GP
SC10U25V0KX-3GP
of
of
of
SC10U35V0ZY-1GP
SC10U25V0KX-3GP
SC10U25V0KX-3GP
-1
-1
-1
Page 43
A
B
C
D
E
4 4
1D5V_S0
Iomax=4.0A
2D5V
3D3V_S0
Iomax=1A
1 2
C40
C40
SC10U10V5ZY-1GP
U6
U6
9
GND
VOUT
1
VIN
2
BS
3
FB
4
8
NC#8
7
NC#7
6
GND
5
NC#5
APL5332KAC-TRLGP 74.05332.B31
APL5332KAC-TRLGP 74.05332.B31
3 3
Rh/Rl=(Vout/0.8)-1
2 2
5V_S5
PM_SLP_S5# 16,31,41
PM_SLP_S3# 16,18,30,31,36,41,52
DDR_VREF_S3
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 1
C771
C771
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
1 2
C772
C772
DY
DY
SC10U10V5ZY-1GP
Vo (cal.)=2.568V
1 2
R28
R28
2K21R3F-L-GP
2K21R3F-L-GP
1 2
R27
R27
1KR2F-3-GP
1KR2F-3-GP
0D9V
Iomax=1A
1 2
C429
C429
SC1U10V3ZY-6GP
SC1U10V3ZY-6GP
1 2
TPS51100DGQR-GP
TPS51100DGQR-GP
2nd source: 74.02997.079
10
VIN
9
S5
8
GND
7
S3
6
VTTREF
74.51100.079
74.51100.079
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
2D5V_PWR 2D5V_S0
1 2
C432
C432
U74
U74
1
VDDQSNS
2
VLDOIN
3
VTT
4
PGND
5
VTTSNS
GND
11
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
G18
G18
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G17
G17
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G16
G16
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
1D8V_S3
1 2
C774
C774
1 2
0D9V_PWR
1 2
C775
C775
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
TC1
TC1
ST100U4VBM-L1-GP
ST100U4VBM-L1-GP
DDR_VREF_S0
G95
G95
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G94
G94
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G93
G93
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
CPUCORE_ON 38,40,41,48
PM_SLP_S3#
2K2R2F-GP
2K2R2F-GP
-1 Modify
R202
R202
1 2
0R0402-PAD
0R0402-PAD
1D8V_S0
1 2
1 2
R29
R29
Vout=1.8V*R2/(R1+R2)
5V_S5
1 2
C238
C238
SC1U10V3ZY-6GP
SC1U10V3ZY-6GP
6
U22
U22
7
POK
VCNTL
8
APL5912-KAC-GP
APL5912-KAC-GP
74.05912.A71
74.05912.A71
VOUT
EN
VOUT
GND
1
Vo=0.8*(1+(R1/R2))
1D8V_S0
1 2
C565
C565
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
R30
R30
1KR2F-3-GP
1KR2F-3-GP
APL5331_1D2V_VREF
1 2
C76
C76
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
5
VIN
9
VIN
3
4
2
FB
SO-8-P
5V_S5
1 2
C18
C18
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
U7
U7
VIN1VOUT
3
VREF
VCNTL6NC
2
GND
9
GND
1D8V_S3
1 2
C271
C271
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
1 2
5912_FB
R165
R165
1K78R3F-GP
1K78R3F-GP
1 2
R204
R204
2KR2F-3-GP
2KR2F-3-GP
1D2V_S0
Iomax=2A
NC
NC
APL5331KAC-TRLGP
APL5331KAC-TRLGP
74.05331.B31
74.05331.B31
SO-8-P
Vo(cal.)=1.512V
1 2
C239
C239
Vo(cal.)=1.200V
4
8
7
5
1 2
C237
C237
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
DY
DY
1 2
TC3
TC3
ST100U4VBM-L1-GP
ST100U4VBM-L1-GP
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
1 2
TC2
TC2
ST100U4VBM-L1-GP
ST100U4VBM-L1-GP
<Variant Name>
<Variant Name>
<Variant Name>
OCP=6A
1D5V_S0
Trace Length=3cm
Trace Width=5mils
Trace Resistance>80mohm
G20
G20
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G19
G19
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G21
G21
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G22
G22
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
Trace Length=1cm (500mils)
Trace Width=8mils
Trace Resistance>25mohm
1D2V_S0 1D2V_PWR
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
A
B
C
D
Date: Sheet
0D9V/1D2V/1D5V/2D5V
0D9V/1D2V/1D5V/2D5V
0D9V/1D2V/1D5V/2D5V
A3
A3
A3
AG1
AG1
AG1
-1
-1
43 53 Tuesday, January 10, 2006
43 53 Tuesday, January 10, 2006
43 53 Tuesday, January 10, 2006
of
of
E
of
-1
Page 44
5
4
3
2
1
ADAPTER IN CIRCUIT
DCIN1
DCIN1
D D
DC-JACK116-GP
DC-JACK116-GP
22.10037.C61
22.10037.C61
C C
MAIN BATTERY CONNECTOR
BATA_SCL 31
BATA_SDA 31
BATA_IN# 31,42
B B
4
1
2
3
5
6
MH1
AD+_JK
1 2
EC56
EC56
AD_OFF 31
connect to KBC
3D3V_AUX_S5
1 2
R73
R73
100KR2F-L1-GP
100KR2F-L1-GP
BT+
1 2
EC11
EC11
DY
DY
DY
DY
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
EC51
EC51
SCD1U50V3ZY-GP
SCD1U50V3ZY-GP
BAV99PT-GP-U
BAV99PT-GP-U
83.00099.K11
83.00099.K11
1 2
EC10
EC10
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
B
1
D8
D8
1 2
EC9
EC9
DY
DY
1 2
EC55
EC55
SCD1U50V3ZY-GP
SCD1U50V3ZY-GP
B
C
Q5
Q5
CHT2222APT-GP
CHT2222APT-GP
E
2
BAV99PT-GP-U
BAV99PT-GP-U
3
RN8
RN8
1
2 3
SRN33J-5-GP-U
SRN33J-5-GP-U
1 2
C560
C560
SCD1U50V3ZY-GP
SCD1U50V3ZY-GP
SC1KP25V3MX-GP
SC1KP25V3MX-GP
D3
A K
Q32
Q32
R2
R2
E
R1
R1
C
PDTA144EU-1GPU
PDTA144EU-1GPU
1
2
D9
D9
3
DY
DY
4
BATA_DAT_1
330KR2F-L-GP
330KR2F-L-GP
MMPZ5250BPT-GPD3MMPZ5250BPT-GP
1
D10
D10
BAV99PT-GP-U
BAV99PT-GP-U
DY
DY
BATA_CLK_1
1 2
R469
R469
KBC_3D3V_AUX
2
3
C561
C561
DUMMY-C3
DUMMY-C3
1 2
AD+_G
1 2
R470
R470
100KR2F-L1-GP
100KR2F-L1-GP
8
1
2
3
4
5
6
7
9
SYN-CON7-15-GP
SYN-CON7-15-GP
20.80352.007
20.80352.007
1 2
SCD47U50V5ZY
SCD47U50V5ZY
BAT1
BAT1
C550
C550
U62
U62
S
S
1
S
S
2
S
S
3
GD
GD
4 5
AO4407-1-GP
AO4407-1-GP
AD+
D
D
8
D
D
7
D
D
6
A A
5
4
3
2
<Variant Name>
<Variant Name>
<Variant Name>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
AD/BATT CONN
AD/BATT CONN
AD/BATT CONN
A3
A3
A3
AG1
AG1
AG1
44 53 Tuesday, January 10, 2006
44 53 Tuesday, January 10, 2006
44 53 Tuesday, January 10, 2006
of
of
1
of
-1
-1
-1
Page 45
5
PEG_TXP0
PEG_TXN0
PCIE TEST PADS
PCIE TEST POINTS MUST BE WITHIN 250 MILS
OF THE ASIC BALL WITH POSITIVE AND NEGATIVE
SIGNALS THE SAME DISTANCE
D D
TP72 TPAD28 TP72 TPAD28
1
TP73 TPAD28 TP73 TPAD28
1
PEG_RXP[15..0] 7
PEG_RXN[15..0] 7
PEG_TXP[15..0] 7
C C
PEG_TXN[15..0] 7
PEG_RXP[15..0]
PEG_RXN[15..0]
PEG_TXP[15..0]
PEG_TXN[15..0]
PCIE SIGNALS CONNECT TO ROOT COMPLEX
REFER TO PCI EXPRESS DESIGN GUIDE
FOR RECOMMENDED AC COUPLING CAPS
PLACEMENT ALONG THE TX INTERCONNECT
CLK_PCIE_PEG 3
B B
CLK_PCIE_PEG# 3
R111 100R2J-2- GP R111 100R2J-2-GP
PLT_RST1# 7,16,20,26,30,31,32,34,35 GPIO8 46
1 2
1 2
R112
R112
1 2
10KR2F-2-GP
10KR2F-2-GP
CLK_PCIE_PEG
CLK_PCIE_PEG#
PCIE_TEST
C420 SC100P50V2JN-3GP C420 SC100P50V2JN-3GP
PERSTB_MASK
PEG_TXP1
PEG_TXN1
PEG_TXP2
PEG_TXN2
PEG_TXP3
PEG_TXN3
PEG_TXP4
PEG_TXN4
PEG_TXP5
PEG_TXN5
PEG_TXP6
PEG_TXN6
PEG_TXP7
PEG_TXN7
PEG_TXP8
PEG_TXN8
PEG_TXP9
PEG_TXN9
PEG_TXP10
PEG_TXN10
PEG_TXP11
PEG_TXN11
PEG_TXP12
PEG_TXN12
PEG_TXP13
PEG_TXN13
PEG_TXP14
PEG_TXN14
PEG_TXP15
PEG_TXN15
VGA_RST#
AJ31
AH31
AH30
AG30
AG32
AF32
AF31
AE31
AE30
AD30
AD32
AC32
AC31
AB31
AB30
AA30
AA32
Y32
Y31
W31
W30
V30
V32
U32
U31
T31
T30
R30
R32
P32
P31
N31
AL28
AK28
AG24
AA24
AF24
4
U70A
U70A
PCIE_RX0P
PCIE_RX0N
PCIE_RX1P
PCIE_RX1N
PCIE_RX2P
PCIE_RX2N
PCIE_RX3P
PCIE_RX3N
PCIE_RX4P
PCIE_RX4N
PCIE_RX5P
PCIE_RX5N
PCIE_RX6P
PCIE_RX6N
PCIE_RX7P
PCIE_RX7N
PCIE_RX8P
PCIE_RX8N
PCIE_RX9P
PCIE_RX9N
PCIE_RX10P
PCIE_RX10N
PCIE_RX11P
PCIE_RX11N
PCIE_RX12P
PCIE_RX12N
PCIE_RX13P
PCIE_RX13N
PCIE_RX14P
PCIE_RX14N
PCIE_RX15P
PCIE_RX15N
Clock
Clock
PCIE_REFCLKP
PCIE_REFCLKN
PERSTB
PCIE_TEST
PERSTB_MASK
M52P-GP
M52P-GP
PART 1 OF 7
PART 1 OF 7
P
P
C
C
I
I
-
ÂE
E
X
X
P
P
R
R
E
E
S
S
S
S
I
I
N
N
T
T
E
E
R
R
F
F
A
A
C
C
E
E
Tie To VSS
Tie To VSS
M54P:71.0M54P.A0U
M56P:71.0M56P.B0U
PCIE_TX0P
PCIE_TX0N
PCIE_TX1P
PCIE_TX1N
PCIE_TX2P
PCIE_TX2N
PCIE_TX3P
PCIE_TX3N
PCIE_TX4P
PCIE_TX4N
PCIE_TX5P
PCIE_TX5N
PCIE_TX6P
PCIE_TX6N
PCIE_TX7P
PCIE_TX7N
PCIE_TX8P
PCIE_TX8N
PCIE_TX9P
PCIE_TX9N
PCIE_TX10P
PCIE_TX10N
PCIE_TX11P
PCIE_TX11N
PCIE_TX12P
PCIE_TX12N
PCIE_TX13P
PCIE_TX13N
PCIE_TX14P
PCIE_TX14N
PCIE_TX15P
PCIE_TX15N
Calibration
Calibration
PCIE_CALRN
PCIE_CALRP
PCIE_CALI
71.0M52P.00U
71.0M52P.00U
AK27
AJ27
AJ25
AH25
AH28
AG28
AG27
AF27
AF25
AE25
AE28
AD28
AD27
AC27
AC25
AB25
AB28
AA28
AA27
Y27
Y25
W25
W28
V28
V27
U27
U25
T25
T28
R28
R27
P27
AE24
AD24
AB24
C72 SCD1U16V2KX-3GP C72 SCD1U16V2KX-3GP
C73 SCD1U16V2KX-3GP C73 SCD1U16V2KX-3GP
C75 SCD1U16V2KX-3GP C75 SCD1U16V2KX-3GP
C74 SCD1U16V2KX-3GP C74 SCD1U16V2KX-3GP
C117 SCD1U16V2KX-3GP C117 SCD1U16V2KX-3GP
C118 SCD1U16V2KX-3GP C118 SCD1U16V2KX-3GP
C114 SCD1U16V2KX-3GP C114 SCD1U16V2KX-3GP
C113 SCD1U16V2KX-3GP C113 SCD1U16V2KX-3GP
C122 SCD1U16V2KX-3GP C122 SCD1U16V2KX-3GP
C121 SCD1U16V2KX-3GP C121 SCD1U16V2KX-3GP
C115 SCD1U16V2KX-3GP C115 SCD1U16V2KX-3GP
C116 SCD1U16V2KX-3GP C116 SCD1U16V2KX-3GP
C159 SCD1U16V2KX-3GP C159 SCD1U16V2KX-3GP
C161 SCD1U16V2KX-3GP C161 SCD1U16V2KX-3GP
C164 SCD1U16V2KX-3GP C164 SCD1U16V2KX-3GP
C165 SCD1U16V2KX-3GP C165 SCD1U16V2KX-3GP
C170 SCD1U16V2KX-3GP C170 SCD1U16V2KX-3GP
C171 SCD1U16V2KX-3GP C171 SCD1U16V2KX-3GP
C163 SCD1U16V2KX-3GP C163 SCD1U16V2KX-3GP
C162 SCD1U16V2KX-3GP C162 SCD1U16V2KX-3GP
C158 SCD1U16V2KX-3GP C158 SCD1U16V2KX-3GP
C157 SCD1U16V2KX-3GP C157 SCD1U16V2KX-3GP
C167 SCD1U16V2KX-3GP C167 SCD1U16V2KX-3GP
C168 SCD1U16V2KX-3GP C168 SCD1U16V2KX-3GP
C169 SCD1U16V2KX-3GP C169 SCD1U16V2KX-3GP
C166 SCD1U16V2KX-3GP C166 SCD1U16V2KX-3GP
C160 SCD1U16V2KX-3GP C160 SCD1U16V2KX-3GP
C222 SCD1U16V2KX-3GP C222 SCD1U16V2KX-3GP
C221 SCD1U16V2KX-3GP C221 SCD1U16V2KX-3GP
C223 SCD1U16V2KX-3GP C223 SCD1U16V2KX-3GP
C220 SCD1U16V2KX-3GP C220 SCD1U16V2KX-3GP
C219 SCD1U16V2KX-3GP C219 SCD1U16V2KX-3GP
PCIE_CALRN
PCIE_CALRP
PCIE_CALI
FOR M26X
PCIE_CALRN = 100R
PCIE CALRP = 150R
PCIE CALI = 10K
FOR M52P,M54P,M56P
PCIE_CALRN = 2K
PCIE CALRP = 562R
PCIE CALI = 1.47K
VGA THERMAL SENSOR
3
562R3F-GP
562R3F-GP
PEG_RXP0
PEG_RXN0
PEG_RXP1
PEG_RXN1
PEG_RXP2
PEG_RXN2
PEG_RXP3
PEG_RXN3
PEG_RXP4
PEG_RXN4
PEG_RXP5
PEG_RXN5
PEG_RXP6
PEG_RXN6
PEG_RXP7
PEG_RXN7
PEG_RXP8
PEG_RXN8
PEG_RXP9
PEG_RXN9
PEG_RXP10
PEG_RXN10
PEG_RXP11
PEG_RXN11
PEG_RXP12
PEG_RXN12
PEG_RXP13
PEG_RXN13
PEG_RXP14
PEG_RXN14
PEG_RXP15
PEG_RXN15
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
R538 2KR2F-3-GP R538 2KR2F-3-GP
1 2
R133
R133
1 2
R135 1K47R3F-GP R135 1K47R3F-GP
1 2
MEM_ID0
1D2V_S0
23 22 21 20
MEM_ID2
MEM_ID1
11
0
1
1
000
MEM_ID3
0
1 11
0 0
1
1
0
0
0
1 1
0
1
0
0
0
0
0
0
0
0
2
PIN DESCRIPTION OF RECOMMENDED SETTING
STRAP_B_PTX_PWRS_ENB
STRAP_B_PTX_DEEMPH_EN
RSVD
REVERSE LANES
DEBUG ACCESS
STRAP_FORCE_COMPLIANCE
sets the desired PCIE PLL
bandwidth for M5x parts.
COMMON MODE RANGE
RSVD
DEBUG ACCESS
FORCE_COMPLIANCE
ROMIDCFG(3:0) GPIO[9,13:11]
MEMORY APERTURE SIZE
RSVD
NO STRAP FUNCTION
NO STRAP FUNCTION
SIZE
16M*16
VENDOR
Infineon
Hynix
Samsung 0
Samsung
Infineon
Infineon
Hynix
Hynix
MEM
64M
64M 16M*16
128M 16M*16
256M 32M*16
128M 16M*16 x4
256M
128M 16M*16
256M 32M*16
GPIO(3:2)
GPIO4
GPIO5
GPIO6
GPIO8
GPIO[13:11]
MEMID MEM_TYPE
H2SYNC
V2SYNC
GENERICC
PCIE_TEST RSVD
CHIPs
x2
x2
x4
x4
x4 32M*16
x4
x4
GPIO0
GPIO1
(3:0)
1
RECOMMENDED STRAPS
TRANSMITTER POWER SAVINGS ENABLE
- FULL TX OUTPUT SWING
TRANSMITTER DE-EMPHASIS ENABLE
DEPENDS ON PCIE CHIPSET BEING USED
FOR M26X,M5X
INSTALL WITH ATI RS480,RS400,RX480,
RC410,RS482 CHIPSETS
FOR M26X ONLY
DO NOT INSTALL WITH INTEL 915PM CHIPSET
NO ATI FEATURE ENABLED
NOT REVERSED LANE (M26X)
NO DEBUG ACCESS (M52P,M54P,M56P)
DO NOT FORCE COMPLIANCE STATE QUICKLY (M26X)
NO ATI FEATURE ENABLED (M52P,M54P,M56P)
NORMAL RANGE (M26X)
NO ATI FEATURE ENABLED (M52P,M54P,M56P)
NO DEBUG ACCESS (M26X)
DON'T FORCE COMPLIANCE STATE(M52P,M54P,M56P)
SERIAL FLASH ROM TYPE (M26X,M52P,M54P,M56P)
- SERIAL M25P10 ROM
IF NO ROM
GPIO11(M26X) AND GPIO12,13(M52,M54,M56)
SET MEMORY APERTURE SIZE
SEE M26X,M54X,M56X DATA BOOK FOR
MEMORY,FRAME BUFFER APERATURE SETTINGS
MEMORY TYPE AND SPEED SELECT
ATI FEATURE NOT ENABLED (M52P,M54P,M56P)
NO STRAP (M26X)
ATI FEATURE NOT ENABLED (M52P,M54P,M56P)
NO STRAP (M26X)
R64 10KR2J-3-GP R64 10KR2J-3-GP
GPIO0 46
GPIO1 46
GPIO2 46
GPIO3 46
GPIO4 46
GPIO5 46
GPIO6 46
GPIO11 46
GPIO12 46
GPIO13 46
GPIO9 46
MEM_ID3 46
MEM_ID2 46
MEM_ID1 46
MEM_ID0 46
DAC2_HSY 46
DAC2_VSY 46
GENERICC 46
When no ROM is attached, GPIO[9] is set to 0.
GPIO[13:12] is used to select the frame buffer aperture size.
GPIO[13:12] = 00: 128M frame buffer, same as ROM strap 00
GPIO[13:12] = 01: 256M frame buffer, same as ROM strap 01
GPIO[13:12] = 10: 64M frame buffer, same as ROM strap 10
GPIO[13:12] = 11: reserved, same as ROM strap 11
256M
256M
GPIO[9,13:11]=0000 for 128M
128In256
128In256
128Hy256
128Hy256
PCIE_TEST
1 2
R52 10KR2J-3-GP R52 10KR2J-3-GP
1 2
R53 10KR2J-3-GP
R53 10KR2J-3-GP
1 2
DY
DY
R58 10KR2J-3-GP
R58 10KR2J-3-GP
1 2
DY
DY
R49 10KR2J-3-GP
R49 10KR2J-3-GP
1 2
DY
DY
R51 10KR2J-3-GP R51 10KR2J-3-GP
1 2
R56 10KR2J-3-GP
R56 10KR2J-3-GP
1 2
DY
DY
R66 10KR2J-3-GP
R66 10KR2J-3-GP
1 2
DY
DY
R50 10KR2J-3-GP
R50 10KR2J-3-GP
1 2
DY
DY
R54 10KR2J-3-GP
R54 10KR2J-3-GP
1 2
R65 10KR2J-3-GP
R65 10KR2J-3-GP
1 2
DY
DY
R61 10KR2J-3-GP
R61 10KR2J-3-GP
1 2
DY
DY
R59 10KR2J-3-GP
R59 10KR2J-3-GP
1 2
DY
DY
R55 10KR2J-3-GP
R55 10KR2J-3-GP
1 2
DY
DY
R63 10KR2J-3-GP
R63 10KR2J-3-GP
1 2
R60 10KR2J-3-GP
R60 10KR2J-3-GP
1 2
R106 10KR2J-3-GP
R106 10KR2J-3-GP
1 2
DY
DY
R104 10KR2J-3-GP
R104 10KR2J-3-GP
1 2
DY
DY
R537 10KR2J-3-GP
R537 10KR2J-3-GP
1 2
DY
DY
R151 10KR2J-3-GP
R151 10KR2J-3-GP
1 2
DY
DY
INSTALL
10K RESISTOR
DO NOT INSTALL
10K RESISTORS
DO NOT INSTALL
10K RESISTOR
INSTALL
10K RESISTORS
DO NOT INSTALL
10K RESISTORS
DO NOT INSTALL
10K RESISTORS
DO NOT INSTALL
10K RESISTORS
TBD
1011
TBD
TBD
3D3V_S0
A A
Place near GPU
IT IS REQUIRED TO DESIGN IN A THERMAL SENSOR
TO FACILITATE THERMAL EVALUATION AND TO PROTECT THE ASIC
5
4
3
2
<Variant Name>
<Variant Name>
<Variant Name>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
ATI M5X-P PCIE 1/4
ATI M5X-P PCIE 1/4
ATI M5X-P PCIE 1/4
A3
A3
A3
AG1
AG1
AG1
45 53 Tuesday, January 10, 2006
45 53 Tuesday, January 10, 2006
45 53 Tuesday, January 10, 2006
of
of
1
of
SD
SD
SD
Page 46
5
3D3V_S0
R520
R522
R522
DUMMY-R2
DUMMY-R2
R493
R493
0R2J-2-GP
0R2J-2-GP
1 2
R519
R519
1MR2J-1-GP
1MR2J-1-GP
SC27P50V2JN-2-GP
SC27P50V2JN-2-GP
1 2
C580
C580
1 2
R521
R521
1 2
R520
0R2J-2-GP
0R2J-2-GP
DY
DY
0R2J-2-GP
0R2J-2-GP
VGA_XTALIN_1
MB88154_XO
1 2
R114
R114
180R2F-1-GP
180R2F-1-GP
VGA_XTALIN
1 2
R113
R113
147R2F-GP
147R2F-GP
MB88154_XI
1 2
X7
X7
XTAL-27MHZ-31-GP
XTAL-27MHZ-31-GP
MB88154_XO
82.30034.211
82.30034.211
U67
U67
8
SEL1
7
REFOUT
6
SEL0
5
XOUT
MB88154PNF-JN-GP
MB88154PNF-JN-GP
71.88154.A0A
71.88154.A0A
CKOUT
VDD
VSS
VGA_GPIO16
1
3D3V_SS_S0
2
3
MB88154_XI
4
XIN
DVPCNTL,DVPDATA[23..0]
ARE CONFIGURED FOR
+3.3V SIGNALING MODE
ON THIS DESIGN
1 2
D D
1 2
1 2
C579
C579
SC27P50V2JN-2-GP
SC27P50V2JN-2-GP
Modulation Rate
SEL1 SEL0
C C
L
LH
H
H
ANY UNUSED GPIO CAN OPTIONALLY BE
MEMORY TYPE CONFIG STRAPS
499R2F-2-GP
499R2F-2-GP
B B
499R2F-2-GP
499R2F-2-GP
FOR M26X PVDD
CONNECT TO +1.8V
FOR M52P,M54P,M56P
CONNECT TO +2.5V
2D5V_S0
VGA_CORE_S0
FOR M26X MPVDD
CONNECT TO +1.8V
FOR M52P,M54P,M56P
CONNECT TO VDDC
A A
Center
Spread
+-0.5%
L
+-1.0%
+-1.5%
L
No Spread
H
3D3V_S0
1 2
R91
R91
R127
R127
VOLTAGE DIVIDER 3.3V MEM SS
MODOUT TO 1.2V XTALIN/OUT
GPIO8 45
GPIO9 45
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
1 2
C137
C137
PLACE VREF DIVIDER AND CAP CLOSE TO ASIC
R57
R57
1 2
0R0603-PAD
0R0603-PAD
1 2
0R0603-PAD
0R0603-PAD
EDID_DAT 13
EDID_CLK 13
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
R591
R591
3D3V_S0
1 2
R518
R518
0R3-0-U-GP
0R3-0-U-GP
1 2
C576
C576
ANY UNUSED GPIO CAN OPTIONALLY BE
PANEL TYPE CONFIG STRAPS
GPIO_PWRCNTL 52
3D3V_S0
C66
C66
adjust SWING at 1.2v
5
4
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
FOR M26X
CONNECT TO +1.8V OR VSS
TO DEFINE DVO SIGNAL LEVEL
FOR M52P,M54P,M56P
NOT CONNECTED
3D3V_S0
4
RN14
RN14
SRN4K7J-8-GP
SRN4K7J-8-GP
1
2 3
MEM_ID3 45
MEM_ID2 45
MEM_ID1 45
MEM_ID0 45
GPIO0 45
GPIO1 45
GPIO2 45
GPIO3 45
GPIO4 45
GPIO5 45
GPIO6 45
GPIO11 45
GPIO12 45
GPIO13 45
G792_DXP3 19
G792_DXN3 19
1 2
C656
C656
1 2
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
1
TP6 TPAD28 TP6 TPAD28
1 2
1 2
C657
C657
1 2
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
3D3V_S0
4
R484
R484
10KR2J-3-GP
10KR2J-3-GP
VGA_ALERT#
1 2
VGA_PVDD
C98
C98
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
VGA_MPVDD
R132
R132
1KR2J-1-GP
1KR2J-1-GP
R93
R93
1 2
1KR2J-1-GP
1KR2J-1-GP
EDID_DAT
EDID_CLK
POW_SW
VGA_GPIO16
R48 2K2R2J-2-GP R48 2K2R2J-2-GP
VGA_VREF
1 2
C65
C65
SC2200P50V2KX-2GP
SC2200P50V2KX-2GP
VGA_XTALIN
VGA_TESTEN
R94
R94
1 2
10KR2J-3-GP
10KR2J-3-GP
DY
DY
General
General
Purpose
Purpose
I/O
I/O
Thermal
Thermal
Diode
Diode
PLL &
PLL &
XTAL
XTAL
Test
Test
ROM
ROM
3
PART 2 OF 7
PART 2 OF 7
V
V
I
I
D
D
E
E
O
O
&
&
Expand GPIO
Expand GPIO
M
M
U
U
L
L
T
T
I
I
M
M
E
E
D
D
I
I
A
A
VIP Host/External TMDS
VIP Host/External TMDS
External
External
SSC
SSC
LVDS PLL
LVDS PLL
and I/O
and I/O
GND
GND
3
Integrated
Integrated
TMDS
TMDS
TPVDD
TPVSS
TXVDDR_1
TXVDDR_2
TXVDDR_3
TXVDDR_4
TXVSSR_1
TXVSSR_2
TXVSSR_3
TXVSSR_4
TXVSSR_5
DAC / CRT
DAC / CRT
HSYNC
VSYNC
GENERICA
GENERICB
AVDD_1
AVDD_2
AVSSQ
AVSSN_1
AVSSN_2
VDD1DI
VSS1DI
DAC2 (TV/CRT2)
DAC2 (TV/CRT2)
H2SYNC
V2SYNC
R2SET
A2VDD_1
A2VDD_2
A2VSSN_1
A2VSSN_2
NC_A2VDDQ
A2VSSQ
VDD2DI
VSS2DI
Monitor
Monitor
Interface
Interface
DDC1DATA
DDC1CLK
DDC2DATA
DDC2CLK
DDC3DATA
DDC3CLK
GENERICC
LPVSS
LVSSR_10
LVSSR_9
LVSSR_8
TXCM
TXCP
TX0M
TX0P
TX1M
TX1P
TX2M
TX2P
TX3M
TX3P
TX4M
TX4P
TX5M
TX5P
RSET
COMP
HPD1
AL9
AM9
AK10
AL10
AL11
AM11
AL12
AM12
AK9
AJ9
AK11
AJ11
AK12
AJ12
VGA_TPVDD
AM8
AL8
AJ6
AK6
AL6
AM6
AJ7
AK7
AL7
AM7
AK8
AK24
R
AM24
G
AL24
B
AJ23
AJ22
AK22
VGA_GENERICB
AF23
VGA_CRT_RSET
AL22
AL25
AM25
AK23
AK25
AJ24
AM23
AL23
AK15
R2
AM15
G2
AL15
B2
DAC2_HSY
AF15
DAC2_VSY
AG15
AJ15
Y
AJ13
C
AH15
VGA_TV_RSET
AK14
AM16
AL16
AM17
AL17
VGA_A2VDDQ
AL14
AK13
AJ16
C94
C94
AJ17
R743
R743
1 2
AF11
100KR2J-1-GP
100KR2J-1-GP
AH22
AH23
AH13
AG13
AE12
AF12
AE23
AE18
AF22
AF17
AF21
C582
C582
1 2
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
VGA_TXVDDR
C603
C603
1 2
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
VGA_AVDD
VGA_VDD1DI
VGA_A2VDD
VGA_VDD2DI
1 2
C604
C604
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
ATI_HSY 14
ATI_VSY 14
R134 1KR2F-3-GP R134 1KR2F-3-GP
1 2
R105 510R2F-L-GP R105 510R2F-L-GP
1 2
DAC2_HSY 45
DAC2_VSY 45
R102 715R2F-GP R102 715R2F-GP
1 2
1
1 2
C99
C99
SC1U6D3V2K X-GP
SC1U6D3V2KX-GP
SC1U6D3V2ZY-GP
SC1U6D3V2ZY-GP
ATI_DDCDAT 14
ATI_DDCCLK 14
For THERMAL SENSOR
GENERICC 45
FOR M26X GENERICC
NO CONNECT OR
EXT SPREAD SPECTRUM INPUT
FOR M52P,M54P,M56P
IT IS GPIO
U70B
U70B
AG8
GPIO_34
AH7
GPIO_33
AG9
GPIO_32
AH8
GPIO_31
AJ8
GPIO_30
AH9
GPIO_29
AG10
GPIO_28
AF10
GPIO_27
AH6
GPIO_26
AF8
GPIO_25
AF7
GPIO_24
AE9
GPIO_23
AE10
GPIO_22
AG7
GPIO_21
AF9
GPIO_20
AF13
GPIO_19
AE13
GPIO_18
AK4
NC_DVOVMODE_0
AL4
NC_DVOVMODE_1
AF2
DVPCNTL_0
AF1
DVPCNTL_1
AF3
DVPCNTL_2
AG1
DVPCLK
AG2
DVPDATA_0
AG3
DVPDATA_1
AH2
DVPDATA_2
AH3
DVPDATA_3
AJ2
DVPDATA_4
AJ1
DVPDATA_5
AK2
DVPDATA_6
AK1
DVPDATA_7
AK3
DVPDATA_8
AL2
DVPDATA_9
AL3
DVPDATA_10
AM3
DVPDATA_11
AE6
DVPDATA_12
AF4
DVPDATA_13
AF5
DVPDATA_14
AG4
DVPDATA_15
AJ3
DVPDATA_16
AH4
DVPDATA_17
AJ4
DVPDATA_18
AG5
DVPDATA_19
AH5
DVPDATA_20
AF6
DVPDATA_21
AE7
DVPDATA_22
AG6
DVPDATA_23
AD4
GPIO_0
AD2
GPIO_1
AD1
GPIO_2
AD3
GPIO_3
AC1
GPIO_4
AC2
GPIO_5
AC3
GPIO_6
AB2
GPIO_7_BLON
AC6
GPIO_8
AC5
GPIO_9
AC4
GPIO_10
AB3
GPIO_11
AB4
GPIO_12
AB5
GPIO_13
AD5
GPIO_14
AB8
GPIO_15
AA8
GPIO_16
AB7
GPIO_17
AB6
NC_AB6
AC8
VREFG
AG12
DPLUS
AH12
DMINUS
AJ14
PVDD
AH14
PVSS
A6
MPVDD
A5
MPVSS
AL26
1
AM26
AG14
AG22
AC7
AK17
AJ19
AF18
AH17
AG17
AG19
AH19
M52P-GP
M52P-GP
XTALIN
XTALOUT
PLLTEST
TESTEN
ROMCSb
LVSSR_1
LVSSR_2
LVSSR_3
LVSSR_4
LVSSR_5
LVSSR_6
LVSSR_7
LVDS PLL
LVDS PLL
and I/O
and I/O
GND
GND
TP71 TPAD28 TP71 TPAD28
C581
C581
1 2
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
C107
C107
1 2
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
1 2
C103
C103
C101
C101
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
TP70 TPAD28 TP70 TPAD28
C100
C100
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
2
DUAL LINK IS
ONLY SUPPORTED ON M56P
DO NOT CONNECT TXM,P[3:5]
WITH M52P,M54P,M26X
R524
R524
1 2
0R0603-PAD
0R0603-PAD
1 2
R539
R539
1 2
HCB1608KF121T30-GP
HCB1608KF121T30-GP
C104
C104
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
1 2
C106
C106
SC1U6D3V2K X-GP
SC1U6D3V2KX-GP
DAC2 CAN BE TV SIGNALS OR SECONDARY CRT
SC1U6D3V2ZY-GP
SC1U6D3V2ZY-GP
SIGNALS AS CONTROLLED BY AN INTERNAL MUX
R103
R103
C102
C102
1 2
1 2
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
R62
R62
0R3-0-U-GP
1 2
0R3-0-U-GP
R523
R523
0R0603-PAD
0R0603-PAD
R108
R108
1 2
0R0603-PAD
0R0603-PAD
2D5V_S0
0R3-0-U-GP
0R3-0-U-GP
2D5V_S0
2D5V_S0
2D5V_S0
2D5V_S0
2D5V_S0
TV
For CRT
For DVI
2
<Variant Name>
<Variant Name>
<Variant Name>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
ATI M5X-P IO 2/4
ATI M5X-P IO 2/4
ATI M5X-P IO 2/4
A3
A3
A3
1 2
1 2
R110 150R2F-1-GP R110 150R2F-1-GP
12
1 2
R101 150R2F-1-GPTVR101 150R2F-1-GP
TV
AG1
AG1
AG1
1
FOR M26X TPVDD
CONNECT TO +1.8V
FOR M52P,M54P,M56P
CONNECT TO +2.5V
FOR M26X TXVDDR
CONNECT TO +1.8V
FOR M52P,M54P,M56P
CONNECT TO +2.5V
ATI_RED 14
ATI_GREEN 14
1 2
R109 150R2F-1-GP R109 150R2F-1-GP
R107 150R2F-1-GP R107 150R2F-1-GP
12
R98 150R2F-1- GPTVR98 150R2F-1- GP
R100 150R2F-1-GPTVR100 150R2F-1-GP
TV
ATI_BLUE 14
FOR M26X AVDD
CONNECT TO +1.8V
FOR M52P,M54P,M56P
CONNECT TO +2.5V
FOR M26X VDD1DI
CONNECT TO +1.8V
FOR M52P,M54P,M56P
CONNECT TO +2.5V
ATI_TV_LUMA 14
ATI_TV_CRMA 14
ATI_TV_COMP 14
FOR M26X A2VDDQ
CONNECT TO +1.8V
FOR M52P,M54P,M56P
IT IS NO CONNECT
FOR M26X VDD2DI
CONNECT TO +1.8V
FOR M52P,M54P,M56P
CONNECT TO +2.5V
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
46 53 Tuesday, January 10, 2006
46 53 Tuesday, January 10, 2006
46 53 Tuesday, January 10, 2006
1
-1M
-1M
of
of
of
-1M
Page 47
5
U70C
U70C
Part 3 of 7
Part 3 of 7
M31
DQA_0
M30
DQA_1
D D
C C
B B
A A
L31
DQA_2
L30
DQA_3
H30
DQA_4
G31
DQA_5
G30
DQA_6
F31
DQA_7
M27
DQA_8
M29
DQA_9
L28
DQA_10
L27
DQA_11
J27
DQA_12
H29
DQA_13
G29
DQA_14
G27
DQA_15
M26
DQA_16
L26
DQA_17
M25
DQA_18
L25
DQA_19
J25
DQA_20
G28
DQA_21
H27
DQA_22
H26
DQA_23
F26
DQA_24
G26
DQA_25
H25
DQA_26
H24
DQA_27
H23
DQA_28
H22
DQA_29
J23
DQA_30
J22
DQA_31
E23
DQA_32
D22
DQA_33
D23
DQA_34
E22
DQA_35
E20
DQA_36
F20
DQA_37
D19
DQA_38
D18
DQA_39
B19
DQA_40
B18
DQA_41
C17
DQA_42
B17
DQA_43
C14
DQA_44
B14
DQA_45
C13
DQA_46
B13
DQA_47
D17
DQA_48
E18
DQA_49
E17
DQA_50
F17
DQA_51
E15
DQA_52
E14
DQA_53
F14
DQA_54
D13
DQA_55
H18
DQA_56
H17
DQA_57
G18
DQA_58
G17
DQA_59
G15
DQA_60
G14
DQA_61
H14
DQA_62
J14
DQA_63
C31
MVREFD_0
C30
MVREFS_0
M52P-GP
M52P-GP
PLACE MVREF DIVIDERS
AND CAPS CLOSE TO ASIC
5
MEMORY INTERFACE A
MEMORY INTERFACE A
MAA_0
MAA_1
MAA_2
MAA_3
MAA_4
MAA_5
MAA_6
MAA_7
MAA_8
MAA_9
MAA_10
MAA_11
MAA_12
MAA_13
MAA_14
MAA_15
DQMAb_0
DQMAb_1
DQMAb_2
DQMAb_3
DQMAb_4
DQMAb_5
DQMAb_6
DQMAb_7
QSA_0
QSA_1
QSA_2
QSA_3
QSA_4
QSA_5
QSA_6
QSA_7
QSA_0B
QSA_1B
QSA_2B
QSA_3B
QSA_4B
QSA_5B
QSA_6B
QSA_7B
write strobe read strobe
write strobe read strobe
ODTA
ODTA1
CLKA0
CLKA0b
CKEA0
RASA0b
CASA0b
WEA0b
CSA0b_0
CSA0b_1
CLKA1
CLKA1b
CKEA1
RASA1b
CASA1b
WEA1b
CSA1b_0
CSA1b_1
D26
F28
D28
D25
E24
E26
D27
F25
C26
B26
D29
B27
E27
E29
B25
C25
H31
J29
J26
G23
E21
B15
D14
J17
J31
K29
K25
F23
D20
B16
D16
H15
K31
K28
K26
G24
D21
C16
D15
J15
F29
D24
D31
E31
B30
B28
C29
B31
B29
C28
B20
C19
C22
B24
B22
B21
B23
C23
4
Ch-A
FOR M52P,M54P,M26X
PIN B25 IS MA12 (BA0)
PIN C25 IS MA13 (BA1)
PIN E29 IS MA15 (BA2)
PIN E27 IS MA14
FOR M56P
PIN B25 IS MA14 (BA0)
PIN C25 IS MA15 (BA1)
PIN E29 IS MA13 (BA2)
PIN E27 IS MA12
1D8V_S0
1 2
R581
R581
100R2F-L1-GP-U
100R2F-L1-GP-U
C666
C666
SCD1U10V2KX-4GP
1 2
4
SCD1U10V2KX-4GP
1 2
R590
R590
100R2F-L1-GP-U
100R2F-L1-GP-U
1D8V_S0
1 2
R580
R580
100R2F-L1-GP-U
100R2F-L1-GP-U
1 2
R589
R589
100R2F-L1-GP-U
100R2F-L1-GP-U
4
RN15
RN15
SRN4K7J-8-GP
SRN4K7J-8-GP
1
2 3
C665
C665
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
PLACE MVREF DIVIDERS
AND CAPS CLOSE TO ASIC
MDB0
MDB1
MDB2
MDB3
MDB4
MDB5
MDB6
MDB7
MDB8
MDB9
MDB10
MDB11
MDB12
MDB13
MDB14
MDB15
MDB16
MDB17
MDB18
MDB19
MDB20
MDB21
MDB22
MDB23
MDB24
MDB25
MDB26
MDB27
MDB28
MDB29
MDB30
MDB31
MDB32
MDB33
MDB34
MDB35
MDB36
MDB37
MDB38
MDB39
MDB40
MDB41
MDB42
MDB43
MDB44
MDB45
MDB46
MDB47
MDB48
MDB49
MDB50
MDB51
MDB52
MDB53
MDB54
MDB55
MDB56
MDB57
MDB58
MDB59
MDB60
MDB61
MDB62
MDB63
MVREFD1
MVREFS1
3
G12
G11
AA3
AA5
AA2
AA7
1 2
3
U70D
U70D
B12
DQB_0
C12
DQB_1
B11
DQB_2
C11
DQB_3
C8
DQB_4
B7
DQB_5
C7
DQB_6
B6
DQB_7
F12
DQB_8
D12
DQB_9
E11
DQB_10
F11
DQB_11
F9
DQB_12
D8
DQB_13
D7
DQB_14
F7
DQB_15
DQB_16
DQB_17
H12
DQB_18
H11
DQB_19
H9
DQB_20
E7
DQB_21
F8
DQB_22
G8
DQB_23
G6
DQB_24
G7
DQB_25
H8
DQB_26
J8
DQB_27
K8
DQB_28
L8
DQB_29
K9
DQB_30
L9
DQB_31
K5
DQB_32
L4
DQB_33
K4
DQB_34
L5
DQB_35
N5
DQB_36
N6
DQB_37
P4
DQB_38
R4
DQB_39
P2
DQB_40
R2
DQB_41
T3
DQB_42
T2
DQB_43
W3
DQB_44
W2
DQB_45
Y3
DQB_46
Y2
DQB_47
T4
DQB_48
R5
DQB_49
T5
DQB_50
T6
DQB_51
V5
DQB_52
W5
DQB_53
W6
DQB_54
Y4
DQB_55
R8
DQB_56
T8
DQB_57
R7
DQB_58
T7
DQB_59
V7
DQB_60
W7
DQB_61
W8
DQB_62
W9
DQB_63
B3
MVREFD_1
C3
MVREFS_1
DRAM_RST
TEST_MCLK
TEST_YCLK
MEMTEST
R714
R714
243R3F-GP
243R3F-GP
SC Modify
M52P-GP
M52P-GP
Part 4 of 7
Part 4 of 7
G4
MAB_0
E6
MAB_1
E4
MAB_2
H4
MAB_3
J5
MAB_4
G5
MAB_5
F4
MAB_6
H6
MAB_7
G3
MAB_8
G2
MAB_9
D4
MAB_10
F2
MAB_11
F5
MAB_12
D5
MAB_13
H2
MAB_14
H3
MAB_15
B8
DQMBb_0
D9
DQMBb_1
G9
DQMBb_2
K7
DQMBb_3
M5
DQMBb_4
V2
DQMBb_5
W4
DQMBb_6
T9
DQMBb_7
MEMORY INTERFACE B
MEMORY INTERFACE B
B9
QSB_0
D10
QSB_1
H10
QSB_2
K6
QSB_3
N4
QSB_4
U2
QSB_5
U4
QSB_6
V8
QSB_7
B10
QSB_0B
E10
QSB_1B
G10
QSB_2B
J7
QSB_3B
M4
QSB_4B
U3
QSB_5B
V4
QSB_6B
V9
QSB_7B
write strobe read strobe
write strobe read strobe
ODTB
ODTB1
CLKB0
CLKB0b
CKEB0
RASB0b
CASB0b
WEB0b
CSB0b_0
CSB0b_1
CLKB1
CLKB1b
CKEB1
RASB1b
CASB1b
WEB1b
CSB1b_0
CSB1b_1
D6
J4
B4
B5
C2
E2
D3
B2
D2
E3
N2
P3
L3
J2
L2
M2
K2
K3
2
MAB0
MAB1
MAB2
MAB3
MAB4
MAB5
MAB6
MAB7
MAB8
MAB9
MAB10
MAB11
DQMB#0
DQMB#1
DQMB#2
DQMB#3
DQMB#4
DQMB#5
DQMB#6
DQMB#7
RDQSB0
RDQSB1
RDQSB2
RDQSB3
RDQSB4
RDQSB5
RDQSB6
RDQSB7
WDQSB0
WDQSB1
WDQSB2
WDQSB3
WDQSB4
WDQSB5
WDQSB6
WDQSB7
ODTB0
ODTB1
CLKB0
CLKB0#
CKEB0
RASB0#
CASB0#
WEB0#
CSB0_0#
CSB0_1#
CLKB1
CLKB1#
CKEB1
RASB1#
CASB1#
WEB1#
CSB1_0#
CSB1_1#
2
1
Ch-B
FOR M52P,M54P,M26X
PIN H2 IS MAB12 (BA0)
PIN H3 IS MAB13 (BA1)
PIN D5 IS MAB15 (BA2)
PIN F5 IS MAB14
FOR M56P
PIN H2 IS MA14 (BA0)
PIN H3 IS MA15 (BA1)
PIN D5 IS MA13 (BA2)
PIN F5 IS MAB12
MAB12_14 50,51
TP10 TPAD28 TP10 TPAD28
1
B_BA0 50,51
B_BA1 50,51
RASB0# 50
RASB1# 50,51
CASB0# 50
CASB1# 50,51
WEB0# 50
WEB1# 50,51
CSB0_0# 50
CSB1_0# 50,51
CKEB0 50
CKEB1 50,51
For GDDR2
ODTB0 50
ODTB1 50,51
TP9 TPAD28 TP9 TPAD28
1
TP8 TPAD28 TP8 TPAD28
1
<Variant Name>
<Variant Name>
<Variant Name>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
ATI M5X-P MEM 3/4
ATI M5X-P MEM 3/4
ATI M5X-P MEM 3/4
A3
A3
A3
CLKB0 50
CLKB0# 50
CLKB1 51
CLKB1# 51
RDQSB[7..0] 50,51
DQMB#[7..0] 50,51
MDB[63..0] 50,51
MAB[11..0] 50,51
WDQSB[7..0] 50,51
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
AG1
AG1
AG1
1
47 53 Tuesday, January 10, 2006
47 53 Tuesday, January 10, 2006
47 53 Tuesday, January 10, 2006
RASB0#
RASB1#
CASB0#
CASB1#
WEB0#
WEB1#
CSB0_0#
CSB1_0#
CKEB0
CKEB1
CLKB0
CLKB0#
CLKB1
CLKB1#
RDQSB[7..0]
DQMB#[7..0]
MDB[63..0]
MAB[11..0]
WDQSB[7..0]
of
of
of
SC
SC
SC
Page 48
5
U70F
U70F
AH27
PCIE_VSS_1
AC23
PCIE_VSS_2
AL27
PCIE_VSS_3
R23
PCIE_VSS_4
P25
PCIE_VSS_5
R25
PCIE_VSS_6
T26
PCIE_VSS_7
U26
PCIE_VSS_8
W26
PCIE_VSS_9
D D
C C
B B
A A
AB26
AC26
AD25
AE26
AF26
AD26
AG25
AH26
AC28
AH29
AF28
AC29
AB27
AK29
AA29
AB29
AD29
AE29
AF29
AG29
AK26
AK30
AG26
AF30
AC30
AA31
AD31
AK32
AK31
AA23
AG31
AB23
AC24
AH24
AA25
AA26
AE27
AD10
AF14
AG11
AG16
W27
AJ26
AJ32
W29
AJ29
AJ28
AJ30
W24
W23
AM2
Y26
Y28
U28
P28
V29
V26
P26
P29
R29
T29
U29
Y29
N30
R31
V31
P30
U30
Y30
N24
P24
R24
T24
U24
V24
Y24
V25
R26
T27
B1
H1
L1
P1
U1
Y1
AD7
AE8
AL1
A2
E8
H5
K10
M8
T10
E12
AC9
AD8
C5
F10
J3
L6
M6
P6
AA4
V3
R3
C6
C9
F6
H7
J6
PCIE_VSS_10
PCIE_VSS_11
PCIE_VSS_12
PCIE_VSS_13
PCIE_VSS_14
PCIE_VSS_15
PCIE_VSS_16
PCIE_VSS_17
PCIE_VSS_18
PCIE_VSS_19
PCIE_VSS_20
PCIE_VSS_21
PCIE_VSS_22
PCIE_VSS_23
PCIE_VSS_24
PCIE_VSS_25
PCIE_VSS_26
PCIE_VSS_27
PCIE_VSS_28
PCIE_VSS_29
PCIE_VSS_30
PCIE_VSS_31
PCIE_VSS_32
PCIE_VSS_33
PCIE_VSS_34
PCIE_VSS_35
PCIE_VSS_36
PCIE_VSS_37
PCIE_VSS_38
PCIE_VSS_39
PCIE_VSS_40
PCIE_VSS_41
PCIE_VSS_42
PCIE_VSS_43
PCIE_VSS_44
PCIE_VSS_45
PCIE_VSS_46
PCIE_VSS_47
PCIE_VSS_48
PCIE_VSS_49
PCIE_VSS_50
PCIE_VSS_51
PCIE_VSS_52
PCIE_VSS_53
PCIE_VSS_54
PCIE_VSS_55
PCIE_VSS_56
PCIE_VSS_57
PCIE_VSS_58
PCIE_VSS_59
PCIE_VSS_60
PCIE_VSS_61
PCIE_VSS_62
PCIE_VSS_63
PCIE_VSS_64
PCIE_VSS_65
PCIE_VSS_66
PCIE_VSS_67
PCIE_VSS_68
PCIE_VSS_69
PCIE_VSS_70
PCIE_VSS_71
PCIE_VSS_72
PCIE_VSS_73
PCIE_VSS_74
PCIE_VSS_75
PCIE_VSS_76
PCIE_VSS_77
PCIE_VSS_78
PCIE_VSS_79
PCIE_VSS_80
PCIE_VSS_81
PCIE_VSS_82
PCIE_PVSS
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
M52P-GP
M52P-GP
Part 6 of 7
Part 6 of 7
PCI-Express GND
PCI-Express GND
CORE GND
CORE GND
5
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98
VSS_99
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
VSS_146
VSS_147
VSS_148
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_154
VSS_155
VSS_156
VSS_157
VSS_158
VSS_159
AD16
AA6
P7
P5
M3
M9
L7
M7
AD17
AH11
A8
U7
C10
E9
F3
J9
N7
N3
Y5
AM13
AC10
Y6
U6
E5
AL13
A11
U8
U9
U10
R6
AD6
V6
AD14
AD13
D11
J12
K12
A13
F13
E13
F15
K16
J21
H16
T15
V17
C15
C4
U14
P15
A16
E16
G13
G16
P17
R16
R14
W16
C18
F16
W18
U18
AE16
AE17
A19
H32
F19
G19
N8
Y7
T19
V19
G21
C21
F21
AE14
AK16
U5
F22
F18
K30
C24
F24
M24
A25
D30
E25
G25
G20
G22
F27
E28
H21
C27
E32
H28
J30
K17
K27
M32
A22
C20
E19
H20
J24
M28
J28
J16
F30
L29
A31
B32
E30
AE15
AG23
AD9
AF16
AH10
AJ10
AD15
AH16
K23
4
1D8V_S0
1 2
C253
C253
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
1 2
1 2
C196
C196
C250
C250
C211
C211
SCD01U25 V2KX-3GP
SCD01U25V2KX-3GP
1 2
1 2
C215
C215
C199
C199
C214
C214
SCD01U25 V2KX-3GP
SCD01U25V2KX-3GP
VGA_VDDR3
VDDR4 AND VDDR5
IN M26X CAN BE 1.8V OR 3.3V
DEPENDING ON M26X DVOMODE
OR M52P,M54P,M56P REGISTER
CONFIGURATION
1D8V_S0
DY
DY
SI2301BDS-T1-GP
SI2301BDS-T1-GP
G
G
4
R536
R536
1 2
0R0603-PAD
0R0603-PAD
R92
R92
1 2
0R0603-PAD
0R0603-PAD
R166
R166
0R3-0-U-GP
0R3-0-U-GP
Q10
Q10
D
D
1
R167
R167
1 2
0R0402-PAD
0R0402-PAD
1 2
0R2J-2-GP
0R2J-2-GP
1 2
C141
C141
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2ZY-GP
SC1U6D3V2ZY-GP
SC1U6D3V2ZY-GP
SC1U6D3V2ZY-GP
R172
R172
1 2
0R0603-PAD
0R0603-PAD
R171
R171
1 2
0R0603-PAD
0R0603-PAD
1 2
S D
G
PWROK#
Q11
Q11
2N7002-8-GP
2N7002-8-GP
2 3
S
S
R206
R206
DY
DY
1 2
C95
C95
1 2
C91
C91
R205
R205
100KR2J-1-GP
100KR2J-1-GP
1 2
VGATE_PWRGD 7,16,38
CPUCORE_ON 38,40,41,43
1 2
1 2
C203
C203
C180
C180
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
1 2
1 2
C658
C658
SCD01U25 V2KX-3GP
SCD01U25V2KX-3GP
SCD01U25 V2KX-3GP
SCD01U25V2KX-3GP
1 2
1 2
SCD01U25 V2KX-3GP
SCD01U25V2KX-3GP
SCD01U25 V2KX-3GP
SCD01U25V2KX-3GP
1 2
C139
C139
1 2
C96
C96
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
VGA_VDDRH0
VGA_VDDRH1
3D3V_S0
U70E
U70E
-1 Modify
C1
VDDR1_1
AA1
P10
Y10
A21
SCD01U25 V2KX-3GP
SCD01U25V2KX-3GP
M10
N10
K21
A12
H13
A15
K11
K19
A18
L23
K20
K24
L24
H19
A24
K13
A30
C32
F32
L32
AB9
AB10
AA9
AC19
AD18
AC20
AD19
AD20
AJ5
AM5
AL5
AK5
AE2
AE3
AE4
AE5
A27
A28
R148
R148
1 2
0R2J-2-GP
0R2J-2-GP
R149
R149
1 2
0R2J-2-GP
0R2J-2-GP
2D5V_S0
1 2
C195
C195
SC1U6D3V2ZY-GP
SC1U6D3V2ZY-GP
J1
VDDR1_2
M1
VDDR1_3
R1
VDDR1_4
V1
VDDR1_5
VDDR1_6
A3
VDDR1_7
P9
VDDR1_8
J10
VDDR1_9
N9
VDDR1_10
VDDR1_11
A9
VDDR1_12
VDDR1_13
P8
VDDR1_14
R9
VDDR1_15
Y9
VDDR1_16
J11
VDDR1_17
VDDR1_18
VDDR1_20
VDDR1_21
Y8
VDDR1_22
J18
VDDR1_23
J19
VDDR1_24
VDDR1_25
VDDR1_26
VDDR1_27
VDDR1_28
J20
VDDR1_29
J13
VDDR1_30
VDDR1_31
VDDR1_32
VDDR1_33
VDDR1_34
VDDR1_35
VDDR1_36
VDDR1_37
VDDR1_38
VDDR1_39
VDDR1_40
J32
VDDR1_41
VDDR1_42
VDDR1_43
VDDR1_45
VDDR1_46
VDDR3_1
VDDR3_2
VDDR3_3
VDDR3_4
VDDR3_5
VDDR3_6
VDDR3_7
VDDR3_8
VDDR4_1
VDDR4_2
VDDR4_3
VDDR4_4
VDDR5_1
VDDR5_2
VDDR5_3
VDDR5_4
VDDRH0
F1
VDDRH1
VSSRH0
E1
VSSRH1
M52P-GP
M52P-GP
VGA_BBN
VGA_BBP
1 2
C194
C194
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
1 2
1 2
C252
C252
C246
C246
SCD01U25 V2KX-3GP
SCD01U25V2KX-3GP
SCD01U25 V2KX-3GP
SCD01U25V2KX-3GP
TC19
TC19
ST100U6D3VDM-5
ST100U6D3VDM-5
C138
C138
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
VGA_VDDR5
1 2
C93
C93
1 2
C251
C251
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
1 2
C244
C244
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
M56P
M56P
VGA_CORE_S0
M56P
M56P
BACK BIASING APPLIES TO M56P ONLY
IF BACK BIAS NOT USED ON M56,CONNECT
BBN PINS TO VSS AND BBP PINS TO VDDC
BBN,BBP PINS ARE NO CONNECT FOR
M26X,M54P,M52P
3
PART 5 OF 7
PART 5 OF 7
Memory I/O
Memory I/O
P
P
O
O
W
W
E
E
R
R
I/0
I/0
Memory
I/O
Clock
Memory
I/O
Clock
U70G
U70G
Forward
Forward
Compatibility
Compatibility
Y23
BBN_4
K15
BBN_3
R10
BBN_2
AC17
BBN_1
AC14
BBP_4
M23
BBP_3
V10
BBP_2
K18
BBP_1
L10
VDD25_4
VDD25_5
VDD25_6
M52P-GP
M52P-GP
This channel is
used as the
transmitting
channel in single
channel LVDS mode.
K22
AA10
C210
C210
C142
C142
CONNECT THESE VDD25 PINS TO 2.5V FOR M52P,M54P,M56P
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
1 2
THESE VDD25 PINS ARE NO CONNECT FOR M26X
3
PCIE_PVDD_12_1
PCIE_PVDD_12_2
PCIE_PVDD_12_3
PCIE_PVDD_12_4
PCIE_VDDR_12_10
PCIE_VDDR_12_11
PCIE_VDDR_12_12
PCIE_VDDR_12_13
PCIE_VDDR_12_14
PCIE_VDDR_12_1
PCIE_VDDR_12_2
PCIE_VDDR_12_3
PCIE_VDDR_12_4
PCIE_VDDR_12_5
PCIE_VDDR_12_6
PCIE_VDDR_12_7
PCIE_VDDR_12_8
PCI-Express
PCI-Express
PCIE_VDDR_12_9
VDDC_10
VDDC_11
VDDC_12
VDDC_13
VDDC_14
VDDC_15
VDDC_16
VDDC_17
VDDC_18
VDDC_19
VDDC_20
VDDC_21
VDDC_22
VDDC_23
VDD25_1
VDD25_2
VDD25_3
VDDCI_1
VDDCI_2
VDDCI_3
VDDCI_4
VDDCI_5
VDDCI_6
VDDCI_7
LPVDD/VDDL0
LVDDR/VDDL0_1
LVDDR/VDDL0_2
LVDDR/VDDL0_3
LVDDR/VDDL1_1
LVDDR/VDDL1_2
LVDDR/VDDL1_3
LVDDR/VDDL2_1
LVDDR/VDDL2_2
LVDDR/VDDL2_3
LVDS PLL, I/O I/O Internal Core
LVDS PLL, I/O I/O Internal Core
PART 7 OF 7
PART 7 OF 7
Control and External SSC
Control and External SSC
Only used in
dual-channel
LVDS mode.
LVDS channel
LVDS channel
VDDC_1
VDDC_2
VDDC_3
VDDC_4
VDDC_5
VDDC_6
VDDC_7
VDDC_8
VDDC_9
VDDPLL
VARY_BL
DIGON
GENERICD
TXCLK_UP
TXCLK_UN
TXOUT_U3P
TXOUT_U3N
TXOUT_U2P
TXOUT_U2N
TXOUT_U1P
TXOUT_U1N
TXOUT_U0P
TXOUT_U0N
TXOUT_L0N
TXOUT_L0P
TXOUT_L1N
TXOUT_L1P
TXOUT_L2N
TXOUT_L2P
TXOUT_L3N
TXOUT_L3P
TXCLK_LN
TXCLK_LP
V23
N23
P23
U23
N29
N28
N27
N26
N25
AL31
AM31
AM30
AL32
AL30
AM28
AL29
AM29
AM27
AC11
AC12
P14
U15
W14
W15
R17
R15
V15
V16
T16
U16
T17
U17
V14
R18
T18
V18
P18
P19
R19
W19
AD11
AC13
AC16
AC18
AC15
W10
T14
W17
P16
T23
K14
U19
AE19
AF20
AE20
AF19
AC21
AC22
AD22
AE21
AD21
AE22
AD12
AE11
AD23
AJ21
AK21
AH21
AG21
AG20
AH20
AK20
AJ20
AG18
AH18
AK19
AL19
AL20
AM20
AL21
AM21
AK18
AJ18
AL18
AM18
2
VGA_PCIE_PVDD12
VGA_PCIE_VDDR12_1
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
VGA_PCIE_VDDR12_2
1 2
VGA_VDD25
VGA_VDDPLL
VGA_VDDCI
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
C212
C212
VGA_LPVDD VGA_VDDR4
VGA_LVDDRL0
1 2
C67
C67
VGA_LVDDRL1
SC1U6D3V2ZY-GP
SC1U6D3V2ZY-GP
1 2
C155
C155
SC1U6D3V2ZY-GP
SC1U6D3V2ZY-GP
BLON_IN
2
C156
C156
C209
C209
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
C109
C109
C198
C198
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
C145
C145
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
1 2
SC1KP16V2KX-GP
SC1KP16V2KX-GP
C217
C217
1 2
C213
C213
SC1KP16V2KX-GP
SC1KP16V2KX-GP
1 2
SC1U6D3V 2KX-GP
SC1U6D3V2KX-GP
C207
C207
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
C143
C143
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
SC1U6D3V2ZY-GP
SC1U6D3V2ZY-GP
1 2
C172
C172
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
C206
C206
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
C149
C149
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
C151
C151
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
C154
C154
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
1 2
1 2
1 2
C108
C108
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
C204
C204
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
C205
C205
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
1 2
C150
C150
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
1 2
0R0805-PAD
0R0805-PAD
1 2
0R0805-PAD
0R0805-PAD
R129
R129
10KR2J-3-GP
10KR2J-3-GP
1 2
C224
C224
1 2
1 2
C216
C216
C218
C218
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
1 2
1 2
C112
C112
C111
C111
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
1 2
C140
C140
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
C202
C202
C97
C97
1 2
BLON CAN ALSO BE A PWM OUTPUT
FOR BRIGHTNESS CONTROL
ATI_TXBCLK+ 13
ATI_TXBCLK- 13
ATI_TXBOUT2+ 13
ATI_TXBOUT2- 13
ATI_TXBOUT1+ 13
ATI_TXBOUT1- 13
ATI_TXBOUT0+ 13
ATI_TXBOUT0- 13
ATI_TXAOUT0- 13
ATI_TXAOUT0+ 13
ATI_TXAOUT1- 13
ATI_TXAOUT1+ 13
ATI_TXAOUT2- 13
ATI_TXAOUT2+ 13
ATI_TXACLK- 13
ATI_TXACLK+ 13
1
R153
R153
1 2
0R0805-PAD
0R0805-PAD
R150
R150
1 2
0R0805-PAD
0R0805-PAD
R116
R116
1 2
SC1U6D3V 2KX-GP
SC1U6D3V2KX-GP
0R0805-PAD
0R0805-PAD
1 2
C110
C110
SC1U6D3V 2KX-GP
SC1U6D3V2KX-GP
C152
C152
C144
C144
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
1 2
C200
C200
C201
C201
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
1 2
C146
C146
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
C147
C147
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
C197
C197
R152
R152
1 2
2D5V_S0
0R0603-PAD
0R0603-PAD
R67
R67
2D5V_S0
R131
R131
2D5V_S0
BLON_IN 31
ATI_LCDVDD_ON 13
FOR M26X GENERICD
NO CONNECT OR
EXT SPREAD SPECTRUM OUTPUT
FOR M52P,M54P
IT IS A GPIO
FOR M56P
IT IS A BACK BIAS REGULATOR CONTROL
<Variant Name>
<Variant Name>
<Variant Name>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Date: Sheet
Date: Sheet
Date: Sheet
1D2V_S0
FOR M26X PCIE_VDDR12
CONNECT TO +1.8V
FOR M52P,M54P,M56P
CONNECT TO +1.2V
VGA_CORE_S0
C153
C153
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
C208
C208
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
R130
R130
C148
C148
1 2
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
0R0603-PAD
0R0603-PAD
R136
R136
1 2
0R0603-PAD
0R0603-PAD
R147
R147
1 2
0R0805-PAD
0R0805-PAD
FOR M26X LPVDD
CONNECT TO +1.8V
FOR M52P,M54P,M56P
CONNECT TO +2.5V
FOR M26X LVDDR PINS
AE20,AF20,AF19
CONNECT TO +1.8V
FOR M52P,M54P,M56P
CONNECT TO +2.5V
FOR M26X LVDDR PINS
AC21,AC22,AD21,AD22,AE21,AE22
CONNECT TO +2.8V
FOR M52P,M54P,M56P
CONNECT TO +2.5V
SA rework 0924
ATI M5X-P Power 4/4
ATI M5X-P Power 4/4
ATI M5X-P Power 4/4
AG1
AG1
AG1
FOR M26X VDD25
CONNECT TO +1.5V
FOR M52P,M54P,M56P
CONNECT TO +2.5V
2D5V_S0
FOR M26X VDDPLL
CONNECT TO VDDC
FOR M52P,M54P,M56P
CONNECT TO +1.2V
1D2V_S0
VGA_CORE_S0
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
1
-1
-1
-1
of
of
of
48 53 Tuesday, January 10, 2006
48 53 Tuesday, January 10, 2006
48 53 Tuesday, January 10, 2006
Page 49
5
4
3
2
1
Ideal Power Up Sequence
Real Power Up Sequence
D D
VBBN
VBBP
VDDC
MVDDC
PCIE_VDDR_12
PCIE_PVDD_12
1mS
VBBN
VBBP
VDDC
MVDDC
PCIE_VDDR_12
PCIE_PVDD_12
C C
VDD25
VDDR1
VDD25
VDDR1
<5mS
VDDR3
VDDR3
RESISTOR
Symbol name
B B
10KR3
33D3R5
1KR3F
The naming rule is value + R + size + tolerance
For the value, it can be read by the number before R. (R means resistor)
For the tolerance, it can be read from the last letter.
For the rating, we don't show on the symbol name.
For the size, R2=>0402, R3=>0603, R5=>0805,....
Value
10K Ohm
33.3 Ohm
1K Ohm
Tolerance
(J: 5%, F: 1%, D: 0.5%, B: 0.1 %)
If no letter, it means J: 5%
If no letter, it means J: 5% 0805
F: 1%
Rating
0402=> 1/16W, 25V
0603 => 1/16W, 75V
0805 => 1/10W, 100V
1/16W, 75V
1/10W, 100V
1/16W, 75V
Size
2=>0402, 3=>0603, 5=>0805,
6=>1206, 0=>1210
0603
0603
General Guidelines:
BBN and BBP must ramp up before or at the same time as VDDC but not after.
•
VDDC and MVDDC must be ramped up first, followed by PCIE_VDDR_12, PCIE_PVDD12, VDD25, VDDR1 and
•
VDDR3 (and other I/O powers).
All powers must be ramped up within 5ms of each other (from the ramp of VDDC to 90% of VDDR3).
•
VDD25 can be ramped with VDDC or VDDR1 but it cannot be ramped later than VDDR1.
•
The power down is the opposite of the power on sequence: VDDR3/VDDR1 -> VDD25
•
->VDDC/MVDDC/BBN/BBP.
Due to the level shifter design in the memory I/Os, in order to avoid over-stressing the thin oxide transistors when
VDDR1 is powered on but VDDC is not, VDDC must ramp up before VDDR1. Similarly, VDDC must ramp up before
VDDR3. The level shifter design is a function of the transistor types used in 90nm technology and of the voltage level support.
The drawback of ramping up VDDC before the I/O voltages (such as VDDR1 and VDDR3) is that parasitic P/N junctions
are forward biased, thus creating a conduction path. These conduction paths will pump up VDDR1 (from the memory
IOs) and VDDR3 (from the GPIOs).
The real power up sequence will appear as follows:
Figure 2-2. Real Power Up Sequence
As long as MVDDC ramps up with VDDC, the pump voltage on VDDR1 should be all right since the DRAM spec will
not be violated.
CAPACITOR
Symbol name
SCD1U10V2MX-1
SC10U6D3V5MX
SC2D2U16V5ZY
Value
0.1uF
10uF
2.2uF
Tolerance
(J: +/-5, K: +/-10,
M: +/-20, Z: +80/-20)
M/X5R
M/X5R
Z/Y5V
Rating
( X5R / X7R < 80%,
Y5V/Y5U/Z5U < 1/3 )
10V
6.3V
16V
Size
2=>0402, 3=>0603, 5=>0805,
6=>1206, 0=>1210
0402
0805
0805
The naming rule is
Capacitor type + value + rating + size + tolerance + material
SCD1U10V2MX-1
SC=> SMT Ceremic, TC=> POS cap or SP cap
D1U => 0.1uF
10V => the voltage rating is 10V
2=> 0402, 3=>0603, 5=>0805
M=>tolerance J, K, M, Z
X=> X7R/X5R, Y=> Y5V
-1 => symbol version, nonsense to EE characteristic
<Variant Name>
<Variant Name>
<Variant Name>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
ATI M5X-P POWER SEQUENCE
ATI M5X-P POWER SEQUENCE
ATI M5X-P POWER SEQUENCE
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet of
Date: Sheet
Date: Sheet
AG1 SA
AG1 SA
AG1 SA
of
of
49 53 Tuesday, January 10, 2006
49 53 Tuesday, January 10, 2006
49 53 Tuesday, January 10, 2006
A
Page 50
5
4
3
2
1
CHAN B DDR2 84BGA 32MX16 MEMORY
D D
U23
C C
B B
A A
1D8V_S0
1 2
R144
R144
1KR2F-3-GP
1KR2F-3-GP
B_BA0 47,51
B_BA1 47,51
MAB12_14 47,51
1 2
R143
R143
1KR2F-3-GP
1KR2F-3-GP
(SSTL-1.8) VREF = .5*VDDQ (SSTL-1.8) VREF = .5*VDDQ
1 2
C181
C181
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
5
MAB11
MAB10
MAB9
MAB8
MAB7
MAB6
MAB5
MAB4
MAB3
MAB2
MAB1
MAB0
CLKB0#
CLKB0
CKEB0
CSB0_0#
WEB0#
RASB0#
CASB0#
DQMB#2
DQMB#0
ODTB0
RDQSB2
WDQSB2
RDQSB0
WDQSB0
U23
L2
BA0
L3
BA1
R2
A12
P7
A11
M2
A10/AP
P3
A9
P8
A8
P2
A7
N7
A6
N3
A5
N8
A4
N2
A3
M7
A2
M3
A1
M8
A0
K8
CK
J8
CK
K2
CKE
L8
CS
K3
WE
K7
RAS
L7
CAS
F3
LDM
B3
UDM
K9
ODT
F7
LDQS
E8
LDQS
B7
UDQS
A8
UDQS
J2
VREF
A2
NC#A2
E2
NC#E2
L1
NC#L1
R3
NC#R3
R7
NC#R7
R8
NC#R8
HY5PS561621A-25GP
HY5PS561621A-25GP
72.55616.C0U
72.55616.C0U
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10
VDD1
VDD2
VDD3
VDD4
VDD5
VDDL
VSSDL
VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9
VSSQ10
VSS1
VSS2
VSS3
VSS4
VSS5
1D8V_S0
1D8V_S0
B9
B1
D9
D1
D3
D7
C2
DQ9
C8
DQ8
F9
DQ7
F1
DQ6
H9
DQ5
H1
DQ4
H3
DQ3
H7
DQ2
G2
DQ1
G8
DQ0
A9
C1
C3
C7
C9
E9
G1
G3
G7
G9
A1
E1
J9
M9
R1
J1
J7
A7
B2
B8
D2
D8
E7
F2
F8
H2
H8
A3
E3
J3
N1
P9
72.55616.C0U IC VRAM HY5PS561621AFP-25 FBGA(16M*16, 350Mhz) Hynix-128M
72.18256.B0U IC VRAM HYB18T256161AFL25 BGA (16M*16, 350Mhz) Infineon-128M
72.18512.A0U IC VRAM HYB18T512161BF-25 BGA (32M*16, 400Mhz) Infineon-256M
1 2
1 2
C189
C189
C664
C664
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
1 2
1 2
C577
C577
C654
C654
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
MDB7
MDB0
MDB5
MDB2
MDB3
MDB4
MDB1
MDB6
MDB23
MDB18
MDB20
MDB16
MDB17
MDB21
MDB19
MDB22
CLKB0# 47
CLKB0 47
1D8V_S0 1D8V_S0
1 2
C183
C183
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
4
56R2J-4-GP
56R2J-4-GP
1D8V_S0
1 2
R578
R578
1KR2F-3-GP
1KR2F-3-GP
CLOSE TO MEM !!
1 2
C186
C186
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
C663
C663
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
1 2
R573
R573
BC857_1
1 2
1 2
R579
R579
1KR2F-3-GP
1KR2F-3-GP
1 2
C653
C653
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
C185
C185
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
1 2
C191
C191
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
CLKB0#
CLKB0
R575
R575
56R2J-4-GP
56R2J-4-GP
C650
C650
SC470P50V2KX-3GP
SC470P50V2KX-3GP
1 2
C190
C190
1 2
C662
C662
B_BA0
B_BA1
MAB12_14
MAB11
MAB10
MAB9
MAB8
MAB7
MAB6
MAB5
MAB4
MAB3
MAB2
MAB1
MAB0
CKEB0
CSB0_0#
WEB0#
RASB0#
CASB0#
DQMB#1
DQMB#3
ODTB0
RDQSB1
WDQSB1
RDQSB3
WDQSB3
VRAM_VREF2 VRAM_VREF1
1 2
C188
C188
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
1 2
C652
C652
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
1 2
C182
C182
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
C578
C578
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
U69
U69
L2
L3
R2
P7
M2
P3
P8
P2
N7
N3
N8
N2
M7
M3
M8
K8
J8
K2
L8
K3
K7
L7
F3
B3
K9
F7
E8
B7
A8
J2
A2
E2
L1
R3
R7
R8
HY5PS561621A-25GP
HY5PS561621A-25GP
72.55616.C0U
72.55616.C0U
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
BA0
BA1
A12
A11
A10/AP
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
CK
CK
CKE
CS
WE
RAS
CAS
LDM
UDM
ODT
LDQS
LDQS
UDQS
UDQS
VREF
NC#A2
NC#E2
NC#L1
NC#R3
NC#R7
NC#R8
3
1 2
C192
C192
1 2
C655
C655
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10
VDD1
VDD2
VDD3
VDD4
VDD5
VDDL
VSSDL
VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9
VSSQ10
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
VSS1
VSS2
VSS3
VSS4
VSS5
DDR_VREF_S0
M56P
M56P
RN22
MAB2
MAB7
MAB3
MAB1
SRN56J-2-GP
SRN56J-2-GP
MAB10
MAB9
MAB5
MAB0
SRN56J-2-GP
SRN56J-2-GP
MAB4
MAB6
MAB8
MAB11
SRN56J-2-GP
B9
B1
D9
D1
D3
D7
C2
C8
F9
F1
H9
H1
H3
H7
G2
G8
A9
C1
C3
C7
C9
E9
G1
G3
G7
G9
A1
E1
J9
M9
R1
J1
J7
A7
B2
B8
D2
D8
E7
F2
F8
H2
H8
A3
E3
J3
N1
P9
MDB27
MDB28
MDB24
MDB31
MDB30
MDB25
MDB29
MDB26
MDB15
MDB9
MDB12
MDB8
MDB11
MDB13
MDB10
MDB14
1 2
C184
C184
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
ODTB0 47
ODTB1 47,51
RASB0# 47
RASB1# 47,51
CASB0# 47
CASB1# 47,51
WEB0# 47
WEB1# 47,51
CSB0_0# 47
CSB1_0# 47,51
CKEB0 47
CKEB1 47,51
FOR M56P AT DDR2 MEMORY SPEEDS ABOVE 350MHZ
MEMORY CONTROL SIGNALS WE,CAS,RAS,CS,CKE,ODT
AND MEMORY ADDRESS SIGNALS REQUIRE 55 OHM PULLUP
TO A VTT RAIL (50% OF VDDQ)
CLKB0 47
CLKB0# 47
RDQSB[7..0] 47,51
DQMB#[7..0] 47,51
MDB[63..0] 47,51
MAB[11..0] 47,51
WDQSB[7..0] 47,51
<Variant Name>
<Variant Name>
<Variant Name>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
2
Date: Sheet
A3
A3
A3
VRAM 1/2
VRAM 1/2
VRAM 1/2
AG1
AG1
AG1
SRN56J-2-GP
B_BA0
B_BA1
MAB12_14
ODTB0
ODTB1
RASB0#
RASB1#
CASB0#
CASB1#
WEB0#
WEB1#
CSB0_0#
CSB1_0#
CKEB0
CKEB1
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
RN22
1
8
2
7
3
6
4 5
RN93
RN93
1
8
2
7
3
6
4 5
RN92
RN92
1
8
2
7
3
6
4 5
R552 56 R2J-4-GP R552 56 R2J-4-GP
1 2
R551 56R2J-4-GP R551 56R2J-4-GP
1 2
R550 56R2J-4-GP R550 56R2J-4-GP
1 2
R572 56R2J-4-GP R572 56R2J-4-GP
1 2
R82 56R2J-4-GP R82 56R2J-4-GP
1 2
R574 56R2J-4-GP R574 56R2J-4-GP
1 2
R83 56R2J-4-GP R83 56R2J-4-GP
1 2
R571 56R2J-4-GP R571 56R2J-4-GP
1 2
R81 56R2J-4-GP R81 56R2J-4-GP
1 2
R577 56R2J-4-GP R577 56R2J-4-GP
1 2
R555 56R2J-4-GP R555 56R2J-4-GP
1 2
R570 56R2J-4-GP R570 56R2J-4-GP
1 2
R84 56R2J-4-GP R84 56R2J-4-GP
1 2
R576 56R2J-4-GP R576 56R2J-4-GP
1 2
R86 56R2J-4-GP R86 56R2J-4-GP
1 2
CLKB0
CLKB0#
RDQSB[7..0]
DQMB#[7..0]
MDB[63..0]
MAB[11..0]
WDQSB[7..0]
50 53 Tuesday, January 10, 2006
50 53 Tuesday, January 10, 2006
50 53 Tuesday, January 10, 2006
of
of
1
of
SC
SC
SC
Page 51
5
4
3
2
1
D D
1D8V_S0
1D8V_S0
C C
B_BA0 47,50
B_BA1 47,50
MAB12_14 47,50
B B
1D8V_S0
1 2
R90
R90
1KR2F-3-GP
1KR2F-3-GP
1 2
A A
R89
R89
1KR2F-3-GP
1KR2F-3-GP
(SSTL-1.8) VREF = .5*VDDQ
1 2
C87
C87
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
5
B_BA0
B_BA1
MAB12_14
MAB11
MAB10
MAB9
MAB8
MAB7
MAB6
MAB5
MAB4
MAB3
MAB2
MAB1
MAB0
CLKB1#
CLKB1
CKEB1
CSB1_0#
WEB1#
RASB1#
CASB1#
DQMB#5
DQMB#4
ODTB1
RDQSB5
WDQSB5
RDQSB4
WDQSB4
VRAM_VREF3
U21
U21
L2
BA0
L3
BA1
R2
A12
P7
A11
M2
A10/AP
P3
A9
P8
A8
P2
A7
N7
A6
N3
A5
N8
A4
N2
A3
M7
A2
M3
A1
M8
A0
K8
CK
J8
CK
K2
CKE
L8
CS
K3
WE
K7
RAS
L7
CAS
F3
LDM
B3
UDM
K9
ODT
F7
LDQS
E8
LDQS
B7
UDQS
A8
UDQS
J2
VREF
A2
NC#A2
E2
NC#E2
L1
NC#L1
R3
NC#R3
R7
NC#R7
R8
NC#R8
HY5PS561621A-25GP
HY5PS561621A-25GP
72.55616.C0U
72.55616.C0U
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10
VDD1
VDD2
VDD3
VDD4
VDD5
VDDL
VSSDL
VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9
VSSQ10
VSS1
VSS2
VSS3
VSS4
VSS5
4
MDB39
MDB32
MDB38
MDB34
MDB33
MDB37
MDB35
MDB36
MDB44
MDB43
MDB47
MDB40
MDB41
MDB46
MDB42
MDB45
1D8V_S0
1 2
C83
C83
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
CLKB1# 47
CLKB1 47
56R2J-4-GP
56R2J-4-GP
1D8V_S0
1 2
R85
R85
1KR2F-3-GP
1KR2F-3-GP
12
1 2
R556
R556
R554
R554
56R2J-4-GP
56R2J-4-GP
BC856_1
C631
C631
1 2
SC470P50V2KX-3GP
SC470P50V2KX-3GP
CLOSE TO MEM !!
1 2
R87
R87
1KR2F-3-GP
1KR2F-3-GP
(SSTL-1.8) VREF = .5*VDDQ
1 2
C82
C82
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
B_BA0
B_BA1
MAB12_14
MAB11
MAB10
MAB9
MAB8
MAB7
MAB6
MAB5
MAB4
MAB3
MAB2
MAB1
MAB0
CLKB1#
CLKB1
CKEB1
CSB1_0#
WEB1#
RASB1#
CASB1#
DQMB#6
DQMB#7
ODTB1
RDQSB6
WDQSB6
RDQSB7
WDQSB7
VRAM_VREF4
B9
B1
D9
D1
D3
D7
C2
C8
F9
F1
H9
H1
H3
H7
G2
G8
A9
C1
C3
C7
C9
E9
G1
G3
G7
G9
A1
E1
J9
M9
R1
J1
J7
A7
B2
B8
D2
D8
E7
F2
F8
H2
H8
A3
E3
J3
N1
P9
3
U68
U68
L2
BA0
L3
BA1
R2
A12
P7
A11
M2
A10/AP
P3
A9
P8
A8
P2
A7
N7
A6
N3
A5
N8
A4
N2
A3
M7
A2
M3
A1
M8
A0
K8
CK
J8
CK
K2
CKE
L8
CS
K3
WE
K7
RAS
L7
CAS
F3
LDM
B3
UDM
K9
ODT
F7
LDQS
E8
LDQS
B7
UDQS
A8
UDQS
J2
VREF
A2
NC#A2
E2
NC#E2
L1
NC#L1
R3
NC#R3
R7
NC#R7
R8
NC#R8
HY5PS561621A-25GP
HY5PS561621A-25GP
72.55616.C0U
72.55616.C0U
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10
VDD1
VDD2
VDD3
VDD4
VDD5
VDDL
VSSDL
VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9
VSSQ10
VSS1
VSS2
VSS3
VSS4
VSS5
B9
B1
D9
D1
D3
D7
C2
C8
F9
F1
H9
H1
H3
H7
G2
G8
A9
C1
C3
C7
C9
E9
G1
G3
G7
G9
A1
E1
J9
M9
R1
J1
J7
A7
B2
B8
D2
D8
E7
F2
F8
H2
H8
A3
E3
J3
N1
P9
MDB59
MDB60
MDB58
MDB62
MDB63
MDB56
MDB61
MDB57
MDB51
MDB53
MDB48
MDB55
MDB52
MDB49
MDB54
MDB50
1D8V_S0
1 2
C629
C629
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
2
C92
C92
SC1KP16V2KX-GP
SC1KP16V2KX-GP
1 2
1 2
C661
C661
C635
C635
SC1KP16V2KX-GP
SC1KP16V2KX-GP
1 2
1 2
C630
C630
C628
C628
SC1U10V3KX-3GP
SC1U10V3KX-3GP
1 2
1 2
1 2
C193
C193
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
1 2
C634
C634
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
<Variant Name>
<Variant Name>
<Variant Name>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
1 2
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
VRAM 2/2
VRAM 2/2
VRAM 2/2
C88
C88
C632
C632
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
RDQSB[7..0] 47,50
DQMB#[7..0] 47,50
MDB[63..0] 47,50
MAB[11..0] 47,50
WDQSB[7..0] 47,50
C187
C187
1 2
C633
C633
RASB1# 47,50
CASB1# 47,50
WEB1# 47,50
CSB1_0# 47,50
CKEB1 47,50
ODTB1 47,50
CLKB1 47
CLKB1# 47
AG1
AG1
AG1
1 2
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
1 2
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
-1 Modify
1 2
C86
C86
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
C84
C84
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
RASB1#
CASB1#
WEB1#
CSB1_0#
CKEB1
ODTB1
CLKB1
CLKB1#
RDQSB[7..0]
DQMB#[7..0]
MDB[63..0]
MAB[11..0]
WDQSB[7..0]
51 53 Tuesday, January 10, 2006
51 53 Tuesday, January 10, 2006
51 53 Tuesday, January 10, 2006
1
1 2
C90
C90
1 2
C651
C651
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
of
of
of
C89
C89
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
C85
C85
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
-1
-1
-1
Page 52
5
4
3
2
1
VGA_CORE_S0
DCBATOUT DCBATOUT_5234
G11
G11
5234_ISEN
5234_SW
5234_HDRV
5234_LDRV
TP67
TP67
TPAD30
TPAD30
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G10
G10
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G9
G9
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G12
G12
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G14
G14
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G13
G13
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
C46
C46
1 2
SCD1U25V3KX-GP
SCD1U25V3KX-GP
R36
R36
1K2R3F-GP
1K2R3F-GP
1 2
AO4422-1-GP
AO4422-1-GP
U64
U64
AO4430-1-GP
AO4430-1-GP
DCBATOUT_5234
1 2
C22
C22
678
DDD
DDD
U63
U63
G D
G D
4 5
678
DDD
DDD
G D
G D
4 5
POWERPLAY:
: 1.0V
high (3.3V) = set lower core voltage (e.g. VDDC = 1.0V)
low (0V) = set higher core voltage (e.g. VDDC = 1.2V)
High :R35 + R31 set Vout to 0.9994V.
Low : R35 set Vout to 1.19925V.
M54/M56 : 0.95V
High :R35 + R31 set Vout to 1.0989V.
Low : R35 set Vout to 0.9503V.
M52 : 0.95V, but don't card it.(1.0V)
don't mount Q9
R35 + R31 set Vout to 0.9994V.
Id=11A
Qg=9.8nC
Rdson=19.6~24mohm
SSS
SSS
123
SC
L1
L1
1 2
L-D56UH-U
L-D56UH-U
L2
L2
1 2
IND-1UH-48-GP
IND-1UH-48-GP
SSS
SSS
SC
123
Id=18A
Qg=48nC
Rdson=6.2~7.5mohm
Panasonic
DY
DY
5V_S0
300KHz
SC10U35V0ZY-1GP
SC10U35V0ZY-1GP
TAI-TECH
1 2
R13
R13
10KR2J-3-GP
10KR2J-3-GP
1 2
R14
R14
DUMMY-R3
DUMMY-R3
1 2
C556
C556
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
1 2
C42
C42
5K9R2F-GP
5K9R2F-GP
ATI M5x VGA Core
Ver.
A12
M54
A12
M56
B24
3
1 2
Non-M52
Non-M52
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
2KR2F-3-GP
2KR2F-3-GP
R32
R32
Non-M52
Non-M52
Normal PowerPlay VGA
1.0
1.1
1.2
1.1
C23
C23
SC10U35V0ZY-1GP
SC10U35V0ZY-1GP
1 2
R11
R11
442R2F-GP
442R2F-GP
R35
R35
M52P
M52P
1 2
R31
R31
4K02R2F-GP
4K02R2F-GP
0.95
/1.0M52
0.95/0.95
0.95
0.95/0.95
2
Vout Setting:
0.9V/Rlow=(Vout-0.9V)/Rhigh
1 2
R33
R33
655R3F-GP
655R3F-GP
M52P
M52P
1 2
1 2
SC4D7U10V5ZY-3GP
SC4D7U10V5ZY-3GP
C555
C555
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
Q9
Q9
2N7002-8-GP
2N7002-8-GP
D
D
1
G
G
S
S
C566
Non-M52
Non-M52
C566
2 3
<Variant Name>
<Variant Name>
<Variant Name>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet of
D D
FAN5234 FOR VGA_Core
5V_S5
1 2
C45
C45
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
D5
C C
PM_SLP_S3# 16,18,30,31,36,41,43
R498
R498
1 2
10KR2J-3-GP
10KR2J-3-GP
B B
5V_S0
1 2
DCBATOUT_5234
1 2
0R0603-PAD
0R0603-PAD
1 2
C41
C41
SCD22U16V3ZY-GP
SCD22U16V3ZY-GP
R499
R499
DUMMY-R2
DUMMY-R2
R12
R12
1 2
5234_VIN
C44
C44
SC2200P50V2KX-2GP
SC2200P50V2KX-2GP
97K6R3F-GP
97K6R3F-GP
5234_SS
5234_ILIM
5234_EN
1 2
R34
R34
SC
D5
SSM5818SLPT-GP
SSM5818SLPT-GP
U8
U8
16
FPWM
15
BOOT
7
SS
4
ILIM
3
EN
6
VSEN
5
VOUT
1
VIN
11
VCC
FAN5234MTCX-1GP 74.05234.A7G
FAN5234MTCX-1GP 74.05234.A7G
1 2
C21
C21
SCD1U25V3KX-GP
SCD1U25V3KX-GP
5234_VSEN
Rilim=(11.2/Iilim)*((100+Rsense)/Rdson)
A A
5
4
1 2
C47
C47
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
5234_BOOT
2 1
9
PGND
8
AGND
12
ISNS
13
SW
14
HDRV
10
LDRV
2
PGOOD
PWM Mode:
FPWM (High)=>Fixed PWM Mode.
FPWM (Low)=>Hysteretic Mode.
VGA_CORE_PWR VGA_CORE_S0
G2
G2
1 2
G1
G1
GAP-CLOSE-PWR
GAP-CLOSE-PWR
1 2
G3
G3
GAP-CLOSE-PWR
GAP-CLOSE-PWR
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G61
G61
G62
G62
G60
G60
G63
G63
G4
G4
G5
G5
G64
G64
G6
G6
G7
G7
G8
G8
G66
G66
G65
G65
Vosetting=1.0809V
1 2
1 2
TC18
TC18
SE330U2VDM-L2GP
SE330U2VDM-L2GP
3D3V_S0
1 2
R481
R481
10KR2J-3-GP
10KR2J-3-GP
R497
R497
1 2
20KR2J-L2-GP
20KR2J-L2-GP
1 2
Non-M52
Non-M52
CHT2222APT-GP
CHT2222APT-GP
Non-M52
Non-M52
Non-M52
Non-M52
C
Q35
Q35
B
Non-M52
Non-M52
E
1 2
R485
R485
1KR2J-1-GP
1KR2J-1-GP
Non-M52
Non-M52
VGA CORE 1D1V
VGA CORE 1D1V
VGA CORE 1D1V
AG1 -1
AG1 -1
AG1 -1
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
M52:1.0V
M54:1.1V
M56: 1.1V
Iomax=17A
OCP>28A
VGA_CORE_PWR
1 2
TC17
TC17
SE330U2VDM-L2GP
SE330U2VDM-L2GP
DY
DY
SC
Panasonic V Size 330uF 2V
ESR=9mohm, Iripple=3.0A
USD:0.250 (Q3/05)
GPIO_PWRCNTL 46
1 2
R483
R483
100KR2J-1-GP
100KR2J-1-GP
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
52 53 Tuesday, January 10, 2006
52 53 Tuesday, January 10, 2006
52 53 Tuesday, January 10, 2006
of
1
of
Page 53
A
B
C
D
E
5V_S0 5V_S0
EMI CAP
4 4
9 8
14
10
TSAHCT125PW-GP
TSAHCT125PW-GP
7
U59C
U59C
14
13
12 11
TSAHCT125PW-GP
TSAHCT125PW-GP
7
U59D
U59D
DCBATOUT
1 2
EC22
EC22
3D3V_S0
1 2
EC67
EC67
1 2
EC38
EC38
EC37
EC37
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
1 2
EC42
EC42
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
1 2
EC61
EC61
EC39
EC39
1 2
EC66
EC66
EC40
EC40
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
1 2
EC41
EC41
1 2
1 2
1 2
New Card CPU Thermal Module
SCD1U16V2ZY-2GP
TOP SIDE:
3 3
H17H17
1
34.4A901.001
H7H7
1
34.4A908.001
H12H12
FOR MDC FOR MINIC
BOTTOM SIDE:
H24H24
H26H26
1
H13H13
1
1
K1
K1
1
SPRING-U3
SPRING-U3
34.40U07.001
IO Bracket IO Bracket
H31H31
1
1
H34H34
1
K3
K3
1
SPRING-9-GP
SPRING-9-GP
DY
DY
34.49U23.001
H27H27
1
K4
K4
1
SPRING-9-GP
SPRING-9-GP
DY
DY
H32H32
1
UMA VGA
H30H30
1
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
MINIC
MINIC
MINIC
MINIC
H29
H29
H28
H28
1
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1
34.4A902.001 34.4A903.001 34.4A904.001 34.4A905.001 34.4A906.001 34.4A907.001
BT+
1 2
EC47
EC47
1 2
EC58
EC58
1 2
EC44
EC44
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
1 2
EC63
EC63
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
K2
K2
1
SPRING-23-GP
SPRING-23-GP
34.39S07.001
1 2
EC46
EC46
EC43
EC43
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
1 2
EC62
EC62
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
EC60
EC60
1 2
EC59
EC59
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
EC45
EC45
EC48
EC48
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
1 2
1 2
1 2
EC57
EC57
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
EC65
EC65
EC64
EC64
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
1 2
1 2
2 2
H14
H16
H16
H20
H10
H10
HOLE
HOLE
1
H33
H33
H35
H35
HOLE
HOLE
HOLE
HOLE
1
AUD_AGND
1 1
A
HOLE
HOLE
H20
HOLE
HOLE
1
H19
H19
HOLE
HOLE
1
H4
HOLEH4HOLE
H36
H36
HOLE
HOLE
1
1
1
1
H2
HOLEH2HOLE
H22
H22
HOLE
HOLE
H1
HOLEH1HOLE
1
1
H21
H21
HOLE
HOLE
1
1
B
H6
HOLEH6HOLE
H9
HOLEH9HOLE
1
H3
H11
H11
HOLEH3HOLE
HOLE
HOLE
1
1
H14
HOLE
HOLE
1
H8
HOLEH8HOLE
1
C
H5
HOLEH5HOLE
1
H18
H18
HOLE
HOLE
1
H15
H15
HOLE
HOLE
1
1
<Variant Name>
<Variant Name>
<Variant Name>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
D
Date: Sheet
SPRING & BOSS
SPRING & BOSS
SPRING & BOSS
AG1 -1
AG1 -1
AG1 -1
53 53 Tuesday, January 10, 2006
53 53 Tuesday, January 10, 2006
53 53 Tuesday, January 10, 2006
of
of
E
of