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IN 1: Input 1 for stage A, NOR 1 and NAND 1
IN 2: Input 2 for stage A, NOR 1 and NAND 1
IN 3: Input 1 for stage B, NOR 1 and NAND 1
LINK A: Manual link switching for input 2 stage B, NOR 1
IN 4: Input for voltage-controlled switching of link A and B
LINK B: Manual link switching for input 2 stage B, NAND 1
NOR 1 Output for NOR gate 1, Stage A
NAND 1: Output for NAND gate 1, Stage A
NAND 2 Output for NAND gate 2, Stage A
OR 1: Output for OR gate 1, Stage A
AND 1: Output for AND gate 1, Stage A
AND 2: Output for AND gate 2, Stage A
NOR 1: Output for NOR gate 1, Stage B
NAND 1: Output for NAND gate 1, Stage B
NAND 2/XNOR: Output for NAND gate 2 OR XNOR gate 1, Stage B
OR 1: Output for OR gate 1, Stage B
AND 1: Output for AND gate 1, Stage B
AND 2/XOR: Output for AND gate 2 or XOR gate 1, Stage B
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