The gen4 2.4” Picaso Integrated Display Module is
part of the latest gen4 series of modules Designed
and Manufactured by 4D Systems.
The gen4 series was designed specifically for ease of
integration and use, with careful consideration for
space requirements and functionality.
This specific gen4 module features a 2.4” colour TFT
LCD display, with resistive touch. It is powered by the
well-known 4D Systems Picaso Graphics Processor,
which offers an array of functionality and options for
any Designer / Integrator / User.
The Picaso processor features include 13
customisable GPIO, 2 Serial ports, and a Master I2C
interface.
The 2.4” Picaso Integrated Display Module features a
TFT LCD Display, is capable of Touch Detection,
microSD memory Storage, GPIO and
Communications, along with multiple millisecond
resolution timers, and Audio Generation.
The gen4 Series is 100% compatible with the
Workshop4 IDE and its 4 different development
environments, providing the User with a wealth of
options for programming and controlling their
system.
Anything designed to run on other 4D Systems
display modules featuring Picaso Graphic Processors
can be run on this gen4 Integrated Display Module,
with little or no required modifications. Please
contact 4D Systems Support Team for assistance if
migrating from a previous model.
The gen4 series of Integrated Display Modules
features a 30 pin ZIF socket, designed for a 30 pin FPC
cable, for easy and simple connection to an
application or mother board, or for connecting to
accessory boards for a range of functionality
advancements.
The gen4 series of modules has been designed to
minimise the impact of display related circuitry, and
provide a platform suitable for integration into a
product. Application boards can sit flush on the back
of the gen4 if required, as the display related
electronics sit inside the plastic mounting base,
leaving the application board surface clear for User
circuitry.
Asynchronous Serial Receive COM1, TTL level. Connect this pin to the Transmit
(TX) signal of other serial devices. Used in conjunction with the TX1 pin. This
pin is tolerant up to 5.0V levels.
16
TX1
O
Asynchronous Serial Transmit COM1, TTL level. Connect this pin to the Receive
(RX) signal of other serial devices. Used in conjunction with the RX1 pin. This
pin has a 3.3V Level output.
17
I2C SCL
O
I2C Interface, SCL pin.
18
I2C SDA
I/O
I2C Interface, SDA pin.
19
AUDIO_OUT
O
Audio Output, PWM, to feed into external amplifier via filter network
20
AUDENB
O
Audio Amplifier Enable, to enable/disable external amplifier
21
GND
P
Supply Ground
22
RESET
I
Master Reset signal. Internally pulled up to 3.3V via a 10K resistor. An active
Low pulse greater than 2 micro-seconds will reset the module. If the module
needs to be reset externally, only use open collector type circuits. This pin is
not driven low by any internal conditions. The host should control this pin via
one of its port pins using an open collector/drain arrangement.
23
RX0
I
Asynchronous Serial Receive COM0, TTL level. Connect this pin to the Transmit
(TX) signal of other serial devices. Used in conjunction with the TX0 pin for
programming this module. This pin is tolerant up to 5.0V levels.
24
TX0
O
Asynchronous Serial Transmit COM0, TTL level. Connect this pin to the Receive
(RX) signal of other serial devices. Used in conjunction with the RX0 pin for
programming this module. This pin has a 3.3V Level output.
25
GND
P
Supply Ground
26
5V IN
P
Main Voltage Supply +ve input pin. Reverse polarity protected. Range is 4.0V
to 5.5V, nominal 5.0V.
27
5V IN
P
Main Voltage Supply +ve input pin. Reverse polarity protected. Range is 4.0V
to 5.5V, nominal 5.0V.
This section describes in detail the hardware interface
pins of the device.
4.1. Serial Ports – TTL Level Serial
The Picaso Processor has two dedicated hardware
Asynchronous Serial ports that can communicate with
external serial devices. These are referred to as the
COM0 and the COM1 serial ports.
The primary features are:
• Full-Duplex 8 bit data transmission and
reception.
• Data format: 8 bits, No Parity, 1 Stop bit.
• Independent Baud rates from 300 baud up to
600K baud.
• Single byte transmits and receives or a fully
buffered service. The buffered service feature
runs in the background capturing and buffering
serial data without the user application having to
constantly poll any of the serial ports. This frees
up the application to service other tasks.
TX0 pin (Serial Transmit COM0):
Asynchronous Serial port COM0 transmit pin, TX0.
Connect this pin to external serial device receive (Rx)
signal. This pin outputs at 3.3V Level.
RX0 pin (Serial Receive COM0):
Asynchronous Serial port COM0 receive pin, RX0.
Connect this pin to external serial device transmit (Tx)
signal. This pin is native 3.3V level, but 5.0V tolerant.
TX1 pin (Serial Transmit COM1):
Asynchronous Serial port COM1 transmit pin, TX1.
Connect this pin to external serial device receive (Rx)
signal. This pin outputs at 3.3V Level.
RX1 pin (Serial Receive COM1):
Asynchronous Serial port COM1 receive pin, RX1.
Connect this pin to external serial device transmit (Tx)
signal. This pin is native 3.3V level, but 5.0V tolerant.
Please refer to the 'PICASO-4DGL-InternalFunctions.pdf' document for more information.
Serial ports output at the level of TTL 3.3V, however
are 5V tolerant, so can accept communications from
5V devices.
A single byte serial transmission consists of the start
bit, 8-bits of data followed by the stop bit. The start
bit is always 0, while a stop bit is always 1. The LSB
(Least Significant Bit, Bit 0) is sent out first following
the start bit. Figure below shows a single byte
transmission timing diagram.
COM0 is also the primary interface for 4DGL user
program downloads and chip configuration (PmmC
programming). Once the compiled 4DGL application
program (EVE byte-code) is downloaded and the user
code starts executing, the serial port is then available
to the user application. Refer to Section 5. ‘Firmware
/ PmmC Programming’ for more details on this
subject.
4.2. General Purpose I/O
There are 13 general purpose Input/Output (GPIO)
pins available to the user. These are grouped as IO1
IO5 and BUS0 BUS7. Power-Up Reset default is
all INPUTS.
The 5 I/O pins (IO1 IO5), provide flexibility of
individual bit operations while the 8 pins (BUS0
BUS7), known as GPIO BUS, serve collectively for byte
wise operations. The IO4 and IO5 also act as strobing
signals to control the GPIO Bus. GPIO Bus can be read
or written by strobing a low pulse (50ns duration or
greater) the IO4/BUS_RD or IO5/BUS_WR for read or
write respectively. For detailed usage refer to the
separate document titled:
“PICASO-4DGL-Internal-Functions.pdf”
IO1-IO5 pins:
General purpose I/O pins. Each pin can be
individually set for INPUT or an OUTPUT.
Power-Up Reset default is all INPUTS. Digital GPIO
can source/sink 4mA.
For more information see the Specifications section
of this datasheet.