EDI9F416128C
4x128Kx16 Static RAM CMOS, Module
FEATURES
ν4x128Kx16 bit CMOS Static
νRandom Access Memory
•Access Times 70 thru 100ns
•Data Retention Function (EDI9F416128LP )
•TTL Compatible Inputs and Outputs
•Fully Static, No Clocks
νHigh Density Packaging
•80 Pin SIMM, No. 318
νSingle +5V (±10%) Supply Operation
DESCRIPTION
The EDI9F416128C is a 8192K bit CMOS Static RAM based on eight 128Kx8 Static RAMs mounted on a multi-layered epoxy laminate (FR-4) substrate.
A low power version with data retention (EDI9F416128LP) is also available.
All inputs and outputs are TTL compatible and operate from a single +5V supply. Fully asynchronous, the EDI9F416128C requires no clocks or refreshing for operation.
FIG. 1
PIN CONFIGURATIONS AND BLOCK DIAGRAM |
PIN NAMES |
AØ-A16 |
Address Inputs |
EØ-E3 |
Chip Enable |
G |
Output Enables |
WH-WL |
Write Enables |
E |
Chip Select |
DQØ-DQ15 |
Data Input/Output |
VCC |
Supply 5 Volts |
VSS |
Ground |
NC |
No Connect |
Aug. 2002 Rev. 2A |
1 |
White Electronic Designs Corporation • (508) 366-5151 • www.whiteedc.com |
ECO #15521 |
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EDI9F416128C
ABSOLUTE MAXIMUM RATINGS*
Voltage on any pin relative to VSS |
-0.5V to 7.0V |
Operating Temperature TA (Ambient) |
|
Commercial |
0°C to +70°C |
Industrial |
-40°C to +85°C |
Storage Temperature |
|
Plastic |
-55°C to +125°C |
Power Dissipation |
1 Watt |
Output Current. |
20 mA |
*Stress greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions greater than those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
RECOMMENDED DC OPERATING CONDITIONS
Parameter |
Sym |
Min |
Typ |
Max |
Units |
|
Supply Voltage |
VCC |
4.5 |
5.0 |
5.5 |
V |
|
Supply Voltage |
VSS |
0 |
0 |
0 |
V |
|
Input High Voltage |
VIH |
2.2 |
-- |
6.0 |
V |
|
Input Low Voltage |
VIL |
-0.3 |
-- |
0.8 |
V |
|
AC TEST CONDITIONS
Input Pulse Levels |
VSS to 3.0V |
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Input Rise and Fall Times |
5ns |
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Input and Output Timing Levels |
1.5V |
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Output Load 70ns |
1TTL = 30pF |
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85-120ns |
1TTL, CL =100pF |
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(note: For TEHQZ,TGHQZ and TWLQZ, CL = 5pF)
DC ELECTRICAL CHARACTERISTICS
Parameter |
Sym |
|
|
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Conditions |
|
Min |
Typ |
Max |
Units |
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Operating Power |
ICC1 |
W, |
|
E |
= VIL, II/O = 0mA, |
|
-- |
94 |
158 |
mA |
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Supply Current |
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Min Cycle |
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Standby (TTL) Power |
ICC2 |
|
E |
³ VIH, VIN £ VIL |
|
-- |
56 |
120 |
mA |
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Supply Current |
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VIN ³ VIH |
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Full Standby Power |
ICC3 |
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|
E |
³ VCC-0.2V |
C |
-- |
|
24 |
mA |
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Supply Current |
|
VIN ³ VCC-0.2V or |
LP |
-- |
|
80 |
µA |
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CMOS |
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VIN £ 0.2V |
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Input Leakage Current |
ILI |
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VIN = 0V to VCC |
|
-- |
-- |
±10 |
µA |
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Output Leakage Current |
ILO |
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V I/O = 0V to VCC |
|
-- |
-- |
±10 |
µA |
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Output High Voltage |
VOH |
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IOH = -1.0mA |
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2.4 |
-- |
-- |
V |
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Output Low Voltage |
VOL |
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IOL = 2.1mA |
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-- |
-- |
0.4 |
V |
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TRUTH TABLE
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G |
E |
W |
Mode |
Output |
Power |
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X |
H |
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X |
Standby |
High Z |
ICC2, ICC3 |
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H |
L |
|
H |
Output Deselect |
High Z |
ICC1 |
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L |
L |
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H |
Read |
DOUT |
ICC1 |
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X |
L |
|
L |
Write |
DIN |
ICC1 |
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CAPACITANCE
(f=1.0MHz, VIN=VCC or VSS)
Parameter |
Sym |
Max |
Unit |
Address Lines |
CI |
60 |
pF |
Data Lines |
CD/Q |
80 |
pF |
Chip Enable Line |
CC |
15 |
pF |
Write and Output Enable Lines |
CW |
60 |
pF |
White Electronic Designs Corporation • (508) 366-5151 • www.whiteedc.com |
2 |
Aug. 2002 Rev. 2A |
|
|
ECO #15521 |