White Electronic Designs EDI8L32512C20AI, EDI8L32512C20AC, EDI8L32512C17AI, EDI8L32512C17AC, EDI8L32512C15AI Datasheet

			EDI8L32512C
	512K x 32 CMOS High Speed Static RAM
	FEATURES	DESCRIPTION
	ν DSPNOTMemory Solution	The EDI8L32512C is a high speed, 5V, 16 megabit
	• Motorola DSP96002	SRAM. The device is available with access times of
	• Analog SHARC DSP	12, 15, 17 and 20ns allowing the creation of a no wait
		state DSP memory solution. The high speed, 5V
	• Texas Instruments TMS320C3x, TMS320C4x
		supply voltage and control lines make the device ideal
	ν Random Access Memory Array
		for creating floating point DSP memory solutions.
	• Fast Access Times: 12*, 15, 17, and 20ns
		The device can be configured as a 512K x 32 and used
	• TTL Compatible Inputs and Outputs
		to create a single chip external data memory solution for
	• Fully Static, No Clocks
		TI's TMS320C30/C31 (Figure 8), TMS320C32 (Figure 9)
	ν Surface Mount Package
		or TMS320C4x (Figure 10), Motorola's DSP96002 and
	RECOMMENDEDcompared to four 512K x 8, 36 pin SOJs. In addition
	• 68 Lead PLCC, No. 99 JEDEC M0-47AE	Analog's SHARC DSP (Figure 11). Alternatively, the
	• Small Footprint, 0.990 Sq. In.	device's chip enables can be used to configure it as a 1M
	• Multiple Ground Pins for Maximum	x 16. A 1M x 48 program memory array for Analog's
	Noise Immunity	SHARC DSP is created using three devices (Figure 12).

	ν Single +5V (±5%) Supply Operation	If this memory is too deep, two 512K x 24s (EDI8L24512C)
		can be used to create a 512K x 48 array or two 128K x 24s
	* Advance Information.
		(EDI8L24128C) can be used to create a 128K x 48 array.
		The device provides a 56% space savings when
		the EDI8L32512C has only a 10pF load on the data
		lines vs. 32pF for four plastic SOJs.
		The device provides a memory upgrade of the
		EDI8L32256C (256K x 32) or the EDI8L32128C (128K x
		32). For additional upgrade information see Figure 13.
		Note: Solder Reflow Temperature should not exceed 230°C for 10 seconds.

FIG. 1 PIN CONFIGURATIONSAND BLOCK DIAGRAM

						DQ16			A18					A17																		E0 NC						VCC				NC NC																A16				A15				A14				DQ15
																			E3				E2				E1																							G				W
	9 8												7						6 5						4					3 2							1				68 67								66				65 64								63				62 61
DQ17	10																																																																										60	DQ14
																																																																											59	DQ13
DQ18	11
																																																																											58	DQ12
DQ19	12
																																																																											57	VSS
VSS	13
																																																																											56	DQ11
DQ20	14
																																																																											55	DQ10
DQ21	15
																																																																											54	DQ9
DQ22	16
																																																																											53	DQ8
DQ23	17
																																																																											52	VCC
VCC	18
																																																																											51	DQ7
DQ24	19
																																																																											50	DQ6
DQ25	20
																																																																											49	DQ5
DQ26	21
																																																																											48	DQ4
DQ27	22
																																																																											47	VSS
VSS	23
																																																																											46	DQ3
DQ28	24
																																																																											45	DQ2
DQ29	25
																																																																											44	DQ1
DQ30	26
	27						28		29							30			31						32				33				34				35				36				37				38				39				40				41				42				43
				DQ31				A6					A5				A4 A3								A2					A1				A0				VCC				A13				A12				A11				A10				A9				A8				A7			DQ0

Note: For memory upgrade information, refer to Page 8, Figure 13 "EDI MCM-L Upgrade Path."

FOR

BYTE CONTROL

PIN NAMES

TABLE

A0-18

Address Inputs

E0-3

Chip Enables (One per Byte)

Chip

Byte

Enable

Control

W

Master Write Enable

DQ0-7

E0

G

Master Output Enable

NEW

DQ8-15

E1

DQ0-31

Common Data Input/Output

DQ16-23

E2

VCC

Power (+5V ±5%)

DQ24-31

E3

VSS

Ground

NC

No Connection

A0-18

DESIGN

19

G

512K x 32

W

DQ0-7

Memory

E0

DQ8-15

Array

E1

DQ16-23

E2

DQ24-31

E3

August 2000 Rev. 7	1	White Electronic Designs Corporation • [phone] • www.whiteedc.com
ECO #13097

ABSOLUTE MAXIMUM RATINGS*

Voltage on any pin relative to VSS	-0.5V to 7.0V
Operating Temperature TA (Ambient)
Commercial	0°C to + 70°C
Industrial	-40°C to +85°C
Storage Temperature	-55°C to +125°C
Power Dissipation	5.0 Watts
Output Current.	20 mA
Junction Temperature, TJ	175°C

*Stress greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions greater than those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.

EDI8L32512C

RECOMMENDED DC OPERATING CONDITIONS

Parameter	Sym	Min	Typ	Max	Units
Supply Voltage	VCC	4.75	5.0	5.25	V
Supply Voltage	VSS	0	0	0	V
Input High Voltage	VIH	2.2	--	VCC+0.5	V
Input Low Voltage	VIL	-0.3	--	0.8	V

AC TEST CONDITIONS

Input Pulse Levels	VSS to 3.0V
Input Rise and Fall Times	5ns
Input and Output Timing Levels	1.5V
Output Load	Figure 2

(Note: For TEHQZ,TGHQZ and TWLQZ, CL = 5pF)

FIG. 2		FIG. 3
	Vcc		Vcc
	480Ω		480Ω
Q		Q
255Ω	30pF	255Ω	5pF

DC ELECTRICAL CHARACTERISTICS

Parameter	Sym					Conditions		Min	Max		Units
									12/15	17/20	m A
Operating Power Supply Current	ICC1		W			= VIL, II/O = 0mA,			800	720	mA
							Min Cycle
Standby (TTL) Supply Current	ICC2			³ VIH, VIN £ VIL or					200	200	mA
			E
			VIN ³ VIH, f = ØMHz
Full Standby CMOS	ICC3						³ VCC - 0.2V		40	40	mA
					E
Supply Current		VIN ³ VCC - 0.2V or
							VIN £ 0.2V
Input Leakage Current	ILI		VIN = 0V to VCC						±10		µA
Output Leakage Current	ILO		V I/O = 0V to VCC						±10		µA
Output High Volltage	VOH					IOH = -4.0mA		2.4			V
Output Low Voltage	VOL						IOL =8.0mA		0.4		V

TRUTH TABLE

							Mode	Output	Power
	G		E		W
	X		H		X		Standby	High Z	ICC2
									ICC3
	H		L		H		Output Deselect	High Z	ICC1
	L		L		H		Read	DOUT	ICC1
	X		L		L		Write	DIN	ICC1

CAPACITANCE

(f=1.0MHz, VIN=VCC OR VSS)

Parameter	Sym							Max	Unit
Address Lines			CI					30	pF
Data Lines	CD/Q							10	pF
Write & Output Enable Lines		W,			G			30	pF
Chip Enable Lines			E0-3					8	pF

White Electronic Designs Corporation • [phone] • www.whiteedc.com

2

EDI8L32512C

AC CHARACTERISTICS READ CYCLE

	Symbol		12ns*	15ns	17ns	20ns
Parameter	JEDEC	Alt.	Min Max	Min Max	Min Max	Min Max	Units
Read Cycle Time	TAVAV	TRC	12	15	17	20	ns
Address Access Time	TAVQV	TAA	12	15	17	20	ns
Chip Enable Access Time	TELQV	TACS	12	15	17	20	ns
Chip Enable to Output in Low Z (1)	TELQX	TCLZ	3	3	3	3	ns
Chip Disable to Output in High Z (1)	TEHQZ	TCHZ	6	7	9	9	ns
Output Hold from Address Change	TAVQX	TOH	3	3	3	3	ns
Output Enable to Output Valid	TGLQV	TOE	6	7	9	9	ns
Output Enable to Output in Low Z (1)	TGLQX	TOLZ	0	0	0	0	ns
Output Disable to Output in High Z(1)	TGHQZ	TOHZ	6	7	9	9	ns

*Advanced Information

Note 1: Parameter guaranteed, but not tested.

FIG. 4 READ CYCLE 1 - W HIGH, G, E LOW
	TAVAV
A	ADDRESS 1	ADDRESS 2
	TAVQV	TAVQX
Q		DATA 1	DATA 2

FIG. 5 READ CYCLE 2 - W HIGH
	TAVAV
A
E	TAVQV
	TELQV	TEHQZ
	TELQX
G
	TGLQV	TGHQZ
	TGLQX
Q
	3	White Electronic Designs Corporation • [phone] • www.whiteedc.com