UNITRODE UC1572, UC2572, UC3572 Technical data
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UC1572
UC1572
UC2572
UC3572
Negative Output Flyback Pulse Width Modulator
FEATURES
∙Simple Single Inductor Flyback PWM for Negative Voltage Generation
∙Drives External PMOS Switch
∙Contains UVLO Circuit
∙Includes Pulse-by-Pulse Current Limit
∙Low 50μA Sleep Mode Current
DESCRIPTION
The UC3572 is a negative output flyback pulse width modulator which converts a positive input voltage to a regulated negative output voltage. The chip is optimized for use in a single inductor negative flyback switching converter employing an external PMOS switch. The block diagram consists of a precision reference, an error amplifier configured for voltage mode operation, an oscillator, a PWM comparator with latching logic, and a 0.5A peak gate driver. The UC3572 includes an undervoltage lockout circuit to insure sufficient input supply voltage is present before any switching activity can occur, and a pulse-by-pulse current limit. Output current can be sensed and limited to a user determined maximum value. The UVLO circuit turns the chip off when the input voltage is below the UVLO threshold. In addition, a sleep comparator interfaces to the UVLO circuit to turn the chip off. This reduces the supply current to only 50μA, making the UC3572 ideal for battery powered applications.
BLOCK DIAGRAM
UDG-94094-2 |
03/99 |
ABSOLUTE MAXIMUM RATINGS
VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35V EAINV . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.6V to VCC IEAOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25mA RAMP. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 4V CS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to VCC Iout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.7A to 0.7A I3VREF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -15mA Storage Temperature . . . . . . . . . . . . . . . . . . . -65°C to +150°C Junction Temperature . . . . . . . . . . . . . . . . . . . -65°C to +150°C Lead Temperature (Soldering, 10 sec.) . . . . . . . . . . . . . +300°C
Currents are positive into, negative out of the specified terminal. Consult Packaging Section of Databook for thermal limitations and considerations of packages.
ORDERING INFORMATION
UC1572
UC2572
UC3572
CONNECTION DIAGRAM
DIL-8, SOIC-8 (TOP VIEW)
D, N or J Packages
|
TEMPERATURE RANGE |
PACKAGE |
UC1572 |
–55°C to +125°C |
J |
UC2572 |
–40°C to +85°C |
D, N or J |
UC3572 |
0°C to +70°C |
D or N |
ELECTRICAL CHARACTERISTICS: Unless otherwise specified, VCC = 5V, CT = 680pF, TA = TJ.
PARAMETER |
TEST CONDITIONS |
MIN |
TYP |
MAX |
UNITS |
Reference Section |
|
|
|
|
|
3VREF |
|
2.94 |
3 |
3.06 |
V |
Line Regulation |
VCC = 4.75 to 30V |
|
1 |
10 |
mV |
Load Regulation |
I3VREF = 0V to –5mA |
|
1 |
10 |
mV |
Oscillator Section |
|
|
|
|
|
Frequency |
VCC = 5V to 30V |
85 |
100 |
115 |
kHz |
Error Amp Section |
|
|
|
|
|
EAINV |
EAOUT = 2V |
–10 |
0 |
10 |
mV |
|
IEANV = –1mA |
|
–0.2 |
–0.9 |
V |
IEAINV |
EAOUT = 2V |
|
–0.2 |
–1.0 |
μA |
AVOL |
EAOUT = 0.5V to 3V |
65 |
90 |
|
dB |
EAOUT High |
EAINV = –100mV |
3.6 |
4 |
4.4 |
V |
EAOUT Low |
EAINV = 100mV |
|
0.1 |
0.2 |
V |
IEAOUT |
EAINV = –100mV, EAOUT = 2V |
–350 |
–500 |
|
μA |
|
EAINV = 100mV, EAOUT = 2V |
7 |
20 |
|
mA |
Unity Gain Bandwidth |
TJ = 25°C, F = 10kHz |
0.6 |
1 |
|
MHz |
Current Sense Comparator Section |
|
|
|
|
|
Threshold |
|
0.195 |
0.215 |
0.235 |
V |
Input Bias Current |
CS = 0 |
|
–0.4 |
–1 |
μA |
CS Propogation Delay |
|
|
300 |
|
nS |
Gate Drive Output Section |
|
|
|
|
|
OUT High Saturation |
IOUT = 0 |
|
0 |
0.3 |
V |
|
IOUT = –10mA |
|
0.7 |
1.5 |
V |
|
IOUT = –100mA |
|
1.5 |
2.5 |
V |
OUT Low Saturation |
IOUT = 10mA |
|
0.1 |
0.4 |
V |
|
IOUT = 100mA |
|
1.5 |
2.2 |
V |
Rise Time |
TJ = 25°C, C LOAD = 1nF + 3.3 Ohms |
|
30 |
80 |
nS |
2