Texas Instruments LF411ID, LF411CP, LF411CDR, LF411IP, LF411IDR Datasheet

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LF411

 

 

 

JFET-INPUT OPERATIONAL AMPLIFIER

 

 

 

SLOS011C ± MARCH 1987 ± REVISED OCTOBER 1997

 

 

 

 

 

 

 

 

 

D Low Input Bias Current, 50 pA Typ

D OR P PACKAGE

 

 

 

 

 

(TOP VIEW)

 

 

D Low Input Noise Current, 0.01 pA/Hz Typ

 

 

 

 

 

 

 

 

 

 

 

D Low Supply Current, 2 mA Typ

BAL1

 

1

8

 

NC

 

 

D High Input impedance, 1012 Ω Typ

 

 

IN ±

 

2

7

 

VCC +

 

 

 

 

 

 

 

 

 

 

D Low Total Harmonic Distortion

IN +

 

3

6

 

OUT

D Low 1/f Noise Corner, 50 Hz Typ

VCC ±

 

4

5

 

BAL2

 

 

 

 

 

 

 

 

D Package Options Include Plastic

 

 

 

 

 

 

 

NC ± No internal connection

Small-Outline (D) and Standard (P) DIPs

description

This device is a low-cost, high-speed, JFET-input operational amplifier with very low input offset voltage and a maximum input offset voltage drift. It requires low supply current, yet maintains a large gain-bandwidth product and a fast slew rate. In addition, the matched high-voltage JFET input provides very low input bias and offset currents.

The LF411 can be used in applications such as high-speed integrators, digital-to-analog converters, sample-and-hold circuits, and many other circuits.

The LF411C is characterized for operation from 0°C to 70°C. The LF411I is characterized for operation from ±40°C to 85°C.

symbol

IN ±

2

±

6

 

 

3

OUT

 

 

 

 

IN +

+

 

 

 

 

1

 

 

 

 

 

 

BAL1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

5

 

 

 

 

 

 

 

 

BAL2

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

AVAILABLE OPTIONS

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VIOmax

 

 

 

 

 

PACKAGE

TA

 

 

 

 

 

 

 

 

 

 

 

 

SMALL OUTLINE

PLASTIC DIP

 

AT 25°C

 

 

 

 

 

 

 

 

 

 

(D)

(P)

0°C to 70°C

 

2 mV

 

 

 

 

LF411CD

LF411CP

 

 

 

 

 

 

 

 

 

±40°C to 85°C

 

2 mV

 

 

 

 

LF411ID

LF411IP

The D packages are available taped and reeled. Add the suffix R to the device type (i.e., LF411CDR).

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

Copyright 1997, Texas Instruments Incorporated

POST OFFICE BOX 655303 DALLAS, TEXAS 75265

1

Texas Instruments LF411ID, LF411CP, LF411CDR, LF411IP, LF411IDR Datasheet

LF411

JFET-INPUT OPERATIONAL AMPLIFIER

SLOS011C ± MARCH 1987 ± REVISED OCTOBER 1997

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)

Supply voltage, VCC + . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . . . . . . . 18

V

Supply voltage, VCC ± . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . . . . . ±18 V

Differential input voltage, VID . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . . . . . ± 30

V

Input voltage, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . . . . . ± 15

V

Duration of output short circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . . Unlimited

Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . . . 500 mW

Package thermal impedance, θJA (see Note 2): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . . 197°C/W

P package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . . 104°C/W

Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

±65°C to 150°C

Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . .

. . . . . . . 260°C

NOTES: 1. Unless otherwise specified, the absolute maximum negative input voltage is equal to the negative power supply voltage.

2.The package thermal impedance is calculated in accordance with JESD 51, except for through-hole packages, which use a trace length of zero.

recommended operating conditions

 

C SUFFIX

I SUFFIX

UNIT

 

 

 

 

 

 

MIN

MAX

MIN

MAX

 

 

 

 

 

 

 

 

Supply voltage, VCC +

3.5

18

3.5

18

V

Supply voltage, VCC ±

± 3.5

± 18

± 3.5

± 18

V

Operating free-air temperature, TA

0

70

± 40

±85

°C

electrical characteristics over operating free-air temperature range, VCC ± = ±15 V (unless otherwise specified)

 

 

PARAMETER

TEST CONDITIONS

 

 

TA

 

MIN

TYP

MAX

UNIT

 

 

LF411C

 

LF411I

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VIO

Input offset voltage

VIC = 0,

RS = 10 kΩ

 

25°C

 

25°C

 

 

0.8

2

mV

αVIO

Average temperature coeffi-

VIC = 0,

RS = 10 kΩ

 

 

 

 

 

 

10

20²

μV/°C

cient of input offset voltage

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

IIO

Input offset current³

VIC = 0

 

 

25°C

 

25°C

 

 

25

100

pA

 

 

 

 

 

 

 

 

 

 

 

 

70°C

 

85°C

 

 

 

2

nA

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

IIB

Input bias current³

VIC = 0

 

 

25°C

 

25°C

 

 

50

200

pA

 

 

 

 

 

 

 

 

 

 

 

 

70°C

 

85°C

 

 

 

4

nA

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Common-mode input voltage

 

 

 

 

 

 

 

 

±11.5

 

 

VICR

 

 

 

 

 

 

 

± 11

to

 

V

range

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

14.5

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VOM

Maximum peak output-voltage

RL = 10 kΩ

 

 

 

 

 

 

± 12

± 13.5

 

V

swing

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

AVD

Large-signal differential

VO = ± 10 V,

RL = 2 kΩ

 

25°C

 

25°C

 

25

200

 

V/mV

voltage

°

°

 

°

°

15

200

 

 

 

 

 

 

0 C to 70 C

 

±40 C to 85 C

 

 

r

i

Input resistance

T = 25°C

 

 

 

 

 

 

 

1012

 

Ω

 

 

J

 

 

 

 

 

 

 

 

 

 

CMR

Common-mode rejection ratio

RS 10 kΩ

 

 

 

 

 

 

70

100

 

dB

R

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

kSVR

Supply-voltage rejection ratio

See Note 3

 

 

 

 

 

 

70

100

 

dB

ICC

Supply current

 

 

 

 

 

 

 

 

2

3.4

mA

²At least 90% of the devices meet this limit for αVIO.

³Input bias currents of an FET-input operational amplifier are normal junction reverse currents, which are temperature sensitive. Pulse techniques must be used that will maintain the junction temperatures as close to the ambient temperature as possible.

NOTE 3: Supply-voltage rejection ratio is measured for both supply magnitudes increasing or decreasing simultaneously.

2

POST OFFICE BOX 655303 DALLAS, TEXAS 75265

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