Solid State Music ssm2110 User Manual

Solid

Stqte

MicroTechnologry

lor Music

SSM

2u0

SSM

2110 AUDIO

LEVEL DETECTION

DESCRIPTION

The
logarithmic

SSM

2110

(dB)

precision

is

a

outputs, and

level

detection system

previous

unlike

with temperature.

linear

Two
configured to

outputs, true

give

In each case, {ull
A

dynamic

response time

range

at

a

on-chip temperature

of

low

peak

function.

100d8

signal

R.M.S.

and absolute value,

The

compensation is available.

is

achievable, and a unique

levels.

FEATURES

Provides

I

Wide Dynamic

I
f High Accuracy

Pre-Bias

I

SignalLevels
On-Chip Log

t

Optional Internal Log Output Temperature

T

Compensation
Low

t
I

High Speed

all

Common

Range
(0.5%)

Option

for Fast

Output

Drift

lnternal Reference

Transfer Functions

(100d8)

Response Time

Amplifier

designed

designs,

dB output can

at Low

specrfically

the dB

output

are available

provide

a log R.M.S., log

pre-bias

SYSTEM

for

audio

be internally

can

simultaneously

absolute value

circuit

enables dynamic

ABS

(Att:t

t

t).,

r()a;(HNt:j)

(

t

applications. lt features both linear and

compensated

the

and

latter can be

or

range

II |\/

LJASI

|vt

)l;

VAI

v t

V

(.lNt)

()l.

r

:-

)

42r,

,.

S

,,
;
s 11

lI

1l

PrN

OUT

\_-,'

,

,1

for

log mean value

to be

1

O

(TOP

factor

scale

changes

alternatively

function.

traded for faster

18

1/

lti

1.1

lil
1i,

lt)

V|EW)

Au

@c

(rONVl

Solid State Micro
(4081

7 27-0917

Te lex 1 71

V I')

tlTF:u

Technology for

1 89

Music,

Inc., 20768 Walsh

BLOCK

Avenue, Santa

DIAGRAM

Clara. CA 95050, USA

PB[

IOC] RtCT)VLRY

I

LIVPLI]ATL.-]BI

o

BIAS

@v

DIV DtH

AMPI ]f IIF

-PATENTS

ALrgust

Rev.

L

U(;

FI

CJ(JVE tIY

lRAtistsloFl

@

PENDING

1986

GENERAL
The

SSM2110
2110 are done
The linear
value

and

shifting component

is designed to operate off split supplies

in

terms of currents

outputs, absolute

log

RMS,

of

appear as

which may be switched between the
voltage regulator which is
log

output(s)
compensation
thermal
pin

INPUT
The

current
to allow at
band.
20dB of

gain

proper

3 for

(pin

(pin

input

the device

least 20dB of

With * 15 volt

headroom, a
must be used as
It is also
will

possible

limited by the

be

ground

to

can be defeated

drift of a

VCA

operation of the

17)

17) is an A.C.
process

can

headroom in

supplies,

nominal

a D.C. block to avoid

to D.C.

couple

resistor matchinq

value

Z5

about

and also

for

dB/volt

rest

virtual

is in

.l0K

a

signal

into the 2110

in the range from * 12V to

rather than voltages, the device

(pin

1) and

voltages

on

(pin

RMS
pins

2 and 6 respectively. The log recovery transistor is

two log

volts

above the

negative

to temperature compensate

certain applications

port.

control

the

of

ground

excess of

order

lf the log recovery amp is not used,

circuit.

with about a

100dB

process

to

input resistor will

would

level

be 300pA

such as compressor/limiters where the log

1 .4Y

(3

mA

hrgh

yield

impairrng the dynamic

using the

by

the op amp offset.

and

presented

5) are
outputs.

supply.

the KT/q term in

D.C. offset

to 30nA

factor material

crest

proper

the

pp

or 3V

range

in Figure 1A. However the low

circuit

'-

has

an extremely wide

as currents while log

This will reference

The log recovery

voltage.

peak

to

The useful dynamic range

peak).

and

maximum input

pp

at

low

which is

signal

about 0dBV

levels

1BV.

Since the

dynamic

the

amplif

log

the

pins

10 and 11 MUST

The input

to

RC network is

provide
current of

(many

electrolytic types won't work).

level

computations

range

and bandwidth.

outputs,

log

output(s)to the internal

ier is

used to rereference the

trans{er

log

of absolute

internal

an

characteristic.

will

drift

cancel the

be connected to

of signal input

usually chosen

D.C.

a

block below the

t

1

.5mA. lf

A very low leakage

of the

end

one allows for

capacitor

dynamic

the

of

level

This

audio

range

V

OI]I

,/

()tJT

,.

V

OIJI

NO] ES

1) CONNECT OUTPUI
IF

OUTPUI(S)

CAN

2) C^
VALUE OUTPUT
IS RECOMMENDID
STABILITY

3) CONNECT
BASE OF

4) OPTIONAT
CAP USED

5)
ABSOTUTE

P|NS r0

6)

IF tOG RECOVERY

NOT

USED

BE TJSED

LOG

AND 11

IO AVTRAGE ABSOIUTL

A

VALUF OF 50pF

EITHER tOG AV

RECOVERY TBANSISTOR

PBE BIAS CONNECT ON

TVERAGING

FOR

VALUE

OUTPUT.

MUST BE

F

TO

PIN(S)

TO ENSURF UNCONDIT]ONAI

AMP S NOT USED

GROUND

MlNll'/UN/

BMS TO

tOG

OR

LOG OF

CONNECTFD

I

FIGURE

TO P N 3

1.

2110 CONNECTION

t

OPTIONS

TO PIN ]3

FIGURE 1A

THE RMS

COMPUTTNG

LOOP

(PlN

13, PIN

AND PIN 18)

5,

The RMS section of

time

The
effective

The
expense
value by a

By use of the
signal
connected

constant

value is 10.8K. Again, a

pre

bias

to the dynamic

factor of 10

level

continues

between

LINEAR OUTPUTS

The instantaneous absolute
similarly appears

For

volts.
series
wants

More commonly a

linear

a
for the conversion
feedback resistor
obtain
proper

peak

A
time constant

simple

with the

average of absolute

an

output

an average of

device operation.

output

the

for averaging

pin (pin

pre

1B), can be used

for

pin,

bias

to decrease.

pin

(pin

as a current

appfications

pin(s)

to

positive

pin

to the
is

determined

for

stability

absolute

can be

is

implemented by u'.ring

to the

equal

SSM2110

range. Below a

every

one

18 and

1

value

ground.

going

virtual

An unused

product

consists of an

is determined by
very low leakage cap

to increase the speed of

10pA

20ciB drop

insure that the

can

The

-

and

into

it is

value output, a capacitor

voltage at

ground

by

particularly

value

given

Vee is

pin

5)

the inpul siqnal appears as a clrrrent

of

pin

With r l5

5.

possible

For a maximurn 3mA

of an op amp

the value of the

output.

linear

'l,ror

R(,u

implicit RMS computing

lo - l'^ / io

pp

in level.

equation

i"l.

'ir,r.v

to convert

low inpedance is desired as an output.

if a high

The linear

output

the circuit

r).

where io

the value of the averaging cap on

input level

loop

relating lhe maximum lime constant increase to the resistors value

by:

1o|il

-

volt

supplies the

configured as a current to

feedback resistor. A small capacitor is usually

slew

should be connected

loop whose

is

the average o{

must

be used

the time

tirne constant

t

&q

6.BV

these

currents

pp

input

can be added

rate FET input op amp

output

in fig.

3c.

for

C,^, to

the RMS

constant of

will not increase

Fig" 2

see

into

voltaqe compliance

to output

tlre resistor(s) value

signal

parallel

in

pins

must be kept within their voltage

ground.

to

The

output scale

(pin

output

lo

.13

pin

and an internal resistor whose

prevent

computing

the RMS loop

pin

voltage

with

voltage

is

limiting

1 . The true RMS value

on these

the

This

can be

convertor

This

used.

factor is

the

loop

at
will

above a chosen

signals

should be 3.6K or less. lf

resistor

accomplished by connecting

capacitor

determined by

5) obeys the

dynamic

low

signal levels

increase

outputs

by

connecting a

(fig.

(fig.
added

from its nominal

maximum

of the input

is from + 15

3a).

The

3b).

parallel

in

be made large

can

compliance

Rout.

equation

range.

at some

resistor

scale

with the

range

The decay

the

as

signal
to " 6

in

one

factor

to

for

FIGURE

2. NORMALIZED

TIME CONSTANT

RELATIVE TO 1mA

R.M.S.

-CAPACITOR

FIGURE 3C.

FOR AVERAGING

ABSOLUTE VALUE OUTPUT.

LOG

OUTPUTS

(pins

2,6,7

and 8)

The log

respectively. However,

6

in

order to be

the log recovery

and
outputs, only

over

Q11
output
output

temperature
The log

negative

time

constant

capacitor and the

might think that

One

However, since

proportional

are
antilog lerms cancel, and
value

of

therefore is

LOG

RECOVERY AMPLIFIER

log

The
absolute temperature.
connected

This

corresponds

the

and
performance

in

series

compressor/limiter

is * 260pA. The

above
output
offset and scale

The

range to be

SSMT

instantaneous

the

of

these outputs

made

useful.

transistor

log

one

the

dynamic
impedance will be low enough to drive the
sensitivity

coefficient of + 3300ppm/'C.

absolute value output can be converted to a

of

supply. Since this

of

input

the

the

recovery amplifier is a

to the internal voltage

negative supply.

which

with a

applications staff

output

range

at this

the

output

resistor from

connecting a capacitor

the

capacitor

to

the antilog of the signal at

current.

log

of the average of

One

to

about

is an

silicon diode

applications.

output current can

ground

from

factor

trims can be

absolute value and the log of true R.M.S.

must

be buffered,

Figure

point

is an emitter follower

the capacitor rs

This

4 shows

Q11.

can

of

following a large

input

recovered at a time.

be

the

device

is

about + 60mV

pin

2 to the

enforces an ac

effectively

the

(pins

linearized

is usually connected to the

reference

the recommended

Note that

will be roughly

negative

to

ground

charged as a

inverts

absolute

10,

9,

voltage to

(pin

r,,(pine)

4.7K for

ol

pin

maximum

The

5 or

used

.25 V is

of about a

12 to

be converted to a voltage with the

+ 10 volts.

improve

to

questions

for

3.2pAldB. 1

A value

improvement

from

to +

is

available

although

for

output,

signal

the log output would

the

the order of

value

11, and

3).

'

the

this

the

output

levelshifted

connection
the log
With

the

symetrical about

log recovery

10dB

every

log

mean value

of

response

the

level

decrease

supply.

the

at

emitter of the output transistor,

base. Since the base

linear integrator wrth

the

the input

of

12)

current transconductor whose

The output

2tv(Pi^-

1.8K

voltage

resistor

factor

negative

This circuit

unit to unrt repeatability.

on

current at

UqL

x

2B0uA ' Rscale

across the

gives

40

of

over the

supply,

current for both

allows

this

or

the

of

input signal appears

in many

and,

between

recovery transistor

resistor

amp

of signal level increase

averaging

signal.

emitter of

values

the

input(s) without introducing

by

to a large

will

be

produce

voltage

and loggrng

pin

applications, temperature

the

can be

shown, the

internal negative

connecting a capacitor between

level

signal

determined by the

the

average

is the log

a current directly

operations. The

gain

the log recovery

given

is

9

by.

!lP!11)Ll'?sv

Rscale

best overall linearity

uncompensated

the temperature

for an

any other SSMT device.

resistor which rs

compensation can

the

compensated and uncompensated examples

in Figure

circuit

arbitrary choice of

voltages

as

compensated

log

output

at 25"'C. Thrs

of

the

and temperature

drift. lf

transistors

switched

output swing

voltage

increase will

the log

capacitor charging currents

of

absolute
proportional

can be

transistor

5.

between

at

relerence.

significant

sensitivity

be

product

connected

one connects a 2K

Usually,

range

of the averaging

the

of

absolute value.

value,

to the

signal at the output

proportional

made

while the other is

between

compensation

be defeated for

would like

one

and scale factor.

pins

on

Q2

the

pin

fast while

2

and

Q10,

the two log

emitter

Also,

errors

the

The

has

2

and

log

and

absolute

prn

resistor

The

and

of

the

a

the
the

to

12

the

FIGURE

llCALt

IUM

5.

SPECIFICATIONS-

Following Specifications

The

OPERATING

-

Apply for V.

TEMPERATURE

25"C to

- *

+ 75"C

15V Tn - 25'C and

R,"nr"

STORAGE

-

55"C to

.

4.7K{L unless otherwise

TEMPERATURE

+ 125'C

noted.

PARAMETER

Dynamic

Useful
Linearity Error
Mean Output

RMS

Output

Unadjusted

(Mean

Error
Output Offset

(Mean

t o{

Shif

(RMS

Factor

Crest

For

0.1d8

For

0.5d8

For'l .OdB

RMS Filter

(1"u.

Frequency

For

0.1 dB
1,"
l,^
l*

For 0.5d8

1,"
1," 1OpA RMS
l,* 1pA RMS

3dB
l"
l,*
l,* 1pA RMS

Amp

Log
Max Log
Log

Scale
Mode Zero

Log

(pin

s)

Amp Linearity

Log
Log

Output

(pin

V",,

Positive
Negative

Supply

'Finial

specifrcations subject to change

Range

40dB Dynamic
60dB Dynamic

Dynamic

80dB

40dB Dynamic

Dynamic Bange

60dB

Dynamic Range

BOdB

(pin

Gain

RMS)

or

Current

RMS

or

lu" with R0,",,,,. 3Ml

Only)

(rr

1mA RMS
Additional Error
Additional Error
Additional Error

Time

'

,.

,'

Voltage Range

Conslanl

10p ARMS)

Response

Additional Error

1mA BMS

1OpA BMS
IpARMS

Addilional Error

,lmARMS

Bandwidth

1mA

RMS

1OpA

RMS

Output Ollset Current

Amp

Output

(pin

Factor

Crossing

(pin

Tempco

to Vr,)

3

Supply Current

Current

Supply

Range
Range
Bange

Range

pin

1

5)

or

I

(Sine

Wave)

(pin

9)
pin

2 or

6)

(Mean

9)

(prn

9)

(Quiescent)

(Quiescent)

(pin

RMS)

or

9)

0.475

70

320

21

-12

110

.005

0.25
.005

0.25

0.500

1

1KO x

400

1 000

1

300

*
+

2.63

.04

.04

5

50

2.5
5
B

10

2

50

7.5

500
50

3.3

265

16

10

0.1

-75

75

C,",

0.525
*

0.5

20

120

025
,

150

BO

500

330

+18

dB
dB

dB

dB
dB
dB
dB

dB
nA

nA

kHz
kHz
kHz

kHz
kHz
kHz

kHz
kHz
kHz

pA

pA

mVdB

pA
dB

pA

mA

CONDITIONS

50nA

kr 1,,, * 1mA
kr l*

(r

tt
RMS in to

0"c-

l'" 0
l"

.::,

l,"PP

PP

0

l, - 0

25"C

get

zero out

r

240mV

240mV' V,,,,,,,,

T^. 75',c

0

.::.

5mA

PP

V",*,,

c.,

SoUd

Solid State Micro Technology
licenses

are implied.

cannot assume

Solid State Micro Technology

1984 by

Stcile

State

Solid

responsibility for

reserves

Micro Technology, Inc., 20768 Walsh Avenue,

Mtqo

use of any

right,

the

All

Rights Reserved

ffiil

circuitry

described other

at any time

wrthout notice, to

Technologry

Ior

Music

than the circuitry entirely embodied

change said

circuitry.

Santa Clara, CA

'

r

in an SSMT

95050.

product.

No other circuit