2 Mbit ROM + 1 Mbit / 2Mbit / 256 Kbit SRAM
ROM/RAM Combo
SST30VR021 / SST30VR022 / SST30VR023
FEATURES:
•ROM + SRAM ROM/RAM Combo
–SST30VR021: 256K x8 ROM + 128K x8 SRAM
–SST30VR022: 256K x8 ROM + 256K x8 SRAM
– SST30VR023: 256K x8 ROM + 32K x8 SRAM
•ROM/RAM combo on a monolithic chip
•Equivalent ComboMemory (Flash + SRAM): SST31LF021E for code development and pre-production
•Wide Operating Voltage Range: 2.7-3.3V
•Chip Access Time
– |
SST30VR022 |
70 ns |
– |
SST30VR021/023 |
500 ns |
Data Sheet
•Low Power Dissipation:
–Standby: 3 µW (Typical)
–Operating: 10 mW (Typical)
•Fully Static Operation
–No clock or refresh required
•Three state Outputs
•Packages Available
–32-pin TSOP (8mm x14mm)
PRODUCT DESCRIPTION
The SST30VR021/022/023 are ROM/RAM combo chips consisting of 2 Mbit Read Only Memory organized as 256 KBytes and Static Random Access Memory organized as 128, 256, and 32 KBytes.
The device is fabricated using SST’s advanced CMOS low power process technology.
The SST30VR021/022/023 has an output enable input for precise control of the data outputs. It also has two (2) separate chip enable inputs for selection of either RAM or ROM and for minimizing current drain during power-down mode.
The SST30VR021/022/023 is particularly well suited for use in low voltage (2.7-3.3V) supplies such as pagers, organizers and other handheld applications.
FUNCTIONAL BLOCK DIAGRAM
RAMCS#
ROMCS#
OE#
WE#
AMS-A0
Control |
Circuit |
Address Buffer
RAMCS#
OE#
WE#
RAM
ROMCS#
OE#
ROM
Data Buffer
DQ7-DQ0
Note: AMS = Most Significant Address |
380 ILL B1.1 |
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©2001 Silicon Storage Technology, Inc. |
The SST logo and SuperFlash are registered trademarks of Silicon Storage Technology, Inc. |
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S71135-02-000 4/01 |
380 |
ComboMemory is a trademark of Silicon Storage Technology, Inc. |
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These specifications are subject to change without notice. |
2 Mbit ROM + 1 Mbit / 2Mbit / 256 Kbit SRAM ROM/RAM Combo SST30VR021 / SST30VR022 / SST30VR023
Data Sheet
A11 1
A9 2
A8 3
A13 4
A14 5
A17 6 RAMCS# 7
VDD 8
WE# 9
A16 10
A15 11
A12 12
A7 13
A6 14
A5 15
A4 16
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32 |
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OE# |
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31 |
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A10 |
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30 |
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ROMCS# |
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29 |
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DQ7 |
Standard Pinout |
28 |
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DQ6 |
27 |
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DQ5 |
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Top View |
26 |
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DQ4 |
25 |
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DQ3 |
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Die Up |
24 |
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VSS |
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23 |
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DQ2 |
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22 |
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DQ1 |
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21 |
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DQ0 |
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20 |
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A0 |
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19 |
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A1 |
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18 |
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A2 |
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17 |
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A3 |
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380 ILL F01.0
FIGURE 1: PIN ASSIGNMENTS FOR 32-PIN TSOP
TABLE |
1: PIN DESCRIPTION |
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Symbol |
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Pin Name |
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AMS1-A0 |
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Address Inputs, for ROM: AMS = A17, for RAM: AMS =A16 for SST30VR021 |
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A17 for SST30VR022 |
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A14 for SST30VR023 |
WE# |
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Write Enable Input |
OE# |
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Output Enable |
RAMCS# |
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RAM Enable Input |
ROMCS# |
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ROM Enable Input |
DQ7-DQ0 |
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Data Input/Output |
VDD |
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Power Supply |
VSS |
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Ground |
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T1.2 380 |
1. AMS = Most significant address
©2001 Silicon Storage Technology, Inc. |
S71135-02-000 4/01 380 |
2
2 Mbit ROM + 1 Mbit / 2Mbit / 256 Kbit SRAM ROM/RAM Combo
SST30VR021 / SST30VR022 / SST30VR023
Data Sheet
Absolute Maximum Stress Ratings (Applied conditions greater than those listed under “Absolute Maximum Stress Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these conditions or conditions greater than those defined in the operational sections of this data sheet is not implied. Exposure to absolute maximum stress rating conditions may affect device reliability.)
Operating Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -20°C to +85°C Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65°C to +150°C Voltage on Any Pin Relative to VSS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to VDD + 0.5V Voltage on VDD Supply Relative to VSS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 4.0V Power Dissipation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.0W Soldering Temperature (10 Seconds Lead Only) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C
OPERATING RANGE |
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Range |
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Ambient Temp |
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VDD |
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Commercial |
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0°C to +70°C |
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2.7-3.3V |
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Extended |
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-20°C to +85°C |
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2.7-3.3V |
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AC CONDITIONS OF TEST |
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Input Pulse Level . . . . |
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.0-VDD |
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Input & Output Timing Reference Levels . . . . . |
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.VDD/2 |
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Input Rise/Fall Time . |
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. 5 ns |
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Output Load . . . . . . . |
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. CL = 30 pF for |
70 ns |
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Output Load . . . . . . . |
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. CL = 100 pF for 500 ns |
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TABLE |
2: RECOMMENDED DC OPERATING CONDITIONS |
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Symbol |
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Parameter |
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Min |
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Max |
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Units |
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VDD |
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Supply Voltage |
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2.7 |
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3.3 |
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V |
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VSS |
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Ground |
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0 |
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0 |
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V |
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VIH |
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Input High Voltage |
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2.4 |
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VDD + 0.5 |
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V |
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VIL |
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Input Low Voltage |
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-0.3 |
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0.3 |
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V |
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T2.0 380 |
TABLE |
3: DC OPERATING CHARACTERISTICS |
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VDD = 3.0 ± 0.3V |
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Symbol |
Parameter |
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Min |
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Max |
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Units |
Test Conditions |
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IDD1 |
ROM Operating Supply Current |
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4.0+1.1(f)1 |
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mA |
ROMCS#=VIL, RAMCS#=VIH, |
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VIN=VIH or VIL, II/O=Opens |
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IDD2 |
RAM Operating Supply Current |
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2.5+1(f)1 |
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mA |
ROMCS#=VIH, RAMCS#=VIL, II/O=Opens |
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ISB |
Standby VDD Current |
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10 |
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µA |
ROMCS#≥ VDD-0.2V, RAMCS#≥ VDD-0.2V |
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VIN≥ VDD-0.2V or VIN ≤ 0.2V |
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ILI |
Input Leakage Current |
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-1 |
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1 |
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µA |
VIN=VSS to VDD |
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ILO |
Output Leakage Current |
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-1 |
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1 |
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µA |
ROMCS#=RAMCS#=VIH or OE#=VIH or |
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WE#=VIL, VI/O=VSS to VDD |
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VOL |
Output Low Voltage |
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0.4 |
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V |
IOL = 1.0 mA |
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VOH |
Output High Voltage |
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2.2 |
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V |
IOH = -0.5 mA |
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1. f = Frequency of operation (MHz) = 1/cycle time |
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T3.3 380 |
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©2001 Silicon Storage Technology, Inc. |
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3 |
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S71135-02-000 4/01 380 |
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2 Mbit ROM + 1 Mbit / 2Mbit / 256 Kbit SRAM ROM/RAM Combo SST30VR021 / SST30VR022 / SST30VR023
Data Sheet
TABLE 4: CAPACITANCE (Ta = 25°C, f=1 Mhz)
Parameter |
Description |
Test Condition |
Maximum |
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CI/O1 |
I/O Pin Capacitance |
VI/O = 0V |
8 pF |
CIN1 |
Input Capacitance |
VIN = 0V |
6 pF |
T4.1 380
1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.
VIHT
INPUT |
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VIT |
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REFERENCE POINTS |
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VOT |
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OUTPUT |
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VILT |
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380 ILL F08.0 |
AC test inputs are driven at VIHT (0.9 VDD) for a logic “1” and VILT (0.1 VDD) for a logic “0”. Measurement reference points |
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for inputs and outputs are VIT (0.5 VDD) and VOT (0.5 VDD). Input rise and fall times (10% ↔ |
90%) are <5 ns. |
Note: VIT - VINPUT Test
VOT - VOUTPUT Test
VIHT - VINPUT HIGH Test
VILT - VINPUT LOW Test
FIGURE 2: AC INPUT/OUTPUT REFERENCE WAVEFORMS
TO TESTER
TO DUT
CL
380 ILL F09.0
FIGURE 3: A TEST LOAD EXAMPLE
©2001 Silicon Storage Technology, Inc. |
S71135-02-000 4/01 380 |
4