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np-n310
Schematics
46 pgs2.44 Mb0
User Manual
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Specifications
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Samsung np-n310 Schematics

- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -
Samsung
Confidential
21
DIAMONDVILLE (N270)
27
22
Page.
Page.
DRAW
EXCEPT AS AUTHORIZED BY SAMSUNG.
36~42
Revision :
PROPRIETARY INFORMATION THAT IS
POWER
INFORMATION
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
45 Test Points
32Page. MMC
33~34Page. MICOM & GLUE LOGIC
35Page. LED-Switch
Page. 43 SUB-BOARD (SIM CARD)
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
2~7
Page.
T.R. Date :
Page.
PROPRIETARY INFORMATION THAT IS
PEBBLE
THIS DOCUMENT CONTAINS CONFIDENTIAL
SAMSUNG PROPRIETARY
1
SATA HDD
BIOS CODE
23~26Page. AUDIO
Page.
Page. LAN
28Page.
SAMSUNG
Page.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
20
THERMAL SENSOR
APPROVAL
PROPRIETARY INFORMATION THAT IS
ELECTRONICS
Page.
COVER
Page.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
16~19
BA41-01066A (GCE)
Page.
SAMSUNG ELECTRONICS CO’S PROPERTY.
0.3
10~11
Page.
Model Name :
GRAPHIC I/F
BA41-01067A (NY)
BA41-XXXXXX (HS)
EXCEPT AS AUTHORIZED BY SAMSUNG.
Table of Contents
Page.
SAMSUNG PROPRIETARY
SAMSUNG ELECTRONICS CO’S PROPERTY.
2009.02.12
Page.
12~15
Page. MINI-CARD (Wireless/HSDPA
30~31
Page.
9
USB
CLOCK GENERATOR (CK-505M)
CALISTOGA (INTEL945GSE)
Remarks :
Page.
CHECK
INTEL DIAMONDVILLE
DDR2 SODIMM
INTEL 945GSE
44 MOUNT HOLE
EXCEPT AS AUTHORIZED BY SAMSUNG.
PEBBLE
8
Dev. Step :
PCB Part No :
THIS DOCUMENT CONTAINS CONFIDENTIAL
Chip Set :
SAMSUNG ELECTRONICS CO’S PROPERTY.
PV
ICH7-M
CPU :
29
- This Document can not be used without Samsung's authorization -
8. Block Diagram and Schematic
N310
8-1
8-2
8. Block Diagram and Schematic
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -
- This Document can not be used without Samsung's authorization -
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Confidential
SAMSUNG PROPRIETARY
EXCEPT AS AUTHORIZED BY SAMSUNG.
SAMSUNG
MINI CARD1
Page11~12
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
HDD
CPU
LAN
PCI_ EXP1
RJ45
200P
MICOM
Page
Power S/W
GMCH
P0
TFT_LCD
Audio
SPI ROM
High Definition Audio
DDR2-SODIMM
HP
KEYBOARD
TOUCHPAD
Aud.
VGA
P1
P7
945GSE
2P
HSDPA/Wibro
OPERATION BLOCK DIAGRAM
CPU2_THERMDA/DC
Space bar
Page 21
P5
P6
USB (1):debug port
MINI CARD2
Page8(block)
THIS DOCUMENT CONTAINS CONFIDENTIAL
option
LVDS
998 uFCBGA Type
EMC2102
SAMSUNG ELECTRONICS CO’S PROPERTY.
Page 17~20
ELECTRONICS
AU6371
Page8(block)
H8S-2110B
533 MHz
THERMAL
CardBus
Page9(block)
2P
P/S2
Page26
LAN CONTROLLER
Page 22~25
Wireless LAN
Page9(block)
DIAMONDVILLE
Page9(block)
CK-505
533MHz FSB
RTC
MIC-IN
PCI_ EXP
88E8040
CLOCK
PROPRIETARY INFORMATION THAT IS
P4
MAX 1 GB
Bluetooth
SPKR L
USB2.0
USB (3)
AMP
SATA
2P
SIMM Card
P2
SPI
Module
option
82801 GBM
MONITOR
CRT
652 FCBGA Type
SPKR R
P3
ICH7-M
ALC272
HDAUDIO
PCI_ EXP2
ICH
Page 13~16
SYNAPTICS
2.5inch
Transformer
GENERATOR
8.9"/10.2" WIDE
1.3M Camera
437 uFCBGA Type
Page8(block)
LPC
3in1 B’d
Batt.
PCI_ EXP3
USB (2)
8-3
8. Block Diagram and Schematic
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -
- This Document can not be used without Samsung's authorization -
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I C / SMB Address
Devices
Primary DC system power supply (9 to 19V)
P3.3V_AUX
Programable
Address
3
Wireless LAN
ICH7M
3
CAMERA
UHCI_0
VDC
ELECTRONICS
SAMSUNG ELECTRONICS CO’S PROPERTY.
A
2
C
ASSIGNED TO
Port Number ASSIGNED TO
7
SAMSUNG
P5V_AUX
4
5.0V switched power rail (off in S3-S5)
Interrupts
USB PORT
BLUETOOTH
HSDPA
AD24(internal)
UHCI_3
UHCI_2
Descriptions
2
USB PORT Assign
1
Port Number
P0.9V
3.3V switched power rail (off in S3-S5)
VTT for CPU, Calistoga & ICH7-M
3.3V (can drop to 2.0V min. in G3 state) supply for the RTC well.
P3.3V
CPU_COREBP5V
PRTC_BAT
D
PCI Express Assign
PCI Devices
Voltage Rails
3-IN-1
PROPRIETARY INFORMATION THAT IS
5.0V power rail (off in S4-S5)
LPC Bridge/IDE/AC97/SMBUS
CPU Thermal Sensor
1
A
B
CK-505M (Clock Generator)
0111 101X
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
SMBUS MasterMaster
5
4
BOARD INFORMATION
Internal MAC
AD29(internal)
AD30(internal)
AD31(internal)
P1.5V 1.5V switched power rail (off in S3-S5)
ASSIGNED TO
Mini Card 1(Wireless LAN)
LOM
Thermal Sensor7Ah
3
Mini Card 2 (HSDPA/Wibro)
USB PORT
USB PORT
3.3V always power rail(for Micom)
P3.3V_MICOM
Port Number
Power Rail
4
C
A0h -
THIS DOCUMENT CONTAINS CONFIDENTIAL
1.8V power rail for DDR (off in S4-S5)
SODIMM0
SCHEMATIC ANNOTATIONS AND BOARD INFORMATION
SAMSUNG PROPRIETARY
0
0.9V power rail for DDR (off in S4-S5)
EXCEPT AS AUTHORIZED BY SAMSUNG.
1
2
1101 001X D2h Clock, Unused Clock Output Disable
1
UHCI_1
#
TNG/Q
E
R#LE
S
DIs
ec
iv
e
D
Bus
2
D
6
USB
Hub to PCI P1.05V(VCCP)
Hex
2
3
3.3V power rail (off in S4-S5)
Core voltage for Atom CPU
1010 000X
P1.8V_AUX
8-4
8. Block Diagram and Schematic
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -
- This Document can not be used without Samsung's authorization -
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CALISTOGA
3
ICH8-M
P3.3V_AUX
+V*LAN
S4
MICOM
ON
CALISTOGA
S5-S4
SAMSUNG
AUX DISPLAY
ICH7-M
S3
ICH7-M
PROPRIETARY INFORMATION THAT IS
ON
D
A
P1.05V
+V*A(LWS)
SAMSUNG PROPRIETARY
2
P1.2V_LAN
+0.9V
Thermal Sensor
Power On/Off Table by S-state
DDR II-Termination
B
P1.8V_AUX
SODIMM (DDR III)
M_PCI
ON
1
ON
S3
(CHP3_SLPS3*)
LEDs
VCCP3_PWRGD
+V* (CORE)
ON
P2.5V_LAN
ON
(CHP3_S4_STATE*)
P5.0V_ALW
THIS DOCUMENT CONTAINS CONFIDENTIAL
2
ON
LAN
PCMCIA
HDD
P0.9V
AC Adapter
VDC
P1.5V
ON
4
MICOM
P12.0V_ALW
Rail
ICH7-M
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
P2.5V
Rev 0.1
A
D
ON
S0
3
SPI
C
LAN
State
CRESTLINE
BT
P5V_AUX
KBC3_PWRON
MDC
CPU_CORE
4
MICOM
DIAMONDVILLE
POWER DIAGRAM
P3.3V
S5
M_PCI
KBC3_SUSPWR
P3.3V_MICOM
P1.8V_LAN
ELECTRONICS
LCD
DIAMONDVILLE
P5.0V
ICH7-M
SODIMM
B
S0
ON
Battery DC
+1.8V_AUX
+V*AUX
+V
USB
LAN
ON
1
ICH7-M
FAN CIRCUIT
C
CRT
ON
EXCEPT AS AUTHORIZED BY SAMSUNG.
SAMSUNG ELECTRONICS CO’S PROPERTY.
8-5
8. Block Diagram and Schematic
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -
- This Document can not be used without Samsung's authorization -
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2.5V ( TBD A )
2.5V
0.14 A
1.8V_AUX
1.5A
Sensor
3
1
3.72 A
Calistoga
220V
( 2.5 W )
1 A (TBD)
1.8V_AUX
Rev. 0.6 (060920)
0.22 A (TBD)
5V
ELECTRONICS
0.209 A (TBD)
0.16 A
P3.3V_AUX
P1.2V_LAN
ICH7-M
0.001 A (TBD)
4
4
1.8V_AUX
0.95 A
A
Mini Card X 2
1.5 A (TBD)
Diamondville
2.5 A
1.05V
ITP
MICOM 3V
PWR LED
1.05V
Thermal
3.3V
3.3V_AUX
( ~ 5.0 W )
LAN (88E8057)
0.006 A (TBD)
0.015 A (TBD)
RTC_Battery
VGA CORE (TBD A)
0.6 A (TBD)
LAN
1.05V (VCCP)
3.3V
3.3V_AUX
DDR-2
HD Audio
0.07 A (TBD)
USB (x 3)
SD Card
2 A (TBD)
3.3V
KeyBoard
D
3.3V ( TBD A )
1.8V_AUX ( TBD A )
B
0.5 A (TBD)
0.75A (TBD)
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
1.5V
0.08 A (TBD)
3.3V (LCD 3V)
LCD
SAMSUNG
3.3V
0.1 A (TBD)
1
FAN
5V
CPU CORE ( TBD A )
0.25 A (TBD)
Audio AMP
0.06 A (TBD)
5.0V_AUX ( TBD A )
5V
0.29 A (TBD)
0.15 A (TBD)
1.5 A (TBD)
5V
GMCH
5V
0.2 A (TBD)
0.78 A
3.3V
CLOCK
1.5V
P5.0V_LED (VDC INV)
0.35 A
C
5V_AUX
1.05V (MCH CORE)
MICOM 3V
KBC
0.01 A (TBD)
KBD LED
SATA HDD
0.16 A (TBD)
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
1.5V
3.3V
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
5V
3.3V
1.05V ( TBD A )
1.5V ( TBD A )
1.6A
0.421 A
0.9V( TBD A )
MICOM 3V ( TBD A )
1.5V
3.1 A (TBD)
5.0V ( TBD A )
3.3V_AUX ( TBD A )
Adapter Battery
0.2 A (TBD)
Touch Pad
(4 W )
( 1.5 W )
0.001 A (TBD)
2.2 A
A
B
0.13 A
CPU CORE
PEX IO (TBD A)
VDC INV ( TBD A )
0.08 A (TBD)
0.6 A
P1.8V/2.5V_LAN
0.08 A (TBD)
0.9V
RTC_Battery
2
2
SPI
3.3V
D
C
3.3V_AUX
0.75 A (TBD)
0.1 A (TBD)
3.3V_AUX
3.3V
5V
POWER RAILS ANALYSIS
3.3V
0.1 A (TBD)
3
8-6
8. Block Diagram and Schematic
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -
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Confidential
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22-0) PLT3_RST#
14-3) P0.9V
3
15-2) VCCP
D
PAGE 26
21-0) CPU1_PWRGDCPU
19-0) VRM3_CPU_PWRGD
SAMSUNG PROPRIETARY
MIC5219
15-1) P2.5V
13-1) MEM_VREF
PROPRIETARY INFORMATION THAT IS
5-1)P5V_AUX
12-1) CHP3_SLPS5*/S3*
RCIN*
1
AUDIO
16-0) VCCP_PWRGD
SI3433
2
2-1) MICOM_P3V
17-1) VCC_CORE
3
15-0) KBC3_PWRON
2-1) P5.0V_ALW
S/W
14-2) P1.5V
22-0) PLT3_RST*
P1.5V_AUX & VCCP
Memory
Battery Mode
TPS51120
2-0) VDC
24-0) A20M#/IGNNE#/INTR/NMI
13-1) P0.9V
SC486
ICH7-M
5-1) P3.3V_AUX
24-0) A20M#/IGNNE#/INTR/NMI
4-2) P1.8V_P2.5V_LAN
RTC
15-2) VCCP
26-0) CPU BIST
CPU
CPU
15-1) P2.5V
MINI PCIE
SAMSUNG ELECTRONICS CO’S PROPERTY.
VDC
14-2) P1.5V
CLOCK
PAGE 28
1-0) PRTC_BAT
25-0) INIT#
PAGE 43
P5V_AUX & P3V_AUX
PAGE 27
4
15-0) KBC3_VRON
PAGE 41
PAGE 9
B
14-1)P5V
PAGE 40
POWER
14-2) P1.5V
LAN_RESET*
DDR2 POWER
DDR2
18-0) VRM3_CPU_PWRGD
23-0) KBC3_CPURST*
BCP69-16
PAGE 44
16-0) VCCP_PWRGD
5-1) P3.3V_AUX
C
PAGE 29
14-2) P5.0V
5-0) AUX5_PWRGD
14-2) P3.3V
VRM
A
14-1)P5V
1-1) CHP3_RTCRST
A
SAMSUNG
15-1) P2.5V
3-0) KBC3_CHKPWRSW*
Monitor
12-0) KBC3_PWRBTN*
TPS51120
PAGE 18
THIS DOCUMENT CONTAINS CONFIDENTIAL
HDD
PAGE 39
GIGABIT TRANSFORMER
2
15-0) KBC3_VRON
SC415
19-0) VRM3_CPU_PWRGD
15-0) KBC3_PWRON
POWER SEQUENCE BLOCK DIAGRAM
(2)
14-0) KBC3_PWRON
Thermal
PAGE 44
20-0) KBC3_CPUPWRGD_D
8-1) P3.3V_AUX
4-0) KBC3_SUSPWR
88E8057
SI3433
14-0) KBC3_PWRON
4-1) P3.3V_AUX
LFE9261
AMP
8-3) P1.5V
14-3) P0.9V
6-1) P5V_AUX
PAGE 44
23-0) CPU1_CPURST*
(1)
22-0) PLT3_RST*
PAGE 44
14-2) P1.5V
B
21-0) CPU1_PWRGDCPU
14-1) P3.3V
18-0) VRM3_CPU_PWRGD
EXCEPT AS AUTHORIZED BY SAMSUNG.
Devices
4-0) KBC3_SUSPWR
4-2) P3.3_AUX
8-2) P1.8V_AUX
CHIP
P5V_AUX & P3V_AUX
14-2) P3.3V
15-2) VCCP
11.1V
PAGE 40
D
PAGE 6
KBC
4-3) P1.2V_LAN
SC454
Battery
13-1) MEM_VREF
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
15-2) 1.5V_PWRGD
GMCH
25-0) INIT#
1
VRMPWRGD
ELECTRONICS
4-1) P3.3V_LAN
8-2) P1.8V_AUX
C
23-0) PLT3_RST*
4
8-7
8. Block Diagram and Schematic
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -
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Confidential
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RTC Clock
133 MHz
CLK1_SATA#
33 MHz CLK3_PCLKICH
D
12 MHz
100 MHz
CLK1_MCLK1/1#
SAMSUNG
ICH
3
B
133 MHz
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
CLK1_DREFSSCLK#
CONTROLLER
AUDIO CODEC
KBC3_SMCLK
133 MHz
CLK1_DREFSSCLK
SAMSUNG PROPRIETARY
CLK1_PCIEICH#
32.768KHz
CLK1_MINIPCIE
CLK0_HCLK0#
CLK1_MCH3GPLL
1
CLK3_PCLKMICOM
IDTCV179BNLG
CLK1_MIN3PCIE
CLK1_DREFCLK
33 MHz
CLK3_ICH14
100 MHz
100 MHz
C
133 MHz
SMB3_CLK
CLK1_DREFCLK#
4
TOUCHPAD
133 MHz
ELECTRONICS
33 MHz
1
100 MHz
BATTERY
A
KBC5_TCLK
CLK3_SMBCLK
MINI PCIE(WLAN)
1205-002574
B
AU6371
MINIPCI
CLK1_PCIELOM#
2
CLK1_MCH3GPLL#
MINI PCIE(HSDPA)
CLK0_HCLK0
533 MHz
C
SAMSUNG ELECTRONICS CO’S PROPERTY.
CLK3_USB48
100 MHz
CLK0_HCLK1
CK-505M
CLK0_HCLK1#
RTC Clock
CLK1_MINIPCIE#
D
CLK1_MIN3PCIE#
96 MHz
CLK1_PCIEICH
CLK1_MCLK0/0#
14.318 MHz
CLK3_PCLKCB
12.288 MHz
HDA3_AUD_BCLK
GMCH
3
CARDBUS
THIS DOCUMENT CONTAINS CONFIDENTIAL
CPU
KBC
EXCEPT AS AUTHORIZED BY SAMSUNG.
4
88E8057
33 MHz
CLK3_PCLKMIN
32.786KHz
PROPRIETARY INFORMATION THAT IS
A
CLK1_PCIELOM
2
CLOCK DISTRIBUTION
CLK1_SATA
SODIMM
CLOCK GENERATOR
8-8
8. Block Diagram and Schematic
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -
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DOT_96/DOT_96#
SRC_0/SRC_0#
BSEL1
200 MHz
THIS DOCUMENT CONTAINS CONFIDENTIAL
D
VDD_IO
CLK REQ A
Place 14.318MHz within
1 166 MHz
1
0
3
FSB
HOST CLK
VDD_PCI
100 MHz
CLK REQ F
500mils of CK-505
This part is 64pin QFN package.
VDD_REF
0
0
C
0
BSEL2
0
0 133 MHz
27M & 27M_SS
SEL_LCDCLK*
PEG_CLK/PEG_CLK#
HIGH
266 MHz
MINI CARD
LOW
VDD_PLL3
0 1
001
1
Pin 24/25
For EMI
For EMI
1
CLK REQ B
BSEL0
C
CLK REQ E
A
PROPRIETARY INFORMATION THAT IS
1
ELECTRONICS
1
2
2
B
4
1
CLK REQ
0
1 RSVD
SRC8
1 400 MHz
1
A
EXCEPT AS AUTHORIZED BY SAMSUNG.
D
SAMSUNG ELECTRONICS CO’S PROPERTY.
SATA
GMCH
LOM3_CLKREQ#
VDD_SRC
SRC2
SRC4
0
DEVICE SRC PORT
VDD_CPU
VDD_SRC_IO VDD_CPU_IO
B
4
VDD_48
VDD_PLL3_IO
SRC6
FSA
1 0
1
SAMSUNG PROPRIETARY
SAMSUNG
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
Pin 20/21
333 MHz
FSC
3
1%
10K
R111
0.033nF
C582
50V
6.3V
10000nF
C113
1%
R586
33
R176
0
R174
0
nostuff
1%10K
R137
1%
R699
1K
100nF
C65
10V
100nF
10V
C585
B10
BLM18PG181SN1
50V
10K
R587
1%
0.012nF
C551
R584
22 5%
1
2
0.018nF
C91
50V
2801-004518
14.31818MHz Y2
1K
R179
1%
10V
10V
C586
100nF
1%
C64
100nF
R175
56
C93
100nF
10V
C553
10000nF
6.3V
nostuff
P1.5V
BLM18PG181SN1
B504
10V
100nF
C550
0.033nF
C581
50V
50V
C583
0.033nF
R113
33 1%
R112
2.2K
0.018nF
C90
50V
P3.3V
P1.05V
C94
100nF
10V
10V
C112
C67
100nF
10V
100nF
100nF
C92
10V
R646
1K
C66
100nF
10V
R650
1K
1%
1%
1%5%10K
R138
22
R583
P3.3V
VSS_SRC2
36
VSS_SRC3
49
XTAL_IN
3
2
XTAL_OUT
10V
C584
100nF
VDD_SRC
46
VDD_SRC_IO1
33
VDD_SRC_IO2
43
VDD_SRC_IO3
52
18
VSS_48
VSS_CPU59VSS_IO22VSS_PCI
15
VSS_PLL3
26
VSS_REF1VSS_SRC1
30
SRC9#
38
THERM_GND
65
USB_FS_A
17
VDD_48
16
VDD_CPU
62
VDD_CPU_IO56VDD_IO
19
VDD_PCI
9
VDD_PLL3
23
27
VDD_PLL3_IO
VDD_REF
4
32
SRC3_CLKREQC#
31
34
SRC4
35
SRC4#
SRC6
48
SRC6#
47
SRC7#_CLKREQE#
50
SRC7_CLKREQF#
51
SRC8#_ITP#
53
SRC8_ITP
54
SRC9
37
SCL
7
SDA
6
SRC0#_DOT96#
21
SRC0_DOT96
20
SRC10
41
SRC10#
42
SRC11#_CLKREQG#
39
SRC11_CLKREQH#
40
SRC2
28
SRC2#
29
SRC3#_CLKREQD#
LCDCLK#_27M_SS
25
LCDCLK_27M
24
NC
55
PCIF_5_ITP_EN14PCISTOP#
45
PCI_0_CLKREQ_A#8PCI_1_CLKREQ_B#10PCI_211PCI_312PCI_4_SEL_LCDCLK#
13
REF_FS_C_TEST_SEL
5
CLKPWRGD_PWRDN#
63
CPU0
61
CPU0#
60
CPU1_MCH
58
CPU1_MCH#
57
CPUSTOP#44FSB_TESTMODE
64
IDTCV179BNLG
1205-003159
U9
1%
R135
475
P3.3V
1%33
R547
0
R701
0
R700
1%
R649
1K
1%
B506
BLM18PG181SN1
475
R136
0
R178
nostuff
5%
22
R585
R139
10K 1%
6.3V
4700nF-X7R
C111
1%
R177
1K
6.3V
10000nF
C68
C611
10000nF
6.3V
C63
4700nF-X7R
6.3V
CLK1_MINI3PCIE#
LOM3_CLKREQ#
EXP3_CLKREQ#
CLK1_PCIEICH#
CLK1_PCIEICH
CLK1_BSEL0
CLK1_BSEL1
CLK1_BSEL2
CPU1_BSEL0
CPU1_BSEL1
CPU1_BSEL2
CLK1_BSEL0
CLK1_BSEL1
CLK1_BSEL2
MCH1_BSEL0
MCH1_BSEL1
MCH1_BSEL2
CLK3_PCI4_R
CLK3_PCLKMICOM
MCH3_CLKREQ#_R_MN
MCH3_CLKREQ#
CLK3_DBGLPC
MIN3_CLKREQ#
CLK1_PCIELOM
CLK1_PCIELOM#
CLK1_DREFCLK#
CLK1_DREFCLK
CLK1_MINI3PCIE
CLK1_MINIPCIE
CLK1_MINIPCIE#
CLK1_MCH3GPLL#
CLK1_MCH3GPLL
CLK3_PCI2_R
CHP3_SATACLKREQ#
CHP3_SATACLKREQ#_R_MN
CLK0_HCLK1
CLK0_HCLK0#
CLK0_HCLK0
CLK1_DREFSSCLK
CLK1_DREFSSCLK#
CLK3_USB48
SMB3_CLK_S
SMB3_DATA_S
CHP3_CPUSTP#
CHP3_PCISTP#
CLK1_BSEL2
CLK1_BSEL0
CLK3_ICH14
CLK3_PCLKICH
CLK3_FM48
CLK1_SATA#
VRM3_CPU_PWRGD
CLK3_14MHZ_R
CLK1_BSEL1
CLK3_PCIF_R
CLK0_HCLK1#
CLK3_VDD_SRC_IO_MN
CLK3_XTAL_IN_14_MN
CLK3_XTAL_OUT_14_MN
CLK3_VDD_REF_MN
CLK3_48MHZ_R
CLK1_SATA
8-9
8. Block Diagram and Schematic
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -
- This Document can not be used without Samsung's authorization -
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D
4
Line Width = 20 mil
4
2
R1
R2
10mil width and 10mil spacing.
1
1
SAMSUNG
B
93 degree C
For EMI
SMBUS Address 7Ah
D
Opposite side of CPU.
ELECTRONICS
C C
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
A
B
A
EXCEPT AS AUTHORIZED BY SAMSUNG.
2
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
3
TRIP_SET pin voltage = (T-75)/21
3.3 * [R2/(R1+R2)] = (T-75)/21
3
THERMAL SENSOR & FAN CONTROL
M501
BA61-01090A
DIA
HEAD
LENGTH
1%
49.9
R120
6.3V
C694
10000nF
P3.3V_AUXP5.0V
R686
10K
10V
100nF
C110
1%
6.3V
C109
10000nF
10V
P3.3V
C107
100nF
1
3
2
MMBT3904
Q511
50V
2.2nF
C80
50V
1nF
C79
1%10K
R126
P3.3V
1%
R127
10K
10K
R128
1% 1%
R129
10K
234
MNT1
5
6
MNT2
HDR-4P-1R-SMD
J505
3711-000456
1
50V
C135
0.033nF
R123
0
13
29
THRM_PAD
TRIP_SET
11
VDD_3V1VDD_5V_124VDD_5V_2
27
NC_1
8
NC_2
15
21
NC_3
POWER_OK
14
RESET#
16
SHDN_SEL
9
SMCLK
23
SMDATA
22
SYS_SHDN#
12
TACH
28
THERMTRIP#
CLK_SEL
17
DN12DN24DN3
6
DP13DP2
5
DP3
7
FAN_125FAN_226FAN_MODE
10
GND
20
1209-001718
EMC2102
U7
ALERT#
19
CLK_IN
18
1%
R122
20K
P3.3V_AUX
P3.3V_AUX
51.1K
R124
1%
200K
R125
1%
M502
BA61-01090A
DIA
HEAD
LENGTH
THM3_TRIP_SET_R_MN
LENGTH
HEAD
DIA
BA61-01090A
M500
FAN5_VDD
FAN3_FDBACK#
THM3_ALERT#
THM3_CLK_IN_MN
CPU2_THERMDC
THM3_THERMDN_MN
CPU2_THERMDA
THM3_THERMDP_MN
FAN5_VDD
KBC3_PWRGD
THM3_SHDN_SEL_MN
KBC3_THERM_SMCLK
KBC3_THERM_SMDATA
THM3_STP#
FAN3_FDBACK#
THM3_TRIP_SET_MN
THM3_VDD_3V_MN
8-10
8. Block Diagram and Schematic
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -
- This Document can not be used without Samsung's authorization -
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HCLK
1 / 4
ADDR GROUP0ADDR GROUP1
NC
CONTROLXDP/ITP SIGNALSTHERM
2 / 4
DATA GRP0DATA GRP1
DATA GRP2DATA GRP3
MISC
1
of the First CMREF with Z0= 55 ohm trace
GTLREF : Keep the Voltage divider within 0.5"
SAMSUNG ELECTRONICS CO’S PROPERTY.
of the First GTLREF0 with Z0= 55 ohm trace
D
C
B
A
Minimize coupling of any switching signals to this net
D
SAMSUNG PROPRIETARY
USE PROCHOT*
THIS DOCUMENT CONTAINS CONFIDENTIAL
COMP0/2 (COMP1/3) should be
D
A
1
COMP0/2 : Stripline=14mils / Microstrip=18mils
EXCEPT AS AUTHORIZED BY SAMSUNG.
4
B
4
2
Minimize coupling of any switching signals to this net
3
GTLREF : Keep the Voltage divider within 0.5"
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
D
trace shorter than 0.5" to their
ELECTRONICS
SAMSUNG ELECTRONICS CO’S PROPERTY.
SAMSUNG
3
THIS DOCUMENT CONTAINS CONFIDENTIAL
C
4
EXCEPT AS AUTHORIZED BY SAMSUNG.
4
2
2
3
Minimize coupling of any switching signals to this net
of the First EXTBGREF with Z0= 55 ohm trace
A A
B
1
SAMSUNG PROPRIETARY
1
DIAMONDVILLE (N270)
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
B
PROPRIETARY INFORMATION THAT IS
COMP1/3 : Stripline=4mils / Microstrip=5mils
C
GTLREF : Keep the Voltage divider within 0.5"
2
C
56ohm --> 68ohm
connected with Zo=27.4ohm(55ohm)
PROPRIETARY INFORMATION THAT IS
respective Banias socket pins.
3
8
P1.05V
13
3
1K
R189
2K
R674
1%
1
3510
16
C151
100nF
10V
1K
R187
62
P1.05V
TP18103
41
61
54.9
R672
1%
1K
R188
2
51
48
1%
R675
1K
4
24
58
28
31
15
23
1%
R682
54.9
0
27
C150
100nF
10V
56.2
52
P1.05V
40
1%
R690
P1.05V
22
TP18104
6
54.9
R691
1%
1K
R180
1%
3
5
29
P1.05V
20
R662
1K 1%
54
1%
R693
54.9
29
W19
TRST#
K16
47
C1
RSVD3
C21
SMI#
U17
STPCLK#
R16
TCK
M17
TDI
N16
TDO
M16
THERMTRIP#
H17
THRMDA
E4
THRMDC
E5
TMS
L17
TRDY#
REQ0#
N21
REQ1#
J21
REQ2#
G19
REQ3#
P20
REQ4#
R19
RESET#
D15
RS0#
W18
RS1#
Y17
RS2#
U20
RSVD1A3RSVD2
W20
NC1D6NC2
G6
NC3
H6
NC4K4NC5
K5
NC6
M15
NC7
L16
PRDY#
K18
PREQ#
J16
PROCHOT#
G17
Y18
DEFER#
T21
DRDY#
T19
FERR#
T16
HIT#
AA17
HITM#
V20
IERR#
F16
IGNNE#
J4
INIT#
V16
LINT0
T15
LINT1
R15
LOCK#
BCLK0
V11
BCLK1
V12
BNR#
Y19
BPM0#
K17
BPM1#
J18
BPM2#
H15
BPM3#
J15
BPRI#
U21
BR0#
T20
BR1#
V15
DBSY#
H20
A5#
N20
A6#
R20
A7#
J19
A8#
N19
A9#
G20
ADS#
V19
ADSTB0#
K20
ADSTB1#
B19
AP#0
D17
AP#1
M18
D20
A27#
B18
A28#
C15
A29#
B16
A3#
P21
A30#
B17
A31#
C16
A32#
A17
A33#
B14
A34#
B15
A35#
A14
A4#
A17#
C19
A18#
F19
A19#
E21
A20#
A16
A20M#
U18
A21#
D19
A22#
C14
A23#
C18
A24#
C20
A25#
E20
A26#
A10#
M19
A11#
H21
A12#
L20
A13#
M20
A14#
K19
A15#
J20
A16#
L21
330
0902-002366
AU80586GE025D
U13-1
12
R663
216317
27.4
1%
R671
11
16
49
R182
1K
1%
1%
R183
2K
46
1
15
100nF
C677
32
10V
4
P1.05V
7
13
42
57
55
39
0
60
34
44
37
23
27
20
P1.05V
38
P1.05V
9
1%
24
P1.05V
18
2K
R181
R676
1K
5
19
10
TP18068
56
R677
54.9
36
TP18106
30
1%
N15
GTLREF
A7
HPPLL
N6
MCERR#
P17
PWRGOOD
V17
RSP#
T6
SLP#
N18
26
17
U4
DSTBN0#
Y14
DSTBN1#
Y4
DSTBN2#
K2
DSTBN3#
E2
DSTBP0#
Y15
DSTBP1#
Y5
DSTBP2#
K3
DSTBP3#
F3
EDM
R6
EXTBGREF
M6
FORCEPR#
DINV0#
W16
DINV1#
Y6
DINV2#
L1
DINV3#
C5
DP#0
V9
DP#1
R4
DP#2
M4
DP#3
D4
DPRSTP#
R18
DPSLP#
R17
DPWR#
C6
D59#
B6
D6#
AA16
D60#B3D61#C4D62#
C7
D63#
D2
D7#
Y10
D8#Y9D9#
Y13
DCLKPH
V5
C2
D49#
G2
D5#
W12
D50#F1D51#D3D52#B4D53#E1D54#A5D55#C3D56#A6D57#F2D58#
D39#
N3
D4#
AA11
D40#
G3
D41#H2D42#
N2
D43#
L2
D44#M3D45#
J2
D46#
H1
D47#
J1
D48#
AA8
D3#
AA14
D30#V2D31#
W4
D32#R3D33#R2D34#
P1
D35#
N1
D36#
M2
D37#
P2
D38#
J3
U1
D2#
Y12
D20#
W7
D21#
W6
D22#Y7D23#
AA6
D24#Y3D25#W2D26#V3D27#U2D28#T3D29#
D1#
W10
D10#
W15
D11#
AA13
D12#
Y16
D13#
W13
D14#
AA9
D15#
W9
D16#
AA5
D17#
Y8
D18#W3D19#
T17
BSEL0J6BSEL1H5BSEL2
G5
CMREF
B7
COMP0T1COMP1T2COMP2
F20
COMP3
F21
CORE_DET
A13
D0#
Y11
U13-2
AU80586GE025D
0902-002366
ACLKPH
U5
BINIT#
6264
14
50
8
R661
1K
30731
22
43
1%
TP18105
25
53
28
1K
R186
25
2
18
R689
0
1K
R673
12
59
11
1%
R692
1%
27.4
45
14
33
R681
1K
9
19
1%
R680
56.2
R678
54.9
3
21
1%
1%
R679
54.9
CPU1_CMREF_MN
CPU1_ACLKPH_MN
CPU1_EXTBGREF_MN
CPU1_IGNNE#
CPU1_DCLKPH_MN
ITP3_DBRRESET#
CPU1_TMS_MN
CPU1_TDO_MN
CPU1_A20M#
CPU1_A35#_MN
CPU1_A34#_MN
CPU1_A33#_MN
CPU1_A32#_MN
CPU1_DEFER#
CPU1_BPRI#
CPU1_BNR#
CPU1_ADS#
CPU1_BREQ#
CPU1_DBSY#
CPU1_DRDY#
CPU1_LOCK#
CPU1_INIT#_R_MN
CPU1_RS1#
CPU1_D#(47:32)
CPU1_RS0#
CPU1_CPURST#
CPU1_ADSTB0#
CPU1_DSTBP0#
CPU1_DSTBP2#
CPU1_DSTBN0#
CPU1_DSTBN2#
CPU1_TRDY#
CPU1_REQ#(4:0)
CPU1_RS2#
CPU1_HITM# CPU1_DBI0#
CPU1_DBI2#
CPU1_HIT#
CPU1_TCK_MN
CPU1_TRST#_MN
CPU1_TDI_MN
CPU2_THERMDA
CPU1_D#(63:48)
CPU1_A#(31:17)
CPU1_DBI1# CPU1_DBI3#
CPU1_DSTBP1# CPU1_DSTBP3#
CPU1_ADSTB1# CPU1_THRMTRIP# CPU1_DSTBN1#
CPU1_DSTBN3#
CPU2_THERMDC
CPU1_DPSLP#
CPU1_DPRSTP#
CPU1_SMI#
CPU1_NMI
CPU1_COMP3_MN
CPU1_INTR
CPU1_COMP2_MN
CPU1_STPCLK#
CPU1_COMP1_MN
CPU1_COMP0_MN
CPU1_FERR# CLK0_HCLK0#
CLK0_HCLK0
CPU1_IERR#_MN
CPU1_A#(16:3)
CPU1_D#(15:0)
CPU1_PREQ#_MN
CPU1_PROCHOT#_MN
CPU1_D#(31:16)
CPU1_PWRGDCPU
CPU1_GTLREF_MN
ITP3_DBRRESET#_R_MN
CPU1_INIT#
CPU1_BSEL2
CPU1_BSEL1
CPU1_BSEL0
CPU1_SLP#
CPU1_DPWR#
8-11
8. Block Diagram and Schematic
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -
- This Document can not be used without Samsung's authorization -
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4 / 4
3 / 4
A
C
2
D3D
A
A
2
B
THIS DOCUMENT CONTAINS CONFIDENTIAL
SAMSUNG ELECTRONICS CO’S PROPERTY.
B
4
4
B
3
C
THIS DOCUMENT CONTAINS CONFIDENTIAL
4
3
C
1
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
2
4
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
SAMSUNG
SAMSUNG PROPRIETARY
2
D
3
SAMSUNG ELECTRONICS CO’S PROPERTY.
A
PROPRIETARY INFORMATION THAT IS
C
1
possible to VCCA pins.
PROPRIETARY INFORMATION THAT IS
SAMSUNG PROPRIETARY
D
1
ELECTRONICS
EXCEPT AS AUTHORIZED BY SAMSUNG.
DIAMONDVILLE (N270)
EXCEPT AS AUTHORIZED BY SAMSUNG.
B
Placed as close as
1
6.3V
1000nF
C707
6.3V
C712
10000nF-X5R
6.3V
1000nF
C710
1000nF
C685
6.3V
CPU_CORE
6.3V
P1.05V
C681
1000nF
100nF
C676
6.3V
C714
10000nF-X5R
10V
C701
10000nF-X5R
6.3V
10000nF-X5R
C716
6.3V
C705
1000nF
6.3V
6.3V
C704
10000nF-X5R10000nF-X5R
C688
6.3V 6.3V
C689
10000nF-X5R
R185
100
1%
1000nF
C708C709
1000nF
6.3V 6.3V
100nF
C702
10V
10000nF-X5R
C687
6.3V
1000nF
C679
P1.05V
1000nF
C683
6.3V
R184
6.3V
1000nF
C678
1%
100
1000nF
C690
6.3V
C703
1000nF
6.3V 6.3V
C733
1000nF
6.3V
CPU_CORE
H14
C682
1000nF
6.3V
U10
VTT29
U11
VTT3
E9
VTT30
U12
VTT31
U13
VTT32
U14
VTT4
F8
VTT5F9VTT6G8VTT7
G14
VTT8H8VTT9
VTT19
N14
VTT2
D9
VTT20P8VTT21
P14
VTT22R8VTT23
R14
VTT24T8VTT25
T14
VTT26U8VTT27U9VTT28
D13
VTT1
C9
VTT10J8VTT11
J14
VTT12K8VTT13
K14
VTT14L8VTT15
L14
VTT16M8VTT17
M14
VTT18
N8
F14
VCCQ1
A9
VCCQ2
B9
VCCSENSE
C13
VID0
F15
VID1
D16
VID2
E18
VID3
G15
VID4
G16
VID5
E17
VID6
G18
VSSSENSE
VCCP44
R11
VCCP45
R12
VCCP5
B11
VCCP6
B12
VCCP7
C10
VCCP8
C11
VCCP9
C12
VCCP_C6_1
E13
VCCP_C6_2
E14
VCCP_C6_3
F13
VCCP_C6_4
M10
VCCP35
M11
VCCP36
M12
VCCP37
N10
VCCP38
N11
VCCP39
N12
VCCP4
B10
VCCP40
P10
VCCP41
P11
VCCP42
P12
VCCP43
R10
H12
VCCP25
J10
VCCP26
J11
VCCP27
J12
VCCP28
K10
VCCP29
K11
VCCP3
A12
VCCP30
K12
VCCP31
L10
VCCP32
L11
VCCP33
L12
VCCP34
VCCP15
E12
VCCP16
F10
VCCP17
F11
VCCP18
F12
VCCP19
G10
VCCP2
A11
VCCP20
G11
VCCP21
G12
VCCP22
H10
VCCP23
H11
VCCP24
VCCA
D7
VCCF
V10
VCCP1
A10
VCCP10
D10
VCCP11
D11
VCCP12
D12
VCCP13
E10
VCCP14
E11
0902-002366
AU80586GE025D
U13-3
10V
100nF
C640
C691
100nF
10V
B2
VSS90
P13
VSS91
P15
VSS92
P16
VSS93
P18
VSS94
P19
VSS95R1VSS96
R5
VSS97R7VSS98
R9
VSS99
R13
VSS80
N7
VSS81
N9
VSS82
N13
VSS83
N17
VSS84
P3
VSS85P4VSS86
P5
VSS87
P6
VSS88P7VSS89
P9
VSS9
L18
VSS71
L19
VSS72
M1
VSS73
M5
VSS74M7VSS75
M9
VSS76
M13
VSS77
M21
VSS78
N4
VSS79
N5
VSS8
B1
K15
VSS61
K21
VSS62L3VSS63L4VSS64L5VSS65L6VSS66L7VSS67L9VSS68
L13
VSS69
L15
VSS7
A20
VSS70
VSS51J7VSS52J9VSS53
J13
VSS54
J17
VSS55K1VSS56K6VSS57K7VSS58K9VSS59
K13
VSS6
A19
VSS60
G21
VSS42H3VSS43H4VSS44H7VSS45H9VSS46
H13
VSS47
H16
VSS48
H18
VSS49
H19
VSS5
A18
VSS50
J5
F5
VSS32F6VSS33F7VSS34
F17
VSS35
F18
VSS36G1VSS37G4VSS38G7VSS39
G9
VSS4
A15
VSS40
G13
VSS41
VSS22
D21
VSS23
E3
VSS24E6VSS25E7VSS26E8VSS27
E15
VSS28
E16
VSS29
E19
VSS3
A8
VSS30
F4
VSS31
AA18
VSS144
AA19
VSS145
AA20
VSS15C8VSS16
C17
VSS17D1VSS18D5VSS19
D8
VSS2
A4
VSS20
D14
VSS21
D18
Y2
VSS134
Y20
VSS135
Y21
VSS136
AA2
VSS137
AA3
VSS138
AA4
VSS139
AA7
VSS14
B21
VSS140
AA10
VSS141
AA12
VSS142
AA15
VSS143
VSS124
V21
VSS125W1VSS126
W5
VSS127
W8
VSS128
W11
VSS129
W14
VSS13
B20
VSS130
W17
VSS131
W21
VSS132Y1VSS133
U16
VSS115
U19
VSS116V1VSS117
V4
VSS118
V6
VSS119
V7
VSS12
B13
VSS120
V8
VSS121
V13
VSS122
V14
VSS123
V18
T9
VSS105
T10
VSS106
T11
VSS107
T12
VSS108
T13
VSS109
T18
VSS11
B8
VSS110U3VSS111
U6
VSS112
U7
VSS113
U15
VSS114
VSS1
A2
VSS10
B5
VSS100
R21
VSS101T4VSS102T5VSS103T7VSS104
6.3V
U13-4
AU80586GE025D
0902-002366
C706
1000nF
C711
1000nF
6.3V
P1.5V
10000nF-X5R
C713
6.3V 6.3V
C717
R5
X
-F
n
00
0
0
1
R
5X-
F
n0
0
001
C732
6.3V
10000nF-X5R
C715
6.3V
6.3V
C686
10000nF-X5R
1000nF
4
8
6
C
08
6
C
1000nF
6.3V6.3V
CPU1_VCCSENSE
CPU1_VSSSENSE
CPU1_VSSSENSE
CPU1_VCCSENSE
CPU1_VID(6:0)
20mils
8-12
8. Block Diagram and Schematic
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -
- This Document can not be used without Samsung's authorization -
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Confidential
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1
2
C
C
THIS DOCUMENT CONTAINS CONFIDENTIAL
SAMSUNG PROPRIETARY
D
within 100mils
2
CALISTOGA (945GSE)
HSLPCPU* - ICH : Legacy mode
B
B
SAMSUNG
near HVREF pin
within 20mil
HVREF0
PROPRIETARY INFORMATION THAT IS
within 20mil
1
Place 100nF
4 3
0.7V
D
A
nearby Pin J13
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
3
Layout Note
0.327V
4
ELECTRONICS
width: 10mil, within 20mil
0.327V
SAMSUNG ELECTRONICS CO’S PROPERTY.
HSLPCPU* - GMCH : Enhanced mode (def.)
A
EXCEPT AS AUTHORIZED BY SAMSUNG.
27
50V
C811
0.1nF
1%
R670
24.9
5
40
10
30
31
0
12
4
P1.05V
19
9
18
62
7
54.9
R659
1%
27
22
36
18
8
59
17
35
52
21
P1.05V
9
20
2
221
R653
1%
44
7
28
38
13
25
1
14
1%
2
12
100
R652
100nF
22
6
11
6
C636
10V
29
31
7-C4
49
P1.05V
23
584854
57
0
3
29
1
1%
R654
54.9
1%
61
E2
HXRCOMP
A10
HXSCOMP
A6
HXSWING
C15
HYRCOMP
J1
HYSCOMPK1HYSWING
H1
23
37
24.9
R660
T2
HDSTBP3*
AB3
HHIT*
C8
HHITM*
B4
HLOCK*
C5
HREQ0*G9HREQ1*E9HREQ2*
G12
HREQ3*B8HREQ4*
F12
HRS0*A5HRS1*B6HRS2*
G10
HSLPCPU*
E8
HTRDY*
E10
HVREF1
E1
HVREF2
K9
HD9*
F5
HDBSY*
C10
HDEFER*
C6
HDINV0*H5HDINV1*J6HDINV2*T9HDINV3*
U6
HDPWR*
G7
HDRDY*
E6
HDSTBN0*F3HDSTBN1*
M8
HDSTBN2*
T1
HDSTBN3*
AA3
HDSTBP0*
F4
HDSTBP1*
M7
HDSTBP2*
V2
HD51*W4HD52*W7HD53*W5HD54*V5HD55*
AB4
HD56*
AB8
HD57*W8HD58*
AA9
HD59*
AA8
HD6*
C2
HD60*
AB1
HD61*
AB7
HD62*
AA2
HD63*
AB5
HD7*C3HD8*
R2
HD37*N5HD38*N2HD39*
R5
HD4*
F7
HD40*U7HD41*R8HD42*T4HD43*T7HD44*R3HD45*T5HD46*V6HD47*V3HD48*W2HD49*
W1
HD5*
E3
HD50*
J5
HD22*H3HD23*J4HD24*N3HD25*M4HD26*M3HD27*N8HD28*N6HD29*
K3
HD3*
H6
HD30*N9HD31*M1HD32*V8HD33*V9HD34*R6HD35*T8HD36*
AA5
HCPURST*
B10
HD0*C4HD1*
F6
HD10*J7HD11*K7HD12*H8HD13*E5HD14*K8HD15*J8HD16*J2HD17*J3HD18*N1HD19*
M5
HD2*
H9
HD20*K5HD21*
F8
HA30*
D17
HA31*
G17
HA4*
D12
HA5*
C13
HA6*A8HA7*
E13
HA8*
E12
HA9*
J12
HADS*
F10
HADSTB0*
C12
HADSTB1*
H16
HBNR*
B9
HBPRI*
C7
HBREQ0*
G8
HCLKN
AA6
HCLKP
D14
HA15*
F14
HA16*
J13
HA17*
E17
HA18*
H15
HA19*
G15
HA20*
G14
HA21*
A15
HA22*
B18
HA23*
B15
HA24*
E14
HA25*
H13
HA26*
C14
HA27*
A17
HA28*
E15
HA29*
H17
HA3*
0904-002420
945GSE
U12-1
HA10*
B13
HA11*
A13
HA12*
G13
HA13*
A12
HA14*
51
16
5
42
4
46
25
21
47
55
17
C631
100nF
10V
43
30
13
R656
100
20
63
1%
R655
200
1%
1%
R657
221
24
26
P1.05V
26
14
15
50
41
32
33
100nF
C635
45
28
24
10V
53
56
34
16
11
100
R658
1%
15
4193
3
60
10
8
39
CPU1_ADSTB0#
CPU1_ADSTB1#
MCH1_HXSWING
CLK0_HCLK1#
CLK0_HCLK1
CPU1_ADS#
CPU1_BNR#
CPU1_BPRI#
CPU1_BREQ#
CPU1_RS0#
CPU1_RS1#
CPU1_RS2#
CPU1_CPURST#
CPU1_DPWR#
CPU1_HITM#
CPU1_HIT#
CPU1_SLP#
CPU1_DEFER#
CPU1_DBSY#
CPU1_DRDY#
CPU1_TRDY#
CPU1_LOCK#
MCH1_HVREF
MCH1_HVREF
CPU1_A#(31:3)
CPU1_REQ#(4:0)
MCH1_HYSWING
CPU1_DSTBP0#
CPU1_DSTBN0#
CPU1_DBI0#
CPU1_DSTBP1#
CPU1_DSTBN1#
CPU1_DBI1#
CPU1_DSTBP2#
CPU1_DSTBN2#
CPU1_DBI2#
CPU1_DSTBP3#
CPU1_DSTBN3#
CPU1_DBI3#
MCH1_HXSWING
MCH1_HYSWING
MCH1_HXRCOMP_MN
MCH1_HXSCOMP_MN
MCH1_HYRCOMP_MN
MCH1_HYSCOMP_MN
CPU1_D#(63:0)
8-13
8. Block Diagram and Schematic
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -
- This Document can not be used without Samsung's authorization -
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3 / 52 / 5
CFG#
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
2
A
High
CFG(6)
THIS DOCUMENT CONTAINS CONFIDENTIAL
MCH_CFG5 : LOW=DIMX2
B
3
DMIx2 (default)
3
D
Internal P.U.
SAMSUNG ELECTRONICS CO’S PROPERTY.
2
HIGH=DIMX4
1
Low
(def. : default Option)
EXCEPT AS AUTHORIZED BY SAMSUNG.
CALISTOGA (945GSE)
SAMSUNG
PROPRIETARY INFORMATION THAT IS
C
ELECTRONICS
D
C
4
Page 6
Reserved
DMIx4
SAMSUNG PROPRIETARY
DMI Lane Reversal
CFG(5)
A
Current Setting
VSS_NCTF
B
1
CFG(19)
4
CFG[0:2] = BSEL[0:2] = "100"
DMI Lane Normal
1%
R173
80.6
45
39
nostuff
0
R637
R643
6
57
48
150
1%
C609
0.033nF5%50V
P1.8V_AUX
R669
100
1%
40
17
30
AE20
SB_MA13
AK21
SB_MA2
AK22
SB_MA3
AL22
SB_MA4
AH22
SB_MA5
AG22
SB_MA6
AF21
SB_MA7
AM21
SB_MA8
AE21
SB_MA9
AG21
SB_RAS*
AG20
SB_WE*
AF19
SA_MA7
AN17
SA_MA8
AL17
SA_MA9
AK18
SA_RAS*
AN28
SA_RCVENIN*
AM28
SA_RCVENOUT*
AH17
SA_WE*
AH21
SB_BS0
AJ20
SB_BS1
AE27
SB_BS2
AG19
SB_CAS*
AN20
SB_MA0
AL21
SB_MA1
AL20
SB_MA10
AE22
SB_MA11
AE26
SB_MA12
AJ8
SA_DQS5*
AM2
SA_DQS6
AM3
SA_DQS6*
AE3
SA_DQS7
AE2
SA_DQS7*
AJ15
SA_MA0
AM17
SA_MA1
AG16
SA_MA10
AL18
SA_MA11
AG18
SA_MA12
AL14
SA_MA13
AM15
SA_MA2
AH15
SA_MA3
AK15
SA_MA4
AN15
SA_MA5
AJ18
SA_MA6
AG5
SA_DQ62
AF5
SA_DQ63
AE31
SA_DQ7
AH31
SA_DQ8
AK31
SA_DQ9
AC28
SA_DQS0
AC29
SA_DQS0*
AJ30
SA_DQS1
AK30
SA_DQS1*
AK33
SA_DQS2
AJ33
SA_DQS2*
AL25
SA_DQS3
AM25
SA_DQS3*
AN9
SA_DQS4
AN8
SA_DQS4*
AH8
SA_DQS5
AN6
SA_DQ48
AM6
SA_DQ49
AB32
SA_DQ5
AK3
SA_DQ50
AL2
SA_DQ51
AM5
SA_DQ52
AL5
SA_DQ53
AJ3
SA_DQ54
AJ2
SA_DQ55
AG2
SA_DQ56
AF3
SA_DQ57
AE7
SA_DQ58
AF6
SA_DQ59
AB31
SA_DQ6
AH5
SA_DQ60
AG3
SA_DQ61
AL11
SA_DQ33
AH9
SA_DQ34
AK9
SA_DQ35
AM11
SA_DQ36
AK11
SA_DQ37
AM8
SA_DQ38
AK8
SA_DQ39
AC33
SA_DQ4
AG9
SA_DQ40
AF9
SA_DQ41
AF8
SA_DQ42
AK6
SA_DQ43
AF7
SA_DQ44
AG11
SA_DQ45
AJ6
SA_DQ46
AH6
SA_DQ47
AF28
SA_DQ19
AE33
SA_DQ2
AJ32
SA_DQ20
AG31
SA_DQ21
AG28
SA_DQ22
AG27
SA_DQ23
AN27
SA_DQ24
AM26
SA_DQ25
AJ26
SA_DQ26
AJ25
SA_DQ27
AL27
SA_DQ28
AN26
SA_DQ29
AF32
SA_DQ3
AH25
SA_DQ30
AG26
SA_DQ31
AM12
SA_DQ32
AK26
SA_DM3
AL9
SA_DM4
AG7
SA_DM5
AK5
SA_DM6
AH3
SA_DM7
AC31
SA_DQ0
AB28
SA_DQ1
AL28
SA_DQ10
AK27
SA_DQ11
AH30
SA_DQ12
AL32
SA_DQ13
AJ28
SA_DQ14
AJ27
SA_DQ15
AH32
SA_DQ16
AF31
SA_DQ17
AH27
SA_DQ18
AA24
RSVD_34
AB24
RSVD_35
AB20
RSVD_36
AB18
RSVD_37
AB15
RSVD_38
AB13
RSVD_39
AB12
RSVD_40
AB17
RSVD_41
F18
RSVD_42
AK12
SA_BS0
AH11
SA_BS1
AG17
SA_BS2
AJ17
SA_CAS*
AB30
SA_DM0
AL31
SA_DM1
AF30
SA_DM2
K15
RSVD_20
K21
RSVD_21
RSVD_22
K19
K20
RSVD_23
K24
RSVD_24
Y25
RSVD_25
Y24
RSVD_26
AB22
RSVD_27
AB21
RSVD_28
AB19
RSVD_29
AB16
RSVD_30
AB14
RSVD_31
AA12
RSVD_32
W24
RSVD_33
11
U12-3
945GSE
0904-002420
12
41
12
4
P3.3V
P1.5V
P1.5V
20
43
1
7
2
1
50
3
5
25
63
4
35132
34
60
5
10V
C126
100nF
10V
C700
100nF
36
0
7
P3.3V
R639
1K
nostuff
51
1%
9
1%
11
40.2
R640
R647
2.2K
10K
R642
nostuff
6
8
0
0
44
3
15
23
50V
5%
0.033nF
C610
R172
80.6
TV_DCONSEL1
G23
TV_IREF_REFSET
B21
TV_IRTNA
C21
TV_IRTNB
D21
TV_IRTNC
3
1%
SM_CLK2
AK1
SM_CLK2*
AM30
SM_CLK3
AN30
SM_CLK3*
AG14
SM_CS0*
AF12
SM_CS1*
AK14
SM_CS2*
AH12
SM_CS3*
AE12
SM_ODT0
AF14
SM_ODT1
AJ14
SM_ODT2
AJ12
SM_ODT3
A21
TVDACA_OUT
C20
TVDACB_OUT
E20
TVDACC_OUT
G26
TV_DCONSEL0
J26
SDVO_TVCLKIN
N30
SDVO_TVCLKIN*
AJ21
SMOCDCOMP0
AF11
SMOCDCOMP1
AN12
SMRCOMPN
AN14
SMRCOMPP
AA33
SMVREF0
AE1
SMVREF1
AN21
SM_CKE0
AN22
SM_CKE1
AF26
SM_CKE2
AF25
SM_CKE3
AF33
SM_CLK0
AG33
SM_CLK0*
AG1
SM_CLK1
AF1
SM_CLK1*
AJ1
RSVD_8
AB10
RSVD_9
P33
SDVOB_BLUE
P32
SDVOB_BLUE*
T32
SDVOB_CLKN
R32
SDVOB_CLKP
M32
SDVOB_GREEN
N32
SDVOB_GREEN*
P30
SDVOB_INT
R30
SDVOB_INT*
N28
SDVOB_RED
P28
SDVOB_RED*
J27
SDVO_CTRLCLK
H27
SDVO_CTRLDATA
T30
SDVO_FLDSTALL
T29
SDVO_FLDSTALL*
M30
RSVD_10
C17
RSVD_11
A33
RSVD_12
K22
RSVD_13
J17
RSVD_14
K23
RSVD_15
K17
RSVD_16
K12
RSVD_17
K13
RSVD_18
K16
RSVD_19
K26
RSVD_2
K32
RSVD_3
K31
RSVD_4
R24
RSVD_5
T24
RSVD_6
M10
RSVD_7
A18
L_BKLTCRTL
G29
L_BKLTEN
F28
L_CTLA_CLK
E28
L_CTLB_DATA
K27
L_IBG
J29
L_VBG
K30
L_VDDEN
J30
L_VREFH
K29
L_VREFL
G21
PM_BMBUSY*
F26
PM_EXTTS*_0
H26
PM_EXTTS*_1
J15
PM_THRMTRIP*
AB29
PWROK
W27
RSTIN*
K25
RSVD_1
AA10
LA_DATAN0
F32
LA_DATAN1
D31
LA_DATAN2
H31
LA_DATAP0
G32
LA_DATAP1
C31
LA_DATAP2
A30
LB_CLKN
A29
LB_CLKP
F33
LB_DATAN_0
D33
LB_DATAN_1
F30
LB_DATAN_2
E33
LB_DATAP_0
D32
LB_DATAP_1
F29
LB_DATAP_2
G28
LDDC_CLK
H28
LDDC_DATA
H30
DMI_RXP1
V28
DMI_TXN0
V31
DMI_TXN1
V29
DMI_TXP0
V32
DMI_TXP1
A27
DREF_CLKN
A26
DREF_CLKP
J33
DREF_SSCLKN
H33
DREF_SSCLKP
R28
EXP_ACOMPI
M28
EXP_AICOMPO
Y26
GCLKN
AA26
GCLKP
E31
ICHSYNC*
D30
LA_CLKN
C30
LA_CLKP
G31
CFG6
J22
CLKREQ*
A24
CRT_BLUE
A23
CRT_BLUE*
H20
CRT_DDCCLK
H22
CRT_DDCDATA
E25
CRT_GREEN
F25
CRT_GREEN*
D27
CRT_HSYNC
H25
CRT_IREF
C25
CRT_RED
D25
CRT_RED*
F27
CRT_VSYNC
Y29
DMI_RXN0
Y32
DMI_RXN1
Y28
DMI_RXP0
Y31
0904-002420
C18
CFG0
E18
CFG1
K28
CFG19
G20
CFG2
G18
CFG3
J20
CFG5
J18
5
53
37
U12-2
945GSE
1%
249
R635
8
19
13
4
55
7
C630
0.033nF5%50V
28
6
21
13
54
1%
150
R645
26
R648
2.2K
18
0
31
5
4
58
40.2
R644
1%
4
3
24
10
61
14
7
0
6
1477
24.9
R668
1%
1%
3
10
62
1
22
1.5K
R638
42
29
16
2
33
2
6
2.2K
R651
59
38
2
nostuff
46
nostuff
R633
10K
nostuff
10K
R634
R598
150
2
52
9
MEM1_VREF
1%
49
10K
R636
10K
R641
5
P3.3V
56
MCH3_EXTTS1#
MCH3_CLKREQ#
MCH3_EXTTS0#
MCH3_EXTTS1#
CHP3_DPRSLPVR
MCH3_EXTTS1#
CRT3_BLUE
CRT3_GREEN
CRT3_RED
27
LCD3_EDID_CLK
LCD3_EDID_DATA
MEM1_AMA(13:0)
CRT3_HSYNC
CRT3_VSYNC
CRT3_VSYNC_R_MN
CRT3_HSYNC_R_MN
MCH1_L_IBG_MN
MEM1_ACAS#
MEM1_AWE#
MEM1_ADQS#(7:0)
MEM1_ADQS(7:0)
MEM1_ADM(7:0)
MEM1_ADQ(63:0)
LCD3_BRIT
MCH3_L_CTLA_CLK_MN
MCH3_L_CTLB_DATA_MN
MCH3_BMBUSY#
CPU1_THRMTRIP#
MCH3_EXTTS0#
MCH1_BSEL0
MCH1_BSEL1
MCH1_BSEL2
MCH3_ICHSYNC#
MCH3_CLKREQ#
MCH3_CFG19_MN
MEM1_ODT0
MEM1_ABS0
MEM1_ABS1
MEM1_ABS2
MEM1_ARAS#
LCD1_ADATA0
LCD1_ADATA1#
LCD1_ADATA1
LCD1_ADATA2#
LCD1_ADATA2
MCH2_SMRCOMPN_MN
MCH2_SMRCOMPR_MN
MCH3_CFG3_MN
MCH3_CFG5_MN
MCH3_CFG6_MN
MEM1_CKE1
MEM1_CS1#
MEM1_ODT1
KBC3_PWRGD
MEM1_CKE0
MEM1_CS0#
CRT3_DDCCLK
CRT3_DDCDATA
PLT3_RST#_R_MN
PLT3_RST#
MCH3_LCD_VDDEN
MCH3_LCD_BKLTEN
LCD1_ACLK#
LCD1_ACLK
LCD1_ADATA0#
DMI1_RXP0
DMI1_RXP1
CLK1_DREFCLK#
CLK1_DREFCLK
CLK1_DREFSSCLK#
CLK1_DREFSSCLK
CLK1_MCH3GPLL#
CLK1_MCH3GPLL
CLK1_MCLK0
CLK1_MCLK0#
CLK1_MCLK1
CLK1_MCLK1#
DMI1_TXN0
DMI1_TXN1
DMI1_TXP0
DMI1_TXP1
DMI1_RXN0
DMI1_RXN1
MCH1_EXP_ACOMP_MN
MCH3_CRT_IREF_MN
8-14
8. Block Diagram and Schematic
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -
- This Document can not be used without Samsung's authorization -
N310
Samsung
Confidential
Samsung
Confidential
Samsung
Confidential
4 / 5
1
2
B
PROPRIETARY INFORMATION THAT IS
3
SAMSUNG PROPRIETARY
EXCEPT AS AUTHORIZED BY SAMSUNG.
B
D
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
4
C
THIS DOCUMENT CONTAINS CONFIDENTIAL
A
270uF * 2ea
CALISTOGA (945GSE)
SAMSUNG ELECTRONICS CO’S PROPERTY.
A
1
4
ELECTRONICS
D
SAMSUNG
2
3
C
6.3V
C128
10000nF
C620
100nF
10V
10000nF
C140
6.3V
D8
VTT_8
VTT_9
P7
6.3V
1000nF-X5R
C149
U2
VTT_35
VTT_36
P2
L2
VTT_37G2VTT_38D2VTT_39
L9
VTT_4
AA1
VTT_40
Y1
VTT_41
U1
VTT_42P1VTT_43L1VTT_44G1VTT_45
F1
VTT_46
D9
VTT_5P8VTT_6
L8
VTT_7
G5
VTT_20
VTT_21
D5
Y4
VTT_22U4VTT_23P4VTT_24L4VTT_25G4VTT_26D4VTT_27Y3VTT_28
U3
VTT_29
P9
VTT_3
P3
VTT_30L3VTT_31G3VTT_32D3VTT_33
Y2
VTT_34
AA21
VSS_NCTF_6
VSS_NCTF_7
AA20
AA19
VSS_NCTF_8
AA18
VSS_NCTF_9
A14
VTT_1
L7
VTT_10D7VTT_11
A7
VTT_12
P6
VTT_13L6VTT_14G6VTT_15D6VTT_16
U5
VTT_17
P5
VTT_18L5VTT_19
D10
VTT_2
E23
VSSA_TVBG
VSS_NCTF_1
AN33
AA17
VSS_NCTF_10
AA16
VSS_NCTF_11
AA15
VSS_NCTF_12
AA14
VSS_NCTF_13
AA13
VSS_NCTF_14
A4
VSS_NCTF_15
A3
VSS_NCTF_16
B2
VSS_NCTF_17
AN1
VSS_NCTF_18
C1
VSS_NCTF_19
AA25
VSS_NCTF_2
V25
VSS_NCTF_3
U25
VSS_NCTF_4
AA22
VSS_NCTF_5
VCC_19
R16
R26
VCC_2
VCC_20
V15
VCC_21
U15
VCC_22
T15
VCC_3
P26
VCC_4
N26
VCC_5
M26
VCC_6
V19
VCC_7
U19
VCC_8
T19
VCC_9
W18
J23
VCC_SYNC
M33
VSSA_3GBG
B25
VSSA_CRTDAC
B32
VSSA_LVDS
AK29
VCCSM_6
VCCSM_7
AJ29
AH29
VCCSM_8
AG29
VCCSM_9
D29
VCCTX_LVDS_1
C29
VCCTX_LVDS_2
VCC_1
T26
VCC_10
V18
VCC_11
T18
VCC_12
R18
VCC_13
W17
VCC_14
U17
VCC_15
R17
VCC_16
W16
VCC_17
V16
VCC_18
T16
AK10
VCCSM_39
AM29
VCCSM_4
VCCSM_40
AJ10
AH10
VCCSM_41
AG10
VCCSM_42
AF10
VCCSM_43
AE10
VCCSM_44
AN7
VCCSM_45
AM7
VCCSM_46
AL7
VCCSM_47
AK7
VCCSM_48
AJ7
VCCSM_49
AL29
VCCSM_5
AH7
VCCSM_50
AN4
VCCSM_51
AH1
VCCSM_52
AL16
VCCSM_24
AK16
VCCSM_25
VCCSM_26
AJ16
AN13
VCCSM_27
AM13
VCCSM_28
AL13
VCCSM_29
AN29
VCCSM_3
AK13
VCCSM_30
AJ13
VCCSM_31
AH13
VCCSM_32
AG13
VCCSM_33
AF13
VCCSM_34
AE13
VCCSM_35
AN10
VCCSM_36
AM10
VCCSM_37
AL10
VCCSM_38
AB33
VCCSM_1
AF29
VCCSM_10
VCCSM_11
AE29
AN24
VCCSM_12
AM24
VCCSM_13
AL24
VCCSM_14
AK24
VCCSM_15
AJ24
VCCSM_16
AH24
VCCSM_17
AG24
VCCSM_18
AF24
VCCSM_19
AM32
VCCSM_2
AE24
VCCSM_20
AN18
VCCSM_21
AN16
VCCSM_22
AM16
VCCSM_23
B20
VCCA_TVDACA_1
A20
VCCA_TVDACA_2
VCCA_TVDACB_1
B22
A22
VCCA_TVDACB_2
D22
VCCA_TVDACC_1
C22
VCCA_TVDACC_2
C28
VCCDLVDS_1
B28
VCCDLVDS_2
A28
VCCDLVDS_3
F22
VCCDQTVDAC
F20
VCCDTVDAC
AE5
VCCD_HMPLL_1
AD5
VCCD_HMPLL_2
E26
VCCHV_1
D26
VCCHV_2
C26
VCCHV_3
AL1
NC_71
Y5
NC_72
A32
NC_8
NC_9
W10
U33
VCC3G_1
T33
VCC3G_2
N33
VCCA_3GBG
V26
VCCA_3GPLL
C24
VCCA_CRTDAC_1
B24
VCCA_CRTDAC_2
B26
VCCA_DPLLA
J32
VCCA_DPLLB
AD2
VCCA_HPLL
B31
VCCA_LVDS
AD1
VCCA_MPLL
D23
VCCA_TVBG
Y7
NC_57
AM4
NC_58
AF4
NC_59
NC_6
B33
AD4
NC_60
AL4
NC_61
AK4
NC_62
W31
NC_63
AJ4
NC_64
AH4
NC_65
AG4
NC_66
NC_67
AE4
AM1
NC_68
W30
NC_69
AN32
NC_7
Y6
NC_70
E19
NC_42
D19
NC_43
C19
NC_44
NC_45
B19
A19
NC_46Y8NC_47
K18
NC_48
G16
NC_49
C33
NC_5
F16
NC_50
E16
NC_51
NC_52
D16
C16
NC_53
B16
NC_54
AN2
NC_55
A16
NC_56
E21
NC_28
C23
NC_29
AM33
NC_3
NC_30
AN19
AM19
NC_31
AL19
NC_32
AK19
NC_33
AJ19
NC_34
AH19
NC_35
AN3
NC_36
Y9
NC_37
NC_38
J19
H19
NC_39
AL33
NC_4
G19
NC_40
F19
NC_41
W25
NC_13
V24
NC_14
U24
NC_15
NC_16
W29
V10
NC_17
J24
NC_18
H24
NC_19
W33
NC_2
W32
NC_20
G24
NC_21
F24
NC_22
NC_23
E24
D24
NC_24
K33
NC_25
U10
NC_26
A31
NC_27
0904-002420
945GSE
U12-4
Y10
NC_1
AN31
NC_10
W28
NC_11
V27
NC_12
100nF
C138
10V
B14
MMZ1608S121AT
AL2.5V
330uF
EC502
P2.5V
16V
C637
470nF
C673
100nF
10V
P1.5V
B507
EC7
220uF
2.5V AD
10V
C671
100nF
MMZ1608S121AT
100nF
C634
P1.5V
6.3V
C638
10000nF
10V
1000nF-X7R
C148
P3.3V
4700nF
C863
6.3V
6.3V
470nF
C632
16V
BLM18PG181SN1
B12
P1.5V
INSTPAR
SHORT507
6.3V
C124
10000nF
AD
2.5V
220uF
EC10
nostuff
10000nF
C626
6.3V
6.3V
C143
10000nF
6.3V
C731
4700nF
C699
1000nF-X5R
6.3V
P1.05V
10V
100nF
C623
C625
100nF
10V
10000nF
C142
6.3V
C675
100nF
10V
P1.5V
6.3V
1000nF-X5R
C697
10V
C628
100nF
P1.5V
100nF
C629
10V
B508
BLM18PG181SN1
C674
10V
100nF
50V
C607
22nF
10nF
C622
16V
C633
470nF
P1.5V
P1.05V
P1.8V_AUX
25V
10000nF
C136
6.3V
100nF
C125
1000nF-X5R
6.3V
10V
C139
100nF
C627
AD
10V
6.3V
P2.5V
EC507
220uF
2.5V
AL
2.5V
330uF
EC504
10000nF
C670
1%
P1.5V
MMZ1608S121AT
B13
10
R632
10V
C672
100nF
100nF
C624
10V
470nF
C127
16V
10000nF
C639
6.3V
1 3
6.3V
C730
4700nF
10V
P1.5V
D508
BAT54
C608
100nF
6.3V
AD
6.3V
47uF
EC503
P1.05V
P2.5V
C147
1000nF-X5R
C621
6.3V
10000nF
P1.8V_AUX
C137
100nF
10V
BLM18PG181SN1
B505
10000nF
C603
6.3V
P2.5V
P1.5V
6.3V
C141
10000nF
MCH2_VCCA_DPLLB_MN
MCH2_VCCA_DPLLA_MN
MCH1_VTT_12_MN
MCH2_VSSA_CRTDAC_MN
MCH2_VCC3G_MN
MCH2_VCCA_3GPLL_MN
MCH1_P3.3V_HV_R_MN
B509
MMZ1608S121AT
MCH2_VCCA_CRTDAC_MN
MCH1_VTT_46_MN
MCH1_VTT_40_MN
MCH1_VTT_1_MN
MCH2_VCCSM_52_MN
MCH2_VCCSM_51_MN
MCH2_VCCSM_21_MN
MCH2_VCCSM_2_MN
MCH2_VCCSM_1_MN
MCH2_VCCA_MPLL_MN
MCH2_VCCA_HPLL_MN
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