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LA-4991P KSKAA 10M
Schematic
49 pgs773.26 Kb2

Compal LA-4991P KSKAA 10M, Satellite A500, LA-4991P 10MG Schematic

4.5 (2)
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Title
Size Document Number Rev
Date: Sheet
of
Security Classification
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
401662
D
SCHEMATIC,MB A4991
148Thursday, May 21, 2009
2008/10/06 2009/10/06
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet
of
Security Classification
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
401662
D
SCHEMATIC,MB A4991
148Thursday, May 21, 2009
2008/10/06 2009/10/06
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet
of
Security Classification
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
401662
D
SCHEMATIC,MB A4991
148Thursday, May 21, 2009
2008/10/06 2009/10/06
Compal Electronics, Inc.
KSKAA
LA-4991P
2008-05-07 Rev. 1.0
Intel Penryn/ Cantiga/ ICH9M
Schematic
Bradford 10M/10MG
REV 1.0
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Title
Size Document Number Rev
Date: Sheet
of
Security Classification
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
401662
D
SCHEMATIC,MB A4991
248Thursday, May 21, 2009
2008/10/06 2009/10/06
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet
of
Security Classification
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
401662
D
SCHEMATIC,MB A4991
248Thursday, May 21, 2009
2008/10/06 2009/10/06
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet
of
Security Classification
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
401662
D
SCHEMATIC,MB A4991
248Thursday, May 21, 2009
2008/10/06 2009/10/06
Compal Electronics, Inc.
File Name : LA-4991P
page 27 page 30
Compal Confidential
uFCBGA-1329
H_A#(3..35) H_D#(0..63)
MDC 1.5 Conn
Int.KBD
page 34
BANK 0, 1, 2, 3
667/800/1066MHz
ALC272
DMI x 4
Intel Penryn Processor
FSB
Clock Generator
SLG8SP556VTR
page 33
Fan Control
uPGA-478 Package
200pin DDRII-SO-DIMM X2
Intel Cantiga
SPI ROM
page 4
1.8V DDRII 667/800
page 4,5,6
page 34
HDA Codec
page 16
Memory BUS(DDRII)
BGA-676
page 4
page 7,8,9,10,11,12,13
Intel ICH9-M
Thermal Sensor
page 14,15
page 20,21,22,23
ENE KB926 D3
LCD Conn.
Model Name : KSKAA
page 18
Dual Channel
page 25
SATA HDD0
EMC1402
C-Link
(Socket P)
page 28
5V 1.5GHz(150MB/s)
SATA port 1
HD Audio
3.3V 24.576MHz/48Mhz
PCIe 1x [2,4,5]
LPC BUS
3.3V 33 MHz
USB
5V 480MHz
5V 1.5GHz(150MB/s)
SATA port 5
page 26
eSATA
SATA port 4
page 32
5IN1
PCIe port 2
Express Card
page 26
PCIe 1x
PCIe port 1
RJ45
RTL8111DL Giga
RTL8103EL 10/100M
page 29
page 29
PCIe 1x
PCIe port 3
page 34
Debug Port
JMB380
CRT
page 18
GM45/PM45/GL40
PCIe 1x
HDMI Conn.
page 20
Level Shifter
page 20
R5F211A4SP
HDMI CEC Controller
page 20
EC
SMBUS
page 27
USB port 9
Felica
PCIe port 6
USB
5V 480MHz
SATA ODD
page 25
5V 1.5GHz(150MB/s)
USB port 3
5V 480MHz
USB Left
page 26
1.5V 2.5GHz(250MB/s)
1.5V 2.5GHz(250MB/s)
1.5V 2.5GHz(250MB/s)
1.5V 2.5GHz(250MB/s)
USB port 0,1
page 27
USB/B Right
USB
5V 480MHz
Express Card
USB port 4
USB port 3
Power Circuit DC/DC
page 35
RTC CKT.
page 21
page 36,37,38,39
40,41,42
DC/DC Interface CKT.
USB/B-2
page 27
CAP SENSOR/B
page 35
LIGTH PIPE/B
page 35
HP CONN
page 31
SPK CONN
page 31
MIC CONN
page 31 page 31
TPA6017
AMP.
MIC CONN
page 31
Int.
VGA MXM/B
PCIE-Express 16X
ATI M92XT,64bit with 256M/512MB
USB Left
USB port 2
page 27
Display Port
page 19
page 25
SSD
5V 1.5GHz(150MB/s)
SATA port 0
page 27
FM tuner Conn
I2C from SB
USB port 8
page 27
FP conn
USB port 11
page 27
Int. Camera
USB port 5
page 27
BT conn
page 34
CIR
GM47/GM49
ATI M96,128bit with 512M/1GB
PCIeMini Card
UWB/JET
PCIeMini Card
Reserve
PCIeMini Card
Reserve
USB port 6
page 28
page 28
PCIeMini Card
3G/GPS/TV Tuner
PCIe port 5
PCIeMini Card
WiMax
PCIeMini Card
WLAN
USB port 7
PCIe port 4
page 28
page 28
page 26
BCAS
PCIe port 11
page 28
Finger print/B
page 27
Power/B
page 35
LED/B
page 35
Touch Pad/B
page 35
page 34
GSENSOR
USB/B-1
page 25
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet
of
Security Classification
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
401662
D
SCHEMATIC,MB A4991
348Thursday, May 21, 2009
2008/10/06 2009/10/06
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet
of
Security Classification
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
401662
D
SCHEMATIC,MB A4991
348Thursday, May 21, 2009
2008/10/06 2009/10/06
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet
of
Security Classification
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
401662
D
SCHEMATIC,MB A4991
348Thursday, May 21, 2009
2008/10/06 2009/10/06
Compal Electronics, Inc.
B+
TPS51125RGER
+3VALW
DESIGN CURRENT 0.5A
+5VALW
DESIGN CURRENT 3A
ISL6262
+CPU_CORE
AO-3413
DESIGN CURRENT 35A
P-CHANNEL
+FLICA_VCC
DESIGN CURRENT 0.5A
FELICA_PWR
VR_ON
TPS51117RGYR
SYSON
TPS51117RGYR
SUSP#
N-CHANNEL
2N7002
SBPWR_EN#
SUSP
+1.8VS
DESIGN CURRENT 1A
+5V_SB
DESIGN CURRENT 0.5A
+0.9VS
DESIGN CURRENT 2A
SI3456
N-CHANNEL
+HDMI_5V_OUT
DESIGN CURRENT 0.5A
SUSP
SI3456
N-CHANNEL
+3VS_DP
DESIGN CURRENT 0.5A
RUNON
N-CHANNEL
SI4856
TPS51117RGYR
SUSP#
+1.5VS
DESIGN CURRENT 2A
+1.05VS
DESIGN CURRENT 10A
P-CHANNEL
AO-3413
ENVDD
DESIGN CURRENT 1A
+LCD_VDD
P-CHANNEL
AO-3413
WOL_EN#
DESIGN CURRENT 330mA
+3V_LAN
+3VL
+5VL
DESIGN CURRENT 0.1A
DESIGN CURRENT 0.1A
P-CHANNEL
AO-3413
BT_PWR#
N-CHANNEL
DESIGN CURRENT 180mA
+BT_VCC
SI4800
SUSP
+5VS
DESIGN CURRENT 2A
N-CHANNEL
SI4800
+3VS
DESIGN CURRENT 2A
SUSP
P-CHANNEL
AO-3413
SBPWR_EN#
DESIGN CURRENT 750mA
+3V_SB
+1.8V
DESIGN CURRENT 7A
KSKAA/Bradford Intel
APL5331KAC
SUSP
AO-3413
P-CHANNEL
+5VS_L_BCAS
BCPWON
DESIGN CURRENT 0.5A
+VSB
DESIGN CURRENT 0.1A
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Title
Size Document Number Rev
Date: Sheet
of
Security Classification
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
401662
D
SCHEMATIC,MB A4991
448Thursday, May 21, 2009
2008/10/06 2009/10/06
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet
of
Security Classification
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
401662
D
SCHEMATIC,MB A4991
448Thursday, May 21, 2009
2008/10/06 2009/10/06
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet
of
Security Classification
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
401662
D
SCHEMATIC,MB A4991
448Thursday, May 21, 2009
2008/10/06 2009/10/06
Compal Electronics, Inc.
1101 001Xb
ON OFF OFF
+0.9VS 0.9V switched power rail for DDR terminator
+RTCVCC RTC power
+1.5VS
+5VS
+3VS
+5VALW
+1.8V
+3VALW
1.8V power rail for DDR
3.3V always on power rail
5V always on power rail
3.3V switched power rail
5V switched power rail
+VSB VSB always on power rail ON ON
ONON
ON
ON
Power
+3V_SB
ICH9M
+3VS
+3VS
+3VS
+3VS
EC KB926 D3+3VL EC KB926 D3+3VS
G3 LOWLOWLOWLOW
Smart Battery+5VL
0001 011X b
HDMI-CEC
+3VL
0011 010x b
FUN/B (CAP Sensor)
+5VL
CPU THM Sen
SMSC SMC1402
0100 110x b
+3VS
EC SM Bus1 address
Device
ON OFF
DDR DIMM0
1001 000Xb
DDR DIMM1
1001 010Xb
1.5V switched power rail
+CPU_CORE
ON ON ON ON
STATE
SIGNAL
Full ON
S1(Power On Suspend)
S3 (Suspend to RAM)
S4 (Suspend to Disk)
S5 (Soft OFF)
SLP_S1# SLP_S3#
SLP_S4# SLP_S5#
G3
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
+3VL 3.3V always on power rail ONON
OFF
OFF
OFF
OFF
OFF
OFF
ON ON
+5VL 5V always on power rail ON ON
OFF
ON ON
OFF OFF+5V_SB 5V power rail for SB ON ON
ICH9M SM Bus address
Device
Clock Generator
(SLG8SP556V)
Address
Address Address
Voltage Rails
VIN
B+
+1.05VS
Adapter power supply (19V)
AC or battery power rail for power circuit.
Core voltage for CPU
1.05V switched power rail
External PCI Devices
Express
BTO Option Table
ON
LOW LOW LOW LOW
LOWLOWLOW
LOW
LOW
LOW
HIGH HIGH HIGH HIGH
HIGHHIGHHIGH
HIGH
HIGH
HIGH
ON ON
ON OFF OFF
+3V_LAN 3.3V power rail for LAN ON ON
S1 S3 S5
ON OFF
ON OFF
Power Plane Description
EC SM Bus2 address
Device
OFF
OFF
ON
OFF
OFF
ON
OFFON
ON
ON ON
OFF
ON ON ON OFF
+3V_SB 3.3V power rail for LAN ON ON
+3V_WLAN 3.3V power rail for LAN ON ON
ON
PowerPower
+3VS
FM Module
+CPU_CORE
+VGA_PCIE_1.1VS
+1.8VS
Core voltage for VGA chip
1.1V switched power rail for VGA PCIE
1.8V power rail for VRAM
ON
ON
ON
ON
ON
ON
OFF
OFF
OFF
OFF
OFF
OFF
8103EL@ 8111DL@
LAN
(E) (C)
10/100M Giga
Function
BTO
explain
Intel(UMA)
IHDMI@
description
(Y)
HDMI
ATI MXM/B
NIHDMI@ HDMI@
COMMON
H@
Finger printer
(F)
FP@FLICA@
(J)
Felica BLUE TOOTH
(B)
BT@
Function
BTO
explain
description
3G SIM slot
(3)
3G@
Two Cards
Mini card
(D2)
3G@
CRT@
(Q)
CRT
DP@
(Z)
Display
CIR
(I)
CIR@
CAMERA & MIC
(X)
CAMERA MIC
CAM@ MIC@
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
H_A#3
H_A#10
H_A#13
H_A#11
H_A#7
H_A#9
H_A#16
H_A#6
H_A#8
H_A#12
H_A#15
H_A#5
H_A#14
H_A#4
H_RESET#
H_A#32
H_A#34
H_A#35
H_A#33
H_A#18
H_A#30
H_A#27
H_A#26
H_A#21
H_A#17
H_A#20
H_A#25
H_A#28
H_A#29
H_A#19
H_A#23
H_A#24
H_A#22
H_A#31
H_SMI#
H_STPCLK#
H_INTR
H_IGNNE#
H_A20M#
H_FERR#
H_NMI
XDP_DBRESET#
H_INIT#
H_IERR#
H_PROCHOT#
H_THERMDC
H_THERMDA
H_PROCHOT#
XDP_TCK
XDP_TDI
XDP_TMS
XDP_TRST#
H_THERMDA
CPU_THERM#
H_THERMDC
+FAN1
+FAN1
XDP_TRST#
XDP_TCK
XDP_TMS
XDP_TDI
H_A20M#
H_NMI
H_INTR
H_IGNNE#
H_STPCLK#
H_FERR#
H_SMI#
H_INIT#
XDP_TDO
XDP_TDO
H_HIT# 7
H_HITM# 7
H_RS#0 7
H_RS#1 7
H_RS#2 7
H_A#[3..16]7
H_ADSTB#07
H_REQ#07
H_REQ#17
H_REQ#27
H_A#[17..35]7
H_ADSTB#17
H_REQ#47
H_REQ#37
H_A20M#22
H_IGNNE#22
H_STPCLK#22
H_INTR22
H_NMI22
H_SMI#22
CLK_CPU_BCLK 16
CLK_CPU_BCLK# 16
H_ADS# 7
H_BNR# 7
H_DEFER# 7
H_DRDY# 7
H_DBSY# 7
H_BR0# 7
H_BPRI# 7
H_TRDY# 7
EC_SMB_DA2 17,33,34,35
EC_SMB_CK2 17,33,34,35
H_THERMTRIP# 8,22
H_LOCK# 7
XDP_DBRESET# 23
H_RESET# 7
H_INIT# 22
OCP# 23
H_FERR#22
EN_DFAN133
FAN_SPEED1 33
+1.05VS
+1.05VS
+1.05VS
+3VS
+3VS
+3VS
+5VS
+3VS
Title
Size Document Number Rev
Date: Sheet
of
Security Classification
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
401662
D
SCHEMATIC,MB A4991
548Thursday, May 21, 2009
2008/10/06 2009/10/06
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet
of
Security Classification
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
401662
D
SCHEMATIC,MB A4991
548Thursday, May 21, 2009
2008/10/06 2009/10/06
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet
of
Security Classification
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
401662
D
SCHEMATIC,MB A4991
548Thursday, May 21, 2009
2008/10/06 2009/10/06
Compal Electronics, Inc.
H_THERMDA, H_THERMDC routing together,
Trace width / Spacing = 10 / 10 mil
PROCHOT# PU: 68Ohm near CPU and MVP6.
56Ohm near CPU if no used.
Address:0100_1100 EMC1402-1
Address:0100_1101 EMC1402-2
FAN Control Circuit
Reserve for source control
Reserve for
debug
close to South
Bridge
Reserve for
debug
close to CPU
if use XDP,these resistor are 51ohm
1A
10mil
C64 33P_0402_50V8KC64 33P_0402_50V8K
1 2
U2
APL5607KI-TRG_SO8
U2
APL5607KI-TRG_SO8
EN
1
VIN
2
VOUT
3
VSET
4
GND
8
GND
7
GND
6
GND
5
C597 180P_0402_50V8J@C597 180P_0402_50V8J@
12
C600 180P_0402_50V8J@C600 180P_0402_50V8J@
12
R4 54.9_0402_1%R4 54.9_0402_1%
1 2
E
B
C
Q6
MMBT3904_SOT23@
E
B
C
Q6
MMBT3904_SOT23@
2
3 1
ADDR GROUP_0
ADDR GROUP_1
CONTROL
XDP/ITP SIGNALS
H CLK
THERMAL
RESERVED
ICH
JCPUA
Penryn
@
ADDR GROUP_0
ADDR GROUP_1
CONTROL
XDP/ITP SIGNALS
H CLK
THERMAL
RESERVED
ICH
JCPUA
Penryn
@
A[10]#
N3
A[11]#
P5
A[12]#
P2
A[13]#
L2
A[14]#
P4
A[15]#
P1
A[16]#
R1
A[17]#
Y2
A[18]#
U5
A[19]#
R3
A[20]#
W6
A[21]#
U4
A[22]#
Y5
A[23]#
U1
A[24]#
R4
A[25]#
T5
A[26]#
T3
A[27]#
W2
A[28]#
W5
A[29]#
Y4
A[3]#
J4
A[30]#
U2
A[31]#
V4
RSVD[01]
M4
RSVD[02]
N5
RSVD[03]
T2
RSVD[04]
V3
RSVD[05]
B2
RSVD[06]
D2
RSVD[07]
D22
A[4]#
L5
A[5]#
L4
A[6]#
K5
A[7]#
M3
A[8]#
N2
A[9]#
J1
A20M#
A6
ADS#
H1
ADSTB[0]#
M1
ADSTB[1]#
V1
RSVD[08]
D3
BCLK[0]
A22
BCLK[1]
A21
BNR#
E2
BPM[0]#
AD4
BPM[1]#
AD3
BPM[2]#
AD1
BPM[3]#
AC4
BPRI#
G5
BR0#
F1
DBR#
C20
DBSY#
E1
DEFER#
H5
DRDY#
F21
FERR#
A5
HIT#
G6
HITM#
E4
IERR#
D20
IGNNE#
C4
INIT#
B3
LINT0
C6
LINT1
B4
LOCK#
H4
PRDY#
AC2
PREQ#
AC1
PROCHOT#
D21
REQ[0]#
K3
REQ[1]#
H2
REQ[2]#
K2
REQ[3]#
J3
REQ[4]#
L1
RESET#
C1
RS[0]#
F3
RS[1]#
F4
RS[2]#
G3
SMI#
A3
STPCLK#
D5
TCK
AC5
TDI
AA6
TDO
AB3
THERMTRIP#
C7
THERMDA
A24
THERMDC
B25
TMS
AB5
TRDY#
G2
TRST#
AB6
A[32]#
W3
A[33]#
AA4
A[34]#
AB2
A[35]#
AA3
RSVD[09]
F6
R3
10K_0402_5%
R3
10K_0402_5%
1 2
C4
1000P_0402_25V8J@
C4
1000P_0402_25V8J@
1
2
C596 180P_0402_50V8J@C596 180P_0402_50V8J@
12
C3
10U_0805_10V4Z
C3
10U_0805_10V4Z
1
2
C1
0.1U_0402_16V4Z
C1
0.1U_0402_16V4Z
1
2
R7 54.9_0402_1%R7 54.9_0402_1%
1 2
R5 54.9_0402_1%R5 54.9_0402_1%
1 2
R10 10K_0402_5%R10 10K_0402_5%
12
R2 10K_0402_5%
@
R2 10K_0402_5%
@
1 2
C601 180P_0402_50V8J@C601 180P_0402_50V8J@
12
R8 56_0402_5%@R8 56_0402_5%@
1 2
C602 180P_0402_50V8J@C602 180P_0402_50V8J@
12
R9 56_0402_5%R9 56_0402_5%
1 2
R14 54.9_0402_1%R14 54.9_0402_1%
1 2
C598 180P_0402_50V8J@C598 180P_0402_50V8J@
12
U1
EMC1402-1-ACZL-TR_MSOP8
U1
EMC1402-1-ACZL-TR_MSOP8
DN
3
DP
2
VDD
1
ALERT#
6
SMCLK
8
THERM#
4
GND
5
SMDATA
7
R6 54.9_0402_1%R6 54.9_0402_1%
1 2
D1
1SS355_SOD323-2
@
D1
1SS355_SOD323-2
@
12
C6
0.01U_0402_25V7K
@C6
0.01U_0402_25V7K
@
1
2
JFAN
ACES_85204-0300N
@
JFAN
ACES_85204-0300N
@
1
1
2
2
3
3
GND
4
GND
5
C603 180P_0402_50V8J@C603 180P_0402_50V8J@
12
C5
10U_0805_10V4Z
C5
10U_0805_10V4Z
1
2
C599 180P_0402_50V8J@C599 180P_0402_50V8J@
12
T13PAD T13PAD
R1 56_0402_5%R1 56_0402_5%
1 2
D2
BAS16_SOT23-3
@
D2
BAS16_SOT23-3
@
12
C2
2200P_0402_50V7K
C2
2200P_0402_50V7K
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+CPU_GTLREF
H_D#35
H_D#46
H_D#47
H_D#37
H_D#34
H_D#41
H_D#45
H_D#43
H_D#33
H_D#39
H_D#40
H_D#44
H_D#32
H_D#42
H_D#38
H_D#36
H_D#48
H_D#56
H_D#52
H_D#59
H_D#63
H_D#55
H_D#51
H_D#62
H_D#58
H_D#54
H_D#50
H_D#57
H_D#61
H_D#53
H_D#49
H_D#60
COMP0
COMP2
COMP3
COMP1
H_PWRGOOD
H_CPUSLP#
H_DPSLP#
H_DPRSTP#
COMP0
COMP2
COMP1
COMP3
H_D#4
H_D#14
H_D#10
H_D#9
H_D#3
H_D#13
H_D#6
H_D#2
H_D#8
H_D#12
H_D#1
H_D#5
H_D#7
H_D#11
H_D#0
H_D#15
H_D#27
H_D#25
H_D#31
H_D#24
H_D#20
H_D#30
H_D#23
H_D#19
H_D#29
H_D#16
H_D#18
H_D#22
H_D#26
H_D#28
H_D#17
H_D#21
+CPU_GTLREF
H_DPSLP#
H_DPRSTP#
H_PWRGOOD
H_CPUSLP#
H_D#[0..15]7
H_DSTBN#07
H_DSTBP#07
H_DINV#07
H_D#[16..31]7
H_DSTBN#17
H_DSTBP#17
H_DINV#17
H_D#[32..47] 7
H_DSTBN#2 7
H_DSTBP#2 7
H_DINV#2 7
H_D#[48..63] 7
H_DSTBN#3 7
H_DSTBP#3 7
H_DINV#3 7
CPU_BSEL08,16
CPU_BSEL18,16
CPU_BSEL28,16
H_DPWR# 7
H_DPRSTP# 8,22,43
H_DPSLP# 22
H_PSI# 43
H_PWRGOOD 22
H_CPUSLP# 7
+1.05VS
Title
Size Document Number Rev
Date: Sheet
of
Security Classification
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
401662
D
SCHEMATIC,MB A4991
648Thursday, May 21, 2009
2008/10/06 2009/10/06
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet
of
Security Classification
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
401662
D
SCHEMATIC,MB A4991
648Thursday, May 21, 2009
2008/10/06 2009/10/06
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet
of
Security Classification
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
401662
D
SCHEMATIC,MB A4991
648Thursday, May 21, 2009
2008/10/06 2009/10/06
Compal Electronics, Inc.
Resistor placed within
0.5" of CPU pin.Trace
should be at least 25
mils away from any other
toggling signal.
COMP[0,2] trace width is
18 mils. COMP[1,3] trace
width is 4 mils.
CPU_BSEL CPU_BSEL2 CPU_BSEL1
166
200
01
0
1
CPU_BSEL0
1
0
layout note: Route TEST3 & TEST5 traces on ground referenced layer to the TPs
266 0 0 0
Close to
CPU pin
AD26
within
500mils.
layout note: Please use "Daisy Chain"
to layout and the signal (H_DPRSTP#)
is routed from ICH9 to power IC,
then to NB and CPU
Reserve for
debug
close to CPU
C652 180P_0402_50V8JC652 180P_0402_50V8J
12
DATA GRP 0
DATA GRP 1
DATA GRP 2DATA GRP 3
MISC
JCPUB
Penryn
@
DATA GRP 0
DATA GRP 1
DATA GRP 2DATA GRP 3
MISC
JCPUB
Penryn
@
COMP[0]
R26
COMP[1]
U26
COMP[2]
AA1
COMP[3]
Y1
D[0]#
E22
D[1]#
F24
D[10]#
J24
D[11]#
J23
D[12]#
H22
D[13]#
F26
D[14]#
K22
D[15]#
H23
D[16]#
N22
D[17]#
K25
D[18]#
P26
D[19]#
R23
D[2]#
E26
D[20]#
L23
D[21]#
M24
D[22]#
L22
D[23]#
M23
D[24]#
P25
D[25]#
P23
D[26]#
P22
D[27]#
T24
D[28]#
R24
D[29]#
L25
D[3]#
G22
D[30]#
T25
D[31]#
N25
D[32]#
Y22
D[33]#
AB24
D[34]#
V24
D[35]#
V26
D[36]#
V23
D[37]#
T22
D[38]#
U25
D[39]#
U23
D[4]#
F23
D[40]#
Y25
D[41]#
W22
D[42]#
Y23
D[43]#
W24
D[44]#
W25
D[45]#
AA23
D[46]#
AA24
D[47]#
AB25
D[48]#
AE24
D[49]#
AD24
D[5]#
G25
D[50]#
AA21
D[51]#
AB22
D[52]#
AB21
D[53]#
AC26
D[54]#
AD20
D[55]#
AE22
D[56]#
AF23
D[57]#
AC25
D[58]#
AE21
D[59]#
AD21
D[6]#
E25
D[60]#
AC22
D[61]#
AD23
D[62]#
AF22
D[63]#
AC23
D[7]#
E23
D[8]#
K24
D[9]#
G24
TEST5
AF1
DINV[0]#
H25
DINV[1]#
N24
DINV[2]#
U22
DINV[3]#
AC20
DPRSTP#
E5
DPSLP#
B5
DPWR#
D24
DSTBN[0]#
J26
DSTBN[1]#
L26
DSTBN[2]#
Y26
DSTBN[3]#
AE25
DSTBP[0]#
H26
DSTBP[1]#
M26
DSTBP[2]#
AA26
DSTBP[3]#
AF24
GTLREF
AD26
PSI#
AE6
PWRGOOD
D6
SLP#
D7
TEST3
C24
BSEL[0]
B22
BSEL[1]
B23
BSEL[2]
C21
TEST2
D25
TEST4
AF26
TEST6
A26
TEST1
C23
TEST7
C3
R12 27.4_0402_1%R12 27.4_0402_1%
1 2
C653 180P_0402_50V8J@C653 180P_0402_50V8J@
12
R17
2K_0402_1%
R17
2K_0402_1%
12
R18 54.9_0402_1%R18 54.9_0402_1%
1 2
R15 27.4_0402_1%R15 27.4_0402_1%
1 2
JCPUD
Penryn
.
@
JCPUD
Penryn
.
@
VSS[082]
P6
VSS[148]
AE11
VSS[002]
A8
VSS[003]
A11
VSS[004]
A14
VSS[005]
A16
VSS[006]
A19
VSS[007]
A23
VSS[008]
AF2
VSS[009]
B6
VSS[010]
B8
VSS[011]
B11
VSS[012]
B13
VSS[013]
B16
VSS[014]
B19
VSS[015]
B21
VSS[016]
B24
VSS[017]
C5
VSS[018]
C8
VSS[019]
C11
VSS[020]
C14
VSS[021]
C16
VSS[022]
C19
VSS[023]
C2
VSS[024]
C22
VSS[025]
C25
VSS[026]
D1
VSS[027]
D4
VSS[028]
D8
VSS[029]
D11
VSS[030]
D13
VSS[031]
D16
VSS[032]
D19
VSS[033]
D23
VSS[034]
D26
VSS[035]
E3
VSS[036]
E6
VSS[037]
E8
VSS[038]
E11
VSS[039]
E14
VSS[040]
E16
VSS[041]
E19
VSS[042]
E21
VSS[043]
E24
VSS[044]
F5
VSS[045]
F8
VSS[046]
F11
VSS[047]
F13
VSS[048]
F16
VSS[049]
F19
VSS[050]
F2
VSS[051]
F22
VSS[052]
F25
VSS[053]
G4
VSS[054]
G1
VSS[055]
G23
VSS[056]
G26
VSS[057]
H3
VSS[058]
H6
VSS[059]
H21
VSS[060]
H24
VSS[061]
J2
VSS[062]
J5
VSS[063]
J22
VSS[064]
J25
VSS[065]
K1
VSS[066]
K4
VSS[067]
K23
VSS[068]
K26
VSS[069]
L3
VSS[070]
L6
VSS[071]
L21
VSS[072]
L24
VSS[073]
M2
VSS[074]
M5
VSS[075]
M22
VSS[076]
M25
VSS[077]
N1
VSS[078]
N4
VSS[079]
N23
VSS[080]
N26
VSS[081]
P3
VSS[162]
A25
VSS[161]
AF21
VSS[160]
AF19
VSS[159]
AF16
VSS[158]
AF13
VSS[157]
AF11
VSS[156]
AF8
VSS[155]
AF6
VSS[154]
A2
VSS[153]
AE26
VSS[152]
AE23
VSS[151]
AE19
VSS[083]
P21
VSS[084]
P24
VSS[085]
R2
VSS[086]
R5
VSS[087]
R22
VSS[088]
R25
VSS[089]
T1
VSS[090]
T4
VSS[091]
T23
VSS[092]
T26
VSS[093]
U3
VSS[094]
U6
VSS[095]
U21
VSS[096]
U24
VSS[097]
V2
VSS[098]
V5
VSS[099]
V22
VSS[100]
V25
VSS[101]
W1
VSS[102]
W4
VSS[103]
W23
VSS[104]
W26
VSS[105]
Y3
VSS[107]
Y21
VSS[108]
Y24
VSS[109]
AA2
VSS[110]
AA5
VSS[111]
AA8
VSS[112]
AA11
VSS[113]
AA14
VSS[114]
AA16
VSS[115]
AA19
VSS[116]
AA22
VSS[117]
AA25
VSS[118]
AB1
VSS[119]
AB4
VSS[120]
AB8
VSS[121]
AB11
VSS[122]
AB13
VSS[123]
AB16
VSS[124]
AB19
VSS[125]
AB23
VSS[126]
AB26
VSS[127]
AC3
VSS[128]
AC6
VSS[129]
AC8
VSS[130]
AC11
VSS[131]
AC14
VSS[132]
AC16
VSS[133]
AC19
VSS[134]
AC21
VSS[135]
AC24
VSS[136]
AD2
VSS[137]
AD5
VSS[138]
AD8
VSS[139]
AD11
VSS[140]
AD13
VSS[141]
AD16
VSS[142]
AD19
VSS[143]
AD22
VSS[144]
AD25
VSS[145]
AE1
VSS[146]
AE4
VSS[106]
Y6
VSS[001]
A4
VSS[149]
AE14
VSS[150]
AE16
VSS[147]
AE8
VSS[163]
AF25
C650 180P_0402_50V8J@C650 180P_0402_50V8J@
12
C651 180P_0402_50V8J@C651 180P_0402_50V8J@
12
R13 54.9_0402_1%R13 54.9_0402_1%
1 2
R11
1K_0402_1%
R11
1K_0402_1%
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VSSSENSE
VCCSENSE
VSSSENSE
VCCSENSE
VCCSENSE 43
VSSSENSE 43
CPU_VID0 43
CPU_VID1 43
CPU_VID2 43
CPU_VID3 43
CPU_VID4 43
CPU_VID5 43
CPU_VID6 43
+CPU_CORE
+CPU_CORE
+CPU_CORE
+CPU_CORE
+1.05VS
+1.5VS
+CPU_CORE +CPU_CORE
+CPU_CORE
+CPU_CORE
+1.05VS
Title
Size Document Number Rev
Date: Sheet
of
Security Classification
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
401662
D
SCHEMATIC,MB A4991
748Thursday, May 21, 2009
2008/10/06 2009/10/06
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet
of
Security Classification
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
401662
D
SCHEMATIC,MB A4991
748Thursday, May 21, 2009
2008/10/06 2009/10/06
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet
of
Security Classification
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
401662
D
SCHEMATIC,MB A4991
748Thursday, May 21, 2009
2008/10/06 2009/10/06
Compal Electronics, Inc.
Mid Frequence Decoupling
Place these capacitors on L8
(Sorth side,Secondary Layer)
Place these capacitors on L8
(North side,Secondary Layer)
Place these capacitors on L8
(Sorth side,Secondary Layer)
Place these capacitors on L8
(North side,Secondary Layer)
Near pin B26
Length match within 25 mils.
The trace width/space/other is
14/7/25.
Close to CPU pin
within 500mils.
Near CPU CORE regulator
ESR <= 1.5m ohm
Capacitor > 1980uF
Place these inside socket cavity on L8
(North side Secondary)
change highly to H1.9 for thermal type issue.
reserve for test
please co-layout with C7~C10
C16
10U_0805_6.3V6M
C16
10U_0805_6.3V6M
1
2
C20
10U_0805_6.3V6M
C20
10U_0805_6.3V6M
1
2
C47
0.1U_0402_10V6K
C47
0.1U_0402_10V6K
1
2
+
C8
330U_D2_2VY_R7M
+
C8
330U_D2_2VY_R7M
1
2
C30
10U_0805_6.3V6M
C30
10U_0805_6.3V6M
1
2
C50
0.01U_0402_25V7K
C50
0.01U_0402_25V7K
1
2
C11
10U_0805_6.3V6M
C11
10U_0805_6.3V6M
1
2
C42
10U_0805_6.3V6M
C42
10U_0805_6.3V6M
1
2
C29
10U_0805_6.3V6M
C29
10U_0805_6.3V6M
1
2
+
C7
330U_D2_2VY_R7M
+
C7
330U_D2_2VY_R7M
1
2
+
C10
330U_D2_2VY_R7M
+
C10
330U_D2_2VY_R7M
1
2
C17
10U_0805_6.3V6M
C17
10U_0805_6.3V6M
1
2
C27
10U_0805_6.3V6M
C27
10U_0805_6.3V6M
1
2
+
C79
330U_6.3V_M_R15
@
+
C79
330U_6.3V_M_R15
@
1
2
C45
0.1U_0402_10V6K
C45
0.1U_0402_10V6K
1
2
C24
10U_0805_6.3V6M
C24
10U_0805_6.3V6M
1
2
C37
10U_0805_6.3V6M
C37
10U_0805_6.3V6M
1
2
C22
10U_0805_6.3V6M
C22
10U_0805_6.3V6M
1
2
C34
10U_0805_6.3V6M
C34
10U_0805_6.3V6M
1
2
+
C9
330U_D2_2VY_R7M
+
C9
330U_D2_2VY_R7M
1
2
+
C80
330U_6.3V_M_R15
@
+
C80
330U_6.3V_M_R15
@
1
2
C33
10U_0805_6.3V6M
C33
10U_0805_6.3V6M
1
2
C41
10U_0805_6.3V6M
C41
10U_0805_6.3V6M
1
2
C32
10U_0805_6.3V6M
C32
10U_0805_6.3V6M
1
2
R19100_0402_1% R19100_0402_1%
12
JCPUC
Penryn
.
@
JCPUC
Penryn
.
@
VCC[001]
A7
VCC[002]
A9
VCC[003]
A10
VCC[004]
A12
VCC[005]
A13
VCC[006]
A15
VCC[007]
A17
VCC[008]
A18
VCC[009]
A20
VCC[010]
B7
VCC[011]
B9
VCC[012]
B10
VCC[013]
B12
VCC[014]
B14
VCC[015]
B15
VCC[016]
B17
VCC[017]
B18
VCC[018]
B20
VCC[019]
C9
VCC[020]
C10
VCC[021]
C12
VCC[022]
C13
VCC[023]
C15
VCC[024]
C17
VCC[025]
C18
VCC[026]
D9
VCC[027]
D10
VCC[028]
D12
VCC[029]
D14
VCC[030]
D15
VCC[031]
D17
VCC[032]
D18
VCC[033]
E7
VCC[034]
E9
VCC[035]
E10
VCC[036]
E12
VCC[037]
E13
VCC[038]
E15
VCC[039]
E17
VCC[040]
E18
VCC[041]
E20
VCC[042]
F7
VCC[043]
F9
VCC[044]
F10
VCC[045]
F12
VCC[046]
F14
VCC[047]
F15
VCC[048]
F17
VCC[049]
F18
VCC[050]
F20
VCC[051]
AA7
VCC[052]
AA9
VCC[053]
AA10
VCC[054]
AA12
VCC[055]
AA13
VCC[056]
AA15
VCC[057]
AA17
VCC[058]
AA18
VCC[059]
AA20
VCC[060]
AB9
VCC[061]
AC10
VCC[062]
AB10
VCC[063]
AB12
VCC[064]
AB14
VCC[065]
AB15
VCC[066]
AB17
VCC[067]
AB18
VCC[068]
AB20
VCC[069]
AB7
VCC[070]
AC7
VCC[071]
AC9
VCC[072]
AC12
VCC[073]
AC13
VCC[074]
AC15
VCC[075]
AC17
VCC[076]
AC18
VCC[077]
AD7
VCC[078]
AD9
VCC[079]
AD10
VCC[080]
AD12
VCC[081]
AD14
VCC[082]
AD15
VCC[083]
AD17
VCC[084]
AD18
VCC[085]
AE9
VCC[086]
AE10
VCC[087]
AE12
VCC[088]
AE13
VCC[089]
AE15
VCC[090]
AE17
VCC[091]
AE18
VCC[092]
AE20
VCC[093]
AF9
VCC[094]
AF10
VCC[095]
AF12
VCC[096]
AF14
VCC[097]
AF15
VCC[098]
AF17
VCC[099]
AF18
VCC[100]
AF20
VCCA[01]
B26
VCCP[03]
J6
VCCP[04]
K6
VCCP[05]
M6
VCCP[06]
J21
VCCP[07]
K21
VCCP[08]
M21
VCCP[09]
N21
VCCP[10]
N6
VCCP[11]
R21
VCCP[12]
R6
VCCP[13]
T21
VCCP[14]
T6
VCCP[15]
V21
VCCP[16]
W21
VCCSENSE
AF7
VID[0]
AD6
VID[1]
AF5
VID[2]
AE5
VID[3]
AF4
VID[4]
AE3
VID[5]
AF3
VID[6]
AE2
VSSSENSE
AE7
VCCA[02]
C26
VCCP[01]
G21
VCCP[02]
V6
C48
0.1U_0402_10V6K
C48
0.1U_0402_10V6K
1
2
C51
10U_0805_6.3V6M
C51
10U_0805_6.3V6M
1
2
C21
10U_0805_6.3V6M
C21
10U_0805_6.3V6M
1
2
C39
10U_0805_6.3V6M
C39
10U_0805_6.3V6M
1
2
C40
10U_0805_6.3V6M
C40
10U_0805_6.3V6M
1
2
C36
10U_0805_6.3V6M
C36
10U_0805_6.3V6M
1
2
C28
10U_0805_6.3V6M
C28
10U_0805_6.3V6M
1
2
C19
10U_0805_6.3V6M
C19
10U_0805_6.3V6M
1
2
+
C43
330U_D2_2VY_R7M
+
C43
330U_D2_2VY_R7M
1
2
R20100_0402_1% R20100_0402_1%
12
C25
10U_0805_6.3V6M
C25
10U_0805_6.3V6M
1
2
C38
10U_0805_6.3V6M
C38
10U_0805_6.3V6M
1
2
C44
0.1U_0402_10V6K
C44
0.1U_0402_10V6K
1
2
C35
10U_0805_6.3V6M
C35
10U_0805_6.3V6M
1
2
C14
10U_0805_6.3V6M
C14
10U_0805_6.3V6M
1
2
C12
10U_0805_6.3V6M
C12
10U_0805_6.3V6M
1
2
C18
10U_0805_6.3V6M
C18
10U_0805_6.3V6M
1
2
C49
0.1U_0402_10V6K
C49
0.1U_0402_10V6K
1
2
C13
10U_0805_6.3V6M
C13
10U_0805_6.3V6M
1
2
C46
0.1U_0402_10V6K
C46
0.1U_0402_10V6K
1
2
C23
10U_0805_6.3V6M
C23
10U_0805_6.3V6M
1
2
C31
10U_0805_6.3V6M
C31
10U_0805_6.3V6M
1
2
C15
10U_0805_6.3V6M
C15
10U_0805_6.3V6M
1
2
C26
10U_0805_6.3V6M
C26
10U_0805_6.3V6M
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+H_VREF
H_A#7
H_A#12
H_A#32
H_A#24
H_A#3
H_A#18
H_A#21
H_A#16
H_A#19
H_A#31
H_A#27
H_A#5
H_A#30
H_A#9
H_A#26
H_A#14
H_A#11
H_A#22
H_A#23
H_A#34
H_A#20
H_A#8
H_A#15
H_A#6
H_A#25
H_A#17
H_A#4
H_A#13
H_A#33
H_A#29
H_A#28
H_A#10
H_A#35
H_D#23
H_D#11
H_D#31
H_D#37
H_D#58
H_D#50
H_D#5
H_D#2
H_D#60
H_D#27
H_D#39
H_D#35
H_D#52
H_D#59
H_D#51
H_D#44
H_D#8
H_D#10
H_D#43
H_D#3
H_D#4
H_D#14
H_D#56
H_D#18
H_D#36
H_D#55
H_D#34
H_D#48
H_D#28
H_D#24
H_D#22
H_D#29
H_D#16
H_D#62
H_D#13
H_D#9
H_D#57
H_D#20
H_D#17
H_D#0
H_D#1
H_D#26
H_D#7
H_D#53
H_D#45
H_D#40
H_D#15
H_D#54
H_D#25
H_D#38
H_D#41
H_D#32
H_D#42
H_D#12
H_D#6
H_D#61
H_D#19
H_D#63
H_D#46
H_D#21
H_D#30
H_D#33
H_D#47
H_D#49
H_RCOMP+H_VREF
H_RCOMP
H_SWNG
H_SWNG
H_D#[0..63]5
H_A#[3..35] 4
H_RESET#4
H_CPUSLP#5
H_HIT# 4
H_HITM# 4
H_DSTBN#0 5
H_DSTBN#1 5
H_DSTBN#2 5
H_DSTBN#3 5
H_DSTBP#0 5
H_DSTBP#1 5
H_DSTBP#2 5
H_DSTBP#3 5
H_REQ#3 4
H_REQ#2 4
H_REQ#1 4
H_REQ#4 4
H_REQ#0 4
H_ADS# 4
H_BNR# 4
H_BR0# 4
H_DBSY# 4
H_DPWR# 5
H_DRDY# 4
H_DINV#0 5
H_DINV#1 5
H_DINV#2 5
H_DINV#3 5
H_ADSTB#0 4
H_ADSTB#1 4
CLK_MCH_BCLK 16
CLK_MCH_BCLK# 16
H_RS#0 4
H_RS#1 4
H_RS#2 4
H_BPRI# 4
H_DEFER# 4
H_LOCK# 4
H_TRDY# 4
+1.05VS+1.05VS
Title
Size Document Number Rev
Date: Sheet
of
Security Classification
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
401662
D
SCHEMATIC,MB A4991
848Thursday, May 21, 2009
2008/10/06 2009/10/06
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet
of
Security Classification
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
401662
D
SCHEMATIC,MB A4991
848Thursday, May 21, 2009
2008/10/06 2009/10/06
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet
of
Security Classification
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
401662
D
SCHEMATIC,MB A4991
848Thursday, May 21, 2009
2008/10/06 2009/10/06
Compal Electronics, Inc.
Near B3 pin
Layout Note:
H_RCOMP / +H_VREF / H_SWNG
trace width and spacing is 10/20
within 100 mils from NB
H_SWING=0.3125*VCCP
R22
221_0402_1%
R22
221_0402_1%
12
R21
1K_0402_1%
R21
1K_0402_1%
12
HOST
U3A
CANTIGA ES_FCBGA1329
G7R3@
HOST
U3A
CANTIGA ES_FCBGA1329
G7R3@
H_A#_3
A14
H_A#_4
C15
H_A#_5
F16
H_A#_6
H13
H_A#_7
C18
H_A#_8
M16
H_A#_9
J13
H_A#_10
P16
H_A#_11
R16
H_A#_12
N17
H_A#_13
M13
H_A#_14
E17
H_A#_15
P17
H_A#_16
F17
H_A#_17
G20
H_A#_18
B19
H_A#_19
J16
H_A#_20
E20
H_A#_21
H16
H_A#_22
J20
H_A#_23
L17
H_A#_24
A17
H_A#_25
B17
H_A#_26
L16
H_A#_27
C21
H_A#_28
J17
H_A#_29
H20
H_A#_30
B18
H_A#_31
K17
H_A#_32
B20
H_A#_33
F21
H_A#_34
K21
H_A#_35
L20
H_ADS#
H12
H_ADSTB#_0
B16
H_ADSTB#_1
G17
H_BNR#
A9
H_BPRI#
F11
H_BREQ#
G12
H_DEFER#
E9
H_DBSY#
B10
HPLL_CLK
AH7
HPLL_CLK#
AH6
H_DPWR#
J11
H_DRDY#
F9
H_HIT#
H9
H_HITM#
E12
H_LOCK#
H11
H_TRDY#
C9
H_DINV#_0
J8
H_DINV#_1
L3
H_DINV#_2
Y13
H_DINV#_3
Y1
H_DSTBN#_0
L10
H_DSTBN#_1
M7
H_DSTBN#_2
AA5
H_DSTBN#_3
AE6
H_DSTBP#_0
L9
H_DSTBP#_1
M8
H_DSTBP#_2
AA6
H_DSTBP#_3
AE5
H_REQ#_0
B15
H_REQ#_1
K13
H_REQ#_2
F13
H_REQ#_3
B13
H_REQ#_4
B14
H_RS#_0
B6
H_RS#_1
F12
H_RS#_2
C8
H_D#_0
F2
H_D#_1
G8
H_D#_2
F8
H_D#_3
E6
H_D#_4
G2
H_D#_5
H6
H_D#_6
H2
H_D#_7
F6
H_D#_8
D4
H_D#_9
H3
H_D#_10
M9
H_D#_11
M11
H_D#_12
J1
H_D#_13
J2
H_D#_14
N12
H_D#_15
J6
H_D#_16
P2
H_D#_17
L2
H_D#_18
R2
H_D#_19
N9
H_D#_20
L6
H_D#_21
M5
H_D#_22
J3
H_D#_23
N2
H_D#_24
R1
H_D#_25
N5
H_D#_26
N6
H_D#_27
P13
H_D#_28
N8
H_D#_29
L7
H_D#_30
N10
H_D#_31
M3
H_D#_32
Y3
H_D#_33
AD14
H_D#_34
Y6
H_D#_35
Y10
H_D#_36
Y12
H_D#_37
Y14
H_D#_38
Y7
H_D#_39
W2
H_D#_40
AA8
H_D#_41
Y9
H_D#_42
AA13
H_D#_43
AA9
H_D#_44
AA11
H_D#_45
AD11
H_D#_46
AD10
H_D#_47
AD13
H_D#_48
AE12
H_D#_49
AE9
H_D#_50
AA2
H_D#_51
AD8
H_D#_52
AA3
H_D#_53
AD3
H_D#_54
AD7
H_D#_55
AE14
H_D#_56
AF3
H_D#_57
AC1
H_D#_58
AE3
H_D#_59
AC3
H_D#_60
AE11
H_D#_61
AE8
H_D#_62
AG2
H_D#_63
AD6
H_SWING
C5
H_RCOMP
E3
H_CPURST#
C12
H_CPUSLP#
E11
H_AVREF
A11
H_DVREF
B11
C52
0.1U_0402_16V4Z
@
C52
0.1U_0402_16V4Z
@
1
2
R23
2K_0402_1%
R23
2K_0402_1%
12
C53
0.1U_0402_16V4Z
C53
0.1U_0402_16V4Z
1
2
R24
24.9_0402_1%
R24
24.9_0402_1%
12
R25
100_0402_1%
R25
100_0402_1%
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+CL_VREF
+SM_RCOMP_VOH
+SM_VREF
MCH_CFG_9
SMRCOMP#
SMRCOMP
MCH_CFG_13
MCH_CFG_12
MCH_CFG_10
+SM_RCOMP_VOL
ICH_PWROK
MCH_CFG_16
MCH_CFG_19
SM_PWROK
CLK_DREF_96M
CLK_DREF_96M#
CLK_DREF_SSC#
CLK_DREF_SSC
MCH_CLKSEL1
MCH_CLKSEL0
MCH_CLKSEL2
DPRSLPVR
MCH_RSTIN#
GMCH_PWROK
NB_THERMTRIP#
PM_SYNC#_R
MCH_CFG_5
MCH_TSATN#
MCH_CFG_6
+SM_RCOMP_VOH
+SM_RCOMP_VOL
AZ_SDIN2_MCH_R
MCH_CFG_7
SDVO_SDATA
SDVO_SCLK
PM_EXTTS#_R
GMCH_PWROK
MCH_CFG_20
PM_EXTTS#_R
MCH_TSATN#
SM_REXT
CLK_DREF_SSC#
CLK_DREF_SSC
CLK_DREF_96M
CLK_DREF_96M#
SDVO_SDATA
SDVO_SCLK
DP_CLK
DP_DATA
AZ_BITCLK_MCH
PM_SYNC#23
H_DPRSTP#5,22,43
PM_EXTTS#14,15
PLT_RST#17,21,26,28,29,32,33,34
AZ_SDIN2_MCH 22
CPU_BSEL05,16
CPU_BSEL15,16
CPU_BSEL25,16
ICH_PWROK23
VGATE23,33,43
H_THERMTRIP#4,22
PM_DPRSLPVR23,43
MCH_TSATN_EC# 33
CLKREQ_3GPLL# 16
CL_DATA0 23
CL_CLK0 23
CL_RST#0 23
CLK_DREF_SSC 16
CLK_DREF_96M# 16
CLK_DREF_96M 16
CLK_DREF_SSC# 16
DMI_MTX_IRX_N2 21
DMI_MTX_IRX_N1 21
DMI_MTX_IRX_N0 21
DMI_MTX_IRX_P2 21
DMI_MTX_IRX_P1 21
DMI_MTX_IRX_P0 21
DMI_MTX_IRX_N3 21
DMI_MTX_IRX_P3 21
DMI_ITX_MRX_N2 21
DMI_ITX_MRX_N1 21
DMI_ITX_MRX_N0 21
DMI_ITX_MRX_P2 21
DMI_ITX_MRX_P1 21
DMI_ITX_MRX_P0 21
DMI_ITX_MRX_N3 21
DMI_ITX_MRX_P3 21
SDVO_SDATA 20
SDVO_SCLK 20
MCH_ICH_SYNC# 23
AZ_BITCLK_MCH 22
AZ_RST_MCH# 22
AZ_SDOUT_MCH 22
DDRA_CLK0 14
AZ_SYNC_MCH 22
DDRA_CLK1 14
DDRB_CLK0 15
DDRB_CLK1 15
DDRA_CLK0# 14
DDRA_CLK1# 14
DDRB_CLK0# 15
DDRB_CLK1# 15
DDRA_CKE0 14
DDRA_CKE1 14
DDRB_CKE0 15
DDRB_CKE1 15
DDRA_SCS0# 14
DDRA_SCS1# 14
DDRB_SCS0# 15
DDRB_SCS1# 15
DDRA_ODT0 14
DDRA_ODT1 14
DDRB_ODT0 15
DDRB_ODT1 15
CLK_MCH_3GPLL 16
CLK_MCH_3GPLL# 16
DP_CLK 10
DP_DATA 10
+1.8V
+1.8V
+1.05VS
+1.8V
+3VS
+3VS
+1.05VS
+3VS
+3VS
Title
Size Document Number Rev
Date: Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
401662
D
SCHEMATIC,MB A4991
948Thursday, May 21, 2009
2008/10/06 2009/10/06
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
401662
D
SCHEMATIC,MB A4991
948Thursday, May 21, 2009
2008/10/06 2009/10/06
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
401662
D
SCHEMATIC,MB A4991
948Thursday, May 21, 2009
2008/10/06 2009/10/06
Compal Electronics, Inc.
Use VGATE for GMCH_PWROK
For Cantiga 80 Ohm
20mil
SM_DRAMRST# would be
needed for DDR3 only
CL_VREF
should be
0.35 V
+CL_VREF=0.355V
1 = Disable
0 = PCIe Loopback Enable
CFG10
(Default)
*
CFG6
*
0 = Lane Reversal Enable
(Default)1 = Normal Operation
CFG19
1 = PCIE/[SDVO/DP/HDMI] are operating simu.
CFG[13:12]
000 = FSB1067
*
Strap Pin Table
0 = DMI x 2
CFG20
CFG5
1 = iTPM Host Interface is Disabled
(Default)
01 = All Z Mode Enabled
*
(Default)
1 = Dynamic ODT Enabled
*
1 = DMI Lane Reversal Enable
*
can support disble by SW.
1 = DMI x 4
*
00 = Reserved
(Default)
(Default)
0 = Normal Operation
(Default)
*
(PCIE/SDVO select)
0 = Dynamic ODT Disabled
0 = Only PCIE or [SDVO/DP/HDMI] is operational.
011 = FSB667
CFG16
010 = FSB800
10 = XOR Mode Enabled
11 = Normal Operation
CFG[2:0]
CFG9
0 = iTPM Host Interface is enabled
CFG7
1 = Intel Management Engine Crypto TLS cipher suite with
confidentiality
0 = Intel Management Engine Crypto Transport Layer Security
(TLS) cipher suite with no confidentiality
*
(Default)
1 = Digital display (iHDMI/DP) interface enabled
(Default)
DDPC_CTRLDATA
*
0 = Digital display (iHDMI/DP) interface disabled
SDVO_CTRLDATA
*
0 = SDVO interface disabled
1 = SDVO interface enabled
(Default)
Strap Pin Table
Width:Spacing
12mil:12mil
(Internal pull-down)
(Internal pull-down)
Internal pull-up
Internal pull-up
Internal pull-up
Internal pull-up
Internal pull-up
Internal pull-up
Internal pull-up
Internal pull-down
Internal pull-down
(Default)
Lane reversal
Please place these resistors close to related balls
the strap pin will impact no IHDMI SKU if mount R62
R60
499_0402_1%
R60
499_0402_1%
1 2
R44 2.21K_0402_1%@R44 2.21K_0402_1%@
1 2
R53 0_0402_5%R53 0_0402_5%
1 2
R28
1K_0402_1%
R28
1K_0402_1%
12
R57
1K_0402_1%
R57
1K_0402_1%
1 2
C55
2.2U_0603_6.3V6K
C55
2.2U_0603_6.3V6K
1
2
R61
2.2K_0402_5%
GM@R61
2.2K_0402_5%
GM@
12
R579 0_0402_5%
GM@
R579 0_0402_5%
GM@
1 2
R61
0_0402_5%
PM@
R61
0_0402_5%
PM@
T1 PADT1 PAD
R33 499_0402_1%R33 499_0402_1%
1 2
R47 2.21K_0402_1%@R47 2.21K_0402_1%@
1 2
R38
1K_0402_5%
R38
1K_0402_5%
12
R40 2.21K_0402_1%@R40 2.21K_0402_1%@
1 2
R45 2.21K_0402_1%@R45 2.21K_0402_1%@
1 2
C66
33P_0402_50V8K
IHDMI@C66
33P_0402_50V8K
IHDMI@
12
R59 0_0402_5%R59 0_0402_5%
1 2
RA35
0_0402_5%
IHDMI@ RA35
0_0402_5%
IHDMI@
1 2
R26
1K_0402_1%
R26
1K_0402_1%
12
R32 0_0402_5%R32 0_0402_5%
1 2
R62
0_0402_5%
PM@
R62
0_0402_5%
PM@
R46 2.21K_0402_1%@R46 2.21K_0402_1%@
1 2
R43 2.21K_0402_1%@R43 2.21K_0402_1%@
1 2
R36 1K_0402_5%R36 1K_0402_5%
12
R575 0_0402_5%
PM@
R575 0_0402_5%
PM@
1 2
R54 100_0402_5%R54 100_0402_5%
1 2
R49 4.02K_0402_1%R49 4.02K_0402_1%
1 2
R576 0_0402_5%
PM@
R576 0_0402_5%
PM@
1 2
R41
54.9_0402_1%
R41
54.9_0402_1%
12
T2 PADT2 PAD
C56
0.01U_0402_25V7K
C56
0.01U_0402_25V7K
1
2
R39 2.21K_0402_1%@R39 2.21K_0402_1%@
1 2
R578 0_0402_5%
PM@
R578 0_0402_5%
PM@
1 2
R42
1K_0402_5%
R42
1K_0402_5%
12
R63 33_0402_5%
IHDMI@
R63 33_0402_5%
IHDMI@
1 2
R58 0_0402_5%@R58 0_0402_5%@
1 2
R37 1K_0402_5%R37 1K_0402_5%
12
R52 10K_0402_5%R52 10K_0402_5%
1 2
R56 0_0402_5%R56 0_0402_5%
1 2
R48 2.21K_0402_1%@R48 2.21K_0402_1%@
1 2
T12 PADT12 PAD
R35 1K_0402_5%R35 1K_0402_5%
12
R580 0_0402_5%
PM@
R580 0_0402_5%
PM@
1 2
R577 0_0402_5%
PM@
R577 0_0402_5%
PM@
1 2
R29 80.6_0402_1%R29 80.6_0402_1%
1 2
C58
0.1U_0402_16V4Z
@
C58
0.1U_0402_16V4Z
@
1
2
R50 4.02K_0402_1%@R50 4.02K_0402_1%@
1 2
R27
3.01K_0402_1%
R27
3.01K_0402_1%
12
E
B
C
Q7
MMBT3904_SOT23-3
E
B
C
Q7
MMBT3904_SOT23-3
2
3 1
R62
2.2K_0402_5%
IHDMI@R62
2.2K_0402_5%
IHDMI@
12
C59
0.1U_0402_16V4Z
C59
0.1U_0402_16V4Z
1
2
C57
2.2U_0603_6.3V6K
C57
2.2U_0603_6.3V6K
1
2
C54
0.01U_0402_25V7K
C54
0.01U_0402_25V7K
1
2
R51 0_0402_5%R51 0_0402_5%
1 2
R31
1K_0402_1%
R31
1K_0402_1%
1 2
R34
1K_0402_1%
R34
1K_0402_1%
1 2
R30 80.6_0402_1%R30 80.6_0402_1%
1 2
R55 0_0402_5%R55 0_0402_5%
1 2
RSVD CFG PM NC
CLKDMIGRAPHICS VIDMEMISC
DDR CLK/ CONTROL/ COMPENSATIONHDA
U3B
CANTIGA ES_FCBGA1329
G7R3@
RSVD CFG PM NC
CLKDMIGRAPHICS VIDMEMISC
DDR CLK/ CONTROL/ COMPENSATIONHDA
U3B
CANTIGA ES_FCBGA1329
G7R3@
SA_CK_0
AP24
SA_CK_1
AT21
SB_CK_0
AV24
SB_CK_1
AU20
SA_CK#_0
AR24
SA_CK#_1
AR21
SB_CK#_0
AU24
SB_CK#_1
AV20
SA_CKE_0
BC28
SA_CKE_1
AY28
SB_CKE_0
AY36
SB_CKE_1
BB36
SA_CS#_0
BA17
SA_CS#_1
AY16
SB_CS#_0
AV16
SB_CS#_1
AR13
SA_ODT_0
BD17
SA_ODT_1
AY17
SB_ODT_O
BF15
SB_ODT_1
AY13
SM_RCOMP
BG22
SM_RCOMP#
BH21
SM_RCOMP_VOH
BF28
SM_RCOMP_VOL
BH28
SM_VREF
AV42
SM_PWROK
AR36
SM_REXT
BF17
SM_DRAMRST#
BC36
DPLL_REF_CLK
B38
DPLL_REF_CLK#
A38
DPLL_REF_SSCLK
E41
DPLL_REF_SSCLK#
F41
PEG_CLK
F43
PEG_CLK#
E43
DMI_RXN_0
AE41
DMI_RXN_1
AE37
DMI_RXN_2
AE47
DMI_RXN_3
AH39
DMI_RXP_0
AE40
DMI_RXP_1
AE38
DMI_RXP_2
AE48
DMI_RXP_3
AH40
DMI_TXN_0
AE35
DMI_TXN_1
AE43
DMI_TXN_2
AE46
DMI_TXN_3
AH42
DMI_TXP_0
AD35
DMI_TXP_1
AE44
DMI_TXP_2
AF46
DMI_TXP_3
AH43
GFX_VID_0
B33
GFX_VID_1
B32
GFX_VID_2
G33
GFX_VID_3
F33
GFX_VID_4
E33
GFX_VR_EN
C34
CL_CLK
AH37
CL_DATA
AH36
CL_PWROK
AN36
CL_RST#
AJ35
CL_VREF
AH34
DDPC_CTRLCLK
N28
DDPC_CTRLDATA
M28
SDVO_CTRLCLK
G36
SDVO_CTRLDATA
E36
CLKREQ#
K36
ICH_SYNC#
H36
HDA_BCLK
B28
HDA_RST#
B30
HDA_SDI
B29
HDA_SDO
C29
HDA_SYNC
A28
RSVD1
M36
RSVD2
N36
RSVD3
R33
RSVD4
T33
RSVD5
AH9
RSVD6
AH10
RSVD7
AH12
RSVD8
AH13
RSVD9
K12
RSVD10
AL34
RSVD11
AK34
RSVD12
AN35
RSVD13
AM35
RSVD14
T24
RSVD15
B31
RSVD17
M1
RSVD20
AY21
RSVD22
BG23
RSVD23
BF23
RSVD24
BH18
CFG_0
T25
CFG_1
R25
CFG_2
P25
CFG_3
P20
CFG_4
P24
CFG_5
C25
CFG_6
N24
CFG_7
M24
CFG_8
E21
CFG_9
C23
CFG_10
C24
CFG_11
N21
CFG_12
P21
CFG_13
T21
CFG_14
R20
CFG_15
M20
CFG_16
L21
CFG_17
H21
CFG_18
P29
CFG_19
R28
CFG_20
T28
PM_SYNC#
R29
PM_DPRSTP#
B7
PM_EXT_TS#_0
N33
PM_EXT_TS#_1
P32
PWROK
AT40
RSTIN#
AT11
THERMTRIP#
T20
DPRSLPVR
R32
NC_1
BG48
NC_2
BF48
NC_3
BD48
NC_4
BC48
NC_5
BH47
NC_6
BG47
NC_7
BE47
NC_8
BH46
NC_9
BF46
NC_10
BG45
NC_11
BH44
NC_12
BH43
NC_13
BH6
NC_14
BH5
NC_15
BG4
NC_16
BH3
NC_17
BF3
NC_18
BH2
NC_19
BG2
NC_20
BE2
NC_21
BG1
NC_22
BF1
NC_23
BD1
NC_24
BC1
NC_25
F1
RSVD16
B2
RSVD25
BF18
NC_26
A47
TSATN#
B12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDR_A_D63
DDR_A_D62
DDR_A_D8
DDR_A_D5
DDR_A_D4
DDR_A_D3
DDR_A_D7
DDR_A_D6
DDR_A_D59
DDR_A_D58
DDR_A_D57
DDR_A_D56
DDR_A_D47
DDR_A_D46
DDR_A_D43
DDR_A_D42
DDR_A_D41
DDR_A_D40
DDR_A_D45
DDR_A_D44
DDR_A_D39
DDR_A_D38
DDR_A_D35
DDR_A_D34
DDR_A_D33
DDR_A_D32
DDR_A_D37
DDR_A_D36
DDR_A_D61
DDR_A_D60
DDR_A_D2
DDR_A_D1
DDR_A_D0
DDR_A_D55
DDR_A_D54
DDR_A_D51
DDR_A_D50
DDR_A_D49
DDR_A_D48
DDR_A_D53
DDR_A_D52
DDR_A_D31
DDR_A_D30
DDR_A_D27
DDR_A_D26
DDR_A_D25
DDR_A_D24
DDR_A_D15
DDR_A_D14
DDR_A_D11
DDR_A_D10
DDR_A_D9
DDR_A_D13
DDR_A_D12
DDR_A_D29
DDR_A_D28
DDR_A_D23
DDR_A_D22
DDR_A_D19
DDR_A_D18
DDR_A_D17
DDR_A_D16
DDR_A_D21
DDR_A_D20
DDR_B_D32
DDR_B_D33
DDR_B_D36
DDR_B_D37
DDR_B_D38
DDR_B_D39
DDR_B_D48
DDR_B_D49
DDR_B_D52
DDR_B_D53
DDR_B_D54
DDR_B_D55
DDR_B_D50
DDR_B_D51
DDR_B_D56
DDR_B_D57
DDR_B_D60
DDR_B_D61
DDR_B_D62
DDR_B_D63
DDR_B_D58
DDR_B_D59
DDR_B_D34
DDR_B_D35
DDR_B_D40
DDR_B_D41
DDR_B_D44
DDR_B_D45
DDR_B_D46
DDR_B_D47
DDR_B_D42
DDR_B_D43
DDR_B_D0
DDR_B_D1
DDR_B_D4
DDR_B_D5
DDR_B_D6
DDR_B_D7
DDR_B_D16
DDR_B_D17
DDR_B_D20
DDR_B_D21
DDR_B_D22
DDR_B_D23
DDR_B_D18
DDR_B_D19
DDR_B_D24
DDR_B_D25
DDR_B_D28
DDR_B_D29
DDR_B_D30
DDR_B_D31
DDR_B_D26
DDR_B_D27
DDR_B_D2
DDR_B_D3
DDR_B_D8
DDR_B_D9
DDR_B_D12
DDR_B_D13
DDR_B_D14
DDR_B_D15
DDR_B_D10
DDR_B_D11
DDR_B_DM2
DDR_B_DM7
DDR_B_DM1
DDR_B_DM6
DDR_B_DM0
DDR_B_DM4
DDR_B_DQS0
DDR_B_DQS6
DDR_B_DQS3
DDR_B_DQS2
DDR_B_DQS#4
DDR_B_DQS#5
DDR_B_DQS#0
DDR_B_DQS#1
DDR_B_DQS#7
DDR_B_MA2
DDR_B_MA10
DDR_B_MA11
DDR_B_MA1
DDR_B_MA0
DDR_B_MA4
DDR_B_MA5
DDR_B_MA6
DDR_B_MA7
DDR_B_MA12
DDR_B_MA14
DDR_B_DM3
DDR_B_DQS4
DDR_B_MA9
DDR_B_DQS#2
DDR_B_DQS#3
DDR_B_DQS#6
DDR_B_DM5
DDR_B_MA3
DDR_B_MA13
DDR_B_DQS7
DDR_B_DQS5
DDR_B_MA8
DDR_B_DQS1
DDR_A_DM1
DDR_A_DM5
DDR_A_DM2
DDR_A_MA14
DDR_A_MA0
DDR_A_DM3
DDR_A_DM6
DDR_A_DM4
DDR_A_MA1
DDR_A_MA4
DDR_A_MA2
DDR_A_MA3
DDR_A_DM0
DDR_A_MA5
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_MA12
DDR_A_MA13
DDR_A_MA11
DDR_A_MA10
DDR_A_DQS#0
DDR_A_DQS#1
DDR_A_DQS#3
DDR_A_DQS#2
DDR_A_DQS#5
DDR_A_DQS#4
DDR_A_DQS#6
DDR_A_DQS#7
DDR_A_DM7
DDR_A_DQS0
DDR_A_DQS5
DDR_A_DQS2
DDR_A_DQS7
DDR_A_DQS1
DDR_A_DQS3
DDR_A_DQS6
DDR_A_DQS4
DDR_A_D[0..63]14 DDR_B_D[0..63]15
DDR_A_BS0 14
DDR_A_BS1 14
DDR_A_BS2 14
DDR_A_RAS# 14
DDR_A_CAS# 14
DDR_A_WE# 14
DDR_B_RAS# 15
DDR_B_CAS# 15
DDR_B_WE# 15
DDR_B_BS0 15
DDR_B_BS1 15
DDR_B_BS2 15
DDR_B_DM[0..7] 15
DDR_B_DQS[0..7] 15
DDR_B_DQS#[0..7] 15
DDR_B_MA[0..14] 15
DDR_A_DQS#[0..7] 14
DDR_A_MA[0..14] 14
DDR_A_DM[0..7] 14
DDR_A_DQS[0..7] 14
Title
Size Document Number Rev
Date: Sheet
of
Security Classification
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
401662
D
SCHEMATIC,MB A4991
10 48Thursday, May 21, 2009
2008/10/06 2009/10/06
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet
of
Security Classification
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
401662
D
SCHEMATIC,MB A4991
10 48Thursday, May 21, 2009
2008/10/06 2009/10/06
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet
of
Security Classification
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
401662
D
SCHEMATIC,MB A4991
10 48Thursday, May 21, 2009
2008/10/06 2009/10/06
Compal Electronics, Inc.
DDR SYSTEM MEMORY B
U3E
CANTIGA ES_FCBGA1329
G7R3@
DDR SYSTEM MEMORY B
U3E
CANTIGA ES_FCBGA1329
G7R3@
SB_DQ_0
AK47
SB_DQ_1
AH46
SB_DQ_2
AP47
SB_DQ_3
AP46
SB_DQ_4
AJ46
SB_DQ_5
AJ48
SB_DQ_6
AM48
SB_DQ_7
AP48
SB_DQ_8
AU47
SB_DQ_9
AU46
SB_DQ_10
BA48
SB_DQ_11
AY48
SB_DQ_12
AT47
SB_DQ_13
AR47
SB_DQ_14
BA47
SB_DQ_15
BC47
SB_DQ_16
BC46
SB_DQ_17
BC44
SB_DQ_18
BG43
SB_DQ_19
BF43
SB_DQ_20
BE45
SB_DQ_21
BC41
SB_DQ_22
BF40
SB_DQ_23
BF41
SB_DQ_24
BG38
SB_DQ_25
BF38
SB_DQ_26
BH35
SB_DQ_27
BG35
SB_DQ_28
BH40
SB_DQ_29
BG39
SB_DQ_30
BG34
SB_DQ_31
BH34
SB_DQ_32
BH14
SB_DQ_33
BG12
SB_DQ_34
BH11
SB_DQ_35
BG8
SB_DQ_36
BH12
SB_DQ_37
BF11
SB_DQ_38
BF8
SB_DQ_39
BG7
SB_DQ_40
BC5
SB_DQ_41
BC6
SB_DQ_42
AY3
SB_DQ_43
AY1
SB_DQ_44
BF6
SB_DQ_45
BF5
SB_DQ_46
BA1
SB_DQ_47
BD3
SB_DQ_48
AV2
SB_DQ_49
AU3
SB_DQ_50
AR3
SB_DQ_51
AN2
SB_DQ_52
AY2
SB_DQ_53
AV1
SB_DQ_54
AP3
SB_DQ_55
AR1
SB_DQ_56
AL1
SB_DQ_57
AL2
SB_DQ_58
AJ1
SB_DQ_59
AH1
SB_DQ_60
AM2
SB_DQ_61
AM3
SB_DQ_62
AH3
SB_DQ_63
AJ3
SB_BS_0
BC16
SB_BS_1
BB17
SB_BS_2
BB33
SB_RAS#
AU17
SB_CAS#
BG16
SB_WE#
BF14
SB_DM_0
AM47
SB_DM_1
AY47
SB_DM_2
BD40
SB_DM_3
BF35
SB_DM_4
BG11
SB_DM_5
BA3
SB_DM_6
AP1
SB_DM_7
AK2
SB_DQS_0
AL47
SB_DQS_1
AV48
SB_DQS_2
BG41
SB_DQS_3
BG37
SB_DQS_4
BH9
SB_DQS_5
BB2
SB_DQS_6
AU1
SB_DQS_7
AN6
SB_DQS#_0
AL46
SB_DQS#_1
AV47
SB_DQS#_2
BH41
SB_DQS#_3
BH37
SB_DQS#_4
BG9
SB_DQS#_5
BC2
SB_DQS#_6
AT2
SB_DQS#_7
AN5
SB_MA_0
AV17
SB_MA_1
BA25
SB_MA_2
BC25
SB_MA_3
AU25
SB_MA_4
AW25
SB_MA_5
BB28
SB_MA_6
AU28
SB_MA_7
AW28
SB_MA_8
AT33
SB_MA_9
BD33
SB_MA_10
BB16
SB_MA_11
AW33
SB_MA_12
AY33
SB_MA_13
BH15
SB_MA_14
AU33
DDR SYSTEM MEMORY A
U3D
CANTIGA ES_FCBGA1329
G7R3@
DDR SYSTEM MEMORY A
U3D
CANTIGA ES_FCBGA1329
G7R3@
SA_BS_0
BD21
SA_BS_1
BG18
SA_BS_2
AT25
SA_RAS#
BB20
SA_CAS#
BD20
SA_WE#
AY20
SA_DM_0
AM37
SA_DM_1
AT41
SA_DM_2
AY41
SA_DM_3
AU39
SA_DM_4
BB12
SA_DM_5
AY6
SA_DM_6
AT7
SA_DM_7
AJ5
SA_DQS_0
AJ44
SA_DQS_1
AT44
SA_DQS_2
BA43
SA_DQS_3
BC37
SA_DQS_4
AW12
SA_DQS_5
BC8
SA_DQS_6
AU8
SA_DQS_7
AM7
SA_DQS#_0
AJ43
SA_DQS#_1
AT43
SA_DQS#_2
BA44
SA_DQS#_3
BD37
SA_DQS#_4
AY12
SA_DQS#_5
BD8
SA_DQS#_6
AU9
SA_DQS#_7
AM8
SA_MA_0
BA21
SA_MA_1
BC24
SA_MA_2
BG24
SA_MA_3
BH24
SA_MA_4
BG25
SA_MA_5
BA24
SA_MA_6
BD24
SA_MA_7
BG27
SA_MA_8
BF25
SA_MA_9
AW24
SA_MA_10
BC21
SA_MA_11
BG26
SA_MA_12
BH26
SA_MA_13
BH17
SA_MA_14
AY25
SA_DQ_0
AJ38
SA_DQ_1
AJ41
SA_DQ_2
AN38
SA_DQ_3
AM38
SA_DQ_4
AJ36
SA_DQ_5
AJ40
SA_DQ_6
AM44
SA_DQ_7
AM42
SA_DQ_8
AN43
SA_DQ_9
AN44
SA_DQ_10
AU40
SA_DQ_11
AT38
SA_DQ_12
AN41
SA_DQ_13
AN39
SA_DQ_14
AU44
SA_DQ_15
AU42
SA_DQ_16
AV39
SA_DQ_17
AY44
SA_DQ_18
BA40
SA_DQ_19
BD43
SA_DQ_20
AV41
SA_DQ_21
AY43
SA_DQ_22
BB41
SA_DQ_23
BC40
SA_DQ_24
AY37
SA_DQ_25
BD38
SA_DQ_26
AV37
SA_DQ_27
AT36
SA_DQ_28
AY38
SA_DQ_29
BB38
SA_DQ_30
AV36
SA_DQ_31
AW36
SA_DQ_32
BD13
SA_DQ_33
AU11
SA_DQ_34
BC11
SA_DQ_35
BA12
SA_DQ_36
AU13
SA_DQ_37
AV13
SA_DQ_38
BD12
SA_DQ_39
BC12
SA_DQ_40
BB9
SA_DQ_41
BA9
SA_DQ_42
AU10
SA_DQ_43
AV9
SA_DQ_44
BA11
SA_DQ_45
BD9
SA_DQ_46
AY8
SA_DQ_47
BA6
SA_DQ_48
AV5
SA_DQ_49
AV7
SA_DQ_50
AT9
SA_DQ_51
AN8
SA_DQ_52
AU5
SA_DQ_53
AU6
SA_DQ_54
AT5
SA_DQ_55
AN10
SA_DQ_56
AM11
SA_DQ_57
AM5
SA_DQ_58
AJ9
SA_DQ_59
AJ8
SA_DQ_60
AN12
SA_DQ_61
AM13
SA_DQ_62
AJ11
SA_DQ_63
AJ12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
LVDS_IBG
UMA_CRT_HSYNC
PEG_COMP
UMA_CRT_DATA
UMA_CRT_CLK
UMA_ENVDD
LCTLB_DATA
LCTLA_CLK
UMA_CRT_IREF
UMA_CRT_VSYNC
UMA_CRT_B
UMA_CRT_R
UMA_CRT_G
UMA_LCD_EDID_DATA
UMA_LCD_EDID_CLK
UMA_LCD_EDID_DATA
UMA_LCD_EDID_CLK
LCTLA_CLK
LCTLB_DATA
UMA_CRT_R
UMA_CRT_B
UMA_CRT_G
UMA_CRT_CLK
UMA_CRT_DATA
PCIE_MTX_GRX_P1
PCIE_MTX_GRX_P2
PCIE_MTX_GRX_P3
PCIE_MTX_GRX_P0
PCIE_MTX_C_GRX_P1
PCIE_MTX_C_GRX_P2
PCIE_MTX_C_GRX_P0
PCIE_MTX_C_GRX_P3
PCIE_MTX_GRX_N2
PCIE_MTX_GRX_N1
PCIE_MTX_GRX_N0
PCIE_MTX_GRX_N3
PCIE_MTX_C_GRX_N1
PCIE_MTX_C_GRX_N2
PCIE_MTX_C_GRX_N0
PCIE_MTX_C_GRX_N3
PCIE_MTX_C_GRX_P[0..15]
PCIE_MTX_C_GRX_N[0..15]
PCIE_GTX_C_MRX_P3
TV_LUMA
TV_CRMA
TV_COMPS
TV_CRMA
TV_COMPS
TV_LUMA
PCIE_GTX_C_MRX_P2
PCIE_GTX_C_MRX_P1
PCIE_GTX_C_MRX_P0
PCIE_GTX_C_MRX_P4
PCIE_GTX_C_MRX_P5
PCIE_GTX_C_MRX_P6
PCIE_GTX_C_MRX_P7
PCIE_GTX_C_MRX_P8
PCIE_GTX_C_MRX_P10
PCIE_GTX_C_MRX_P11
PCIE_GTX_C_MRX_P12
PCIE_GTX_C_MRX_P14
PCIE_GTX_C_MRX_P15
PCIE_GTX_C_MRX_P9
PCIE_GTX_C_MRX_P13
PCIE_MTX_GRX_N4
PCIE_MTX_GRX_N5
PCIE_MTX_C_GRX_N4
PCIE_MTX_C_GRX_N5
PCIE_MTX_GRX_N6
PCIE_MTX_GRX_N7
PCIE_MTX_C_GRX_N6
PCIE_MTX_C_GRX_N7
PCIE_MTX_GRX_N8
PCIE_MTX_GRX_N9
PCIE_MTX_C_GRX_N8
PCIE_MTX_C_GRX_N9
PCIE_MTX_GRX_N10
PCIE_MTX_GRX_N11
PCIE_MTX_C_GRX_N10
PCIE_MTX_C_GRX_N11
PCIE_MTX_GRX_N12
PCIE_MTX_GRX_N13
PCIE_MTX_C_GRX_N12
PCIE_MTX_C_GRX_N13
PCIE_MTX_GRX_N14
PCIE_MTX_GRX_N15
PCIE_MTX_C_GRX_N14
PCIE_MTX_C_GRX_N15
PCIE_MTX_GRX_P4
PCIE_MTX_GRX_P5
PCIE_MTX_C_GRX_P4
PCIE_MTX_C_GRX_P5
PCIE_MTX_GRX_P6
PCIE_MTX_GRX_P7
PCIE_MTX_C_GRX_P6
PCIE_MTX_C_GRX_P7
PCIE_MTX_GRX_P8
PCIE_MTX_GRX_P9
PCIE_MTX_C_GRX_P8
PCIE_MTX_C_GRX_P9
PCIE_MTX_GRX_P10
PCIE_MTX_GRX_P11
PCIE_MTX_C_GRX_P10
PCIE_MTX_C_GRX_P11
PCIE_MTX_GRX_P12
PCIE_MTX_GRX_P13
PCIE_MTX_C_GRX_P12
PCIE_MTX_C_GRX_P13
PCIE_MTX_GRX_P14
PCIE_MTX_GRX_P15
PCIE_MTX_C_GRX_P14
PCIE_MTX_C_GRX_P15
PCIE_GTX_C_MRX_N0
PCIE_GTX_C_MRX_N1
PCIE_GTX_C_MRX_N2
PCIE_GTX_C_MRX_N3
PCIE_GTX_C_MRX_N4
PCIE_GTX_C_MRX_N5
PCIE_GTX_C_MRX_N6
PCIE_GTX_C_MRX_N7
PCIE_GTX_C_MRX_N8
PCIE_GTX_C_MRX_N9
PCIE_GTX_C_MRX_N10
PCIE_GTX_C_MRX_N11
PCIE_GTX_C_MRX_N12
PCIE_GTX_C_MRX_N14
PCIE_GTX_C_MRX_N15
UMA_CRT_HSYNC
UMA_CRT_VSYNC
PCIE_GTX_C_MRX_P[0..15]
PCIE_GTX_C_MRX_N[0..15]
PCIE_GTX_C_MRX_N13
PCIE_MTX_GRX_N4
PCIE_MTX_GRX_P4
PCIE_MTX_GRX_P5
PCIE_MTX_GRX_N5
PCIE_MTX_GRX_N6
PCIE_MTX_GRX_P6
PCIE_MTX_GRX_P7
PCIE_MTX_GRX_N7
PCIE_GTX_C_MRX_P3
PCIE_GTX_C_MRX_P7
DP_DDC_EN#
DP_CLK
DP_AUX
DP_DATA
DP_AUX#
DP_AUX_EN#
DP_DDC_EN#
PCIE_GTX_MRX_P6
PCIE_GTX_MRX_N6
DP_CLK
DP_DATA
PCIE_GTX_MRX_P6 PCIE_GTX_C_MRX_P6
PCIE_GTX_C_MRX_N6
PCIE_GTX_MRX_P6
PCIE_GTX_MRX_N6
UMA_ENBKL33
UMA_LCD_TXOUT0-18
UMA_LCD_TXOUT1-18
UMA_LCD_TXOUT2-18
UMA_LCD_TXCLK-18
UMA_LCD_TXCLK+18
UMA_LCD_TXOUT0+18
UMA_LCD_TXOUT1+18
UMA_LCD_TXOUT2+18
UMA_LCD_EDID_DATA18
UMA_LCD_EDID_CLK18
UMA_CRT_R18
UMA_CRT_G18
UMA_CRT_B18
UMA_CRT_HSYNC18
UMA_CRT_VSYNC18
UMA_CRT_CLK18
UMA_CRT_DATA18
PCIE_MTX_C_GRX_N[0..15] 17,20
PCIE_MTX_C_GRX_P[0..15] 17,20
UMA_ENVDD18
PCIE_GTX_C_MRX_P[0..15] 17
PCIE_GTX_C_MRX_N[0..15] 17
UMA_LCD_TZOUT0-18
UMA_LCD_TZOUT1-18
UMA_LCD_TZOUT2-18
UMA_LCD_TZOUT0+18
UMA_LCD_TZOUT1+18
UMA_LCD_TZOUT2+18
UMA_LCD_TZCLK-18
UMA_LCD_TZCLK+18
DP_L0-_NB 17
DP_L1-_NB 17
DP_L2-_NB 17
DP_L3-_NB 17
DP_L0+_NB 17
DP_L1+_NB 17
DP_L2+_NB 17
DP_L3+_NB 17
PCIE_GTX_C_MRX_HDMI_P3 20
DP_AUX_EN#19
DP_CLK 8
DP_DATA 8
+1.05VS
+3VS
+3VS
+5VS
+5VS
+5VS
+3VS
+3VS
DP_HPD 17,19DP_AUX#17,19
DP_AUX17,19
Title
Size Document Number Rev
Date: Sheet of
Security Classification
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
401662
D
SCHEMATIC,MB A4991
11 48Thursday, May 21, 2009
2008/10/06 2009/10/06
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet
of
Security Classification
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
401662
D
SCHEMATIC,MB A4991
11 48Thursday, May 21, 2009
2008/10/06 2009/10/06
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet
of
Security Classification
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
401662
D
SCHEMATIC,MB A4991
11 48Thursday, May 21, 2009
2008/10/06 2009/10/06
Compal Electronics, Inc.
10mils
1 = LFP Card Present; PCIE disable
L_DDC_DATA
(Default)0 = LFP Disable
*
within 500 mils
Spacing=20mil
DP/DVI Switch Circuit (1)
R75
0_0402_5%
PM@
R75
0_0402_5%
PM@
C649
0.1U_0402_16V7K
IDP@C649
0.1U_0402_16V7K
IDP@
1 2
R204 2.2K_0402_5%
IDP@
R204 2.2K_0402_5%
IDP@
1 2
R499 0_0402_5%GM@R499 0_0402_5%GM@
1 2
R139 0_0402_5%IDP@R139 0_0402_5%IDP@
1 2
C613 0.1U_0402_16V7KPM@C613 0.1U_0402_16V7KPM@
1 2
C612 0.1U_0402_16V7KPM@C612 0.1U_0402_16V7KPM@
1 2
C625 0.1U_0402_16V7KPM@C625 0.1U_0402_16V7KPM@
1 2
C617 0.1U_0402_16V7KPM@C617 0.1U_0402_16V7KPM@
1 2
R104 0_0402_5%IDP@R104 0_0402_5%IDP@
1 2
C614 0.1U_0402_16V7KPM@C614 0.1U_0402_16V7KPM@
1 2
R66
0_0402_5%
PM@
R66
0_0402_5%
PM@
C626 0.1U_0402_16V7KPM@C626 0.1U_0402_16V7KPM@
1 2
LVDS TV VGA
PCI-EXPRESS GRAPHICS
U3C
CANTIGA ES_FCBGA1329
G7R3@
LVDS TV VGA
PCI-EXPRESS GRAPHICS
U3C
CANTIGA ES_FCBGA1329
G7R3@
PEG_COMPI
T37
PEG_COMPO
T36
PEG_RX#_0
H44
PEG_RX#_1
J46
PEG_RX#_2
L44
PEG_RX#_3
L40
PEG_RX#_4
N41
PEG_RX#_5
P48
PEG_RX#_6
N44
PEG_RX#_7
T43
PEG_RX#_8
U43
PEG_RX#_9
Y43
PEG_RX#_10
Y48
PEG_RX#_11
Y36
PEG_RX#_12
AA43
PEG_RX#_13
AD37
PEG_RX#_14
AC47
PEG_RX#_15
AD39
PEG_RX_0
H43
PEG_RX_1
J44
PEG_RX_2
L43
PEG_RX_3
L41
PEG_RX_4
N40
PEG_RX_5
P47
PEG_RX_6
N43
PEG_RX_7
T42
PEG_RX_8
U42
PEG_RX_9
Y42
PEG_RX_10
W47
PEG_RX_11
Y37
PEG_RX_12
AA42
PEG_RX_13
AD36
PEG_RX_14
AC48
PEG_RX_15
AD40
PEG_TX#_0
J41
PEG_TX#_1
M46
PEG_TX#_2
M47
PEG_TX#_3
M40
PEG_TX#_4
M42
PEG_TX#_5
R48
PEG_TX#_6
N38
PEG_TX#_7
T40
PEG_TX#_8
U37
PEG_TX#_9
U40
PEG_TX#_10
Y40
PEG_TX#_11
AA46
PEG_TX#_12
AA37
PEG_TX#_13
AA40
PEG_TX#_14
AD43
PEG_TX#_15
AC46
PEG_TX_0
J42
PEG_TX_1
L46
PEG_TX_2
M48
PEG_TX_3
M39
PEG_TX_4
M43
PEG_TX_5
R47
PEG_TX_6
N37
PEG_TX_7
T39
PEG_TX_8
U36
PEG_TX_9
U39
PEG_TX_10
Y39
PEG_TX_11
Y46
PEG_TX_12
AA36
PEG_TX_13
AA39
PEG_TX_14
AD42
PEG_TX_15
AD46
L_BKLT_CTRL
L32
L_BKLT_EN
G32
L_CTRL_CLK
M32
L_CTRL_DATA
M33
L_DDC_CLK
K33
L_DDC_DATA
J33
L_VDD_EN
M29
LVDS_IBG
C44
LVDS_VBG
B43
LVDS_VREFH
E37
LVDS_VREFL
E38
LVDSA_CLK#
C41
LVDSA_CLK
C40
LVDSB_CLK#
B37
LVDSB_CLK
A37
LVDSA_DATA#_0
H47
LVDSA_DATA#_1
E46
LVDSA_DATA#_2
G40
LVDSA_DATA#_3
A40
LVDSA_DATA_0
H48
LVDSA_DATA_1
D45
LVDSA_DATA_2
F40
LVDSA_DATA_3
B40
LVDSB_DATA#_0
A41
LVDSB_DATA#_1
H38
LVDSB_DATA#_2
G37
LVDSB_DATA#_3
J37
LVDSB_DATA_0
B42
LVDSB_DATA_1
G38
LVDSB_DATA_2
F37
LVDSB_DATA_3
K37
TVA_DAC
F25
TVB_DAC
H25
TVC_DAC
K25
TV_RTN
H24
TV_DCONSEL_0
C31
TV_DCONSEL_1
E32
CRT_BLUE
E28
CRT_GREEN
G28
CRT_RED
J28
CRT_IRTN
G29
CRT_DDC_CLK
H32
CRT_DDC_DATA
J32
CRT_HSYNC
J29
CRT_TVO_IREF
E29
CRT_VSYNC
L29
C622 0.1U_0402_16V7KPM@C622 0.1U_0402_16V7KPM@
1 2
C637 0.1U_0402_16V7KPM@C637 0.1U_0402_16V7KPM@
1 2
C619 0.1U_0402_16V7KPM@C619 0.1U_0402_16V7KPM@
1 2
R140 0_0402_5%IDP@R140 0_0402_5%IDP@
1 2
R65 49.9_0402_1%R65 49.9_0402_1%
1 2
R72
0_0402_5%
PM@
R72
0_0402_5%
PM@
C629 0.1U_0402_16V7KPM@C629 0.1U_0402_16V7KPM@
1 2
C620 0.1U_0402_16V7KPM@C620 0.1U_0402_16V7KPM@
1 2
C632 0.1U_0402_16V7KPM@C632 0.1U_0402_16V7KPM@
1 2
R500 0_0402_5%PM@R500 0_0402_5%PM@
1 2
R146 0_0402_5%IDP@R146 0_0402_5%IDP@
1 2
R76 4.7K_0402_5%GM@R76 4.7K_0402_5%GM@
1 2
C640 0.1U_0402_16V7KPM@C640 0.1U_0402_16V7KPM@
1 2
C635 0.1U_0402_16V7KPM@C635 0.1U_0402_16V7KPM@
1 2
C623 0.1U_0402_16V7KPM@C623 0.1U_0402_16V7KPM@
1 2
C627 0.1U_0402_16V7KPM@C627 0.1U_0402_16V7KPM@
1 2
R68 2.2K_0402_5%
GM@
R68 2.2K_0402_5%
GM@
1 2
R64
0_0402_5%
PM@
R64
0_0402_5%
PM@
R158 0_0402_5%IDP@R158 0_0402_5%IDP@
1 2
R74 75_0402_1%
GM@
R74 75_0402_1%
GM@
1 2
C611
0_0402_5%
IHDMI@
C611
0_0402_5%
IHDMI@
C628 0.1U_0402_16V7KPM@C628 0.1U_0402_16V7KPM@
1 2
R78 1.02K_0402_1%GM@R78 1.02K_0402_1%GM@
12
G
D
S
Q27
2N7002_SOT23-3
IDP@
G
D
S
Q27
2N7002_SOT23-3
IDP@
2
13
C614
0_0402_5%
IHDMI@
C614
0_0402_5%
IHDMI@
C634 0.1U_0402_16V7KPM@C634 0.1U_0402_16V7KPM@
1 2
R181 0_0402_5%IDP@R181 0_0402_5%IDP@
1 2
R73
0_0402_5%
PM@
R73
0_0402_5%
PM@
C612
0_0402_5%
IHDMI@
C612
0_0402_5%
IHDMI@
R72 75_0402_1%
GM@
R72 75_0402_1%
GM@
1 2
C613
0_0402_5%
IHDMI@
C613
0_0402_5%
IHDMI@
U14
SN74CBTD3306CPWR_TSSOP8
IDP@U14
SN74CBTD3306CPWR_TSSOP8
IDP@
1OE#
1
GND
4
2OE#
7
2A
5
1B
3
1A
2
2B
6
VCC
8
C611 0.1U_0402_16V7KPM@C611 0.1U_0402_16V7KPM@
1 2
C633 0.1U_0402_16V7KPM@C633 0.1U_0402_16V7KPM@
1 2
C638 0.1U_0402_16V7KPM@C638 0.1U_0402_16V7KPM@
1 2
R218 100K_0402_1%
IDP@
R218 100K_0402_1%
IDP@
1 2
R64 10K_0402_5%
GM@
R64 10K_0402_5%
GM@
1 2
R73 75_0402_1%
GM@
R73 75_0402_1%
GM@
1 2
C628
0_0402_5%
IHDMI@
C628
0_0402_5%
IHDMI@
C616 0.1U_0402_16V7KPM@C616 0.1U_0402_16V7KPM@
1 2
R182 0_0402_5%IDP@R182 0_0402_5%IDP@
1 2
R797 0_0402_5%IDP@R797 0_0402_5%IDP@
1 2
R97
4.7K_0402_5%
IDP@
R97
4.7K_0402_5%
IDP@
1 2
R135 100K_0402_1%
@
R135 100K_0402_1%
@
1 2
C636 0.1U_0402_16V7KPM@C636 0.1U_0402_16V7KPM@
1 2
C627
0_0402_5%
IHDMI@
C627
0_0402_5%
IHDMI@
R70
0_0402_5%
PM@
R70
0_0402_5%
PM@
R78
0_0402_5%
PM@
R78
0_0402_5%
PM@
U13
SN74CBTD3306CPWR_TSSOP8
IDP@U13
SN74CBTD3306CPWR_TSSOP8
IDP@
1OE#
1
GND
4
2OE#
7
2A
5
1B
3
1A
2
2B
6
VCC
8
R67
0_0402_5%
PM@
R67
0_0402_5%
PM@
R77 4.7K_0402_5%GM@R77 4.7K_0402_5%GM@
1 2
R184 0_0402_5%IDP@R184 0_0402_5%IDP@
1 2
C630
0_0402_5%
IHDMI@
C630
0_0402_5%
IHDMI@
R74
0_0402_5%
PM@
R74
0_0402_5%
PM@
C631 0.1U_0402_16V7KPM@C631 0.1U_0402_16V7KPM@
1 2
C629
0_0402_5%
IHDMI@
C629
0_0402_5%
IHDMI@
R188 100K_0402_1%
IDP@
R188 100K_0402_1%
IDP@
1 2
R504 0_0402_5%PM@R504 0_0402_5%PM@
1 2
R501 0_0402_5%GM@R501 0_0402_5%GM@
1 2
C624 0.1U_0402_16V7KPM@C624 0.1U_0402_16V7KPM@
1 2
R71 75_0402_1%
GM@
R71 75_0402_1%
GM@
1 2
R502 0_0402_5%GM@R502 0_0402_5%GM@
1 2
R66 10K_0402_5%
GM@
R66 10K_0402_5%
GM@
1 2
C641 0.1U_0402_16V7KPM@C641 0.1U_0402_16V7KPM@
1 2
R69
2.37K_0402_1%
GM@R69
2.37K_0402_1%
GM@
1 2
C615 0.1U_0402_16V7KPM@C615 0.1U_0402_16V7KPM@
1 2
C644
0.1U_0402_16V7K
IDP@C644
0.1U_0402_16V7K
IDP@
1 2
R505 0_0402_5%IHDMI@R505 0_0402_5%IHDMI@
1 2
C642 0.1U_0402_16V7KPM@C642 0.1U_0402_16V7KPM@
1 2
R217 2.2K_0402_5%
IDP@
R217 2.2K_0402_5%
IDP@
1 2
R70 75_0402_1%
GM@
R70 75_0402_1%
GM@
1 2
R71
0_0402_5%
PM@
R71
0_0402_5%
PM@
C639 0.1U_0402_16V7KPM@C639 0.1U_0402_16V7KPM@
1 2
C621 0.1U_0402_16V7KPM@C621 0.1U_0402_16V7KPM@
1 2
R67 2.2K_0402_5%
GM@
R67 2.2K_0402_5%
GM@
1 2
C618 0.1U_0402_16V7KPM@C618 0.1U_0402_16V7KPM@
1 2
C630 0.1U_0402_16V7KPM@C630 0.1U_0402_16V7KPM@
1 2
R75 75_0402_1%
GM@
R75 75_0402_1%
GM@
1 2
R503 0_0402_5%PM@R503 0_0402_5%PM@
1 2
R68
0_0402_5%
PM@
R68
0_0402_5%
PM@
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VCCSM_LF2
VCCSM_LF3
VCCSM_LF1
VCCSM_LF6
VCCSM_LF7
VCCSM_LF4
VCCSM_LF5
+NB_VCCAXG
+1.8V
+1.05VS
+1.05VS
+1.05VS +NB_VCCAXG
+NB_VCCAXG+1.05VS
Title
Size Document Number Rev
Date: Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
401662
D
SCHEMATIC,MB A4991
12 48Thursday, May 21, 2009
2008/10/06 2009/10/06
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
401662
D
SCHEMATIC,MB A4991
12 48Thursday, May 21, 2009
2008/10/06 2009/10/06
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
401662
D
SCHEMATIC,MB A4991
12 48Thursday, May 21, 2009
2008/10/06 2009/10/06
Compal Electronics, Inc.
DDR2,667MHz,2600mA
DDR2,800MHz,3000mA
Extnal Graphic: 1210.34mA
integrated Graphic: 1930.4mA
Intel Management Engine Link:508.12mA
DDR PWR
Int. Graphic
Int. Graphic
Intel:AXG and AXG_NCTF -- 220U*2, ESR 15mOhm
Intel: VCC -- 220U*2, ESR 12mOhm
NB Core,Intel Management Engine Link
Could be NC for DDR2 Board.
8700mA
For layout issue to separate 220u*2 to +1.05VS
For layout placement un-mound C123 and mound C84
C85
10U_0805_10V4Z
GM@
C85
10U_0805_10V4Z
GM@
1
2
POWER
VCC SM
VCC GFX
VCC GFX NCTF
VCC SM LF
U3F
CANTIGA ES_FCBGA1329
G7R3@
POWER
VCC SM
VCC GFX
VCC GFX NCTF
VCC SM LF
U3F
CANTIGA ES_FCBGA1329
G7R3@
VCC_AXG_NTCF_1
W28
VCC_AXG_NCTF_2
V28
VCC_AXG_NCTF_3
W26
VCC_AXG_NCTF_4
V26
VCC_AXG_NCTF_5
W25
VCC_AXG_NCTF_6
V25
VCC_AXG_NCTF_7
W24
VCC_AXG_NCTF_8
V24
VCC_AXG_NCTF_9
W23
VCC_AXG_NCTF_10
V23
VCC_AXG_NCTF_11
AM21
VCC_AXG_NCTF_12
AL21
VCC_AXG_NCTF_13
AK21
VCC_AXG_NCTF_14
W21
VCC_AXG_NCTF_15
V21
VCC_AXG_NCTF_16
U21
VCC_AXG_NCTF_17
AM20
VCC_AXG_NCTF_18
AK20
VCC_AXG_NCTF_19
W20
VCC_AXG_NCTF_20
U20
VCC_AXG_NCTF_21
AM19
VCC_AXG_NCTF_22
AL19
VCC_AXG_NCTF_23
AK19
VCC_AXG_NCTF_24
AJ19
VCC_AXG_NCTF_25
AH19
VCC_AXG_NCTF_26
AG19
VCC_AXG_NCTF_27
AF19
VCC_AXG_NCTF_28
AE19
VCC_AXG_NCTF_29
AB19
VCC_AXG_NCTF_30
AA19
VCC_AXG_NCTF_31
Y19
VCC_AXG_NCTF_32
W19
VCC_AXG_NCTF_33
V19
VCC_AXG_NCTF_34
U19
VCC_AXG_NCTF_35
AM17
VCC_AXG_NCTF_36
AK17
VCC_AXG_NCTF_37
AH17
VCC_AXG_NCTF_38
AG17
VCC_AXG_NCTF_39
AF17
VCC_AXG_NCTF_40
AE17
VCC_AXG_NCTF_41
AC17
VCC_AXG_NCTF_42
AB17
VCC_AXG_NCTF_43
Y17
VCC_AXG_NCTF_44
W17
VCC_AXG_NCTF_45
V17
VCC_AXG_NCTF_46
AM16
VCC_AXG_NCTF_47
AL16
VCC_AXG_NCTF_48
AK16
VCC_AXG_NCTF_49
AJ16
VCC_AXG_NCTF_50
AH16
VCC_AXG_NCTF_51
AG16
VCC_AXG_NCTF_52
AF16
VCC_AXG_NCTF_53
AE16
VCC_AXG_NCTF_54
AC16
VCC_AXG_NCTF_55
AB16
VCC_AXG_NCTF_56
AA16
VCC_AXG_NCTF_57
Y16
VCC_AXG_NCTF_58
W16
VCC_AXG_NCTF_59
V16
VCC_AXG_NCTF_60
U16
VCC_SM_LF1
AV44
VCC_SM_LF2
BA37
VCC_SM_LF3
AM40
VCC_SM_LF4
AV21
VCC_SM_LF5
AY5
VCC_SM_LF6
AM10
VCC_SM_LF7
BB13
VCC_SM_1
AP33
VCC_SM_2
AN33
VCC_SM_3
BH32
VCC_SM_4
BG32
VCC_SM_5
BF32
VCC_SM_6
BD32
VCC_SM_7
BC32
VCC_SM_8
BB32
VCC_SM_9
BA32
VCC_SM_10
AY32
VCC_SM_11
AW32
VCC_SM_12
AV32
VCC_SM_13
AU32
VCC_SM_14
AT32
VCC_SM_15
AR32
VCC_SM_16
AP32
VCC_SM_17
AN32
VCC_SM_18
BH31
VCC_SM_19
BG31
VCC_SM_20
BF31
VCC_SM_21
BG30
VCC_SM_22
BH29
VCC_SM_23
BG29
VCC_SM_24
BF29
VCC_SM_25
BD29
VCC_SM_26
BC29
VCC_SM_27
BB29
VCC_SM_28
BA29
VCC_SM_29
AY29
VCC_SM_30
AW29
VCC_SM_31
AV29
VCC_SM_32
AU29
VCC_SM_33
AT29
VCC_SM_34
AR29
VCC_SM_35
AP29
VCC_SM_36/NC
BA36
VCC_SM_37/NC
BB24
VCC_SM_38/NC
BD16
VCC_SM_39/NC
BB21
VCC_SM_40/NC
AW16
VCC_SM_41/NC
AW13
VCC_SM_42/NC
AT13
VCC_AXG_1
Y26
VCC_AXG_2
AE25
VCC_AXG_3
AB25
VCC_AXG_4
AA25
VCC_AXG_5
AE24
VCC_AXG_6
AC24
VCC_AXG_7
AA24
VCC_AXG_8
Y24
VCC_AXG_9
AE23
VCC_AXG_10
AC23
VCC_AXG_11
AB23
VCC_AXG_12
AA23
VCC_AXG_13
AJ21
VCC_AXG_14
AG21
VCC_AXG_15
AE21
VCC_AXG_16
AC21
VCC_AXG_17
AA21
VCC_AXG_18
Y21
VCC_AXG_19
AH20
VCC_AXG_20
AF20
VCC_AXG_21
AE20
VCC_AXG_22
AC20
VCC_AXG_23
AB20
VCC_AXG_24
AA20
VCC_AXG_25
T17
VCC_AXG_26
T16
VCC_AXG_27
AM15
VCC_AXG_28
AL15
VCC_AXG_29
AE15
VCC_AXG_30
AJ15
VCC_AXG_31
AH15
VCC_AXG_32
AG15
VCC_AXG_33
AF15
VCC_AXG_34
AB15
VCC_AXG_35
AA15
VCC_AXG_36
Y15
VCC_AXG_37
V15
VCC_AXG_38
U15
VCC_AXG_39
AN14
VCC_AXG_40
AM14
VCC_AXG_41
U14
VCC_AXG_42
T14
VCC_AXG_SENSE
AJ14
VSS_AXG_SENSE
AH14
+
C73
220U_6.3V_M
+
C73
220U_6.3V_M
1
2
+
C84
220U_D2_4VM_R15
GM@
+
C84
220U_D2_4VM_R15
GM@
1
2
PJ27
JUMP_43X39 @
PJ27
JUMP_43X39 @
1
1
2
2
+
C72
220U_D2_4VM_R15
+
C72
220U_D2_4VM_R15
1
2
T3PAD T3PAD
C69
10U_0805_10V4Z
C69
10U_0805_10V4Z
1
2
C94
0.22U_0603_10V7K
C94
0.22U_0603_10V7K
1
2
C95
0.47U_0603_10V7K
C95
0.47U_0603_10V7K
1
2
C74
10U_0805_10V4Z
C74
10U_0805_10V4Z
1
2
C77
0.1U_0402_16V4Z
C77
0.1U_0402_16V4Z
1
2
+
C68
220U_D2_4VM_R15
+
C68
220U_D2_4VM_R15
1
2
C90
0.1U_0402_16V4Z
GM@
C90
0.1U_0402_16V4Z
GM@
1
2
C92
0.1U_0402_16V4Z
C92
0.1U_0402_16V4Z
1
2
C88
0.47U_0603_10V7K
GM@
C88
0.47U_0603_10V7K
GM@
1
2
C93
0.22U_0603_10V7K
C93
0.22U_0603_10V7K
1
2
C76
0.22U_0402_10V4Z
C76
0.22U_0402_10V4Z
1
2
C70
10U_0805_10V4Z
C70
10U_0805_10V4Z
1
2
C97
1U_0402_6.3V4Z
C97
1U_0402_6.3V4Z
1
2
C96
1U_0402_6.3V4Z
C96
1U_0402_6.3V4Z
1
2
PJ30
JUMP_43X39 @
PJ30
JUMP_43X39 @
1
1
2
2
C71
0.1U_0402_16V4Z
C71
0.1U_0402_16V4Z
1
2
C91
0.1U_0402_16V4Z
C91
0.1U_0402_16V4Z
1
2
C75
0.22U_0402_10V4Z
C75
0.22U_0402_10V4Z
1
2
T4PAD T4PAD
PJ29
JUMP_43X39 @
PJ29
JUMP_43X39 @
1
1
2
2
C89
0.1U_0402_16V4Z
GM@
C89
0.1U_0402_16V4Z
GM@
1
2
POWER
VCC CORE
VCC NCTF
U3G
CANTIGA ES_FCBGA1329
G7R3@
POWER
VCC CORE
VCC NCTF
U3G
CANTIGA ES_FCBGA1329
G7R3@
VCC_1
AG34
VCC_2
AC34
VCC_3
AB34
VCC_4
AA34
VCC_5
Y34
VCC_6
V34
VCC_7
U34
VCC_8
AM33
VCC_9
AK33
VCC_10
AJ33
VCC_11
AG33
VCC_12
AF33
VCC_13
AE33
VCC_14
AC33
VCC_15
AA33
VCC_16
Y33
VCC_17
W33
VCC_18
V33
VCC_19
U33
VCC_20
AH28
VCC_21
AF28
VCC_22
AC28
VCC_23
AA28
VCC_24
AJ26
VCC_25
AG26
VCC_26
AE26
VCC_27
AC26
VCC_28
AH25
VCC_29
AG25
VCC_30
AF25
VCC_31
AG24
VCC_32
AJ23
VCC_33
AH23
VCC_34
AF23
VCC_35
T32
VCC_NCTF_1
AM32
VCC_NCTF_2
AL32
VCC_NCTF_3
AK32
VCC_NCTF_4
AJ32
VCC_NCTF_5
AH32
VCC_NCTF_6
AG32
VCC_NCTF_7
AE32
VCC_NCTF_8
AC32
VCC_NCTF_9
AA32
VCC_NCTF_10
Y32
VCC_NCTF_11
W32
VCC_NCTF_12
U32
VCC_NCTF_13
AM30
VCC_NCTF_14
AL30
VCC_NCTF_15
AK30
VCC_NCTF_16
AH30
VCC_NCTF_17
AG30
VCC_NCTF_18
AF30
VCC_NCTF_19
AE30
VCC_NCTF_20
AC30
VCC_NCTF_21
AB30
VCC_NCTF_22
AA30
VCC_NCTF_23
Y30
VCC_NCTF_24
W30
VCC_NCTF_25
V30
VCC_NCTF_26
U30
VCC_NCTF_27
AL29
VCC_NCTF_28
AK29
VCC_NCTF_29
AJ29
VCC_NCTF_30
AH29
VCC_NCTF_31
AG29
VCC_NCTF_32
AE29
VCC_NCTF_33
AC29
VCC_NCTF_34
AA29
VCC_NCTF_35
Y29
VCC_NCTF_36
W29
VCC_NCTF_37
V29
VCC_NCTF_38
AL28
VCC_NCTF_39
AK28
VCC_NCTF_40
AL26
VCC_NCTF_41
AK26
VCC_NCTF_42
AK25
VCC_NCTF_43
AK24
VCC_NCTF_44
AK23
C86
0_0805_5%
PM@
C86
0_0805_5%
PM@
PJ31
JUMP_43X39 @
PJ31
JUMP_43X39 @
1
1
2
2
C87
1U_0402_6.3V4Z
GM@
C87
1U_0402_6.3V4Z
GM@
1
2
PJ32
JUMP_43X39 @
PJ32
JUMP_43X39 @
1
1
2
2
C86
10U_0805_10V4Z
GM@
C86
10U_0805_10V4Z
GM@
1
2
PJ28
JUMP_43X39 @
PJ28
JUMP_43X39 @
1
1
2
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VTTLF1
VTTLF2
VTTLF3
+3VS_TVCRT_DACBG
+1.05VS
+1.05VS_PEGPLL
+3VS_TVCRT_DAC
+3VS_TVCRT_DACBG
+3VS_TVCRT_DAC
+1.5VS_TVDAC
+1.5VS_QDAC
+1.05VS_PEGPLL
+1.05VS_DHPLL
+1.8V_LVDS
+1.8V_TXLVDS
+1.8V_SM_CK
+1.05VS_AXF
+1.05VS
+1.05VS_AXF
+1.8V
+1.8V_SM_CK
+1.8V_TXLVDS +1.8V
+3VS_TVCRT_DAC
+1.5VS
+1.5VS_QDAC
+1.5VS
+1.5VS_TVDAC
+1.5VS_PEG_BG
+1.5VS
+1.5VS_PEG_BG
+1.05VS_A_SM
+1.05VS
+1.05VS_PEGPLL
+1.05VS
+1.05VS_A_SM_CK
+1.8V
+1.8V_LVDS
+1.8V_TXLVDS
+1.05VS_DPLLA+1.05VS +1.05VS_DPLLB+1.05VS
+1.05VS_PEGPLL
+1.05VS
+1.05VS +1.05VS_DHPLL
+3VS_TVCRT_DACBG
+1.5VS +1.5VS_HDA
+1.5VS_HDA
+3VS_TVCRT_DAC
+3VS
+1.05VS+3VS
+1.05VS_MPLL
+1.05VS_DPLLB
+1.05VS_AHPLL
+1.05VS_DPLLA
+3VS
+3VS_TVCRT_DACBG
+1.05VS_AHPLL+1.05VS +1.05VS_MPLL+1.05VS
+1.8V_TXLVDS
+1.05VS
+1.05VS
+1.05VS
+1.05VS
Title
Size Document Number Rev
Date: Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
401662
D
SCHEMATIC,MB A4991
13 48Thursday, May 21, 2009
2008/10/06 2009/10/06
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
401662
D
SCHEMATIC,MB A4991
13 48Thursday, May 21, 2009
2008/10/06 2009/10/06
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
401662
D
SCHEMATIC,MB A4991
13 48Thursday, May 21, 2009
2008/10/06 2009/10/06
Compal Electronics, Inc.
Pin V48
Pin AH48
Pin AD48 Pin AA48
PCIe&DMI
PCIe&DMI
PCIe&DMI
PCIe&DMI
Pin BF21
DDR2
Pin AR20
DDR2
DDR2
Pin AP28
AGTL+
NB I/O
Pin B22
Pin M38
Pin K47
LVDS
LVDS
Pin A25
GNDtoB25
Pin F47 Pin L48
Pin B24
Pin M25 Pin L28
Pin AA47
PCIe&DMI
Pin AF1
Pin B27
CRT TV
TV
Pin A32
HDMI's HDA
TV TV
Pin C35
Intel: VTT 270U*1 ESR 12mOhm
73mA
5mA
64.8mA
64.8mA
139.2mA
24mA
13.2mA
50mA
414uA
50mA
79mA
500uA
35mA
157.2mA
667MTs,480mA
800MTs,720mA
667MTs,24mA
800MTs,26mA
50mA
60.31mA
FSB=1067Mhz,852mA
105.3mA
118.8mA
456mA
1782mA
DDR2,667MHz,119.85mA
DDR2,800MHz,124mA
321.35mA
Host Interface I/O and HSIO
Pin AE1
Pin AD1
Pin J48
LVDS
GND to J47
C145
10U_0805_10V4Z
C145
10U_0805_10V4Z
1
2
C105
2.2U_0603_6.3V6K
C105
2.2U_0603_6.3V6K
1
2
C126
1U_0402_6.3V4Z
C126
1U_0402_6.3V4Z
1
2
C130
0_0402_5%
PM@
C130
0_0402_5%
PM@
C118
1000P_0402_50V7K
GM@
C118
1000P_0402_50V7K
GM@
1
2
R93
10_0603_5%
R93
10_0603_5%
12
R96
0_0603_5%
R96
0_0603_5%
12
R99
0_0603_5%
R99
0_0603_5%
12
C136
0.01U_0402_25V7K
C136
0.01U_0402_25V7K
1
2
C132
10U_0805_10V4Z
C132
10U_0805_10V4Z
1
2
R90
1_0805_1%
R90
1_0805_1%
C135
0.1U_0402_16V4Z
C135
0.1U_0402_16V4Z
1
2
R98
0_0402_5%
R98
0_0402_5%
1 2
C99
0.1U_0402_16V4Z
GM@
C99
0.1U_0402_16V4Z
GM@
1
2
C152
0.1U_0402_16V4Z
C152
0.1U_0402_16V4Z
1
2
R83
KC FBM-L11-160808-121LMT 0603
R83
KC FBM-L11-160808-121LMT 0603
12
C124
10U_0805_10V4Z
C124
10U_0805_10V4Z
1
2
C128
10U_0805_10V4Z
@
C128
10U_0805_10V4Z
@
1
2
C110
10U_0805_10V4Z
GM@
C110
10U_0805_10V4Z
GM@
1
2
C127
0.1U_0402_16V4Z
C127
0.1U_0402_16V4Z
1
2
R100
1_0805_1%
R100
1_0805_1%
C116
0.1U_0402_16V4Z
C116
0.1U_0402_16V4Z
1
2
R91
0_0603_5%
GM@R91
0_0603_5%
GM@
1 2
C120
10U_0805_10V4Z
@
C120
10U_0805_10V4Z
@
1
2
C111
0.1U_0402_16V4Z
GM@
C111
0.1U_0402_16V4Z
GM@
1
2
C122
0.1U_0402_16V4Z
C122
0.1U_0402_16V4Z
1
2
C143
0.01U_0402_25V7K
C143
0.01U_0402_25V7K
1
2
C121
0.1U_0402_16V4Z
C121
0.1U_0402_16V4Z
1
2
C125
4.7U_0805_10V4Z
C125
4.7U_0805_10V4Z
1
2
C100
0_0402_5%
PM@
C100
0_0402_5%
PM@
+
C108
220U_B2_2.5VM
@
+
C108
220U_B2_2.5VM
@
1
2
POWER
CRTPLLA LVDSA PEG
A SM
VTT
AXF
SM CK
VTTLF
LVDS D TV/CRT
TV
DMI PEG
HDA
A CK
HV
U3H
CANTIGA ES_FCBGA1329
G7R3@
POWER
CRTPLLA LVDSA PEG
A SM
VTT
AXF
SM CK
VTTLF
LVDS D TV/CRT
TV
DMI PEG
HDA
A CK
HV
U3H
CANTIGA ES_FCBGA1329
G7R3@
VTT_1
U13
VTT_2
T13
VTT_3
U12
VTT_4
T12
VTT_5
U11
VTT_6
T11
VTT_7
U10
VTT_8
T10
VTT_9
U9
VTT_10
T9
VTT_11
U8
VTT_12
T8
VTT_13
U7
VTT_14
T7
VTT_15
U6
VTT_16
T6
VTT_17
U5
VTT_18
T5
VTT_19
V3
VTT_20
U3
VTT_21
V2
VTT_22
U2
VTT_23
T2
VTT_24
V1
VTT_25
U1
VCC_AXF_1
B22
VCC_AXF_2
B21
VCC_AXF_3
A21
VCC_SM_CK_1
BF21
VCC_SM_CK_2
BH20
VCC_SM_CK_3
BG20
VCC_SM_CK_4
BF20
VCC_TX_LVDS
K47
VCC_HV_1
C35
VCC_HV_2
B35
VCC_HV_3
A35
VCC_PEG_1
V48
VCC_PEG_2
U48
VCC_PEG_3
V47
VCC_PEG_4
U47
VCC_PEG_5
U46
VCC_DMI_1
AH48
VCC_DMI_2
AF48
VCC_DMI_3
AH47
VCC_DMI_4
AG47
VTTLF1
A8
VTTLF2
L1
VTTLF3
AB2
VCCA_CRT_DAC_1
B27
VCCA_CRT_DAC_2
A26
VCCA_DAC_BG
A25
VSSA_DAC_BG
B25
VCCA_DPLLA
F47
VCCA_DPLLB
L48
VCCA_HPLL
AD1
VCCA_MPLL
AE1
VCCA_LVDS
J48
VSSA_LVDS
J47
VCCA_PEG_BG
AD48
VCCA_PEG_PLL
AA48
VCCA_SM_1
AR20
VCCA_SM_2
AP20
VCCA_SM_3
AN20
VCCA_SM_4
AR17
VCCA_SM_5
AP17
VCCA_SM_6
AN17
VCCA_SM_7
AT16
VCCA_SM_8
AR16
VCCA_SM_9
AP16
VCCA_SM_CK_1
AP28
VCCA_SM_CK_2
AN28
VCCA_SM_CK_3
AP25
VCCA_SM_CK_4
AN25
VCCA_SM_CK_5
AN24
VCCA_SM_CK_NCTF_1
AM28
VCCA_SM_CK_NCTF_2
AM26
VCCA_SM_CK_NCTF_3
AM25
VCCA_SM_CK_NCTF_4
AL25
VCCA_SM_CK_NCTF_5
AM24
VCCA_SM_CK_NCTF_6
AL24
VCCA_SM_CK_NCTF_7
AM23
VCCA_SM_CK_NCTF_8
AL23
VCCA_TV_DAC_1
B24
VCCA_TV_DAC_2
A24
VCC_HDA
A32
VCCD_TVDAC
M25
VCCD_QDAC
L28
VCCD_HPLL
AF1
VCCD_PEG_PLL
AA47
VCCD_LVDS_1
M38
VCCD_LVDS_2
L37
R88
0_0805_5%
R88
0_0805_5%
1 2
C119
1U_0402_6.3V4Z
C119
1U_0402_6.3V4Z
1
2
R82
10U_FLC-453232-100K_0.25A_10%
GM@R82
10U_FLC-453232-100K_0.25A_10%
GM@
12
C130
1000P_0402_50V7K
GM@
C130
1000P_0402_50V7K
GM@
1
2
C148
0.47U_0603_10V7K
C148
0.47U_0603_10V7K
1
2
L1
BLM18PG121SN1D_0603
L1
BLM18PG121SN1D_0603
12
C118
0_0402_5%
PM@
C118
0_0402_5%
PM@
C142
0.1U_0402_16V4Z
C142
0.1U_0402_16V4Z
1
2
C117
0.1U_0402_16V4Z
C117
0.1U_0402_16V4Z
1
2
C101
0_0402_5%
PM@
C101
0_0402_5%
PM@
R89
0_0805_5%
R89
0_0805_5%
1 2
R92
0_0603_5%
R92
0_0603_5%
1 2
R86
0_0603_5%
R86
0_0603_5%
1 2
C114
10U_0805_10V4Z
C114
10U_0805_10V4Z
1 2
C153
1U_0402_6.3V4Z
C153
1U_0402_6.3V4Z
1
2
C139
10U_0805_10V4Z@
C139
10U_0805_10V4Z@
1
2
C131
10U_0805_10V4Z
GM@
C131
10U_0805_10V4Z
GM@
1
2
C150
0.1U_0402_16V4Z
C150
0.1U_0402_16V4Z
1
2
R80
0_0603_5%
GM@
R80
0_0603_5%
GM@
12
C106
4.7U_0805_10V4Z
C106
4.7U_0805_10V4Z
1
2
C104
0.47U_0603_10V7K
C104
0.47U_0603_10V7K
1
2
C137
0.1U_0402_16V4Z
C137
0.1U_0402_16V4Z
1
2
C112
10U_0805_10V4Z
GM@
C112
10U_0805_10V4Z
GM@
1
2
C100
0.01U_0402_25V7K
GM@
C100
0.01U_0402_25V7K
GM@
1
2
C107
4.7U_0805_10V4Z
C107
4.7U_0805_10V4Z
1
2
C149
0.47U_0603_10V7K
C149
0.47U_0603_10V7K
1
2
C134
0.1U_0402_16V4Z
C134
0.1U_0402_16V4Z
1
2
R79
2_0603_5%
GM@
R79
2_0603_5%
GM@
12
C140
0.1U_0402_16V4Z
C140
0.1U_0402_16V4Z
1
2
C147
0.47U_0603_10V7K
C147
0.47U_0603_10V7K
1
2
R84
MBK2012121YZF_0805
R84
MBK2012121YZF_0805
12
R81
10U_FLC-453232-100K_0.25A_10%
GM@R81
10U_FLC-453232-100K_0.25A_10%
GM@
12
R85 0.5_0805_1%R85 0.5_0805_1%
C102
0.01U_0402_25V7K
GM@
C102
0.01U_0402_25V7K
GM@
1
2
D3
CH751H-40PT_SOD323-2
D3
CH751H-40PT_SOD323-2
21
+
C123
220U_D2_4VM_R15
@
+
C123
220U_D2_4VM_R15
@
1
2
C151
0.1U_0402_16V4Z
C151
0.1U_0402_16V4Z
1
2
+
C103
220U_D2_4VM_R15
+
C103
220U_D2_4VM_R15
1
2
C98
10U_0805_10V4Z
GM@
C98
10U_0805_10V4Z
GM@
1
2
C133
2.2U_0603_6.3V6K
@
C133
2.2U_0603_6.3V6K
@
1
2
C101
0.1U_0402_16V4Z
GM@
C101
0.1U_0402_16V4Z
GM@
1
2
R87 0_0603_5%R87 0_0603_5%
1 2
C141
0.01U_0402_25V7K
C141
0.01U_0402_25V7K
1
2
C225
0.1U_0402_16V4Z
C225
0.1U_0402_16V4Z
1
2
C144
10U_0805_10V4Z
C144
10U_0805_10V4Z
1
2
C113
0.1U_0402_16V4Z
GM@
C113
0.1U_0402_16V4Z
GM@
1
2
R94
0_0402_5%
IHDMI@
R94
0_0402_5%
IHDMI@
1 2
C129
10U_0805_10V4Z
C129
10U_0805_10V4Z
1 2
C154
10U_0805_10V4Z
C154
10U_0805_10V4Z
12
R95
0_0603_5%
R95
0_0603_5%
12
C110
0_0805_5%
PM@
C110
0_0805_5%
PM@
+
C146
220U_6.3V_M
+
C146
220U_6.3V_M
1
2
C112
0_0805_5%
PM@
C112
0_0805_5%
PM@
+
C109
220U_B2_2.5VM
@
+
C109
220U_B2_2.5VM
@
1
2
C115
4.7U_0805_10V4Z
C115
4.7U_0805_10V4Z
1
2
C138
0.1U_0402_16V4Z
IHDMI@
C138
0.1U_0402_16V4Z
IHDMI@
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
401662
D
SCHEMATIC,MB A4991
14 48Thursday, May 21, 2009
2008/10/06 2009/10/06
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
401662
D
SCHEMATIC,MB A4991
14 48Thursday, May 21, 2009
2008/10/06 2009/10/06
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
401662
D
SCHEMATIC,MB A4991
14 48Thursday, May 21, 2009
2008/10/06 2009/10/06
Compal Electronics, Inc.
VSS
NC
VSS SCB
VSS NCTF
U3J
CANTIGA ES_FCBGA1329
G7R3@
VSS
NC
VSS SCB
VSS NCTF
U3J
CANTIGA ES_FCBGA1329
G7R3@
VSS_297
AH8
VSS_298
Y8
VSS_299
L8
VSS_300
E8
VSS_301
B8
VSS_302
AY7
VSS_303
AU7
VSS_304
AN7
VSS_305
AJ7
VSS_306
AE7
VSS_307
AA7
VSS_308
N7
VSS_309
J7
VSS_310
BG6
VSS_311
BD6
VSS_312
AV6
VSS_313
AT6
VSS_314
AM6
VSS_315
M6
VSS_316
C6
VSS_317
BA5
VSS_318
AH5
VSS_319
AD5
VSS_320
Y5
VSS_321
L5
VSS_322
J5
VSS_323
H5
VSS_324
F5
VSS_325
BE4
VSS_327
BC3
VSS_328
AV3
VSS_329
AL3
VSS_330
R3
VSS_331
P3
VSS_332
F3
VSS_333
BA2
VSS_334
AW2
VSS_335
AU2
VSS_336
AR2
VSS_337
AP2
VSS_338
AJ2
VSS_339
AH2
VSS_340
AF2
VSS_341
AE2
VSS_342
AD2
VSS_343
AC2
VSS_344
Y2
VSS_345
M2
VSS_346
K2
VSS_347
AM1
VSS_348
AA1
VSS_349
P1
VSS_350
H1
VSS_351
U24
VSS_352
U28
VSS_353
U25
VSS_354
U29
VSS_NCTF_1
AF32
VSS_NCTF_2
AB32
VSS_NCTF_3
V32
VSS_NCTF_4
AJ30
VSS_NCTF_5
AM29
VSS_NCTF_6
AF29
VSS_NCTF_7
AB29
VSS_NCTF_8
U26
VSS_NCTF_9
U23
VSS_NCTF_10
AL20
VSS_NCTF_11
V20
VSS_NCTF_12
AC19
VSS_NCTF_13
AL17
VSS_NCTF_14
AJ17
VSS_NCTF_15
AA17
VSS_NCTF_16
U17
VSS_SCB_1
BH48
VSS_SCB_2
BH1
VSS_SCB_3
A48
VSS_SCB_4
C1
NC_26
E1
NC_27
D2
NC_28
C3
NC_29
B4
NC_30
A5
NC_31
A6
NC_32
A43
NC_33
A44
NC_34
B45
NC_35
C46
NC_36
D47
NC_37
B47
NC_38
A46
NC_39
F48
NC_40
E48
NC_41
C48
NC_42
B48
VSS_199
BG21
VSS_200
L12
VSS_201
AW21
VSS_202
AU21
VSS_203
AP21
VSS_204
AN21
VSS_205
AH21
VSS_206
AF21
VSS_207
AB21
VSS_208
R21
VSS_209
M21
VSS_210
J21
VSS_211
G21
VSS_212
BC20
VSS_213
BA20
VSS_214
AW20
VSS_215
AT20
VSS_216
AJ20
VSS_217
AG20
VSS_218
Y20
VSS_219
N20
VSS_220
K20
VSS_221
F20
VSS_222
C20
VSS_223
A20
VSS_224
BG19
VSS_225
A18
VSS_226
BG17
VSS_227
BC17
VSS_228
AW17
VSS_229
AT17
VSS_230
R17
VSS_231
M17
VSS_232
H17
VSS_233
C17
VSS_235
BA16
VSS_237
AU16
VSS_238
AN16
VSS_239
N16
VSS_240
K16
VSS_241
G16
VSS_242
E16
VSS_243
BG15
VSS_244
AC15
VSS_245
W15
VSS_246
A15
VSS_247
BG14
VSS_248
AA14
VSS_249
C14
VSS_250
BG13
VSS_251
BC13
VSS_252
BA13
VSS_255
AN13
VSS_256
AJ13
VSS_257
AE13
VSS_258
N13
VSS_259
L13
VSS_260
G13
VSS_261
E13
VSS_263
AV12
VSS_264
AT12
VSS_265
AM12
VSS_266
AA12
VSS_267
J12
VSS_268
A12
VSS_269
BD11
VSS_270
BB11
VSS_271
AY11
VSS_272
AN11
VSS_273
AH11
VSS_275
Y11
VSS_276
N11
VSS_277
G11
VSS_278
C11
VSS_279
BG10
VSS_280
AV10
VSS_281
AT10
VSS_282
AJ10
VSS_283
AE10
VSS_284
AA10
VSS_285
M10
VSS_286
BF9
VSS_287
BC9
VSS_288
AN9
VSS_289
AM9
VSS_290
AD9
VSS_291
G9
VSS_292
B9
VSS_293
BH8
VSS_294
BB8
VSS_295
AV8
VSS_296
AT8
VSS_262
BF12
VSS_SCB_5
A3
VSS
U3I
CANTIGA ES_FCBGA1329
G7R3@
VSS
U3I
CANTIGA ES_FCBGA1329
G7R3@
VSS_100
AM36
VSS_101
AE36
VSS_102
P36
VSS_103
L36
VSS_104
J36
VSS_105
F36
VSS_106
B36
VSS_107
AH35
VSS_108
AA35
VSS_109
Y35
VSS_110
U35
VSS_111
T35
VSS_112
BF34
VSS_113
AM34
VSS_114
AJ34
VSS_115
AF34
VSS_116
AE34
VSS_117
W34
VSS_118
B34
VSS_119
A34
VSS_120
BG33
VSS_121
BC33
VSS_122
BA33
VSS_123
AV33
VSS_124
AR33
VSS_125
AL33
VSS_126
AH33
VSS_127
AB33
VSS_128
P33
VSS_129
L33
VSS_130
H33
VSS_131
N32
VSS_132
K32
VSS_133
F32
VSS_134
C32
VSS_135
A31
VSS_136
AN29
VSS_137
T29
VSS_138
N29
VSS_139
K29
VSS_140
H29
VSS_141
F29
VSS_142
A29
VSS_143
BG28
VSS_144
BD28
VSS_145
BA28
VSS_146
AV28
VSS_147
AT28
VSS_148
AR28
VSS_149
AJ28
VSS_150
AG28
VSS_151
AE28
VSS_152
AB28
VSS_153
Y28
VSS_154
P28
VSS_155
K28
VSS_156
H28
VSS_157
F28
VSS_158
C28
VSS_159
BF26
VSS_160
AH26
VSS_161
AF26
VSS_162
AB26
VSS_163
AA26
VSS_164
C26
VSS_165
B26
VSS_166
BH25
VSS_167
BD25
VSS_168
BB25
VSS_169
AV25
VSS_170
AR25
VSS_171
AJ25
VSS_172
AC25
VSS_173
Y25
VSS_174
N25
VSS_175
L25
VSS_176
J25
VSS_177
G25
VSS_178
E25
VSS_179
BF24
VSS_180
AD12
VSS_181
AY24
VSS_182
AT24
VSS_183
AJ24
VSS_184
AH24
VSS_185
AF24
VSS_186
AB24
VSS_187
R24
VSS_188
L24
VSS_189
K24
VSS_190
J24
VSS_191
G24
VSS_192
F24
VSS_193
E24
VSS_194
BH23
VSS_195
AG23
VSS_196
Y23
VSS_197
B23
VSS_198
A23
VSS_1
AU48
VSS_2
AR48
VSS_3
AL48
VSS_4
BB47
VSS_5
AW47
VSS_6
AN47
VSS_7
AJ47
VSS_8
AF47
VSS_9
AD47
VSS_10
AB47
VSS_11
Y47
VSS_12
T47
VSS_13
N47
VSS_14
L47
VSS_15
G47
VSS_16
BD46
VSS_17
BA46
VSS_18
AY46
VSS_19
AV46
VSS_20
AR46
VSS_21
AM46
VSS_22
V46
VSS_23
R46
VSS_24
P46
VSS_25
H46
VSS_26
F46
VSS_27
BF44
VSS_28
AH44
VSS_29
AD44
VSS_30
AA44
VSS_31
Y44
VSS_32
U44
VSS_33
T44
VSS_34
M44
VSS_35
F44
VSS_36
BC43
VSS_37
AV43
VSS_38
AU43
VSS_39
AM43
VSS_40
J43
VSS_41
C43
VSS_42
BG42
VSS_43
AY42
VSS_44
AT42
VSS_45
AN42
VSS_46
AJ42
VSS_47
AE42
VSS_48
N42
VSS_49
L42
VSS_50
BD41
VSS_51
AU41
VSS_52
AM41
VSS_53
AH41
VSS_54
AD41
VSS_55
AA41
VSS_56
Y41
VSS_57
U41
VSS_58
T41
VSS_59
M41
VSS_60
G41
VSS_61
B41
VSS_62
BG40
VSS_63
BB40
VSS_64
AV40
VSS_65
AN40
VSS_66
H40
VSS_67
E40
VSS_68
AT39
VSS_69
AM39
VSS_70
AJ39
VSS_71
AE39
VSS_72
N39
VSS_73
L39
VSS_74
B39
VSS_75
BH38
VSS_76
BC38
VSS_77
BA38
VSS_78
AU38
VSS_79
AH38
VSS_80
AD38
VSS_81
AA38
VSS_82
Y38
VSS_83
U38
VSS_84
T38
VSS_85
J38
VSS_86
F38
VSS_87
C38
VSS_88
BF37
VSS_89
BB37
VSS_90
AW37
VSS_91
AT37
VSS_92
AN37
VSS_93
AJ37
VSS_94
H37
VSS_95
C37
VSS_96
BG36
VSS_97
BD36
VSS_98
AK15
VSS_99
AU36
VSS_199
AJ6
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDR_A_D35
DDR_A_D61
DDR_A_D29
DDR_A_D15
DDR_A_D57
DDR_A_D12
DDR_A_D13
DDR_A_D10
DDR_A_D24
DDR_A_D56
DDR_A_D9
DDR_A_D44
DDR_A_D42
DDR_A_D58
DDR_A_D11
DDR_A_D40
DDR_A_MA14
DDR_A_D36
DDR_A_D63
DDR_A_D32
DDR_A_D51
DDR_A_D14
DDR_A_D45
DDR_A_D54
DDR_A_D59
DDR_A_D37
DDR_A_D41
DDR_A_D50
DDR_A_D62
DDR_A_D31
DDR_A_D30
DDR_A_D33
DDR_A_D0
DDR_A_D43
DDR_A_D1
DDR_A_D39
DDR_A_D46
DDR_A_D22
DDR_A_D23
DDR_A_D49
DDR_A_D48
DDRA_CKE1
DDRA_SCS0#
DDR_A_MA1
DDR_A_MA10
DDR_A_MA3
DDR_A_MA9 DDR_A_MA7
DDR_A_MA12
DDR_A_MA5
DDR_A_D8
DDR_A_D17
DDR_A_D16
DDR_A_D27
DDR_A_D26
DDR_A_DQS1
DDR_A_DQS0
DDR_A_DQS2
DDR_A_DM3
DDR_A_DM1
DDR_A_DM2
DDR_A_DM0
DDR_A_DQS4
DDR_A_DQS6
DDR_A_DQS7
DDR_A_MA8
DDR_A_MA11
DDR_A_MA2
DDR_A_MA0
DDR_A_MA4
DDR_A_MA6
DDR_A_BS1
DDR_A_RAS#
DDR_A_D20
DDR_A_D21
DDR_A_D53
DDR_A_D52
DDR_A_D55
DDR_A_DM6
DDR_A_DM4
DDR_A_D3
DDR_A_D2
DDR_A_DM5
DDR_A_DM7
DDR_A_MA13
DDR_A_DQS5
DDR_A_DQS#0
DDR_A_DQS#1
DDR_A_DQS#2
DDR_A_DQS3
DDR_A_DQS#3
DDR_A_DQS#4
DDR_A_DQS#5
DDR_A_DQS#6
DDR_A_DQS#7
DDRA_ODT0
DDR_A_D18
DDR_A_D19
DDR_A_D38
DDR_A_D4
DDR_A_D6
DDR_A_D47
DDR_A_D34
DDR_A_D5
DDR_A_D7
DDR_A_D60
DDR_A_D28
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8
DDRA_CKE1
DDRA_CKE0
DDR_A_MA9
DDR_A_MA10
DDRA_ODT1
DDR_A_MA13
DDRA_ODT0
DDR_A_MA12
DDR_A_MA4
DDR_A_MA2
DDR_A_BS0
DDR_A_RAS#
DDRA_SCS0#
DDR_A_MA11
DDR_A_MA14
DDR_A_BS1
DDR_A_MA0
DDRA_SCS1#
DDR_A_MA5
DDR_A_MA3
DDR_A_CAS#
DDR_A_WE#
DDRA_ODT1
DDRA_SCS1#
DDRA_CKE0
DDR_A_BS2
DDR_A_WE#
DDR_A_BS0
DDR_A_CAS#
DDR_A_D25
DDR_A_MA1
DDR_A_BS2
PM_SMBCLK15,16,23,26,28
PM_SMBDATA15,16,23,26,28
DDR_A_DM[0..7] 9
DDR_A_DQS[0..7] 9
DDR_A_DQS#[0..7] 9
DDR_A_D[0..63] 9
DDR_A_MA[0..14] 9
DDRA_CKE1 8
PM_EXTTS# 8,15
DDRA_CLK0 8
DDRA_CLK0# 8
DDR_A_BS1 9
DDR_A_RAS# 9
DDRA_SCS0# 8
DDRA_ODT0 8
DDRA_CLK1 8
DDRA_CLK1# 8
DDR_A_BS09
DDRA_ODT18
DDR_A_BS29
DDR_A_CAS#9
DDRA_CKE08
DDR_A_WE#9
DDRA_SCS1#8
+1.8V
+3VS
+1.8V
+0.9VS
+1.8V
+DIMM_VREF
+1.8V
+DIMM_VREF
+0.9VS
Title
Size Document Number Rev
Date: Sheet
of
Security Classification
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
401662
D
SCHEMATIC,MB A4991
15 48Thursday, May 21, 2009
2008/10/06 2009/10/06
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet
of
Security Classification
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
401662
D
SCHEMATIC,MB A4991
15 48Thursday, May 21, 2009
2008/10/06 2009/10/06
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet
of
Security Classification
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
401662
D
SCHEMATIC,MB A4991
15 48Thursday, May 21, 2009
2008/10/06 2009/10/06
Compal Electronics, Inc.
REVERSE
SO-DIMM A
Layout Note:
Place these resistor
closely JP3,all
trace length Max=1.5"
Layout Note: Place one cap close to every 2 pullup
resistors terminated to +0.9VS
Layout Note:
Place near JP3
20mils
Top side
C161
2.2U_0603_6.3V6K
C161
2.2U_0603_6.3V6K
1
2
C166
0.1U_0402_16V4Z
C166
0.1U_0402_16V4Z
1
2
C164
0.1U_0402_16V4Z
C164
0.1U_0402_16V4Z
1
2
R482 56_0402_5%R482 56_0402_5%
1 2
RP1
56_0804_8P4R_5%
RP1
56_0804_8P4R_5%
18
27
36
45
+
C157
220U_Y_4VM
@
4.4
+
C157
220U_Y_4VM
@
4.4
1
2
C168
0.1U_0402_16V4Z
C168
0.1U_0402_16V4Z
1
2
R481 56_0402_5%R481 56_0402_5%
1 2
RP12
56_0804_8P4R_5%
RP12
56_0804_8P4R_5%
1 8
2 7
3 6
4 5
C179
0.1U_0402_16V4Z
C179
0.1U_0402_16V4Z
1
2
JDDRL
FOX_AS0A426-M2RN-7F
@JDDRL
FOX_AS0A426-M2RN-7F
@
VREF
1
VSS
3
DQ0
5
DQ1
7
VSS
9
DQS0#
11
DQS0
13
VSS
15
DQ2
17
DQ3
19
VSS
21
DQ8
23
DQ9
25
VSS
27
DQS1#
29
DQS1
31
VSS
33
DQ10
35
DQ11
37
VSS
39
VSS
41
DQ16
43
DQ17
45
VSS
47
DQS2#
49
DQS2
51
VSS
53
DQ18
55
DQ19
57
VSS
59
DQ24
61
DQ25
63
VSS
65
DM3
67
NC
69
VSS
71
DQ26
73
DQ27
75
VSS
77
CKE0
79
VDD
81
NC
83
BA2
85
VDD
87
A12
89
A9
91
A8
93
VDD
95
A5
97
A3
99
A1
101
VDD
103
A10/AP
105
BA0
107
WE#
109
VDD
111
CAS#
113
NC/S1#
115
VDD
117
NC/ODT1
119
VSS
121
DQ32
123
DQ33
125
VSS
127
DQS4#
129
DQS4
131
VSS
133
DQ34
135
DQ35
137
VSS
139
DQ40
141
DQ41
143
VSS
145
DM5
147
VSS
149
DQ42
151
DQ43
153
VSS
155
DQ48
157
DQ49
159
VSS
161
NC,TEST
163
VSS
165
DQS6#
167
DQS6
169
VSS
171
DQ50
173
DQ51
175
VSS
177
DQ56
179
DQ57
181
VSS
183
DM7
185
VSS
187
DQ58
189
DQ59
191
VSS
193
SDA
195
SCL
197
VDDSPD
199
VSS
2
DQ4
4
DQ5
6
VSS
8
DM0
10
VSS
12
DQ6
14
DQ7
16
VSS
18
DQ12
20
DQ13
22
VSS
24
DM1
26
VSS
28
CK0
30
CK0#
32
VSS
34
DQ14
36
DQ15
38
VSS
40
VSS
42
DQ20
44
DQ21
46
VSS
48
NC
50
DM2
52
VSS
54
DQ22
56
DQ23
58
VSS
60
DQ28
62
DQ29
64
VSS
66
DQS3#
68
DQS3
70
VSS
72
DQ30
74
DQ31
76
VSS
78
NC/CKE1
80
VDD
82
NC/A15
84
NC/A14
86
VDD
88
A11
90
A7
92
A6
94
VDD
96
A4
98
A2
100
A0
102
VDD
104
BA1
106
RAS#
108
S0#
110
VDD
112
ODT0
114
NC/A13
116
VDD
118
NC
120
VSS
122
DQ36
124
DQ37
126
VSS
128
DM4
130
VSS
132
DQ38
134
DQ39
136
VSS
138
DQ44
140
DQ45
142
VSS
144
DQS5#
146
DQS5
148
VSS
150
DQ46
152
DQ47
154
VSS
156
DQ52
158
DQ53
160
VSS
162
CK1
164
CK1#
166
VSS
168
DM6
170
VSS
172
DQ54
174
DQ55
176
VSS
178
DQ60
180
DQ61
182
VSS
184
DQS7#
186
DQS7
188
VSS
190
DQ62
192
DQ63
194
VSS
196
SAO
198
SA1
200
SUPPORT_PAD
203
SUPPORT_PAD
204
C174
0.1U_0402_16V4Z
C174
0.1U_0402_16V4Z
1
2
C177
0.1U_0402_16V4Z
C177
0.1U_0402_16V4Z
1
2
C178
0.1U_0402_16V4Z
C178
0.1U_0402_16V4Z
1
2
C158
2.2U_0603_6.3V6K
C158
2.2U_0603_6.3V6K
1
2
C165
0.1U_0402_16V4Z
C165
0.1U_0402_16V4Z
1
2
C160
2.2U_0603_6.3V6K
C160
2.2U_0603_6.3V6K
1
2
C159
2.2U_0603_6.3V6K
C159
2.2U_0603_6.3V6K
1
2
RP2
56_0804_8P4R_5%
RP2
56_0804_8P4R_5%
18
27
36
45
RP3
56_0804_8P4R_5%
RP3
56_0804_8P4R_5%
18
27
36
45
C169
0.1U_0402_16V4Z
C169
0.1U_0402_16V4Z
1
2
C156
0.1U_0402_16V4Z
C156
0.1U_0402_16V4Z
1
2
R480 56_0402_5%R480 56_0402_5%
1 2
C176
0.1U_0402_16V4Z
C176
0.1U_0402_16V4Z
1
2
C155
2.2U_0603_6.3V6K
C155
2.2U_0603_6.3V6K
1
2
C171
0.1U_0402_16V4Z
C171
0.1U_0402_16V4Z
1
2
C172
0.1U_0402_16V4Z
C172
0.1U_0402_16V4Z
1
2
C175
0.1U_0402_16V4Z
C175
0.1U_0402_16V4Z
1
2
C173
0.1U_0402_16V4Z
C173
0.1U_0402_16V4Z
1
2
R101
1K_0402_1%
R101
1K_0402_1%
12
C180
0.1U_0402_16V4Z
C180
0.1U_0402_16V4Z
1
2
C162
2.2U_0603_6.3V6K
C162
2.2U_0603_6.3V6K
1
2
C167
0.1U_0402_16V4Z
C167
0.1U_0402_16V4Z
1
2
RP4
56_0804_8P4R_5%
RP4
56_0804_8P4R_5%
18
27
36
45
C163
0.1U_0402_16V4Z
C163
0.1U_0402_16V4Z
1
2
RP5
56_0804_8P4R_5%
RP5
56_0804_8P4R_5%
18
27
36
45
C170
0.1U_0402_16V4Z
C170
0.1U_0402_16V4Z
1
2
R102
1K_0402_1%
R102
1K_0402_1%
12
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