INTEGRATED CIRCUITS
87C654
CMOS single-chip 8-bit microcontroller
Product specification |
1996 Aug 16 |
IC20 Data Handbook
Philips Semiconductors |
Product specification |
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CMOS single-chip 8-bit microcontroller |
87C654 |
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DESCRIPTION
The 87C654 Single-Chip 8-Bit Microcontroller is manufactured in an advanced CMOS process and is a derivative of the 80C51 microcontroller family. The 87C654 has the same instruction set as the 80C51. Two versions of the derivative exist:
83C654Ð16k bytes mask programmable ROM
87C654ÐEPROM version
This device provides architectural enhancements that make it applicable in a variety of applications for general control systems. The 87C654 contains a non-volatile 16k × 8 EPROM, a volatile 256 × 8 read/write data memory, four 8-bit I/O ports, two 16-bit timer/event counters (identical to the timers of the 80C51), a multi-source, two-priority-level, nested interrupt structure, an I2C interface, UART and on-chip oscillator and timing circuits. For systems that require extra capability, the 87C654 can be expanded using standard TTL compatible memories and logic.
The device also functions as an arithmetic processor having facilities for both binary and BCD arithmetic plus bit-handling capabilities. The instruction set consists of over 100 instructions: 49 one-byte, 45 two-byte and 17 three-byte. With a 16MHz crystal, 58% of the instructions are executed in 0.75ms and 40% in 1.5ms. Multiply and divide instructions require 3ms.
1996 Aug 16
FEATURES
•80C51 central processing unit
•16k × 8 EPROM expandable externally to 64k bytes
•256 × 8 RAM, expandable externally to 64k bytes
•Two standard 16-bit timer/counters
•Four 8-bit I/O ports
•I2C-bus serial I/O port with byte oriented master and slave functions
•Full-duplex UART facilities
•Power control modes
±Idle mode
±Power-down mode
•Five package styles
•Extended temperature range
•OTP package available
•Two speed ranges
±16MHz
±20MHz
2
PIN CONFIGURATIONS
P1.0 |
1 |
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40 |
VCC |
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P1.1 |
2 |
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39 |
P0.0/AD0 |
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P1.2 |
3 |
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38 |
P0.1/AD1 |
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P1.3 |
4 |
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37 |
P0.2/AD2 |
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P1.4 |
5 |
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36 |
P0.3/AD3 |
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P1.5 |
6 |
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35 |
P0.4/AD4 |
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SCL/P1.6 |
7 |
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34 |
P0.5/AD5 |
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SDA/P1.7 |
8 |
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33 |
P0.6/AD6 |
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RST |
9 |
CERAMIC |
32 |
P0.7/AD7 |
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RxD/P3.0 |
10 |
AND |
31 |
EA/VPP |
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PLASTIC |
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TxD/P3.1 |
11 |
DUAL |
30 |
ALE/PROG |
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IN-LINE |
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INT0/P3.2 |
12 |
PACKAGE |
29 |
PSEN |
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INT1/P3.3 |
13 |
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28 |
P2.7/A15 |
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T0/P3.4 |
14 |
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27 |
P2.6/A14 |
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T1/P3.5 |
15 |
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26 |
P2.5/A13 |
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WR/P3.6 |
16 |
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25 |
P2.4/A12 |
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RD/P3.7 |
17 |
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24 |
P2.3/A11 |
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XTAL2 |
18 |
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23 |
P2.2/A10 |
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XTAL1 |
19 |
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22 |
P2.1/A9 |
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VSS |
20 |
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21 |
P2.0/A8 |
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6 |
1 |
40 |
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7 |
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39 |
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CERAMIC |
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AND PLASTIC |
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LEADED |
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CHIP |
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CARRIER |
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17 |
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29 |
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18 |
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28 |
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44 |
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34 |
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1 |
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33 |
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PLASTIC |
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QUAD |
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FLAT |
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PACK |
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11 |
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23 |
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12 |
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22 |
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SU00259 |
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853±1689 17192 |
Philips Semiconductors |
Product specification |
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CMOS single-chip 8-bit microcontroller |
87C654 |
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CERAMIC AND PLASTIC LEADED |
PLASTIC QUAD FLAT PACK |
CHIP CARRIER PIN FUNCTIONS |
PIN FUNCTIONS |
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6 |
1 |
40 |
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44 |
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34 |
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7 |
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39 |
1 |
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33 |
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LCC |
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PQFP |
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17 |
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29 |
11 |
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23 |
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18 |
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28 |
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12 |
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22 |
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Pin |
Function |
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Pin |
Function |
Pin |
Function |
Pin |
Function |
1 |
NC* |
23 |
NC8 |
1 |
P1.5 |
23 |
P2.5/A13 |
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2 |
P1.0 |
24 |
P2.0/A8 |
2 |
P1.6/SCL |
24 |
P2.6/A14 |
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3 |
P1.1 |
25 |
P2.1/A9 |
3 |
P1.7/SDA |
25 |
P2.7/A15 |
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4 |
P1.2 |
26 |
P2.2/A10 |
4 |
RST |
26 |
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PSEN |
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5 |
P1.3 |
27 |
P2.3/A11 |
5 |
P3.0/RxD |
27 |
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ALE/PROG |
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6 |
P1.4 |
28 |
P2.4/A12 |
6 |
NC* |
28 |
NC* |
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7 |
P1.5 |
29 |
P2.5/A13 |
7 |
P3.1/TxD |
29 |
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EA/VPP |
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8 |
P1.6/SCL |
30 |
P2.6/A14 |
8 |
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30 |
P0.7/AD7 |
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P3.2/INT0 |
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9 |
P1.7/SDA |
31 |
P2.7/A15 |
9 |
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31 |
P0.6/AD6 |
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P3.3/INT1 |
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10 |
RST |
32 |
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10 |
P3.4/T0 |
32 |
P0.5/AD5 |
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PSEN |
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11 |
P3.0/RxD |
33 |
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11 |
P3.5/T1 |
33 |
P0.4/AD4 |
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ALE/PROG |
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12 |
NC8 |
34 |
NC8 |
12 |
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34 |
P0.3/AD3 |
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P3.6/WR |
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13 |
P3.1/TxD |
35 |
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13 |
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EA/VPP |
P3.7/RD |
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35 |
P0.2/AD2 |
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14 |
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36 |
P0.7/AD7 |
14 |
XTAL2 |
36 |
P0.1/AD1 |
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P3.2/INT0 |
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15 |
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37 |
P0.6/AD6 |
15 |
XTAL1 |
37 |
P0.0/AD0 |
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P3.3/INT1 |
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16 |
P3.4/T0 |
38 |
P0.5/AD5 |
16 |
VSS |
38 |
VCC |
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17 |
P3.5/T1 |
39 |
P0.4/AD4 |
17 |
NC* |
39 |
NC* |
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18 |
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40 |
P0.3/AD3 |
18 |
P2.0/A8 |
40 |
P1.0 |
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P3.6/WR |
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19 |
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41 |
P0.2/AD2 |
19 |
P2.1/A9 |
41 |
P1.1 |
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P3.7/RD |
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20 |
XTAL2 |
42 |
P0.1/AD1 |
20 |
P2.2/A10 |
42 |
P1.2 |
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21 |
XTAL1 |
43 |
P0.0/AD0 |
21 |
P2.3/A11 |
43 |
P.13 |
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22 |
VSS |
44 |
VCC |
22 |
P2.4/A12 |
44 |
P1.4 |
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* DO NOT CONNECT |
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SU00260 |
* DO NOT CONNECT |
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SU00261 |
LOGIC SYMBOL
VCC VSS
RST
XTAL1
XTAL2
VPP/EA
PSEN
PROG/ALE
ALTERNATE |
FUNCTIONS |
PORT 3 |
RxD
TxD
INT0
INT1
T0
T1
WR
RD
PORT 0 |
ADDRESS AND DATA BUS |
PORT 1 |
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SCL |
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SDA |
PORT 2 |
ADDRESS BUS |
SU00262
1996 Aug 16 |
3 |
Philips Semiconductors |
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Product specification |
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CMOS single-chip 8-bit microcontroller |
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87C654 |
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ORDERING INFORMATION |
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PHILIPS PART |
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ORDER NUMBER |
PHILIPS NORTH AMERICA |
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TEMPERATURE |
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PART MARKING |
PART ORDER NUMBER |
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RANGE °C |
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ROMless |
ROM |
ROMless |
ROM |
Drawing |
AND PACKAGE |
FREQ |
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Number |
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MHz |
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P80C652FBP |
P83C654FBP/xxx |
S80C652FBPN |
S83C654FBPN |
SOT129-1 |
0 to +70, Plastic Dual In-line Package |
16 |
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0 to +70, Ceramic Dual In-line Package |
16 |
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w/Window |
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P80C652FBA |
P83C654FBA/xxx |
S80C652FBAA |
S83C654FBAA |
SOT187-2 |
0 to +70, Plastic Leaded Chip Carrier |
16 |
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P80C652FBB |
P83C654FBB/xxx |
S80C652FBBB |
S83C654FBBB |
SOT307-24 |
0 to +70, Plastic Quad Flat Pack |
16 |
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P80C652FFP |
P83C654FFP/xxx |
S80C652FFPN |
S83C654FFPN |
SOT129-1 |
±40 to +85, Plastic Dual In-line Package |
16 |
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P80C652FFA |
P83C654FFA/xxx |
S80C652FFAA |
S83C654FFAA |
SOT187-2 |
±40 to +85, Plastic Leaded Chip Carrier |
16 |
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P80C652FFB |
P83C654FFB/xxx |
S80C652FFBB |
S83C654FFBB |
SOT307-24 |
±40 to +85, Plastic Quad Flat Pack |
16 |
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P80C652FHP |
P83C654FHP/xxx |
S80C652FHPN |
S83C654FHPN |
SOT129-1 |
±40 to +125, Plastic Dual In-line Package |
16 |
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P80C652FHA |
P83C654FHA/xxx |
S80C652FHAA |
S83C654FHAA |
SOT187-2 |
±40 to +125, Plastic Leaded Chip Carrier |
16 |
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P80C652FHB |
P83C654FHB/xxx |
S80C652FHBB |
S83C654FHBB |
SOT307-24 |
±40 to +125, Plastic Quad Flat Pack |
16 |
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P80C652IBP |
P83C654IBP/xxx |
S80C652IBPN |
S83C654IBPN |
SOT129-1 |
0 to +70, Plastic Dual In-line Package |
24 |
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P80C652IBA |
P83C654IBA/xxx |
S80C652IBAA |
S83C654IBAA |
SOT187-2 |
0 to +70, Plastic Leaded Chip Carrier |
24 |
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P80C652IBB |
P83C654IBB/xxx |
S80C652IBBB |
S83C654IBBB |
SOT307-24 |
0 to +70, Plastic Quad Flat Pack |
24 |
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P80C652IFP |
P83C654IFP/xxx |
S80C652IFPN |
S83C654IFPN |
SOT129-1 |
±40 to +85, Plastic Dual In-line Package |
24 |
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P80C652IFA |
P83C654IFA/xxx |
S80C652IFAA |
S83C654IFAA |
SOT187-2 |
±40 to +85, Plastic Leaded Chip Carrier |
24 |
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P80C652IFB |
P83C654IFB/xxx |
S80C652IFBB |
S83C654IFBB |
SOT307-24 |
±40 to +85, Plastic Quad Flat Pack |
24 |
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NOTES:
1.For full specification, see the 87C652 data sheet.
2.87C654 frequency range is 3.5MHz ± 16MHz or 3.5MHz ± 24MHz.
3.xxx denotes the ROM code number.
4.SOT311 replaced by SOT307-2.
1996 Aug 16 |
4 |
Philips Semiconductors |
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Product specification |
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CMOS single-chip 8-bit microcontroller |
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87C654 |
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TEMPERATURE |
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RANGE °C |
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EPROM |
Drawing |
AND PACKAGE |
FREQ |
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Number |
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MHz |
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S87C654-4N40 |
SOT129-1 |
0 to +70, Plastic Dual In-line Package |
16 |
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S87C654-4F40 |
0590B |
0 to +70, Ceramic Dual In-line Package |
16 |
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w/Window |
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S87C654-4A44 |
SOT187-2 |
0 to +70, Plastic Leaded Chip Carrier |
16 |
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S87C654-4K44 |
1472A |
0 to +70, Ceramic Leaded Chip Carrier |
16 |
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w/Window |
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S87C654±4B44 |
SOT307-2 |
0 to +70, Plastic Quad Flat Pack |
16 |
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S87C654-5N40 |
SOT129-1 |
±40 to +85, Plastic Dual In-line Package |
16 |
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S87C654-5F40 |
0590B |
±40 to +85, Ceramic Dual In-line Package |
16 |
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w/Window |
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S87C654-5A44 |
SOT187-2 |
±40 to +85, Plastic Leaded Chip Carrier |
16 |
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S87C654-5B44 |
SOT307-2 |
±40 to +85, Plastic Quad Flat Pack |
16 |
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S87C654±7N40 |
SOT129-1 |
0 to +70, Plastic Dual In-line Package |
20 |
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S87C654±7F40 |
0590B |
0 to +70, Ceramic Dual In-line Package |
20 |
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w/Window |
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S87C654±7A44 |
SOT187-2 |
0 to +70, Plastic Leaded Chip Carrier |
20 |
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S87C654±7K44 |
1472A |
0 to +70, Ceramic Leaded Chip Carrier |
20 |
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w/Window |
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S87C654±8N40 |
SOT129-1 |
±40 to +85, Plastic Dual In-line Package |
20 |
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S87C654±8F40 |
0590B |
±40 to +85, Ceramic Dual In-line Package |
20 |
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w/Window |
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S87C654±8A44 |
SOT187-2 |
±40 to +85, Plastic Leaded Chip Carrier |
20 |
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1996 Aug 16 |
5 |
Philips Semiconductors |
Product specification |
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CMOS single-chip 8-bit microcontroller |
87C654 |
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BLOCK DIAGRAM
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FREQUENCY |
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COUNTERS |
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REFERENCE |
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XTAL2 |
XTAL1 |
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T0 |
T1 |
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OSCILLATOR |
PROGRAM |
DATA |
TWO 16-BIT |
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AND |
MEMORY |
MEMORY |
TIMER/EVENT |
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TIMING |
(16K x 8 |
(256 x 8 RAM) |
COUNTERS |
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EPROM) |
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SDA |
SHARED |
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CPU |
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I2C SERIAL I/O |
WITH |
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SCL |
PORT 1 |
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INTERNAL |
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INTERRUPTS |
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64K BYTE BUS |
PROGRAMMABLE I/O |
PROG SERIAL PORT |
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EXPANSION |
FULL DUPLEX UART |
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CONTRTOL |
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SYNCHRONOUS SHIFT |
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INT0 |
INT1 |
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CONTROL |
PARALLEL PORTS, |
SERIAL IN |
SERIAL OUT |
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ADDRESS/DATA BUS |
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EXTERNAL |
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AND I/O PINS |
SHARED WITH |
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PORT 3 |
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INTERRUPTS |
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SU00271 |
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1996 Aug 16 |
6 |
Philips Semiconductors |
Product specification |
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CMOS single-chip 8-bit microcontroller |
87C654 |
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PIN DESCRIPTIONS
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PIN NUMBER |
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MNEMONIC |
DIP |
LCC |
QFP |
TYPE |
NAME AND FUNCTION |
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VSS |
20 |
22 |
16 |
I |
Ground: 0V reference. |
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VCC |
40 |
44 |
38 |
I |
Power Supply: This is the power supply voltage for normal, idle, and power-down |
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operation. |
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P0.0±0.7 |
39±32 |
43±36 |
37±30 |
I/O |
Port 0: Port 0 is an open-drain, bidirectional I/O port. Port 0 pins that have 1s written to them |
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float and can be used as high-impedance inputs. Port 0 is also the multiplexed low-order |
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address and data bus during accesses to external program and data memory. In this |
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application, it uses strong internal pull-ups when emitting 1s. Port 0 also outputs the code |
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bytes during program verification in the 87C654. External pull-ups are required during |
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program verification. |
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P1.0±P1.7 |
1±8 |
2±9 |
40±44, |
I/O |
Port 1: Port 1 is an 8-bit bidirectional I/O port with internal pull-ups, except P1.6 and P1.7 |
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1±3 |
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which are open drain. Port 1 pins that have 1s written to them are pulled high by the internal |
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pull-ups and can be used as inputs. As inputs, port 1 pins that are externally pulled low will |
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source current because of the internal pull-ups. (See DC Electrical Characteristics: IIL). |
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Port 1 also receives the low-order address byte during program memory verification. |
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Alternate functions include: |
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P1.6 |
7 |
8 |
2 |
I/O |
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SCL: I2C-bus serial port clock line. |
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P1.7 |
8 |
9 |
3 |
I/O |
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SDA: I2C-bus serial port data line. |
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P2.0±P2.7 |
21±28 |
24±31 |
18±25 |
I/O |
Port 2: Port 2 is an 8-bit bidirectional I/O port with internal pull-ups. Port 2 pins that have 1s |
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written to them are pulled high by the internal pull-ups and can be used as inputs. As inputs, |
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port 2 pins that are externally being pulled low will source current because of the internal |
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pull-ups. (See DC Electrical Characteristics: IIL). Port 2 emits the high-order address byte |
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during fetches from external program memory and during accesses to external data memory |
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that use 16-bit addresses (MOVX @DPTR). In this application, it uses strong internal |
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pull-ups when emitting 1s. During accesses to external data memory that use 8-bit |
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addresses (MOV @Ri), port 2 emits the contents of the P2 special function register. |
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P3.0±P3.7 |
10±17 |
11, |
5, |
I/O |
Port 3: Port 3 is an 8-bit bidirectional I/O port with internal pull-ups. Port 3 pins that have 1s |
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13±19 |
7±13 |
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written to them are pulled high by the internal pull-ups and can be used as inputs. As inputs, |
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port 3 pins that are externally being pulled low will source current because of the pull-ups. |
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(See DC Electrical Characteristics: IIL). Port 3 also serves the special features of the 80C51 |
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family, as listed below: |
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10 |
11 |
5 |
I |
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RxD (P3.0): Serial input port |
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11 |
13 |
7 |
O |
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TxD (P3.1): Serial output port |
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12 |
14 |
8 |
I |
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(P3.2): External interrupt |
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INT0 |
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13 |
15 |
9 |
I |
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(P3.3): External interrupt |
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INT1 |
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14 |
16 |
10 |
I |
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T0 (P3.4): Timer 0 external input |
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15 |
17 |
11 |
I |
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T1 (P3.5): Timer 1 external input |
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16 |
18 |
12 |
O |
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(P3.6): External data memory write strobe |
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WR |
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17 |
19 |
13 |
O |
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(P3.7): External data memory read strobe |
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RD |
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RST |
9 |
10 |
4 |
I |
Reset: A high on this pin for two machine cycles while the oscillator is running, resets the |
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device. An internal diffused resistor to VSS permits a power-on reset using only an external |
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capacitor to VCC. |
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30 |
33 |
27 |
I/O |
Address Latch Enable/Program Pulse: Output pulse for latching the low byte of the |
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ALE/PROG |
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address during an access to external memory. In normal operation, ALE is emitted at a |
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constant rate of 1/6 the oscillator frequency, and can be used for external timing or clocking. |
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Note that one ALE pulse is skipped during each access to external data memory. This pin is |
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also the program pulse input (PROG) during EPROM programming. |
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29 |
32 |
26 |
O |
Program Store Enable: The read strobe to external program memory. When the 87C654 is |
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PSEN |
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executing code from the external program memory, PSEN is activated twice each machine |
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cycle, except that two PSEN activations are skipped during each access to external data |
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memory. PSEN is not activated during fetches from internal program memory. |
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31 |
35 |
29 |
I |
External Access Enable/Programming Supply Voltage: |
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must be externally held low to |
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EA/VPP |
EA |
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enable the device to fetch code from external program memory locations 0000H and 3FFFH. |
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If EA is held high, the device executes from internal program memory unless the program |
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counter contains an address greater than 3FFFH. This pin also receives the 12.75V |
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programming supply voltage (VPP) during EPROM programming. |
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XTAL1 |
19 |
21 |
15 |
I |
Crystal 1: Input to the inverting oscillator amplifier and input to the internal clock generator |
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circuits. |
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XTAL2 |
18 |
20 |
14 |
O |
Crystal 2: Output from the inverting oscillator amplifier. |
NOTE:
To avoid ªlatch-upº effect at power-on, the voltage on any pin at any time must not be higher than VCC + 0.5V or VSS ± 0.5V, respectively.
1996 Aug 16 |
7 |
Philips Semiconductors |
Product specification |
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CMOS single-chip 8-bit microcontroller |
87C654 |
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Table 1. |
8XC652/654 Special Function Registers |
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SYMBOL |
DESCRIPTION |
DIRECT |
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BIT ADDRESS, SYMBOL, OR ALTERNATIVE PORT FUNCTION |
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RESET |
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ADDRESS |
MSB |
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LSB |
VALUE |
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ACC* |
Accumulator |
E0H |
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E7 |
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E6 |
E5 |
E4 |
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E3 |
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E2 |
E1 |
E0 |
00H |
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B* |
B register |
F0H |
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F7 |
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F6 |
F5 |
F4 |
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F3 |
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F2 |
F1 |
F0 |
00H |
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DPTR: |
Data pointer |
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(2 bytes) |
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DPH |
Data pointer high |
83H |
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00H |
DPL |
Data pointer low |
82H |
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00H |
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AF |
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AE |
AD |
AC |
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AB |
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AA |
A9 |
A8 |
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IE*# |
Interrupt enable |
A8H |
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EA |
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ES1 |
ES0 |
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ET1 |
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EX1 |
ET0 |
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EX0 |
0x000000B |
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BF |
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BE |
BD |
BC |
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BB |
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BA |
B9 |
B8 |
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IP*# |
Interrupt priority |
B8H |
± |
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PS1 |
PS0 |
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PT1 |
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PX1 |
PT0 |
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PX0 |
xx000000B |
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87 |
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86 |
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85 |
84 |
83 |
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82 |
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81 |
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80 |
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P0* |
Port 0 |
80H |
AD7 |
AD6 |
AD5 |
AD4 |
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AD3 |
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AD2 |
AD1 |
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AD0 |
FFH |
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97 |
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96 |
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95 |
94 |
93 |
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92 |
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91 |
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90 |
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P1*# |
Port 1 |
90H |
SDA |
SCL |
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FFH |
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A7 |
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A6 |
A5 |
A4 |
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A3 |
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A2 |
A1 |
A0 |
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P2* |
Port 2 |
A0H |
A15 |
A14 |
A13 |
A12 |
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A11 |
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A10 |
A9 |
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A8 |
FFH |
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B7 |
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B6 |
B5 |
B4 |
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B3 |
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B2 |
B1 |
B0 |
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P3* |
Port 3 |
B0H |
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T1 |
T0 |
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TXD |
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RXD |
FFH |
RD |
WR |
INT1 |
INT0 |
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PCON# |
Power control |
87H |
SMOD |
± |
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± |
± |
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GF1 |
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GF0 |
PD |
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IDL |
0xxx0000B |
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9F |
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9E |
9D |
9C |
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9B |
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9A |
99 |
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98 |
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S0CON*# |
Serial 0 port control |
98H |
SM0 |
SM1 |
SM2 |
REN |
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TB8 |
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RB8 |
TI |
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RI |
00H |
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S0BUF# |
Serial 0 data buffer |
99H |
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xxxxxxxxB |
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D7 |
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D6 |
D5 |
D4 |
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D3 |
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D2 |
D1 |
D0 |
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PSW* |
Program status word |
D0H |
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CY |
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AC |
F0 |
RS1 |
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RS0 |
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OV |
F1 |
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P |
00H |
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S1DAT# |
Serial 1 data |
DAH |
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00H |
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SP |
Stack pointer |
81H |
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07H |
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S1ADR# |
Serial 1 address |
DBH |
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SLAVE ADDRESS |
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GC |
00H |
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S1STA# |
Serial 1 status |
D9H |
SC4 |
SC3 |
SC2 |
SC1 |
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SC0 |
0 |
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0 |
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0 |
F8H |
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DF |
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DE |
DD |
DC |
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DB |
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DA |
D9 |
D8 |
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S1CON*# |
Serial 1 control |
D8H |
CR2 |
ENS1 |
STA |
STO |
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SI |
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AA |
CR1 |
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CR0 |
00000000B |
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8F |
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8E |
8D |
8C |
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8B |
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8A |
89 |
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88 |
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TCON* |
Timer control |
88H |
TF1 |
TR1 |
TF0 |
TR0 |
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IE1 |
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IT1 |
IE0 |
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IT0 |
00H |
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TH1 |
Timer high 1 |
8DH |
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00H |
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TH0 |
Timer high 0 |
8CH |
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00H |
TL1 |
Timer low 1 |
8BH |
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00H |
TL0 |
Timer low 0 |
8AH |
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00H |
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TMOD |
Timer mode |
89H |
GATE |
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M1 |
M0 |
GATE |
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M1 |
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M0 |
00H |
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C/T |
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*SFRs are bit addressable.
# SFRs are modified from or added to the 80C51 SFRs.
1996 Aug 16 |
8 |
Philips Semiconductors |
Product specification |
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CMOS single-chip 8-bit microcontroller |
87C654 |
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OSCILLATOR CHARACTERISTICS
XTAL1 and XTAL2 are the input and output, respectively, of an inverting amplifier. The pins can be configured for use as an on-chip oscillator, as shown in the Logic Symbol.
To drive the device from an external clock source, XTAL1 should be driven while XTAL2 is left unconnected. There are no requirements on the duty cycle of the external clock signal, because the input to the internal clock circuitry is through a divide-by-two flip-flop. However, minimum and maximum high and low times specified in the data sheet must be observed.
Reset
A reset is accomplished by holding the RST pin high for at least two machine cycles (24 oscillator periods), while the oscillator is running. To insure a good power-on reset, the RST pin must be high long enough to allow the oscillator time to start up (normally a few
milliseconds) plus two machine cycles. At power-on, the voltage on VCC and RST must come up at the same time for a proper start-up.
Idle Mode
In the idle mode, the CPU puts itself to sleep while all of the on-chip peripherals stay active. The instruction to invoke the idle mode is the last instruction executed in the normal operating mode before the idle mode is activated. The CPU contents, the on-chip RAM, and all of the special function registers remain intact during this mode. The idle mode can be terminated either by any enabled interrupt (at which time the process is picked up at the interrupt service routine and continued), or by a hardware reset which starts the processor in the same manner as a power-on reset.
Power-Down Mode
In the power-down mode, the oscillator is stopped and the instruction to invoke
power-down is the last instruction executed. Only the contents of the on-chip RAM are preserved. A hardware reset is the only way to terminate the power-down mode. The control bits for the reduced power modes are in the special function register PCON. Table 2 shows the state of the I/O ports during low current operating modes.
I2C SERIAL COMMUNICATIONÐSIO1
The I2C serial port is identical to the I2C serial port on the 8XC552. The operation of this subsystem is described in detail in the 8XC552 section of this manual.
Note that in both the 8XC652/4 and the 8XC552 the I2C pins are alternate functions to port pins P1.6 and P1.7. Because of this, P1.6 and P1.7 on these parts do not have a pull-up structure as found on the 80C51. Therefore P1.6 and P1.7 have open drain outputs on the 8XC652/4.
Table 2. External Pin Status During Idle and Power-Down Mode
MODE |
PROGRAM |
ALE |
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PORT 0 |
PORT 1 |
PORT 2 |
PORT 3 |
MEMORY |
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PSEN |
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Idle |
Internal |
1 |
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1 |
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Data |
Data |
Data |
Data |
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Idle |
External |
1 |
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1 |
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Float |
Data |
Address |
Data |
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Power-down |
Internal |
0 |
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0 |
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Data |
Data |
Data |
Data |
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Power-down |
External |
0 |
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Float |
Data |
Data |
Data |
Serial Control Register (S1CON) ± See Table 3
S1CON (D8H)
CR2 |
ENS1 |
STA |
STO |
SI |
AA |
CR1 |
CR0 |
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Bits CR0, CR1 and CR2 determine the serial clock frequency that is generated in the master mode of operation.
Table 3. Serial Clock Rates
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BIT FREQUENCY (kHz) AT fOSC |
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CR2 |
CR1 |
CR0 |
6MHz |
12MHz |
16MHz |
20MHz |
fOSC DIVIDED BY |
0 |
0 |
0 |
23 |
47 |
62.5 |
78 |
256 |
0 |
0 |
1 |
27 |
54 |
71 |
891 |
224 |
0 |
1 |
0 |
31.25 |
62.5 |
83.3 |
1041 |
192 |
0 |
1 |
1 |
37 |
75 |
100 |
1251 |
160 |
1 |
0 |
0 |
6.25 |
12.5 |
17 |
21 |
960 |
1 |
0 |
1 |
50 |
100 |
1331 |
1661 |
120 |
1 |
1 |
0 |
100 |
2001 |
2671 |
3341 |
60 |
1 |
1 |
1 |
0.25 < 62.5 |
0.5 < 62.5 |
0.65 < 55.6 |
0.81 < 69.4 |
96 × (256 ± (reload value Timer 1)) |
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0 to 255 |
0 to 254 |
0 to 253 |
0 to 253 |
(Reload value range: 0 ± 254 in mode 2) |
NOTES:
1. These frequencies exceed the upper limit of 100kHz of the I2C-bus specification and cannot be used in an I2C-bus application.
1996 Aug 16 |
9 |