Philips Semiconductors Programmable Logic Devices |
Product specification |
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ECL programmable array logic |
10H20EV8/10020EV8 |
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DESCRIPTION
The 10H20EV8/10020EV8 is an ultra high-speed universal ECL PAL device. Combining versatile output macrocells with a standard AND/OR single programmable array, this device is ideal in implementing a user's custom logic. The use of Philips
Semiconductors state-of-the-art bipolar oxide isolation process enables the 10H20EV8/10020EV8 to achieve optimum speed in any design. The SNAP design software package from Philips Semiconductors simplifies design entry based upon Boolean or state equations.
The 10H20EV8/10020EV8 is a two-level logic element comprised of 11 fixed inputs, an input pin that can either be used as a clock or
12th input, 90 AND gates, and 8 Output Logic Macrocells. Each Output Macrocell can be individually configured as a dedicated input, dedicated output with polarity control, a bidirectional I/O, or as a registered output that has both output polarity control and feedback to the AND array. This gives the part the capability of having up to 20 inputs and eight outputs.
The 10H20EV8/10020EV8 has a variable number of product terms that can be OR'd per output. Four of the outputs have 12 AND terms available and the other four have 8 terms per output. This allows the designer the extra flexibility to implement those functions that he couldn't in a standard PAL device.
Asynchronous Preset and Reset product terms are also included for system design ease. Each output has a separate output enable product term. Another feature added for the system designer is a power-up Reset on all registered outputs.
The 10H20EV8/10020EV8 also features the ability to Preload the registers to any desired state during testing. The Preload is not affected by the pattern within the device, so can be performed at any step in the testing sequence. This permits full logical verification even after the device has been patterned.
FEATURES
•Ultra high speed ECL device
±tPD = 4.5ns (max)
±tIS = 2.6ns (max)
±tCKO = 2.3ns (max)
±fMAX = 208MHz
•Universal ECL Programmable Array Logic
±8 user programmable output macrocells
±Up to 20 inputs and 8 outputs
±Individual user programmable output polarity
•Variable product term distribution allows increased design capability
•Asynchronous Preset and Reset capability
•10KH and 100K options
•Power-up Reset and Preload function to enhance state machine design and testing
•Design support provided via SNAP and other CAD tools
•Security fuse for preventing design duplication
•Available in 24-Pin 300mil-wide DIP and 28-Pin PLCC.
PIN CONFIGURATIONS
F Package
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I1 |
1 |
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24 |
VCC |
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I2 |
2 |
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23 |
I11 |
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CLK/I12 |
3 |
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22 |
I10 |
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F1 |
4 |
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21 |
F8 |
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F2 |
5 |
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20 |
F7 |
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VCO1 |
6 |
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19 |
VCO2 |
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F3 |
7 |
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18 |
F6 |
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F4 |
8 |
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17 |
F5 |
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I3 |
9 |
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16 |
I9 |
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I4 |
10 |
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15 |
I8 |
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I5 |
11 |
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14 |
I7 |
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V |
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12 |
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13 |
I |
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EE |
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6 |
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F = Ceramic DIP (300mil-wide)
A Package
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CLK/I12 |
I2 |
I1 |
NC VCC I11 I10 |
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4 |
3 |
2 |
1 |
28 |
27 |
26 |
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F1 |
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25 |
F8 |
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F2 |
6 |
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24 |
F7 |
VCO1 |
7 |
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23 |
VCO2 |
NC |
8 |
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22 |
NC |
F3 |
9 |
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21 |
F6 |
F4 |
10 |
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20 |
F5 |
I3 |
11 |
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19 |
I9 |
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12 |
13 |
14 |
15 |
16 |
17 |
18 |
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I4 |
I5 VEE NC I6 |
I7 |
I8 |
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A = Plastic Leaded Chip Carrier
ORDERING INFORMATION
DESCRIPTION |
ORDER CODE |
DRAWING NUMBER |
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24-Pin Ceramic Dual In-Line (300mil-wide) |
10H20EV8±4F |
0586B |
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10020EV8±4F |
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28-Pin Plastic Leaded Chip Carrier |
10H20EV8±4A |
0401F |
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10020EV8±4A |
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PAL is a registered trademark of Monolithic Memories, Inc., a wholly owned subsidiary of Advanced Micro Devices, Inc.
October 22, 1993 |
113 |
853±1423 11164 |
Philips Semiconductors Programmable Logic Devices |
Product specification |
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ECL programmable array logic |
10H20EV8/10020EV8 |
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LOGIC DIAGRAM
INPUT LINES
3 |
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0 |
4 |
8 |
12 |
16 |
20 |
24 |
28 |
32 |
36 |
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D |
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0 |
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OUTPUT |
4 |
7 |
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LOGIC |
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MACRO |
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CELL |
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D |
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0 |
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OUTPUT |
21 |
7 |
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LOGIC |
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MACRO |
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CELL |
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1 |
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D |
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0 |
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OUTPUT |
5 |
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LOGIC |
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11 |
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MACRO |
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CELL |
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2 |
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D |
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0 |
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OUTPUT |
20 |
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LOGIC |
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11 |
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MACRO |
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CELL |
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9 |
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D |
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0 |
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OUTPUT |
7 |
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LOGIC |
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11 |
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MACRO |
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CELL |
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D |
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0 |
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OUTPUT |
18 |
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LOGIC |
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11 |
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MACRO |
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CELL |
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D |
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0 |
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OUTPUT |
8 |
7 |
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LOGIC |
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MACRO |
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CELL |
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D |
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0 |
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OUTPUT |
17 |
7 |
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LOGIC |
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MACRO |
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CELL |
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15 |
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23 |
16 |
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22 |
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ASYNCHRONOUS RESET |
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ASYNCHRONOUS PRESET |
NOTES:
1.All unprogrammed or virgin ªANDº gate locations are pulled to logic ª0º
2.Programmable connections
3.Pinout for F Package
October 22, 1993 |
114 |
Philips Semiconductors Programmable Logic Devices |
Product specification |
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ECL programmable array logic |
10H20EV8/10020EV8 |
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FUNCTIONAL DIAGRAM
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CLK/I |
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I |
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1 |
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11 |
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PROGRAMMABLE AND ARRAY |
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(90 × 40) |
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12 |
12 |
8 |
8 |
8 |
8 |
12 |
12 |
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RESET |
OUTPUT |
OUTPUT |
OUTPUT |
OUTPUT |
OUTPUT |
OUTPUT |
OUTPUT |
OUTPUT |
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LOGIC |
LOGIC |
LOGIC |
LOGIC |
LOGIC |
LOGIC |
LOGIC |
LOGIC |
PRESET |
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MACROCELL |
MACROCELL |
MACROCELL |
MACROCELL |
MACROCELL |
MACROCELL |
MACROCELL |
MACROCELL |
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F |
F |
F |
F |
F |
F |
F |
F |
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FUNCTIONAL DESCRIPTION
The 10H20EV8/10020EV8 is an ultra high-speed universal ECL PAL-type device.
Combining versatile Output Macrocells with a standard AND/OR single programmable array, this device is ideal in implementing a user's custom logic.
As can be seen in the Logic Diagram, the device is a two-level logic element with a programmable AND array. The 20EV8 can have up to 20 inputs and 8 outputs. Each output has a versatile Macrocell whereby the output can either be configured as a dedicated input, a dedicated combinatorial output with polarity control, a bidirectional I/O, or as a registered output that has both output polarity control and feedback into the AND array.
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Fn |
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AP |
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OUTPUT |
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D |
Q |
SELECT |
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MUX |
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CLK |
Q |
S1 |
S0 |
VCC |
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AR |
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FEEDBACK |
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MUX |
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VCC |
S1 |
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Figure 1. Output Logic Macrocell |
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October 22, 1993 |
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115 |
The device also features 90 product terms.
Two of the product terms can be used for a global asynchronous preset and/or reset.
Eight of the product terms can be used for individual output enable control of each
Macrocell. The other 80 product terms are distributed among the outputs. Four of the outputs have eight product terms, while the other four have 12. This arrangement allows the utmost in flexibility when implementing user patterns.
Output Logic Macrocell
The 10H20EV8/10020EV8 incorporates an extremely versatile Output Logic Macrocell that allows the user complete flexibility when configuring outputs.
As seen in Figure 1, the 10H20EV8/ 10020EV8 Output Logic Macrocell consists of an edge-triggered D-type flip-flop, an output select MUX, and a feedback select MUX. Fuses S0 and S1 allow the user to select between the various cells. S1 controls whether the output will be either registered with internal feedback or combinatorial I/O. S0 controls the polarity of the output (ActiveHIGH or Active-LOW). This allows the user to achieve the following configurations: Registered Active-HIGH output, Registered
Active-LOW output, Combinatorial ActiveHIGH output, and Combinatorial Active-LOW output. With the output enable product term, this list can be extended by adding the configurations of a Combinatorial I/O with Polarity or another input.
Philips Semiconductors Programmable Logic Devices |
Product specification |
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ECL programmable array logic |
10H20EV8/10020EV8 |
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ABSOLUTE MAXIMUM RATINGS1
SYMBOL |
PARAMETER |
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RATING |
UNIT |
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VEE |
Supply voltage |
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±8.0 |
V |
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VIN |
Input voltage (VIN should never be more negative than VEE) |
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0 to VEE |
V |
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IO |
Output source current |
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±50 |
mA |
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TS |
Operating Temperature range |
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±55 to +150 |
°C |
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TJ |
Storage Temperature range |
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Ceramic Package |
+165 |
°C |
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Plastic Package |
+150 |
°C |
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NOTE:
1.Stresses above those listed may cause malfunction or permanent damage to the device. This is a stress rating only. Functional operation at these or any other condition above those indicated in the operational and programming specification of the device is not implied.
DC OPERATING CONDITIONS 10H20EV8
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TEST |
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LIMITS |
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SYMBOL |
PARAMETER |
CONDITIONS |
MIN |
NOM |
MAX |
UNIT |
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VCC, VCO1, VCO2 |
Circuit ground |
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0 |
0 |
0 |
V |
VEE |
Supply voltage (negative) |
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±5.2 |
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V |
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Tamb = 0°C |
±1170 |
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±840 |
mV |
VIH |
High level input voltage |
Tamb = +25°C |
±1130 |
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±810 |
mV |
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Tamb = +75°C |
±1070 |
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±735 |
mV |
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Tamb = 0°C |
±1950 |
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±1480 |
mV |
VIL |
Low level input voltage |
Tamb = +25°C |
±1950 |
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±1480 |
mV |
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Tamb = +75°C |
±1980 |
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±1450 |
mV |
Tamb |
Operating ambient temperature range |
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0 |
+25 |
+75 |
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NOTE:
When operating at other than the specified VEE voltage (±5.2V), the DC and AC Electrical Characteristics will vary slightly from specified values.
DC OPERATING CONDITIONS 10020EV8
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TEST |
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LIMITS |
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SYMBOL |
PARAMETER |
CONDITIONS |
MIN |
NOM |
MAX |
UNIT |
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VCC, VCO1, VCO2 |
Circuit ground |
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0 |
0 |
0 |
V |
VEE |
Supply voltage |
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±4.8 |
±4.5 |
±4.2 |
V |
VEE |
Supply voltage when opetating with the 10K |
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±5.7 |
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V |
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or 10KH ECL family |
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VEE = ±4.2V |
±1150 |
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VIH |
High level input voltage |
VEE = ±4.5V |
±1165 |
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±880 |
mV |
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VEE = ±4.8V |
±1165 |
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VEE = ±4.2V |
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±1475 |
mV |
VIL |
Low level input voltage |
VEE = ±4.5V |
±1810 |
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±1475 |
mV |
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VEE = ±4.8V |
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±1490 |
mV |
Tamb |
Operating ambient temperature range |
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0 |
+25 |
+85 |
°C |
NOTE:
When operating at other than the specified VEE voltages (±4.2V, ±4.5V, ±4.8V), the DC and AC Electrical Characteristics will vary slightly from their specified values.
October 22, 1993 |
116 |
Philips Semiconductors Programmable Logic Devices |
Product specification |
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ECL programmable array logic |
10H20EV8/10020EV8 |
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D |
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D |
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AP |
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AP |
D |
Q |
D |
Q |
CK |
Q |
CK |
Q |
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AR |
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AR |
Registered Active-HIGH |
Registered Active-LOW |
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D |
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D |
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Combinatorial Active-HIGH |
Combinatorial Active-LOW |
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Figure 2. |
Output Macro Cell Configurations |
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OUTPUT MACRO CELL CONFIGURATION
Shown in Figure 2 are the four possible configurations of the output macrocell using fuses S0 and S1. As seen, the output can either be registered Active-HIGH/LOW with feedback or combinatorial Active-HIGH/LOW with feedback. If the registered mode is chosen, the feedback from the Q output to the AND array enables one to make state machines or shift registers without having to tie the output to one of the inputs. If a combinatorial output is chosen, the feedback gate is enabled from the pin and allows one to create permanent outputs, permanent inputs, or I/O pins through the use of the output enable (D) product term.
OUTPUT ENABLE
Each output on the 10H20EV8/10020EV8 has its own individual product term for output enable. The use of the D product term
(direction control) allows the user three possible configurations of the outputs. They are: always enabled, always disabled, and
controlled by a programmed pattern. A HIGH on the D term enables the output, while a LOW performs the disable function. Output enable control can be achieved by programming a pattern on the D term.
The output enable control can also be used to expand a designer's possibilities once a combinatorial output has been chosen. If the
D term is always HIGH, the pin becomes a permanent Active-HIGH/LOW output. If the
D term is always LOW (all fuses left intact), the pin now becomes an extra input.
PRESET AND RESET
The 10H20EV8/10020EV8 also includes a separate product term for asynchronous Preset and asynchronous Reset. These lines are common for all registers and are asserted when the specific product term goes HIGH.
Being asynchronous, they are independent of the clock. It should be noted that the actual state of the output is dependent on how the polarity of the particular output has been chosen. If the outputs are a mix of
Active-HIGH and Active-LOW, a Preset signal will force the Active-HIGH outputs
HIGH while the Active-LOW outputs would go
LOW, even though the Q output of all flip-flops would go HIGH. A Reset signal would force the opposite conditions.
PRELOAD
To simplify testing, the 10H20EV8/10020EV8 has also included PRELOAD circuitry. This allows a user to load any particular data desired into the registers regardless of the programmed pattern. This means that the
PRELOAD can be done on a blank part and after that same part has been programmed to facilitate any post-fuse testing desired.
It can also be used by a designer to help debug a circuit. This could be important if a state machine was implemented in the
10H20EV8/ 10020EV8. The PRELOAD would allow the entry of any state in the sequence desired and start clocking from that particular point. Any or all transitions could be verified.
October 22, 1993 |
117 |
Philips Semiconductors Programmable Logic Devices |
Product specification |
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ECL programmable array logic |
10H20EV8/10020EV8 |
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DC ELECTRICAL CHARACTERISTICS 10H20EV8
0°C ≤ Tamb ≤ +75°C, VEE = ±5.2V ± 5%, VCC = VCO1 = VCO2 = GND
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LIMITS4 |
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SYMBOL |
PARAMETER1 |
TEST CONDITIONS2 |
T |
MIN |
MAX |
UNITS |
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amb |
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VOH |
High level output voltage |
VIN = VIH MIN or VIL MAX |
0°C |
±1020 |
±840 |
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+25°C |
±980 |
±810 |
mV |
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+75°C |
±920 |
±735 |
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VOL |
Low level output voltage |
VIN = VIH MIN or VIL MAX |
0°C |
±1950 |
±1630 |
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+25°C |
±1950 |
±1630 |
mV |
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+75°C |
±1950 |
±1600 |
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IIH |
High level input current |
VIN = VIH MAX |
0°C |
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+75°C |
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220 |
μA |
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IIL |
Low level input current |
VIN = VIL MIN |
0°C |
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Except I/O Pins |
+75°C |
0.3 |
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μA |
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±IEE |
Supply current |
VEE = MAX |
0°C to +75°C |
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All inputs = VIH MAX |
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250 |
mA |
DC ELECTRICAL CHARACTERISTICS 10020EV8
0°C ≤ Tamb ≤ +85°C, ±4.8V ≤ VEE ≤ ±4.2V, VCC = VCO1 = VCO2 = GND
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LIMITS4 |
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SYMBOL |
PARAMETER1 |
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TEST CONDITIONS2 |
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MIN |
TYP |
MAX |
UNITS |
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VEE = ±4.2V |
±1020 |
|
±870 |
mV |
VOH |
High level output voltage |
|
VIN = VIH MAX or VIL MIN |
VEE = ±4.5V |
±1025 |
±955 |
±880 |
mV |
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VEE = ±4.8V |
±1035 |
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±880 |
mV |
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Outputs |
Apply VIHMIN or VILMAX to |
VEE = ±4.2V |
±1030 |
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mV |
VOHT |
High level output threshold voltage |
Loaded |
one input at a time, other |
VEE = ±4.5V |
±1035 |
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mV |
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with 50Ω |
inuts at VIHMAX or VILMIN. |
VEE = ±4.8V |
±1045 |
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mV |
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to ±2.0V |
Apply VIHMIN or VILMAX to |
VEE = ±4.2V |
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±1595 |
mV |
VOLT |
Low level output threshold voltage |
± 0.010V |
one input at a time, other |
VEE = ±4.5V |
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±1610 |
mV |
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inuts at VIHMAX or VILMIN. |
VEE = ±4.8V |
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±1610 |
mV |
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VEE = ±4.2V |
±1810 |
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±1605 |
mV |
VOL |
Low level output voltage |
|
Inuts at VIHMAX or VILMIN. |
VEE = ±4.5V |
±1810 |
±1705 |
±1620 |
mV |
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VEE = ±4.8V |
±1830 |
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±1620 |
mV |
IIH |
High level input current |
One input under test at VIHMAX. Other inputs at |
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220 |
μA |
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VILMIN. |
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IIL |
Low level input current |
One input under test at VILMIN. Other inputs at |
0.5 |
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μA |
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VIHMAX. |
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±IEE |
VEE supply current |
All inputs at VIHMAX. |
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230 |
mA |
NOTES:
1.All voltage measurements are referenced to the ground terminal.
2.Each ECL 10KH/100K series device has been designed to meet the DC specification after thermal equilibrium has been established. Thermal equilibrium is established by applying power for at least 2 minutes, while maintaining transverse airflow of 2.5 meters/sec (500 linear feet/min.) over the device, mounted either in a test socket or on a printed circuit board. Test voltage values are given in the DC operating conditions table. Conditions for testing shown in the tables are not necessarily worst case. For worst case testing guidelines, refer to DC Testing, Chapter 1, Section 3, of the Philips Semiconductors 10/100K ECL Data Handbook.
3.Terminals not specifically referenced can be left electrically open. Open inputs assume a logic LOW state. Any unused pins can be
terminated to ±2V. If tied to VEE, it must be through a resistor > 10K. It is recommended that pins that have been programmed as RESET,
PRESET, or CLOCK inputs not be left open due to the possibility of false triggering from internally and externally generated switching transients.
4.The specified limits represent the worst case values for the parameter. Since these worst case values normally occur at the supply voltage and temperature extremes, additional noise immunity can be achieved by decreasing the allowable operating condition ranges.
October 22, 1993 |
118 |