PERICOM PI6C1202 Technical data

12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012
12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012
查询PI6C1202供应商
ADVANCE INFORMATION
PI6C1202
Precision Clock Generator
for Laser Printers
Features
Supports laser printer pixel rates up to 120 MHz.Jitter less than 200ps.Easily programmable frequency selections via parallel
interface. Post divider (R) designed to load only during the Beam Detect interval.
Source clock input can be from crystal or oscillator.Crystal frequency range from 8 MHz to 22 MHz.Oscillator frequency range from 8 MHz to 30 MHz.Active LOW asynchronous reset input for synchronization
with engine via Beam Detect Input.
Synchronized Beam Detect Output to support external state
machines.
Glitch-less clock output after Beam Detect.Supports dynamic frequency changes on a line-per-line basis.Mixed line resolution supports half-toning and gray scale
operations.
Minimizes controller memory utilization (low-resolution text
mixed with high-resolution images).
On-chip VCO loop filter (no external components).On-chip crystal oscillator (modified Pierce).Single 5V power supply.Low power consumption.Packaging:
20-pin wide body SOIC (S), 20-pin wide body TSSOP (L)
Description
The PI6C1202 is an advanced CMOS clock generator designed specifically to support pixel clock generation in low-cost laser printers. Capable of generating highly stable clock frequencies up to 120 MHz, this device supports printer engines with dot resolu­tions of 1,200 dpi and above. Page speeds may range from 4 pages per minute to better than 60 pages per minute.
Mixed-line resolution supports half-toning and gray scale opera­tions (low-resolution text mixed with high-resolution images) and minimizes controller memory utilization.
Pinout Diagram
20
X1/ICLK
X2
SEL0
GND SEL1 SEL2
VCC
AGND
OE
AVCC
1 2 3 4 5 6 7 8 9 10
20-Pin
L, S
BDOWID GND
19
PCLK
18
GND
17
BD#
16
BDOUT
15
BDOPOL
14
R0
13
R1
12
R2
11
Functional Block Diagram
Prescale
X1 X2
CLK
IN
.
.
2
Phase & Freq Det
Charge
Pump
1
Loop Filter
Multiplier
.
.
N
012
SEL
BD#
OE
VCO
Control &
Resolution
Select
(R)
R0 R1 R2
BDOUT
PCLK
PXXXX 09/06/01
ADVANCE INFORMATION
Pin Description
niPemaNnoitpircseD
1KLCI/1X natupniotdesuebyamrolatsyrcaotdetcennocsinipsihT.ecruoskcolclanretxemorftupniro,LATSYRC
22X ahtiwdesunehwdnuorgotroticapacFp22aevahyllacipytdluohsnipsihT.rotallicsOgniRfotuptuO.LATSYRC
4DNGdnuorGlatigiD 3
5 6
7V 8DNGAdnuorGgolanA 9EO ,WOLdellupnehW.stuptuoTUODBehtdnaKLCPehtelbanelliwnipsiht,HGIHdellupnehW.elbanEtuptuO
01VA 11
21 31
41LOPODB sinipsihtnehW.)51nip(tuptuoTUODBehtfoytiralopehttesotdesusinipsihT:ytiraloPtuptuOtceteDmaeB
51TUODB langisTUODBehT.derruccosahnoitazinorhcnysretfaenilwenafotratsehtslangisnipsihT.tuptuOtceteDmaeB
61#DB enilafo)gninnigebro(dneehttahtsetacidninipsihtsevirdtahtlangisenigneehT.enignEmorftupnItceteDmaeB
71DNGdnuorGlatigiD 81KLCP -erp(ycneuqerf)kcolctupniro(latsyrcehtfonoitcnufasinipsihtfoycneuqerftuptuoehT.tuptuOkcolClexiP
91DNGdnuorGlatigiD 02DIWODB sinipsihtnehW.)51nip(tuptuoTUODBehtfohtdiwehttesotdesusinipsihT:htdiWtuptuOtceteDmaeB
CC
CC
)2-0(R ylthgitllaerasnipesehtybtessoitaredividehT.noitulosertodlanifehttesotdesU.noitceleSnoituloseRtuptuO
)2-0(LES gniruddednemmocerton(emitynadegnahcyllacimanydebnacsnipesehT.oitaRnoitacilpitluMlatsyrC/OCVstceleS
VlatigiD
CC
VgolanA
CC
.yllanretnipudellupsi
.tuptuoSOMC
.rotsiserpu-lluplanretni
.tuptuoSOMCevird-decnalab
.rotsiserpu-lluplanretninasahnipsihT
PI6C1202
Precision Clock Generator
for Laser Printers
sihtmorfdetcennocebdluohsroticapac)pyt(Fp33a,latsyrcaotdetcennocnehW.ycneuqerfecnereferlanretxe
.roticapacarofdeenonsierehtkcolclanretxenaybnevirdnehW.dnuorgotnip
ybnevirdsi1XfI.Fp33otFp51morfdemmirtebnacroticapacsiht,ycneuqerflatsyrcehtgninut-enifroF.latsyrc
.roticapacarofdeenonsiereht,ecruoskcolclanretxena
.dilavsyatsgnittesehttahteetnaraugotylevitcanevirdroWOL/HGIHdeitebtsumstupniesehT.)gnigamievitca
.srotsiserpu-lluplanretnievahsnipesehT.noitamrofnilanoitiddarof2elbaTotrefeR
.rotsiserpu-lluplanretninasahnipsihT.detats-3erasnipeseht
todkcolctuptuoehtotsegnahccimanydwolladnasehctilgetanimileotdengisedstuptuosuonorhcnysdengila
evitca)tceteDmaeB(#DBehtgniruddegnahcebylnonacsnipesehT.sisabenil-repanoycneuqerfnoituloser otevitcagniog#DBotroirpselcycKLCPowtroenotsaeltadehctalyllanretxeebdluohsslangisehT.lavretni
dna1Rgnimussa(edom8/1ro4/1roflortnocnip-elgnisswolla0R.semitdlohdnaputessehctallanretnieetnaraug
.srotsiserpu-lluplanretnievahsnipesehT.noitamrofnirehtrufrof1elbaTotreferesaelP.)1=2R
nipsihT.WOLevitcasiytiralopTUODBeht,HGIHsinipsihtnehW.HGIHevitcasiytiralopTUODBeht,WOL
tnednepedsieslupsihtfohtdiwehT.dezinorhcnysdnadetcetedsilangis#DBgnimocniehtnehwevitcaoglliw
lanoitiddarofmargaidgnimitehtotreferesaelP.gnittesKLCPtnerrucehtdnaycneuqerfOCVehtnopu
2ro1ottesebnachtdiwehtdna)41nip(LOPODBybdellortnocebnacTUODBfoytiralopehT.noitamrofni
evirddecnalabAm21asahTUODB.nipEOehtybdetats-3ebnacTUODB.)02nip(DIWODBybsKLCP
situpnievitisnes-egdewol-evitcasiht,ebortssuonorhcnysanayllacipytsilangissihtecniS.detcetedneebsah nasahnipsihT.siseretsyhhtiwdlohserhttupnielbitapmoc-LTTasahtupnisihT.tnatsiser-elbatsatemylemertxe
xlatsyrC=KLCP:)2-0(Rybtessaoitaredividlanifehtdna)2-0(LESybtessaoitarylpitlumeht,2/1otdelacs
tuptuosihT.)1=2R=1Rsemussa-0Rybdellortnocsa4/1ro8/1(x])1-0(LESybdenifedsa8ro,61,23[x)2/1(
muminimehT.tupni#DBehtgnitressaybtnevesuonorhcnysalanretxenaotdezinorhcnysylsselhctilgebnac
otreferesaelP.kcolcOCVehtfohtdiwehtybdellortnocsitnevelanretxeehtottnemngilaehtfoycanimretedni
Am21asahnipsihT.nipEOehtybdetats-3ebnactuptuoKLCPehT.noitamrofnilanoitiddarofsmargaidgnimit
.doirepKLCPenosihtdiwTUODBeht,HGIHsinipsihtnehW.sdoirepKLCPowtsihtdiwTUODBeht,WOL
2
PXXXX 09/06/01
Basic PLL Flow Diagram
ADVANCE INFORMATION
PI6C1202
Precision Clock Generator
for Laser Printers
SEL
012
XTAL
Prescaler
Divider
.
.
2
VCO/Multiplier
Table 1. Dot Resolution Divider Pin Setting
2R1R0RnoitcnuFR
000÷ 61 61 001÷ 23 23 010÷ 46 46 011÷ 821 821
R0 R1 R2
Synchronous
Counter/Divider
Dot Resolution
.
.
.
.
2 to
256x8, x16, x32
BD#
PCLK
BDOUT
Table 2. VCO Multiplier Pin Setting
2LES1LES0LESnoitcnuF
100 devreseR 10 1 8x 110 23x 111 61x
100÷ 652 652 10 1÷ 2 2 110÷ 4 4 111÷ 8 8
Note:
1. The relationship of the VCO to PCLK is controlled by the R synchronous divider. For example: (a) 1 PCLK = 4 VCO clocks if R0 = 0 & R1 = R2 = 1 (b) 1 PCLK = 8 VCO clocks if R0 = 1 & R1 = R2 = 1
3
PXXXX 09/06/01
ADVANCE INFORMATION
Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested.)
PI6C1202
Precision Clock Generator
for Laser Printers
Storage Temperature .............................................................. 65°C to +150°C
Ambient Temperature with Power Applied .................................. 0°C to +70°C
Supply Voltage to Ground Potential (Inputs & Vcc only) ......... 0.3V to +7.0V
DC Input Voltage ...................................................................... 0.5V to +7.0V
DC Output Current ............................................................................... 120 mA
Power Dissipation ................................................................................... 1.0 W
DC Electrical Characteristics (V
= 5V ±5%. TA = 0°C to 70°C)
CC
lobmySnoitpircseDsnoitidnoCtseT
)1(
V
HI
)1(
1X
V
HI
V
)1(
HTDB
)1(
V
LI
I
HI
I
LI
1X1XtnerruCHGIHtupnIV,tupnI1X
I
HI
1X1XtnerruCWOLtupnIV,tupnI1X
I
LI
V
HO
V
LO
)4,1(
I
SO
I
C
egatloVHGIHtupnI#DB&1XtpecxestupnIllA0.2
1XegatloVHGIHtupnItupnI1XV
egatloVdlohserhTtupnI#DBV
CC
V52.5otV57.4=2.14.1
egatloVWOLtupnIstupnIllA8.0
tnerruCHGIHtupnIpu-lluP/wV,1XtpecxestupnIllA
tnerruCWOLtupnIpu-lluP/wV,1XtpecxestupnIllA
CC
CC
egatloVHGIHtuptuOV,2XtpecxestuptuOllA
egatloVWOLtuptuOV,2XtpecxestuptuOllA
tnerruCtiucriCtrohSV
CC
V,V52.5=
CC
CC
V,.xaM=
NI
V,.xaM=
NI
CC
CC
DNG=52
TUO
tnerruCylppuScimanyDVCC61x=LESzHM02=1X,V0.5=53
V
CC
V
CC
Note:
Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
)2(
V,.xaM=
V=
NI
CC
V,.xaM=
V=
CC
V0=05
NI
.niM.pyT
0.1-
CC
5
 051
)3(
.xaMstinU
V0=051
I,.niM=
HO
I,.niM=
LO
Am21=4.2 Am21+=4.0
23x=LESzHM51=1X,V0.5=05
23x=LES,zHM5.71=1X,V0.5=06
V
Aµ
V
Am
Notes:
1. These parameters are guaranteed by design and measured at characterization only.
2. For Max. or Min. conditions, use appropriate values specified under Electrical Characteristics for the appropriate device type.
3. Typical values are shown at VCC = 5.0V, +25°C ambient and maximum loading.
4. Not more than one output should be shorted at one time. Duration of test should not exceed one second.
4
PXXXX 09/06/01
ADVANCE INFORMATION
1.5V
Enable
Disable
1.5V
3.5V
t
PLZ
1.5V 0V
0.3V
0.3V
0V
3.3V
1.5V
3V
0V
V
OH
V
OL
t
PHZ
t
PZH
Output
Normally
High
Output
Normally
Low
OE
t
PZL
PI6C1202
Precision Clock Generator
for Laser Printers
Switching Characteristics (V
= 5V ±5%. TA = 0º C to 70º C)
CC
lobmySnoitpircseDsnoitidnoCtseT.niM.pyT.xaMstinU
)1(
t
R
t
F
t
HZP
t
LZP
t
ZHP
t
ZLP
d
T
F
F
OCV
F
NI
F
OCV
T
SIJ
T
BAJ
T
OCV
T
P
KLC
)1(
P
KLC
)1(
)1(
)1(
)1(
)1(
NILATX
)2(
PotEO
KLC
PotEO
KLC
P
KLC
elcyCytuD05/0555/54%
ycneuqerFtupnIlatsyrC
FhtiwycneuqerFOCV
NILATX
ycneuqerFtupnInevirD
)2(
)1(
)1(
)3(
)4(
KLCP
htiwycneuqerFOCVF
NI
rettijamgisenoKLCP
doirepkcolcOCV 2 333.8
doirepkcolcKLCP 
)V0.2otV8.0(emiTesiRtuptuO
)V8.0otV0.2(emiTllaFtuptuO2
C
L
Fp03=
emiTelbanEtuptuO
)mrofevaW&tiucriCtseTehtotreferesaelP(
emiTelbasiDtuptuO
C
L
trof(
R,Fp03=
L
tdna
LZP
ZLP
)mrofevaW&tiucriCtseTehtotreferesaelP(
gniwollofehtnihtiWOCV
)zHM0.51tadetsetnoitcudorP(
P
KLC
egnarycneuqerf
zHM88=021253
gniwollofehtnihtiWOCV
)zHM03dna,22,02,4tadetsetnoitcudorP(
P
KLC
egnarycneuqerf
zHM021=021084
,zHM51=1X
rettijkaep-ot-kaepmrettrohsKLCP  002
8=R,23x=LES
Notes:
1. These parameters are guaranteed by design and measured at characterization only.
2. The VCO frequency can be determined by the following formula:
 2
smhO005=
5.15.7
sn
V7otsmhO005=upR
)ylno
5.10.6
8 22
zHM
8 03
05
sp
sn
F
F
= x N
VCO
XTALIN
or F
2
IN
N = VCO multiplier value. See Table 2 For example: For X1 = 20 MHz and SEL = x16, then: F
For X1 = 15 MHz and SEL = x32, then: F
3. The VCO clock period is determined by the formula: T
4. T
PLCK
= T
x R, R = output dot resolution divider function (see Table 1). For design aid only. Not subject to production testing.
VCO
Bench Characterization Test Circuit
CL = Load Capacitance RL = Load Resistance
R
= Pull-Up Resistance
PU
desolC
Rt = Termination Resistance
V
OUT
D.U.T
30pF
(Includes jig and probe Capacitance)
(Should be equal to Zout of Pulse Generator)
500 R
PU
500 R
L
C
L
Pulse
Generator
tseThctiwS
niarDnepO WOLelbasiD
WOLelbanE
stupnIrehtOllAnepO
V
IN
R
t
= (20 MHz / 2) x 16 = 160 MHz
VCO
= (15 MHz / 2) x 32 = 240 MHz
VCO
= 1 / FVCO. For design aid only.
VCO
Bench Characterization Waveform Enable and Disable Timing
+7V
Pulse Generator for All Pulses: Rate
5
≤≤
1.0 NGz; Zout
≤≤
≤≤
50 ohms, tF, tR
≤≤
≤≤
2.5ns
≤≤
PXXXX 09/06/01
ADVANCE INFORMATION
PI6C1202
Precision Clock Generator
for Laser Printers
Timing Table
(4)
(V
= 5V ±5%. TA = 0º C to 70º C)
CC
lobmySnoitpircseD.niM.pyT.xaM
1ThtdiWesluP#DBmuminiM
)1(
2T
3TTUODBot#DBmorfemiTsuonorhcnyST91
)1(
4T
5TdilavtsrifehtotevitcaTUODBmorfemiT
)2(
cnysDBotevitcA#DBmorfemiTT81
T22
OCV
OCV
5.0+
OCV
T
0=DIWODBesluPTUODBfohtdiW
1=DIWODB
t+
KLCP
D
T2
KLCP
T1
KLCP
T74.0
KLCP
3TJt5.0-
4TJt5.0­4TJt5.0-
5TJt5.0-T5.0
 T91 T02
T2
KLCP
T1
KLCP
KLCP
OCV
5.0+
OCV
T
t+
KLCP
D
T2
KLCP
T1
KLCP
T5.0
KLCP
t5.0+
3TJ
t5.0+
4TJ
t5.0+
4TJ
t5.0+
5TJ
KLCPfoegdegnisir
6Tdilavtsrifehtotevitca#DBmorfemitlatoT
t
D
t
3TJ
t
4TJ
t
5TJ
t
6TJ
T91=5T+3T
+79.0
OCV
KLCPfoegdegnisir
+t
T
KLCP
D
6TJt5.0
syaledreffublatotpihc-nO3etoNeeS3etoNeeS
)5(
)5(
)5(
)5(
rettijkaep-ot-kaep3Tsp0 rettijkaep-ot-kaep4Tsp0 rettijkaep-ot-kaep5Tsp0 rettijkaep-ot-kaep6Tsp0
T02=5T+3T
OCV
T
t+
KLCP
D
t5.0+
6TJ
sp002
Notes:
1. These parameters are guaranteed by design and functional test only.
2. The width of the BD# pulse (T1) MUST meet the minimum width requirements of 22 T
. BD# pulses less than 22 T
VCO
VCO
will not achieve synchronization and will not generate BDOUT. For measurement purposes, the falling edge of BD# should be 6 ns or less.
3. tD is extracted from initial product characterization. It varies with both VCC and temperature. The following linear regression formulas may be used to calculate tD for 4.75V < VCC < 5.25V and 0oC < TA < 70oC. This is provided for design purposes only. A +10% guardband of the calculated value will be used for production testing.
0.1+
A. Linear regression of tD vs. VCC at a fixed temperature: tD = Slope x VCC + Intercept
o
(erutarepmeT
)C0 02040608
)sn(tpecretnI230.41657.41585.51177.61701.71
)V/sn(epolS422.1692.1693.1865.1465.1
B. Linear regression of tD vs. Temperature at a fixed VCC: tD = Slope x Temperature + Intercept
V
)V(05.457.400.552.505.5
CC
)sn(tpecretnI875.8602.8278.7685.7463.7
o
)C910.0810.0710.0710.0410.0
/sn(epolS
4. T
= VCO clock period. T
VCO
= PCLK clock period.
PCLK
5. Parameters obtained from initial characterization, not subject to production testing.
6
PXXXX 09/06/01
ADVANCE INFORMATION
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
Timing Diagram
PLL to Output Clock and Beam Detect Reset Sequence
0 . . .
20 22 25
PI6C1202
Precision Clock Generator
for Laser Printers
VCO/PLL
BD#
1.3V
T1
. . . . . .
. . .
BDsync
T2
(internal)
1.5V
BDOUT
T6
T3 T4
1.5V
T5
. . . . . .
PCLK
(entering low)
. . .
PCLK
(entering high)
Note:
1. The P
frequency in this example is 1/4 the VCO frequency (R0=0 & R1=R2=1 ® see Table 1)
CLK
For measurement purposes the BD# falling edge should be less than 6ns for 90% to 10%.
VCC Power-Up and VCO Ramp to Lock Timing (Provided for Implementation Reference Purposes only).
<-2.2ms->
5v
Vcc
internal
reset point ~2.2v
VCO
2v
0v
5v
*
23456789012345678
23456789012345678
23456789012345678
23456789012345678
23456789012345678
23456789012345678
23456789012345678
23456789012345678
0v
012 3456789101112131415161718
* Only one BDOUT Pulse is generated by the internal power-up reset.
<------------ VCO Locked ---------->>>>><-------- VCO Ramp Up --------->
23456789012345678901234567890121234567890123
23456789012345678901234567890121234567890123
23456789012345678901234567890121234567890123
23456789012345678901234567890121234567890123
23456789012345678901234567890121234567890123
23456789012345678901234567890121234567890123
23456789012345678901234567890121234567890123
23456789012345678901234567890121234567890123
23456789012345678901234567890121234567890123
23456789012345678901234567890121234567890123
23456789012345678901234567890121234567890123
23456789012345678901234567890121234567890123
23456789012345678901234567890121234567890123
23456789012345678901234567890121234567890123
23456789012345678901234567890121234567890123
23456789012345678901234567890121234567890123
23456789012345678901234567890121234567890123
Milliseconds
7
5v
0v
5v
0v
PXXXX 09/06/01
20-Pin SOIC (S) Package
20
1
.020 .030
.496 .511
.050 BSC
1.27
12.60
12.99
0.508
0.762
REF
ADVANCE INFORMATION
7.40
.2914
7.60
.2992
0-8˚
2.35
.0926
2.65
.1043
SEATING PLANE
0.10
.0040
0.30
.013 .020
0.33
0.51
.0118
X.XX
DENOTES CONTROLLING
X.XX
DIMENSIONS IN MILLIMETERS
.010 .029
0.41
1.27 .394
.419
10.00
10.65
.016 .050
0.254
0.737
x 45˚
Precision Clock Generator
for Laser Printers
.0091
0.23
.0125
0.32
PI6C1202
20-Pin TSSOP (L) Package
20
1
.0256
BSC
0.65
Ordering Information
.252 .260
6.4
6.6
.007 .012
0.19
0.30
.169 .177
.002 .006
4.3
4.5
.047
1.20
Max
0.05
0.15
SEATING PLANE
X.XX
DENOTES CONTROLLING
X.XX
DIMENSIONS IN MILLIMETERS
0.45
0.75 .238
.269
6.1
6.7
.018 .030
.004 .008
0.09
0.20
edoCgniredrOnoitpircseDepyTegakcaPegnaRgnitarepO
S2021C6IPevirDlamroNCIOSlim-003nip-02
C°07+otC°0
L2021C6IPevirDhgiHPOSSTlim-371nip-02
Pericom Semiconductor Corporation
2380 Bering Drive • San Jose, CA 95131 • 1-800-435-2336 • Fax (408) 435-1100 • http://www.pericom.com
8
PXXXX 09/06/01
Loading...