Features
High-speed access times
-Com’l: 9, 10, 12, 15 and 20 ns
-Ind: 12, 15 and 20 ns
Low power operation (typical)
-PDM31532LA Active: 200 mW Standby: 10 mW
-PDM31532SA Active: 250 mW
Standby: 20 mW
High-density 64K x 16 architecture 3.3V (±0.3V) power supply
Fully static operation TTL-compatible inputs and outputs Output buffer controls: OE
Data byte controls: LB, UB
Packages:
Plastic SOJ (400 mil) - SO
Plastic TSOP - T (II)
Functional Block Diagram
A8-A0
Data
I/O15-I/O0 Input/
Output
Buffer
WE
OE
UB Control
Logic
LB
CE
PDM31532
PDM31532
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64K x 16 CMOS |
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3.3V Static RAM |
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Description |
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The PDM31532 is a high-performance CMOS static |
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RAM organized as 65,536 x 16 bits. The PDM31532 |
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features low power dissipation using chip enable |
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(CE) |
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and has an output enable input |
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memory access. Byte access is supported by upper |
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and lower byte controls. |
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The PDM31532 operates from a single 3.3V power |
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supply and all inputs and outputs are fully TTL- |
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compatible. |
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The PDM31532 is available in a 44-pin 400 mil plas- |
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tic SOJ and a plastic TSOP (II) package for high- |
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density surface assembly and is suitable for use in |
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high-speed applications requiring high-speed |
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storage. |
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AddressRow Buffer |
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DecoderRow |
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256 x 128 x 32 |
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Vcc |
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Memory |
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Vss |
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Cell |
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Array |
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32K x 32 |
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9 |
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10 |
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Sense Amp |
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Column |
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Decoder |
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11 |
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Clock |
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Address |
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Buffer |
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12 |
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Generator |
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A15-A9 |
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Rev. 4.3 - 3/27/98 |
1 |
PDM31532
Pin Configuration
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TSOP (II) |
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SOJ |
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A4 |
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1 |
44 |
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A5 |
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A4 |
1 |
44 |
A5 |
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A3 |
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2 |
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A6 |
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A3 |
2 |
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A6 |
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A2 |
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3 |
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A7 |
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A2 |
3 |
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A7 |
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A1 |
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4 |
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OE |
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A1 |
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OE |
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A0 |
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5 |
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UB |
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A0 |
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5 |
UB |
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39 |
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CE |
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6 |
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LB |
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CE |
6 |
LB |
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I/O0 |
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I/O15 |
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I/O0 |
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I/O15 |
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I/O1 |
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I/O14 |
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I/O1 |
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I/O14 |
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I/O2 |
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I/O13 |
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I/O2 |
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I/O13 |
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I/O3 |
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I/O12 |
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I/O3 |
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I/O12 |
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Vcc |
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Vss |
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Vcc |
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Vss |
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Vss |
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Vcc |
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Vss |
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Vcc |
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I/O4 |
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I/O11 |
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I/O4 |
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I/O11 |
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I/O5 |
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I/O10 |
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I/O5 |
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I/O10 |
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I/O6 |
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15 |
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I/O9 |
I/O6 |
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I/O9 |
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I/O7 |
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I/O8 |
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I/O7 |
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I/O8 |
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WE |
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NC |
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WE |
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NC |
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A15 |
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A8 |
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A15 |
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A8 |
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A14 |
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A9 |
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A14 |
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A9 |
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A13 |
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A10 |
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A13 |
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A10 |
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A12 |
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A11 |
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A12 |
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A11 |
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NC |
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NC |
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NC |
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NC |
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Pin Description
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Name |
Description |
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A15-A0 |
Address Inputs |
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I/O15-I/O0 |
Data Inputs |
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Chip Enable Input |
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CE |
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Write Enable Input |
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WE |
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Output Enable Input |
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OE |
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Data Byte Control Inputs |
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LB, |
UB |
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NC |
No Connect |
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Vss |
Ground |
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VCC |
Power (+3.3V) |
Capacitance (1) (T = +25°C, f = 1.0 MHz) |
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A |
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Symbol |
Parameter |
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Conditions |
Max. |
Unit |
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CIN |
Input Capacitance |
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VIN = VSS |
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pF |
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CI/O |
Output Capacitance |
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VI/O = VSS |
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pF |
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NOTE: 1. This parameter is determined by device characterization, but is not production tested. |
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Rev. 4.3 - 3/27/98 |
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PDM31532 |
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Operating Mode |
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Mode |
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I/O7-I/O0 |
I/O15-I/O8 |
Power |
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CE |
OE |
WE |
LB |
UB |
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Read |
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L |
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L |
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H |
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L |
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L |
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Output |
Output |
ICC |
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H |
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L |
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High Impedance |
Output |
ICC |
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L |
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H |
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Output |
High Impedance |
ICC |
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Write |
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L |
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X |
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L |
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L |
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L |
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Input |
Input |
ICC |
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H |
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L |
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High Impedance |
Input |
ICC |
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L |
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H |
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Input |
High Impedance |
ICC |
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Output Disable |
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L |
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H |
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H |
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X |
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x |
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High Impedance |
High Impedance |
ICC |
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L |
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X |
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X |
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H |
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H |
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High Impedance |
High Impedance |
ICC |
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Standby |
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H |
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X |
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X |
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X |
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X |
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High Impedance |
High Impedance |
ISB |
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NOTE: H = VIH, L = VIL, X = DON’T CARE
Absolute Maximum Ratings (2)
Symbol |
Rating |
Com’l. |
Ind. |
Unit |
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VTERM |
Terminal Voltage with Respect to VSS |
–0.5 to +4.6 |
–0.5 to +4.6 |
V |
TBIAS |
Temperature Under Bias |
–55 to +125 |
–65 to +135 |
°C |
TSTG |
Storage Temperature |
–55 to +125 |
–65 to +150 |
°C |
PT |
Power Dissipation |
1.5 |
1.5 |
W |
IOUT |
DC Output Current |
50 |
50 |
mA |
T |
Maximum Junction Temperature (3) |
125 |
145 |
°C |
j |
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NOTE: 2. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
3.Appropriate thermal calculations should be performed in all cases and specifically for
those where the chosen package has a large thermal resistance (e.g., TSOP). The
calculation should be of the form: Tj = Ta + P * θja where Ta is the ambient temperature, P is average operating power and θja the thermal resistance of the package. For this product, use the following θja values:
SOJ: 59o C/W TSOP: 87o C/W
Recommended DC Operating Conditions
Symbol |
Description |
Min. |
Typ. |
Max. |
Unit |
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VCC |
Supply Voltage |
3.0 |
3.3 |
3.6 |
V |
VSS |
Supply Voltage |
0 |
0 |
0 |
V |
Industrial |
Ambient Temperature |
–40 |
25 |
85 |
°C |
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Commercial |
Ambient Temperature |
0 |
25 |
70 |
°C |
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1
2
3
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6
7
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12
Rev. 4.3 - 3/27/98 |
3 |