NPN − MJ15022, MJ15024*
*MJ15024 is a Preferred Device
Silicon Power Transistors
The MJ15022 and MJ15024 are PowerBase power transistors designed for high power audio, disk head positioners and other linear applications.
Features
•High Safe Operating Area (100% Tested) − 2 A @ 80 V
•High DC Current Gain − hFE = 15 (Min) @ IC = 8 Adc
•Pb−Free Packages are Available*
MAXIMUM RATINGS
Rating |
Symbol |
Value |
Unit |
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Collector−Emitter Voltage |
VCEO |
200 |
Vdc |
MJ15022 |
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MJ15024 |
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250 |
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Collector−Base Voltage |
VCBO |
350 |
Vdc |
MJ15022 |
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MJ15024 |
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400 |
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Emitter−Base Voltage |
VEBO |
5 |
Vdc |
Collector−Emitter Voltage |
VCEX |
400 |
Vdc |
Collector Current − Continuous |
IC |
16 |
Adc |
− Peak (Note 1) |
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30 |
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Base Current − Continuous |
IB |
5 |
Adc |
Total Device Dissipation @ TC = 25_C |
PD |
250 |
W |
Derate above 25_C |
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1.43 |
W/_C |
Operating and Storage Junction |
TJ, Tstg |
−65 to +200 |
_C |
Temperature Range |
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THERMAL CHARACTERISTICS
Characteristics |
Symbol |
Max |
Unit |
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Thermal Resistance, Junction−to−Case |
RqJC |
0.70 |
_C/W |
Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected.
1. Pulse Test: Pulse Width = 5 ms, Duty Cycle v 10%.
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16 AMPERES
SILICON POWER TRANSISTORS 200 − 250 VOLTS, 250 WATTS
TO−204AA (TO−3)
CASE 1−07
STYLE 1
MARKING DIAGRAM
MJ1502xG
AYWW
MEX
MJ1502x |
= Device Code |
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x = 2 or 4 |
G |
= Pb−Free Package |
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A |
= |
Assembly Location |
Y |
= |
Year |
WW |
= Work Week |
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MEX |
= |
Country of Origin |
ORDERING INFORMATION
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Device |
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Package |
Shipping |
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MJ15022 |
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TO−204 |
100 Units / Tray |
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MJ15022G |
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TO−204 |
100 Units / Tray |
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(Pb−Free) |
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MJ15024 |
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TO−204 |
100 Units / Tray |
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MJ15024G |
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TO−204 |
100 Units / Tray |
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(Pb−Free) |
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*For additional information on our Pb−Free strategy and soldering details, please |
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download the ON Semiconductor Soldering and Mounting |
Techniques |
Preferred devices are recommended choices for future use |
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Reference Manual, SOLDERRM/D. |
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and best overall value. |
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♥ Semiconductor Components Industries, LLC, 2006 |
1 |
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Publication Order Number: |
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February, 2006 − Rev. 10 |
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MJ15022/D |
NPN − MJ15022, MJ15024*
ELECTRICAL CHARACTERISTICS (TC = 25_C unless otherwise noted)
Characteristic |
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Symbol |
Min |
Max |
Unit |
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OFF CHARACTERISTICS |
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Collector−Emitter Sustaining Voltage (Note 2) |
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VCEO(sus) |
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− |
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(IC = 100 mAdc, IB = 0) |
MJ15022 |
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200 |
− |
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MJ15024 |
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250 |
− |
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Collector Cutoff Current |
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ICEX |
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mAdc |
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(VCE = 200 Vdc, VBE(off) = 1.5 Vdc) |
MJ15022 |
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− |
250 |
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(VCE = 250 Vdc, VBE(off) = 1.5 Vdc) |
MJ15024 |
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− |
250 |
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Collector Cutoff Current |
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ICEO |
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mAdc |
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(VCE = 150 Vdc, IB = 0) |
MJ15022 |
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− |
500 |
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(VCE = 200 vdc, IB = 0) |
MJ15024 |
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− |
500 |
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Emitter Cutoff Current |
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IEBO |
− |
500 |
mAdc |
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(VCE = 5 Vdc, IB = 0) |
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SECOND BREAKDOWN |
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Second Breakdown Collector Current with Base Forward Biased |
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IS/b |
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Adc |
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(VCE = 50 Vdc, t = 0.5 s (non−repetitive)) |
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5 |
− |
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(VCE = 80 Vdc, t = 0.5 s (non−repetitive)) |
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2 |
− |
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ON CHARACTERISTICS |
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DC Current Gain |
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hFE |
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− |
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(IC = 8 Adc, VCE = 4 Vdc) |
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15 |
60 |
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(IC = 16 Adc, VCE = 4 Vdc) |
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5 |
− |
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Collector−Emitter Saturation Voltage |
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VCE(sat) |
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Vdc |
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(IC = 8 Adc, IB = 0.8 Adc) |
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− |
1.4 |
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(IC = 16 Adc, IB = 3.2 Adc) |
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− |
4.0 |
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Base−Emitter On Voltage |
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VBE(on) |
− |
2.2 |
Vdc |
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(IC = 8 Adc, VCE = 4 Vdc) |
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DYNAMIC CHARACTERISTICS |
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Current−Gain − Bandwidth Product |
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fT |
4 |
− |
MHz |
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(IC = 1 Adc, VCE = 10 Vdc, ftest = 1 MHz) |
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Output Capacitance |
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Cob |
− |
500 |
pF |
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(VCB = 10 Vdc, IE = 0, ftest = 1 MHz) |
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2. Pulse Test: Pulse Width = 300 ms, Duty Cycle v 2%. |
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100 |
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(AMPS) |
50 |
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TC = 25°C |
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20 |
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CURRENT |
10 |
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5.0 |
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,COLLECTOR |
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BONDING WIRE LIMITED |
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1.0 |
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THERMAL LIMITATION |
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(SINGLE PULSE) |
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SECOND BREAKDOWN |
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LIMITED |
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C |
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I |
0.2 |
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0.1 |
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0.1 |
0.2 |
0.5 |
10 |
20 |
50 |
100 |
250 |
500 |
1 k |
VCE, COLLECTOR−EMITTER VOLTAGE (VOLTS)
Figure 1. Active−Region Safe Operating Area
There are two limitations on the powerhandling ability of a transistor: average junction temperature and second breakdown. Safe operating area curves indicate IC − VCE limits of the transistor that must be observed for reliable operation; i.e., the transistor must not be subjected to greater dissipation than the curves indicate.
The data of Figure 1 is based on TJ(pk) = 200_C; TC is variable depending on conditions. At high case
temperatures, thermal limitations will reduce the power that can be handled to values Ion than the limitations imposed by second breakdown.
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