Onkyo SKW-8230 Service Manual

HTP-8230

BLOCK DIAGRAM

SKW-8230 : POWERED SUBWOOFER

8230-HTP

			HTP-8230
A	B	C	D
SCHEMATIC DIAGRAM
SKW-8230 : POWERED SUBWOOFER
1
2
3
	LINE
	INPUT
		OUTPUT
		LEVEL
4		LED
		RED : STANDBY
		GREEN : ON
	U02 INPUT PC BOARD	U03 VR / LED PC BOARD	U01 M
5			AC 120V / 60Hz

			HTP-8230
E	F	G	H
			SPEAKER
MAIN PC BOARD
Hz

							HTP-8230
A	B	C	D	E	F	G	H
SCHEMATIC DIAGRAM
SKW-8230 : POWERED SUBWOOFER
1							SPEAKER
2
3
	LINE
	INPUT
		OUTPUT
		LEVEL
4		LED
		RED : STANDBY
		GREEN : ON
	U02 INPUT PC BOARD	U03 VR / LED PC BOARD		U01 MAIN PC BOARD
5			AC 120V / 60Hz

HTP-8230

PC BOARD CONNECTION DIAGRAM

SKW-8230 : POWERED SUBWOOFER

INPUT PC BOARD

MAIN PC BOARD

VR / LED PC BOARD

8230-HTP

HTP-8230

A

B

C

D

PRINTED CIRCUIT BOARD VIEW

SKW-8230 : POWERED SUBWOOFER

U01 MAIN PC BOARD

1

2

3

4

U02

INPUT PC BOARD

U03

VR / LED PC BOARD

5

No PC board view

Look over the actual PC board on hand

®

TDA7293

120V - 100W DMOS AUDIO AMPLIFIER WITH MUTE/ST-BY

VERY HIGH OPERATING VOLTAGE RANGE (±50V)

DMOS POWER STAGE

HIGH OUTPUT POWER (100W @ THD = 10%, RL = 8Ω, VS = ±40V) MUTING/STAND-BY FUNCTIONS

NO SWITCH ON/OFF NOISE VERY LOW DISTORTION VERY LOW NOISE

SHORT CIRCUIT PROTECTED (WITH NO INPUT SIGNAL APPLIED)

THERMAL SHUTDOWN CLIP DETECTOR

MODULARITY (MORE DEVICES CAN BE EASILY CONNECTED IN PARALLEL TO DRIVE VERY LOW IMPEDANCES)

DESCRIPTION

The TDA7293 is a monolithic integrated circuit in Multiwatt15 package, intended for use as audio class AB amplifier in Hi-Fi field applications (Home Stereo, self powered loudspeakers, Top-

Figure 1: Typical Application and Test Circuit

MULTIPOWER BCD TECHNOLOGY

Multiwatt15V Multiwatt15H

ORDERING NUMBERS:

TDA7293V

TDA7293HS

class TV). Thanks to the wide voltage range and to the high out current capability it is able to supply the highest power into both 4Ω and 8Ω loads.

The built in muting function with turn on delay simplifies the remote operation avoiding switching on-off noises.

Parallel mode is made possible by connecting more device through of pin11. High output power can be delivered to very low impedance loads, so optimizing the thermal dissipation of the system.

					C7 100nF			+Vs	C6 1000μF
				R3 22K
	C2				+Vs		BUFFER DRIVER		+PWVs
		R2				7	11		13
	22μF
		680Ω	IN-	2
					-
									14	OUT
		C1 470nF
			IN+	3
					+
										BOOT
	R1 22K								12
										LOADER
			SGND	4						C5	(*)
			(**)							22μF
									6
										BOOTSTRAP
VMUTE	R5 10K		MUTE	10					5
											VCLIP
					MUTE		THERMAL		S/C	CLIP DET
							SHUTDOWN	PROTECTION
VSTBY			STBY	9	STBY
	R4 22K
					1	8		15
					STBY-GND	-Vs		-PWVs
	C3 10μF			C4 10μF		C9 100nF			C8 1000μF
							-Vs			D97AU805A
		(*) see Application note
		(**) for SLAVE function
January 2003											1/15

TDA7293

PIN CONNECTION (Top view)

15	-VS (POWER)
14	OUT
13	+VS (POWER)
12	BOOTSTRAP LOADER
11	BUFFER DRIVER
10	MUTE
9	STAND-BY
8	-VS (SIGNAL)
7	+VS (SIGNAL)
6	BOOTSTRAP
5	CLIP AND SHORT CIRCUIT DETECTOR
4	SIGNAL GROUND
3	NON INVERTING INPUT
2	INVERTING INPUT
1	STAND-BY GND
TAB CONNECTED TO PIN 8	D97AU806

ABSOLUTE MAXIMUM RATINGS

Symbol	Parameter	Value	Unit
VS	Supply Voltage (No Signal)	±60	V
V1	VSTAND-BY GND Voltage Referred to -VS (pin 8)	90	V
V2	Input Voltage (inverting) Referred to -VS	90	V
V2 - V3	Maximum Differential Inputs	±30	V
V3	Input Voltage (non inverting) Referred to -VS	90	V
V4	Signal GND Voltage Referred to -VS	90	V
V5	Clip Detector Voltage Referred to -VS	120	V
V6	Bootstrap Voltage Referred to -VS	120	V
V9	Stand-by Voltage Referred to -VS	120	V
V10	Mute Voltage Referred to -VS	120	V
V11	Buffer Voltage Referred to -VS	120	V
V12	Bootstrap Loader Voltage Referred to -VS	100	V
IO	Output Peak Current	10	A
Ptot	Power Dissipation Tcase = 70°C	50	W
Top	Operating Ambient Temperature Range	0 to 70	°C
Tstg, Tj	Storage and Junction Temperature	150	°C

THERMAL DATA

Symbol	Description	Typ	Max	Unit
Rth j-case	Thermal Resistance Junction-case	1	1.5	°C/W

2/15

TDA7293

ELECTRICAL CHARACTERISTICS (Refer to the Test Circuit VS = ±40V, RL = 8Ω, Rg = 50 Ω; Tamb = 25°C, f = 1 kHz; unless otherwise specified).

Symbol	Parameter	Test Condition	Min.	Typ.	Max.	Unit
VS	Supply Range		±12		±50	V
Iq	Quiescent Current			50	100	mA
Ib	Input Bias Current			0.3	1	μA
VOS	Input Offset Voltage		-10		10	mV
IOS	Input Offset Current				0.2	μA
PO	RMS Continuous Output Power	d = 1%:	75	80		W
		RL = 4Ω; VS = ± 29V,		80
		d = 10%	90	100		W
		RL = 4Ω ; VS = ±29V		100
d	Total Harmonic Distortion (**)	PO = 5W; f = 1kHz		0.005		%
		PO = 0.1 to 50W; f = 20Hz to 15kHz			0.1	%
ISC	Current Limiter Threshold	VS ≤ ± 40V		6.5		A
SR	Slew Rate		5	10		V/μs
GV	Open Loop Voltage Gain			80		dB
GV	Closed Loop Voltage Gain (1)		29	30	31	dB
eN	Total Input Noise	A = curve		1		μV
		f = 20Hz to 20kHz		3	10	μV
Ri	Input Resistance		100			kΩ
SVR	Supply Voltage Rejection	f = 100Hz; Vripple = 0.5Vrms		75		dB
TS	Thermal Protection	DEVICE MUTED		150		°C
		DEVICE SHUT DOWN		160		°C
STAND-BY FUNCTION (Ref: to pin 1)
VST on	Stand-by on Threshold				1.5	V
VST off	Stand-by off Threshold		3.5			V
ATTst-by	Stand-by Attenuation		70	90		dB
Iq st-by	Quiescent Current @ Stand-by			0.5	1	mA
MUTE FUNCTION (Ref: to pin 1)
VMon	Mute on Threshold				1.5	V
VMoff	Mute off Threshold		3.5			V
ATTmute	Mute AttenuatIon		60	80		dB
CLIP DETECTOR
Duty	Duty Cycle ( pin 5)	THD = 1% ; RL = 10KΩ to 5V		10		%
		THD = 10% ;	30	40	50	%
		RL = 10KΩ to 5V
ICLEAK		PO = 50W			3	μA
SLAVE FUNCTION pin 4 (Ref: to pin 8 -VS)
VSlave	SlaveThreshold				1	V
VMaster	Master Threshold		3			V

Note (1): GVmin ³ 26dB

Note: Pin 11 only for modular connection. Max external load 1MW/10 pF, only for test purpose

Note (**): Tested with optimized Application Board (see fig. 2)

3/15

TDA7293

Figure 2: Typical Application P.C. Board and Component Layout (scale 1:1)

4/15

TDA7293

APPLICATION SUGGESTIONS (see Test and Application Circuits of the Fig. 1)

The recommended values of the external components are those shown on the application circuit of Figure 1. Different values can be used; the following table can help the designer.

	COMPONENTS	SUGGESTED VALUE	PURPOSE	LARGER THAN	SMALLER THAN
				SUGGESTED	SUGGESTED
	R1 (*)	22k	INPUT RESISTANCE	INCREASE INPUT	DECREASE INPUT
				IMPEDANCE	IMPEDANCE
	R2	680Ω	CLOSED LOOP GAIN	DECREASE OF GAIN	INCREASE OF GAIN
			SET TO 30dB (**)
	R3 (*)	22k		INCREASE OF GAIN	DECREASE OF GAIN
	R4	22k	ST-BY TIME	LARGER ST-BY	SMALLER ST-BY
			CONSTANT	ON/OFF TIME	ON/OFF TIME;
					POP NOISE
	R5	10k	MUTE TIME	LARGER MUTE	SMALLER MUTE
			CONSTANT	ON/OFF TIME	ON/OFF TIME
	C1	0.47μF	INPUT DC		HIGHER LOW
			DECOUPLING		FREQUENCY
					CUTOFF
	C2	22μF	FEEDBACK DC		HIGHER LOW
			DECOUPLING		FREQUENCY
					CUTOFF
	C3	10μF	MUTE TIME	LARGER MUTE	SMALLER MUTE
			CONSTANT	ON/OFF TIME	ON/OFF TIME
	C4	10μF	ST-BY TIME	LARGER ST-BY	SMALLER ST-BY
			CONSTANT	ON/OFF TIME	ON/OFF TIME;
					POP NOISE
	C5	22μFXN (***)	BOOTSTRAPPING		SIGNAL
					DEGRADATION AT
					LOW FREQUENCY
	C6, C8	1000μF	SUPPLY VOLTAGE
			BYPASS
	C7, C9	0.1μF	SUPPLY VOLTAGE		DANGER OF
			BYPASS		OSCILLATION

(*) R1 = R3 for pop optimization

(**) Closed Loop Gain has to be ³ 26dB

(***) Multiplay this value for the number of modular part connected

Slave function: pin 4 (Ref to pin 8 -VS)

MASTER

-VS +3V

UNDEFINED

-VS +1V

SLAVE

-VS

D98AU821

Note:

If in the application, the speakers are connected via long wires, it is a good rule to add between the output and GND, a Boucherot Cell, in order to avoid dangerous spurious oscillations when the speakers terminal are shorted.

The suggested Boucherot Resistor is 3.9Ω/2W and the capacitor is 1μF.

5/15

TDA7293

INTRODUCTION

In consumer electronics, an increasing demand has arisen for very high power monolithic audio amplifiers able to match, with a low cost, the performance obtained from the best discrete designs.

The task of realizing this linear integrated circuit in conventional bipolar technology is made extremely difficult by the occurence of 2nd breakdown phoenomenon. It limits the safe operating area (SOA) of the power devices, and, as a consequence, the maximum attainable output power, especially in presence of highly reactive loads.

Moreover, full exploitation of the SOA translates into a substantial increase in circuit and layout complexity due to the need of sophisticated protection circuits.

To overcome these substantial drawbacks, the use of power MOS devices, which are immune from secondary breakdown is highly desirable.

The device described has therefore been developed in a mixed bipolar-MOS high voltage technology called BCDII 100/120.

1) Output Stage

The main design task in developping a power operational amplifier, independently of the technology used, is that of realization of the output stage.

The solution shown as a principle shematic by Fig3 represents the DMOS unity - gain output buffer of the TDA7293.

This large-signal, high-power buffer must be capable of handling extremely high current and voltage levels while maintaining acceptably low harmonic distortion and good behaviour over

frequency response; moreover, an accurate control of quiescent current is required.

A local linearizing feedback, provided by differential amplifier A, is used to fullfil the above requirements, allowing a simple and effective quiescent current setting.

Proper biasing of the power output transistors alone is however not enough to guarantee the absence of crossover distortion.

While a linearization of the DC transfer characteristic of the stage is obtained, the dynamic behaviour of the system must be taken into account.

A significant aid in keeping the distortion contributed by the final stage as low as possible is provided by the compensation scheme, which exploits the direct connection of the Miller capacitor at the amplifier’s output to introduce a local AC feedback path enclosing the output stage itself.

2) Protections

In designing a power IC, particular attention must be reserved to the circuits devoted to protection of the device from short circuit or overload conditions.

Due to the absence of the 2nd breakdown phenomenon, the SOA of the power DMOS transistors is delimited only by a maximum dissipation curve dependent on the duration of the applied stimulus.

In order to fully exploit the capabilities of the power transistors, the protection scheme implemented in this device combines a conventional SOA protection circuit with a novel local temperature sensing technique which " dynamically" controls the maximum dissipation.

Figure 3: Principle Schematic of a DMOS unity-gain buffer.

6/15

TDA7293

Figure 4: Turn ON/OFF Suggested Sequence

+Vs

(V)

+40

-40
-Vs
VIN
(mV)
VST-BY		5V
PIN #9
(V)
VMUTE		5V
PIN #10
(V)
IQ
(mA)
VOUT
(V)		OFF
		ST-BY

PLAY	ST-BY	OFF
MUTE	MUTE
		D98AU817

In addition to the overload protection described above, the device features a thermal shutdown circuit which initially puts the device into a muting state (@ Tj = 150 oC) and then into stand-by (@ Tj = 160 oC).

Full protection against electrostatic discharges on every pin is included.

Figure 5: Single Signal ST-BY/MUTE Control

Circuit

	MUTE STBY
MUTE/	20K
ST-BY
10K	30K
	10μF	10μF
	1N4148
		D93AU014

3) Other Features

The device is provided with both stand-by and

mute functions, independently driven by two CMOS logic compatible input pins.

The circuits dedicated to the switching on and off of the amplifier have been carefully optimized to avoid any kind of uncontrolled audible transient at the output.

The sequence that we recommend during the ON/OFF transients is shown by Figure 4.

The application of figure 5 shows the possibility of using only one command for both st-by and mute functions. On both the pins, the maximum applicable range corresponds to the operating supply voltage.

APPLICATION INFORMATION

HIGH-EFFICIENCY

Constraints of implementing high power solutions are the power dissipation and the size of the power supply. These are both due to the low efficiency of conventional AB class amplifier approaches.

Here below (figure 6) is described a circuit proposal for a high efficiency amplifier which can be adopted for both HI-FI and CAR-RADIO applications.

7/15

TDA7293

The TDA7293 is a monolithic MOS power amplifier which can be operated at 100V supply voltage (120V with no signal applied) while delivering output currents up to ±6.5 A.

This allows the use of this device as a very high power amplifier (up to 180W as peak power with T.H.D.=10 % and Rl = 4 Ohm); the only drawback is the power dissipation, hardly manageable in the above power range.

The typical junction-to-case thermal resistance of the TDA7293 is 1 oC/W (max= 1.5 oC/W). To avoid that, in worst case conditions, the chip temperature exceedes 150 oC, the thermal resistance of the heatsink must be 0.038 oC/W (@ max ambient temperature of 50 oC).

As the above value is pratically unreachable; a high efficiency system is needed in those cases where the continuous RMS output power is higher than 50-60 W.

The TDA7293 was designed to work also in higher efficiency way.

For this reason there are four power supply pins: two intended for the signal part and two for the power part.

T1 and T2 are two power transistors that only operate when the output power reaches a certain threshold (e.g. 20 W). If the output power increases, these transistors are switched on during the portion of the signal where more output voltage swing is needed, thus "bootstrapping" the power supply pins (#13 and #15).

The current generators formed by T4, T7, zener diodes Z1, Z2 and resistors R7,R8 define the minimum drop across the power MOS transistors of the TDA7293. L1, L2, L3 and the snubbers C9, R1 and C10, R2 stabilize the loops formed by the "bootstrap" circuits and the output stage of the TDA7293.

By considering again a maximum average output power (music signal) of 20W, in case of the high efficiency application, the thermal resistance value needed from the heatsink is 2.2oC/W (Vs =±50 V and Rl= 8 Ohm).

All components (TDA7293 and power transistors T1 and T2) can be placed on a 1.5oC/W heatsink, with the power darlingtons electrically insulated from the heatsink.

Since the total power dissipation is less than that of a usual class AB amplifier, additional cost savings can be obtained while optimizing the power supply, even with a high heatsink .

BRIDGE APPLICATION

Another application suggestion is the BRIDGE configuration, where two TDA7293 are used.

In this application, the value of the load must not be lower than 8 Ohm for dissipation and current capability reasons.

A suitable field of application includes HI-FI/TV subwoofers realizations.

8/15

The main advantages offered by this solution are:

-High power performances with limited supply voltage level.

-Considerably high output power even with high load values (i.e. 16 Ohm).

With Rl= 8 Ohm, Vs = ±25V the maximum output power obtainable is 150 W, while with Rl=16 Ohm, Vs = ±40V the maximum Pout is 200 W.

APPLICATION NOTE: (ref. fig. 7)

Modular Application (more Devices in Parallel)

The use of the modular application lets very high power be delivered to very low impedance loads. The modular application implies one device to act as a master and the others as slaves.

The slave power stages are driven by the master device and work in parallel all together, while the input and the gain stages of the slave device are disabled, the figure below shows the connections required to configure two devices to work together.

The master chip connections are the same as the normal single ones.

The outputs can be connected together without the need of any ballast resistance.

The slave SGND pin must be tied to the negative supply.

The slave ST-BY and MUTE pins must be connected to the master ST-BY and MUTE pins. The bootstrap lines must be connected together and the bootstrap capacitor must be increased: for N devices the boostrap capacitor must be 22μF times N.

The slave IN-pin must be connected to the negative supply.

THE BOOTSTRAP CAPACITOR

For compatibility purpose with the previous devices of the family, the boostrap capacitor can be connected both between the bootstrap pin (6) and the output pin (14) or between the boostrap pin

(6) and the bootstrap loader pin (12).

When the bootcap is connected between pin 6 and 14, the maximum supply voltage in presence of output signal is limited to 100V, due the bootstrap capacitor overvoltage.

When the bootcap is connected between pins 6 and 12 the maximum supply voltage extend to the full voltage that the technology can stand: 120V.

This is accomplished by the clamp introduced at the bootstrap loader pin (12): this pin follows the output voltage up to 100V and remains clamped at 100V for higher output voltages. This feature lets the output voltage swing up to a gate-source voltage from the positive supply (VS -3 to 6V).