February 1995
MM5452/MM5453 Liquid Crystal Display Drivers
General Description
The MM5452 is a monolithic integrated circuit utilizing CMOS metal gate, low threshold enhancement mode devices. It is available in a 40-pin molded package. The chip can drive up to 32 segments of LCD and can be paralleled to increase this number. The chip is capable of driving a 4 (/2- digit 7-segment display with minimal interface between the display and the data source.
The MM5452 stores display data in latches after it is clocked in, and holds the data until new display data is received.
Features
YSerial data input
YNo load signal required
YDATA ENABLE (MM5452)
YWide power supply operation
YTTL compatibility
Y32 or 33 outputs
YAlphanumeric and bar graph capability
YCascaded operation capability
Applications
YCOPSTM or microprocessor displays
YIndustrial control indicator
YDigital clock, thermometer, counter, voltmeter
YInstrumentation readouts
YRemote displays
Block Diagram
TL/F/6137 ± 1
FIGURE 1
COPSTM is a trademark of National Semiconductor Corp.
Drivers Display Crystal Liquid MM5452/MM5453
C1995 National Semiconductor Corporation |
TL/F/6137 |
RRD-B30M105/Printed in U. S. A. |
Absolute Maximum Ratings
If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications.
Voltage at Any Pin |
VSS to VSS a 10V |
Operating Temperature |
0§C to a70§C |
Storage Temperature |
b65§C to a150§C |
Power Dissipation |
300 mW at a70§C |
|
350 mW at a25§C |
Junction Temperature |
a150§C |
Lead Temperature (Soldering, 10 sec.) |
300§C |
Electrical Characteristics
TA within operating range, VDD e 3.0V to 10V, VSS e 0V, unless otherwise specified
Parameter |
Conditions |
Min |
Typ |
Max |
Units |
|
|
|
|
|
|
Power Supply |
|
3 |
|
10 |
V |
|
|
|
|
|
|
Power Supply Current |
Excluding Outputs |
|
|
|
|
|
OSC e VSS, BP IN @ 32 Hz |
|
|
40 |
mA |
|
VDD e 5V, Open Outputs, No Clock |
|
|
10 |
mA |
Clock Frequency |
|
|
|
500 |
kHz |
|
|
|
|
|
|
Input Voltages |
|
|
|
|
|
Logical `0' Level |
VDD k 4.75 |
b0.3 |
|
0.1 VDD |
V |
|
VDD t 4.75 |
b0.3 |
|
0.8 |
V |
Logical `1' Level |
VDD l 5.25 |
0.8 VDD |
|
VDD |
V |
|
VDD s 5.25 |
2.0 |
|
VDD |
V |
Output Current Levels |
|
|
|
|
|
Segments |
|
|
|
|
|
Sink |
VDD e 3V, VOUT e 0.3V |
|
|
b20 |
mA |
Source |
VDD e 3V, VOUT e VDD b 0.3V |
20 |
|
|
mA |
Backplane |
|
|
|
|
|
Sink |
VDD e 3V, VOUT e 0.3V |
|
|
b320 |
mA |
Source |
VDD e 3V, VOUT e VDD b 0.3V |
320 |
|
|
mA |
Output Offset Voltage |
Segment Load 250 pF |
|
|
g50 |
mV |
|
Backplane Load 8750 pF (Note 1) |
|
|
||
|
|
|
|
|
|
|
|
|
|
|
|
Clock Input Frequency, fC |
(Notes 2 and 3) |
|
|
500 |
kHz |
High Time, th |
|
950 |
|
|
ns |
Low Time, tl |
|
950 |
|
|
ns |
Data Input |
|
|
|
|
|
Set-Up Time, tDS |
|
300 |
|
|
ns |
Hold Time, tDH |
|
300 |
|
|
ns |
Data Enable Input |
|
100 |
|
|
ns |
Set-Up Time, tDES |
|
|
|
||
|
|
|
|
|
Note 1: This parameter is guaranteed (not 100% production tested) over operating temperature and supply voltage ranges. Not to be used in Q.A. testing.
Note 2: AC input waveform for test purpose: tr s 20 ns, tf s 20 ns, f e 500 kHz, 50% g10% duty cycle.
Note 3: Clock input rise and fall times must not exceed 300 ns.
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Connection Diagrams
Dual-In-Line Package |
Dual-In-Line Package |
TL/F/6137 ± 2 |
TL/F/6137 ± 3 |
Top View |
Top View |
FIGURE 2a |
FIGURE 2b |
Plastic Chip Carrier |
Plastic Chip Carrier |
TL/F/6137 ± 11 |
TL/F/6137 ± 12 |
Top View |
Top View |
Order Number MM5452N, MM5453N, |
|
MM5452V or MM5453V |
|
See NS Package Number N40A or V44A |
|
Functional Description
The MM5452 is specifically designed to operate 4 (/2-digit 7- segment displays with minimal interface with the display and the data source. Serial data transfer from the data source to the display driver is accomplished with 2 signals, serial data and clock. Since the MM5452 does not contain a character generator, the formatting of the segment information must be done prior to inputting the data to the MM5452. Using a format of a leading ``1'' followed by the 32 data bits allows data transfer without an additional load signal. The 32 data
bits are latched after the 36th clock is complete, thus providing non-multiplexed, direct drive to the display. Outputs change only if the serial data bits differ from the previous time.
A block diagram is shown in Figure 1. For the MM5452 a DATA ENABLE is used instead of the 33rd output. If the DATA ENABLE signal is not required, the 33rd output can be brought out. This is the MM5453 device.
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