DATA SHEET
MOS FIELD EFFECT TRANSISTOR
μ PA1764
SWITCHING
DUAL N-CHANNEL POWER MOS FET
INDUSTRIAL USE
DESCRIPTION
The μPA1764 is N-channel MOS Field Effect Transistor designed for high current switching applications.
PACKAGE DRAWING (Unit : mm)
8 5
1 : Source 1
2 : Gate 1
7, 8 : Drain 1
FEATURES
∙Dual chip type
∙Low On-state Resistance
RDS(on)1 = 27 mΩ (TYP.) (VGS = 10 V, ID = 3.5 A)
RDS(on)2 = 32 mΩ (TYP.) (VGS = 4.5 V, ID = 3.5 A)
RDS(on)3 = 34 mΩ (TYP.) (VGS = 4.0 V, ID = 3.5 A)
∙Low input capacitance
Ciss = 1300 pF (TYP.)
∙Built-in G-S protection diode
∙Small and surface mount package (Power SOP8)
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3 |
: Source 2 |
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4 |
: Gate 2 |
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5, 6 : Drain 2 |
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1 |
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4 |
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6.0 ±0.3 |
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4.4 |
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MAX.1.8 |
1.44 |
5.37 MAX. |
0.15 |
0.8 |
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+0.10 |
–0.05 |
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MIN. |
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0.5 ±0.2 |
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1.27 |
0.78 MAX. |
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0.10 |
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0.05 |
0.40 –0.05+0.10 |
0.12 M |
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ORDERING INFORMATION
PART NUMBER |
PACKAGE |
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μPA1764G |
Power SOP8 |
EQUIVALENT CIRCUIT |
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(1/2 circuit) |
ABSOLUTE MAXIMUM RATINGS (TA = 25°C, All terminals are connected.)
Drain to Source Voltage |
VDSS |
60 |
V |
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Drain |
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Gate to Source Voltage |
VGSS |
±20 |
V |
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Body |
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Drain Current (DC) |
ID(DC) |
±7 |
A |
Gate |
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Diode |
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Drain Current (pulse) Note1 |
ID(pulse) |
±28 |
A |
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Total Power Dissipation (1 unit) Note2 |
PT |
1.7 |
W |
Gate |
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Total Power Dissipation (2 unit) Note2 |
PT |
2.0 |
W |
Protection |
Source |
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Diode |
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Channel Temperature |
Tch |
150 |
°C |
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Storage Temperature |
Tstg |
–55 to +150 |
°C |
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Single Avalanche Current Note3 |
IAS |
7 |
A |
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Single Avalanche Energy Note3 |
EAS |
98 |
mJ |
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Notes 1. PW ≤ 10 μs, Duty Cycle ≤ 1 % |
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2. Mounted on ceramic substrate of 2000 mm2 x 2.2 mm
3. Starting Tch = 25 °C, R G = 25 Ω, VGS = 20 V → 0 V
Remark The diode connected between the gate and source of the transistor serves as a protector against ESD. When this device actually used, an additional protection circuit is externally required if a voltage exceeding the rated voltage may be applied to this device.
The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for availability and additional information.
Document No. G14329EJ1V0DS00 (1st edition) Date Published January 2000 NS CP(K) Printed in Japan
The mark shows major revised points. |
© |
1999,2000 |
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μ PA1764
ELECTRICAL CHARACTERISTICS (TA = 25 °C, All terminals are connected.)
CHARACTERISTICS |
SYMBOL |
TEST CONDITIONS |
MIN. |
TYP. |
MAX. |
UNIT |
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Drain to Source On-state Resistance |
RDS(on)1 |
VGS = 10 V, ID = 3.5 A |
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27 |
35 |
mΩ |
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RDS(on)2 |
VGS = 4.5 V, ID = 3.5 A |
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32 |
42 |
mΩ |
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RDS(on)3 |
VGS = 4.0 V, ID = 3.5 A |
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34 |
46 |
mΩ |
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Gate to Source Cut-off Voltage |
VGS(off) |
VDS = 10 V, ID = 1 mA |
1.5 |
2.0 |
2.5 |
V |
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Forward Transfer Admittance |
| yfs | |
VDS = 10 V, ID = 3.5 A |
5.0 |
9.0 |
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S |
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Drain Leakage Current |
IDSS |
VDS = 60 V, VGS = 0 V |
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10 |
μA |
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Gate to Source Leakage Current |
IGSS |
VGS = ±20 V, VDS = 0 V |
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±10 |
μA |
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Input Capacitance |
Ciss |
VDS = 10 V |
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1300 |
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pF |
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Output Capacitance |
Coss |
VGS = 0 V |
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230 |
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pF |
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Reverse Transfer Capacitance |
Crss |
f = 1 MHz |
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110 |
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pF |
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Turn-on Delay Time |
td(on) |
ID = 3.5 A |
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15 |
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ns |
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Rise Time |
tr |
VGS(on) = 10 V |
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69 |
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ns |
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Turn-off Delay Time |
td(off) |
VDD = 30 V |
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65 |
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ns |
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RG = 10 Ω |
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Fall Time |
tf |
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27 |
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ns |
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Total Gate Charge |
QG |
ID = 7.0 A |
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29 |
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nC |
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Gate to Source Charge |
QGS |
VDD = 48 V |
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3.6 |
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nC |
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Gate to Drain Charge |
QGD |
VGS = 10 V |
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7.4 |
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nC |
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Body Diode Forward Voltage |
VF(S-D) |
IF = 7.0 A, VGS = 0 V |
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0.84 |
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V |
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Reverse Recovery Time |
trr |
IF = 7.0 A, VGS = 0 V |
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40 |
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ns |
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di/dt = 100 A / μs |
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Reverse Recovery Charge |
Qrr |
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66 |
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nC |
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TEST CIRCUIT 1 AVALANCHE CAPABILITY TEST CIRCUIT 2 SWITCHING TIME
D.U.T. |
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RG = 25 Ω |
L |
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D.U.T. |
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VGS |
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PG. |
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RL |
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90 % |
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VGS |
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VGS(on) |
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50 Ω |
VDD |
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10 % |
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RG |
Wave Form |
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VGS = 20 → 0 V |
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VDD |
0 |
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PG. |
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ID |
90 % |
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90 % |
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BVDSS |
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ID |
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IAS |
VGS |
ID |
0 10 % |
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10 % |
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VDS |
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0 |
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ID |
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Wave Form |
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td(on) |
tr |
td(off) |
tf |
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VDD |
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τ |
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τ = 1 μs |
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ton |
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toff |
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Starting Tch |
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Duty Cycle ≤ 1 % |
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TEST CIRCUIT 3 GATE CHARGE
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D.U.T. |
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IG = 2 mA |
RL |
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PG. |
50 Ω |
VDD |
2 |
Data Sheet G14329EJ1V0DS00 |