NEC UPA1552BH Datasheet

0 (0)
©
1995
DATA SHEET
COMPOUND FIELD EFFECT POWER TRANSISTOR
µ
PA1552B
N-CHANNEL POWER MOS FET ARRAY
SWITCHING USE
The
µ
PA1552B is N-channel Power MOS FET Array
that built in 4 circuits designed, for solenoid, motor and
lamp driver.

FEATURES

4 V driving is possible
Large Current and Low On-state Resistance
ID(DC) = ±5.0 A
R
DS(on)1 0.18 MAX. (VGS = 10 V, ID = 3 A)
RDS(on)2 0.24 MAX. (VGS = 4 V, ID = 3 A)
Low Input Capacitance Ciss = 200 pF TYP.

ORDERING INFORMATION

Type Number Package
µ
PA1552BH 10 Pin SIP
ABSOLUTE MAXIMUM RATINGS (TA = 25 ˚C)
Drain to Source Voltage VDSS
Note 1
60 V
Gate to Source Voltage V
GSS
Note 2
±20 V
Drain Current (DC) ID(DC) ±5.0 A/unit
Drain Current (pulse) ID(pulse)
Note 3
±20 A/unit
Total Power Dissipation P
T1
Note 4
28 W
Total Power Dissipation PT2
Note 5
3.5 W
Channel Temperature TCH 150 ˚C
Storage Temperature T
stg –55 to +150 ˚C
Single Avalanche Current IAS
Note 6
5.0 A
Single Avalanche Energy EAS
Note 6
2.5 mJ
Notes 1. VGS = 0 2. VDS = 0
3. PW 10
µ
s, Duty Cycle 1 % 4.
4 Circuits, T
C
= 25 ˚C
5. 4 Circuits, TA = 25 ˚C 6. Starting TCH = 25 ˚C, V DD = 30 V, VGS = 20 V 0,
RG = 25 , L = 100
µ
H
The diode connected between the gate and source of the transistor serves as a protector against ESD. When this
device is actually used, an additional protection circuit is externally required if a voltage exceeding the rated voltage
may be applied to this device.
Document No. G10599EJ2V0DS00 (2nd edition)
Date Published December 1995 P
Printed in Japan

PACKAGE DIMENSIONS

in millimeters

CONNECTION DIAGRAM

26.8 MAX.
10
2.5
1.4 0.6±0.1
2.54
4.0
10 MIN.
1.4
0.5±0.1
1 1023456789
3
2
1
4
5
6
7
8
9
10
2, 4, 6, 8
3, 5, 7, 9
1, 10
: Gate
: Drain
: Source
ELECTRODE CONNECTION
2
µ
PA1552B
ELECTRICAL CHARACTERISTICS (TA = 25 ˚C)
CHARACTERISTIC SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT
Drain Leakage Current IDSS VDS = 60 V, VGS = 0 10
µ
A
Gate Leakage Current IGSS VGS = ±20 V, VDS = 0 ±10
µ
A
Gate Cutoff Voltage VGS(off) VDS = 10 V, ID = 1.0 mA 1.0 2.0 V
Forward Transfer Admittance | Yfs |VDS = 10 V, ID = 3.0 A 2.4 S
Drain to Source On-State RDS(on)1 VGS = 10 V, ID = 3.0 A 0.09 0.18
Resistance
RDS(on)2 VGS = 4.0 V, ID = 3.0 A 0.12 0.24
Input Capacitance Ciss VDS = 10 V, VGS = 0, f = 1.0 MHz 200 pF
Output Capacitance Coss 150 pF
Reverse Transfer Capacitance Crss 55 pF
Turn-on Delay Time td(on) ID = 3.0 A, VGS = 10 V, VDD = 30 V, 20 ns
Rise Time tr
RL = 10
100 ns
Turn-off Delay Time td(off) 670 ns
Fall Time tf 310 ns
Total Gate Charge QG VGS = 10 V, ID = 5.0 A, VDD = 48 V 13 nC
Gate to Source Charge QGS 2nC
Gate to Drain Charge QGD 4.7 nC
Body Diode Forward Voltage VF(S-D) IF = 5.0 A, VGS = 0 1.0 V
Reverse Recovery Time trr IF = 5.0 A, VGS = 0, di/dt = 50 A/
µ
s 280 ns
Reverse Recovery Charge Qrr 820 nC
Test Circuit 3 Gate Charge
V
GS
= 20 V 0
PG
R
G
= 25
50
D.U.T.
L
V
DD
Test Circuit 1 Avalanche Capability
PG.
R
G
= 10
D.U.T.
R
L
V
DD
Test Circuit 2 Switching Time
R
G
PG.
I
G
= 2 mA
50
D.U.T.
R
L
V
DD
I
D
V
DD
I
AS
V
DS
BV
DSS
Starting T
CH
V
GS
0
t = 1 s
Duty Cycle 1 %
V
GS
Wave Form
I
D
Wave Form
V
GS
I
D
10 %
10 %
0
0
90 %
90 %
90 %
10 %
V
GS (on)
I
D
t
on
t
off
t
d (on)
t
r
t
d (off)
t
f
t
µ
·
·
3
µ
PA1552B
CHARACTERISTICS (TA = 25 ˚C)
FORWARD TRANSFER CHARACTERISTICS
V
GS
- Gate to Source Voltage - V
I
D
- Drain Current - A
0.1
1.0
10
100
0
246
FORWARD BIAS SAFE OPERATING AREA
V
DS
- Drain to Source Voltage - V
I
D
- Drain Current - A
0.1
0.1
1
10
100
1 10 100
T
C
= 25 ˚C
Single Pulse
T
A
- Ambient Temperature - ˚C
P
T
- Total Power Dissipation - W
0
50 100 150
4
2
TOTAL POWER DISSIPATION vs.
AMBIENT TEMPERATURE
4 Circuits operation
Under same
dissipation in
each circuit
2 Circuits operation
3 Circuits operation
1 Circuit operation
1
3
5
T
A
= 125 ˚C
75 ˚C
25 ˚C
-25 ˚C
T
C
- Case Temperature - ˚C
P
T
- Total Power Dissipation - W
0
50 100 150
30
10
TOTAL POWER DISSIPATION vs.
CASE TEMPERATURE
4 Circuits operation
2 Circuits operation
3 Circuits operation
1 Circuit operation
R
DS(on)
Limited(V
GS
= 10 V)
I
D(pulse)
P
W
= 1 ms
10 ms
50 ms
100 ms
DC
I
D(DC)
DRAIN CURRENT vs.
DRAIN TO SOURCE VOLTAGE
V
DS
- Drain to Source Voltage - V
I
D
- Drain Current - A
0
2
3
4
20
1
Pulsed
10
V
GS
= 4 V
V
GS
= 20 V
10 V
DERATING FACTOR OF FORWARD BIAS
SAFE OPERATING AREA
T
C
- Case Temperature - ˚C
dT - Percentage of Rated Power - %
0
20 40 60 80 100 120 140 160
20
40
60
80
100
Pulsed
V
GS
= 10 V
6
20
Under same
dissipation in
each circuit
Lead
Print
Circuit
Boad
NEC
PA1552BH
T
C
is grease
Temperature on back surface
µ
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