NEC MC-4R64CEE6C-845, MC-4R64CEE6B-653, MC-4R64CEE6B-745, MC-4R64CEE6B-845, MC-4R64CEE6C-745 Datasheet

0 (0)

PRELIMINARY DATA SHEET

MOS INTEGRATED CIRCUIT

MC-4R64CEE6B, 4R64CEE6C

Direct RambusTM DRAM RIMMTM Module

64M-BYTE (32M-WORD x 16-BIT)

Description

The Direct Rambus RIMM module is a general-purpose high-performance memory module subsystem suitable for use in a broad range of applications including computer memory, personal computers, workstations, and other applications where high bandwidth and low latency are required.

MC-4R64CEE6B, 4R64CEE6C modules consists of four 128M Direct Rambus DRAM (Direct RDRAM™) devices (μPD488448). These are extremely high-speed CMOS DRAMs organized as 8M words by 16 bits. The use of Rambus Signaling Level (RSL) technology permits 600MHz, 711MHz or 800MHz transfer rates while using conventional system and board design technologies.

Direct RDRAM devices are capable of sustained data transfers at 1.25 ns per two bytes (10 ns per sixteen bytes).

The architecture of the Direct RDRAM enables the highest sustained bandwidth for multiple, simultaneous, randomly addressed memory transactions. The separate control and data buses with independent row and column control yield over 95 % bus efficiency. The Direct RDRAM's 32 banks support up to four simultaneous transactions per device.

Features

184 edge connector pads with 1mm pad spacing

64 MB Direct RDRAM storage

Each RDRAMâ has 32 banks, for 128 banks total on module

Gold plated contacts

RDRAMs use Chip Scale Package (CSP)

Serial Presence Detect support

Operates from a 2.5 V supply

Low power and powerdown self refresh modes

Separate Row and Column buses for higher efficiency

The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version.

Not all devices/types available in every country. Please check with local NEC representative for availability and additional information.

Document No. M14537EJ1V1DS00 (1st edition) Date Published November 1999 NS CP (K) Printed in Japan

The mark shows major revised points.

© 1999

MC-4R64CEE6B, 4R64CEE6C

Order information

Part number

Organization

I/O Freq.

RAS access time

Package

Mounted devices

 

 

MHz

ns

 

 

 

 

 

 

 

 

MC-4R64CEE6B - 845

32M x 16

800

45

184 edge connector pads RIMM

4 pieces of

MC-4R64CEE6B - 745

 

711

45

with heat spreader

μPD488448FB

 

 

 

 

 

FBGA (D2BGATM) package

MC-4R64CEE6B - 653

 

600

53

Edge connector : Gold plated

MC-4R64CEE6C - 845

 

800

45

 

4 pieces of

MC-4R64CEE6C - 745

 

711

45

 

μPD488448FF

MC-4R64CEE6C - 653

 

600

53

 

FBGA (μBGAâ) package

2

Preliminary Data Sheet M14537EJ1V1DS00

NEC MC-4R64CEE6C-845, MC-4R64CEE6B-653, MC-4R64CEE6B-745, MC-4R64CEE6B-845, MC-4R64CEE6C-745 Datasheet

MC-4R64CEE6B, 4R64CEE6C

Module Pad Configuration

B1

GND

B2

LDQA7

B3

GND

B4

LDQA5

B5

GND

B6

LDQA3

B7

GND

B8

LDQA1

B9

GND

B10

LCFM

B11

GND

B12

LCFMN

B13

GND

B14

NC

B15

GND

B16

LROW2

B17

GND

B18

LROW0

B19

GND

B20

LCOL3

B21

GND

B22

LCOL1

B23

GND

B24

LDQB0

B25

GND

B26

LDQB2

B27

GND

B28

LDQB4

B29

GND

B30

LDQB6

B31

GND

B32

LDQB8

B33

GND

B34

LCMD

B35

VCMOS

B36

SIN

B37

VCMOS

B38

NC

B39

GND

B40

NC

B41

VDD

B42

VDD

B43

NC

B44

NC

B45

NC

B46

NC

GND A1 LDQA8 A2

GND A3 LDQA6 A4

GND A5 LDQA4 A6

GND A7 LDQA2 A8

GND A9 LDQA0 A10

GND A11 LCTMN A12 GND A13 LCTM A14 GND A15 NC A16 GND A17 LROW1 A18 GND A19 LCOL4 A20 GND A21 LCOL2 A22 GND A23 LCOL0 A24 GND A25 LDQB1 A26 GND A27 LDQB3 A28 GND A29 LDQB5 A30 GND A31 LDQB7 A32 GND A33 LSCK A34

VCMOS A35 SOUT A36

VCMOS A37 NC A38 GND A39 NC A40

VDD A41

VDD A42 NC A43 NC A44 NC A45 NC A46

 

 

 

 

 

LCFM, LCFMN,

 

Side B

 

 

 

Side A

RCFM, RCFMN : Clock from master

 

 

 

 

 

 

 

 

 

 

LCTM, LCTMN,

 

 

 

 

 

 

RCTM, RCTMN : Clock to master

B47

NC

NC

A47

 

LCMD, RCMD

: Serial Command Pad

 

 

 

 

B48

NC

NC

A48

 

LROW2 - LROW0,

 

B49

NC

NC

A49

 

 

B50

NC

NC

A50

 

RROW2 - RROW0 : Row bus

B51

VREF

VREF

A51

 

B52

GND

GND

A52

 

LCOL4 - LCOL0,

 

B53

SA0

SCL

A53

 

 

B54

VDD

VDD

A54

 

 

 

 

B55

SA1

SDA

A55

 

RCOL4 - RCOL0

: Column bus

B56

SVDD

SVDD

A56

 

B57

SA2

SWP

A57

 

LDQA8 - LDQA0,

 

B58

VDD

VDD

A58

 

 

B59

RCMD

RSCK

A59

 

RDQA8 - RDQA0

: Data bus A

B60

GND

GND

A60

 

B61

RDQB8

RDQB7

A61

 

 

 

 

B62

GND

GND

A62

 

LDQB8 - LDQB0,

 

B63

RDQB6

RDQB5

A63

 

 

B64

GND

GND

A64

 

RDQB8 - RDQB0

: Data bus B

B65

RDQB4

RDQB3

A65

 

B66

GND

GND

A66

 

LSCK, RSCK : Clock input

B67

RDQB2

RDQB1

A67

 

B68

GND

GND

A68

 

 

 

 

B69

RDQB0

RCOL0

A69

 

SA0 - SA2

: Serial Presence Detect Address

B70

GND

GND

A70

 

B71

RCOL1

RCOL2

A71

 

SCL, SDA

: Serial Presence Detect Clock

B72

GND

GND

A72

 

B73

RCOL3

RCOL4

A73

 

SIN, SOUT

: Serial I/O

B74

GND

GND

A74

 

B75

RROW0

RROW1

A75

 

 

 

 

B76

GND

GND

A76

 

SVDD

: SPD Voltage

B77

RROW2

NC

A77

 

B78

GND

GND

A78

 

SWP

: Serial Presence Detect Write Protect

B79

NC

RCTM

A79

 

B80

GND

GND

A80

 

VCMOS

: Supply voltage for serial pads

B81

RCFMN

RCTMN

A81

 

B82

GND

GND

A82

 

 

 

 

B83

RCFM

RDQA0

A83

 

VDD

: Supply voltage

B84

GND

GND

A84

 

B85

RDQA1

RDQA2

A85

 

VREF

: Logic threshold

B86

GND

GND

A86

 

B87

RDQA3

RDQA4

A87

 

GND

: Ground reference

B88

GND

GND

A88

 

B89

RDQA5

RDQA6

A89

 

 

 

 

B90

GND

GND

A90

 

NC

: These pads are not connected

B91

RDQA7

RDQA8

A91

 

B92

GND

GND

A92

 

 

 

 

 

 

 

Preliminary Data Sheet M14537EJ1V1DS00

 

3

MC-4R64CEE6B, 4R64CEE6C

Module Pad Names

Pad

Signal Name

Pad

Signal Name

A1

GND

B1

GND

A2

LDQA8

B2

LDQA7

A3

GND

B3

GND

A4

LDQA6

B4

LDQA5

A5

GND

B5

GND

A6

LDQA4

B6

LDQA3

A7

GND

B7

GND

A8

LDQA2

B8

LDQA1

A9

GND

B9

GND

A10

LDQA0

B10

LCFM

A11

GND

B11

GND

A12

LCTMN

B12

LCFMN

A13

GND

B13

GND

A14

LCTM

B14

NC

A15

GND

B15

GND

A16

NC

B16

LROW2

A17

GND

B17

GND

A18

LROW1

B18

LROW0

A19

GND

B19

GND

A20

LCOL4

B20

LCOL3

A21

GND

B21

GND

A22

LCOL2

B22

LCOL1

A23

GND

B23

GND

A24

LCOL0

B24

LDQB0

A25

GND

B25

GND

A26

LDQB1

B26

LDQB2

A27

GND

B27

GND

A28

LDQB3

B28

LDQB4

A29

GND

B29

GND

A30

LDQB5

B30

LDQB6

A31

GND

B31

GND

A32

LDQB7

B32

LDQB8

A33

GND

B33

GND

A34

LSCK

B34

LCMD

A35

VCMOS

B35

VCMOS

A36

SOUT

B36

SIN

A37

VCMOS

B37

VCMOS

A38

NC

B38

NC

A39

GND

B39

GND

A40

NC

B40

NC

A41

VDD

B41

VDD

A42

VDD

B42

VDD

A43

NC

B43

NC

A44

NC

B44

NC

A45

NC

B45

NC

A46

NC

B46

NC

Pad

Signal Name

Pad

Signal Name

A47

NC

B47

NC

A48

NC

B48

NC

A49

NC

B49

NC

A50

NC

B50

NC

A51

VREF

B51

VREF

A52

GND

B52

GND

A53

SCL

B53

SA0

A54

VDD

B54

VDD

A55

SDA

B55

SA1

A56

SVDD

B56

SVDD

A57

SWP

B57

SA2

A58

VDD

B58

VDD

A59

RSCK

B59

RCMD

A60

GND

B60

GND

A61

RDQB7

B61

RDQB8

A62

GND

B62

GND

A63

RDQB5

B63

RDQB6

A64

GND

B64

GND

A65

RDQB3

B65

RDQB4

A66

GND

B66

GND

A67

RDQB1

B67

RDQB2

A68

GND

B68

GND

A69

RCOL0

B69

RDQB0

A70

GND

B70

GND

A71

RCOL2

B71

RCOL1

A72

GND

B72

GND

A73

RCOL4

B73

RCOL3

A74

GND

B74

GND

A75

RROW1

B75

RROW0

A76

GND

B76

GND

A77

NC

B77

RROW2

A78

GND

B78

GND

A79

RCTM

B79

NC

A80

GND

B80

GND

A81

RCTMN

B81

RCFMN

A82

GND

B82

GND

A83

RDQA0

B83

RCFM

A84

GND

B84

GND

A85

RDQA2

B85

RDQA1

A86

GND

B86

GND

A87

RDQA4

B87

RDQA3

A88

GND

B88

GND

A89

RDQA6

B89

RDQA5

A90

GND

B90

GND

A91

RDQA8

B91

RDQA7

A92

GND

B92

GND

4

Preliminary Data Sheet M14537EJ1V1DS00

 

 

 

 

 

MC-4R64CEE6B, 4R64CEE6C

 

Module Connector Pad Description

(1/2)

 

 

 

 

 

 

 

 

Signal

I/O

Type

 

Description

 

 

 

 

 

 

 

 

GND

Ground reference for RDRAM core and interface. 72 PCB connector pads.

 

 

 

 

 

 

 

 

LCFM

I

RSL

Clock from master. Interface clock used for receiving RSL signals from the

 

 

 

 

 

Channel. Positive polarity.

 

 

LCFMN

I

RSL

Clock from master. Interface clock used for receiving RSL signals from the

 

 

 

 

 

Channel. Negative polarity.

 

 

LCMD

I

VCMOS

Serial Command used to read from and write to the control registers. Also used

 

 

 

 

 

for power management.

 

 

LCOL4..LCOL0

I

RSL

Column bus.

5-bit bus containing control and address information for column

 

 

 

 

 

accesses.

 

 

 

LCTM

I

RSL

Clock to master. Interface clock used for transmitting RSL signals to the

 

 

 

 

 

Channel. Positive polarity.

 

 

LCTMN

I

RSL

Clock to master. Interface clock used for transmitting RSL signals to the

 

 

 

 

 

Channel. Negative polarity.

 

 

LDQA8..LDQA0

I/O

RSL

Data bus A. A 9-bit bus carrying a byte of read or write data between the Channel

 

 

 

 

 

and the RDRAM. LDQA8 is non-functional on modules with x16 RDRAM devices.

 

 

LDQB8..LDQB0

I/O

RSL

Data bus B. A 9-bit bus carrying a byte of read or write data between the Channel

 

 

 

 

 

and the RDRAM. LDQB8 is non-functional on modules with x16 RDRAM devices.

 

 

LROW2..LROW0

I

RSL

Row bus. 3-bit bus containing control and address information for row accesses.

 

 

 

 

 

 

 

 

LSCK

I

VCMOS

Serial clock input. Clock source used to read from and write to the RDRAM

 

 

 

 

 

control registers.

 

 

NC

These pads are not connected. These 24 connector pads are reserved for future

 

 

 

 

 

use.

 

 

 

RCFM

I

RSL

Clock from master. Interface clock used for receiving RSL signals from the

 

 

 

 

 

Channel. Positive polarity.

 

 

RCFMN

I

RSL

Clock from master. Interface clock used for receiving RSL signals from the

 

 

 

 

 

Channel. Negative polarity.

 

 

RCMD

I

VCMOS

Serial Command Input used to read from and write to the control registers. Also

 

 

 

 

 

used for power management.

 

 

RCOL4..RCOL0

I

RSL

Column bus.

5-bit bus containing control and address information for column

 

 

 

 

 

accesses.

 

 

 

RCTM

I

RSL

Clock to master. Interface clock used for transmitting RSL signals to the

 

 

 

 

 

Channel. Positive polarity.

 

 

RCTMN

I

RSL

Clock to master. Interface clock used for transmitting RSL signals to the

 

 

 

 

 

Channel. Negative polarity.

 

 

RDQA8..RDQA0

I/O

RSL

Data bus A. A 9-bit bus carrying a byte of read or write data between the Channel

 

 

 

 

 

and the RDRAM. RDQA8 is non-functional on modules with x16 RDRAM

 

 

 

 

 

devices.

 

 

 

RDQB8..RDQB0

I/O

RSL

Data bus B. A 9-bit bus carrying a byte of read or write data between the Channel

 

 

 

 

 

and the RDRAM. RDQB8 is non-functional on modules with x16 RDRAM

 

 

 

 

 

devices.

 

 

 

RROW2..RROW0

I

RSL

Row bus. 3-bit bus containing control and address information for row accesses.

 

 

 

 

 

 

 

 

Preliminary Data Sheet M14537EJ1V1DS00

5

Loading...
+ 11 hidden pages