PRELIMINARY DATA SHEET
MOS INTEGRATED CIRCUIT
MC-4R128CEE6B, 4R128CEE6C
Direct RambusTM DRAM RIMMTM Module
128M-BYTE (64M-WORD x 16-BIT)
Description
The Direct Rambus RIMM module is a general-purpose high-performance memory module subsystem suitable for use in a broad range of applications including computer memory, personal computers, workstations, and other applications where high bandwidth and low latency are required.
MC-4R128CEE6B, 4R128CEE6C modules consists of eight 128M Direct Rambus DRAM (Direct RDRAM™) devices (μPD488448). These are extremely high-speed CMOS DRAMs organized as 8M words by 16 bits. The use of Rambus Signaling Level (RSL) technology permits 600MHz, 711MHz or 800MHz transfer rates while using conventional system and board design technologies.
Direct RDRAM devices are capable of sustained data transfers at 1.25 ns per two bytes (10 ns per sixteen bytes).
The architecture of the Direct RDRAM enables the highest sustained bandwidth for multiple, simultaneous, randomly addressed memory transactions. The separate control and data buses with independent row and column control yield over 95 % bus efficiency. The Direct RDRAM's 32 banks support up to four simultaneous transactions per device.
Features
∙184 edge connector pads with 1mm pad spacing
∙128 MB Direct RDRAM storage
∙Each RDRAMâ has 32 banks, for 256 banks total on module
∙Gold plated contacts
∙RDRAMs use Chip Scale Package (CSP)
∙Serial Presence Detect support
∙Operates from a 2.5 V supply
∙Low power and powerdown self refresh modes
∙Separate Row and Column buses for higher efficiency
The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for availability and additional information.
Document No. M14539EJ1V1DS00 (1st edition) Date Published November 1999 NS CP (K) Printed in Japan
The mark shows major revised points.
© 1999
MC-4R128CEE6B, 4R128CEE6C
Order information
Part number |
Organization |
I/O Freq. |
RAS access time |
Package |
Mounted devices |
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MHz |
ns |
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MC-4R128CEE6B - 845 |
64M x 16 |
800 |
45 |
184 edge connector pads RIMM |
8 pieces of |
MC-4R128CEE6B - 745 |
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711 |
45 |
with heat spreader |
μPD488448FB |
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FBGA (D2BGATM) package |
MC-4R128CEE6B - 653 |
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600 |
53 |
Edge connector : Gold plated |
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MC-4R128CEE6C - 845 |
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800 |
45 |
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8 pieces of |
MC-4R128CEE6C - 745 |
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711 |
45 |
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μPD488448FF |
MC-4R128CEE6C - 653 |
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600 |
53 |
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FBGA (μBGAâ) package |
2 |
Preliminary Data Sheet M14539EJ1V1DS00 |
MC-4R128CEE6B, 4R128CEE6C
Module Pad Configuration
B1 |
GND |
B2 |
LDQA7 |
B3 |
GND |
B4 |
LDQA5 |
B5 |
GND |
B6 |
LDQA3 |
B7 |
GND |
B8 |
LDQA1 |
B9 |
GND |
B10 |
LCFM |
B11 |
GND |
B12 |
LCFMN |
B13 |
GND |
B14 |
NC |
B15 |
GND |
B16 |
LROW2 |
B17 |
GND |
B18 |
LROW0 |
B19 |
GND |
B20 |
LCOL3 |
B21 |
GND |
B22 |
LCOL1 |
B23 |
GND |
B24 |
LDQB0 |
B25 |
GND |
B26 |
LDQB2 |
B27 |
GND |
B28 |
LDQB4 |
B29 |
GND |
B30 |
LDQB6 |
B31 |
GND |
B32 |
LDQB8 |
B33 |
GND |
B34 |
LCMD |
B35 |
VCMOS |
B36 |
SIN |
B37 |
VCMOS |
B38 |
NC |
B39 |
GND |
B40 |
NC |
B41 |
VDD |
B42 |
VDD |
B43 |
NC |
B44 |
NC |
B45 |
NC |
B46 |
NC |
GND A1 LDQA8 A2
GND A3 LDQA6 A4
GND A5 LDQA4 A6
GND A7 LDQA2 A8
GND A9 LDQA0 A10
GND A11 LCTMN A12 GND A13 LCTM A14 GND A15 NC A16 GND A17 LROW1 A18 GND A19 LCOL4 A20 GND A21 LCOL2 A22 GND A23 LCOL0 A24 GND A25 LDQB1 A26 GND A27 LDQB3 A28 GND A29 LDQB5 A30 GND A31 LDQB7 A32 GND A33 LSCK A34
VCMOS A35 SOUT A36
VCMOS A37 NC A38 GND A39 NC A40
VDD A41
VDD A42 NC A43 NC A44 NC A45 NC A46
Side B |
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LCFM, LCFMN, |
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Side A |
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RCFM, RCFMN : Clock from master |
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LCTM, LCTMN, |
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RCTM, RCTMN : Clock to master |
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B47 |
NC |
NC |
A47 |
LCMD, RCMD |
: Serial Command Pad |
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B48 |
NC |
NC |
A48 |
LROW2 - LROW0, |
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B49 |
NC |
NC |
A49 |
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B50 |
NC |
NC |
A50 |
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B51 |
VREF |
VREF |
A51 |
RROW2 - RROW0 : Row bus |
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B52 |
GND |
GND |
A52 |
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B53 |
SA0 |
SCL |
A53 |
LCOL4 - LCOL0, |
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B54 |
VDD |
VDD |
A54 |
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B55 |
SA1 |
SDA |
A55 |
RCOL4 - RCOL0 |
: Column bus |
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B56 |
SVDD |
SVDD |
A56 |
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B57 |
SA2 |
SWP |
A57 |
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B58 |
VDD |
VDD |
A58 |
LDQA8 - LDQA0, |
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B59 |
RCMD |
RSCK |
A59 |
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B60 |
GND |
GND |
A60 |
RDQA8 - RDQA0 |
: Data bus A |
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B61 |
RDQB8 |
RDQB7 |
A61 |
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B62 |
GND |
GND |
A62 |
LDQB8 - LDQB0, |
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B63 |
RDQB6 |
RDQB5 |
A63 |
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B64 |
GND |
GND |
A64 |
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B65 |
RDQB4 |
RDQB3 |
A65 |
RDQB8 - RDQB0 |
: Data bus B |
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B66 |
GND |
GND |
A66 |
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B67 |
RDQB2 |
RDQB1 |
A67 |
LSCK, RSCK : Clock input |
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B68 |
GND |
GND |
A68 |
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B69 |
RDQB0 |
RCOL0 |
A69 |
SA0 - SA2 |
: Serial Presence Detect Address |
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B70 |
GND |
GND |
A70 |
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B71 |
RCOL1 |
RCOL2 |
A71 |
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B72 |
GND |
GND |
A72 |
SCL, SDA |
: Serial Presence Detect Clock |
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B73 |
RCOL3 |
RCOL4 |
A73 |
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B74 |
GND |
GND |
A74 |
SIN, SOUT |
: Serial I/O |
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B75 |
RROW0 |
RROW1 |
A75 |
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B76 |
GND |
GND |
A76 |
SVDD |
: SPD Voltage |
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B77 |
RROW2 |
NC |
A77 |
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B78 |
GND |
GND |
A78 |
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B79 |
NC |
RCTM |
A79 |
SWP |
: Serial Presence Detect Write Protect |
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B80 |
GND |
GND |
A80 |
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B81 |
RCFMN |
RCTMN |
A81 |
VCMOS |
: Supply voltage for serial pads |
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B82 |
GND |
GND |
A82 |
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B83 |
RCFM |
RDQA0 |
A83 |
VDD |
: Supply voltage |
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B84 |
GND |
GND |
A84 |
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B85 |
RDQA1 |
RDQA2 |
A85 |
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B86 |
GND |
GND |
A86 |
VREF |
: Logic threshold |
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B87 |
RDQA3 |
RDQA4 |
A87 |
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B88 |
GND |
GND |
A88 |
GND |
: Ground reference |
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B89 |
RDQA5 |
RDQA6 |
A89 |
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B90 |
GND |
GND |
A90 |
NC |
: These pads are not connected |
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B91 |
RDQA7 |
RDQA8 |
A91 |
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B92 |
GND |
GND |
A92 |
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Preliminary Data Sheet M14539EJ1V1DS00 |
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3 |
MC-4R128CEE6B, 4R128CEE6C
Module Pad Names
Pad |
Signal Name |
Pad |
Signal Name |
A1 |
GND |
B1 |
GND |
A2 |
LDQA8 |
B2 |
LDQA7 |
A3 |
GND |
B3 |
GND |
A4 |
LDQA6 |
B4 |
LDQA5 |
A5 |
GND |
B5 |
GND |
A6 |
LDQA4 |
B6 |
LDQA3 |
A7 |
GND |
B7 |
GND |
A8 |
LDQA2 |
B8 |
LDQA1 |
A9 |
GND |
B9 |
GND |
A10 |
LDQA0 |
B10 |
LCFM |
A11 |
GND |
B11 |
GND |
A12 |
LCTMN |
B12 |
LCFMN |
A13 |
GND |
B13 |
GND |
A14 |
LCTM |
B14 |
NC |
A15 |
GND |
B15 |
GND |
A16 |
NC |
B16 |
LROW2 |
A17 |
GND |
B17 |
GND |
A18 |
LROW1 |
B18 |
LROW0 |
A19 |
GND |
B19 |
GND |
A20 |
LCOL4 |
B20 |
LCOL3 |
A21 |
GND |
B21 |
GND |
A22 |
LCOL2 |
B22 |
LCOL1 |
A23 |
GND |
B23 |
GND |
A24 |
LCOL0 |
B24 |
LDQB0 |
A25 |
GND |
B25 |
GND |
A26 |
LDQB1 |
B26 |
LDQB2 |
A27 |
GND |
B27 |
GND |
A28 |
LDQB3 |
B28 |
LDQB4 |
A29 |
GND |
B29 |
GND |
A30 |
LDQB5 |
B30 |
LDQB6 |
A31 |
GND |
B31 |
GND |
A32 |
LDQB7 |
B32 |
LDQB8 |
A33 |
GND |
B33 |
GND |
A34 |
LSCK |
B34 |
LCMD |
A35 |
VCMOS |
B35 |
VCMOS |
A36 |
SOUT |
B36 |
SIN |
A37 |
VCMOS |
B37 |
VCMOS |
A38 |
NC |
B38 |
NC |
A39 |
GND |
B39 |
GND |
A40 |
NC |
B40 |
NC |
A41 |
VDD |
B41 |
VDD |
A42 |
VDD |
B42 |
VDD |
A43 |
NC |
B43 |
NC |
A44 |
NC |
B44 |
NC |
A45 |
NC |
B45 |
NC |
A46 |
NC |
B46 |
NC |
Pad |
Signal Name |
Pad |
Signal Name |
A47 |
NC |
B47 |
NC |
A48 |
NC |
B48 |
NC |
A49 |
NC |
B49 |
NC |
A50 |
NC |
B50 |
NC |
A51 |
VREF |
B51 |
VREF |
A52 |
GND |
B52 |
GND |
A53 |
SCL |
B53 |
SA0 |
A54 |
VDD |
B54 |
VDD |
A55 |
SDA |
B55 |
SA1 |
A56 |
SVDD |
B56 |
SVDD |
A57 |
SWP |
B57 |
SA2 |
A58 |
VDD |
B58 |
VDD |
A59 |
RSCK |
B59 |
RCMD |
A60 |
GND |
B60 |
GND |
A61 |
RDQB7 |
B61 |
RDQB8 |
A62 |
GND |
B62 |
GND |
A63 |
RDQB5 |
B63 |
RDQB6 |
A64 |
GND |
B64 |
GND |
A65 |
RDQB3 |
B65 |
RDQB4 |
A66 |
GND |
B66 |
GND |
A67 |
RDQB1 |
B67 |
RDQB2 |
A68 |
GND |
B68 |
GND |
A69 |
RCOL0 |
B69 |
RDQB0 |
A70 |
GND |
B70 |
GND |
A71 |
RCOL2 |
B71 |
RCOL1 |
A72 |
GND |
B72 |
GND |
A73 |
RCOL4 |
B73 |
RCOL3 |
A74 |
GND |
B74 |
GND |
A75 |
RROW1 |
B75 |
RROW0 |
A76 |
GND |
B76 |
GND |
A77 |
NC |
B77 |
RROW2 |
A78 |
GND |
B78 |
GND |
A79 |
RCTM |
B79 |
NC |
A80 |
GND |
B80 |
GND |
A81 |
RCTMN |
B81 |
RCFMN |
A82 |
GND |
B82 |
GND |
A83 |
RDQA0 |
B83 |
RCFM |
A84 |
GND |
B84 |
GND |
A85 |
RDQA2 |
B85 |
RDQA1 |
A86 |
GND |
B86 |
GND |
A87 |
RDQA4 |
B87 |
RDQA3 |
A88 |
GND |
B88 |
GND |
A89 |
RDQA6 |
B89 |
RDQA5 |
A90 |
GND |
B90 |
GND |
A91 |
RDQA8 |
B91 |
RDQA7 |
A92 |
GND |
B92 |
GND |
4 |
Preliminary Data Sheet M14539EJ1V1DS00 |
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MC-4R128CEE6B, 4R128CEE6C |
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Module Connector Pad Description |
(1/2) |
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Signal |
I/O |
Type |
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Description |
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GND |
— |
— |
Ground reference for RDRAM core and interface. 72 PCB connector pads. |
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LCFM |
I |
RSL |
Clock from master. Interface clock used for receiving RSL signals from the |
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Channel. Positive polarity. |
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LCFMN |
I |
RSL |
Clock from master. Interface clock used for receiving RSL signals from the |
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Channel. Negative polarity. |
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LCMD |
I |
VCMOS |
Serial Command used to read from and write to the control registers. Also used |
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for power management. |
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LCOL4..LCOL0 |
I |
RSL |
Column bus. |
5-bit bus containing control and address information for column |
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accesses. |
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LCTM |
I |
RSL |
Clock to master. Interface clock used for transmitting RSL signals to the |
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Channel. Positive polarity. |
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LCTMN |
I |
RSL |
Clock to master. Interface clock used for transmitting RSL signals to the |
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Channel. Negative polarity. |
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LDQA8..LDQA0 |
I/O |
RSL |
Data bus A. A 9-bit bus carrying a byte of read or write data between the Channel |
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and the RDRAM. LDQA8 is non-functional on modules with x16 RDRAM devices. |
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LDQB8..LDQB0 |
I/O |
RSL |
Data bus B. A 9-bit bus carrying a byte of read or write data between the Channel |
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and the RDRAM. LDQB8 is non-functional on modules with x16 RDRAM devices. |
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LROW2..LROW0 |
I |
RSL |
Row bus. 3-bit bus containing control and address information for row accesses. |
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LSCK |
I |
VCMOS |
Serial clock input. Clock source used to read from and write to the RDRAM |
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control registers. |
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NC |
— |
— |
These pads are not connected. These 24 connector pads are reserved for future |
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use. |
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RCFM |
I |
RSL |
Clock from master. Interface clock used for receiving RSL signals from the |
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Channel. Positive polarity. |
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RCFMN |
I |
RSL |
Clock from master. Interface clock used for receiving RSL signals from the |
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Channel. Negative polarity. |
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RCMD |
I |
VCMOS |
Serial Command Input used to read from and write to the control registers. Also |
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used for power management. |
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RCOL4..RCOL0 |
I |
RSL |
Column bus. |
5-bit bus containing control and address information for column |
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accesses. |
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RCTM |
I |
RSL |
Clock to master. Interface clock used for transmitting RSL signals to the |
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Channel. Positive polarity. |
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RCTMN |
I |
RSL |
Clock to master. Interface clock used for transmitting RSL signals to the |
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Channel. Negative polarity. |
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RDQA8..RDQA0 |
I/O |
RSL |
Data bus A. A 9-bit bus carrying a byte of read or write data between the Channel |
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and the RDRAM. RDQA8 is non-functional on modules with x16 RDRAM |
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devices. |
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RDQB8..RDQB0 |
I/O |
RSL |
Data bus B. A 9-bit bus carrying a byte of read or write data between the Channel |
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and the RDRAM. RDQB8 is non-functional on modules with x16 RDRAM |
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devices. |
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RROW2..RROW0 |
I |
RSL |
Row bus. 3-bit bus containing control and address information for row accesses. |
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Preliminary Data Sheet M14539EJ1V1DS00 |
5 |