NEC Electronics Inc UPB1507GV-E1, UPB1507GV, UPB1506GV-E1, UPB1506GV Datasheet

DATA SHEET

BIPOLAR DIGITAL INTEGRATED CIRCUITS

PPB1506GV, PPB1507GV

3GHz INPUT DIVIDE BY 256, 128, 64 PRESCALER IC

FOR ANALOG DBS TUNERS

The PPB1506GV and PPB1507GV are 3.0 GHz input, high division silicon prescaler ICs for analog DBS tuner applications. These ICs divide-by-256, 128 and 64 contribute to produce analog DBS tuners with kit-use of 17 K series DTS controller or standard CMOS PLL synthesizer IC. The PPB1506GV/PPB1507GV are shrink package versions of the PPB586G/588G or PPB1505GR so that these smaller packages contribute to reduce the mounting space replacing from conventional ICs.

The PPB1506GV and PPB1507GV are manufactured using NEC’s high fT NESAT™IV silicon bipolar process. This process uses silicon nitride passivation film and gold electrodes. These materials can protect chip surface from external pollution and prevent corrosion/migration. Thus, these ICs have excellent performance, uniformity and reliability.

FEATURES

x

x

x

x

x

High toggle frequency :

High-density surface mounting :

Low current consumption	:
Selectable high division	:
Pin connection variation	:

fin = 0.5 GHz to 3.0 GHz 8-pin plastic SSOP (175 mil) 5 V, 19 mA

y256, y128, y64

PPB1506GV and PPB1507GV

APPLICATION

These ICs can use as a prescaler between local oscillator and PLL frequency synthesizer included modulus prescaler. For example, following application can be chosen;

xAnalog DBS tuner’s synthesizer

xAnalog CATV converter synthesizer

ORDERING INFORMATION

	PART NUMBER	PACKAGE	MARKING	SUPPLYING FORM
	PPB1506GV-E1	8-pin plastic	1506	Embossed tape 8 mm wide. Pin 1 is in tape pull-out
		SSOP (175 mil)		direction. 1 000 p/reel.
	PPB1507GV-E1		1507

Remarks To order evaluation samples, please contact your local NEC sales office. (Part number for sample order: PPB1506GV, PPB1507GV)

Caution: Electro-static sensitive devices

Document No. P10767EJ3V0DS00 (3rd edition)
Date Published January 1998 N CP(K)
Printed in Japan	©	1996

PPB1506GV, PPB1507GV

PIN CONNECTION (Top View)

					Pin	PPB1506GV			PPB1507GV
	1		8		NO.
					1	SW1				IN
	2		7		2		IN		VCC
					3				SW1
							IN
	3		6
					4	GND			OUT
					5	NC			GND
	4		5
					6	SW2			SW2
					7	OUT			NC
					8	VCC				IN

PRODUCT LINE-UP

Features	Part No.	ICC	fin	VCC	Package	Pin connection
(division, Freq.)		(mA)	(GHz)	(V)
y512, y256, 2.5 GHz	PPB586G	28	0.5 to 2.5	4.5 to 5.5	8 pin SOP 225 mil	NEC original
y128, y64, 2.5 GHz	PPB588G	26	0.5 to 2.5	4.5 to 5.5
y256, y128, y64	PPB1505GR	14	0.5 to 3.0	4.5 to 5.5		Standard
3.0 GHz	PPB1506GV	19	0.5 to 3.0	4.5 to 5.5	8 pin SSOP 175 mil	NEC original
	PPB1507GV	19	0.5 to 3.0	4.5 to 5.5		Standard

Remarks x This table shows the TYP values of main parameters.

CHARACTERISTICS.

x PPB586G and PPB588G are discontinued.

INTERNAL BLOCK DIAGRAM

D Q

D Q

D Q

D Q

D Q

IN

CLK

CLK

CLK

CLK

CLK

IN

CLK

Q

Q

Q

Q

Q

D Q

D Q

D Q

CLK

CLK

CLK

Q

Q

Q

Please refer to ELECTRICAL

OUT

AMP

SW1 SW2

2

PPB1506GV, PPB1507GV

SYSTEM APPLICATION EXAMPLE

RF unit block of Analog DBS tuners

1stIF input

from DBS converter

To 2150 MHz

MIX

BPF

OSC

To 2650 MHz

Baseband output

SAW

AGC amp.

FM demo.

	High division prescaler		CMOS
	μPB1506GV or		PLL
	μ PB1507GV		synthesizer

LPF

loop filter

RF unit block of Analog CATV converter

upconverter

To 800 MHz

BPF

OSC

To 2000 MHz

downconverter

BPF

To 1300 MHz

High division prescaler		CMOS
μPB1506GV or		PLL
μ PB1507GV		synthesizer

LPF

loop filter

3

PPB1506GV, PPB1507GV

PIN EXPLANATION

Applied

Pin

Pin no.

Pin name

voltage

voltage

Functions and explanation

PPB1506GV

PPB1507GV

V

V

IN

•

2.9

Signal input pin. This pin should be coupled to signal

2

1

source with capacitor (e.g. 1 000 pF) for DC cut.

•

IN

2.9

Signal input bypass pin. This pin must be equipped

3

8

with bypass capacitor (e.g. 1 000 pF) to minimize

ground impedance.

GND

0

•

Ground pin. Ground pattern on the board should be

4

5

formed as wide as possible to minimize ground

impedance.

SW1

H/L

•

Divide ratio input pin. The ratio can be determined by

1

3

following applied level to these pins.

SW2

H

L

SW2

SW1

H

y64

y128

6

6

L

y128

y256

These pins should be equipped with bypass capacitor

(e.g. 1 000 pF) to minimize ground impedance.

VCC

4.5 to 5.5

•

Power supply pin. This pin must be equipped with

8

2

bypass capacitor (e.g. 10 000 pF) to minimize ground

impedance.

OUT

•

2.6 to 4.7

Divided frequency output pin. This pin is designed as

7

4

emitter follower output. This pin can be connected to

CMOS input due to 1.2 VP-P MIN output.

NC

•

•

Non connection pin. This pin must be openned.

5

7

4

PPB1506GV, PPB1507GV

ABSOLUTE MAXIMUM RATINGS

PARAMETER	SYMBOL	CONDITION	RATINGS	UNIT
Supply voltage	VCC	TA = +25 qC	ð0.5 to +6.0	V
Input voltage	Vin	TA = +25 qC	ð0.5 to VCC + 0.5	V
Total power dissipation	PD	Mounted on double sided copper clad	250	mW
		50 u 50 u 1.6 mm epoxy glass PWB (TA =
		+85 qC)
Operating ambient temperature	TA		ð40 to +85	qC
Storage temperature	Tstg		ð55 to +150	qC

RECOMMENDED OPERATING CONDITIONS

PARAMETER	SYMBOL	MIN.		TYP.		MAX.		UNIT		NOTICE
Supply voltage	VCC	4.5		5.0		5.5		V
Operating ambient temperature	TA	ð40		+25		+85		qC
ELECTRICAL CHARACTERISTICS (TA = ð40 to +85 qC, VCC = 4.5 to 5.5 V, ZS = 50 :)
PARAMETER	SYMBOL	TEST CONDITION						MIN.	TYP.	MAX.	UNIT
Circuit current	ICC	No signals					12.5		19	26.5	mA
Upper limit operating frequency	fin(u)	Pin = ð15 to +6 dBm					3.0		•	•	GHz
Lower limit operating frequency 1	fin(L)1	Pin = ð10 to +6 dBm						•	•	0.5	GHz
Lower limit operating frequency 2	fin(L)2	Pin = ð15 to +6 dBm						•	•	1.0	GHz
Input power 1	Pin1	fin = 1.0 to 3.0 GHz					ð15		•	+6	dBm
Input power 2	Pin2	fin = 0.5 to 1.0 GHz					ð10		•	+6	dBm
Output Voltage	Vout	CL = 8 pF					1.2		1.6	•	VP-P
Divide ratio control input high	VIH1	Connection in the test						VCC	VCC	VCC
		circuit
Divide ratio control input low	VIL1	Connection in the test					OPEN or		OPEN or	OPEN or
		circuit						GND	GND	GND
Divide ratio control input high	VIH2	Connection in the test						VCC	VCC	VCC
		circuit
Divide ratio control input low	VIL2	Connection in the test					OPEN or		OPEN or	OPEN or
		circuit						GND	GND	GND

5

PPB1506GV, PPB1507GV

TYPICAL CHARACTERISTICS (Unless otherwise specified TA = +25 qC)

ICC - Circuit Current - mA

CIRCUIT CURRENT vs. SUPPLY VOLTAGE

25

No signals

TA = +85°C

20

15

TA = +25°C

TA = –40°C

0

5

0

0

1

2

3

4

5

6

VCC - Supply Voltage - V

Divide by 64 mode

Pin - Input Power - dBm

INPUT POWER vs. INPUT FREQUENCY

INPUT POWER vs. INPUT FREQUENCY

+20	TA = +25°C		+20	VCC = 4.5 to 5.5 V
+10	VCC = 4.5 to 5.5 V		+10	TA = –40°C		TA = +25°C
		- dBm
0	Guaranteed		0		TA = +85°C	Guaranteed
	Operating					Operating
–10	Window	Power	–10			Window
		Input-
–20			–20
–30	VCC = 4.5 to 5.5 V	Pin	–30			TA = +85°C
						TA = +25 °C
–40			–40
					TA = –40°C
–50			–50
–60	1000	4000	–60			1000	4000
100			100
	fin - Input Frequency - MHz				fin - Input Frequency - MHz

Vout - Output Voltage - VP-P

OUTPUT VOLTAGE vs.INPUT FREQUENCY

2.0

TA = +25°C

1.9 Pin = –10 dBm

1.8

VCC = 5.5 V

1.7

1.6	VCC = 5.0 V

1.5

VCC = 4.5 V

1.4

1.3

1.2

100 1000 4000 fin - Input Frequency - MHz

Vout - Output Voltage - VP-P

OUTPUT VOLTAGE vs.INPUT FREQUENCY

2.0

TA = –40°C

1.8 Pin = –10 dBm

VCC = 5.5 V

1.6

1.4 VCC = 5.0 V

1.2

VCC = 4.5 V

1.0

0.8

0.6

0.4

100 1000 4000 fin - Input Frequency - MHz

6