AD7521JD
May 1996
DAC1020/DAC1021/DAC1022
10-Bit Binary Multiplying D/A Converter
DAC1220/DAC1222
12-Bit Binary Multiplying D/A Converter
General Description
The DAC1020 and the DAC1220 are, respectively, 10 and 12-bit binary multiplying digital-to-analog converters. A deposited thin film R-2R resistor ladder divides the reference current and provides the circuit with excellent temperature tracking characteristics (0.0002%/§C linearity error temperature coefficient maximum). The circuit uses CMOS current switches and drive circuitry to achieve low power consumption (30 mW max) and low output leakages (200 nA max). The digital inputs are compatible with DTL/TTL logic levels as well as full CMOS logic level swings. This part, combined with an external amplifier and voltage reference, can be used as a standard D/A converter; however, it is also very attractive for multiplying applications (such as digitally controlled gain blocks) since its linearity error is essentially independent of the voltage reference. All inputs are protected from damage due to static discharge by diode clamps to Va and ground.
This part is available with 10-bit (0.05%), 9-bit (0.10%), and 8-bit (0.20%) non-linearity guaranteed over temperature
(note 1 of electrical characteristics). The DAC1020, DAC1021 and DAC1022 are direct replacements for the 10bit resolution AD7520 and AD7530 and equivalent to the AD7533 family. The DAC1220 and DAC1222 are direct replacements for the 12-bit resolution AD7521 and AD7531 family.
Features
YLinearity specified with zero and full-scale adjust only
YNon-linearity guaranteed over temperature
YIntegrated thin film on CMOS structure
Y10-bit or 12-bit resolution
YLow power dissipation 10 mW @15V typ
YAccepts variable or fixed reference b25VsVREFs25V
Y4-quadrant multiplying capability
YInterfaces directly with DTL, TTL and CMOS
YFast settling timeÐ500 ns typ
YLow feedthrough errorÐ(/2 LSB @100 kHz typ
|
|
|
|
|
|
|
|
|
|
|
|
TL/H/5689 ± 1 |
Ordering Information |
10-BIT D/A CONVERTERS |
|
|
|
|
|
||||||
Temperature Range |
|
|
0§C to 70§C |
|
|
|
|
b40§C to 85§C |
||||
Non- |
0.05% |
|
DAC1020LCN |
|
AD7520LN,AD7530LN |
|
DAC1020LCV |
|
DAC1020LIV |
|||
0.10% |
|
DAC1021LCN |
|
AD7520KN,AD7530KN |
|
|
|
|
|
|||
Linearity |
|
|
|
|
|
|
|
|||||
0.20% |
|
DAC1022LCN |
|
AD7520JN,AD7530JN |
|
|
|
|
|
|||
|
|
|
|
|
|
|
|
|
||||
Package Outline |
|
|
N16A |
|
|
|
V20A |
|||||
|
|
|
|
|
12-BIT D/A CONVERTERS |
|
|
|
|
|
||
Temperature Range |
|
0§C to 70§C |
|
|
b40§C to a85§C |
|||||||
Non- |
|
0.05% |
|
DAC1220LCN |
|
AD7521LN,AD7531LN |
|
DAC1220LCJ |
|
AD7521LD,AD7531LD |
||
Linearity |
|
0.20% |
|
DAC1222LCN |
|
AD7521JN,AD7531JN |
|
DAC1222LCJ |
|
AD7521JD,AD7531JD |
||
|
|
|
|
|
|
|||||||
Package Outline |
|
|
N18A |
|
|
|
J18A |
Note. Devices may be ordered by either part number.
Binary Bit-12 DAC1220/DAC1222 |
-10 DAC1020/DAC1021/DAC1022 |
Converter D/A Multiplying |
D/A Multiplying Binary Bit |
|
Converter |
C1996 National Semiconductor Corporation |
TL/H/5689 |
RRD-B30M96/Printed in U. S. A. |
http://www.national.com |
Absolute Maximum Ratings (Note 5)
If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications.
Va to Gnd |
17V |
VREF to Gnd |
g25V |
Digital Input Voltage Range |
Va to Gnd |
DC Voltage at Pin 1 or Pin 2 (Note 3) |
b100 mV to Va |
Storage Temperature Range |
b65§C to a150§C |
Lead Temperature (Soldering, 10 sec.) |
260§C |
Dual-In-Line Package (plastic) |
|
Dual-In-Line Package (ceramic) |
300§C |
Operating Ratings
|
Min |
Max |
Units |
Temperature (TA) |
|
|
|
DAC1020LIV, DAC1220LCJ, |
|
|
|
DAC1222LCJ |
b40 |
a85 |
§C |
DAC1020LCN, DAC1020LCV, |
|
|
|
DAC1021LCN |
0 |
a70 |
§C |
DAC1022LCN, DAC1220LCN |
0 |
a70 |
§C |
DAC1222LCN |
0 |
a70 |
§C |
ESD Susceptibility (Note 4) |
800V |
|
|
|
|
|
|
||
Electrical Characteristics (Va e 15V, VREF e 10.000V, TA e 25§C unless otherwise specified) |
|
||||||||
|
|
|
DAC1020, DAC1021, |
DAC1220, DAC1222 |
|
||||
Parameter |
Conditions |
|
|
DAC1022 |
Units |
||||
|
|
|
|
|
|||||
|
|
|
|
|
|
|
|
|
|
|
|
|
Min |
Typ |
Max |
Min |
Typ |
Max |
|
|
|
|
|
|
|
|
|
|
|
Resolution |
|
|
10 |
|
|
12 |
|
|
Bits |
|
|
|
|
|
|
|
|
|
|
Linearity Error |
TMINkTAkTMAX, |
|
|
|
|
|
|
|
|
|
b10VkVREFka10V, |
|
|
|
|
|
|
|
|
|
(Note 1) End Point Adjustment Only |
|
|
|
|
|
|
|
|
|
(See Linearity Error in Definition of Terms) |
|
|
|
|
|
|
|
|
10-Bit Parts |
DAC1020, DAC1220 |
|
|
|
0.05 |
|
|
0.05 |
% FSR |
9-Bit Parts |
DAC1021 |
|
|
|
0.10 |
|
|
0.10 |
% FSR |
8-Bit Parts |
DAC1022, DAC1222 |
|
|
|
0.20 |
|
|
0.20 |
% FSR |
|
|
|
|
|
|
|
|
|
|
Linearity Error Tempco |
b10VsVREFsa10V, |
|
|
|
0.0002 |
|
|
0.0002 |
% FS/§C |
|
(Notes 1 and 2) |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Full-Scale Error |
b10VsVREFsa10V, |
|
|
0.3 |
1.0 |
|
0.3 |
1.0 |
% FS |
|
(Notes 1 and 2) |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Full-Scale Error Tempco |
TMINkTAkTMAX, |
|
|
|
0.001 |
|
|
0.001 |
% FS/§C |
|
(Note 2) |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Output Leakage Current |
TMINsTAsTMAX |
|
|
|
|
|
|
|
|
IOUT 1 |
All Digital Inputs Low |
|
|
|
200 |
|
|
200 |
nA |
IOUT 2 |
All Digital Inputs High |
|
|
|
200 |
|
|
200 |
nA |
Power Supply Sensitivity |
All Digital Inputs High, |
|
|
0.005 |
|
|
0.005 |
|
% FS/V |
|
14VsVas16V, (Note 2), |
|
|
|
|
|
|
|
|
|
(Figure 2) |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
VREF Input Resistance |
|
|
10 |
15 |
20 |
10 |
15 |
20 |
kX |
Full-Scale Current Settling |
RLe 100X from 0 to 99. 95% |
|
|
|
|
|
|
|
|
Time |
FS |
|
|
|
|
|
|
|
|
|
All Digital Inputs Switched |
|
|
500 |
|
|
500 |
|
ns |
|
Simultaneously |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
VREF Feedthrough |
All Digital Inputs Low, |
|
|
|
10 |
|
|
10 |
mVp-p |
|
VREFe20 Vp-p @ 100 kHz |
|
|
|
|
|
|
|
|
|
J Package (Note 4) |
|
|
6 |
9 |
|
6 |
9 |
mVp-p |
|
N Package |
|
|
2 |
5 |
|
2 |
5 |
mVp-p |
|
|
|
|
|
|
|
|
|
|
Output Capacitance |
|
|
|
|
|
|
|
|
|
IOUT 1 |
All Digital Inputs Low |
|
|
40 |
|
|
40 |
|
pF |
|
All Digital Inputs High |
|
|
200 |
|
|
200 |
|
pF |
IOUT 2 |
All Digital Inputs Low |
|
|
200 |
|
|
200 |
|
pF |
|
All Digital Inputs High |
|
|
40 |
|
|
40 |
|
pF |
http://www.national.com |
2 |
Electrical Characteristics (Va e 15V, VREF e 10.000V, TA e 25§C unless otherwise specified) (Continued)
|
|
DAC1020, DAC1021, |
DAC1220, DAC1222 |
|
|||||
Parameter |
Conditions |
|
DAC1022 |
|
Units |
||||
|
|
|
|
|
|||||
|
|
|
|
|
|
|
|
|
|
|
|
Min |
Typ |
|
Max |
Min |
Typ |
Max |
|
|
|
|
|
|
|
|
|
|
|
Digital Input |
(Figure 1) |
|
|
|
|
|
|
|
|
Low Threshold |
TMINkTAkTMAX |
|
|
|
0.8 |
|
|
0.8 |
V |
High Threshold |
TMINkTAkTMAX |
2.4 |
|
|
|
2.4 |
|
|
V |
Digital Input Current |
TMINsTAsTMAX |
|
|
|
|
|
|
|
|
|
Digital Input High |
|
1 |
|
100 |
|
1 |
100 |
mA |
|
Digital Input Low |
|
b50 |
|
b200 |
|
b50 |
b200 |
mA |
Supply Current |
All Digital Inputs High |
|
0.2 |
|
1.6 |
|
0.2 |
1.6 |
mA |
|
All Digital Inputs Low |
|
0.6 |
|
2 |
|
0.6 |
2 |
mA |
|
|
|
|
|
|
|
|
|
|
Operating Power Supply |
(Figures 1 and 2) |
5 |
|
|
15 |
5 |
|
15 |
V |
Range |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Note 1: VREFeg10V and VREFeg1V. A linearity error temperature coefficient of 0.0002% FS for a 45§C rise only guarantees 0.009% maximum change in linearity error. For instance, if the linearity error at 25§C is 0.045% FS it could increase to 0.054% at 70§C and the DAC will be no longer a 10-bit part. Note, however, that the linearity error is specified over the device full temperature range which is a more stringent specification since it includes the linearity error temperature coefficient.
Note 2: Using internal feedback resistor as shown in Figure 3 .
Note 3: Both IOUT 1 and IOUT 2 must go to ground or the virtual ground of an operational amplifier. If VREFe10V, every millivolt offset between IOUT 1 or IOUT 2, 0.005% linearity error will be introduced.
Note 4: Human body model, 100 pF discharged through a 1.5 kX resistor.
Note 5: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. DC and AC electrical specifications do not apply when operating the device beyond its specified operating conditions.
Note 6: The maximum power dissipation must be derated at elevated temperatures and is dictated by TJMAX, iJA, and the ambient temepature, TA. The maximum allowable power dissipation at any temperature is PD e (TJMAX b TA)/iJA or the number given in the Absolute Maximum Ratings, whichever is lower. For this
device, TJMAX e 125§C, and the typical junction-to-ambient thermal resistance of the J18 package when board mounted is 85§C/W. For the N18 package, iJA is 120§C/W, for the N16 this number is 125§C/W, and for the V20 this number is 95§C/W.
Typical Performance Characteristics
TL/H/5689 ± 2
FIGURE 1. Digital Input Threshold vs |
FIGURE 2. Gain Error Variation vs Va |
Ambient Temperature |
|
3 |
http://www.national.com |
Typical Applications
The following applications are also valid for 12-bit systems using the DAC1220 and 2 additional digital inputs.
Operational Amplifier Bias Current (Figure 3 )
The op amp bias current, Ib, flows through the 15k internal feedback resistor. BI-FET op amps have low Ib and, therefore, the 15k c Ib error they introduce is negligible; they are strongly recommended for the DAC1020 applications.
VOS Considerations
The output impedance, ROUT, of the DAC is modulated by the digital input code which causes a modulation of the op-
erational amplifier output offset. It is therefore recommend-
ed to adjust the op amp VOS. ROUT is E15k if more than 4 digital inputs are high; ROUT is E45k if a single digital input
is high, and ROUT approaches infinity if all inputs are low.
Operational Amplifier VOS Adjust (Figure 3 )
Connect all digital inputs, A1 ± A10, to ground and adjust the potentiometer to bring the op amp VOUT pin to within g1 mV from ground potential. If VREF is less than 10V, a finer VOS adjustment is required. It is helpful to increase the resolution of the VOS adjust procedure by connecting a 1 kX resistor between the inverting input of the op amp to ground. After VOS has been adjusted, remove the 1 kX.
Full-Scale Adjust (Figure 4 )
Switch high all the digital inputs, A1 ± A10, and measure the op amp output voltage. Use a 500X potentiometer, as
shown, to bring llVOUTll to a voltage equal to VREF c 1023/1024.
SELECTING AND COMPENSATING THE OPERATIONAL AMPLIFIER
Op Amp Family |
CF |
Ri |
P |
VW |
Circuit Settling |
Circuit Small |
|
Time, ts |
Signal BW |
||||||
|
|
|
|
|
|||
LF357 |
10 pF |
2.4k |
25k |
Va |
1.5 ms |
1M |
|
LF356 |
22 pF |
% |
25k |
Va |
3 ms |
0.5M |
|
LF351 |
24 pF |
% |
10k |
Vb |
4 ms |
0.5M |
|
LM741 |
0 |
% |
10k |
Vb |
40 ms |
200 kHz |
|
|
|
|
|
|
|
|
|
|
|
|
TL/H/5689 ± 3 |
A1 |
|
A2 |
|
A3 |
|
A10 |
|
|||||
VOUT e bVREF # |
|
|
a |
|
|
a |
|
|
a # # # |
|
J |
|
2 |
4 |
|
8 |
|
1024 |
|
||||||
b10V s VREF s 10V |
|
|
|
|
|
|
|
|
|
0 s VOUT s b 1023 VREF
1024
where AN e 1 if the AN digital input is high AN e 0 if the AN digital input is low
FIGURE 3. Basic Connection: Unipolar or 2-Quadrant Multiplying
Configuration (Digital Attenuator)
http://www.national.com |
4 |
Typical Applications (Continued)
FIGURE |
Gain) |
|
A1 |
|
|
A2 |
|
|
A3 |
|
|
A10 |
|
|
|
|
|
|
|
|
|
|
|
|
TL/H/5689 ± 4 |
||||||
VOUT 1 e bVREF # |
|
|
|
a |
|
|
|
a |
|
|
|
a # # # |
|
|
J |
|
|
|
|
|
|
|
|
|
|||||
2 |
|
|
4 |
|
|
8 |
|
1024 |
|
|
|
|
|
|
|
|
|
|
|||||||||||
A1 |
A2 |
|
|
A3 |
|
|
|
A10 |
|
B1 |
|
B2 |
|
B3 |
|
B10 |
|
||||||||||||
VOUT2 e VREF # |
|
a |
|
|
a |
|
|
a |
# # # |
|
J |
c # |
|
|
a |
|
|
a |
|
|
a # # # |
|
J |
|
|||||
2 |
4 |
|
8 |
|
1024 |
2 |
4 |
|
8 |
|
1024 |
|
where VREF can be an AC signal
FIGURE 6. Precision Analog-to-Digital Multiplier
5 |
http://www.national.com |