National Semiconductor ADC08131, ADC08134, ADC08138 Technical data

0 (0)
+2.5V ±1.5% (Max)
8 Bits
8 µs (Max)
20 mW (Max)
5 VDC (±5%)
±1¤2 LSB and ±1 LSB
±1¤2 LSB

ADC08131

June 1999

ADC08131/ADC08134/ADC08138

8-Bit High-Speed Serial I/O A/D Converters with Multiplexer Options, Voltage Reference, and Track/Hold

Function

General Description

The ADC08131/ADC08134/ADC08138 are 8-bit successive approximation A/D converters with serial I/O and configurable input multiplexers with up to 8 channels. The serial I/O is configured to comply with the NSC MICROWIREserial data exchange standard for easy interface to the COPSfamily of controllers, and can easily interface with standard shift registers or microprocessors.

All three devices provide a 2.5V band-gap derived reference with guaranteed performance over temperature.

A track/hold function allows the analog voltage at the positive input to vary during the actual A/D conversion.

The analog inputs can be configured to operate in various combinations of single-ended, differential, or pseudo-differential modes. In addition, input voltage spans as small as 1V can be accommodated.

Applications

nDigitizing automotive sensors

nProcess control/monitoring

nRemote sensing in noisy environments

nEmbedded diagnostics

Features

nSerial digital data link requires few I/O pins

nAnalog input track/hold function

n4- or 8-channel input multiplexer options with address logic

nOn-chip 2.5V band-gap reference (±2% over temperature guaranteed)

nNo zero or full scale adjustment required

nTTL/CMOS input/output compatible

n0V to 5V analog input range with single 5V power supply

Key Specifications

n Resolution

n Conversion time (fC = 1 MHz) n Power dissipation

n Single supply

n Total unadjusted error

n Linearity Error (VREF = 2.5V)

n No missing codes (over temperature) n On-board Reference

Ordering Information

Industrial

Package

(−40ÊC TA +85ÊC)

 

ADC08131CIWM

M14B

 

 

ADC08134CIWM

M14B

 

 

ADC08138CIWM

M20B

 

 

TRI-STATE® is a registered trademark of National Semiconductor Corporation.

COPSmicrocontrollers and MICROWIREare trademarks of National Semiconductor Corporation.

and Reference, Voltage Options,

ADC08131/ADC08134/ADC08138

Function Track/Hold

Serial Speed-High Bit-8

 

Multiplexer with Converters A/D I/O

© 1999 National Semiconductor Corporation

DS010749

www.national.com

Connection Diagrams

ADC08138CIWM

Small Outline

Packages

DS010749-2

ADC08134CIWM

Small Outline

Packages

DS010749-3

ADC08131CIWM

Small Outline Package

DS010749-4

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2

Absolute Maximum Ratings (Notes 1, 3)

If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications.

Supply Voltage (VCC)

6.5V

Voltage at Inputs and Outputs

−0.3V to V CC + 0.3V

Input Current at Any Pin (Note 4)

±5 mA

Package Input Current (Note 4)

±20 mA

Power Dissipation at TA = 25ÊC

800 mW

(Note 5)

ESD Susceptibility (Note 6)

1500V

Soldering Information

 

N Package (10 sec.)

 

SO Package:

260ÊC

Vapor Phase (60 sec.)

215ÊC

Infrared (15 sec.) (Note 7)

220ÊC

Storage Temperature

−65ÊC to +150ÊC

Operating Ratings (Notes 2, 3)

Temperature Range

TMIN TA TMAX

 

−40ÊC TA +85ÊC

Supply Voltage (VCC)

4.5 VDC to 6.3 VDC

Electrical Characteristics

The following specifications apply for VCC = +5 VDC, VREF = +2.5 VDC and fCLK = 1 MHz unless otherwise specified. Boldface limits apply for TA = TJ = TMIN to TMAX; all other limits TA = TJ = 25ÊC.

Symbol

Parameter

Conditions

Typical

Limits

Units

(Note 8)

(Note 9)

(Limits)

 

 

 

 

 

 

 

 

 

 

 

 

CONVERTER AND MULTIPLEXER CHARACTERISTICS

 

 

 

 

 

 

 

 

 

 

 

Linearity Error

VREF = +2.5 VDC

 

± 1

LSB (max)

 

Full Scale Error

VREF = +2.5 VDC

 

± 1

LSB (max)

 

Zero Error

VREF = +2.5 VDC

 

± 1

LSB (max)

 

Total Unadjusted Error

VREF = +5 VDC

 

± 1

LSB (max)

 

(Note 10)

 

 

 

 

 

 

 

 

 

 

 

 

 

Differential Linearity

VREF = +2.5 VDC

 

8

Bits (min)

 

 

 

 

 

3.5

 

kΩ

RREF

Reference Input Resistance

(Note 11)

 

1.3

kΩ (min)

 

 

 

 

 

 

6.0

kΩ (max)

 

 

 

 

 

 

 

 

VIN

Analog Input Voltage

(Note 12)

 

(VCC + 0.05)

V (max)

 

(GND − 0.05)

V (min)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

DC Common-Mode Error

VREF

=

2.5 VDC

 

±1 2

LSB (max)

 

 

 

¤

 

Power Supply Sensitivity

VCC = +5V ±5%,

 

± 1¤4

LSB (max)

 

VREF = +2.5 VDC

 

 

 

 

 

 

 

 

On Channel = 5V,

 

0.2

µA (max)

 

On Channel Leakage Current

Off Channel = 0V

 

1

 

 

 

 

(Note 13)

On Channel = 0V,

 

−0.2

µA (max)

 

 

Off Channel = 5V

 

−1

 

 

 

 

 

 

 

 

 

 

 

 

On Channel = 5V,

 

−0.2

µA (max)

 

Off Channel Leakage Current

Off Channel = 0V

 

−1

 

 

 

 

(Note 13)

On Channel = 0V,

 

0.2

µA (max)

 

 

Off Channel = 5V

 

1

 

 

 

 

 

 

 

 

 

 

 

 

DIGITAL AND DC CHARACTERISTICS

 

 

 

 

 

 

 

 

 

 

 

 

VIN(1)

Logical ª1º Input Voltage

VCC = 5.25V

 

2.0

V (min)

VIN(0)

Logical ª0º Input Voltage

VCC = 4.75V

 

0.8

V (max)

IIN(1)

Logical ª1º Input Current

VIN = 5.0V

 

1

µA (max)

IIN(0)

Logical ª0º Input Current

VIN = 0V

 

−1

µA (max)

 

 

VCC = 4.75V:

 

 

 

VOUT(1)

Logical ª1º Output Voltage

OUTI = −360 µA

 

2.4

V (min)

 

 

IOUT = −10 µA

 

4.5

V (min)

VOUT(0)

Logical ª0º Output Voltage

VCC = 4.75V

 

0.4

V (max)

IOUT = 1.6 mA

 

 

 

 

 

 

 

 

IOUT

TRI-STATE® Output Current

VOUT = 0V

 

−3.0

µA (max)

VOUT = 5V

 

3.0

µA (max)

ISOURCE

Output Source Current

VOUT = 0V

 

−6.5

mA (min)

3

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Electrical Characteristics (Continued)

The following specifications apply for VCC = +5 VDC, VREF = +2.5 VDC and fCLK = 1 MHz unless otherwise specified. Boldface limits apply for TA = TJ = TMIN to TMAX; all other limits TA = TJ = 25ÊC.

Symbol

Parameter

 

 

Conditions

Typical

Limits

Units

 

 

(Note 8)

(Note 9)

(Limits)

 

 

 

 

 

 

 

 

 

 

 

 

 

DIGITAL AND DC CHARACTERISTICS

 

 

 

 

 

 

 

 

 

 

 

 

 

 

ISINK

Output Sink Current

 

VOUT = VCC

 

8.0

mA (min)

 

Supply Current

 

 

 

 

 

 

ICC

ADC08134, ADC08138

 

 

= HIGH

 

3.0

mA (max)

 

CS

 

 

ADC08131 (Note 16)

 

 

 

 

6.0

mA (max)

 

 

 

 

 

 

 

 

Electrical Characteristics

The following specifications apply for VCC = +5 VDC, and fCLK = 1 MHz unless otherwise specified. Boldface limits apply for TA = TJ = TMIN to TMAX; all other limits TA = TJ = 25ÊC.

Symbol

Parameter

Conditions

Typical

Limits

Units

(Note 8)

(Note 9)

(Limits)

 

 

 

 

 

 

 

 

 

 

REFERENCE CHARACTERISTICS

 

 

 

 

 

 

 

 

 

 

 

VREFOUT

Output Voltage

DC08134, ADC08138

2.5

2.5 ±1.5%

V

± 2%

 

 

 

 

 

 

 

 

 

 

 

 

 

VREF/

T

Temperature Coefficient

 

40

 

ppm/ÊC

 

 

 

Sourcing

 

 

 

 

 

 

(0 IL +4 mA)

0.003

0.1

 

 

 

 

ADC08134,

 

 

 

 

 

 

 

 

 

 

ADC08138

 

 

 

 

 

 

 

 

 

 

 

 

 

Sourcing

 

 

 

 

 

 

(0 IL +2 mA)

0.003

0.1

 

VREF/

IL

Load Regulation (Note 17)

ADC08131

 

 

%/mA

Sinking

 

 

(max)

 

 

 

 

 

 

 

 

(−1 IL 0 mA)

0.2

0.5

 

 

 

 

ADC08134,

 

 

 

 

 

 

 

 

 

 

ADC08138

 

 

 

 

 

 

 

 

 

 

 

 

 

Sinking

 

 

 

 

 

 

(−1 IL 0 mA)

0.2

0.5

 

 

 

 

ADC08131

 

 

 

 

 

 

 

 

 

 

 

 

Line Regulation

4.75V VCC 5.25V

0.5

6

mV (max)

 

 

 

VREF = 0V

 

 

 

 

 

 

ADC08134,

8

25

mA

ISC

 

Short Circuit Current

ADC08138

 

 

 

 

 

(max)

 

 

 

VREF = 0V

8

25

 

 

 

 

 

 

 

ADC08131

 

 

 

 

 

 

 

 

 

 

 

 

 

 

TSU

 

Start-Up Time

VCC: 0V 5V

20

 

ms

 

CL = 100 µF

 

 

 

 

 

 

 

VREF/

t

Long Term Stability

 

200

 

ppm/1 kHr

Electrical Characteristics

The following specifications apply for VCC = +5 VDC, VREF = +2.5 VDC and tr = tf = 20 ns unless otherwise specified. Boldface limits apply for TA = TJ = TMIN to TMAX; all other limits TA = TJ = 25ÊC.

Symbol

Parameter

Conditions

Typical

Limits

Units

(Note 8)

(Note 9)

(Limits)

 

 

 

 

 

 

 

 

 

fCLK

Clock Frequency

 

10

 

kHz (min)

 

 

1

MHz (max)

 

 

 

 

 

 

 

 

 

 

 

Clock Duty Cycle

 

 

40

% (min)

 

(Note 14)

 

 

60

% (max)

 

 

 

 

 

 

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4

Electrical Characteristics (Continued)

The following specifications apply for VCC = +5 VDC, VREF = +2.5 VDC and tr = tf = 20 ns unless otherwise specified. Boldface limits apply for TA = TJ = TMIN to TMAX; all other limits TA = TJ = 25ÊC.

Symbol

 

 

 

 

Parameter

Conditions

Typical

Limits

Units

 

 

 

 

(Note 8)

(Note 9)

(Limits)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

TC

 

Conversion Time (Not Including

fCLK = 1 MHz

 

 

8

1/fCLK (max)

MUX Addressing Time)

 

 

8

µs (max)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

tCA

 

Acquisition Time

 

 

 

1¤2

1/fCLK (max)

tSELECT

 

 

 

 

 

 

 

 

 

 

 

CLK High while

CS

is High

 

 

50

 

ns

 

 

 

 

 

 

 

 

 

 

tSET-UP

 

CS

Falling Edge or Data Input

 

 

 

25

ns (min)

Valid to CLK Rising Edge

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

tHOLD

 

Data Input Valid after CLK Rising

 

 

 

20

ns (min)

 

Edge

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

CLK Falling Edge to Output Data

CL = 100 pF:

 

 

 

 

tpd1, tpd0

 

Data MSB First

 

 

250

ns (max)

 

Valid (Note 15)

 

 

 

 

Data LSB First

 

 

200

ns (max)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

TRI-STATE Delay from Rising Edge

CL = 10 pF, RL

= 10 kΩ

50

 

ns

t1H, t0H

 

 

 

 

 

 

 

 

 

 

 

of CS to Data Output and SARS

(see TRI-STATE Test Circuits)

 

 

 

 

 

 

 

Hi-Z

CL = 100 pF, RL = 2 kΩ

 

180

ns (max)

CIN

 

Capacitance of Logic Inputs

 

 

5

 

pF

COUT

 

Capacitance of Logic Outputs

 

 

5

 

pF

Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur.

Note 2: Operating Ratings indicate conditions for which the device is functional. These ratings do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test conditions.

Note 3: All voltages are measured with respect to AGND = DGND = 0 VDC, unless otherwise specified.

Note 4: When the input voltage (VIN) at any pin exceeds the power supplies (VIN < (AGND or DGND) or VIN > AVCC) the current at that pin should be limited to 5 mA. The 20 mA maximum package input current rating limits the number of pins that can safely exceed the power supplies with an input current of 5 mA to four pins.

Note 5: The maximum power dissipation must be derated at elevated temperatures and is dictated by TJMAX, qJA and the ambient temperature, TA. The maximum allowable power dissipation at any temperature is PD = (TJMAX − T A)/qJA or the number given in the Absolute Maximum Ratings, whichever is lower. For these devices TJMAX = 125ÊC. The typical thermal resistances (qJA) of these parts when board mounted for the ADC 08131 and the ADC08134 is 140ÊC/W and 91ÊC/W for the ADC08138.

Note 6: Human body model, 100 pF capacitor discharged through a 1.5 kW resistor.

Note 7: See AN450 ªSurface Mounting Methods and Their Effect on Product Reliabilityº or Linear Data Book section ªSurface Mountº for other methods of soldering surface mount devices.

Note 8: Typicals are at TJ = 25ÊC and represent the most likely parametric norm.

Note 9: Guaranteed to National's AOQL (Average Outgoing Quality Level).

Note 10: Total unadjusted error includes zero, full-scale, linearity, and multiplexer error. Total unadjusted error with VREF = +5V only applies to the ADC08134 and ADC08138. See (Note 16).

Note 11: Cannot be tested for the ADC08131.

Note 12: For VIN(−) ³ VIN(+) the digital code will be 0000 0000. Two on-chip diodes are tied to each analog input (see Block Diagram) which will forward-conduct for analog input voltages one diode drop below ground or one diode drop greater than VCC supply. During testing at low VCC levels (e.g., 4.5V), high level analog inputs

(e.g., 5V) can cause an input diode to conduct, especially at elevated temperatures. This will cause errors for analog inputs near full-scale. The specification allows 50 mV forward bias of either diode; this means that as long as the analog VIN does not exceed the supply voltage by more than 50 mV, the output code will be correct. Exceeding this range on an unselected channel will corrupt the reading of a selected channel. Achievement of an absolute 0 VDC to 5 VDC input voltage range will therefore require a minimum supply voltage of 4.950 VDC over temperature variations, initial tolerance and loading.

Note 13: Channel leakage current is measured after a single-ended channel is selected and the clock is turned off. For off channel leakage current the following two cases are considered: one, with the selected channel tied high (5 VDC) and the remaining seven off channels tied low (0 VDC), total current flow through the off channels is measured; two, with the selected channel tied low and the off channels tied high, total current flow through the off channels is again measured. The two cases considered for determining on channel leakage current are the same except total current flow through the selected channel is measured.

Note 14: A 40% to 60% duty cycle range insures proper operation at all clock frequencies. In the case that an available clock has a duty cycle outside of these limits the minimum time the clock is high or low must be at least 450 ns. The maximum time the clock can be high or low is 100 µs.

Note 15: Since data, MSB first, is the output of the comparator used in the successive approximation loop, an additional delay is built in (see Block Diagram) to allow for comparator response time.

Note 16: For the ADC08131 VREFIN is internally tied to the on chip 2.5V band-gap reference output; therefore, the supply current is larger because it includes the reference current (700 µA typical, 2 mA maximum).

Note 17: Load regulation test conditions and specifications for the ADC08131 differ from those of the ADC08134 and ADC08138 because the ADC08131 has the on-board reference as a permanent load.

5

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National Semiconductor ADC08131, ADC08134, ADC08138 Technical data

ADC08138 Simplified Block Diagram

DS010749-1

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6

Typical Converter Performance Characteristics

Linearity Error vs

Linearity Error vs

Reference Voltage

Temperature

DS010749-27 DS010749-28

Power Supply Current vs

Output Current vs

Temperature (ADC08138,

Temperature

ADC08134)

 

DS010749-31

DS010749-30

Note: For ADC08131 add IREF

Typical Reference Performance Characteristics

Load Regulation

Line Regulation

 

(3 Typical Parts)

DS010749-34

DS010749-33

Linearity Error vs

Clock Frequency

DS010749-29

Power Supply Current vs Clock Frequency

DS010749-32

Output Drift

vs Temperature (3 Typical Parts)

DS010749-35

7

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