ADC08131
June 1999
ADC08131/ADC08134/ADC08138
8-Bit High-Speed Serial I/O A/D Converters with Multiplexer Options, Voltage Reference, and Track/Hold
Function
General Description
The ADC08131/ADC08134/ADC08138 are 8-bit successive approximation A/D converters with serial I/O and configurable input multiplexers with up to 8 channels. The serial I/O is configured to comply with the NSC MICROWIRE™ serial data exchange standard for easy interface to the COPS™ family of controllers, and can easily interface with standard shift registers or microprocessors.
All three devices provide a 2.5V band-gap derived reference with guaranteed performance over temperature.
A track/hold function allows the analog voltage at the positive input to vary during the actual A/D conversion.
The analog inputs can be configured to operate in various combinations of single-ended, differential, or pseudo-differential modes. In addition, input voltage spans as small as 1V can be accommodated.
Applications
nDigitizing automotive sensors
nProcess control/monitoring
nRemote sensing in noisy environments
nEmbedded diagnostics
Features
nSerial digital data link requires few I/O pins
nAnalog input track/hold function
n4- or 8-channel input multiplexer options with address logic
nOn-chip 2.5V band-gap reference (±2% over temperature guaranteed)
nNo zero or full scale adjustment required
nTTL/CMOS input/output compatible
n0V to 5V analog input range with single 5V power supply
Key Specifications
n Resolution
n Conversion time (fC = 1 MHz) n Power dissipation
n Single supply
n Total unadjusted error
n Linearity Error (VREF = 2.5V)
n No missing codes (over temperature) n On-board Reference
Ordering Information
Industrial |
Package |
(−40ÊC ≤ TA ≤ +85ÊC) |
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ADC08131CIWM |
M14B |
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ADC08134CIWM |
M14B |
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ADC08138CIWM |
M20B |
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TRI-STATE® is a registered trademark of National Semiconductor Corporation.
COPS™ microcontrollers and MICROWIRE™ are trademarks of National Semiconductor Corporation.
and Reference, Voltage Options, |
ADC08131/ADC08134/ADC08138 |
Function Track/Hold |
Serial Speed-High Bit-8 |
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Multiplexer with Converters A/D I/O |
© 1999 National Semiconductor Corporation |
DS010749 |
www.national.com |
Connection Diagrams
ADC08138CIWM
Small Outline
Packages
DS010749-2
ADC08134CIWM
Small Outline
Packages
DS010749-3
ADC08131CIWM
Small Outline Package
DS010749-4
www.national.com |
2 |
Absolute Maximum Ratings (Notes 1, 3)
If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications.
Supply Voltage (VCC) |
6.5V |
Voltage at Inputs and Outputs |
−0.3V to V CC + 0.3V |
Input Current at Any Pin (Note 4) |
±5 mA |
Package Input Current (Note 4) |
±20 mA |
Power Dissipation at TA = 25ÊC |
800 mW |
(Note 5) |
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ESD Susceptibility (Note 6) |
1500V |
Soldering Information |
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N Package (10 sec.) |
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SO Package: |
260ÊC |
Vapor Phase (60 sec.) |
215ÊC |
Infrared (15 sec.) (Note 7) |
220ÊC |
Storage Temperature |
−65ÊC to +150ÊC |
Operating Ratings (Notes 2, 3)
Temperature Range |
TMIN ≤ TA ≤ TMAX |
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−40ÊC ≤ TA ≤ +85ÊC |
Supply Voltage (VCC) |
4.5 VDC to 6.3 VDC |
Electrical Characteristics
The following specifications apply for VCC = +5 VDC, VREF = +2.5 VDC and fCLK = 1 MHz unless otherwise specified. Boldface limits apply for TA = TJ = TMIN to TMAX; all other limits TA = TJ = 25ÊC.
Symbol |
Parameter |
Conditions |
Typical |
Limits |
Units |
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(Note 8) |
(Note 9) |
(Limits) |
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CONVERTER AND MULTIPLEXER CHARACTERISTICS |
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Linearity Error |
VREF = +2.5 VDC |
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± 1 |
LSB (max) |
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Full Scale Error |
VREF = +2.5 VDC |
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± 1 |
LSB (max) |
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Zero Error |
VREF = +2.5 VDC |
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± 1 |
LSB (max) |
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Total Unadjusted Error |
VREF = +5 VDC |
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± 1 |
LSB (max) |
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(Note 10) |
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Differential Linearity |
VREF = +2.5 VDC |
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8 |
Bits (min) |
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3.5 |
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kΩ |
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RREF |
Reference Input Resistance |
(Note 11) |
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1.3 |
kΩ (min) |
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6.0 |
kΩ (max) |
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VIN |
Analog Input Voltage |
(Note 12) |
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(VCC + 0.05) |
V (max) |
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(GND − 0.05) |
V (min) |
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DC Common-Mode Error |
VREF |
= |
2.5 VDC |
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±1 2 |
LSB (max) |
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Power Supply Sensitivity |
VCC = +5V ±5%, |
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± 1¤4 |
LSB (max) |
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VREF = +2.5 VDC |
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On Channel = 5V, |
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0.2 |
µA (max) |
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On Channel Leakage Current |
Off Channel = 0V |
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1 |
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(Note 13) |
On Channel = 0V, |
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−0.2 |
µA (max) |
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Off Channel = 5V |
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−1 |
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On Channel = 5V, |
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−0.2 |
µA (max) |
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Off Channel Leakage Current |
Off Channel = 0V |
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−1 |
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(Note 13) |
On Channel = 0V, |
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0.2 |
µA (max) |
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Off Channel = 5V |
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1 |
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DIGITAL AND DC CHARACTERISTICS |
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VIN(1) |
Logical ª1º Input Voltage |
VCC = 5.25V |
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2.0 |
V (min) |
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VIN(0) |
Logical ª0º Input Voltage |
VCC = 4.75V |
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0.8 |
V (max) |
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IIN(1) |
Logical ª1º Input Current |
VIN = 5.0V |
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1 |
µA (max) |
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IIN(0) |
Logical ª0º Input Current |
VIN = 0V |
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−1 |
µA (max) |
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VCC = 4.75V: |
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VOUT(1) |
Logical ª1º Output Voltage |
OUTI = −360 µA |
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2.4 |
V (min) |
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IOUT = −10 µA |
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4.5 |
V (min) |
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VOUT(0) |
Logical ª0º Output Voltage |
VCC = 4.75V |
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0.4 |
V (max) |
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IOUT = 1.6 mA |
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IOUT |
TRI-STATE® Output Current |
VOUT = 0V |
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−3.0 |
µA (max) |
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VOUT = 5V |
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3.0 |
µA (max) |
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ISOURCE |
Output Source Current |
VOUT = 0V |
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−6.5 |
mA (min) |
3 |
www.national.com |
Electrical Characteristics (Continued)
The following specifications apply for VCC = +5 VDC, VREF = +2.5 VDC and fCLK = 1 MHz unless otherwise specified. Boldface limits apply for TA = TJ = TMIN to TMAX; all other limits TA = TJ = 25ÊC.
Symbol |
Parameter |
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Conditions |
Typical |
Limits |
Units |
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(Note 8) |
(Note 9) |
(Limits) |
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DIGITAL AND DC CHARACTERISTICS |
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ISINK |
Output Sink Current |
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VOUT = VCC |
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8.0 |
mA (min) |
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Supply Current |
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ICC |
ADC08134, ADC08138 |
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= HIGH |
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3.0 |
mA (max) |
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CS |
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ADC08131 (Note 16) |
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6.0 |
mA (max) |
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Electrical Characteristics
The following specifications apply for VCC = +5 VDC, and fCLK = 1 MHz unless otherwise specified. Boldface limits apply for TA = TJ = TMIN to TMAX; all other limits TA = TJ = 25ÊC.
Symbol |
Parameter |
Conditions |
Typical |
Limits |
Units |
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(Note 8) |
(Note 9) |
(Limits) |
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REFERENCE CHARACTERISTICS |
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VREFOUT |
Output Voltage |
DC08134, ADC08138 |
2.5 |
2.5 ±1.5% |
V |
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± 2% |
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VREF/ |
T |
Temperature Coefficient |
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40 |
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ppm/ÊC |
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Sourcing |
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(0 ≤ IL ≤ +4 mA) |
0.003 |
0.1 |
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ADC08134, |
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ADC08138 |
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Sourcing |
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(0 ≤ IL ≤ +2 mA) |
0.003 |
0.1 |
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VREF/ |
IL |
Load Regulation (Note 17) |
ADC08131 |
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%/mA |
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Sinking |
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(max) |
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(−1 ≤ IL ≤ 0 mA) |
0.2 |
0.5 |
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ADC08134, |
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ADC08138 |
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Sinking |
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(−1 ≤ IL ≤ 0 mA) |
0.2 |
0.5 |
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ADC08131 |
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Line Regulation |
4.75V ≤ VCC ≤ 5.25V |
0.5 |
6 |
mV (max) |
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VREF = 0V |
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ADC08134, |
8 |
25 |
mA |
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ISC |
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Short Circuit Current |
ADC08138 |
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(max) |
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VREF = 0V |
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25 |
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ADC08131 |
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TSU |
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Start-Up Time |
VCC: 0V → 5V |
20 |
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ms |
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CL = 100 µF |
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VREF/ |
t |
Long Term Stability |
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200 |
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ppm/1 kHr |
Electrical Characteristics
The following specifications apply for VCC = +5 VDC, VREF = +2.5 VDC and tr = tf = 20 ns unless otherwise specified. Boldface limits apply for TA = TJ = TMIN to TMAX; all other limits TA = TJ = 25ÊC.
Symbol |
Parameter |
Conditions |
Typical |
Limits |
Units |
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(Note 8) |
(Note 9) |
(Limits) |
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fCLK |
Clock Frequency |
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10 |
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kHz (min) |
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1 |
MHz (max) |
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Clock Duty Cycle |
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40 |
% (min) |
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(Note 14) |
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60 |
% (max) |
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www.national.com |
4 |
Electrical Characteristics (Continued)
The following specifications apply for VCC = +5 VDC, VREF = +2.5 VDC and tr = tf = 20 ns unless otherwise specified. Boldface limits apply for TA = TJ = TMIN to TMAX; all other limits TA = TJ = 25ÊC.
Symbol |
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Parameter |
Conditions |
Typical |
Limits |
Units |
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(Note 8) |
(Note 9) |
(Limits) |
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TC |
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Conversion Time (Not Including |
fCLK = 1 MHz |
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8 |
1/fCLK (max) |
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MUX Addressing Time) |
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8 |
µs (max) |
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tCA |
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Acquisition Time |
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1¤2 |
1/fCLK (max) |
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tSELECT |
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CLK High while |
CS |
is High |
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50 |
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ns |
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tSET-UP |
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CS |
Falling Edge or Data Input |
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25 |
ns (min) |
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Valid to CLK Rising Edge |
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tHOLD |
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Data Input Valid after CLK Rising |
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20 |
ns (min) |
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Edge |
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CLK Falling Edge to Output Data |
CL = 100 pF: |
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tpd1, tpd0 |
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Data MSB First |
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250 |
ns (max) |
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Valid (Note 15) |
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Data LSB First |
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200 |
ns (max) |
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TRI-STATE Delay from Rising Edge |
CL = 10 pF, RL |
= 10 kΩ |
50 |
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ns |
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t1H, t0H |
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of CS to Data Output and SARS |
(see TRI-STATE Test Circuits) |
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Hi-Z |
CL = 100 pF, RL = 2 kΩ |
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180 |
ns (max) |
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CIN |
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Capacitance of Logic Inputs |
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5 |
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pF |
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COUT |
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Capacitance of Logic Outputs |
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5 |
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pF |
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur.
Note 2: Operating Ratings indicate conditions for which the device is functional. These ratings do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test conditions.
Note 3: All voltages are measured with respect to AGND = DGND = 0 VDC, unless otherwise specified.
Note 4: When the input voltage (VIN) at any pin exceeds the power supplies (VIN < (AGND or DGND) or VIN > AVCC) the current at that pin should be limited to 5 mA. The 20 mA maximum package input current rating limits the number of pins that can safely exceed the power supplies with an input current of 5 mA to four pins.
Note 5: The maximum power dissipation must be derated at elevated temperatures and is dictated by TJMAX, qJA and the ambient temperature, TA. The maximum allowable power dissipation at any temperature is PD = (TJMAX − T A)/qJA or the number given in the Absolute Maximum Ratings, whichever is lower. For these devices TJMAX = 125ÊC. The typical thermal resistances (qJA) of these parts when board mounted for the ADC 08131 and the ADC08134 is 140ÊC/W and 91ÊC/W for the ADC08138.
Note 6: Human body model, 100 pF capacitor discharged through a 1.5 kW resistor.
Note 7: See AN450 ªSurface Mounting Methods and Their Effect on Product Reliabilityº or Linear Data Book section ªSurface Mountº for other methods of soldering surface mount devices.
Note 8: Typicals are at TJ = 25ÊC and represent the most likely parametric norm.
Note 9: Guaranteed to National's AOQL (Average Outgoing Quality Level).
Note 10: Total unadjusted error includes zero, full-scale, linearity, and multiplexer error. Total unadjusted error with VREF = +5V only applies to the ADC08134 and ADC08138. See (Note 16).
Note 11: Cannot be tested for the ADC08131.
Note 12: For VIN(−) ³ VIN(+) the digital code will be 0000 0000. Two on-chip diodes are tied to each analog input (see Block Diagram) which will forward-conduct for analog input voltages one diode drop below ground or one diode drop greater than VCC supply. During testing at low VCC levels (e.g., 4.5V), high level analog inputs
(e.g., 5V) can cause an input diode to conduct, especially at elevated temperatures. This will cause errors for analog inputs near full-scale. The specification allows 50 mV forward bias of either diode; this means that as long as the analog VIN does not exceed the supply voltage by more than 50 mV, the output code will be correct. Exceeding this range on an unselected channel will corrupt the reading of a selected channel. Achievement of an absolute 0 VDC to 5 VDC input voltage range will therefore require a minimum supply voltage of 4.950 VDC over temperature variations, initial tolerance and loading.
Note 13: Channel leakage current is measured after a single-ended channel is selected and the clock is turned off. For off channel leakage current the following two cases are considered: one, with the selected channel tied high (5 VDC) and the remaining seven off channels tied low (0 VDC), total current flow through the off channels is measured; two, with the selected channel tied low and the off channels tied high, total current flow through the off channels is again measured. The two cases considered for determining on channel leakage current are the same except total current flow through the selected channel is measured.
Note 14: A 40% to 60% duty cycle range insures proper operation at all clock frequencies. In the case that an available clock has a duty cycle outside of these limits the minimum time the clock is high or low must be at least 450 ns. The maximum time the clock can be high or low is 100 µs.
Note 15: Since data, MSB first, is the output of the comparator used in the successive approximation loop, an additional delay is built in (see Block Diagram) to allow for comparator response time.
Note 16: For the ADC08131 VREFIN is internally tied to the on chip 2.5V band-gap reference output; therefore, the supply current is larger because it includes the reference current (700 µA typical, 2 mA maximum).
Note 17: Load regulation test conditions and specifications for the ADC08131 differ from those of the ADC08134 and ADC08138 because the ADC08131 has the on-board reference as a permanent load.
5 |
www.national.com |
ADC08138 Simplified Block Diagram
DS010749-1
www.national.com |
6 |
Typical Converter Performance Characteristics
Linearity Error vs |
Linearity Error vs |
Reference Voltage |
Temperature |
DS010749-27 DS010749-28
Power Supply Current vs |
Output Current vs |
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Temperature (ADC08138, |
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Temperature |
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ADC08134) |
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DS010749-31
DS010749-30
Note: For ADC08131 add IREF
Typical Reference Performance Characteristics
Load Regulation |
Line Regulation |
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(3 Typical Parts) |
DS010749-34
DS010749-33
Linearity Error vs
Clock Frequency
DS010749-29
Power Supply Current vs Clock Frequency
DS010749-32
Output Drift
vs Temperature (3 Typical Parts)
DS010749-35
7 |
www.national.com |