MXIC MX27C256QC-45, MX27C256QC-55, MX27C256QC-70, MX27C256QC-90, MX27C256QI-10 Datasheet

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MX27C256

FEATURES

32K x 8 organization

Single +5V power supply

+12.5V programming voltage

Fast access time: 45/55/70/90/100/120/150 ns

Totally static operation

Completely TTL compatible

GENERAL DESCRIPTION

The MX27C256 is a 5V only, 256K-bit, ultraviolet Erasable Programmable Read Only Memory. It is organized as 32K by 8 bits, operates from a single + 5volt supply, has a static standby mode, and features fast single address location programming. All programming signals are TTL levels, requiring a single pulse. For programming from outside the system, existing

256K-BIT [32K x 8] CMOS EPROM

Operating current: 30mA

Standby current: 100uA

Package type:

-28 pin plastic DIP

-32 pin PLCC

-28 pin 8 x 13.4mm TSOP(I)

EPROM programmers may be used. The MX27C256 supports intelligent fast programming algorithm which can result in programming time of less than ten seconds.

This EPROM is packaged in industry standard 28 pin dual-in-line packages, 32 lead PLCC, and 28 lead TSOP(I) packages.

PIN CONFIGURATIONS

BLOCK DIAGRAM

PDIP

VPP 1 A12 2 A7 3 A6 4 A5 5 A4 6 A3 7 A2 8 A1 9

A0 10

Q0 11

Q1 12

Q2 13 GND 14

MX27C256

28 VCC

27 A14

26 A13

25 A8

24 A9

23 A11

22 OE

21 A10

20 CE

19 Q7

18 Q6

17 Q5

16 Q4

15 Q3

PLCC

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

CONTROL

 

 

OUTPUT

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

A7

A12

VPP

NC

VCC

A14

A13

 

 

 

CE

 

 

 

 

 

 

 

 

 

Q0~Q7

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

LOGIC

 

 

BUFFERS

 

 

 

 

 

 

 

 

 

OE

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

A6

4

 

 

1

32

 

30

A8

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

5

 

 

 

 

 

29

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

A5

 

 

 

 

 

 

 

A9

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

A4

 

 

 

 

 

 

 

A11

 

 

 

 

 

 

 

.

 

Y-DECODER

.

 

Y-SELECT

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

.

 

 

 

 

 

 

.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

A3

 

 

 

 

 

 

 

NC

A0~A14

 

 

 

.

 

 

 

 

 

 

.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

.

 

 

 

 

 

 

.

 

 

 

 

 

 

 

 

 

A2

9

 

MX27C256

 

25

OE

ADDRESS

 

 

 

 

 

 

 

 

 

 

 

 

256K BIT

 

 

 

 

 

 

 

 

 

 

 

.

 

 

 

 

 

 

.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

A10

INPUTS

 

 

 

 

X-DECODER

 

CELL

 

 

 

 

 

 

A1

 

 

 

 

 

 

 

 

 

 

.

 

.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

MAXTRIX

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

A0

 

 

 

 

 

 

 

CE

 

 

 

 

 

 

 

.

 

 

 

 

 

 

.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

NC

 

 

 

 

 

 

 

Q7

 

 

 

 

 

 

 

.

 

 

 

 

 

 

.

 

 

 

 

 

 

 

 

 

13

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Q0

 

 

 

 

 

21

Q6

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VCC

 

 

 

 

 

VPP

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

14

 

 

17

 

 

20

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Q1

Q2

GND

NC

Q3

Q4

Q5

 

 

GND

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

8 x 13.4mm 28-TSOP(I)

 

 

 

 

 

PIN DESCRIPTION

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

SYMBOL

PIN NAME

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

OE

 

22

 

21

 

A10

A0~A14

Address Input

 

 

 

A11

 

23

 

20

 

 

CE

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

A9

 

24

 

19

 

Q7

Q0~Q7

Data Input/Output

 

 

 

 

A8

 

25

 

18

 

Q6

 

 

 

 

 

 

 

 

 

 

 

A13

 

26

 

17

 

Q5

CE

Chip Enable Input

 

 

 

A14

 

27

 

16

 

Q4

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VCC

 

28

MX27C256

15

 

Q3

OE

Output Enable Input

VPP

 

1

14

 

GND

 

 

 

 

 

 

 

 

 

 

 

 

VPP

Program Supply Voltage

A12

 

2

 

13

 

Q2

 

A7

 

3

 

12

 

Q1

 

 

 

 

 

 

A6

 

4

 

11

 

Q0

NC

No Internal Connection

 

A5

 

5

 

10

 

A0

 

 

 

 

 

 

 

 

VCC

Power Supply Pin (+5V)

 

A4

 

6

 

9

 

A1

 

 

 

 

A3

 

7

 

8

 

A2

GND

Ground Pin

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

P/N: PM0203

1

REV. 5.3, SEP. 19, 2001

MX27C256

FUNCTIONAL DESCRIPTION

THE PROGRAMMING OF THE MX27C256

When the MX27C256 is delivered, or it is erased, the chip has all 256K bits in the "ONE" or HIGH state. "ZEROs" are loaded into the MX27C256 through the procedure of programming.

For programming, the data to be programmed is applied with 8 bits in parallel to the data pins.

VCC must be applied simultaneously or before VPP, and removed simultaneously or after VPP. When programming an MXIC EPROM, a 0.1uF capacitor is required across VPP and ground to suppress spurious voltage transients which may damage the device.

FAST PROGRAMMING

The device is set up in the fast programming mode when the programming voltage VPP = 12.75V is applied, with VCC = 6.25 V and OE = VIH (Algorithm is shown in Figure 1). The programming is achieved by applying a single TTL low level 100us pulse to the CE input after addresses and data line are stable. If the data is not verified, an additional pulse is applied for a maximum of 25 pulses. This process is repeated while sequencing through each address of the device. When the programming mode is completed, the data in all address is verified at VCC = VPP = 5V ± 10%.

PROGRAM INHIBIT MODE

Programming of multiple MX27C256s in parallel with different data is also easily accomplished by using the Program Inhibit Mode. Except for CE and OE, all like inputs of the parallel MX27C256 may be common. A TTL low-level program pulse applied to an MX27C256 CE input with VPP = 12.5 ± 0.5 V and OE HIGH will program that MX27C256. A high-level CE input inhibits the other MX27C256s from being programmed.

PROGRAM VERIFY MODE

Verification should be performed on the programmed bits to determine that they were correctly programmed. The verification should be performed with CE and OE at VIL, and VPP at its programming voltage.

AUTO IDENTIFY MODE

The auto identify mode allows the reading out of a binary code from an EPROM that will identify its manufacturer and device type. This mode is intended for use by programming equipment for the purpose of automatically matching the device to be programmed with its corresponding programming algorithm. This mode is functional in the 25°C ± 5°C ambient temperature range that is required when programming the MX27C256.

To activate this mode, the programming equipment must force 12.0 ± 0.5 (VH) on address line A9 of the device. Two identifier bytes may then be sequenced from the device outputs by toggling address line A0 from VIL to VIH. All other address lines must be held at VIL during auto identify mode.

Byte 0 ( A0 = VIL) represents the manufacturer code, and byte 1 (A0 = VIH), the device identifier code. For the MX27C256, these two identifier bytes are given in the Mode Select Table. All identifiers for manufacturer and device codes will possess odd parity, with the MSB (Q7) defined as the parity bit.

READ MODE

The MX27C256 has two control functions, both of which must be logically satisfied in order to obtain data at the outputs. Chip Enable (CE) is the power control and should be used for device selection. Output Enable (OE) is the output control and should be used to gate data to the output pins, independent of device selection. Assuming that addresses are stable, address access time (tACC) is equal to the delay from CE to output (tCE). Data is available at the outputs tOE after the falling edge of OE, assuming that CE has been LOW and addresses have been stable for at least tACC - tOE.

STANDBY MODE

The MX27C256 has a CMOS standby mode which reduces the maximum Vcc current to 100 uA. It is placed in CMOS standby when CE is at VCC ± 0.3 V. The MX27C256 also has a TTL-standby mode which reduces the maximum VCC current to 1.5 mA. It is placed in TTL-standby when CE is at VIH. When in standby mode, the outputs are in a high-impedance state, independent of the OE input.

P/N:PM0203

REV.5.3, SEP. 19, 2001

2

MX27C256

TWO-LINE OUTPUT CONTROL FUNCTION

To accommodate multiple memory connections, a twoline control function is provided to allow for:

1.Low memory power dissipation,

2.Assurance that output bus contention will not occur.

It is recommended that CE be decoded and used as the primary device-selecting function, while OE be made a common connection to all devices in the array and connected to the READ line from the system control bus. This assures that all deselected memory devices are in their low-power standby mode and that the output pins are only active when data is desired from a particular memory device.

MODE SELECT TABLE

SYSTEM CONSIDERATIONS

During the switch between active and standby conditions, transient current peaks are produced on the rising and falling edges of Chip Enable. The magnitude of these transient current peaks is dependent on the output capacitance loading of the device. At a minimum, a 0.1 uF ceramic capacitor (high frequency, low inherent inductance) should be used on each device between VCC and GND to minimize transient effects. In addition, to overcome the voltage drop caused by the inductive effects of the printed circuit board traces on EPROM arrays, a 4.7 uF bulk electrolytic capacitor should be used between Vcc and GND for each eight devices. The location of the capacitor should be close to where the power supply is connected to the array.

 

 

 

 

 

 

PINS

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

MODE

CE

OE

A0

A9

VPP

OUTPUTS

 

 

 

 

 

 

 

 

 

Read

VIL

VIL

X

X

VCC

DOUT

 

 

 

 

 

 

 

 

 

Output Disable

VIL

VIH

X

X

VCC

High Z

 

 

 

 

 

 

 

 

 

Standby (TTL)

VIH

X

X

X

VCC

High Z

 

 

 

 

 

 

 

 

 

Standby (CMOS)

VCC±0.3V

X

X

X

VCC

High Z

 

 

 

 

 

 

 

 

 

Program

VIL

VIH

X

X

VPP

DIN

 

 

 

 

 

 

 

 

 

Program Verify

VIH

VIL

X

X

VPP

DOUT

 

 

 

 

 

 

 

 

 

Program Inhibit

VIH

VIH

X

X

VPP

High Z

 

 

 

 

 

 

 

 

 

Manufacturer Code(3)

VIL

VIL

VIL

VH

VCC

C2H

 

 

 

 

 

 

 

 

 

Device Code(3)

VIL

VIL

VIH

VH

VCC

10H

 

 

 

 

 

 

 

 

 

NOTES: 1.

VH

= 12.0 V ± 0.5 V

4. See DC Programming characteristics for VPP voltage during

2.

X = Either VIH or VIL

programming.

3.

A1

- A8 = A10 - A14 = VIL(For auto select)

 

P/N:PM0203

REV.5.3, SEP. 19, 2001

3

MX27C256

FIGURE 1. FAST PROGRAMMING FLOW CHART

 

 

START

 

 

 

ADDRESS = FIRST LOCATION

 

 

 

VCC = 6.25V

 

 

 

VPP = 12.75V

 

 

 

X = 0

 

 

 

PROGRAM ONE 100us PULSE

 

INTERACTIVE

 

INCREMENT X

 

SECTION

 

 

 

 

 

YES

 

 

 

X = 25?

 

 

 

NO

 

 

 

FAIL

 

 

 

VERIFY BYTE

 

 

 

?

 

 

 

PASS

 

 

 

NO

 

 

INCREMENT ADDRESS

LAST ADDRESS

 

 

 

 

 

 

 

FAIL

 

 

YES

 

 

 

VCC = VPP = 5.25V

 

VERIFY SECTION

 

FAIL

 

 

 

DEVICE FAILED

 

 

VERIFY ALL BYTES

 

 

?

 

 

 

PASS

 

 

 

DEVICE PASSED

 

P/N:PM0203

REV.5.3, SEP. 19, 2001

4

MXIC MX27C256QC-45, MX27C256QC-55, MX27C256QC-70, MX27C256QC-90, MX27C256QI-10 Datasheet

MX27C256

SWITCHING TEST CIRCUITS

DEVICE

1.8K ohm

UNDER

+5V

 

TEST

 

CL

DIODES = IN3064

OR EQUIVALENT

6.2K ohm

CL = 100 pF including jig capacitance(30pF for 45/55/70ns parts)

SWITCHING TEST WAVEFORMS

2.0V

2.0V

AC driving levels

TEST POINTS

0.8V

0.8V

INPUT

OUTPUT

AC TESTING: AC driving levels are 2.4V/0.4V for commercial grade, 3.0V/0V for industrial grade.

Input pulse rise and fall times are < 10ns.

AC driving levels

1.5V

TEST POINTS

1.5V

 

 

 

 

INPUT

 

OUTPUT

AC TESTING: (1) AC driving levels are 3.0V/0V for both commercial grade and industrial grade.

Input pulse rise and fall times are < 10ns.

(2) For MX27C256-45, MX27C256-55, MX27C256-70.

P/N:PM0203

REV.5.3, SEP. 19, 2001

5

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