MCNIX MX23L1611MC-10, MX23L1611MC-12, MX23L1611TC-12, MX23L1611TI-12, MX23L1611TC-10, MX23L1611MI-12 Datasheet

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MX23L1611

3.3 Volt 16-Mbit (2M x 8 / 1M x 16) Mask ROM with Page Mode

FEATURES

Bit organization

-2M x 8 (byte mode)

-1M x 16 (word mode)

Fast access time

-Random access: 100ns (max.)

-Page access: 30ns (max.)

Page Size

-8 words per page

Current

-Operating:40mA

-Standby:15uA

Supply voltage

-100ns @3.0V ~ 3.6V

-120ns @2.7V ~ 3.6V

Package

-44 pin SOP (500mil)

-48 pin TSOP (12mm x 20mm)

ORDER INFORMATION

Part No.

Access Page Access

Package

 

Time

Time

 

 

 

 

 

MX23L1611MC-10

100ns

30ns

44 pin SOP

 

 

 

 

MX23L1611MC-12

120ns

50ns

44 pin SOP

 

 

 

 

MX23L1611MI-12*

120ns

50ns

44 pin SOP

 

 

 

 

MX23L1611TC-10

100ns

30ns

48 pin TSOP

 

 

 

 

MX23L1611TC-12

120ns

50ns

48 pin TSOP

 

 

 

 

MX23L1611TI-12*

120ns

50ns

48 pin TSOP

 

 

 

 

*Note: Industrial grade's temperature is -40°C~85°C

PIN CONFIGURATION

PIN DESCRIPTION

44 SOP

NC

A18 2

A17 3

A7 4

A6 5

A5 6

A4 7

A3 8

A2 9

A1 10

A0 11

CE 12

VSS 13

OE 14

D0 15

D8 16

D1 17

D9 18

D2 19

D10 20

D3 21

D11 22

MX23L1611

44 NC

43 A19

42 A8

41 A9

40 A10

39 A11

38 A12

37 A13

36 A14

35 A15

34 A16

33 BYTE

32 VSS

31 D15/A-1

30 D7

29 D14

28 D6

27 D13

26 D5

25 D12

24 D4

23 VCC

 

Symbol

Pin Function

 

A0~A19

Address Inputs

 

 

 

 

 

 

 

 

D0~D14

Data Outputs

 

 

 

 

 

 

 

 

D15/A-1

D15 (Word Mode)/ LSB Address

 

 

 

 

 

 

(Byte Mode)

 

 

 

 

 

 

 

 

 

 

 

 

 

Chip Enable Input

 

CE

 

 

 

 

 

 

 

 

 

 

 

 

Output Enable Input

 

OE

 

 

 

 

 

 

 

 

 

Word/ Byte Mode Selection

 

Byte

 

 

 

 

 

 

 

 

 

VCC

Power Supply Pin

 

 

 

 

 

 

 

 

VSS

Ground Pin

 

 

 

 

 

 

 

 

NC

No Connection

 

 

 

 

 

 

 

MODE SELECTION

CE

OE

Byte

D15/A-1

D0~D7

D8~D15

Mode

Power

H

X

X

X

High Z

High Z

-

Stand-by

 

 

 

 

 

 

 

 

L

H

X

X

High Z

High Z

-

Active

 

 

 

 

 

 

 

 

L

L

H

Output

D0~D7

D8~D15

Word

Active

 

 

 

 

 

 

 

 

L

L

L

Input

D0~D7

High Z

Byte

Active

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

P/N:PM0449

 

 

 

 

 

REV. 1.8, JUL. 18, 2001

 

 

 

 

1

 

 

 

MCNIX MX23L1611MC-10, MX23L1611MC-12, MX23L1611TC-12, MX23L1611TI-12, MX23L1611TC-10, MX23L1611MI-12 Datasheet

MX23L1611

48 TSOP (Normal Type)

BYTE

 

 

1

 

A16

 

 

2

 

A15

 

 

3

 

A14

 

 

4

 

A13

 

 

5

 

A12

 

 

6

 

A11

 

 

7

 

A10

 

 

8

 

 

 

 

A9

 

9

 

 

 

 

A8

 

10

 

 

 

 

A19

 

11

MX23L1611

 

 

VSS

 

12

 

 

NC

 

13

(Normal Type)

 

 

A18

 

14

 

 

A17

 

15

 

 

 

 

A7

 

16

 

 

 

 

A6

 

 

17

 

 

 

 

A5

 

 

18

 

 

 

 

A4

 

 

19

 

 

 

 

A3

 

 

20

 

 

 

 

A2

 

 

21

 

 

 

 

A1

 

 

22

 

 

 

 

A0

 

 

23

 

 

 

 

CE

 

 

24

 

 

 

 

 

 

 

 

 

48 VSS

47 VSS

46 D15/A-1

45 D7

44 D14

43 D6

42 D13

41 D5

40 D12

39 D4

38 VCC

37 VCC

36 NC

35 D11

34 D3

33 D10

32 D2

31 D9

30 D1

29 D8

28 D0

27 OE

26 VSS

25 VSS

BLOCK DIAGRAM

A0/(A-1)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

A2

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

A3

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

D0

 

 

Address

 

 

 

 

Memory

 

 

 

 

Page

 

 

 

Page

 

 

 

 

Word/

 

 

 

 

Output

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Buffer

 

 

 

 

Array

 

 

 

 

Buffer

 

 

 

Decoder

 

 

 

 

Byte

 

 

 

 

Buffer

 

 

A19

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

D15/(D7)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

CE

BYTE

OE

Note: Chip Enable active low input activates the chip's control logic, Address buffer and Page buffer.

P/N:PM0449

REV. 1.8, JUL. 18, 2001

2

MX23L1611

ABSOLUTE MAXIMUM RATINGS

Item

Symbol

Ratings

Voltage on any Pin Relative to VSS

VIN

-1.3V to VCC+2.0V (Note)

 

 

 

Ambient Operating Temperature

Topr

-40°C to 85°C

 

 

 

Storage Temperature

Tstg

-65°C to 125°C

 

 

 

Note: Minimum DC voltage on input or I/O pins is -0.5V. During voltage transitions, inputs may undershoot VSS to -1.3V for periods of up to 20ns. Maximum DC voltage on input or I/O pins is VCC+0.5V. During voltage transitions, input may overshoot VCC to VCC+2.0V for periods of up to 20ns.

DC CHARACTERISTICS (Ta = -10°C ~ 70°C, VCC = 3.0V~3.6V)

Item

Symbol

MIN.

MAX.

Conditions

Output High Voltage

VOH

2.4V

-

IOH = -0.4mA

 

 

 

 

 

 

 

Output Low Voltage

VOL

-

0.4V

IOL = 1.6mA

 

 

 

 

 

 

 

Input High Voltage

VIH

2.2V

VCC+0.3V

 

 

 

 

 

 

 

 

 

 

Input Low Voltage

VIL

-0.3V

0.2 x VCC

 

 

 

 

 

 

 

 

 

 

Input Leakage Current

ILI

-

5uA

0V, VCC

 

 

 

 

 

 

 

Output Leakage Current

ILO

-

5uA

0V, VCC

 

 

 

 

 

 

 

Operating Current

ICC1

-

40mA

tRC = 100ns, all output open

 

 

 

 

 

 

 

Standby Current (TTL)

ISTB1

-

1mA

 

 

= VIH

CE

 

 

 

 

 

 

 

Standby Current (CMOS)

ISTB2

-

15uA

 

 

CE>VCC-0.2V

 

 

 

 

 

 

 

Input Capacitance

CIN

-

10pF

Ta = 25°C, f = 1MHZ

 

 

 

 

 

 

 

Output Capacitance

COUT

-

10pF

Ta = 25°C, f = 1MHZ

 

 

 

 

 

 

 

AC CHARACTERISTICS (Ta = -10°C ~ 70°C, VCC = 3.0V~3.6V)

Item

Symbol

23L1611-10

 

23L1611-12

 

 

 

MIN.

MAX.

MIN.

MAX.

 

 

 

 

 

 

 

 

Read Cycle Time

tRC

100ns

-

 

120ns

-

 

 

 

 

 

 

 

 

 

Address Access Time

tAA

-

100ns

-

120ns

 

 

 

 

 

 

 

 

Chip Enable Access Time

tACE

-

100ns

-

120ns

 

 

 

 

 

 

 

 

Page Mode Access Time

tPA

-

30ns

-

50ns

 

 

 

 

 

 

 

 

Output Enable Time

tOE

-

30ns

-

50ns

 

 

 

 

 

 

 

 

Output Hold After Address

tOH

0ns

-

 

0ns

-

 

 

 

 

 

 

 

 

 

Output High Z Delay

tHZ

-

20ns

-

20ns

 

 

 

 

 

 

 

 

Note:Output high-impedance delay (tHZ) is measured from OE or CE going high, and this parameter guaranteed by design over the full voltage and temperature operating range - not tested.

P/N:PM0449

REV. 1.8, JUL. 18, 2001

3

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