Maxim MAX199ACAI, MAX199BEAI, MAX199BCWI, MAX199BCNI, MAX199BCAI Datasheet

19-0401; Rev 0; 6/95

Multi-Range (±4V, ±2V, +4V, +2V), +5V Supply, 12-Bit DAS with 8+4 Bus Interface

_______________General Description

The MAX199 multi-range, 12-bit data-acquisition system (DAS) requires only a single +5V supply for operation, and converts analog signals up to ±4V at its inputs. This system provides eight analog input channels that are independently software programmable for a variety of ranges: ±VREF, ±VREF/2, 0V to VREF, or 0V to VREF/2. This increases effective dynamic range to 14 bits, and provides the user flexibility to interface 4mA-to-20mA, ±12V, and ±15V powered sensors to a single +5V system. In addition, the converter is fault-protected to ±16.5V; a fault condition on any channel will not affect the conversion result of the selected channel. Other features include a 5MHz bandwidth track/hold, 100ksps throughput rate, internal/external clock, internal/external acquisition control, 8+4 parallel interface, and operation with an internal 4.096V or external reference.

A hardware SHDN pin and two programmable powerdown modes (STBYPD, FULLPD) provide low-current shutdown between conversions. In STBYPD mode, the reference buffer remains active, eliminating start-up delays.

The MAX199 employs a standard microprocessor (µP) interface. Its three-state data I/O interface is configured to operate with 8-bit data buses, and data-access and bus-release timing specifications are compatible with most popular µPs. All logic inputs and outputs are TTL/CMOS compatible.

The MAX199 is available in 28-pin DIP, wide SO, SSOP, and ceramic SB packages.

For a different combination of input ranges (±10V, ±5V, 0V to 10V, 0V to 5V), see the MAX197 data sheet. For 12bit bus interfaces, see the MAX196/MAX198 data sheet.

________________________Applications

Industrial-Control Systems

Robotics

Data-Acquisition Systems

Automatic Testing Systems

Medical Instruments

Telecommunications

____________________________Features

♦12-Bit Resolution, 1/2LSB Linearity

♦Single +5V Operation

♦Software-Selectable Input Ranges:

±V REF, ±V REF/2, 0V to VREF, 0V to VREF/2

♦Internal 4.096V or External Reference

♦Fault-Protected Input Multiplexer (±16.5V)

♦8 Analog Input Channels

♦6µs Conversion Time, 100ksps Sampling Rate

♦Internal or External Acquisition Control

♦Two Power-Down Modes

♦Internal or External Clock

______________Ordering Information

PART	TEMP. RANGE	PIN-PACKAGE
MAX199ACNI	0°C to +70°C	28 Narrow Plastic DIP
MAX199BCNI	0°C to +70°C	28 Narrow Plastic DIP
MAX199ACWI	0°C to +70°C	28 Wide SO
MAX199BCWI	0°C to +70°C	28 Wide SO
MAX199ACAI	0°C to +70°C	28 SSOP
MAX199BCAI	0°C to +70°C	28 SSOP
MAX199BC/D	0°C to +70°C	Dice*

Ordering Information continued at end of data sheet.

*Dice are specified at TA = +25°C, DC parameters only.

__________________Pin Configuration

TOP VIEW

	CLK						1		28	DGND
			CS				2		27	VDD
										REF
		WR					3		26
										REFADJ
							4		25
			RD
	HBEN						5	MAX199	24	INT
SHDN							6		23	CH7
			D7
							7		22	CH6
			D6
							8		21	CH5
			D5
							9		20	CH4
			D4							CH3
							10		19
										CH2
D3/D11							11		18
										CH1
D2/D10							12		17
										CH0
D1/D9							13		16
										AGND
D0/D8							14		15

Functional Diagram appears at end of data sheet.

DIP/SO/SSOP/Ceramic SB

________________________________________________________________ Maxim Integrated Products 1

MAX199

Call toll free 1-800-722-8266 for free samples or literature.

MAX199

Multi-Range (±4V, ±2V, +4V, +2V),

+5V Supply, 12-Bit DAS with 8+4 Bus Interface

ABSOLUTE MAXIMUM RATINGS

VDD to AGND............................................................	-0.3V to +7V
AGND to DGND.....................................................	-0.3V to +0.3V
REF to AGND..............................................	-0.3V to (VDD + 0.3V)
REFADJ to AGND.......................................	-0.3V to (VDD + 0.3V)
Digital Inputs to DGND...............................	-0.3V to (VDD + 0.3V)
Digital Outputs to DGND............................	-0.3V to (VDD + 0.3V)
CH0–CH7 to AGND ..........................................................	±16.5V

Continuous Power Dissipation (TA = +70°C)

Narrow Plastic DIP (derate 14.29mW/°C above +70°C)....1143mW

Wide SO (derate 12.50mW/°C above +70°C)..............	1000mW
SSOP (derate 9.52mW/°C above +70°C) ......................	762mW

Narrow Ceramic SB (derate 20.00mW/°C above +70°C)..1600mW

Operating Temperature Ranges
MAX199_C_ _ .......................................................	0°C to +70°C
MAX199_E_ _.....................................................	-40°C to +85°C
MAX199_M_ _..................................................	-55°C to +125°C
Storage Temperature Range .............................	-65°C to +150°C
Lead Temperature (soldering, 10sec) .............................	+300°C

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

ELECTRICAL CHARACTERISTICS

(VDD = 5V ±5%; unipolar/bipolar range; external reference mode, VREF = 4.096V; 4.7µF at REF pin; external clock, fCLK = 2.0MHz with 50% duty cycle; TA = TMIN to TMAX, unless otherwise noted.)

PARAMETER	SYMBOL	CONDITIONS			MIN	TYP	MAX	UNITS
ACCURACY (Note 1)
Resolution				12				Bits
Integral Nonlinearity	INL	MAX199A					±1/2	LSB
		MAX199B					±1
Differential Nonlinearity	DNL						±1	LSB
		Unipolar	MAX199A				±3
Offset Error			MAX199B				±5	LSB
		Bipolar	MAX199A				±5
			MAX199B				±10
Channel-to-Channel Offset		Unipolar				±0.1		LSB
Error Matching		Bipolar				±0.5
		Unipolar	MAX199A				±7
Gain Error			MAX199B				±10	LSB
(Note 2)		Bipolar	MAX199A				±7
			MAX199B				±10
Gain Temperature Coefficient		Unipolar				3		ppm/°C
(Note 2)		Bipolar				5
DYNAMIC SPECIFICATIONS (10kHz sine-wave input, ±4.096Vp-p, fSAMPLE = 100ksps)
Signal-to-Noise + Distortion Ratio	SINAD		MAX199A		70			dB
			MAX199B		69
Total Harmonic Distortion	THD	Up to the 5th harmonic				-85	-78	dB
Spurious-Free Dynamic Range	SFDR				80			dB
Channel-to-Channel Crosstalk		50kHz, VIN = ±4V (Note 3)				-86		dB
Aperture Delay		External CLK mode/external acquisition control				15		ns
		External CLK mode/external acquisition				<50		ps
		control
Aperture Jitter
		Internal CLK mode/internal acquisition				10		ns
		control (Note 4)

2 _______________________________________________________________________________________

Multi-Range (±4V, ±2V, +4V, +2V), +5V Supply, 12-Bit DAS with 8+4 Bus Interface

ELECTRICAL CHARACTERISTICS (continued)

(VDD = 5V ±5%; unipolar/bipolar range; external reference mode, VREF = 4.096V; 4.7µF at REF pin; external clock, fCLK = 2.0MHz with 50% duty cycle; TA = TMIN to TMAX, unless otherwise noted.)

PARAMETER	SYMBOL	CONDITIONS			MIN	TYP	MAX	UNITS
ANALOG INPUT
Track/Hold Acquisition Time		fCLK = 2.0MHz					3	µs
				±VREF range		5
Small-Signal Bandwidth		-3dB rolloff		±VREF/2 range		2.5		MHz
				0V to VREF range		2.5
				0V to VREF/2 range		1.25
		Unipolar (see Table 2)			0		VREF
Input Voltage Range					0		VREF/2	V
		Bipolar (see Table 2)			-VREF		VREF
					-VREF/2		VREF/2
		Unipolar range				0.1	10
Input Current		Bipolar		±VREF range	-1200		10	µA
				±VREF/2 range	-600		10
Input Dynamic Resistance		Unipolar				40		MΩ
		Bipolar				10		kΩ
Input Capacitance		(Note 5)					40	pF
INTERNAL REFERENCE
REF Output Voltage	VREF	TA = +25°C			4.076	4.096	4.116	V
REF Output Tempco		MAX199_C				±15
(Contact Maxim Applications
	TC VREF	MAX199_E				±30		ppm/°C
for guaranteed temperature
drift specifications)		MAX199_M				±40
Output Short-Circuit Current							30	mA
Load Regulation		0mA to 0.5mA output current (Note 6)					7.5	mV
		0mA to 0.1mA output current (Note 6)				0.8
Capacitive Bypass at REF					4.7			µF
REFADJ Output Voltage					2.465	2.500	2.535	V
REFADJ Adjustment Range		With recommended circuit (Figure 1)				±1.5		%
Buffer Voltage Gain						1.6384		V/V
REFERENCE INPUT (Buffer disabled, reference input applied to REF pin)
Input Voltage Range					2.4		4.18	V
				Normal, or STANDBY			400
				power-down mode
Input Current		VREF = 4.18V						µA
				FULL power-down			1
				mode
Input Resistance		Normal, or STANDBY power-down mode			10			kΩ
		FULL power-down mode			5			MΩ
REFADJ Threshold for					VDD - 50mV			V
Buffer Disable

MAX199

_______________________________________________________________________________________ 3

MAX199

Multi-Range (±4V, ±2V, +4V, +2V),

+5V Supply, 12-Bit DAS with 8+4 Bus Interface

ELECTRICAL CHARACTERISTICS (continued)

(VDD = 5V ±5%; unipolar/bipolar range; external reference mode, VREF = 4.096V; 4.7µF at REF pin; external clock, fCLK = 2.0MHz with 50% duty cycle; TA = TMIN to TMAX, unless otherwise noted.)

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS

POWER REQUIREMENTS

Supply Voltage

VDD

4.75

5.25

V

Normal mode, bipolar ranges

18

mA

Supply Current

IDD

Normal mode, unipolar ranges

6

10

Standby power-down (STBYPD)

700

850

µA

Full power-down mode (FULLPD) (Note 7)

60

120

Power-Supply Rejection Ratio

External reference = 4.096V

±1/

PSRR

2

LSB

(Note 8)

Internal reference

±1/2

TIMING

Internal Clock Frequency

fCLK

CCLK = 100pF

1.25

1.56

2.00

MHz

External Clock Frequency Range

fCLK

0.1

2.0

MHz

tACQI

Internal acquisition

External CLK

3.0

Acquisition Time

Internal CLK

3.0

5.0

µs

tACQE

External acquisition (Note 9)

3.0

After FULLPD or STBYPD

5

Conversion Time

tCONV

External CLK

6.0

µs

Internal CLK, CCLK = 100pF

6.0

7.7

10.0

Throughput Rate

External CLK

100

ksps

Internal CLK, CCLK = 100pF

62

Bandgap Reference

Power-up (Note 10)

200

µs

Start-Up Time

Reference Buffer Settling

To 0.1mV, REF

CREF = 4.7µF

8

ms

bypass capacitor

CREF = 33µF

60

fully discharged

DIGITAL INPUTS (D7–D0, CLK,

RD,

WR,

CS,

HBEN,

SHDN)

(Note 11)

Input High Voltage

VINH

2.4

V

Input Low Voltage

VINL

0.8

V

Input Leakage Current

IIN

VIN = 0V or VDD

±10

µA

Input Capacitance

CIN

(Note 5)

15

pF

DIGITAL OUTPUTS (D7–D4, D3/D11, D2/D10, D1/D9, D0/D8,

INT)

Output Low Voltage

VOL

VDD = 4.75V, ISINK = 1.6mA

0.4

V

Output High Voltage

VOH

VDD = 4.75V, ISOURCE = 1mA

VDD - 1

V

Three-State Output Capacitance

COUT

(Note 5)

15

pF

4 _______________________________________________________________________________________

Note 1:

Note 2: Note 3: Note 4: Note 5: Note 6: Note 7: Note 8: Note 9:

Multi-Range (±4V, ±2V, +4V, +2V), +5V Supply, 12-Bit DAS with 8+4 Bus Interface

TIMING CHARACTERISTICS

(VDD = 5V ±5%; unipolar/bipolar range; external reference mode, VREF = 4.096V; 4.7µF at REF pin; external clock, fCLK = 2.0MHz with 50% duty cycle; TA = TMIN to TMAX, unless otherwise noted.)

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS

Pulse Width

tCS

80

ns

CS

Pulse Width

tWR

80

ns

WR

to

Setup Time

tCSWS

0

ns

CS

WR

CS

to

WR

Hold Time

tCSWH

0

ns

to

Setup Time

tCSRS

0

ns

CS

RD

to

Hold Time

tCSRH

0

ns

CS

RD

CLK to

Setup Time

tCWS

100

ns

WR

CLK to

Hold Time

tCWH

50

ns

WR

Data Valid to

Setup

tDS

60

ns

WR

Data Valid to

Hold

tDH

0

ns

WR

Low to Output Data Valid

tDO

Figure 2, CL = 100pF (Note 12)

120

ns

RD

HBEN High or HBEN Low to

tDO1

Figure 2, CL = 100pF (Note 12)

120

ns

Output Valid

RD

High to Output Disable

tTR

(Note 13)

70

ns

Low to

High Delay

tINT1

120

ns

RD

INT

Accuracy specifications tested at VDD = 5.0V. Performance at power-supply tolerance limits guaranteed by Power-Supply Rejection test. Tested for the ±4.096V input range.

External reference: VREF = 4.096V, offset error nulled, ideal last code transition = FS - 3/2LSB. Ground “on” channel; sine wave applied to all “off” channels.

Maximum full-power input frequency for 1LSB error with 10ns jitter = 3kHz. Guaranteed by design. Not tested.

Use static loads only.

Tested using internal reference.

PSRR measured at full-scale. VDD = 4.75V to 5.25V.

External acquisition timing: starts at rising edge of WR with control bit ACQMOD = low; ends at rising edge of WR with ACQMOD = high.

Note 10: Not subject to production testing. Provided for design guidance only.

Note 11: All input control signals specified with tR = tF = 5ns from a voltage level of 0.8V to 2.4V.

Note 12: tDO and tDO1 are measured with the load circuits of Figure 2 and defined as the time required for an output to cross 0.8V or 2.4V.

Note 13: tTR is defined as the time required for the data lines to change by 0.5V.

MAX199

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