KIT
EVALUATION
AVAILABLE
12-Bit Serial ADCs in 8-Pin SO
Description
-power, 12-bit analogin 8-pin packwith a single +2.7V to
operates with a single devices feature a 7.5µs a fast track/hold a high-speed, 3-wire ser-
(VDD = 3V) at the
. A 2µA shutdown throughput rates.
2.5V reference, while the reference. The MAX1241 REF, and the reference supply rail. An exterthe 3-wire interface, microcontroller I/O
ports. The interface is compatible with SPI™, QSPI™, and MICROWIRE™.
Excellent AC characteristics and very low power combined with ease of use and small package size make these converters ideal for remote-sensor and dataacquisition applications, or for other circuits with demanding power consumption and space requirements. The MAX1240/MAX1241 are available in 8-pin DIP and SO packages.
Applications
Battery-Powered Systems
Portable Data Logging
Isolated Data Acquisition
Process Control
Instrumentation
Pin Configuration
TOP VIEW
VDD |
1 |
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8 |
SCLK |
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AIN |
2 |
MAX1240 |
7 |
CS |
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SHDN |
3 |
6 |
DOUT |
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MAX1241 |
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REF |
4 |
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5 |
GND |
DIP/SO
________________________________Features
♦Single-Supply Operation: +2.7V to +3.6V (MAX1240) +2.7V to +5.25V (MAX1241)
♦12-Bit Resolution
♦Internal 2.5V Reference (MAX1240)
♦Small Footprint: 8-Pin DIP/SO Packages
♦Low Power: 3.7µW (73ksps, MAX1240) 3mW (73ksps, MAX1241)
66µW (1ksps, MAX1241) 5µW (power-down mode)
♦Internal Track/Hold
♦SPI/QSPI/MICROWIRE 3-Wire Serial Interface
♦Internal Clock
Ordering Information
PART |
TEMP. RANGE |
PIN- |
INL |
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PACKAGE |
(LSB) |
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MAX1240ACPA |
0°C to +70°C |
8 Plastic DIP |
±1/2 |
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MAX1240BCPA |
0°C to +70°C |
8 Plastic DIP |
±1 |
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MAX1240CCPA |
0°C to +70°C |
8 Plastic DIP |
±1 |
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MAX1240ACSA |
0°C to +70°C |
8 SO |
±1/2 |
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MAX1240BCSA |
0°C to +70°C |
8 SO |
±1 |
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MAX1240CCSA |
0°C to +70°C |
8 SO |
±1 |
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MAX1240BC/D |
0°C to +70°C |
Dice* |
±1 |
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Ordering Information continued at end of data sheet.
*Dice are specified at TA = +25°C, DC parameters only.
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Functional Diagram |
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VDD |
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1 |
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CS |
7 |
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8 |
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SCLK |
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SHDN |
3 |
CONTROL |
INT |
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LOGIC |
CLOCK |
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OUTPUT |
6 |
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SHIFT |
DOUT |
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REGISTER |
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AIN |
2 |
T/H |
12-BIT |
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SAR |
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2.5V REFERENCE |
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MAX1240 |
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REF |
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(MAX1240 ONLY) |
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MAX1241 |
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5 |
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GND |
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SPI and QSPI are trademarks of Motorola, Inc. MICROWIRE is a trademark of National Semiconductor Corp.
________________________________________________________________ Maxim Integrated Products 1
MAX1240/MAX1241
For free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800. For small orders, phone 1-800-835-8769.
MAX1240/MAX1241
+2.7V, Low-Power,
12-Bit Serial ADCs in 8-Pin SO
ABSOLUTE MAXIMUM RATINGS
VDD to GND ............................................................. |
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- 0.3V to +6V |
AIN to GND................................................ |
-0.3V to (VDD + 0.3V) |
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REF to GND ............................................... |
-0.3V to (VDD + 0.3V) |
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Digital Inputs to GND............................................... |
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- 0.3V to +6V |
DOUT to GND............................................ |
-0.3V to (VDD + 0.3V) |
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DOUT Current.................................................................. |
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±25mA |
Continuous Power Dissipation (TA = +70°C) |
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Plastic DIP (derate 9.09mW/°C above +70°C) |
...........727mW |
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SO (derate 5.88mW/°C above +70°C)........................ |
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471mW |
CERDIP (derate 8.00mW/°C above +70°C)................ |
640mW |
Operating Temperature Ranges |
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MAX1240_C_A/MAX1241_C_A ......................... |
0°C to +70°C |
MAX1240_E_ A/MAX1241_E_ A ..................... |
-40°C to +85°C |
MAX1240_MJA/MAX1241_MJA ................... |
-55°C to +125°C |
Storage Temperature Range............................ |
-60°C to +150°C |
Lead Temperature (soldering, 10sec)............................ |
+300°C |
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VDD = +2.7V to +3.6V (MAX1240); VDD = +2.7V to +5.25V (MAX1241); 73ksps, fSCLK = 2.1MHz (50% duty cycle); MAX1240—4.7µF capacitor at REF pin, MAX1241—external reference; VREF = 2.500V applied to REF pin; TA = TMIN to TMAX; unless otherwise noted.)
PARAMETER |
SYMBOL |
CONDITIONS |
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MIN TYP |
MAX |
UNITS |
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DC ACCURACY (Note 1) |
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Resolution |
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12 |
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Bits |
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Relative Accuracy (Note 2) |
INL |
MAX124_A |
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±0.5 |
LSB |
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MAX124_B/C |
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±1.0 |
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Differential Nonlinearity |
DNL |
No missing codes over temperature |
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±1 |
LSB |
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Offset Error |
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MAX124_A |
±0.5 |
±3.0 |
LSB |
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MAX124_B/C |
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±0.5 |
±4.0 |
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Gain Error (Note 3) |
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±0.5 |
±4.0 |
LSB |
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Gain Temperature Coefficient |
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±0.25 |
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ppm/°C |
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DYNAMIC SPECIFICATIONS (10kHz sine-wave input, 0V to 2.500Vp-p, 73ksps, fSCLK = 2.1MHz) |
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Signal-to-Noise Plus |
SINAD |
MAX124_A/B |
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70 |
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dB |
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Distortion Ratio |
MAX124_C |
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71.5 |
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Total Harmonic Distortion |
THD |
Up to the 5th harmonic |
MAX124_A/B |
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-80 |
dB |
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MAX124_C |
-88 |
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Spurious-Free Dynamic Range |
SFDR |
MAX124_A/B |
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80 |
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dB |
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MAX124_C |
88 |
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Small-Signal Bandwidth |
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-3dB rolloff |
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2.25 |
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MHz |
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Full-Power Bandwidth |
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1.0 |
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MHz |
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CONVERSION RATE |
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Conversion Time |
tCONV |
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5.5 |
7.5 |
µs |
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Track/Hold Acquisition Time |
tACQ |
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1.5 |
µs |
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Throughput Rate |
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fSCLK = 2.1MHz |
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73 |
ksps |
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Aperture Delay |
tAPR |
Figure 8 |
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30 |
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ns |
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Aperture Jitter |
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<50 |
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ps |
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ANALOG INPUT |
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Input Voltage Range |
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0 |
VREF |
V |
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Input Capacitance |
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16 |
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pF |
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2 _______________________________________________________________________________________
+2.7V, Low-Power,
12-Bit Serial ADCs in 8-Pin SO
ELECTRICAL CHARACTERISTICS (continued)
(VDD = +2.7V to +3.6V (MAX1240); VDD = +2.7V to +5.25V (MAX1241); 73ksps, fSCLK = 2.1MHz (50% duty cycle); MAX1240—4.7µF capacitor at REF pin, MAX1241—external reference; VREF = 2.500V applied to REF pin; TA = TMIN to TMAX; unless otherwise noted.)
PARAMETER |
SYMBOL |
CONDITIONS |
MIN |
TYP |
MAX |
UNITS |
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INTERNAL REFERENCE (MAX1240 only) |
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REF Output Voltage |
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TA = +25°C |
2.480 |
2.500 |
2.520 |
V |
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REF Short-Circuit Current |
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30 |
mA |
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MAX1240AC/BC |
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±30 |
±50 |
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REF Temperature Coefficient |
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MAX1240AE/BE |
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±30 |
±60 |
ppm/°C |
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MAX1240AM/BM |
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±30 |
±80 |
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ppm/°C |
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MAX1240C |
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±30 |
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Load Regulation (Note 4) |
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0mA to 0.2mA output load |
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0.35 |
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Capacitive Bypass at REF |
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4.7 |
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µF |
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EXTERNAL REFERENCE (VREF |
= 2.500V) |
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Input Voltage Range |
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1.00 |
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VDD + |
V |
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50mV |
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Input Current |
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100 |
150 |
µA |
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Input Resistance |
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18 |
25 |
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kΩ |
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REF Input Current in Shutdown |
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SHDN = 0V |
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±0.01 |
10 |
µA |
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Capacitive Bypass at REF |
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0.1 |
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µF |
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DIGITAL INPUTS: SCLK, CS, SHDN |
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SCLK, CS Input High Voltage |
VIH |
VDD ≤ 3.6V |
2.0 |
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V |
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VDD > 3.6V (MAX1241) |
3.0 |
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SCLK, CS Input Low Voltage |
VIL |
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0.8 |
V |
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SCLK, CS Input Hysteresis |
VHYST |
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0.2 |
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V |
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SCLK, CS Input Leakage |
IIN |
VIN = 0V or VDD |
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±0.01 |
±1 |
µA |
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SCLK, CS Input Capacitance |
CIN |
(Note 5) |
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15 |
pF |
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SHDN Input High Voltage |
VSH |
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VDD - 0.4 |
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V |
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SHDN Input Low Voltage |
VSL |
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0.4 |
V |
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SHDN Input Current |
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SHDN = 0V or VDD |
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±4.0 |
µA |
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SHDN Input Mid Voltage |
VSM |
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1.1 |
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VDD - 1.1 |
V |
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SHDN Voltage, Floating |
VFLT |
SHDN = float |
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VDD/2 |
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V |
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SHDN Max Allowed Leakage, |
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SHDN = float |
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±100 |
nA |
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Mid Input |
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DIGITAL OUTPUT: DOUT |
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Output Voltage Low |
VOL |
ISINK = 5mA |
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0.4 |
V |
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ISINK = 16mA |
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0.8 |
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Output Voltage High |
VOH |
ISOURCE = 0.5mA |
VDD - 0.5 |
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V |
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Three-State Leakage Current |
IL |
CS = VDD |
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±0.01 |
±10 |
µA |
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Three-State Output Capacitance |
COUT |
CS = VDD (Note 5) |
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15 |
pF |
MAX1240/MAX1241
_______________________________________________________________________________________ 3
MAX1240/MAX1241
+2.7V, Low-Power,
12-Bit Serial ADCs in 8-Pin SO
ELECTRICAL CHARACTERISTICS (continued)
(VDD = +2.7V to +3.6V (MAX1240); VDD = +2.7V to +5.25V (MAX1241); 73ksps, fSCLK = 2.1MHz (50% duty cycle); MAX1240—4.7µF capacitor at REF pin, MAX1241—external reference; VREF = 2.500V applied to REF pin; TA = TMIN to TMAX; unless otherwise noted.)
PARAMETERS |
SYMBOL |
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CONDITIONS |
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MIN TYP |
MAX |
UNITS |
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POWER REQUIREMENTS |
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Supply Voltage |
VDD |
MAX1240 |
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2.7 |
3.6 |
V |
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MAX1241 |
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2.7 |
5.25 |
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MAX1240A/B |
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VDD = 3.6V |
1.4 |
2.0 |
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VDD = 3.6V |
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MAX1240C |
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1.4 |
3.5 |
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Operating |
MAX1241A/B |
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VDD = 3.6V |
0.9 |
1.5 |
mA |
Supply Current |
IDD |
mode |
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VDD = 5.25V |
1.6 |
2.5 |
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MAX1241C |
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VDD = 3.6V |
0.9 |
2.8 |
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VDD = 5.25V |
1.6 |
3.8 |
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Power-down, digital inputs |
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VDD = 3.6V |
1.9 |
10 |
µA |
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at 0V or VDD |
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VDD = 5.25V |
3.5 |
15 |
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Supply Rejection |
PSR |
(Note 5) |
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±0.3 |
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mV |
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TIMING CHARACTERISTICS (Figure 8)
(VDD = +2.7V to +3.6V (MAX1240); VDD = +2.7V to +5.25V (MAX1241); TA = TMIN to TMAX, unless otherwise noted.)
PARAMETERS |
SYMBOL |
CONDITIONS |
MIN |
TYP MAX |
UNITS |
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Acquisition Time |
tACQ |
CS = VDD (Note 6) |
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1.5 |
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µs |
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SCLK Fall to Output Data Valid |
tDO |
Figure 1, |
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MAX124_ _C/E |
20 |
200 |
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CLOAD = 50pF |
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MAX124_ _M |
20 |
240 |
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CS Fall to Output Enable |
tDV |
Figure 1, CLOAD = 50pF |
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240 |
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CS Rise to Output Disable |
tTR |
Figure 2, CLOAD = 50pF |
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240 |
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SCLK Clock Frequency |
fSCLK |
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0 |
2.1 |
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MHz |
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SCLK Pulse Width High |
tCH |
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200 |
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SCLK Pulse Width Low |
tCL |
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200 |
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SCLK Low to CS Fall Setup Time |
tCS0 |
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50 |
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DOUT Rise to SCLK Rise (Note 5) |
tSTR |
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0 |
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CS Pulse Width |
tCS |
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240 |
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Note 1: Tested at VDD = +2.7V.
Note 2: Relative accuracy is the deviation of the analog value at any code from its theoretical value after the full-scale range and offset have been calibrated.
Note 3: MAX1240—internal reference, offset nulled; MAX1241—external reference (VREF = +2.500V), offset nulled. Note 4: External load should not change during conversion for specified accuracy.
Note 5: Guaranteed by design. Not subject to production testing. Note 6: Measured as [VFS(2.7V) - VFS(VDD(MAX)].
Note 7: To guarantee acquisition time, tACQ is the maximum time the device takes to acquire the signal, and is also the minimum time needed for the signal to be acquired.
4 _______________________________________________________________________________________
+2.7V, Low-Power,
12-Bit Serial ADCs in 8-Pin SO
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+2.7V |
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6k |
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DOUT |
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DOUT |
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6k |
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CLOAD = 50pF |
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CLOAD = 50pF |
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DGND |
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DGND |
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a) High-Z to VOH and VOL to VOH |
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b) High-Z to VOL and VOH to VOL |
Figure 1. Load Circuits for DOUT Enable Time
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+2.7V |
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6k |
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DOUT |
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DOUT |
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6k |
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CLOAD = 50pF |
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CLOAD = 50pF |
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DGND |
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DGND |
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a) VOH to High-Z |
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b) VOLto High-Z |
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Figure 2. Load Circuits for DOUT Disable Time
__________________________________________Typical Operating Characteristics
(VDD = 3.0V, VREF = 2.5V, fSCLK = 2.1MHz, CL = 20pF, TA = +25°C, unless otherwise noted.)
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OPERATING SUPPLY CURRENT |
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OFFSET ERROR |
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vs. SUPPLY VOLTAGE |
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SUPPLY CURRENT vs. TEMPERATURE |
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vs. SUPPLY VOLTAGE |
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2.0 |
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MAX1241-D |
1.3 |
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MAX1241-A/NEW |
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1.0 |
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MAX1241-03 |
(mA) |
1.8 |
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RL = ∞ |
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MAX1240 |
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0.9 |
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CODE = |
101010100000 |
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CURRENTSUPPLYOPERATING |
1.6 |
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1.2 |
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0.8 |
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1.4 |
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MAX1240 |
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(mA)CURRENTSUPPLY |
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(LSB)ERROROFFSET |
0.7 |
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1.2 |
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1.1 |
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0.6 |
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1.0 |
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0.5 |
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MAX1241 |
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1.0 |
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0.8 |
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0.4 |
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0.6 |
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0.3 |
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MAX1241 |
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0.4 |
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0.2 |
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0.9 |
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0.2 |
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RLOAD = ∞ |
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0.1 |
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0 |
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0.8 |
CODE = 10101010000 |
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0 |
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2 |
3 |
4 |
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5 |
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6 |
-60 |
-20 |
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20 |
60 |
100 |
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140 |
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2.25 2.75 3.25 3.75 4.25 4.75 5.25 |
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SUPPLY VOLTAGE (V) |
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TEMPERATURE (°C) |
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SUPPLY VOLTAGE (V) |
MAX1240/MAX1241
_______________________________________________________________________________________ 5