KIT
EVALUATION
AVAILABLE
Description
-power, 8-bit, 8-chan- (ADCs) that feature an clock, and serial a single +4.5V to +5.5V while sampling at 8 analog inputs
inputs are software-con- and single-
are performed an external serial-inter- input range is deterreference, or by an from 1V to VDD. with the SPI™, -interface standards.
the end-of-conversion
.
a software-program- down mode to minimize -down, the supply 1ksps, and only 82µA at be controlled using the
SHDN input pin. Accessing the serial interface automatically powers up the device.
The MAX1112 is available in 20-pin SSOP and DIP packages. The MAX1113 is available in small 16-pin QSOP and DIP packages.
________________________Applications
Portable Data Logging
Hand-Held Measurement Devices
Medical Instruments
System Diagnostics
Solar-Powered Remote Systems
4–20mA-Powered Remote
Data-Acquisition Systems
Pin Configurations appear at end of data sheet.
SPI and QSPI are trademarks of Motorola, Inc.
MICROWIRE is a trademark of National Semiconductor Corp.
Serial 8-Bit ADCs
____________________________Features
♦+4.5V to +5.5V Single Supply
♦Low Power: 135µA at 50ksps
13µA at 1ksps
♦8-Channel Single-Ended or 4-Channel Differential Inputs (MAX1112)
♦4-Channel Single-Ended or 2-Channel Differential Inputs (MAX1113)
♦Internal Track/Hold; 50kHz Sampling Rate
♦Internal 4.096V Reference
♦SPI/QSPI/MICROWIRE-Compatible Serial Interface
♦Software-Configurable Unipolar or Bipolar Inputs
♦Total Unadjusted Error: ±1LSB (max)
±0.3LSB (typ)
Ordering Information
PART |
TEMP. RANGE |
PIN-PACKAGE |
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MAX1112CPP |
0°C to +70°C |
20 Plastic DIP |
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MAX1112CAP |
0°C to +70°C |
20 SSOP |
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MAX1112C/D |
0°C to +70°C |
Dice* |
*Dice are specified at TA = +25°C, DC parameters only.
Ordering Information continued at end of data sheet.
Functional Diagram
CS |
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SCLK |
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INPUT |
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INT |
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DIN |
SHIFT |
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CLOCK |
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REGISTER |
CONTROL |
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SHDN |
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LOGIC |
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CH0 |
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OUTPUT |
DOUT |
CH1 |
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SHIFT |
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CH2 |
ANALOG |
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REGISTER |
SSTRB |
CH3 |
T/H |
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CH4* |
INPUT |
CLOCK |
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MUX |
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CH5* |
IN |
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8-BIT |
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CH6* |
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SAR ADC |
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CH7* |
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OUT |
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COM |
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REF |
VDD |
REFOUT |
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+4.096V |
MAX1112 |
DGND |
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REFERENCE |
AGND |
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MAX1113 |
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REFIN |
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*MAX1112 ONLY
________________________________________________________________ Maxim Integrated Products 1
MAX1112/MAX1113
For free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800. For small orders, phone 1-800-835-8769.
MAX1112/MAX1113
+5V, Low-Power, Multi-Channel,
Serial 8-Bit ADCs
ABSOLUTE MAXIMUM RATINGS
VDD to AGND.............................................................. |
-0.3V to 6V |
AGND to DGND ....................................................... |
-0.3V to 0.3V |
CH0–CH7, COM, REFIN, |
-0.3V to (VDD + 0.3V) |
REFOUT to AGND ................................... |
|
Digital Inputs to DGND ............................................... |
-0.3V to 6V |
Digital Outputs to DGND............................ |
-0.3V to (VDD + 0.3V) |
Continuous Power Dissipation (TA = +70°C) |
|
16 Plastic DIP (derate 10.53mW/°C above +70°C) ...... |
842mW |
16 QSOP (derate 8.30mW/°C above +70°C)................ |
667mW |
16 CERDIP (derate 10.00mW/°C above +70°C) .......... |
800mW |
20 Plastic DIP (derate 11.11mW/°C above +70°C) |
......889mW |
|
20 SSOP (derate 8.00mW/°C above +70°C) |
................ |
640mW |
20 CERDIP (derate 11.11mW/°C above +70°C) .......... |
889mW |
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Operating Temperature Ranges |
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MAX1112C_P/MAX1113C_E................................ |
0°C to +70°C |
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MAX1112E_P/MAX1113E_E ............................. |
- 40°C to +85°C |
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MAX1112MJP/MAX1113MJE.......................... |
- 55°C to +125°C |
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Storage Temperature Range ............................. |
- 65°C to +150°C |
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Lead Temperature (soldering, 10sec) ............................. |
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+300°C |
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VDD = +4.5V to +5.5V; unipolar input mode; COM = 0V; fSCLK = 500kHz, external clock (50% duty cycle); 10 clocks/conversion cycle (50ksps); 1µF capacitor at REFOUT; TA = TMIN to TMAX; unless otherwise noted.)
PARAMETER |
SYMBOL |
CONDITIONS |
MIN |
TYP |
MAX |
UNITS |
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DC ACCURACY |
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Resolution |
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8 |
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Bits |
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Relative Accuracy (Note 1) |
INL |
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±0.1 |
±0.5 |
LSB |
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Differential Nonlinearity |
DNL |
No missing codes over temperature |
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±1 |
LSB |
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Offset Error |
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±0.3 |
±1 |
LSB |
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Gain Error (Note 2) |
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Internal or external reference |
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±1 |
LSB |
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Gain Temperature Coefficient |
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External reference, 4.096V |
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±0.8 |
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ppm/°C |
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Total Unadjusted Error |
TUE |
MAX111_C/E |
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±0.3 |
±1 |
LSB |
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Channel-to-Channel |
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±0.1 |
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LSB |
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Offset Matching |
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DYNAMIC SPECIFICATIONS (10.034kHz sine- |
wave input, 4.096Vp-p, 50ksps, 500kHz external clock) |
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Signal-to-Noise |
SINAD |
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49 |
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dB |
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and Distortion Ratio |
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Total Harmonic Distortion |
THD |
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-70 |
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dB |
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(up to the 5th harmonic) |
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Spurious-Free Dynamic Range |
SFDR |
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68 |
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dB |
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Channel-to-Channel Crosstalk |
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VCH_ = 4.096Vp-p, 25kHz (Note 3) |
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-75 |
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dB |
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Small-Signal Bandwidth |
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-3dB rolloff |
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1.5 |
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MHz |
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Full-Power Bandwidth |
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800 |
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kHz |
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2 _______________________________________________________________________________________
+5V, Low-Power, Multi-Channel,
Serial 8-Bit ADCs
ELECTRICAL CHARACTERISTICS (continued)
(VDD = +4.5V to +5.5V; unipolar input mode; COM = 0V; fSCLK = 500kHz, external clock (50% duty cycle); 10 clocks/conversion cycle (50ksps); 1µF capacitor at REFOUT; TA = TMIN to TMAX; unless otherwise noted.)
PARAMETER |
SYMBOL |
CONDITIONS |
MIN |
TYP |
MAX |
UNITS |
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CONVERSION RATE |
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Conversion Time (Note 4) |
tCONV |
Internal clock |
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25 |
55 |
µs |
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External clock, 500kHz, 10 clocks/conversion |
20 |
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Track/Hold Acquisition Time |
tACQ |
External clock, 2MHz |
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1 |
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µs |
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Aperture Delay |
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10 |
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ns |
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Aperture Jitter |
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<50 |
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ps |
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Internal Clock Frequency |
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400 |
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kHz |
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External Clock-Frequency Range |
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(Note 5) |
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50 |
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500 |
kHz |
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Used for data transfer only |
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2 |
MHz |
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ANALOG INPUT |
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Input Voltage Range, Single- |
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Unipolar input, COM = 0V |
0 |
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VREFIN |
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V |
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COM ± |
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Ended and Differential (Note 6) |
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Bipolar input, COM = VREFIN / 2 |
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VREFIN / 2 |
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Multiplexer Leakage Current |
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On/off leakage current, VCH_ = 0V or VDD |
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±0.01 |
±1 |
µA |
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Input Capacitance |
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18 |
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pF |
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INTERNAL REFERENCE |
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REFOUT Voltage |
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3.936 |
4.096 |
4.256 |
V |
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REFOUT Short-Circuit Current |
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6 |
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mA |
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REFOUT Temperature Coefficient |
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±50 |
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ppm/°C |
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Load Regulation (Note 7) |
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0mA to 0.5mA output load |
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4.5 |
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mV |
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Capacitive Bypass at REFOUT |
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1 |
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µF |
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EXTERNAL REFERENCE AT REFIN |
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Input Voltage Range |
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1 |
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VDD + |
V |
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50mV |
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Input Current |
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(Note 8) |
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1 |
20 |
µA |
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POWER REQUIREMENTS |
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Supply Voltage |
VDD |
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4.5 |
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5.5 |
V |
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Full-scale input |
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Operating mode |
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135 |
250 |
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CLOAD = 10pF |
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Reference disabled |
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95 |
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µA |
Supply Current |
IDD |
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µA |
Power-down |
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Software |
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2 |
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SHDN at DGND |
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3.2 |
10 |
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Power-Supply Rejection |
PSR |
VDD = 4.5V to 5.5V; external reference, |
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±0.4 |
±4 |
mV |
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(Note 9) |
4.096V; full-scale input |
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MAX1112/MAX1113
_______________________________________________________________________________________ 3
MAX1112/MAX1113
+5V, Low-Power, Multi-Channel,
Serial 8-Bit ADCs
ELECTRICAL CHARACTERISTICS (continued)
(VDD = +4.5V to +5.5V; unipolar input mode; COM = 0V; fSCLK = 500kHz, external clock (50% duty cycle); 10 clocks/conversion cycle (50ksps); 1µF capacitor at REFOUT; TA = TMIN to TMAX; unless otherwise noted.)
PARAMETER |
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SYMBOL |
CONDITIONS |
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MIN |
TYP |
MAX |
UNITS |
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DIGITAL INPUTS: DIN, SCLK, CS |
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DIN, SCLK, CS Input High Voltage |
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VIH |
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3 |
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V |
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DIN, SCLK, CS Input Low Voltage |
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VIL |
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0.8 |
V |
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DIN, SCLK, CS Input Hysteresis |
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VHYST |
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0.2 |
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V |
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DIN, SCLK, CS Input Leakage |
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IIN |
Digital inputs = 0V or VDD |
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±1 |
µA |
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DIN, SCLK, CS Input Capacitance |
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CIN |
(Note 5) |
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15 |
pF |
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SHDN INPUT |
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SHDN Input High Voltage |
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VSH |
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VDD - 0.4 |
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V |
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SHDN Input Mid-Voltage |
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VSM |
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1.1 |
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VDD - 1.1 |
V |
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SHDN Voltage, Floating |
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VFLT |
SHDN = open |
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VDD / 2 |
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V |
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SHDN Input Low Voltage |
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VSL |
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0.4 |
V |
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SHDN Input Current |
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SHDN = 0V or VDD |
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±4 |
µA |
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SHDN Maximum Allowed Leakage |
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SHDN = open |
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±100 |
nA |
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for Mid-Input |
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DIGITAL OUTPUTS: DOUT, SSTRB |
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Output Low Voltage |
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VOL |
ISINK = 5mA |
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0.4 |
V |
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ISINK = 16mA |
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0.8 |
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Output High Voltage |
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VOH |
ISOURCE = 0.5mA |
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VDD - 0.5 |
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V |
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Three-State Leakage Current |
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IL |
CS = VDD |
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±0.01 |
±10 |
µA |
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Three-State Output Capacitance |
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COUT |
CS = VDD (Note 5) |
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15 |
pF |
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4 _______________________________________________________________________________________
+5V, Low-Power, Multi-Channel,
Serial 8-Bit ADCs
TIMING CHARACTERISTICS (Figures 8 and 9)
(VDD = +4.5V to +5.5V, TA = TMIN to TMAX, unless otherwise noted.)
PARAMETER |
SYMBOL |
CONDITIONS |
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MIN |
TYP |
MAX |
UNITS |
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Track/Hold Acquisition Time |
tACQ |
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1 |
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µs |
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DIN to SCLK Setup |
tDS |
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100 |
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ns |
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DIN to SCLK Hold |
tDH |
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0 |
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ns |
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SCLK Fall to Output Data Valid |
tDO |
Figure 1, |
MAX111_C/E |
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20 |
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200 |
ns |
CLOAD = 100pF |
MAX111_M |
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20 |
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240 |
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CS Fall to Output Enable |
tDV |
Figure 1, CLOAD = 100pF |
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240 |
ns |
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CS Rise to Output Disable |
tTR |
Figure 2, CLOAD = 100pF |
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240 |
ns |
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CS to SCLK Rise Setup |
tCSS |
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100 |
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ns |
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CS to SCLK Rise Hold |
tCSH |
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0 |
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ns |
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SCLK Pulse Width High |
tCH |
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200 |
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ns |
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SCLK Pulse Width Low |
tCL |
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200 |
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ns |
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SCLK Fall to SSTRB |
tSSTRB |
CLOAD = 100pF |
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240 |
ns |
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CS Fall to SSTRB Output Enable |
tSDV |
Figure 1, external clock mode only, |
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240 |
ns |
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(Note 5) |
CLOAD = 100pF |
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CS Rise to SSTRB Output |
tSTR |
Figure 2, external clock mode only, |
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240 |
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Disable (Note 5) |
CLOAD = 100pF |
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SSTRB Rise to SCLK Rise |
tSCK |
Figure 11, internal clock mode only |
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Wakeup Time |
tWAKE |
External reference |
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20 |
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Internal reference (Note 10) |
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24 |
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Note 1: Relative accuracy is the analog value’s deviation (at any code) from its theoretical value after the full-scale range is calibrated. Note 2: VREFIN = 4.096V, offset nulled.
Note 3: On-channel grounded; sine wave applied to all off-channels.
Note 4: Conversion time is defined as the number of clock cycles multiplied by the clock period; clock has 50% duty cycle. Note 5: Guaranteed by design. Not subject to production testing.
Note 6: Common-mode range for the analog inputs is from AGND to VDD.
Note 7: External load should not change during the conversion for specified accuracy. Note 8: External reference at 4.096V, full-scale input, 500kHz external clock.
Note 9: Measured as | VFS (4.5V) - VFS (5.5V) |.
Note 10: 1µF at REFOUT; internal reference settling to 0.5LSB.
MAX1112/MAX1113
_______________________________________________________________________________________ 5
MAX1112/MAX1113
+5V, Low-Power, Multi-Channel,
Serial 8-Bit ADCs
__________________________________________Typical Operating Characteristics
(VDD = +5.0V; fSCLK = 500kHz; external clock (50% duty cycle); RL = ∞; TA = +25°C, unless otherwise noted.)
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SUPPLY CURRENT vs. TEMPERATURE |
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SHUTDOWN SUPPLY CURRENT |
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DIFFERENTIAL NONLINEARITY |
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vs. TEMPERATURE |
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vs. CODE |
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180 |
MAX1112/13-01 |
A)(μ |
10 |
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MAX1112/13-02 |
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0.3 |
MAX1112/13-03 |
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OUTPUT CODE = FULL SCALE |
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SHDN = DGND |
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CLOAD = 10pF |
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8 |
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0.2 |
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A)(CURRENTSUPPLYμ |
160 |
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CURRENTSUPPLYSHUTDOWN |
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(LSB)DNL |
-0.2 |
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2 |
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VDD = 5.5V |
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6 |
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0.1 |
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140 |
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0 |
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VDD = 4.5V |
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4 |
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-0.1 |
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120 |
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100 |
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0 |
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-0.3 |
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-60 |
-20 |
20 |
60 |
100 |
140 |
-60 |
-20 |
20 |
60 |
100 |
140 |
0 |
64 |
128 |
192 |
256 |
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TEMPERATURE (°C) |
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TEMPERATURE (°C) |
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DIGITAL CODE |
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OFFSET ERROR (LSB)
0.6
0.5
0.4
0.3
0.2
0.1
0
OFFSET ERROR vs. TEMPERATURE
MAX1112/13-04
-60 |
-20 |
20 |
60 |
100 |
140 |
TEMPERATURE (°C)
INL (LSB)
0.20
0.15
0.10
0.05
0
-0.05
-0.10
-0.15
-0.20
INTEGRAL NONLINEARITY vs. CODE
AMPLITUDE (dB)
MAX1112/13-05
0 |
64 |
128 |
192 |
256 |
DIGITAL CODE
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FFT PLOT |
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20 |
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06 |
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- |
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fCH_ |
= 10.034kHz, 4Vp-p |
MAX1112/13 |
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0 |
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fSAMPLE = 50ksps |
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-20 |
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-40 |
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-60 |
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-80 |
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-100 |
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0 |
5 |
10 |
15 |
20 |
25 |
FREQUENCY (kHz)
6 _______________________________________________________________________________________