ISSI IS63LV1024-12J, IS63LV1024-10T, IS63LV1024-10KI, IS63LV1024-12TI, IS63LV1024-12T Datasheet

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IS63LV1024

ISSI®

128K x 8 HIGH-SPEED CMOS STATIC RAM

3.3V REVOLUTIONARY PINOUT

SEPTEMBER 2000

FEATURES

•High-speed access times: 8, 10, 12 and 15 ns

•High-performance, low-power CMOS process

•Multiple center power and ground pins for greater noise immunity

•Easy memory expansion with CE and OE options

•CE power-down

•Fully static operation: no clock or refresh required

•TTL compatible inputs and outputs

•Single 3.3V power supply

•Packages available:

–32-pin 300-mil SOJ

–32-pin 400-mil SOJ

–32-pin TSOP (Type II)

DESCRIPTION

The ISSI IS63LV1024 is a very high-speed, low power, 131,072-word by 8-bit CMOS static RAM in revolutionary pinout. The IS63LV1024 is fabricated using ISSI's high-performance CMOS technology. This highly reliable process coupled with innovative circuit design techniques, yields higher performance and low power consumption devices.

When CE is HIGH (deselected), the device assumes a standby mode at which the power dissipation can be reduced down to 250 µW (typical) with CMOS input levels.

The IS63LV1024 operates from a single 3.3V power supply and all inputs are TTL-compatible.

FUNCTIONAL BLOCK DIAGRAM

A0-A16		128K X 8
	DECODER	128K X 8
	DECODER	MEMORY ARRAY
		MEMORY ARRAY

VCC

GND

I/O

I/O0-I/O7 DATA COLUMN I/O

CIRCUIT

CONTROL

CIRCUIT

ISSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any errors which may appear in this publication. © Copyright 2000, Integrated Silicon Solution, Inc.

Integrated Silicon Solution, Inc. — 1-800-379-4774

Rev. H

10/02/00

IS63LV1024

ISSI®

PIN CONFIGURATION

32-Pin SOJ

			32	A16
	A0	1
	A1		31	A15
		2
	A2		30	A14
		3
	A3		29	A13
		4
			28
	CE	5			OE
I/O0			27	I/O7
		6
I/O1			26	I/O6
		7
Vcc		8	25	GND

GND			24	Vcc
		9
I/O2			23	I/O5
		10
I/O3			22	I/O4
		11
			21	A12
WE		12
	A4		20	A11
		13
	A5		19	A10
		14
	A6	15	18	A9

	A7	16	17	A8

PIN DESCRIPTIONS

A0-A16	Address Inputs

CE	Chip Enable Input

OE	Output Enable Input

WE	Write Enable Input

I/O0-I/O7	Bidirectional Ports

Vcc	Power

GND	Ground

PIN CONFIGURATION

32-Pin TSOP (Type II) (T)

				32	A16
	A0	1
	A1		2	31	A15

	A2		3	30	A14

	A3		4	29	A13

	CE		5	28
						OE
I/O0			6	27	I/o7

I/O1			7	26	I/O6

	Vcc		8	25	GND

GND			9	24	Vcc

I/O2			10	23	I/O5

I/O3				22	I/O4
			11
				21	A12
	WE		12
	A4		13	20	A11

	A5		14	19	A10

	A6		15	18	A9

	A7		16	17	A8

TRUTH TABLE

Mode	WE	CE	OE	I/O Operation	Vcc Current

Not Selected	X	H	X	High-Z	ISB1, ISB2
(Power-down)

Output Disabled H		L	H	High-Z	ICC1, ICC2

Read	H	L	L	DOUT	ICC1, ICC2

Write	L	L	X	DIN	ICC1, ICC2

ABSOLUTE MAXIMUM RATINGS(1)

Symbol	Parameter	Value	Unit
VTERM	Terminal Voltage with Respect to GND	–0.5 to Vcc + 0.5	V

TBIAS	Temperature Under Bias	–55 to +125	°C
TSTG	Storage Temperature	–65 to +150	°C

PT	Power Dissipation	1.0	W

Notes:

1.Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.

2 Integrated Silicon Solution, Inc. — 1-800-379-4774

Rev. H

10/02/00

IS63LV1024								ISSI®
	OPERATING RANGE

	Range		Ambient Temperature		VCC
	Commercial		0°C to +70°C		3.3V ± 0.3V

	Industrial		–40°C to +85°C		3.3V ± 0.15V

DC ELECTRICAL CHARACTERISTICS (Over Operating Range)

	Symbol	Parameter		Test Conditions			Min.	Max.	Unit

	VOH	Output HIGH Voltage		VCC = Min., IOH = –4.0 mA			2.4	—	V

	VOL	Output LOW Voltage		VCC = Min., IOL = 8.0 mA			—	0.4	V

	VIH	Input HIGH Voltage					2.2	VCC + 0.3	V

	VIL	Input LOW Voltage(1)					–0.3	0.8	V

	ILI	Input Leakage		GND ≤ VIN ≤ VCC		Com.	–1	1	µA
						Ind.	–5	5
	ILO	Output Leakage		GND ≤ VOUT ≤ VCC, Outputs Disabled		Com.	–1	1	µA
						Ind.	–5	5

Notes:

1. VIL = –3.0V for pulse width less than 10 ns.

POWER SUPPLY CHARACTERISTICS(1) (Over Operating Range)

				-8 ns		-10 ns		-12 ns		-15 ns
Symbol	Parameter	TestConditions		Min.	Max.	Min.	Max.	Min.	Max.	Min.	Max.	Unit

ICC1	Vcc Operating	VCC = Max., CE = VIL	Com.	—	160	—	150	—	130	—	120	mA
	Supply Current	IOUT = 0 mA, f = Max.	Ind.	—	170	—	160	—	140	—	130

ISB	TTL Standby	VCC = Max.,	Com.	—	55	—	45	—	40	—	35	mA
	Current	VIN = VIH or VIL	Ind.	—	55	—	45	—	40	—	35
	(TTL Inputs)	CE ≥ VIH, f = Max
ISB1	TTL Standby	VCC = Max.,	Com.	—	25	—	25	—	25	—	25	mA
	Current	VIN = VIH or VIL	Ind.	—	30	—	30	—	30	—	30
	(TTL Inputs)	CE ≥ VIH, f = 0
ISB2	CMOS Standby	VCC = Max.,	Com.	—	5	—	5	—	5	—	5	mA
	Current	CE ≤ VCC – 0.2V,	Ind.	—	10	—	10	—	10	—	10
	(CMOS Inputs)	VIN ≥ VCC – 0.2V, or
		VIN ≤ 0.2V, f = 0

Notes:

1. At f = fMAX, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change.

CAPACITANCE(1,2)

Symbol	Parameter	Conditions	Max.	Unit
CIN	Input Capacitance	VIN = 0V	6	pF

CI/O	Input/Output Capacitance	VOUT = 0V	8	pF

Notes:

1.Tested initially and after any design or process changes that may affect these parameters.

2.Test conditions: TA = 25°C, f = 1 MHz, Vcc = 3.3V.

Integrated Silicon Solution, Inc. — 1-800-379-4774

Rev. H

10/02/00

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