IS62V6416BLL |
ISSI® |
64K x 16 LOW VOLTAGE,
ULTRA LOW POWER CMOS STATIC RAM
MARCH 2000
FEATURES
•Access time: 100 and 120 ns
•CMOS low power operation
•TTL compatible interface levels
•Single 2.7V-3.3V power supply
•Fully static operation: no clock or refresh required
•Three state outputs
•Data control for upper and lower bytes
•Industrial temperature available
•Available in Jedec Std 44-pin SOJ package, 44-pin TSOP (Type II), and 48-pin mini BGA
DESCRIPTION
The ISSI IS62V6416BLL is an ultra-low power, 1,048,576-bit static RAM organized as 65,536 words by 16 bits. It is fabricated using ISSI's high-performance CMOS technology. This highly reliable process coupled with innovative circuit design techniques yields access times as fast as 100 ns with low power consumption.
When CS is HIGH (deselected) or when CS is LOW and both LB and UB are HIGH, the device assumes a standby mode at which the power dissipation can be reduced down with CMOS input levels.
Easy memory expansion is provided by using Chip Select and Output Enable inputs, CS and OE. The active LOW Write Enable (WE) controls both writing and reading of the memory. A data byte allows Upper Byte (UB) and Lower Byte (LB) access.
FUNCTIONAL BLOCK DIAGRAM
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A0-A15 |
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DECODER |
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64K x 16 |
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MEMORY ARRAY |
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VCC |
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GND |
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I/O0-I/O7 |
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I/O |
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Lower Byte |
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COLUMN I/O |
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DATA |
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I/O8-I/O15 |
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CIRCUIT |
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Upper Byte |
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CS |
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OE |
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CONTROL |
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WE |
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CIRCUIT |
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UB |
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LB |
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ISSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any errors which may appear in this publication. © Copyright 2000, Integrated Silicon Solution, Inc.
Integrated Silicon Solution, Inc. — 1-800-379-4774 |
1 |
Rev. A
03/17/00
IS62V6416BLL |
ISSI® |
PIN CONFIGURATIONS
44-Pin SOJ
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44 |
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A5 |
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A4 |
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1 |
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A3 |
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43 |
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A6 |
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2 |
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A2 |
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A7 |
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3 |
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A1 |
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41 |
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4 |
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OE |
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A0 |
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40 |
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5 |
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UB |
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CS |
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6 |
39 |
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LB |
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I/O0 |
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38 |
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I/O15 |
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I/O1 |
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37 |
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I/O14 |
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I/O2 |
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36 |
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I/O13 |
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I/O3 |
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35 |
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I/O12 |
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10 |
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Vcc |
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34 |
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GND |
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11 |
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GND |
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Vcc |
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12 |
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I/O4 |
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32 |
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I/O11 |
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13 |
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I/O5 |
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I/O10 |
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I/O6 |
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30 |
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I/O9 |
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I/O7 |
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29 |
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I/O8 |
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17 |
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NC |
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WE |
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A15 |
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A8 |
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A14 |
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A9 |
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A13 |
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A10 |
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A12 |
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A11 |
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NC |
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NC |
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48-Pin mini BGA (Top View)
1 |
2 |
3 |
4 |
5 |
6 |
A |
LB |
OE |
A0 |
A1 |
A2 |
N/C |
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B |
I/O |
UB |
A3 |
A4 |
CS |
I/O |
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8 |
0 |
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C |
I/O |
I/O |
A5 |
A6 |
I/O |
I/O |
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9 |
10 |
1 |
2 |
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D |
GND |
I/O |
NC |
A7 |
I/O |
Vcc |
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11 |
3 |
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E |
Vcc |
I/O |
NC |
NC |
I/O |
GND |
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12 |
4 |
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F |
I/O |
I/O |
A14 |
A15 |
I/O |
I/O |
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13 |
5 |
6 |
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G |
I/O |
NC |
A12 |
A13 |
WE |
I/O |
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15 |
7 |
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H |
NC |
A8 |
A9 |
A10 |
A11 |
NC |
44-Pin TSOP
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44 |
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A5 |
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A4 |
1 |
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A3 |
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2 |
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A6 |
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A2 |
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3 |
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A7 |
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A1 |
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OE |
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A0 |
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40 |
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UB |
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CS |
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39 |
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LB |
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I/O0 |
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I/O15 |
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I/O1 |
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8 |
37 |
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I/O14 |
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I/O2 |
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9 |
36 |
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I/O13 |
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I/O3 |
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10 |
35 |
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I/O12 |
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Vcc |
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34 |
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GND |
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11 |
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GND |
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Vcc |
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12 |
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I/O4 |
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13 |
32 |
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I/O11 |
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I/O5 |
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14 |
31 |
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I/O10 |
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I/O6 |
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15 |
30 |
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I/O9 |
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I/O7 |
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16 |
29 |
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I/O8 |
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17 |
28 |
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NC |
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WE |
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A15 |
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18 |
27 |
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A8 |
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A14 |
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26 |
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A9 |
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A13 |
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25 |
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A10 |
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A12 |
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21 |
24 |
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A11 |
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NC |
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23 |
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NC |
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PIN DESCRIPTIONS
A0-A15 |
Address Inputs |
I/O0-I/O15 |
Data Inputs/Outputs |
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CS |
Chip Enable Input |
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OE |
Output Enable Input |
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WE |
Write Enable Input |
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LB |
Lower-byte Control (I/O0-I/O7) |
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UB |
Upper-byte Control (I/O8-I/O15) |
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NC |
No Connection |
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Vcc |
Power |
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GND |
Ground |
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2 Integrated Silicon Solution, Inc. — 1-800-379-4774
Rev. A
03/17/00
IS62V6416BLL |
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ISSI® |
TRUTH TABLE |
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I/O Pin |
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Mode |
WE |
CS |
OE |
LB |
UB |
I/O0-I/O7 |
I/O8-I/O15 |
Vcc Current |
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Not Selected |
X |
H |
X |
X |
X |
High-Z |
High-Z |
ISB1, ISB2 |
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X |
L |
X |
H |
H |
High-Z |
High-Z |
ISB1, ISB2 |
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Output Disabled |
H |
L |
H |
L |
L |
High-Z |
High-Z |
ICC |
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Read |
H |
L |
L |
L |
H |
DOUT |
High-Z |
ICC |
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H |
L |
L |
H |
L |
High-Z |
DOUT |
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H |
L |
L |
L |
L |
DOUT |
DOUT |
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Write |
L |
L |
X |
L |
H |
DIN |
High-Z |
ICC |
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L |
L |
X |
H |
L |
High-Z |
DIN |
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L |
L |
X |
L |
L |
DIN |
DIN |
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AC TEST CONDITIONS
Parameter |
Unit |
Input Pulse Level |
0 to 3V(1) |
Input Rise and Fall Times |
5 ns |
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Input and Output Timing and Reference Level |
1.5V(1) |
Output Load |
See Figures 1 and 2 |
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AC TEST LOADS
1076 Ω |
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1076 Ω |
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3V |
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3V |
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OUTPUT |
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OUTPUT |
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30 pF |
1262 Ω |
5 pF |
1262 Ω |
Including |
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Including |
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jig and |
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jig and |
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scope |
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scope |
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Figure 1. |
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Figure 2. |
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THEVENIN EQUIVALENT
581 Ω
OUTPUT 1.61V
Figure 3.
Integrated Silicon Solution, Inc. — 1-800-379-4774 |
3 |
Rev. A
03/17/00
IS62V6416BLL |
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ISSI® |
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ABSOLUTE MAXIMUM RATINGS(1) |
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Symbol Parameter |
Value |
Unit |
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VTERM |
Terminal Voltage with Respect to GND |
–0.5 to Vcc +0.5 |
V |
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TSTG |
Storage Temperature |
–65 to +150 |
°C |
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PT |
Power Dissipation |
1.5 |
W |
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IOUT |
DC Output Current (LOW) |
20 |
mA |
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Note:
1.Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
OPERATING RANGE
Range |
Ambient Temperature |
VCC |
Commercial |
0°C to +70°C |
2.7V (Min.) to 3.3V (Max.) |
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Industrial |
–40°C to +85°C |
2.7V (Min.) to 3.3V (Max.) |
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DC ELECTRICAL CHARACTERISTICS (Over Operating Range Unless Otherwise Specified)
Symbol |
Parameter |
Test Conditions |
Min. |
Max. |
Unit |
VOH |
Output HIGH Voltage |
VCC = Min., IOH = –1 mA |
2.2 |
— |
V |
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VOL |
Output LOW Voltage |
VCC = Min., IOL = 2.1 mA |
— |
0.4 |
V |
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VIH |
Input HIGH Voltage |
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2.0 |
VCC + 0.3 |
V |
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VIL(1) |
Input LOW Voltage |
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–0.2 |
0.4 |
V |
ILI |
Input Leakage |
GND ≤ VIN ≤ VCC |
–1 |
1 |
µA |
ILO |
Output Leakage |
GND ≤ VOUT ≤ VCC, Outputs Disabled |
–1 |
1 |
µA |
Note:
1. VIL (min.) = –1.5V for pulse width less than 30 ns.
4 Integrated Silicon Solution, Inc. — 1-800-379-4774
Rev. A
03/17/00